chore: update build scripts

build.bat

@@ -9,36 +9,35 @@ echo 2. GE Project (Vitis 2024.1)
 set /p choice="Choose a project (1 or 2): "
 
 if "%choice%"=="1" (
-    echo Building NODE Project (SDK 2019.1)...
+    echo Building NODE Project ^(SDK 2019.1^)
     set "platform_ver=2019.1"
     set "work_dir=%~dp0build\node"
-    set "config=%~dp0node_config.json"
+    set "config=%~dp0config\node.json"
     goto end
 ) else if "%choice%"=="2" (
-    echo Building GE Project (Vitis 2024.1)...
+    echo Building GE Project ^(Vitis 2024.1^)
     set "platform_ver=2024.1"
     set "work_dir=%~dp0build\ge"
-    set "config=%~dp0ge_config.json"
+    set "config=%~dp0config\ge.json"
     goto end
 ) else (
     echo Invalid choice. Please enter 1 or 2.
     goto menu
 )
-
 :end
-echo Start Building....
+
+echo Start Building
 echo Platform version: %platform_ver%
 echo Build directory: %work_dir%
 echo Configuration file: %config%
-pause
 
 REM Change working dir to the dir where this script is located
 cd /d "%~dp0"
 
-REM Set up enviroment
+REM Set up environment
-call "%tools_dir%\setenv.bat" "%pltform_ver%"
+call "%tools_dir%\setenv.bat" "%platform_ver%"
 if "%ERRORLEVEL%" neq "0" (
-    echo Error: Failed to installize enviroment.
+    echo Error: Failed to initialize environment.
     pause >nul
     exit /b 1
 )
@@ -51,8 +50,8 @@ if "%ERRORLEVEL%" neq "0" (
     exit /b 1
 )
 
-REM Lauch SDK
+REM Launch SDK
-call "%tools_dir%\launch.bat" "%pltform_ver%" "%work_dir%"
+call "%tools_dir%\launch.bat" "%platform_ver%" "%work_dir%"
 if "%ERRORLEVEL%" neq "0" (
     echo Error: Failed to launch SDK.
     pause >nul

src/dev_profile/ad9361_1_reg_profile.c

@@ -100,7 +100,7 @@ uint32_t ad9361_1_reg_config(struct ad9361_reg_dev *dev){
 	//************************************************************
 	// Setup the Parallel Port (Digital Data Interface)
 	//************************************************************
-	    status = ad9361_reg_write(dev, 0x0010, 0xC8);	// I/O Config.  Tx Swap IQ; Rx Swap IQ; Tx CH Swap, Rx CH Swap; Rx Frame Mode; 2R2T bit; Invert data bus; Invert DATA_CLK
+	    status = ad9361_reg_write(dev, 0x0010, 0x08);	// I/O Config.  Tx Swap IQ; Rx Swap IQ; Tx CH Swap, Rx CH Swap; Rx Frame Mode; 2R2T bit; Invert data bus; Invert DATA_CLK
 	    status = ad9361_reg_write(dev, 0x0011, 0x00);	// I/O Config.  Alt Word Order; -Rx1; -Rx2; -Tx1; -Tx2; Invert Rx Frame; Delay Rx Data
 	    status = ad9361_reg_write(dev, 0x0012, 0x02);	// I/O Config.  Rx=2*Tx; Swap Ports; SDR; LVDS; Half Duplex; Single Port; Full Port; Swap Bits
 	    status = ad9361_reg_write(dev, 0x0006, 0x00);	// PPORT Rx Delay (adjusts Tco Dataclk->Data)

src/dev_profile/ad9361_2_reg_profile.c

@@ -100,7 +100,7 @@ uint32_t ad9361_2_reg_config(struct ad9361_reg_dev *dev){
 	//************************************************************
 	// Setup the Parallel Port (Digital Data Interface)
 	//************************************************************
-	    status = ad9361_reg_write(dev, 0x0010, 0xC8);	// I/O Config.  Tx Swap IQ; Rx Swap IQ; Tx CH Swap, Rx CH Swap; Rx Frame Mode; 2R2T bit; Invert data bus; Invert DATA_CLK
+	    status = ad9361_reg_write(dev, 0x0010, 0x08);	// I/O Config.  Tx Swap IQ; Rx Swap IQ; Tx CH Swap, Rx CH Swap; Rx Frame Mode; 2R2T bit; Invert data bus; Invert DATA_CLK
 	    status = ad9361_reg_write(dev, 0x0011, 0x00);	// I/O Config.  Alt Word Order; -Rx1; -Rx2; -Tx1; -Tx2; Invert Rx Frame; Delay Rx Data
 	    status = ad9361_reg_write(dev, 0x0012, 0x02);	// I/O Config.  Rx=2*Tx; Swap Ports; SDR; LVDS; Half Duplex; Single Port; Full Port; Swap Bits
 	    status = ad9361_reg_write(dev, 0x0006, 0x00);	// PPORT Rx Delay (adjusts Tco Dataclk->Data)

src/hwconfig.c

@@ -363,10 +363,10 @@ int32_t Hardware_Init(void)
 //	Status = Hardware_SwitchFreq(ad9361_1_reg_inst, TX_FREQ_4125);
 //	XGpioPs_WritePin(&Gpio, AD9361_TX_SWITCH, 0);
 //
-	Status = ad9361_reg_write(ad9361_1_reg_inst, 0x0109, 0x00); // Rx Gain
+	Status = ad9361_reg_write(ad9361_1_reg_inst, 0x0109, 0x14); // Rx Gain
-	Status = ad9361_reg_write(ad9361_1_reg_inst, 0x010C, 0x00); // Rx Gain
+	Status = ad9361_reg_write(ad9361_1_reg_inst, 0x010C, 0x14); // Rx Gain
-	Status = ad9361_reg_write(ad9361_2_reg_inst, 0x0109, 0x00); // Rx Gain
+	Status = ad9361_reg_write(ad9361_2_reg_inst, 0x0109, 0x14); // Rx Gain
-	Status = ad9361_reg_write(ad9361_2_reg_inst, 0x010C, 0x00); // Rx Gain
+	Status = ad9361_reg_write(ad9361_2_reg_inst, 0x010C, 0x14); // Rx Gain
 #endif
 
 #ifdef AD9653

src/main.c

@@ -406,7 +406,8 @@ void AppTimer_IntrHandler(void *context)
 			Phy_UpdateLogging(phyInstPtr);
 		}
 
-		XTmrCtr_ClearStats((XTmrCtr *)xdesc->instance);
+		XTmrCtr_WriteReg(((XTmrCtr *)xdesc->instance)->BaseAddress, 0,
+								 XTC_TCSR_OFFSET, XTC_CSR_INT_OCCURED_MASK);
 	}
 #else
 #error No timer implementation!
@@ -533,8 +534,6 @@ int main(void)
 	DBG_PRINT("Physical started...\n");
 	Phy_Start(phyInstPtr);
 
-	Linklayer_Start(linkInstPtr);
-
 	while (true)
 	{
 		// System bus handler
@@ -548,8 +547,6 @@ int main(void)
 		}
 		if (SystemBus_IsRsqPending(sysbusDescPtr) && (!SystemBus_IsTxBusy(sysbusDescPtr)))
 		{
-			// FIXME: Required by 12 (CASC)
-			udelay(4000);
 			Status = SystemBus_MakeResp(sysbusDescPtr);
 			if (Status != SUCCESS)
 			{

src/systembus/systembus_uart.c

@@ -175,7 +175,7 @@ int SysbusUart_Recv(SYSBUS_UART *instPtr, SYSBUS_UART_FRAME *frame)
 	{
 		return EPARAM;
 	}
-	dWLen = (dLen + FRAME_HEAD_LEN + FRAME_INFO_LEN - 1) / 4 + 1;
+	dWLen = NORMALIZE_SIZE(dLen + FRAME_HEAD_LEN + FRAME_INFO_LEN) / sizeof(uint32_t);
 
 	dBuff = malloc(sizeof(uint32_t) * dWLen);
 	if (dBuff == NULL)