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Initial version.

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Gatsby Van
2023-12-20 00:11:03 +08:00
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datalink814_ge/src/hardware/myk_ad9528init.c
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///*
// * myk_clock_init.c
// *
// */
//
///**
//* \page Disclaimer Legal Disclaimer
//* Copyright 2015-2017 Analog Devices Inc.
//* Released under the AD9371 API license, for more information see the "LICENSE.txt" file in this zip file.
//*
//*/
//
//#ifndef MYK_CLOCK_INIT_C_
//#define MYK_CLOCK_INIT_C_
//#include <stdint.h>
//#include <stdlib.h>
//#include <stddef.h>
//#include "common.h"
//
//#include "ad9528.h"
//#include "t_ad9528.h"
//#include "myk_ad9528init.h"
//#include "parameters.h"
//
//static ad9528pll1Settings_t clockPll1Settings =
//{
// .refA_Frequency_Hz = 30720000,
// .refA_Divider = 1,
// .refA_bufferCtrl = DISABLED,
// .refB_Frequency_Hz = 0,
// .refB_Divider = 1,
// .refB_bufferCtrl = DISABLED,
// .vcxo_Frequency_Hz = 122880000,
// .vcxoBufferCtrl = NEG_SINGLE_ENDED,
// .nDivider = 4,
// .bypassPll1 = 0
//};
//
//static ad9528pll2Settings_t clockPll2Settings =
//{
// .rfDivider = 4,
// .n2Divider = 10,
// .totalNdiv = 30
//};
//
//static ad9528outputSettings_t clockOutputSettings =
//{
// .outPowerDown = 53237, // 0xCFF5
// .outSource = {
// CHANNEL_DIV, CHANNEL_DIV, CHANNEL_DIV, SYSREF,
// CHANNEL_DIV, CHANNEL_DIV, CHANNEL_DIV, CHANNEL_DIV,
// CHANNEL_DIV, CHANNEL_DIV, CHANNEL_DIV, CHANNEL_DIV,
// SYSREF, CHANNEL_DIV},
// .outBufferCtrl = {0,0,0,0,0,0,0,0,0,0,0,0,0,0},
// .outAnalogDelay = {0,0,0,0,0,0,0,0,0,0,0,0,0,0},
// .outDigitalDelay = {0,0,0,0,0,0,0,0,0,0,0,0,0,0},
// .outChannelDiv = {10,10,10,10,10,10,10,10,10,10,10,10,10,10},
// .outFrequency_Hz = {122880000, 122880000, 122880000, 122880000, 122880000, 122880000, 122880000, 122880000, 122880000, 122880000, 122880000, 122880000, 122880000, 122880000}
//};
//
//static ad9528sysrefSettings_t clockSysrefSettings =
//{
// .sysrefRequestMethod = PIN,
// .sysrefSource = INTERNAL,
// .sysrefPinEdgeMode = LEVEL_ACTIVE_HIGH,
// .sysrefPinBufferMode = DISABLED,
// .sysrefPatternMode = NSHOT,
// .sysrefNshotMode = ONE_PULSE,
// .sysrefDivide = 512
//};
//
//static spiSettings_t clockSpiSettings =
//{
// .chipSelectIndex = AD9528_CS, //chip select Index
// .writeBitPolarity = 0, //Write bit polarity
// .longInstructionWord = 1, //16bit instruction word
// .MSBFirst = 1, //MSB first
// .CPHA = 0, //Clock phase
// .CPOL = 0, //Clock polarity
// .enSpiStreaming = 0, //uint8_t enSpiStreaming;
// .autoIncAddrUp = 1, //uint8_t autoIncAddrUp;
// .fourWireMode = 1 //uint8_t fourWireMode;
//};
//
//ad9528Device_t clockAD9528_ =
//{
// &clockSpiSettings,
// &clockPll1Settings,
// &clockPll2Settings,
// &clockOutputSettings,
// &clockSysrefSettings
//};
//
//ad9528Device_t *ad9528Init = &clockAD9528_;
//
//#endif /* MYK_CLOCK_INIT_C_ */
/* AD9528 data structure initialization file */
#include <stdint.h>
#include <stdlib.h>
#include <stddef.h>
#include "common.h"
#include "./mykonos/ad9528.h"
#include "./mykonos/t_ad9528.h"
#include "myk_ad9528init.h"
#include "parameters.h"
static ad9528pll1Settings_t clockPll1Settings = {
.refA_Frequency_Hz = 122880000,
.refA_Divider = 1,
.refA_bufferCtrl = SINGLE_ENDED,
.refB_Frequency_Hz = 0,
.refB_Divider = 1,
.refB_bufferCtrl = DISABLED,
.vcxo_Frequency_Hz = 122880000,
.vcxoBufferCtrl = DIFFERENTIAL,
.nDivider = 1,
.bypassPll1 = 0
};
static ad9528pll2Settings_t clockPll2Settings = {
.rfDivider = 3,
.n2Divider = 10,
.totalNdiv = 30
};
/*******************************************************************
* Output Distribution Settings
* 9369CE02A uses the following clock outputs
* OUT 1: FPGA_REF_CLK
* OUT 2: FPGA_AUX_CLK
* OUT 3: FPGA_SYSREF
* OUT 12: SYSREF_IN
* OUT 13: DEV_CLK_IN
*******************************************************************
*/
static ad9528outputSettings_t clockOutputSettings = {
.outPowerDown = 0x0,
.outSource = {
SYSREF, SYSREF, CHANNEL_DIV, SYSREF,
CHANNEL_DIV, CHANNEL_DIV, SYSREF, SYSREF,
CHANNEL_DIV, CHANNEL_DIV, CHANNEL_DIV, CHANNEL_DIV,
SYSREF , CHANNEL_DIV
},
.outBufferCtrl = {0,0,0,0,0,0,0,0,0,0,0,0,0,0},
.outAnalogDelay = {0,0,0,0,0,0,0,0,0,0,0,0,0,0},
.outDigitalDelay = {0,0,0,0,0,0,0,0,0,0,0,0,0,0},
.outChannelDiv = {10,10,10,10,10,10,10,10,10,10,10,10,10,10},
.outFrequency_Hz = {
122880000, 122880000, 122880000, 122880000,
122880000, 122880000, 122880000, 122880000,
122880000, 122880000, 122880000, 122880000,
122880000, 122880000
}
};
static ad9528sysrefSettings_t clockSysrefSettings = {
.sysrefRequestMethod = SPI,
.sysrefSource = INTERNAL,
.sysrefPinEdgeMode = LEVEL_ACTIVE_HIGH,
.sysrefPinBufferMode = DISABLED,
.sysrefPatternMode = CONTINUOUS,
.sysrefNshotMode = FOUR_PULSES,
.sysrefDivide = 512
};
static spiSettings_t clockSpiSettings = {
.chipSelectIndex = 2, //chip select Index
.writeBitPolarity = 0, //Write bit polarity
.longInstructionWord = 1, //16bit instruction word
.MSBFirst = 1, //MSB first
.CPHA = 0, //Clock phase
.CPOL = 0, //Clock polarity
.enSpiStreaming = 0, //uint8_t enSpiStreaming;
.autoIncAddrUp = 1, //uint8_t autoIncAddrUp;
.fourWireMode = 1 //uint8_t fourWireMode;
};
ad9528Device_t clockAD9528_ = {
&clockSpiSettings,
&clockPll1Settings,
&clockPll2Settings,
&clockOutputSettings,
&clockSysrefSettings
};
ad9528Device_t *ad9528Init = &clockAD9528_;