/*****************************************************************************/ /** * Description: Physical layer control definitions and function prototypes. * * Date: 2021-12-04 16:32 * LastEditTime: 2023-04-24 17:41 * Revisions: Rev 0.1 * History: * [2021-12-08]: Initial version. * [2022-06-18]: New branch for glink control purpose: * -Add poll mode, physical layer will start Tx/Rx procedure * at specific time stamp. * -Add 61/37 beam switch * -Code simplification. * [2023-04-24]: Feature add: * - Read frame type from PL status register. * Copyright(c) 2021 Beijing Institute of Technology. * Lab of Communication and Networking * ******************************************************************************/ #ifndef PHY_CTRL_H_ #define PHY_CTRL_H_ /***************************** Include Files *********************************/ #include #include "phy_ctrlreg.h" #include "../common.h" #include "../time_ctrl/time_ctrl.h" /************************** Constant Definitions *****************************/ #define TMWORD_FRAC_MAX 500000 #define ANTCONFIG_MAX_LEN 8192 #define TXRXDATA_MAX_LEN 2048 #define NUM_ANT_SUBNRRW_PATTERN 37 #define NUM_ANT_NRRW_PATTERN 61 #define INIT_BEAM_NO 0 #define INIT_ANT_WD ANT_BEAM_120 #define INIT_ANT_NO 0 #define L1_FRAME_NONE_HOPS UINT32_MAX #define L1_FRAME_MAX_HOPS 81 #define L1_FRAME_2KBPS_20MS_HOPS 1 #define L1_FRAME_2KBPS_100MS_HOPS 81 #define L1_FRAME_10KBPS_10MS_HOPS 1 #define L1_FRAME_10KBPS_20MS_HOPS 11 #define L1_FRAME_40KBPS_20MS_HOPS 19 #define L1_FRAME_40KBPS_10MS_HOPS 9 #define L1_FRAME_200KBPS_5MS_HOPS 20 #define L1_FRAME_1M2BPS_5MS_HOPS 20 #define L1_FRAME_NONE_LEN UINT32_MAX// byte #define L1_FRAME_LEN_MAX (8192/8) // byte #define L1_FRAME_2KBPS_20MS_LEN 1 // byte #define L1_FRAME_2KBPS_100MS_LEN 312/8 // byte #define L1_FRAME_10KBPS_10MS_LEN 1 // byte #define L1_FRAME_10KBPS_20MS_LEN (232/8) // byte #define L1_FRAME_40KBPS_20MS_LEN (2152/8) // byte #define L1_FRAME_40KBPS_10MS_LEN (712/8) // byte #define L1_FRAME_200KBPS_5MS_LEN (2040/8) // byte #define L1_FRAME_1M2BPS_5MS_LEN (8176/8) // byte #define L1_FRAME_NONE_COMP UINT32_MAX // *10ns(Timer_L) #define L1_FRAME_2KBPS_20MS_COMP 1841158 // *10ns(Timer_L) #define L1_FRAME_2KBPS_100MS_COMP 1841158 // *10ns(Timer_L) #define L1_FRAME_10KBPS_10MS_COMP 847733 // *10ns(Timer_L) #define L1_FRAME_10KBPS_20MS_COMP 847733 // *10ns(Timer_L) #define L1_FRAME_40KBPS_20MS_COMP 110667 // *10ns(Timer_L) #define L1_FRAME_40KBPS_10MS_COMP 110667 // *10ns(Timer_L) #define L1_FRAME_200KBPS_5MS_COMP 19725 // *10ns(Timer_L) #define L1_FRAME_1M2BPS_5MS_COMP 19725 // *10ns(Timer_L) #define PHY_TIME_WORD_H_MAX UINT32_MAX #define PHY_TIME_WORD_L_MAX 0x0007A120 // 5ms/10ns /***************** Macros (Inline Functions) Definitions *********************/ /**************************** Type Definitions *******************************/ typedef enum { L1_NONE_FRAME = 0, L1_2KBPS_20MS_FRAME = 1, L1_2KBPS_100MS_FRAME = 2, L1_10KBPS_10MS_FRAME = 3, L1_10KBPS_20MS_FRAME = 4, L1_40KBPS_20MS_FRAME = 5, L1_40KBPS_10MS_FRAME = 6, L1_200KBPS_5MS_FRAME = 7, L1_1M2BPS_5MS_FRAME = 8 } L1_FRAME_TYPE; typedef struct { /* Antenna control frame head 0xAA */ uint8_t head; /* default 0, reserved for further use */ uint8_t ctrlWord; /* high 4 bits specified beam mode. * low 4 bits specified power control */ uint8_t antMode; /* off-axis angle range is 0~60, * 0.1 degree each LSB */ uint8_t oaxis[2]; /* round-axis angle range is 0~360, * 0.1 degree each LSB */ uint8_t raxis[2]; /* 0~3500Mhz, step 1MHz */ uint8_t antFreq[2]; /* in single tr mode, 0~63 specified tr channel * in single subarray mode, 0~3 specified the subarray * Only in debug mode*/ uint8_t trSlect; /* Antenna attenuation 0~31, 0.5dB each LSB, Only in debug mode */ uint8_t antAtt; /* 0~63, 5.625 degree each LSB, Only in debug mode*/ uint8_t phase; /* 0x00 Nromal RX, 0x01 Normal TX * 0x11~0xA1 beam debug mode (TR duty 1%~10%)*/ uint8_t rxtxMode; /* 0x00 Normal, 0x01 single tr calibration */ uint8_t calibrMode; /* reserved for further use */ uint8_t reserved; /* DD enable */ uint8_t ddEn; /* DD mgc */ uint8_t ddMgc; /* [7:4]RF enable: 0-On, 1-Off(Default); [3:0]Work mode: 0(default) */ uint8_t rfCtrl; /* RF MGC control: 0~31, 1dB each LSB*/ uint8_t rfMgc; /* RF channel 1&2 calibration mgc: [7:4] Channle1 - max 15db, 1dB each LSB * [3:0] Channle2 - max 15db, 1dB each LSB*/ uint8_t rf12CalMgc; /* RF channel 3&4 calibration mgc: [7:4] Channle3 - max 15db, 1dB each LSB * [3:0] Channle4 - max 15db, 1dB each LSB*/ uint8_t rf34CalMgc; /* Receive channel 1 MGC: 0~31, 1dB each LSB */ uint8_t rcv1Mgc; /* Receive channel 2 MGC: 0~31, 1dB each LSB */ uint8_t rcv2Mgc; /* Receive channel 3 MGC: 0~31, 1dB each LSB */ uint8_t rcv3Mgc; /* Receive channel 4 MGC: 0~31, 1dB each LSB */ uint8_t rcv4Mgc; /* Antenna control frame tail 0xCC */ uint8_t tail; uint8_t dummy[6]; } PHY_ANT_CONFIG; typedef struct { /* off-axis angle range is 0~60, * 0.1 degree each LSB */ uint16_t oaxis; /* round-axis angle range is 0~360, * 0.1 degree each LSB */ uint16_t raxis; } PHY_ANT_ANGLE; typedef enum { TIME_WORD_NONE = 0, TIME_WORD_POLL = 1, TIME_WORD_LISTEN_TIMEOUT = 2 } PHY_TIME_WORD_TYPE; typedef enum { ANT_BEAM_NONE = 0, ANT_BEAM_120 = 1, ANT_BEAM_60 = 2, ANT_BEAM_25 = 3, ANT_BEAM_8 = 4 } PHY_ANT_BEAM_WIDTH; typedef enum { PHY_TOR_SUSPEND = 0, PHY_TOR_TX = 1, PHY_TOR_RX = 2 } PHY_TOR_TYPE; typedef enum { PHY_MODE_NONE = 0, PHY_MODE_LISTEN = 1, PHY_MODE_SCHEDULE = 2, PHY_MODE_PULL = 3 } PHY_MODE; typedef struct { uint32_t devId; uint32_t txBramId; uint32_t rxBramId; uint32_t antBramId; uintptr_t baseAddr; } PHY_CONFIG; typedef struct { int32_t last; int32_t curr; int32_t next; } PHY_RCD; typedef struct { PHY_CONFIG phyCofig; // Device address configs uintptr_t recvDataAddr; uintptr_t sendDataAddr; uintptr_t antConfigAddr; bool isPhyEn; // is physical layer running bool isAcq; // is last reception acquisition success bool isFrameSync; // is last reception frame sync success bool isDecode; // is last reception decode success bool isValid; // is last reception frame data valid (crc check pass) bool isPresetHop; // is using preset frequency hop PHY_RCD antNo; // antenna number record PHY_RCD beamNo; // beam number record PHY_RCD beamWd; // beam width record PHY_RCD TOR; // tx rx state record PHY_RCD frameType; // frame type record uint32_t sendDataOffset; // antenna configuration bram offset (to implement ping-pong data flow) uint32_t antConfigOffset; // antenna configuration bram offset (to implement ping-pong data flow) PHY_ANT_CONFIG antCoinfoPtr;// antenna configuration pointer } PHY_INST; /************************** Variable Definitions *****************************/ extern uint16_t hopPattern_Config[L1_FRAME_MAX_HOPS]; extern uint16_t hopPattern_2KBPS_20MS[L1_FRAME_2KBPS_20MS_HOPS]; extern uint16_t hopPattern_2KBPS_100MS[L1_FRAME_2KBPS_100MS_HOPS]; extern uint16_t hopPattern_10KBPS_10MS[L1_FRAME_10KBPS_10MS_HOPS]; extern uint16_t hopPattern_10KBPS_20MS[L1_FRAME_10KBPS_20MS_HOPS]; extern uint16_t hopPattern_40KBPS_10MS[L1_FRAME_40KBPS_10MS_HOPS]; extern uint16_t hopPattern_40KBPS_20MS[L1_FRAME_40KBPS_20MS_HOPS]; extern uint16_t hopPattern_200KBPS_5MS[L1_FRAME_200KBPS_5MS_HOPS]; extern uint16_t hopPattern_1M2BPS_5MS[L1_FRAME_1M2BPS_5MS_HOPS]; extern PHY_ANT_ANGLE antSubnrrwPattern[NUM_ANT_SUBNRRW_PATTERN]; extern PHY_ANT_ANGLE antNrrwPattern[NUM_ANT_NRRW_PATTERN]; /************************** Function Prototypes ******************************/ int32_t Phy_InstInit(PHY_INST** instPtr, PHY_CONFIG *phyConfig); void Phy_Destroy(PHY_INST* instPtr); void Phy_UpdateState(PHY_INST* instPtr); void Phy_Start(PHY_INST* instPtr); void Phy_Halt(PHY_INST* instPtr); int32_t Phy_SetMode(PHY_INST* instPtr, PHY_MODE modeCod); int32_t Phy_SetupNextSlot(PHY_INST* instPtr, PHY_TOR_TYPE txrxMode, L1_FRAME_TYPE frameType, uint8_t* dataBuff); void Phy_PeekRecvData(PHY_INST* instPtr, uint8_t* dataBuff); void Phy_RetrieveRecvData(PHY_INST* instPtr, uint8_t* dataBuff); bool Phy_IsFrameDetected(PHY_INST* instPtr); bool Phy_IsFrameReceived(PHY_INST* instPtr); bool Phy_IsFrameValid(PHY_INST* instPtr); uint32_t Phy_GetFrameLen(L1_FRAME_TYPE frameType); L1_FRAME_TYPE Phy_GetLastRecvFrameType(PHY_INST* instPtr); L1_FRAME_TYPE Phy_GetLastSendFrameType(PHY_INST* instPtr); int32_t Phy_SetHopPattern(void* patternBuff, uint32_t patternLen); uint32_t Phy_GetHopLength(L1_FRAME_TYPE frameType); uint32_t Phy_GetTimeComp(L1_FRAME_TYPE frameType); int32_t Phy_AntCoinfoInit(PHY_ANT_CONFIG* antCoinfoPtr); int32_t Phy_SetBeamWidth(PHY_INST* instPtr, PHY_ANT_BEAM_WIDTH beamWidth); int32_t Phy_SetBeamNo(PHY_INST* instPtr, int32_t beamNo); int32_t Phy_SetBeamAngle(PHY_INST* phyInstPtr, double offAx, double rndAx); int32_t Phy_SetTimeWord(PHY_INST* instPtr, const TIME_WORD* tmWord, PHY_TIME_WORD_TYPE tmType); double Phy_GetCoarseFreqEst(PHY_INST* instPtr); void Phy_GetFrameSyncTimeStamp(PHY_INST* instPtr, TIME_WORD* frameSyncT); void Phy_GetLastSlotStartTimeStamp(PHY_INST* instPtr, TIME_WORD* slotStart); #endif /* PHY_CTRL_H_ */