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feat: 调整节点ttl逻辑, 启用自动重入网; 根据物理层修改时间调整值

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josh
2025-05-27 10:41:44 +08:00
parent 8dedb125ae
commit 65b3bf2f8e
3 changed files with 15 additions and 17 deletions
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src/networking/phy_layer/phy_layer.c
+6 -6
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@@ -42,11 +42,11 @@
#define L1_FRAME_512KBPS_4MS_LEN (2584 / 8) // byte
#define L1_FRAME_2MBPS_4MS_LEN (10224 / 8) // byte
#define L1_FRAME_ADV_24MS_COMP 1841158 // FIXME: need update, *10ns(Timer_L)
#define L1_FRAME_ACK_8MS_COMP 1841158 // FIXME: need update, *10ns(Timer_L)
#define L1_FRAME_128KBPS_4MS_COMP 850950 // FIXME: need update, *10ns(Timer_L)
#define L1_FRAME_512KBPS_4MS_COMP 850950 // FIXME: need update, *10ns(Timer_L)
#define L1_FRAME_2MBPS_4MS_COMP 111485 // FIXME: need update, *10ns(Timer_L)
#define L1_FRAME_ADV_24MS_COMP 1399800 // *10ns(Timer_L)
#define L1_FRAME_ACK_8MS_COMP 598408 // *10ns(Timer_L)
#define L1_FRAME_128KBPS_4MS_COMP 9950 // *10ns(Timer_L)
#define L1_FRAME_512KBPS_4MS_COMP 9950 // *10ns(Timer_L)
#define L1_FRAME_2MBPS_4MS_COMP 9950 // *10ns(Timer_L)
#define L1_ANTCONFIG_MAX_LEN 8192
#define L1_TXRXDATA_MAX_LEN 16384
@@ -747,7 +747,7 @@ int32_t Phy_SetupNextSlot(PHY_INST *instPtr, PHY_TOR_TYPE txrxMode,
}
// Set frame configs
PhyWrite(instPtr, PHY_MODE_CTRL, phyModeCtrl);
PhyWrite(instPtr, PHY_MODE_CTRL, phyModeCtrl | PHY_MODE_CTRL_CRC_EN);
// TODO: Set antenna stand by, when suspend.
const uint8_t *dataSrcPtr = (uint8_t *)(&(instPtr->antConfig));