add ground emulator code.
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/*****************************************************************************/
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/**
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* Description: Global configurations.
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*
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* Date: 2021-04-28 13:19
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* Last Editors: Fan Hao
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* Last Edit Time: [2022-05-23 20:32]
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*
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* Revisions: Rev 0.0
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* History:
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* [2021-04-28]: Initial edition.
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*
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* Copyright(c) 2021 Beijing Institute of Technology.
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* Lab of Communication and Networking
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*
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******************************************************************************/
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#ifndef CONFIG_H_
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#define CONFIG_H_
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#define XILINX_PLATFORM
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#include "xparameters.h"
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/******** Software Version ********/
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#define _APP_VER 0x00010008
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#define _APP_VER_MAIN ((_APP_VER & 0xFF000000) >> 24)
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#define _APP_VER_MINOR ((_APP_VER & 0x00FF0000) >> 16)
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#define _APP_VER_PATCH (_APP_VER & 0x0000FFFF)
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/*********** Debug Info Level ************/
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#define _DEBUG_LEVEL 1
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// 3 - print all debug info
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// 2 - print warnings and errors
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// 1 - print only errors
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// other - print nothing
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//#define DATALINK_ENABLE_AUTORECONNECT
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#define DATALINK_ENABLE_AUTOTIMESYNC
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//#define DATALINK_ENABLE_BERTEST
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/************ Hardware Configs ************/
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#define CPU_CLK_HZ XPAR_CPU_CORTEXA9_0_CPU_CLK_FREQ_HZ
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#define GLOBAL_TIMER_CLK_HZ (CPU_CLK_HZ/2)
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#define SCU_TIMER_CLK_HZ (CPU_CLK_HZ/2)
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#define FCLK_CLK0_HZ 100000000
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/********* Zynq Platform Configs **********/
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// SCU Timer (for logging)
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#define SCUTIMER_DEVICE_ID XPAR_PS7_SCUTIMER_0_DEVICE_ID
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#define SCUTIMER_INTR_ID XPAR_SCUTIMER_INTR
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// Physical Layer Configs
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#define PHY_DEVICE_ID 0
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#define PHY_BASEADDR XPAR_PHYC_BASEADDR
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#define PHY_BEAM_SET_PRESET
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#define PHY_BEAM_FORMING_ENABLE
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// -- Antenna Bram Configs
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#define PHY_ANTCONFIG_BRAM_DEVICE_ID XPAR_PHY_DATA_INTERFACE_ANT_INFO_BRAM_CTRL_DEVICE_ID
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// -- Buffers
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#define PHY_TXBUFF_BRAM_DEVICE_ID XPAR_PHY_DATA_INTERFACE_TX_FRAME_BRAM_CTRL_DEVICE_ID
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#define PHY_RXBUFF_BRAM_DEVICE_ID XPAR_PHY_DATA_INTERFACE_RX_FRAME_BRAM_CTRL_DEVICE_ID
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// -- Xadc
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#define PHY_HW_XADC_DEVICE_ID XPAR_PS7_XADC_0_DEVICE_ID
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// -- Interrupt id
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#define PHY_INTR_ID XPAR_FABRIC_PHY_IRQ_INTR
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#define PERIODIC_5MS_INTR_ID XPAR_FABRIC_PHY_5MS_DELAY_2MS_INTR
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// System Bus Configs
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//#define SYSBUS_BASE_ADDR XPAR_SYSTEMBUS_BASEADDR
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//#define SYSBUS_TX_INTR_ID XPAR_FABRIC_SYSTEMBUS_TX_DONE_INTR
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//#define SYSBUS_RX_INTR_ID XPAR_FABRIC_SYSTEMBUS_RX_DONE_INTR
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// Global Timer config
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#define GLOBAL_TIMER_DEVICE_ID XPAR_GLOBAL_TMR_DEVICE_ID
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#define GLOBAL_TIMER_BASEADDR XPAR_GLOBAL_TMR_BASEADDR
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#define GLOBAL_TIMER_INTR_ID XPAR_GLOBAL_TMR_INTR
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// INTC configis
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#define INTC_DEVICE_ID XPAR_SCUGIC_0_DEVICE_ID
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// Configuration Check
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#if defined(PHY_BEAM_SET_PRESET) && !defined(PHY_BEAM_FORMING_ENABLE)
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#define PHY_BEAM_FORMING_ENABLE
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#warning To impliment beam scan must enable beam forming...
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#endif
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#if defined(DATALINK_ENABLE_BERTEST)
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#if !defined(DATALINK_ENABLE_AUTOTIMESYNC)
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#warning To enbale bit error rate test, auto time-sync should be enabled...
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#endif
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#if defined(DATALINK_ENABLE_AUTORECONNECT)
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#error Do not support auto reconnnect in bit error rate test mode...
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#endif
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#endif
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#endif
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@@ -0,0 +1,110 @@
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/******************************************************************************
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*
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* Copyright (C) 2010 - 2015 Xilinx, Inc. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* Use of the Software is limited solely to applications:
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* (a) running on a Xilinx device, or
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* (b) that interact with a Xilinx device through a bus or interconnect.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
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* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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* Except as contained in this notice, the name of the Xilinx shall not be used
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* in advertising or otherwise to promote the sale, use or other dealings in
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* this Software without prior written authorization from Xilinx.
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*
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******************************************************************************/
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#include "xparameters.h"
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#include "xil_cache.h"
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#include "platform_config.h"
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/*
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* Uncomment one of the following two lines, depending on the target,
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* if ps7/psu init source files are added in the source directory for
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* compiling example outside of SDK.
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*/
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/*#include "ps7_init.h"*/
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/*#include "psu_init.h"*/
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#ifdef STDOUT_IS_16550
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#include "xuartns550_l.h"
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#define UART_BAUD 9600
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#endif
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void
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enable_caches()
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{
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#ifdef __PPC__
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Xil_ICacheEnableRegion(CACHEABLE_REGION_MASK);
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Xil_DCacheEnableRegion(CACHEABLE_REGION_MASK);
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#elif __MICROBLAZE__
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#ifdef XPAR_MICROBLAZE_USE_ICACHE
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Xil_ICacheEnable();
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#endif
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#ifdef XPAR_MICROBLAZE_USE_DCACHE
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Xil_DCacheEnable();
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#endif
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#endif
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}
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void
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disable_caches()
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{
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#ifdef __MICROBLAZE__
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#ifdef XPAR_MICROBLAZE_USE_DCACHE
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Xil_DCacheDisable();
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#endif
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#ifdef XPAR_MICROBLAZE_USE_ICACHE
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Xil_ICacheDisable();
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#endif
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#endif
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}
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void
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init_uart()
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{
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#ifdef STDOUT_IS_16550
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XUartNs550_SetBaud(STDOUT_BASEADDR, XPAR_XUARTNS550_CLOCK_HZ, UART_BAUD);
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XUartNs550_SetLineControlReg(STDOUT_BASEADDR, XUN_LCR_8_DATA_BITS);
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#endif
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/* Bootrom/BSP configures PS7/PSU UART to 115200 bps */
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}
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void
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init_platform()
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{
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/*
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* If you want to run this example outside of SDK,
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* uncomment one of the following two lines and also #include "ps7_init.h"
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* or #include "ps7_init.h" at the top, depending on the target.
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* Make sure that the ps7/psu_init.c and ps7/psu_init.h files are included
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* along with this example source files for compilation.
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*/
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/* ps7_init();*/
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/* psu_init();*/
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enable_caches();
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init_uart();
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}
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void
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cleanup_platform()
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{
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disable_caches();
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}
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@@ -0,0 +1,41 @@
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/******************************************************************************
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*
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* Copyright (C) 2008 - 2014 Xilinx, Inc. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* Use of the Software is limited solely to applications:
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* (a) running on a Xilinx device, or
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* (b) that interact with a Xilinx device through a bus or interconnect.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
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* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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||||
* Except as contained in this notice, the name of the Xilinx shall not be used
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* in advertising or otherwise to promote the sale, use or other dealings in
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* this Software without prior written authorization from Xilinx.
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*
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******************************************************************************/
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#ifndef __PLATFORM_H_
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#define __PLATFORM_H_
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#include "platform_config.h"
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void init_platform();
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void cleanup_platform();
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#endif
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@@ -0,0 +1,7 @@
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#ifndef __PLATFORM_CONFIG_H_
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#define __PLATFORM_CONFIG_H_
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#define STDOUT_IS_PS7_UART
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#define UART_DEVICE_ID 0
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#endif
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