fix: 接收帧类型改为通过数据读取
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+34
-52
@@ -36,7 +36,7 @@
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#define _APP_VER_PATCH (_APP_VER & 0x0000FFFF)
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/*********** Debug Info Level ************/
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// #define _DEBUG_LEVEL 1
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// #define _DEBUG_LEVEL 1
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// 3 - print all debug info
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// 2 - print warnings and errors
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// 1 - print only errors
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@@ -127,7 +127,7 @@
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#define AD9361_GPIO_OUTPUT 1
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#define AD9361_GPIO_DISABLE 0
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#define AD9361_GPIO_ENABLE 1
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// -- AD9361-1 SPI Engine Configuration
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// -- AD9361 SPI Engine Configuration
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#define AD9361_SPI_DEVICE_ID 0
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#define AD9361_SPI_ENGINE_REF_CLK FCLK_CLK0_HZ
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#define AD9361_SPI_ENGINE_MAX_SPEED 5000000
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@@ -137,58 +137,40 @@
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#define AD9361_TIMEOUT_TH 2000
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#define AD9361_1_SPI_CS 0x01
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#define AD9361_2_SPI_CS 0x02
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#define AD9361_2_TIMEOUT_TH 2000
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// -- AD9361-1 GPIO
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#define AD9361_1_TXNRX (AD9361_GPIO_OFFSET + 6)
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#define AD9361_1_ENABLE (AD9361_GPIO_OFFSET + 7)
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#define AD9361_1_EN_AGC (AD9361_GPIO_OFFSET + 8)
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#define AD9361_1_RESET_B (AD9361_GPIO_OFFSET + 9)
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#define AD9361_1_CTRL_OUT0 (AD9361_GPIO_OFFSET + 10)
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#define AD9361_1_CTRL_OUT1 (AD9361_GPIO_OFFSET + 11)
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#define AD9361_1_CTRL_OUT2 (AD9361_GPIO_OFFSET + 12)
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#define AD9361_1_CTRL_OUT3 (AD9361_GPIO_OFFSET + 13)
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#define AD9361_1_CTRL_OUT4 (AD9361_GPIO_OFFSET + 14)
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#define AD9361_1_CTRL_OUT5 (AD9361_GPIO_OFFSET + 15)
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#define AD9361_1_CTRL_OUT6 (AD9361_GPIO_OFFSET + 16)
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#define AD9361_1_CTRL_OUT7 (AD9361_GPIO_OFFSET + 17)
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#define AD9361_1_CTRL_IN0 (AD9361_GPIO_OFFSET + 18)
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#define AD9361_1_CTRL_IN1 (AD9361_GPIO_OFFSET + 19)
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#define AD9361_1_CTRL_IN2 (AD9361_GPIO_OFFSET + 20)
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#define AD9361_1_CTRL_IN3 (AD9361_GPIO_OFFSET + 21)
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#define AD9361_1_TXNRX (AD9361_GPIO_OFFSET + 4)
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#define AD9361_1_ENABLE (AD9361_GPIO_OFFSET + 5)
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#define AD9361_1_EN_AGC (AD9361_GPIO_OFFSET + 6)
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#define AD9361_1_RESET_B (AD9361_GPIO_OFFSET + 7)
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#define AD9361_1_CTRL_OUT0 (AD9361_GPIO_OFFSET + 8)
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#define AD9361_1_CTRL_OUT1 (AD9361_GPIO_OFFSET + 9)
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#define AD9361_1_CTRL_OUT2 (AD9361_GPIO_OFFSET + 10)
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#define AD9361_1_CTRL_OUT3 (AD9361_GPIO_OFFSET + 11)
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#define AD9361_1_CTRL_OUT4 (AD9361_GPIO_OFFSET + 12)
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#define AD9361_1_CTRL_OUT5 (AD9361_GPIO_OFFSET + 13)
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#define AD9361_1_CTRL_OUT6 (AD9361_GPIO_OFFSET + 14)
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#define AD9361_1_CTRL_OUT7 (AD9361_GPIO_OFFSET + 15)
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#define AD9361_1_CTRL_IN0 (AD9361_GPIO_OFFSET + 16)
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#define AD9361_1_CTRL_IN1 (AD9361_GPIO_OFFSET + 17)
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#define AD9361_1_CTRL_IN2 (AD9361_GPIO_OFFSET + 18)
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#define AD9361_1_CTRL_IN3 (AD9361_GPIO_OFFSET + 19)
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// -- AD9361-2 GPIO
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#define AD9361_2_TXNRX (AD9361_GPIO_OFFSET + 22)
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#define AD9361_2_ENABLE (AD9361_GPIO_OFFSET + 23)
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#define AD9361_2_EN_AGC (AD9361_GPIO_OFFSET + 24)
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#define AD9361_2_RESET_B (AD9361_GPIO_OFFSET + 25)
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#define AD9361_2_CTRL_OUT0 (AD9361_GPIO_OFFSET + 26)
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#define AD9361_2_CTRL_OUT1 (AD9361_GPIO_OFFSET + 27)
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#define AD9361_2_CTRL_OUT2 (AD9361_GPIO_OFFSET + 28)
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#define AD9361_2_CTRL_OUT3 (AD9361_GPIO_OFFSET + 29)
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#define AD9361_2_CTRL_OUT4 (AD9361_GPIO_OFFSET + 30)
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#define AD9361_2_CTRL_OUT5 (AD9361_GPIO_OFFSET + 31)
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#define AD9361_2_CTRL_OUT6 (AD9361_GPIO_OFFSET + 32)
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#define AD9361_2_CTRL_OUT7 (AD9361_GPIO_OFFSET + 33)
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#define AD9361_2_CTRL_IN0 (AD9361_GPIO_OFFSET + 34)
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#define AD9361_2_CTRL_IN1 (AD9361_GPIO_OFFSET + 35)
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#define AD9361_2_CTRL_IN2 (AD9361_GPIO_OFFSET + 36)
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#define AD9361_2_CTRL_IN3 (AD9361_GPIO_OFFSET + 37)
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// AD9361-Status Code
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#define AD9361_SYNC (AD9361_GPIO_OFFSET + 38)
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#define AD9361_RX_FIFO_RST (AD9361_GPIO_OFFSET + 39)
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#define AD9361_1_CAL_START (AD9361_GPIO_OFFSET + 40)
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#define AD9361_2_CAL_START (AD9361_GPIO_OFFSET + 41)
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#define AD9361_RECAL (AD9361_GPIO_OFFSET + 42)
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#define AD9361_TX_SWITCH (AD9361_GPIO_OFFSET + 43)
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#define AD9361_1_CAL_DONE (AD9361_GPIO_OFFSET + 44)
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#define AD9361_2_CAL_DONE (AD9361_GPIO_OFFSET + 45)
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#define AD9361_CAL_RESULT (AD9361_GPIO_OFFSET + 46)
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typedef enum
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{
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TX_FREQ_125,
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TX_FREQ_126,
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TX_FREQ_4125
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} ad9361TxFreq;
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#define AD9361_2_TXNRX (AD9361_GPIO_OFFSET + 20)
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#define AD9361_2_ENABLE (AD9361_GPIO_OFFSET + 21)
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#define AD9361_2_EN_AGC (AD9361_GPIO_OFFSET + 22)
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#define AD9361_2_RESET_B (AD9361_GPIO_OFFSET + 23)
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#define AD9361_2_CTRL_OUT0 (AD9361_GPIO_OFFSET + 24)
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#define AD9361_2_CTRL_OUT1 (AD9361_GPIO_OFFSET + 25)
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#define AD9361_2_CTRL_OUT2 (AD9361_GPIO_OFFSET + 26)
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#define AD9361_2_CTRL_OUT3 (AD9361_GPIO_OFFSET + 27)
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#define AD9361_2_CTRL_OUT4 (AD9361_GPIO_OFFSET + 28)
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#define AD9361_2_CTRL_OUT5 (AD9361_GPIO_OFFSET + 29)
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#define AD9361_2_CTRL_OUT6 (AD9361_GPIO_OFFSET + 30)
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#define AD9361_2_CTRL_OUT7 (AD9361_GPIO_OFFSET + 31)
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#define AD9361_2_CTRL_IN0 (AD9361_GPIO_OFFSET + 32)
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#define AD9361_2_CTRL_IN1 (AD9361_GPIO_OFFSET + 33)
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#define AD9361_2_CTRL_IN2 (AD9361_GPIO_OFFSET + 34)
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#define AD9361_2_CTRL_IN3 (AD9361_GPIO_OFFSET + 35)
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// HMC7044 Configurations
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#define HMC7044_GPIO_DEVICE_ID 0
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