135 lines
4.0 KiB
C
135 lines
4.0 KiB
C
#include "dev_profile.h"
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#include "../config/app_config.h"
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#include "../drivers/platform/xilinx_gpio.h"
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#include "../drivers/axi_core/spi_engine/spi_engine.h"
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#include "../drivers/frequency/ad9528/ad9528.h"
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static struct spi_engine_init_param spi_engine_param = {
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.ref_clk_hz = AD9528_SPI_ENGINE_REF_CLK,
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.type = SPI_ENGINE,
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.spi_engine_baseaddr = AD9528_SPI_ENGINE_BASEADDR,
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.cs_delay = AD9528_SPI_ENGINE_CS_DELAY,
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.data_width = AD9528_SPI_ENGINE_DATA_WIDTH
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};
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static struct xil_gpio_init_param xil_gpio_param = {
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.type = GPIO_PS,
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.device_id = AD9528_GPIO_DEVICE_ID
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};
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static struct spi_init_param ad9528_spi_init = {
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.device_id = AD9528_SPI_DEVICE_ID,
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.max_speed_hz = AD9528_SPI_ENGINE_MAX_SPEED,
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.mode = SPI_MODE_0,
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.chip_select = AD9528_SPI_CS,
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.platform_ops = &spi_eng_platform_ops,
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.extra = &spi_engine_param
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};
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static struct gpio_init_param ad9528_gpio_resetb_init = {
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.number = AD9528_RESETB,
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.platform_ops = &xil_gpio_ops,
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.extra = &xil_gpio_param
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};
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static struct gpio_init_param ad9528_gpio_sysref_req_init = {
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.number = AD9528_SYSREF_REQ,
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.platform_ops = &xil_gpio_ops,
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.extra = &xil_gpio_param
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};
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static ad9528pll1Settings_t clockPll1Settings = {
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.refA_Frequency_Hz = 50000000,
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.refA_Divider = 1,
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.refA_bufferCtrl = SINGLE_ENDED,
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.refB_Frequency_Hz = 0,
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.refB_Divider = 1,
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.refB_bufferCtrl = DISABLED,
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.vcxo_Frequency_Hz = 50000000,
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.vcxoBufferCtrl = SINGLE_ENDED,
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.nDivider = 1
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};
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static ad9528pll2Settings_t clockPll2Settings = {
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.rfDivider = 4,
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.n2Divider = 20,
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.totalNdiv = 80
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};
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/*******************************************************************
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* Output Distribution Settings
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* 9369CE02A uses the following clock outputs
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* OUT 1: FPGA REFCLK
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* OUT 3: FPGA SYSREF
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* OUT 12: DUT SYSREF
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* OUT 13: DUT REFCLK
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*******************************************************************
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*/
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static ad9528outputSettings_t clockOutputSettings = {
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.outPowerDown = 0xE001,
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.outSource = {
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AD9528_CHANNEL_DIV, AD9528_CHANNEL_DIV, AD9528_CHANNEL_DIV, AD9528_CHANNEL_DIV, AD9528_CHANNEL_DIV,
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AD9528_CHANNEL_DIV, AD9528_CHANNEL_DIV, AD9528_CHANNEL_DIV, AD9528_CHANNEL_DIV, AD9528_CHANNEL_DIV,
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AD9528_CHANNEL_DIV, AD9528_CHANNEL_DIV, AD9528_CHANNEL_DIV, AD9528_CHANNEL_DIV
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},
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.outBufferCtrl = {
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0,0,0,0,0,
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0,0,0,0,0,
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0,0,0,0
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},
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.outAnalogDelay = {
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0,0,0,0,0,
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0,0,0,0,0,
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0,0,0,0
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},
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.outDigitalDelay = {
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0,0,0,0,0,
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0,0,0,0,0,
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0,0,0,0
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},
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.outChannelDiv = {
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5,25,25,5,5,
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5,5,8,5,5,
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5,5,10,5
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},
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.outFrequency_Hz = {
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200e6, 40e6, 40e6, 200e6, 200e6,
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200e6, 200e6, 125e6, 200e6, 200e6,
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200e6, 200e6, 100e6, 200e6
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}
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};
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static ad9528sysrefSettings_t clockSysrefSettings = {
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.sysrefRequestMethod = PIN,
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.sysrefSource = INTERNAL,
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.sysrefPinEdgeMode = LEVEL_ACTIVE_HIGH,
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.sysrefPinBufferMode = DISABLED,
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.sysrefPatternMode = CONTINUOUS,
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.sysrefNshotMode = FOUR_PULSES,
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.sysrefDivide = 256
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};
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static ad9528spiSettings_t clockSpiSettings = {
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.chipSelectIndex = AD9528_SPI_CS, //chip select Index, not used
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.writeBitPolarity = 0, //Write bit polarity
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.longInstructionWord = 1, //16bit instruction word
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.MSBFirst = 1, //MSB first
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.CPHA = 0, //Clock phase
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.CPOL = 0, //Clock polarity
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.enSpiStreaming = 0, //uint8_t enSpiStreaming;
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.autoIncAddrUp = 1, //uint8_t autoIncAddrUp;
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.fourWireMode = 1 //uint8_t fourWireMode;
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};
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ad9528Init_t ad9528_default_init_param = {
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/* SPI */
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.spi_init = &ad9528_spi_init,
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.gpio_init_resetb = &ad9528_gpio_resetb_init,
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.gpio_init_sysref_req = &ad9528_gpio_sysref_req_init,
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.spiSettings = &clockSpiSettings,
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.pll1Settings = &clockPll1Settings,
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.pll2Settings = &clockPll2Settings,
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.outputSettings = &clockOutputSettings,
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.sysrefSettings = &clockSysrefSettings
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};
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