forked from gatsby/datalink_repo
Initial version.
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Gatsby Van
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/*****************************************************************************/
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/**
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* Description: Implementations of chip to chip data bridge.
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*
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* Author: Fan Hao
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* Date: 2022-09-02 15:01
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* LastEditors: Fan Hao
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* LastEditTime: 2022-09-02 15:49
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* Revisions: Rev 0.0
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* History:
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* [2022-09-02]: Initial version
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*
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* Note:
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* Branch from Analog Devices version (by DBogdan [email protected]).
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*
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* Copyright(c) 2022 Beijing Institute of Technology.
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* Lab of Communication and Networking
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*
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******************************************************************************/
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/***************************** Include Files **********************************/
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#include <stdlib.h>
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#include <string.h>
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#include <stdint.h>
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#include <stdbool.h>
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#include "c2c_bridge.h"
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#include "xgpio.h"
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#include "../axi_dma/axi_dma.h"
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#include "../util/util.h"
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#include "../error.h"
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#include "../common.h"
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/************************** Constant Definitions *****************************/
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// C2C Configs
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#define C2C_GPIO_OUT_CH 1
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#define C2C_SEND_TRIGGER BIT(0)
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#define C2C_RECV_TRIGGER BIT(1)
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/************************** Variable Definitions *****************************/
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C2C_DESC* c2cInstPtr = NULL;
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/************************** Function Prototypes ******************************/
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inline bool C2c_IsSendBusy(C2C_DESC* instPtr){
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ASSERT(instPtr != NULL);
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return (instPtr->txDone == false);
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}
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inline bool C2c_IsRecvBusy(C2C_DESC* instPtr){
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ASSERT(instPtr != NULL);
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return (instPtr->rxDone == false);
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}
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/*****************************************************************************/
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/**
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* @brief Initialize c2c bridge descriptor instance.
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*
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* @param instPtr second rank pointer to c2c instance.
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* @param configPtr pointer to c2c instance configuration struct.
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*
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* @return NONE
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*
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******************************************************************************/
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int32_t C2c_Init(C2C_DESC** instPtr, C2C_CONFIG* configPtr){
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ASSERT(configPtr != NULL);
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int32_t Status;
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(*instPtr) = (C2C_DESC*)malloc(sizeof(C2C_DESC));
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if((*instPtr) == NULL){
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return EALLOC;
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}
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memcpy(&(*instPtr)->c2cCofig, configPtr, sizeof(C2C_CONFIG));
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Status = Dma_Init(&((*instPtr)->axiDmaInst), &(*instPtr)->c2cCofig.dmaConfig);
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if(Status != SUCCESS){
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DBG_ERROR("C2C axi DMA init failed, with error code: %d.\r\n", Status);
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return Status;
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}
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(*instPtr)->isInit = true;
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(*instPtr)->txDone = true;
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(*instPtr)->rxDone = true;
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(*instPtr)->lastRxBuff = (uintptr_t)NULL;
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(*instPtr)->lastRxBuffSize = 0;
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return SUCCESS;
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}
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int32_t C2c_IrqEnable(C2C_DESC* instPtr){
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if(instPtr==NULL || instPtr->isInit == false){
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return FAILURE;
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}
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/* Enable all interrupts */
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return Dma_IrqEnable(instPtr->axiDmaInst);
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}
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/*****************************************************************************/
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/**
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* @brief Send data through c2c bridge.
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*
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* @param instPtr second rank pointer to c2c instance.
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* @param buff data buffer stores the data needs to be sent
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* @param dLen data length needs to be sent
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*
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* @return NONE
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*
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******************************************************************************/
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int32_t C2c_SendData(C2C_DESC* instPtr, uint8_t* buff, uint32_t dLen){
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ASSERT(instPtr != NULL);
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ASSERT(buff != NULL);
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if(instPtr->isInit == false){
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return EDINVAL;
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}
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if(dLen > instPtr->c2cCofig.capacity){
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return EPARAM;
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}
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IO_Out32((uintptr_t)(buff + C2C_HEAD_OFFSET), C2C_HEADER);
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IO_Out32((uintptr_t)(buff + C2C_DLEN_OFFSET), dLen + C2C_HEADER_LEN);
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instPtr->txDone = false;
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instPtr->lastTxBuff = (uintptr_t)buff;
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instPtr->lastTxBuffSize = dLen;
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if (SUCCESS == Dma_SendData(instPtr->axiDmaInst, buff, dLen + C2C_HEADER_LEN)){
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return SUCCESS;
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}
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else{
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return FAILURE;
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}
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return SUCCESS;
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}
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int32_t C2c_BlockingSendData(C2C_DESC* instPtr, uint8_t* buff, uint32_t dLen) {
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ASSERT(instPtr != NULL);
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ASSERT(buff != NULL);
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if(instPtr->isInit == false){
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return EDINVAL;
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}
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if(dLen > instPtr->c2cCofig.capacity){
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return EPARAM;
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}
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IO_Out32((uintptr_t)(buff + C2C_HEAD_OFFSET), C2C_HEADER);
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IO_Out32((uintptr_t)(buff + C2C_DLEN_OFFSET), dLen + C2C_HEADER_LEN);
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instPtr->txDone = false;
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instPtr->lastTxBuff = (uintptr_t)buff;
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instPtr->lastTxBuffSize = dLen;
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if (SUCCESS == Dma_BlockingSendData(instPtr->axiDmaInst, buff, dLen + C2C_HEADER_LEN)){
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return SUCCESS;
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}
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else{
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return FAILURE;
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}
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}
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/*****************************************************************************/
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/**
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* @brief Receive data from c2c bridge.
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*
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* @param instPtr second rank pointer to c2c instance.
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* @param buff data buffer stores the received data.
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* @param dLen data length that received
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*
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* @return NONE
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*
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******************************************************************************/
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int32_t C2c_RecvData(C2C_DESC* instPtr, uint8_t* buff, uint32_t buffSize){
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ASSERT(instPtr != NULL);
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ASSERT(buff != NULL);
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if(instPtr->isInit == false){
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return EDINVAL;
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}
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instPtr->rxDone = false;
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instPtr->lastRxBuff = (uintptr_t)buff;
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instPtr->lastRxBuffSize = buffSize;
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if (SUCCESS == Dma_RecvData(instPtr->axiDmaInst, buff, buffSize)){
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return SUCCESS;
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}
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else{
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return FAILURE;
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}
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}
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int32_t C2c_SendIrqHandler(C2C_DESC* instPtr){
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ASSERT(instPtr != NULL);
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if(instPtr->isInit == false){
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return EDINVAL;
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}
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instPtr->txDone = true;
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if (SUCCESS == Dma_SendIrqHandler(instPtr->axiDmaInst)){
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return SUCCESS;
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}
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else{
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return EUNEXP;
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}
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}
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int32_t C2c_RecvIrqHandler(C2C_DESC* instPtr){
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ASSERT(instPtr != NULL);
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if(instPtr->isInit == false){
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return EDINVAL;
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}
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instPtr->rxDone = true;
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if (SUCCESS == Dma_RecvIrqHandler(instPtr->axiDmaInst)){
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return SUCCESS;
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}
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else{
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return EUNEXP;
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}
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if(IO_In32(instPtr->lastRxBuff + C2C_HEAD_OFFSET) != C2C_HEADER){
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return EIGNORE;
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}
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if(IO_In32(instPtr->lastRxBuff + C2C_DLEN_OFFSET) > instPtr->lastRxBuffSize){
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return EIGNORE;
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}
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return SUCCESS;
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}
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@@ -0,0 +1,62 @@
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/*****************************************************************************/
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/**
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* Description: Chip to chip data bridge.
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*
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* Author: Fan Hao
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* Date: 2022-09-02 15:01
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* LastEditors: Fan Hao
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* LastEditTime: 2022-09-02 15:49
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* Revisions: Rev 0.0
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* History:
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* [2022-09-02]: Initial version
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* [2023-02-23]: DMA version
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*
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* Note:
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* Branch from Analog Devices version (by DBogdan [email protected]).
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*
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* Copyright(c) 2022 Beijing Institute of Technology.
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* Lab of Communication and Networking
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*
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******************************************************************************/
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#include <stdint.h>
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#include <stdbool.h>
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#include "../axi_dma/axi_dma.h"
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/************************** Constant Definitions *****************************/
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#define C2C_HEADER_LEN 8 //bytes
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#define C2C_HEADER 0x7E7E7E7E
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#define C2C_HEAD_OFFSET 0
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#define C2C_DLEN_OFFSET 4
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#define C2C_PLOAD_OFFSET 8
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#define C2C_BUFF_MAX 1024
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/**************************** Type Definitions *******************************/
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typedef struct {
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uint32_t capacity;
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DMA_CONFIG dmaConfig;
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} C2C_CONFIG;
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typedef struct {
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C2C_CONFIG c2cCofig;
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DMA_DESC* axiDmaInst;
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bool isInit;
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bool txDone;
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bool rxDone;
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uintptr_t lastTxBuff;
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uint32_t lastTxBuffSize;
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uintptr_t lastRxBuff;
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uint32_t lastRxBuffSize;
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} C2C_DESC;
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/************************** Variable Definitions *****************************/
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extern C2C_DESC* c2cInstPtr;
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/************************** Function Prototypes ******************************/
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int32_t C2c_Init(C2C_DESC** instPtr, C2C_CONFIG* configPtr);
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int32_t C2c_IrqEnable(C2C_DESC* instPtr);
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int32_t C2c_SendData(C2C_DESC* instPtr, uint8_t* buff, uint32_t dLen);
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int32_t C2c_RecvData(C2C_DESC* instPtr, uint8_t* buff, uint32_t buffSize);
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int32_t C2c_BlockingSendData(C2C_DESC* instPtr, uint8_t* buff, uint32_t dLen);
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bool C2c_IsSendBusy(C2C_DESC* instPtr);
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bool C2c_IsRecvBusy(C2C_DESC* instPtr);
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int32_t C2c_SendIrqHandler(C2C_DESC* instPtr);
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int32_t C2c_RecvIrqHandler(C2C_DESC* instPtr);
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