/*****************************************************************************/ /** * Description: Inter-Communication protocol, definitions and function * prototypes. * * Date: 2022-06-18 16:37 * LastEditTime: 2023-04-24 17:38 * Revisions: Rev 0.2 * History: * [2022-06-18]: Initial version. * [2023-04-24]: Bug fix: * - Read frame type from PL status register. * * Copyright(c) 2022 Beijing Institute of Technology. * Lab of Communication and Networking * ******************************************************************************/ #ifndef INTER_COMM_H_ #define INTER_COMM_H_ /***************************** Include Files *********************************/ #include #include "../phy_ctrl/phy_ctrl.h" #include "xsysmon.h" #include "../config/app_config.h" /************************** Constant Definitions *****************************/ #define COMMON_CRC_LEN 2 #define INTER_MSG_LEN 512 //Byte #define INTER_MSG_CRC_LEN 2 #define INTER_MSG_LEN_NONE UINT32_MAX #define TYPE_CODE_OFFSET 0x0000 // self test request #define INTER_MSG_ST_REQ_LEN 0x00006 #define INTER_MSG_ST_REQ_CODE 0x0011 #define ST_CMD_OFFSET 0x0002 #define ST_CMD_LEN 0x0002 #define ST_CMD 0x1111 // self test response #define INTER_MSG_ST_RSP_LEN 0x0008 #define INTER_MSG_ST_RSP_CODE 0x0021 #define ST_RSP_STATE_OFFSET 0x0002 #define ST_RSP_STATE_LEN 0x0002 #define ST_RSP_STATE_OK 0xAAAA #define ST_RSP_STATE_ERR 0x5555 #define ST_RSP_MASK1_OFFSET 0x0004 #define ST_RSP_MASK1_LEN 0x0002 #define ST_RSP_MASK2_OFFSET 0x0006 #define ST_RSP_MASK2_LEN 0x0002 // wake up requirement/response #define INTER_MSG_WAKE_REQ_LEN 0x0006 #define INTER_MSG_WAKE_REQ_CODE 0x0012 #define INTER_MSG_WAKE_RSP_LEN 0x0006 #define INTER_MSG_WAKE_RSP_CODE 0x0022 #define WAKE_CMD_OFFSET 0x0002 #define WAKE_CMD_LEN 0x0002 #define WAKE_CMD_LPW_LPW 0xFFAA #define WAKE_CMD_UP_LPW 0xAAAA #define WAKE_CMD_UP_UP 0xFFCC #define WAKE_CMD_LPW_UP 0xCCCC // mode swicth command #define INTER_MSG_MODESW_LEN 0x0016 // 20byte + crc #define INTER_MSG_MODESW_CODE 0x0041 #define MODESW_START_TIME_OFFSET 0x0002 #define MODESW_START_TIME_LEN 0x0008 #define MODESW_TIMEOUT_OFFSET 0x000A #define MODESW_TIMEOUT_LEN 0x0008 #define MODESW_MODE_OFFSET 0x0012 #define MODESW_MODE_LEN 0x0002 #define MODESW_MODE_NORMAL 0x0001 #define MODESW_MODE_NETSET 0x0002 // physical layer control #define INTER_MSG_CTRL_LEN 0x00BC // 186byte + 2byte crc #define INTER_MSG_CTRL_CODE 0x0013 #define CTRL_TIME_OFFSET 0x0002 #define CTRL_TIME_LEN 0x0008 #define CTRL_FRAME_TYPE_OFFSET 0x000A #define CTRL_FRAME_TYPE_LEN 0x0001 #define CTRL_FRAME_10K10MS 0x01 #define CTRL_FRAME_10K20MS 0x02 #define CTRL_FRAME_200K5MS 0x03 #define CTRL_FRAME_1M25MS 0x04 #define CTRL_FRAME_2K20MS 0x05 #define CTRL_FRAME_2K100MS 0x06 #define CTRL_FRAME_40K10MS 0x07 #define CTRL_FRAME_40K20MS 0x08 #define INTER_MSG_CTRL_ANT_OFFSET 0x000B #define INTER_MSG_CTRL_ANT_LEN 0x0001 #define CTRL_ANT_ALL 0x3F #define CTRL_ANT_FRONT 0x01 #define CTRL_ANT_3QUAD2 0x02 #define CTRL_ANT_3QUAD4 0x04 #define CTRL_ANT_BOTT 0x08 #define CTRL_ANT_RSV1 0x10 #define CTRL_ANT_RSV2 0x20 #define INTER_MSG_CTRL_TOR_OFFSET 0x000C #define INTER_MSG_CTRL_TOR_LEN 0x0001 #define CTRL_TOR_TX 0xAA #define CTRL_TOR_RX 0xCC #define INTER_MSG_CTRL_SW_OFFSET 0x000D #define INTER_MSG_CTRL_SW_LEN 0x0001 #define CTRL_SW_PW BIT(0) #define CTRL_SW_TR BIT(1) #define CTRL_SW_TOR BIT(2) #define INTER_MSG_CTRL_HOP_MODE_OFFSET 0x000E #define INTER_MSG_CTRL_HOP_MODE_LEN 0x0002 #define CTRL_HOP_PRESET 0x2222 #define CTRL_HOP_CONFIG 0x5555 #define INTER_MSG_CTRL_HOP_PATTERN_OFFSET 0x0010 #define INTER_MSG_CTRL_HOP_PATTERN_LEN 0x00A2 #define INTER_MSG_CTRL_BEAM_MODE_OFFSET 0x00B2 #define INTER_MSG_CTRL_BEAM_MODE_LEN 0x0001 #define BEAM_MODE_WIDE 0x51 #define BEAM_MODE_NRW 0x52 #define BEAM_MODE_SUBNRW 0x53 #define INTER_MSG_CTRL_BEAM_NO_OFFSET 0x00B3 #define INTER_MSG_CTRL_BEAM_NO_LEN 0x0001 #define INTER_MSG_CTRL_AMP_WT_OFFSET 0x00B4 #define INTER_MSG_CTRL_AMP_WT_LEN 0x0002 #define INTER_MSG_CTRL_OFFAX_OFFSET 0x00B6 #define INTER_MSG_CTRL_OFFAX_LEN 0x0002 #define INTER_MSG_CTRL_RNDAX_OFFSET 0x00B8 #define INTER_MSG_CTRL_RNDAX_LEN 0x0002 // data segment write #define MSG_DSEGWR_SUBPKG_MAX 3 #define INTER_MSG_DSEGWR_LEN 0x0200 //510 byte + 2byte crc #define INTER_MSG_DSEGWR_CODE 0x0014 #define DSEGWR_TYPE_OFFSET 0x0002 #define DSEGWR_TYPE_LEN 0x0002 #define DSEGWR_TYPE_PKN 0x0010 #define DSEGWR_TYPE_PK1 0x0012 #define DSEGWR_TYPE_PK2 0x0013 #define DSEGWR_TYPE_PK3 0x0014 #define DSEGWR_TIME_OFFSET 0x0004 #define DSEGWR_TIME_LEN 0x0008 #define DSEGWR_PDLEN_OFFSET 0x000C #define DSEGWR_PDLEN_LEN 0x0002 #define DSEGWR_PD_OFFSET 0x000E #define DSEGWR_PD_LEN 0x01F0 // data segment read #define MSG_DSEGRD_SUBPKG_MAX 3 #define INTER_MSG_DSEGRD_LEN 0x0200 //510 byte + 2byte crc #define INTER_MSG_DSEGRD_CODE 0x0023 #define DSEGRD_TYPE_OFFSET 0x0002 #define DSEGRD_TYPE_LEN 0x0001 #define DSEGRD_TYPE_PKN 0x0010 #define DSEGRD_TYPE_PK1 0x0012 #define DSEGRD_TYPE_PK2 0x0013 #define DSEGRD_TYPE_PK3 0x0014 #define DSEGRD_TIME_OFFSET 0x0004 #define DSEGRD_TIME_LEN 0x0008 #define DSEGRD_DPL_OFFSET 0x000C #define DSEGRD_DPL_LEN 0x0008 #define DSEGRD_PDLEN_OFFSET 0x0016 #define DSEGRD_PDLEN_LEN 0x0002 #define DSEGRD_IACQ_OFFSET 0x0014 #define DSEGRD_IACQ_LEN 0x0001 #define DSEGRD_IACQ_BEAM_OFFSET 0x0015 #define DSEGRD_IACQ_BEAM_LEN 0x0001 #define DSEGRD_PD_OFFSET 0x0018 #define DSEGRD_PD_LEN 0x01E6 // Remote state test. #define INTER_MSG_RT_LEN 0x0022 // 32 bytes + 2byte crc #define INTER_MSG_RT_CODE 0x0031 // remote test. #define RT_PHY_OFFSET 0x0002 #define RT_PHY_LEN 0x0002 #define RT_TIME_OFFSET 0x0004 #define RT_TIME_LEN 0x0008 #define RT_BEAM_OFFSET 0x000C #define RT_BEAM_LEN 0x0004 #define RT_SP_VOLT_OFFSET 0x0010 #define RT_SP_VOLT_LEN 0x0002 #define RT_SP_TEMP_OFFSET 0x0012 #define RT_SP_TEMP_LEN 0x0002 #define RT_SP_CHIP_OFFSET 0x0014 #define RT_SP_CHIP_LEN 0x0002 #define RT_ANT_VOLT_OFFSET 0x0016 #define RT_ANT_VOLT_LEN 0x0002 #define RT_ANT_TEMP_OFFSET 0x0018 #define RT_ANT_TEMP_LEN 0x0002 #define RT_ANT_LOCK_OFFSET 0x001A #define RT_ANT_LOCK_LEN 0x0001 #define RT_ANT_MGC_OFFSET 0x001C #define RT_ANT_MGC_LEN 0x0002 #define RT_ANT_STATE_OFFSET 0x001E #define RT_ANT_STATE_LEN 0x0001 #ifdef ANT_DEVICE_ID #if ANT_DEVICE_ID == 0x0000 #define INTER_MSG_DSEGRD_PKN_ADDR 0x0001 #define INTER_MSG_DSEGRD_PK1_ADDR 0x0001 #define INTER_MSG_DSEGRD_PK2_ADDR 0x0002 #define INTER_MSG_DSEGRD_PK3_ADDR 0x0003 #define INTER_MSG_RT_ADDR 0x0004 #define INTER_MSG_OTHER_ADDR 0x0005 #elif ANT_DEVICE_ID == 0x0001 #define INTER_MSG_DSEGRD_PKN_ADDR 0x0006 #define INTER_MSG_DSEGRD_PK1_ADDR 0x0006 #define INTER_MSG_DSEGRD_PK2_ADDR 0x0007 #define INTER_MSG_DSEGRD_PK3_ADDR 0x0008 #define INTER_MSG_RT_ADDR 0x0009 #define INTER_MSG_OTHER_ADDR 0x000A #elif ANT_DEVICE_ID == 0x0002 #define INTER_MSG_DSEGRD_PKN_ADDR 0x000B #define INTER_MSG_DSEGRD_PK1_ADDR 0x000B #define INTER_MSG_DSEGRD_PK2_ADDR 0x000C #define INTER_MSG_DSEGRD_PK3_ADDR 0x000D #define INTER_MSG_RT_ADDR 0x000E #define INTER_MSG_OTHER_ADDR 0x000F #elif ANT_DEVICE_ID == 0x0003 #define INTER_MSG_DSEGRD_PKN_ADDR 0x0010 #define INTER_MSG_DSEGRD_PK1_ADDR 0x0010 #define INTER_MSG_DSEGRD_PK2_ADDR 0x0011 #define INTER_MSG_DSEGRD_PK3_ADDR 0x0012 #define INTER_MSG_RT_ADDR 0x0013 #define INTER_MSG_OTHER_ADDR 0x0014 #elif ANT_DEVICE_ID == 0x0004 #define INTER_MSG_DSEGRD_PKN_ADDR 0x0015 #define INTER_MSG_DSEGRD_PK1_ADDR 0x0015 #define INTER_MSG_DSEGRD_PK2_ADDR 0x0016 #define INTER_MSG_DSEGRD_PK3_ADDR 0x0017 #define INTER_MSG_RT_ADDR 0x0018 #define INTER_MSG_OTHER_ADDR 0x0019 #elif ANT_DEVICE_ID == 0x0005 #define INTER_MSG_DSEGRD_PKN_ADDR 0x001A #define INTER_MSG_DSEGRD_PK1_ADDR 0x001A #define INTER_MSG_DSEGRD_PK2_ADDR 0x001B #define INTER_MSG_DSEGRD_PK3_ADDR 0x001C #define INTER_MSG_RT_ADDR 0x001D #define INTER_MSG_OTHER_ADDR 0x001E #elif ANT_DEVICE_ID == 0x0006 #else #error Cannot Eval Antenna ID... #endif #else #error Antenna ID must be specified... #endif /***************** Macros (Inline Functions) Definitions *********************/ /**************************** Type Definitions *******************************/ typedef struct{ PHY_INST* phyInstPtr; int32_t (*data_send) (void* buffPtr, int32_t dataLen, uint16_t subAddr); int32_t (*data_recv) (void* buffPtr, int32_t dataLen); }INTER_COMM_CONFIG; // FIXME: only support ONE physical device now. typedef struct{ uint8_t* recvBuff; uint8_t* sendBuff; bool isSleep; uint32_t rxRemain; uint32_t txRemain; uint64_t lastCtrlTimeTag; uint64_t lastDataTimeTag; uint64_t lastPhyTimeTag; PHY_INST* phyInstPtr; uint8_t* phyRecvBuff; uint8_t* phySendBuff; int32_t (*data_send) (void* buffPtr, int32_t dataLen, uint16_t subAddr); int32_t (*data_recv) (void* buffPtr, int32_t buffSize); }INTER_COMM_INST; typedef struct { uint16_t glinkSubAddr; uint8_t extra[14]; } C2C_EXTRA; /************************** Variable Definitions *****************************/ /************************** Function Prototypes ******************************/ int32_t InterComm_Init(INTER_COMM_INST** instPtr, INTER_COMM_CONFIG* configPtr); void InterComm_Destroy(INTER_COMM_INST* instPtr); int32_t InterComm_RecvMsg(INTER_COMM_INST* instPtr); int32_t InterComm_SendMsg(INTER_COMM_INST* instPtr, int32_t dataLen, uint16_t subAddr); int32_t InterComm_MsgHandler(INTER_COMM_INST* instPtr); int32_t InterComm_SendRemotCheck(INTER_COMM_INST* instPtr, XSysMon* SysMonInstPtr, C2C_EXTRA* c2cExtraBuffPtr); int32_t InterComm_PhyDataUpload(INTER_COMM_INST* instPtr); // Helper functions int AppendCrc(uint8_t* buffPtr, uint32_t dataLen); bool CrcCheck(uint8_t* buffPtr, uint32_t dataLen); #endif