`timescale 1ns / 1ps
//////////////////////////////////////////////////////////////////////////////////
// Company: 
// Engineer: 
// 
// Create Date: 2024/01/18 14:57:46
// Design Name: 
// Module Name: CCSDS_LDPC_ENC_R12
// Project Name: 
// Target Devices: 
// Tool Versions: 
// Description: 
// 
// Dependencies: 
// 
// Revision:
// Revision 0.01 - File Created
// Additional Comments:
// 
//////////////////////////////////////////////////////////////////////////////////


module CCSDS_LDPC_ENC_R12(
	input clk,
	input rst,
	
	input Encoder_SyncIn,
	input Encoder_Nd,
	input Encoder_Din,
	
	output reg Encode_Dout 		= 1'd0,
	output reg Encode_Sync_Dout = 1'd0,
	output reg Encode_Rdy 		= 1'd0
);
	reg Encoder_Din_d01 = 1'd0; reg Encoder_Din_d02 = 1'd0; reg Encoder_Din_d03 = 1'd0; reg Encoder_Din_d04 = 1'd0; reg Encoder_Din_d05 = 1'd0; 
	reg Encoder_Din_d06 = 1'd0; reg Encoder_Din_d07 = 1'd0; reg Encoder_Din_d08 = 1'd0; reg Encoder_Din_d09 = 1'd0; reg Encoder_Din_d10 = 1'd0; 
	reg Encoder_Din_d11 = 1'd0; reg Encoder_Din_d12 = 1'd0; reg Encoder_Din_d13 = 1'd0; reg Encoder_Din_d14 = 1'd0; reg Encoder_Din_d15 = 1'd0; 
	reg Encoder_Din_d16 = 1'd0; reg Encoder_Din_d17 = 1'd0; reg Encoder_Din_d18 = 1'd0; reg Encoder_Din_d19 = 1'd0; reg Encoder_Din_d20 = 1'd0;
	always@(posedge clk)begin
		if(rst)begin
			 Encoder_Din_d01 <= 1'd0;  Encoder_Din_d02 <= 1'd0;  Encoder_Din_d03 <= 1'd0;  Encoder_Din_d04 <= 1'd0;  Encoder_Din_d05 <= 1'd0; 
			 Encoder_Din_d06 <= 1'd0;  Encoder_Din_d07 <= 1'd0;  Encoder_Din_d08 <= 1'd0;  Encoder_Din_d09 <= 1'd0;  Encoder_Din_d10 <= 1'd0; 
			 Encoder_Din_d11 <= 1'd0;  Encoder_Din_d12 <= 1'd0;  Encoder_Din_d13 <= 1'd0;  Encoder_Din_d14 <= 1'd0;  Encoder_Din_d15 <= 1'd0; 
			 Encoder_Din_d16 <= 1'd0;  Encoder_Din_d17 <= 1'd0;  Encoder_Din_d18 <= 1'd0;  Encoder_Din_d19 <= 1'd0;  Encoder_Din_d20 <= 1'd0;  
		end
		else begin
			Encoder_Din_d01 <= Encoder_Din;
			Encoder_Din_d02 <= Encoder_Din_d01; Encoder_Din_d03 <= Encoder_Din_d02; Encoder_Din_d04 <= Encoder_Din_d03; Encoder_Din_d05 <= Encoder_Din_d04; 
			Encoder_Din_d06 <= Encoder_Din_d05; Encoder_Din_d07 <= Encoder_Din_d06; Encoder_Din_d08 <= Encoder_Din_d07; Encoder_Din_d09 <= Encoder_Din_d08; 
			Encoder_Din_d10 <= Encoder_Din_d09; Encoder_Din_d11 <= Encoder_Din_d10; Encoder_Din_d12 <= Encoder_Din_d11; Encoder_Din_d13 <= Encoder_Din_d12; 
			Encoder_Din_d14 <= Encoder_Din_d13; Encoder_Din_d15 <= Encoder_Din_d14; Encoder_Din_d16 <= Encoder_Din_d15; Encoder_Din_d17 <= Encoder_Din_d16;
			Encoder_Din_d18 <= Encoder_Din_d17; Encoder_Din_d19 <= Encoder_Din_d18; Encoder_Din_d20 <= Encoder_Din_d19;	 		
		end
	end
	
	reg [10:0] cnt_din     	   = 11'd0; //输入1024个时钟
	reg [10:0] cnt_din_d1  	   = 11'd0;
	reg [10:0] cnt_din_d2  	   = 11'd0;
	reg 	   Encoder_Nd_d1   = 1'd0;
	reg 	   Encoder_Nd_d2   = 1'd0;
	always@(posedge clk)begin
		if(rst)begin
			cnt_din   [10:0]     <= 11'd0;
			cnt_din_d1[10:0]     <= 11'd0;
			cnt_din_d2[10:0]     <= 11'd0;
			Encoder_Nd_d1		 <= 1'd0;
		end
		else begin
			cnt_din_d1[10:0] <= cnt_din[10:0];
			cnt_din_d2[10:0] <= cnt_din_d1[10:0];
			Encoder_Nd_d1	 <= Encoder_Nd;
			if(Encoder_SyncIn)begin
				cnt_din[10:0] <= 11'd1;
			end
			else begin
				if(Encoder_Nd)
					cnt_din[10:0] <= (cnt_din[10:0] == 11'd1024) ? 11'd0 : cnt_din[10:0] + 11'd1;
				else
					cnt_din[10:0] <= cnt_din[10:0];
			end
		end
	end
	
	reg [4:0]  G_row_rd_clk_num = 5'd0; //完整读取G矩阵的一行需要时钟数
	reg [10:0] check_clk_num = 11'd0;
	reg Out_Info_bit = 1'd0;
	always@(posedge clk)begin
		if(rst)begin
			G_row_rd_clk_num[4:0] <= 5'd0;
			check_clk_num[10:0]   <= 11'd0;
			Out_Info_bit		  <= 1'd0;
		end
		else begin
			G_row_rd_clk_num[4:0] <= 5'd16;
			check_clk_num[10:0]   <= 11'd1024;
			Out_Info_bit		  <= Encoder_Din_d20;
		end
	end
	
	//G矩阵读取
	reg [6:0] G_matrix_addr = 7'd0;
	always@(posedge clk)begin
		if(rst)begin
			G_matrix_addr[6:0] <= 7'd0;
		end
		else begin
			if(Encoder_SyncIn)begin
				G_matrix_addr[6:0] <= 7'd0;
			end
			else begin
				if(Encoder_Nd)begin
					if(cnt_din[6:0] >= 7'd1 && cnt_din[6:0] <= {2'd0,G_row_rd_clk_num[4:0]})
						G_matrix_addr[6:0] <= (G_matrix_addr[6:0] == 7'd127) ? 7'd0 : G_matrix_addr[6:0] + 7'd1;
					else
						G_matrix_addr[6:0] <= G_matrix_addr[6:0];
				end
				else
					G_matrix_addr[6:0] <= G_matrix_addr[6:0];
			end
		end
	end
	
	wire [63:0] G_matrix_rom_out;
	G_MATRIX_ROM_R12 G_MATRIX_ROM_R12 (
		.clka(clk),    
		.addra(G_matrix_addr[6:0]),  
		.douta(G_matrix_rom_out)  
	);
	reg G_matrix_valid = 1'd0;
	always@(posedge clk)begin
		if(rst)
			G_matrix_valid <= 1'd0;
		else begin
			if(Encoder_Nd_d1)begin
				G_matrix_valid <= (cnt_din_d1[6:0] >= 7'd1 && cnt_din_d1[6:0] <= {2'd0,G_row_rd_clk_num[4:0]}) ? 1'd1 : 1'd0;
			end
			else
				G_matrix_valid <= 1'd0;
		end
	end
	
	
	reg [63:0] G_matrix_d01 = 64'd0;  
	reg [63:0] G_matrix_d02 = 64'd0;  
	reg [63:0] G_matrix_d03 = 64'd0;  
	reg [63:0] G_matrix_d04 = 64'd0;  
	reg [63:0] G_matrix_d05 = 64'd0;  
	reg [63:0] G_matrix_d06 = 64'd0;  
	reg [63:0] G_matrix_d07 = 64'd0;  
	reg [63:0] G_matrix_d08 = 64'd0;  
	reg [63:0] G_matrix_d09 = 64'd0;  
	reg [63:0] G_matrix_d10 = 64'd0;  
	reg [63:0] G_matrix_d11 = 64'd0;  
	reg [63:0] G_matrix_d12 = 64'd0; 
	reg [63:0] G_matrix_d13 = 64'd0;  
	reg [63:0] G_matrix_d14 = 64'd0;  
	reg [63:0] G_matrix_d15 = 64'd0;  
	reg [63:0] G_matrix_d16 = 64'd0; 
	always@(posedge clk)begin
		if(rst)begin
			G_matrix_d01[63:0] <= 64'd0;  
			G_matrix_d02[63:0] <= 64'd0;  
			G_matrix_d03[63:0] <= 64'd0;  
			G_matrix_d04[63:0] <= 64'd0;  
			G_matrix_d05[63:0] <= 64'd0;  
			G_matrix_d06[63:0] <= 64'd0;  
			G_matrix_d07[63:0] <= 64'd0;  
			G_matrix_d08[63:0] <= 64'd0;  
			G_matrix_d09[63:0] <= 64'd0;  
			G_matrix_d10[63:0] <= 64'd0;  
			G_matrix_d11[63:0] <= 64'd0;  
			G_matrix_d12[63:0] <= 64'd0; 
			G_matrix_d13[63:0] <= 64'd0;  
			G_matrix_d14[63:0] <= 64'd0;  
			G_matrix_d15[63:0] <= 64'd0;  
			G_matrix_d16[63:0] <= 64'd0;
		end
		else begin
			if(G_matrix_valid)begin
				G_matrix_d01[63:0] <= G_matrix_rom_out[63:0];  
				G_matrix_d02[63:0] <= G_matrix_d01[63:0]  ; 
				G_matrix_d03[63:0] <= G_matrix_d02[63:0]  ; 
				G_matrix_d04[63:0] <= G_matrix_d03[63:0]  ; 
				G_matrix_d05[63:0] <= G_matrix_d04[63:0]  ; 
				G_matrix_d06[63:0] <= G_matrix_d05[63:0]  ; 
				G_matrix_d07[63:0] <= G_matrix_d06[63:0]  ; 
				G_matrix_d08[63:0] <= G_matrix_d07[63:0]  ; 
				G_matrix_d09[63:0] <= G_matrix_d08[63:0]  ; 
				G_matrix_d10[63:0] <= G_matrix_d09[63:0]  ; 
				G_matrix_d11[63:0] <= G_matrix_d10[63:0]  ; 
				G_matrix_d12[63:0] <= G_matrix_d11[63:0]  ; 
				G_matrix_d13[63:0] <= G_matrix_d12[63:0]  ; 
				G_matrix_d14[63:0] <= G_matrix_d13[63:0]  ; 
				G_matrix_d15[63:0] <= G_matrix_d14[63:0]  ; 
				G_matrix_d16[63:0] <= G_matrix_d15[63:0]  ; 
			end
			else begin
				G_matrix_d01[63:0] <= G_matrix_d01[63:0];  
				G_matrix_d02[63:0] <= G_matrix_d02[63:0];  
				G_matrix_d03[63:0] <= G_matrix_d03[63:0];  
				G_matrix_d04[63:0] <= G_matrix_d04[63:0];  
				G_matrix_d05[63:0] <= G_matrix_d05[63:0];  
				G_matrix_d06[63:0] <= G_matrix_d06[63:0];  
				G_matrix_d07[63:0] <= G_matrix_d07[63:0];  
				G_matrix_d08[63:0] <= G_matrix_d08[63:0];  
				G_matrix_d09[63:0] <= G_matrix_d09[63:0];  
				G_matrix_d10[63:0] <= G_matrix_d10[63:0];  
				G_matrix_d11[63:0] <= G_matrix_d11[63:0];  
				G_matrix_d12[63:0] <= G_matrix_d12[63:0]; 
				G_matrix_d13[63:0] <= G_matrix_d13[63:0];  
				G_matrix_d14[63:0] <= G_matrix_d14[63:0];  
				G_matrix_d15[63:0] <= G_matrix_d15[63:0];  
				G_matrix_d16[63:0] <= G_matrix_d16[63:0];
			end
		end
	end
	
	//矩阵一行有效
	reg G_matrix_row_valid = 1'd0;
	always@(posedge clk)begin
		if(rst)
			G_matrix_row_valid <= 1'd0;
		else begin
			G_matrix_row_valid <= (cnt_din_d2[6:0] == {2'd0,G_row_rd_clk_num[4:0]} && cnt_din_d2[10:0] > 11'd0) ? 1'd1 : 1'd0;
		end
	end
	//矩阵一行有效的同时计数,1/2与2/3分别计数128 64个时钟以指示编码有效
	reg [9:0] cnt_encode_valid = 10'd0;
	always@(posedge clk)begin
		if(rst)
			cnt_encode_valid[9:0] <= 10'd0;
		else begin
			if(cnt_din_d2[6:0] == {2'd0,G_row_rd_clk_num[4:0]} && cnt_din_d2[10:0] > 11'd0)
				cnt_encode_valid[9:0] <= 10'd1;
			else if(cnt_encode_valid[9:0] >= 10'd1)
				cnt_encode_valid[9:0] <= (cnt_encode_valid[9:0] == 10'd128) ? 10'd0 : cnt_encode_valid[9:0] + 10'd1;
			else
				cnt_encode_valid[9:0] <= cnt_encode_valid[9:0];
		end
	end
	//编码有效
	reg encode_valid = 1'd0;		 
	always@(posedge clk)begin
		if(rst)
			encode_valid <= 1'd0;
		else begin
			if(cnt_encode_valid[9:0] != 10'd0)
				encode_valid <= 1'd1;
			else
				encode_valid <= 1'd0;
		end
	end
	
	reg [63:0] G_matrix_d01_tem = 64'd0; 
	reg [63:0] G_matrix_d02_tem = 64'd0; 
	reg [63:0] G_matrix_d03_tem = 64'd0; 
	reg [63:0] G_matrix_d04_tem = 64'd0; 
	reg [63:0] G_matrix_d05_tem = 64'd0; 
	reg [63:0] G_matrix_d06_tem = 64'd0; 
	reg [63:0] G_matrix_d07_tem = 64'd0; 
	reg [63:0] G_matrix_d08_tem = 64'd0; 
	reg [63:0] G_matrix_d09_tem = 64'd0; 
	reg [63:0] G_matrix_d10_tem = 64'd0; 
	reg [63:0] G_matrix_d11_tem = 64'd0; 
	reg [63:0] G_matrix_d12_tem = 64'd0; 
	reg [63:0] G_matrix_d13_tem = 64'd0; 
	reg [63:0] G_matrix_d14_tem = 64'd0; 
	reg [63:0] G_matrix_d15_tem = 64'd0; 
	reg [63:0] G_matrix_d16_tem = 64'd0;
	always@(posedge clk)begin
		if(rst)begin
			G_matrix_d01_tem[63:0] <= 64'd0;  
			G_matrix_d02_tem[63:0] <= 64'd0;  
			G_matrix_d03_tem[63:0] <= 64'd0;  
			G_matrix_d04_tem[63:0] <= 64'd0;  
			G_matrix_d05_tem[63:0] <= 64'd0;  
			G_matrix_d06_tem[63:0] <= 64'd0;  
			G_matrix_d07_tem[63:0] <= 64'd0;  
			G_matrix_d08_tem[63:0] <= 64'd0;  
			G_matrix_d09_tem[63:0] <= 64'd0;  
			G_matrix_d10_tem[63:0] <= 64'd0;  
			G_matrix_d11_tem[63:0] <= 64'd0;  
			G_matrix_d12_tem[63:0] <= 64'd0; 
			G_matrix_d13_tem[63:0] <= 64'd0;  
			G_matrix_d14_tem[63:0] <= 64'd0;  
			G_matrix_d15_tem[63:0] <= 64'd0;  
			G_matrix_d16_tem[63:0] <= 64'd0; 
		end
		else begin
			if(G_matrix_row_valid)begin
				G_matrix_d01_tem[63:0] <= G_matrix_d01[63:0];  
				G_matrix_d02_tem[63:0] <= G_matrix_d02[63:0];  
				G_matrix_d03_tem[63:0] <= G_matrix_d03[63:0];  
				G_matrix_d04_tem[63:0] <= G_matrix_d04[63:0];  
				G_matrix_d05_tem[63:0] <= G_matrix_d05[63:0];  
				G_matrix_d06_tem[63:0] <= G_matrix_d06[63:0];  
				G_matrix_d07_tem[63:0] <= G_matrix_d07[63:0];  
				G_matrix_d08_tem[63:0] <= G_matrix_d08[63:0];  
				G_matrix_d09_tem[63:0] <= G_matrix_d09[63:0];  
				G_matrix_d10_tem[63:0] <= G_matrix_d10[63:0];  
				G_matrix_d11_tem[63:0] <= G_matrix_d11[63:0];  
				G_matrix_d12_tem[63:0] <= G_matrix_d12[63:0]; 
				G_matrix_d13_tem[63:0] <= G_matrix_d13[63:0];  
				G_matrix_d14_tem[63:0] <= G_matrix_d14[63:0];  
				G_matrix_d15_tem[63:0] <= G_matrix_d15[63:0];  
				G_matrix_d16_tem[63:0] <= G_matrix_d16[63:0]; 
			end
			else begin
				G_matrix_d01_tem[63:0] <= {G_matrix_d02_tem[0],G_matrix_d01_tem[63:1]};  
				G_matrix_d02_tem[63:0] <= {G_matrix_d01_tem[0],G_matrix_d02_tem[63:1]};  
				G_matrix_d03_tem[63:0] <= {G_matrix_d04_tem[0],G_matrix_d03_tem[63:1]};  
				G_matrix_d04_tem[63:0] <= {G_matrix_d03_tem[0],G_matrix_d04_tem[63:1]};  
				G_matrix_d05_tem[63:0] <= {G_matrix_d06_tem[0],G_matrix_d05_tem[63:1]};  
				G_matrix_d06_tem[63:0] <= {G_matrix_d05_tem[0],G_matrix_d06_tem[63:1]};  
				G_matrix_d07_tem[63:0] <= {G_matrix_d08_tem[0],G_matrix_d07_tem[63:1]};  
				G_matrix_d08_tem[63:0] <= {G_matrix_d07_tem[0],G_matrix_d08_tem[63:1]};  
				G_matrix_d09_tem[63:0] <= {G_matrix_d10_tem[0],G_matrix_d09_tem[63:1]};  
				G_matrix_d10_tem[63:0] <= {G_matrix_d09_tem[0],G_matrix_d10_tem[63:1]};  
				G_matrix_d11_tem[63:0] <= {G_matrix_d12_tem[0],G_matrix_d11_tem[63:1]};  
				G_matrix_d12_tem[63:0] <= {G_matrix_d11_tem[0],G_matrix_d12_tem[63:1]}; 
				G_matrix_d13_tem[63:0] <= {G_matrix_d14_tem[0],G_matrix_d13_tem[63:1]};  
				G_matrix_d14_tem[63:0] <= {G_matrix_d13_tem[0],G_matrix_d14_tem[63:1]};  
				G_matrix_d15_tem[63:0] <= {G_matrix_d16_tem[0],G_matrix_d15_tem[63:1]};  
				G_matrix_d16_tem[63:0] <= {G_matrix_d15_tem[0],G_matrix_d16_tem[63:1]}; 
			end
		end
	end
	//存储编码结果
	reg [63:0] en_row_01 = 64'd0;  
	reg [63:0] en_row_02 = 64'd0;  
	reg [63:0] en_row_03 = 64'd0;  
	reg [63:0] en_row_04 = 64'd0;  
	reg [63:0] en_row_05 = 64'd0;  
	reg [63:0] en_row_06 = 64'd0;  
	reg [63:0] en_row_07 = 64'd0;  
	reg [63:0] en_row_08 = 64'd0;  
	reg [63:0] en_row_09 = 64'd0;  
	reg [63:0] en_row_10 = 64'd0;  
	reg [63:0] en_row_11 = 64'd0;  
	reg [63:0] en_row_12 = 64'd0; 
	reg [63:0] en_row_13 = 64'd0;  
	reg [63:0] en_row_14 = 64'd0;  
	reg [63:0] en_row_15 = 64'd0;  
	reg [63:0] en_row_16 = 64'd0; 
	always@(posedge clk)begin
		if(rst || Encoder_SyncIn)begin
			en_row_01[63:0] <= 64'd0;  
			en_row_02[63:0] <= 64'd0;  
			en_row_03[63:0] <= 64'd0;  
			en_row_04[63:0] <= 64'd0;  
			en_row_05[63:0] <= 64'd0;  
			en_row_06[63:0] <= 64'd0;  
			en_row_07[63:0] <= 64'd0;  
			en_row_08[63:0] <= 64'd0;  
			en_row_09[63:0] <= 64'd0;  
			en_row_10[63:0] <= 64'd0;  
			en_row_11[63:0] <= 64'd0;  
			en_row_12[63:0] <= 64'd0; 
			en_row_13[63:0] <= 64'd0;  
			en_row_14[63:0] <= 64'd0;  
			en_row_15[63:0] <= 64'd0;  
			en_row_16[63:0] <= 64'd0; 
		end
		else begin
			if(encode_valid)begin
				en_row_01[63:0] <= ({64{Encoder_Din_d19}} & G_matrix_d01_tem[63:0]) ^ en_row_01[63:0];  
				en_row_02[63:0] <= ({64{Encoder_Din_d19}} & G_matrix_d02_tem[63:0]) ^ en_row_02[63:0];  
				en_row_03[63:0] <= ({64{Encoder_Din_d19}} & G_matrix_d03_tem[63:0]) ^ en_row_03[63:0];  
				en_row_04[63:0] <= ({64{Encoder_Din_d19}} & G_matrix_d04_tem[63:0]) ^ en_row_04[63:0];  
				en_row_05[63:0] <= ({64{Encoder_Din_d19}} & G_matrix_d05_tem[63:0]) ^ en_row_05[63:0];  
				en_row_06[63:0] <= ({64{Encoder_Din_d19}} & G_matrix_d06_tem[63:0]) ^ en_row_06[63:0];  
				en_row_07[63:0] <= ({64{Encoder_Din_d19}} & G_matrix_d07_tem[63:0]) ^ en_row_07[63:0];  
				en_row_08[63:0] <= ({64{Encoder_Din_d19}} & G_matrix_d08_tem[63:0]) ^ en_row_08[63:0];  
				en_row_09[63:0] <= ({64{Encoder_Din_d19}} & G_matrix_d09_tem[63:0]) ^ en_row_09[63:0];  
				en_row_10[63:0] <= ({64{Encoder_Din_d19}} & G_matrix_d10_tem[63:0]) ^ en_row_10[63:0];  
				en_row_11[63:0] <= ({64{Encoder_Din_d19}} & G_matrix_d11_tem[63:0]) ^ en_row_11[63:0];  
				en_row_12[63:0] <= ({64{Encoder_Din_d19}} & G_matrix_d12_tem[63:0]) ^ en_row_12[63:0];  
				en_row_13[63:0] <= ({64{Encoder_Din_d19}} & G_matrix_d13_tem[63:0]) ^ en_row_13[63:0];  
				en_row_14[63:0] <= ({64{Encoder_Din_d19}} & G_matrix_d14_tem[63:0]) ^ en_row_14[63:0];  
				en_row_15[63:0] <= ({64{Encoder_Din_d19}} & G_matrix_d15_tem[63:0]) ^ en_row_15[63:0];  
				en_row_16[63:0] <= ({64{Encoder_Din_d19}} & G_matrix_d16_tem[63:0]) ^ en_row_16[63:0];  
			end
			else begin
				en_row_01[63:0] <= en_row_01[63:0];  
				en_row_02[63:0] <= en_row_02[63:0];  
				en_row_03[63:0] <= en_row_03[63:0];  
				en_row_04[63:0] <= en_row_04[63:0];  
				en_row_05[63:0] <= en_row_05[63:0];  
				en_row_06[63:0] <= en_row_06[63:0];  
				en_row_07[63:0] <= en_row_07[63:0];  
				en_row_08[63:0] <= en_row_08[63:0];  
				en_row_09[63:0] <= en_row_09[63:0];  
				en_row_10[63:0] <= en_row_10[63:0];  
				en_row_11[63:0] <= en_row_11[63:0];  
				en_row_12[63:0] <= en_row_12[63:0]; 
				en_row_13[63:0] <= en_row_13[63:0];  
				en_row_14[63:0] <= en_row_14[63:0];  
				en_row_15[63:0] <= en_row_15[63:0];  
				en_row_16[63:0] <= en_row_16[63:0];
			end
		end
	end
	
	
	//将译码结果输出
	wire encode_out;
	wire encode_sync_out;
	wire encode_rdy;
	Out_Process_R12 Out_Process_R12(
		.clk(clk),
		.rst(rst),
		
		.encode_din(Out_Info_bit),	
		.encode_valid(encode_valid),	
		.check_clk_num(check_clk_num[10:0]),
		
		.en_row_01(en_row_01[63:0]),
		.en_row_02(en_row_02[63:0]),
		.en_row_03(en_row_03[63:0]),
		.en_row_04(en_row_04[63:0]),
		.en_row_05(en_row_05[63:0]),
		.en_row_06(en_row_06[63:0]),
		.en_row_07(en_row_07[63:0]),
		.en_row_08(en_row_08[63:0]),
		.en_row_09(en_row_09[63:0]),
		.en_row_10(en_row_10[63:0]),
		.en_row_11(en_row_11[63:0]),
		.en_row_12(en_row_12[63:0]),
		.en_row_13(en_row_13[63:0]),
		.en_row_14(en_row_14[63:0]),
		.en_row_15(en_row_15[63:0]),
		.en_row_16(en_row_16[63:0]),
		
		.encode_out(encode_out),
		.encode_sync_out(encode_sync_out),
		.encode_rdy(encode_rdy)
	);
	
	always@(posedge clk)begin
		if(rst)begin
			Encode_Dout <= 1'd0;
			Encode_Rdy  <= 1'd0;
			Encode_Sync_Dout <= 1'd0;
		end
		else begin
			Encode_Dout <= encode_out;
			Encode_Rdy  <= encode_rdy;
			Encode_Sync_Dout <= encode_sync_out;
		end
	end
endmodule