#include "phy_control.h"


void  PhyRstOn()
{
	u32 v = R32(PHY_REG_CONTROL_ADDR) & PHY_RST_MASK ;
	W32(PHY_REG_CONTROL_ADDR,v);
}

void  PhyRstOff()
{
	u32 v = R32(PHY_REG_CONTROL_ADDR) & PHY_RST_MASK | PHY_RST_OFF;
	W32(PHY_REG_CONTROL_ADDR,v);
}


void  PhyTxTestOn()
{
	PhyRstOn();
	u32 v = R32(PHY_REG_CONTROL_ADDR) & PHY_TX_TEST_FLAG_MASK | (PHY_TX_TEST_ON << CONTROL_REG_TX_TEST_FLAG_OFFSET);
	W32(PHY_REG_CONTROL_ADDR,v);
	PhyRstOff();
}


void  PhyTxTestOff()
{
	PhyRstOn();
	u32 v = R32(PHY_REG_CONTROL_ADDR) & PHY_TX_TEST_FLAG_MASK | (PHY_TX_TEST_OFF << CONTROL_REG_TX_TEST_FLAG_OFFSET);
	W32(PHY_REG_CONTROL_ADDR,v);
	PhyRstOff();
}

void PhyConfigTdma(uint32_t slotLen,uint32_t ticTime)
{
	W32(PHY_REG_TDMA_SLOT_LEN_ADDR,slotLen);
	W32(PHY_REG_TDMA_TIC_2_PS_ADDR,ticTime);
}

void PhyInit()
{
	uint32_t control=0;
	// set phy reset on
	control = (PHY_RST_ON<<CONTROL_REG_PHY_RST_OFFSET) | \
			(PHY_TX_TEST_OFF << CONTROL_REG_TX_TEST_FLAG_OFFSET) | \
			(PHY_TX_REVERSE << CONTROL_REG_TX_IQ_REVERSE_FLAG_OFFSET) | \
			(PHY_RX_REVERSE << CONTROL_REG_RX_IQ_REVERSE_FLAG_OFFSET) | \
			(1 << CONTROL_REG_TDMA_FLAG_IS_MASTER_OFFSET)
			;
	W32(PHY_REG_CONTROL_ADDR,control);
	PhyConfigTdma(SLOT_LEN,TIC_2_PS);
	PhyRstOff();
}
