75 lines
4.7 KiB
Tcl
75 lines
4.7 KiB
Tcl
#
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## Timing Assertions Section
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create_clock -period 20.000 [get_ports ad9361_rx_clk]
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## Physical Constraints Section
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# AD9361 Interface
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# port 0
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set_property -dict {PACKAGE_PIN K17 IOSTANDARD LVCMOS25} [get_ports ad9361_rx_clk]
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set_property -dict {PACKAGE_PIN D18 IOSTANDARD LVCMOS25} [get_ports ad9361_rx_frame]
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set_property -dict {PACKAGE_PIN H18 IOSTANDARD LVCMOS25} [get_ports {ad9361_rx_data[0]}]
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set_property -dict {PACKAGE_PIN J18 IOSTANDARD LVCMOS25} [get_ports {ad9361_rx_data[1]}]
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set_property -dict {PACKAGE_PIN M18 IOSTANDARD LVCMOS25} [get_ports {ad9361_rx_data[2]}]
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set_property -dict {PACKAGE_PIN M17 IOSTANDARD LVCMOS25} [get_ports {ad9361_rx_data[3]}]
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set_property -dict {PACKAGE_PIN L17 IOSTANDARD LVCMOS25} [get_ports {ad9361_rx_data[4]}]
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set_property -dict {PACKAGE_PIN L16 IOSTANDARD LVCMOS25} [get_ports {ad9361_rx_data[5]}]
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set_property -dict {PACKAGE_PIN J14 IOSTANDARD LVCMOS25} [get_ports {ad9361_rx_data[6]}]
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set_property -dict {PACKAGE_PIN K14 IOSTANDARD LVCMOS25} [get_ports {ad9361_rx_data[7]}]
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set_property -dict {PACKAGE_PIN M20 IOSTANDARD LVCMOS25} [get_ports {ad9361_rx_data[8]}]
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set_property -dict {PACKAGE_PIN M19 IOSTANDARD LVCMOS25} [get_ports {ad9361_rx_data[9]}]
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set_property -dict {PACKAGE_PIN G15 IOSTANDARD LVCMOS25} [get_ports {ad9361_rx_data[10]}]
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set_property -dict {PACKAGE_PIN H15 IOSTANDARD LVCMOS25} [get_ports {ad9361_rx_data[11]}]
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# port 1
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set_property -dict {PACKAGE_PIN C20 IOSTANDARD LVCMOS25} [get_ports ad9361_tx_clk]
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set_property -dict {PACKAGE_PIN E17 IOSTANDARD LVCMOS25} [get_ports ad9361_tx_frame]
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set_property -dict {PACKAGE_PIN H20 IOSTANDARD LVCMOS25} [get_ports {ad9361_tx_data[0]}]
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set_property -dict {PACKAGE_PIN J20 IOSTANDARD LVCMOS25} [get_ports {ad9361_tx_data[1]}]
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set_property -dict {PACKAGE_PIN J19 IOSTANDARD LVCMOS25} [get_ports {ad9361_tx_data[2]}]
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set_property -dict {PACKAGE_PIN K19 IOSTANDARD LVCMOS25} [get_ports {ad9361_tx_data[3]}]
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set_property -dict {PACKAGE_PIN G20 IOSTANDARD LVCMOS25} [get_ports {ad9361_tx_data[4]}]
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set_property -dict {PACKAGE_PIN G19 IOSTANDARD LVCMOS25} [get_ports {ad9361_tx_data[5]}]
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set_property -dict {PACKAGE_PIN F20 IOSTANDARD LVCMOS25} [get_ports {ad9361_tx_data[6]}]
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set_property -dict {PACKAGE_PIN F19 IOSTANDARD LVCMOS25} [get_ports {ad9361_tx_data[7]}]
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set_property -dict {PACKAGE_PIN G18 IOSTANDARD LVCMOS25} [get_ports {ad9361_tx_data[8]}]
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set_property -dict {PACKAGE_PIN G17 IOSTANDARD LVCMOS25} [get_ports {ad9361_tx_data[9]}]
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set_property -dict {PACKAGE_PIN L20 IOSTANDARD LVCMOS25} [get_ports {ad9361_tx_data[10]}]
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set_property -dict {PACKAGE_PIN L19 IOSTANDARD LVCMOS25} [get_ports {ad9361_tx_data[11]}]
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set_property -dict {PACKAGE_PIN E18 IOSTANDARD LVCMOS25} [get_ports ad9361_spi_clk]
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set_property -dict {PACKAGE_PIN N16 IOSTANDARD LVCMOS25} [get_ports ad9361_spi_csn]
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set_property -dict {PACKAGE_PIN E19 IOSTANDARD LVCMOS25} [get_ports ad9361_spi_mosi]
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set_property -dict {PACKAGE_PIN F16 IOSTANDARD LVCMOS25} [get_ports ad9361_spi_miso]
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set_property -dict {PACKAGE_PIN G14 IOSTANDARD LVCMOS25} [get_ports ad9361_reset_b]
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set_property -dict {PACKAGE_PIN D20 IOSTANDARD LVCMOS25} [get_ports ad9361_en_agc]
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set_property -dict {PACKAGE_PIN A20 IOSTANDARD LVCMOS25} [get_ports ad9361_enable]
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set_property -dict {PACKAGE_PIN B19 IOSTANDARD LVCMOS25} [get_ports ad9361_txnrx]
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set_property -dict {PACKAGE_PIN M15 IOSTANDARD LVCMOS25} [get_ports {ad9361_ctrl_in[0]}]
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set_property -dict {PACKAGE_PIN M14 IOSTANDARD LVCMOS25} [get_ports {ad9361_ctrl_in[1]}]
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set_property -dict {PACKAGE_PIN K16 IOSTANDARD LVCMOS25} [get_ports {ad9361_ctrl_in[2]}]
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set_property -dict {PACKAGE_PIN J16 IOSTANDARD LVCMOS25} [get_ports {ad9361_ctrl_in[3]}]
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## CONTROL LED & GPIO
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set_property -dict {PACKAGE_PIN U5 IOSTANDARD LVCMOS33} [get_ports led_red]
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set_property -dict {PACKAGE_PIN Y13 IOSTANDARD LVCMOS33} [get_ports led_yellow]
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set_property -dict {PACKAGE_PIN V10 IOSTANDARD LVCMOS33} [get_ports led_blue]
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set_property -dict {PACKAGE_PIN T9 IOSTANDARD LVCMOS33} [get_ports {rf_gpio[0]}]
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set_property -dict {PACKAGE_PIN U10 IOSTANDARD LVCMOS33} [get_ports {rf_gpio[1]}]
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set_property -dict {PACKAGE_PIN Y7 IOSTANDARD LVCMOS33} [get_ports {rf_gpio[2]}]
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set_property -dict {PACKAGE_PIN Y6 IOSTANDARD LVCMOS33} [get_ports {rf_gpio[3]}]
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set_property -dict {PACKAGE_PIN Y9 IOSTANDARD LVCMOS33} [get_ports {rf_gpio[4]}]
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set_property -dict {PACKAGE_PIN Y8 IOSTANDARD LVCMOS33} [get_ports {rf_gpio[5]}]
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set_property -dict { IOSTANDARD LVCMOS25 PACKAGE_PIN H16 } [get_ports clk_crystal]
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create_clock -period 25.000 [get_ports clk_crystal]
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set_property -dict { IOSTANDARD LVCMOS33 PACKAGE_PIN T10 } [get_ports uart_rx]
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set_property -dict { IOSTANDARD LVCMOS33 PACKAGE_PIN T11 } [get_ports uart_tx]
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set_property BITSTREAM.GENERAL.COMPRESS TRUE [current_design]
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