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8ebdd2f328
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f68d6b27e1
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f68d6b27e1 | ||
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c417853cd3 | ||
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2fc4f18729 | ||
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5ef3ae13c3 | ||
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92d3286d81 | ||
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748061a504 | ||
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c9db26bf7b |
@@ -9,36 +9,35 @@ echo 2. GE Project (Vitis 2024.1)
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set /p choice="Choose a project (1 or 2): "
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if "%choice%"=="1" (
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echo Building NODE Project (SDK 2019.1)...
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echo Building NODE Project ^(SDK 2019.1^)
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set "platform_ver=2019.1"
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set "work_dir=%~dp0build\node"
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set "config=%~dp0node_config.json"
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set "config=%~dp0config\node.json"
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goto end
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) else if "%choice%"=="2" (
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echo Building GE Project (Vitis 2024.1)...
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echo Building GE Project ^(Vitis 2024.1^)
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set "platform_ver=2024.1"
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set "work_dir=%~dp0build\ge"
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set "config=%~dp0ge_config.json"
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set "config=%~dp0config\ge.json"
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goto end
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) else (
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echo Invalid choice. Please enter 1 or 2.
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goto menu
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)
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:end
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echo Start Building....
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echo Start Building
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echo Platform version: %platform_ver%
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echo Build directory: %work_dir%
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echo Configuration file: %config%
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pause
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REM Change working dir to the dir where this script is located
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cd /d "%~dp0"
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REM Set up enviroment
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call "%tools_dir%\setenv.bat" "%pltform_ver%"
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REM Set up environment
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call "%tools_dir%\setenv.bat" "%platform_ver%"
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if "%ERRORLEVEL%" neq "0" (
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echo Error: Failed to installize enviroment.
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echo Error: Failed to initialize environment.
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pause >nul
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exit /b 1
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)
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@@ -51,8 +50,8 @@ if "%ERRORLEVEL%" neq "0" (
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exit /b 1
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)
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REM Lauch SDK
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call "%tools_dir%\launch.bat" "%pltform_ver%" "%work_dir%"
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REM Launch SDK
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call "%tools_dir%\launch.bat" "%platform_ver%" "%work_dir%"
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if "%ERRORLEVEL%" neq "0" (
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echo Error: Failed to launch SDK.
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pause >nul
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+1
-1
Submodule scripts updated: 0910a5562b...94aea3524e
@@ -100,7 +100,7 @@ uint32_t ad9361_1_reg_config(struct ad9361_reg_dev *dev){
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//************************************************************
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// Setup the Parallel Port (Digital Data Interface)
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//************************************************************
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status = ad9361_reg_write(dev, 0x0010, 0xC8); // I/O Config. Tx Swap IQ; Rx Swap IQ; Tx CH Swap, Rx CH Swap; Rx Frame Mode; 2R2T bit; Invert data bus; Invert DATA_CLK
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status = ad9361_reg_write(dev, 0x0010, 0x08); // I/O Config. Tx Swap IQ; Rx Swap IQ; Tx CH Swap, Rx CH Swap; Rx Frame Mode; 2R2T bit; Invert data bus; Invert DATA_CLK
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status = ad9361_reg_write(dev, 0x0011, 0x00); // I/O Config. Alt Word Order; -Rx1; -Rx2; -Tx1; -Tx2; Invert Rx Frame; Delay Rx Data
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status = ad9361_reg_write(dev, 0x0012, 0x02); // I/O Config. Rx=2*Tx; Swap Ports; SDR; LVDS; Half Duplex; Single Port; Full Port; Swap Bits
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status = ad9361_reg_write(dev, 0x0006, 0x00); // PPORT Rx Delay (adjusts Tco Dataclk->Data)
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@@ -100,7 +100,7 @@ uint32_t ad9361_2_reg_config(struct ad9361_reg_dev *dev){
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//************************************************************
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// Setup the Parallel Port (Digital Data Interface)
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//************************************************************
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status = ad9361_reg_write(dev, 0x0010, 0xC8); // I/O Config. Tx Swap IQ; Rx Swap IQ; Tx CH Swap, Rx CH Swap; Rx Frame Mode; 2R2T bit; Invert data bus; Invert DATA_CLK
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status = ad9361_reg_write(dev, 0x0010, 0x08); // I/O Config. Tx Swap IQ; Rx Swap IQ; Tx CH Swap, Rx CH Swap; Rx Frame Mode; 2R2T bit; Invert data bus; Invert DATA_CLK
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status = ad9361_reg_write(dev, 0x0011, 0x00); // I/O Config. Alt Word Order; -Rx1; -Rx2; -Tx1; -Tx2; Invert Rx Frame; Delay Rx Data
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status = ad9361_reg_write(dev, 0x0012, 0x02); // I/O Config. Rx=2*Tx; Swap Ports; SDR; LVDS; Half Duplex; Single Port; Full Port; Swap Bits
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status = ad9361_reg_write(dev, 0x0006, 0x00); // PPORT Rx Delay (adjusts Tco Dataclk->Data)
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+4
-4
@@ -363,10 +363,10 @@ int32_t Hardware_Init(void)
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// Status = Hardware_SwitchFreq(ad9361_1_reg_inst, TX_FREQ_4125);
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// XGpioPs_WritePin(&Gpio, AD9361_TX_SWITCH, 0);
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//
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Status = ad9361_reg_write(ad9361_1_reg_inst, 0x0109, 0x00); // Rx Gain
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Status = ad9361_reg_write(ad9361_1_reg_inst, 0x010C, 0x00); // Rx Gain
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Status = ad9361_reg_write(ad9361_2_reg_inst, 0x0109, 0x00); // Rx Gain
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Status = ad9361_reg_write(ad9361_2_reg_inst, 0x010C, 0x00); // Rx Gain
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Status = ad9361_reg_write(ad9361_1_reg_inst, 0x0109, 0x14); // Rx Gain
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Status = ad9361_reg_write(ad9361_1_reg_inst, 0x010C, 0x14); // Rx Gain
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Status = ad9361_reg_write(ad9361_2_reg_inst, 0x0109, 0x14); // Rx Gain
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Status = ad9361_reg_write(ad9361_2_reg_inst, 0x010C, 0x14); // Rx Gain
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#endif
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#ifdef AD9653
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+2
-5
@@ -406,7 +406,8 @@ void AppTimer_IntrHandler(void *context)
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Phy_UpdateLogging(phyInstPtr);
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}
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XTmrCtr_ClearStats((XTmrCtr *)xdesc->instance);
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XTmrCtr_WriteReg(((XTmrCtr *)xdesc->instance)->BaseAddress, 0,
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XTC_TCSR_OFFSET, XTC_CSR_INT_OCCURED_MASK);
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}
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#else
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#error No timer implementation!
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@@ -533,8 +534,6 @@ int main(void)
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DBG_PRINT("Physical started...\n");
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Phy_Start(phyInstPtr);
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Linklayer_Start(linkInstPtr);
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while (true)
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{
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// System bus handler
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@@ -548,8 +547,6 @@ int main(void)
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}
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if (SystemBus_IsRsqPending(sysbusDescPtr) && (!SystemBus_IsTxBusy(sysbusDescPtr)))
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{
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// FIXME: Required by 12 (CASC)
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udelay(4000);
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Status = SystemBus_MakeResp(sysbusDescPtr);
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if (Status != SUCCESS)
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{
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@@ -175,7 +175,7 @@ int SysbusUart_Recv(SYSBUS_UART *instPtr, SYSBUS_UART_FRAME *frame)
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{
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return EPARAM;
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}
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dWLen = (dLen + FRAME_HEAD_LEN + FRAME_INFO_LEN - 1) / 4 + 1;
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dWLen = NORMALIZE_SIZE(dLen + FRAME_HEAD_LEN + FRAME_INFO_LEN) / sizeof(uint32_t);
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dBuff = malloc(sizeof(uint32_t) * dWLen);
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if (dBuff == NULL)
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@@ -262,4 +262,4 @@ bool SysbusUart_IsTxBusy(SYSBUS_UART *instPtr)
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/** @} SystemBus_UART*/
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/** @} SystemBus*/
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/** @} SystemBus*/
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Reference in New Issue
Block a user