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correct naming.

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This commit is contained in:
Gatsby Van
2024-01-21 14:44:21 +08:00
parent 61a3c49ce8
commit 1e0ad014de
5 changed files with 244 additions and 233 deletions
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datalink814_ge/src/phy_ctrl/phy_antenna.c
+64 -66
View File
@@ -21,6 +21,7 @@
#include "../error.h"
#define ANT_PI 3.14159265358979323846
#define ANT_COINFO_HEAD 0xAA
#define ANT_COINFO_TAIL 0xCC
@@ -62,7 +63,8 @@ uint16_t hopPattern_2KBPS_20MS[L1_FRAME_2KBPS_20MS_HOPS] =
1500
};
uint16_t hopPattern_2KBPS_100MS[L1_FRAME_2KBPS_100MS_HOPS] = {
uint16_t hopPattern_2KBPS_100MS[L1_FRAME_2KBPS_100MS_HOPS] =
{
2400, 2400, 2400, 2400, 2400, 2400, 2400, 2400,
2400, 2400, 2400, 2400, 2400, 2400, 2400, 2400,
2400, 2400, 2400, 2400, 2400, 2400, 2400, 2400,
@@ -117,7 +119,7 @@ uint16_t hopPattern_1M2BPS_5MS[L1_FRAME_1M2BPS_5MS_HOPS] =
// Pair by regex
// Regex: ((\{\.oaxis = [0-9]+[ ,]+\.raxis = [0-9]+[ ]*\}, ){2})
#if defined(PHY_BEAM_SET_PRESET)
PHY_ANT_ANGLE antSubnrrwPattern[NUM_ANT_SUBNRRW_PATTERN] =
PHY_ANT_ANGLE antSubnrrwPattern[L1_NUM_ANT_SUBNRRW_PATTERN] =
{
{.oaxis = 0 , .raxis = 222}, {.oaxis = 10, .raxis = 85 },
{.oaxis = 14, .raxis = 307}, {.oaxis = 17, .raxis = 170},
@@ -139,7 +141,8 @@ PHY_ANT_ANGLE antSubnrrwPattern[NUM_ANT_SUBNRRW_PATTERN] =
{.oaxis = 58, .raxis = 227}, {.oaxis = 59, .raxis = 90 },
{.oaxis = 60, .raxis = 312}
};
PHY_ANT_ANGLE antNrrwPattern[NUM_ANT_NRRW_PATTERN] = {
PHY_ANT_ANGLE antNrrwPattern[L1_NUM_ANT_NRRW_PATTERN] =
{
{.oaxis = 0 , .raxis = 222}, {.oaxis = 7 , .raxis = 85 },
{.oaxis = 10, .raxis = 307}, {.oaxis = 13, .raxis = 170},
{.oaxis = 15, .raxis = 32 }, {.oaxis = 17, .raxis = 255},
@@ -173,7 +176,7 @@ PHY_ANT_ANGLE antNrrwPattern[NUM_ANT_NRRW_PATTERN] = {
{.oaxis = 60, .raxis = 252}
};
#elif defined(PHY_BEAM_SET_PRESET_LSX)
ANT_ANGLE antSubnrrwPattern[NUM_ANT_SUBNRRW_PATTERN] = {
ANT_ANGLE antSubnrrwPattern[L1_NUM_ANT_SUBNRRW_PATTERN] = {
{.oaxis = 0 , .raxis =2225},{.oaxis = 96 , .raxis =850 },
{.oaxis = 135, .raxis =3075},{.oaxis = 166, .raxis =1700},
{.oaxis = 192, .raxis =325 },{.oaxis = 215, .raxis =2550},
@@ -194,7 +197,7 @@ ANT_ANGLE antSubnrrwPattern[NUM_ANT_SUBNRRW_PATTERN] = {
{.oaxis = 581, .raxis =2272},{.oaxis = 591, .raxis =897 },
{.oaxis = 600, .raxis =3122}
};
ANT_ANGLE antNrrwPattern[NUM_ANT_NRRW_PATTERN] = {
ANT_ANGLE antNrrwPattern[L1_NUM_ANT_NRRW_PATTERN] = {
{.oaxis = 0 , .raxis =2225},{.oaxis = 74 , .raxis =850 },
{.oaxis = 105, .raxis =3075},{.oaxis = 128, .raxis =1700},
{.oaxis = 148, .raxis =325 },{.oaxis = 166, .raxis =2550},
@@ -228,11 +231,11 @@ ANT_ANGLE antNrrwPattern[NUM_ANT_NRRW_PATTERN] = {
{.oaxis = 600, .raxis =2520}
};
#else
PHY_ANT_ANGLE antSubnrrwPattern[NUM_ANT_SUBNRRW_PATTERN] =
PHY_ANT_ANGLE antSubnrrwPattern[L1_NUM_ANT_SUBNRRW_PATTERN] =
{
0
};
PHY_ANT_ANGLE antNrrwPattern[NUM_ANT_NRRW_PATTERN] =
PHY_ANT_ANGLE antNrrwPattern[L1_NUM_ANT_NRRW_PATTERN] =
{
0
};
@@ -241,109 +244,104 @@ PHY_ANT_ANGLE antNrrwPattern[NUM_ANT_NRRW_PATTERN] =
/**
* @brief
*
* @param antCoinfoPtr
* @param antConfig
*
* @return
*
******************************************************************************/
int32_t Phy_AntCoinfoInit(PHY_ANT_CONFIG *antCoinfoPtr)
void Phy_AntConfigInit(PHY_ANT_CONFIG *antConfig)
{
if (antCoinfoPtr == NULL)
{
return FAILURE;
}
antCoinfoPtr->head = ANT_COINFO_HEAD;
antCoinfoPtr->tail = ANT_COINFO_TAIL;
antCoinfoPtr->ctrlWord = 0x00;
ASSERT(antConfig != NULL);
antConfig->head = ANT_COINFO_HEAD;
antConfig->tail = ANT_COINFO_TAIL;
antConfig->ctrlWord = 0x00;
#ifdef ANT_HIGH_POWER
antCoinfoPtr->antMode = ATN_MODE_HIGH;
antConfig->antMode = ATN_MODE_HIGH;
#else
antCoinfoPtr->antMode = ATN_MODE_DEFAULT;
antConfig->antMode = ATN_MODE_DEFAULT;
#endif
// FIXME: Dummy default value.
// off axis angle setting
antCoinfoPtr->oaxis[0] = 0;
antCoinfoPtr->oaxis[1] = 0;
antConfig->oaxis[0] = 0;
antConfig->oaxis[1] = 0;
// round axis angle setting
antCoinfoPtr->raxis[0] = 0;
antCoinfoPtr->raxis[1] = 0;
antConfig->raxis[0] = 0;
antConfig->raxis[1] = 0;
// ***********************
antCoinfoPtr->antFreq[0] = (uint8_t)(DEFAULT_CENTRTAL_FREQ);
antCoinfoPtr->antFreq[1] = (uint8_t)(DEFAULT_CENTRTAL_FREQ >> 8);
antConfig->antFreq[0] = (uint8_t)(DEFAULT_CENTRTAL_FREQ);
antConfig->antFreq[1] = (uint8_t)(DEFAULT_CENTRTAL_FREQ >> 8);
// FIXME: Dummy default value.
// trSelect
antCoinfoPtr->trSlect = 0;
antConfig->trSlect = 0;
// Antenna attenuation setting
antCoinfoPtr->antAtt = 20;
antConfig->antAtt = 20;
// phase setting
antCoinfoPtr->phase = 0;
antConfig->phase = 0;
// ***********************
antCoinfoPtr->rxtxMode = RXTXMODE_RX;
antCoinfoPtr->calibrMode = CALIBRMODE_NORMAL;
antConfig->rxtxMode = RXTXMODE_RX;
antConfig->calibrMode = CALIBRMODE_NORMAL;
// FIXME: Dummy default value.
// DD enable
antCoinfoPtr->ddEn = 0;
antConfig->ddEn = 0;
// DD mgc
antCoinfoPtr->ddMgc = 0;
antConfig->ddMgc = 0;
// RF mode control
antCoinfoPtr->rfCtrl = 0;
antConfig->rfCtrl = 0;
// RF MGC control
antCoinfoPtr->rfMgc = 0;
antConfig->rfMgc = 0;
// RF channel 1&2 calibration mgc
antCoinfoPtr->rf12CalMgc = 0;
antConfig->rf12CalMgc = 0;
// RF channel 2&3 calibration mgc
antCoinfoPtr->rf34CalMgc = 0;
antConfig->rf34CalMgc = 0;
// Receive channel 1 MGC
antCoinfoPtr->rcv1Mgc = 0;
antConfig->rcv1Mgc = 0;
// Receive channel 2 MGC
antCoinfoPtr->rcv2Mgc = 0;
antConfig->rcv2Mgc = 0;
// Receive channel 3 MGC
antCoinfoPtr->rcv3Mgc = 0;
antConfig->rcv3Mgc = 0;
// Receive channel 4 MGC
antCoinfoPtr->rcv4Mgc = 0;
antConfig->rcv4Mgc = 0;
// ***********************
memset(antCoinfoPtr->dummy, 0x00, sizeof(antCoinfoPtr->dummy));
return SUCCESS;
memset(antConfig->dummy, 0x00, sizeof(antConfig->dummy));
}
int32_t Phy_SetBeamNo(PHY_INST *instPtr, int32_t beamNo)
{
if (instPtr->beamWd.next == PHY_ANT_BEAM_8)
{
if (beamNo >= NUM_ANT_NRRW_PATTERN)
if (beamNo >= L1_NUM_ANT_NRRW_PATTERN)
{
return FAILURE;
}
else
{
instPtr->beamNo.next = beamNo;
instPtr->antCoinfoPtr.oaxis[1] = (uint8_t)(antNrrwPattern[beamNo].oaxis);
instPtr->antCoinfoPtr.oaxis[0] = (uint8_t)((antNrrwPattern[beamNo].oaxis) >> 8);
instPtr->antCoinfoPtr.raxis[1] = (uint8_t)(antNrrwPattern[beamNo].raxis);
instPtr->antCoinfoPtr.raxis[0] = (uint8_t)((antNrrwPattern[beamNo].raxis) >> 8);
instPtr->antConfig.oaxis[1] = (uint8_t)(antNrrwPattern[beamNo].oaxis);
instPtr->antConfig.oaxis[0] = (uint8_t)((antNrrwPattern[beamNo].oaxis) >> 8);
instPtr->antConfig.raxis[1] = (uint8_t)(antNrrwPattern[beamNo].raxis);
instPtr->antConfig.raxis[0] = (uint8_t)((antNrrwPattern[beamNo].raxis) >> 8);
return SUCCESS;
}
}
else if (instPtr->beamWd.next == PHY_ANT_BEAM_25)
{
if (beamNo >= NUM_ANT_SUBNRRW_PATTERN)
if (beamNo >= L1_NUM_ANT_SUBNRRW_PATTERN)
{
return FAILURE;
}
else
{
instPtr->beamNo.next = beamNo;
instPtr->antCoinfoPtr.oaxis[1] = (uint8_t)(antSubnrrwPattern[beamNo].oaxis);
instPtr->antCoinfoPtr.oaxis[0] = (uint8_t)((antSubnrrwPattern[beamNo].oaxis) >> 8);
instPtr->antCoinfoPtr.raxis[1] = (uint8_t)(antSubnrrwPattern[beamNo].raxis);
instPtr->antCoinfoPtr.raxis[0] = (uint8_t)((antSubnrrwPattern[beamNo].raxis) >> 8);
instPtr->antConfig.oaxis[1] = (uint8_t)(antSubnrrwPattern[beamNo].oaxis);
instPtr->antConfig.oaxis[0] = (uint8_t)((antSubnrrwPattern[beamNo].oaxis) >> 8);
instPtr->antConfig.raxis[1] = (uint8_t)(antSubnrrwPattern[beamNo].raxis);
instPtr->antConfig.raxis[0] = (uint8_t)((antSubnrrwPattern[beamNo].raxis) >> 8);
return SUCCESS;
}
}
@@ -352,18 +350,18 @@ int32_t Phy_SetBeamNo(PHY_INST *instPtr, int32_t beamNo)
// Beam number assign not support.
// Assign default angle (0,0)
instPtr->beamNo.next = 0;
instPtr->antCoinfoPtr.oaxis[1] = 0;
instPtr->antCoinfoPtr.oaxis[0] = 0;
instPtr->antCoinfoPtr.raxis[1] = 0;
instPtr->antCoinfoPtr.raxis[0] = 0;
DBG_WARNING("Using default beam number...");
instPtr->antConfig.oaxis[1] = 0;
instPtr->antConfig.oaxis[0] = 0;
instPtr->antConfig.raxis[1] = 0;
instPtr->antConfig.raxis[0] = 0;
DBG_WARNING("Using default beam number...\n");
return SUCCESS;
}
}
int32_t Phy_SetBeamWidth(PHY_INST *instPtr, PHY_ANT_BEAM_WIDTH beamWidth)
{
uint8_t beamConfig = instPtr->antCoinfoPtr.antMode & (~ANT_MODE_BEAM_MASK);
uint8_t beamConfig = instPtr->antConfig.antMode & (~ANT_MODE_BEAM_MASK);
switch (beamWidth)
{
case PHY_ANT_BEAM_120:
@@ -383,7 +381,7 @@ int32_t Phy_SetBeamWidth(PHY_INST *instPtr, PHY_ANT_BEAM_WIDTH beamWidth)
return EPARAM;
break;
}
instPtr->antCoinfoPtr.antMode = beamConfig;
instPtr->antConfig.antMode = beamConfig;
instPtr->beamWd.next = beamWidth;
return SUCCESS;
}
@@ -393,19 +391,19 @@ int32_t Phy_SetBeamAngle(PHY_INST *instPtr, double offAx, double rndAx)
{
uint16_t offAxDeg = 0;
uint16_t rndAxDeg = 0;
offAxDeg = (offAx > 0) ? (((int32_t)(offAx * 180 / ANT_PI)) % 360) : (((int32_t)(offAx * 180 / ANT_PI)) % 360 + 360);
rndAxDeg = (rndAx > 0) ? (((int32_t)(rndAx * 180 / ANT_PI)) % 360) : (((int32_t)(rndAx * 180 / ANT_PI)) % 360 + 360);
offAxDeg = (offAx >= 0) ? (((int32_t)(offAx * 180 / ANT_PI)) % 360) : (((int32_t)(offAx * 180 / ANT_PI)) % 360 + 360);
rndAxDeg = (rndAx >= 0) ? (((int32_t)(rndAx * 180 / ANT_PI)) % 360) : (((int32_t)(rndAx * 180 / ANT_PI)) % 360 + 360);
if (offAxDeg > 60)
{
DBG_ERROR("Angle out of range, off axis angle: %u(should be 0~60), round axis angle: %u(should be 0~360).",
DBG_ERROR("Angle out of range, off axis angle: %u (should be 0~60), round axis angle: %u (should be 0~360).\n",
offAxDeg, rndAxDeg);
return EPARAM;
}
offAxDeg = offAxDeg * 10;
rndAxDeg = rndAxDeg * 10;
instPtr->antCoinfoPtr.oaxis[1] = (uint8_t)offAxDeg;
instPtr->antCoinfoPtr.oaxis[0] = (uint8_t)(offAxDeg >> 8);
instPtr->antCoinfoPtr.raxis[1] = (uint8_t)rndAxDeg;
instPtr->antCoinfoPtr.raxis[0] = (uint8_t)(rndAxDeg >> 8);
instPtr->antConfig.oaxis[1] = (uint8_t)offAxDeg;
instPtr->antConfig.oaxis[0] = (uint8_t)(offAxDeg >> 8);
instPtr->antConfig.raxis[1] = (uint8_t)rndAxDeg;
instPtr->antConfig.raxis[0] = (uint8_t)(rndAxDeg >> 8);
return SUCCESS;
}
datalink814_ge/src/phy_ctrl/phy_ctrl.c
+132 -120
View File
@@ -30,6 +30,7 @@
#ifndef EMULATION
#include "xbram.h"
#endif
/************************** Constant Definitions *****************************/
/***************** Macros (Inline Functions) Definitions *********************/
/************************** Function Prototypes ******************************/
@@ -63,7 +64,7 @@ static int32_t Phy_SetSendData(PHY_INST *instPtr, L1_FRAME_TYPE frameType, uint8
DBG_ERROR("Invalid frame length.\n");
return EPARAM;
}
instPtr->sendDataOffset = (TXRXDATA_MAX_LEN >> 1) - instPtr->sendDataOffset;
instPtr->sendDataOffset = (L1_TXRXDATA_MAX_LEN >> 1) - instPtr->sendDataOffset;
memcpy((uint8_t *)(instPtr->sendDataAddr + instPtr->sendDataOffset), dataBuff, frameLen);
sendCmd = frameLen & SEND_DATA_CMD_LEN_MASK;
@@ -271,7 +272,8 @@ void Phy_UpdateState(PHY_INST *instPtr)
/*****************************************************************************/
/**
* @brief Initialize physical layer instance accordingly.
* @brief Initialize Physical Layer instance, allocate memory for buffers,
* apply a self test.
*
* @param instPtr a pointer to physical instance
* @param phyConfig a pointer to configuration structure.
@@ -290,42 +292,42 @@ int32_t Phy_InstInit(PHY_INST **instPtr, PHY_CONFIG *phyConfig)
{
return EALLOC;
}
memcpy(&(*instPtr)->phyCofig, phyConfig, sizeof(PHY_CONFIG));
memcpy(&(*instPtr)->phyCofig, phyConfig, sizeof(PHY_CONFIG));
(*instPtr)->isPhyEn = false;
(*instPtr)->isAcq = false;
(*instPtr)->isFrameSync = false;
(*instPtr)->isDecode = false;
(*instPtr)->isValid = false;
(*instPtr)->isPresetHop = true;
(*instPtr)->recvFsTime.int_part = UINT32_MAX;
(*instPtr)->recvFsTime.frac_part = UINT32_MAX;
(*instPtr)->recvSlotTime.int_part = UINT32_MAX;
(*instPtr)->recvSlotTime.frac_part = UINT32_MAX;
(*instPtr)->isPresetHop = false;
(*instPtr)->antConfigOffset = 0;
(*instPtr)->sendDataOffset = 0;
Phy_AntCoinfoInit(&((*instPtr)->antCoinfoPtr));
Phy_AntConfigInit(&((*instPtr)->antConfig));
memset(&((*instPtr))->TOR, PHY_TOR_SUSPEND, sizeof(PHY_RCD));
memset(&((*instPtr)->frameType), L1_NONE_FRAME, sizeof(PHY_RCD));
memset(&((*instPtr)->antNo), (int32_t)INIT_BEAM_NO, sizeof(PHY_RCD));
memset(&((*instPtr)->beamNo), (int32_t)INIT_ANT_NO, sizeof(PHY_RCD));
memset(&((*instPtr)->beamWd), (int32_t)INIT_ANT_WD, sizeof(PHY_RCD));
memset(&((*instPtr)->antNo), (int32_t)L1_INIT_BEAM_NO, sizeof(PHY_RCD));
memset(&((*instPtr)->beamNo), (int32_t)L1_INIT_ANT_NO, sizeof(PHY_RCD));
memset(&((*instPtr)->beamWd), (int32_t)L1_INIT_ANT_WD, sizeof(PHY_RCD));
#ifndef EMULATION
XBram antInfoBram;
XBram txFrameBram;
XBram rxFrameBram;
XBram_Config *bramConfigPtr;
XBram antConfigBram;
XBram txDataBram;
XBram rxDataBram;
XBram_Config *ConfigPtr;
ConfigPtr = XBram_LookupConfig(phyConfig->antBramId);
if (ConfigPtr == NULL)
bramConfigPtr = XBram_LookupConfig(phyConfig->antBramId);
if (bramConfigPtr == NULL)
{
Status = EDINVAL;
goto error;
}
Status = XBram_CfgInitialize(&antInfoBram, ConfigPtr,
ConfigPtr->CtrlBaseAddress);
Status = XBram_CfgInitialize(&antConfigBram, bramConfigPtr,
bramConfigPtr->CtrlBaseAddress);
if (Status != SUCCESS)
{
goto error;
@@ -333,20 +335,20 @@ int32_t Phy_InstInit(PHY_INST **instPtr, PHY_CONFIG *phyConfig)
/*
* Execute the BRAM driver selftest.
*/
Status = XBram_SelfTest(&antInfoBram, 0);
Status = XBram_SelfTest(&antConfigBram, 0);
if (Status != SUCCESS)
{
goto error;
}
ConfigPtr = XBram_LookupConfig(phyConfig->txBramId);
if (ConfigPtr == NULL)
bramConfigPtr = XBram_LookupConfig(phyConfig->txBramId);
if (bramConfigPtr == NULL)
{
Status = EDINVAL;
goto error;
}
Status = XBram_CfgInitialize(&txFrameBram, ConfigPtr,
ConfigPtr->CtrlBaseAddress);
Status = XBram_CfgInitialize(&txDataBram, bramConfigPtr,
bramConfigPtr->CtrlBaseAddress);
if (Status != SUCCESS)
{
goto error;
@@ -354,20 +356,20 @@ int32_t Phy_InstInit(PHY_INST **instPtr, PHY_CONFIG *phyConfig)
/*
* Execute the BRAM driver selftest.
*/
Status = XBram_SelfTest(&txFrameBram, 0);
Status = XBram_SelfTest(&txDataBram, 0);
if (Status != SUCCESS)
{
goto error;
}
ConfigPtr = XBram_LookupConfig(phyConfig->rxBramId);
if (ConfigPtr == NULL)
bramConfigPtr = XBram_LookupConfig(phyConfig->rxBramId);
if (bramConfigPtr == NULL)
{
Status = EDINVAL;
goto error;
}
Status = XBram_CfgInitialize(&rxFrameBram, ConfigPtr,
ConfigPtr->CtrlBaseAddress);
Status = XBram_CfgInitialize(&rxDataBram, bramConfigPtr,
bramConfigPtr->CtrlBaseAddress);
if (Status != SUCCESS)
{
goto error;
@@ -375,29 +377,29 @@ int32_t Phy_InstInit(PHY_INST **instPtr, PHY_CONFIG *phyConfig)
/*
* Execute the BRAM driver selftest.
*/
Status = XBram_SelfTest(&rxFrameBram, 0);
Status = XBram_SelfTest(&rxDataBram, 0);
if (Status != SUCCESS)
{
goto error;
}
(*instPtr)->antConfigAddr = antInfoBram.Config.MemBaseAddress;
(*instPtr)->recvDataAddr = rxFrameBram.Config.MemBaseAddress;
(*instPtr)->sendDataAddr = txFrameBram.Config.MemBaseAddress;
(*instPtr)->antConfigAddr = antConfigBram.Config.MemBaseAddress;
(*instPtr)->recvDataAddr = rxDataBram.Config.MemBaseAddress;
(*instPtr)->sendDataAddr = txDataBram.Config.MemBaseAddress;
#else
(*instPtr)->antConfigAddr = (uintptr_t)calloc(ANTCONFIG_MAX_LEN / sizeof(uint64_t), sizeof(uint64_t));
(*instPtr)->antConfigAddr = (uintptr_t)calloc(L1_ANTCONFIG_MAX_LEN / sizeof(uint64_t), sizeof(uint64_t));
if ((*instPtr)->antConfigAddr == (uintptr_t)NULL)
{
Status = EALLOC;
goto error;
}
(*instPtr)->recvDataAddr = (uintptr_t)calloc(TXRXDATA_MAX_LEN / sizeof(uint64_t), sizeof(uint64_t));
(*instPtr)->recvDataAddr = (uintptr_t)calloc(L1_TXRXDATA_MAX_LEN / sizeof(uint64_t), sizeof(uint64_t));
if ((*instPtr)->recvDataAddr == (uintptr_t)NULL)
{
Status = EALLOC;
goto error;
}
(*instPtr)->sendDataAddr = (uintptr_t)calloc(TXRXDATA_MAX_LEN / sizeof(uint64_t), sizeof(uint64_t));
(*instPtr)->sendDataAddr = (uintptr_t)calloc(L1_TXRXDATA_MAX_LEN / sizeof(uint64_t), sizeof(uint64_t));
if ((*instPtr)->sendDataAddr == (uintptr_t)NULL)
{
Status = EALLOC;
@@ -448,7 +450,7 @@ void Phy_Start(PHY_INST *instPtr)
uint32_t phyMainCtrl = PhyRead(instPtr, PHY_MAIN_CTRL);
if ((phyMainCtrl & PHY_MAIN_CTRL_EN_MASK) == PHY_MAIN_CTRL_EN_EN)
{
DBG_WARNING("Physical layer was allready enabled.\n");
DBG_WARNING("Physical layer was already enabled.\n");
}
instPtr->isPhyEn = true;
// Enable CRC check automatically
@@ -532,9 +534,9 @@ int32_t Phy_SetupNextSlot(PHY_INST *instPtr, PHY_TOR_TYPE txrxMode,
ASSERT(instPtr != NULL);
int32_t Status;
uint32_t phyModeCtrl, hopNum;
uint16_t *hopPattern = NULL;
uint16_t *hopPattern;
// Implement a ping-pong flow, offset always is 0 or half of buffer depth.
instPtr->antConfigOffset = (ANTCONFIG_MAX_LEN >> 1) - instPtr->antConfigOffset;
instPtr->antConfigOffset = (L1_ANTCONFIG_MAX_LEN >> 1) - instPtr->antConfigOffset;
uint32_t antConfigAddr = instPtr->antConfigAddr + instPtr->antConfigOffset;
instPtr->TOR.next = txrxMode;
@@ -554,6 +556,12 @@ int32_t Phy_SetupNextSlot(PHY_INST *instPtr, PHY_TOR_TYPE txrxMode,
default:
return EPARAM;
}
if (instPtr->isPresetHop == false)
{
hopPattern = hopPattern_Config;
}
else
{
switch (frameType)
{
case L1_2KBPS_20MS_FRAME:
@@ -600,13 +608,15 @@ int32_t Phy_SetupNextSlot(PHY_INST *instPtr, PHY_TOR_TYPE txrxMode,
return EPARAM;
break;
}
hopPattern = (instPtr->isPresetHop) ? hopPattern : hopPattern_Config;
}
uint8_t *dataSrcPtr = (uint8_t *)(&(instPtr->antCoinfoPtr));
PhyWrite(instPtr, PHY_MODE_CTRL, phyModeCtrl | PHY_MODE_CTRL_CRC_EN);
uint8_t *dataSrcPtr = (uint8_t *)(&(instPtr->antConfig));
for (int32_t i = 0; i < hopNum; i++)
{
instPtr->antCoinfoPtr.antFreq[1] = (uint8_t)(hopPattern[i] & 0x00FF);
instPtr->antCoinfoPtr.antFreq[0] = (uint8_t)((hopPattern[i] >> 8) & 0x00FF);
instPtr->antConfig.antFreq[1] = (uint8_t)(hopPattern[i] & 0x00FF);
instPtr->antConfig.antFreq[0] = (uint8_t)((hopPattern[i] >> 8) & 0x00FF);
memcpy((uint8_t *)(antConfigAddr + i * sizeof(PHY_ANT_CONFIG)),
dataSrcPtr, sizeof(PHY_ANT_CONFIG));
}
@@ -618,10 +628,9 @@ int32_t Phy_SetupNextSlot(PHY_INST *instPtr, PHY_TOR_TYPE txrxMode,
| ((hopNum << ANT_CONFIG_NUM_SHIFT) & ANT_CONFIG_NUM_MASK)
| ((sizeof(uint16_t) << ANT_CONFIG_LEN_SHIFT) & ANT_CONFIG_LEN_MASK);
*/
PhyWrite(instPtr, PHY_MODE_CTRL, phyModeCtrl | PHY_MODE_CTRL_CRC_EN);
PhyWrite(instPtr, ANT_CONFIG, antCtrl);
// Trigger physical configuration.
if (txrxMode == PHY_TOR_TX)
{
Status = Phy_SetSendData(instPtr, frameType, dataBuff);
@@ -631,17 +640,91 @@ int32_t Phy_SetupNextSlot(PHY_INST *instPtr, PHY_TOR_TYPE txrxMode,
return Status;
}
}
PhyWrite(instPtr, SLOT_CMD, SLOT_CMD_KEY); // Phy statr fetching data.
// Trigger physical configuration.
// Indicate physical layer that all the configurations were done.
PhyWrite(instPtr, SLOT_CMD, SLOT_CMD_KEY);
Phy_RcdShift(&(instPtr->TOR), txrxMode);
Phy_RcdShift(&(instPtr->frameType), frameType);
// TODO:
Phy_RcdShift(&(instPtr->antNo), INIT_ANT_NO);
Phy_RcdShift(&(instPtr->beamNo), INIT_BEAM_NO);
Phy_RcdShift(&(instPtr->beamWd), INIT_ANT_WD);
Phy_RcdShift(&(instPtr->antNo), L1_INIT_ANT_NO);
Phy_RcdShift(&(instPtr->beamNo), L1_INIT_BEAM_NO);
Phy_RcdShift(&(instPtr->beamWd), L1_INIT_ANT_WD);
return SUCCESS;
}
/*****************************************************************************/
/**
* @brief Get the corresponding frequency hopping pattern length of a
* specified L1 frame type.
*
* @param frameType a L1 frame type enumeration.
*
* @return SUCCESS
* FAILURE frame type cannot be recognized
*
******************************************************************************/
uint32_t Phy_GetHopLength(L1_FRAME_TYPE frameType)
{
switch (frameType)
{
case L1_2KBPS_20MS_FRAME:
return L1_FRAME_2KBPS_20MS_HOPS;
case L1_2KBPS_100MS_FRAME:
return L1_FRAME_2KBPS_100MS_HOPS;
case L1_10KBPS_10MS_FRAME:
return L1_FRAME_10KBPS_10MS_HOPS;
case L1_10KBPS_20MS_FRAME:
return L1_FRAME_10KBPS_20MS_HOPS;
case L1_40KBPS_20MS_FRAME:
return L1_FRAME_40KBPS_20MS_HOPS;
case L1_40KBPS_10MS_FRAME:
return L1_FRAME_40KBPS_10MS_HOPS;
case L1_200KBPS_5MS_FRAME:
return L1_FRAME_200KBPS_5MS_HOPS;
case L1_1M2BPS_5MS_FRAME:
return L1_FRAME_1M2BPS_5MS_HOPS;
default:
return L1_FRAME_NONE_LEN;
}
}
/*****************************************************************************/
/**
* @brief Get the corresponding time compensation value (time interval from
* frame start to frame sync)
*
* @param frameType a L1 frame type enumeration.
*
* @return 32bit unsigned integer (10ns)
*
******************************************************************************/
uint32_t Phy_GetTimeComp(L1_FRAME_TYPE frameType)
{
switch (frameType)
{
case L1_2KBPS_20MS_FRAME:
return L1_FRAME_2KBPS_20MS_COMP;
case L1_2KBPS_100MS_FRAME:
return L1_FRAME_2KBPS_100MS_COMP;
case L1_10KBPS_10MS_FRAME:
return L1_FRAME_10KBPS_10MS_COMP;
case L1_10KBPS_20MS_FRAME:
return L1_FRAME_10KBPS_20MS_COMP;
case L1_40KBPS_20MS_FRAME:
return L1_FRAME_40KBPS_20MS_COMP;
case L1_40KBPS_10MS_FRAME:
return L1_FRAME_40KBPS_10MS_COMP;
case L1_200KBPS_5MS_FRAME:
return L1_FRAME_200KBPS_5MS_COMP;
case L1_1M2BPS_5MS_FRAME:
return L1_FRAME_1M2BPS_5MS_COMP;
default:
return L1_FRAME_NONE_LEN;
}
}
/*****************************************************************************/
/**
* @brief Get coarse frequency estimation of last valid frame.
@@ -684,78 +767,6 @@ double Phy_GetCoarseFreqEst(PHY_INST *instPtr)
return freqEst;
}
/*****************************************************************************/
/**
* @brief Get the corresponding frequency hopping pattern length of a
* specified L1 frame type.
*
* @param frameType a L1 frame type enumeration.
*
* @return SUCCESS
* FAILURE frame type cannot be recognized
*
******************************************************************************/
uint32_t Phy_GetHopLength(L1_FRAME_TYPE frameType)
{
switch (frameType)
{
case L1_2KBPS_20MS_FRAME:
return L1_FRAME_2KBPS_20MS_HOPS;
case L1_2KBPS_100MS_FRAME:
return L1_FRAME_2KBPS_100MS_HOPS;
case L1_10KBPS_10MS_FRAME:
return L1_FRAME_10KBPS_10MS_HOPS;
case L1_10KBPS_20MS_FRAME:
return L1_FRAME_10KBPS_20MS_HOPS;
case L1_40KBPS_20MS_FRAME:
return L1_FRAME_40KBPS_20MS_HOPS;
case L1_40KBPS_10MS_FRAME:
return L1_FRAME_40KBPS_10MS_HOPS;
case L1_200KBPS_5MS_FRAME:
return L1_FRAME_200KBPS_5MS_HOPS;
case L1_1M2BPS_5MS_FRAME:
return L1_FRAME_1M2BPS_5MS_HOPS;
default:
return L1_FRAME_NONE_LEN;
}
}
/*****************************************************************************/
/**
* @brief Get the corresponding time compensation value (time interval from
* frame start to frame sync)
*
* @param frameType a L1 frame type enumeration.
*
* @return SUCCESS
* FAILURE frame type cannot be recognized
*
******************************************************************************/
uint32_t Phy_GetTimeComp(L1_FRAME_TYPE frameType)
{
switch (frameType)
{
case L1_2KBPS_20MS_FRAME:
return L1_FRAME_2KBPS_20MS_COMP;
case L1_2KBPS_100MS_FRAME:
return L1_FRAME_2KBPS_100MS_COMP;
case L1_10KBPS_10MS_FRAME:
return L1_FRAME_10KBPS_10MS_COMP;
case L1_10KBPS_20MS_FRAME:
return L1_FRAME_10KBPS_20MS_COMP;
case L1_40KBPS_20MS_FRAME:
return L1_FRAME_40KBPS_20MS_COMP;
case L1_40KBPS_10MS_FRAME:
return L1_FRAME_40KBPS_10MS_COMP;
case L1_200KBPS_5MS_FRAME:
return L1_FRAME_200KBPS_5MS_COMP;
case L1_1M2BPS_5MS_FRAME:
return L1_FRAME_1M2BPS_5MS_COMP;
default:
return L1_FRAME_NONE_LEN;
}
}
/*****************************************************************************/
/**
* @brief Setup a frequency hopping pattern.
@@ -782,8 +793,9 @@ int32_t Phy_SetHopPattern(void *patternBuff, uint32_t patternLen)
/**
* @brief Setup a specific timer word register in physical controller.
*
* @param patternBuff a pointer to hopping pattern buffer
* @param patternLen a integer indicate the length of hopping pattern.
* @param instPtr
* @param tmWord
* @param tmType
*
* @return SUCCESS
* FAILURE pattern length exceeds maximum length.
datalink814_ge/src/phy_ctrl/phy_ctrl.h
+14 -14
View File
@@ -28,14 +28,14 @@
#include "../common.h"
#include "../time_ctrl/time_ctrl.h"
/************************** Constant Definitions *****************************/
#define TMWORD_FRAC_MAX 500000
#define ANTCONFIG_MAX_LEN 8192
#define TXRXDATA_MAX_LEN 2048
#define NUM_ANT_SUBNRRW_PATTERN 37
#define NUM_ANT_NRRW_PATTERN 61
#define INIT_BEAM_NO 0
#define INIT_ANT_WD PHY_ANT_BEAM_120
#define INIT_ANT_NO 0
#define L1_TMWORD_FRAC_MAX 500000
#define L1_ANTCONFIG_MAX_LEN 8192
#define L1_TXRXDATA_MAX_LEN 2048
#define L1_NUM_ANT_SUBNRRW_PATTERN 37
#define L1_NUM_ANT_NRRW_PATTERN 61
#define L1_INIT_BEAM_NO 0
#define L1_INIT_ANT_WD PHY_ANT_BEAM_120
#define L1_INIT_ANT_NO 0
#define L1_FRAME_NONE_HOPS UINT32_MAX
#define L1_FRAME_MAX_HOPS 81
@@ -50,9 +50,9 @@
#define L1_FRAME_NONE_LEN UINT32_MAX // byte
#define L1_FRAME_LEN_MAX (8192 / 8) // byte
#define L1_FRAME_2KBPS_20MS_LEN 1 // byte
#define L1_FRAME_2KBPS_20MS_LEN 0 // byte
#define L1_FRAME_2KBPS_100MS_LEN 312 / 8 // byte
#define L1_FRAME_10KBPS_10MS_LEN 1 // byte
#define L1_FRAME_10KBPS_10MS_LEN 0 // byte
#define L1_FRAME_10KBPS_20MS_LEN (232 / 8) // byte
#define L1_FRAME_40KBPS_20MS_LEN (2152 / 8) // byte
#define L1_FRAME_40KBPS_10MS_LEN (712 / 8) // byte
@@ -225,7 +225,7 @@ typedef struct
PHY_RCD frameType; // frame type record
uint32_t sendDataOffset; // antenna configuration bram offset (to implement ping-pong data flow)
uint32_t antConfigOffset; // antenna configuration bram offset (to implement ping-pong data flow)
PHY_ANT_CONFIG antCoinfoPtr; // antenna configuration pointer
PHY_ANT_CONFIG antConfig; // antenna configuration pointer
} PHY_INST;
/************************** Variable Definitions *****************************/
@@ -240,8 +240,8 @@ extern uint16_t hopPattern_40KBPS_20MS[L1_FRAME_40KBPS_20MS_HOPS];
extern uint16_t hopPattern_200KBPS_5MS[L1_FRAME_200KBPS_5MS_HOPS];
extern uint16_t hopPattern_1M2BPS_5MS[L1_FRAME_1M2BPS_5MS_HOPS];
extern PHY_ANT_ANGLE antSubnrrwPattern[NUM_ANT_SUBNRRW_PATTERN];
extern PHY_ANT_ANGLE antNrrwPattern[NUM_ANT_NRRW_PATTERN];
extern PHY_ANT_ANGLE antSubnrrwPattern[L1_NUM_ANT_SUBNRRW_PATTERN];
extern PHY_ANT_ANGLE antNrrwPattern[L1_NUM_ANT_NRRW_PATTERN];
/************************** Function Prototypes ******************************/
int32_t Phy_InstInit(PHY_INST **instPtr, PHY_CONFIG *phyConfig);
@@ -269,7 +269,7 @@ int32_t Phy_SetHopPattern(void *patternBuff, uint32_t patternLen);
uint32_t Phy_GetHopLength(L1_FRAME_TYPE frameType);
uint32_t Phy_GetTimeComp(L1_FRAME_TYPE frameType);
int32_t Phy_AntCoinfoInit(PHY_ANT_CONFIG *antCoinfoPtr);
void Phy_AntConfigInit(PHY_ANT_CONFIG *antConfig);
int32_t Phy_SetBeamWidth(PHY_INST *instPtr, PHY_ANT_BEAM_WIDTH beamWidth);
int32_t Phy_SetBeamNo(PHY_INST *instPtr, int32_t beamNo);
int32_t Phy_SetBeamAngle(PHY_INST *phyInstPtr, double offAx, double rndAx);
datalink814_ge/src/phy_ctrl/phy_reg.h
+10 -9
View File
@@ -18,8 +18,8 @@
*
******************************************************************************/
#ifndef PHY_CTRLREG_H_
#define PHY_CTRLREG_H_
#ifndef PHY_REG_H_
#define PHY_REG_H_
/***************************** Include Files *********************************/
#include "../util/util.h"
@@ -139,7 +139,7 @@
#define SEND_DATA_CMD_OFFSET_MASK 0xFFFF0000U
/**
* Register: SEND_CONFIG_CMD
* Register: SLOT_CONFIG_CMD
*/
#define SLOT_CMD 0x00000020U
#define SLOT_CMD_SHIFT 0
@@ -186,10 +186,11 @@
#define RECVDATA_STATE_OFFSET_SHIFT 16
#define RECVDATA_STATE_OFFSET_WIDTH 16
#define RECVDATA_STATE_OFFSET_MASK 0xFFFF0000U
/**
* Register: FSTIME_L
*/
#define FSTIME_L 0x000002CU
#define FSTIME_L 0x0000002CU
#define FSTIME_L_SHIFT 0
#define FSTIME_L_WIDTH 32
#define FSTIME_L_MASK 0xFFFFFFFFU
@@ -197,7 +198,7 @@
/**
* Register: FSTIME_INT1
*/
#define FSTIME_H 0x0000030U
#define FSTIME_H 0x00000030U
#define FSTIME_H_SHIFT 0
#define FSTIME_H_WIDTH 32
#define FSTIME_H_MASK 0xFFFFFFFFU
@@ -205,7 +206,7 @@
/**
* Register: TM_TARGET_L
*/
#define TM_TARGET_L 0x0000064U
#define TM_TARGET_L 0x00000064U
#define TM_TARGET_L_SHIFT 0
#define TM_TARGET_L_WIDTH 32
#define TM_TARGET_L_MASK 0xFFFFFFFFU
@@ -213,7 +214,7 @@
/**
* Register: TM_TARGET_H
*/
#define TM_TARGET_H 0x0000038U
#define TM_TARGET_H 0x00000038U
#define TM_TARGET_H_SHIFT 0
#define TM_TARGET_H_WIDTH 32
#define TM_TARGET_H_MASK 0xFFFFFFFFU
@@ -246,7 +247,7 @@
#define BEAM_SELECT_INDEX_MASK 0xFFFFFFFFU
/**
* Register: BEAM_SELECT
* Register: BEAM_AXIS
*/
#define BEAM_AXIS 0x00000044U
#define BEAM_AXIS_EL_SHIFT 0
@@ -257,4 +258,4 @@
#define BEAM_AXIS_AZ_MASK 0xFFFF0000U
// Reserved.
#endif /* PHY_CTRLREG_H_ */
#endif /* PHY_REG_H_ */
datalink814_sp/src/inter_comm/inter_comm.c
+9 -9
View File
@@ -217,8 +217,8 @@ static int32_t EvalPhyConfig(INTER_COMM_INST* instPtr, uint8_t* msgPtr){
return Status;
}
beamNo = (uint32_t)msgPtr[INTER_MSG_CTRL_BEAM_NO_OFFSET];
if((beamNo<NUM_ANT_SUBNRRW_PATTERN && beamWidth == PHY_ANT_BEAM_25)
||(beamNo<NUM_ANT_NRRW_PATTERN && beamWidth == PHY_ANT_BEAM_8)
if((beamNo<L1_NUM_ANT_SUBNRRW_PATTERN && beamWidth == PHY_ANT_BEAM_25)
||(beamNo<L1_NUM_ANT_NRRW_PATTERN && beamWidth == PHY_ANT_BEAM_8)
|| (beamNo == 0 && beamWidth == PHY_ANT_BEAM_120)){
Phy_SetBeamNo(phyRef, beamNo);
}
@@ -305,13 +305,13 @@ int32_t InterComm_Init(INTER_COMM_INST** instPtr, INTER_COMM_CONFIG* configPtr){
}
// Initial physical buffer
(*instPtr)->phyRecvBuff = calloc(TXRXDATA_MAX_LEN/sizeof(uint32_t), sizeof(uint32_t));
(*instPtr)->phyRecvBuff = calloc(L1_TXRXDATA_MAX_LEN/sizeof(uint32_t), sizeof(uint32_t));
if ((*instPtr)->phyRecvBuff == NULL) {
Status = EALLOC;
goto init_failed;
}
(*instPtr)->phySendBuff = calloc(TXRXDATA_MAX_LEN/sizeof(uint32_t), sizeof(uint32_t));
(*instPtr)->phySendBuff = calloc(L1_TXRXDATA_MAX_LEN/sizeof(uint32_t), sizeof(uint32_t));
if ((*instPtr)->phySendBuff == NULL) {
Status = EALLOC;
goto init_failed;
@@ -524,8 +524,8 @@ int32_t InterComm_MsgHandler(INTER_COMM_INST* instPtr){
else{
tmWord.frac_part += (uint32_t)(timeTemp);
tmWord.int_part += (uint32_t)(timeTemp>>32);
tmWord.int_part = (tmWord.frac_part >= TMWORD_FRAC_MAX) ? tmWord.int_part + 1:tmWord.int_part;
tmWord.frac_part %= TMWORD_FRAC_MAX;
tmWord.int_part = (tmWord.frac_part >= L1_TMWORD_FRAC_MAX) ? tmWord.int_part + 1:tmWord.int_part;
tmWord.frac_part %= L1_TMWORD_FRAC_MAX;
Status = Phy_SetTimeWord(instPtr->phyInstPtr, &tmWord, PHY_TIME_WORD_LISTEN_TIMEOUT);
if(Status != SUCCESS){
return EPARAM;
@@ -705,10 +705,10 @@ int32_t InterComm_PhyDataUpload(INTER_COMM_INST* instPtr){
if(timeComp == L1_FRAME_NONE_COMP){
return FAILURE;
}
fsTimeH -= timeComp/TMWORD_FRAC_MAX;
timeComp %= TMWORD_FRAC_MAX;
fsTimeH -= timeComp/L1_TMWORD_FRAC_MAX;
timeComp %= L1_TMWORD_FRAC_MAX;
fsTimeH = (fsTimeL < timeComp)?(fsTimeH - 1):fsTimeH;
fsTimeL = (fsTimeL < timeComp)?(TMWORD_FRAC_MAX + fsTimeL - timeComp) : (fsTimeL - timeComp);
fsTimeL = (fsTimeL < timeComp)?(L1_TMWORD_FRAC_MAX + fsTimeL - timeComp) : (fsTimeL - timeComp);
memcpy(txMsgBuff+DSEGRD_TIME_OFFSET, &fsTimeL, DSEGRD_TIME_LEN/2);
memcpy(txMsgBuff+DSEGRD_TIME_OFFSET + DSEGRD_TIME_LEN/2, &fsTimeH, DSEGRD_TIME_LEN/2);