129 lines
5.1 KiB
C
129 lines
5.1 KiB
C
/******************************************************************************
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*
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* Copyright (C) 2014-2017 Xilinx, Inc. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
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* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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* Except as contained in this notice, the name of the Xilinx shall not be used
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* in advertising or otherwise to promote the sale, use or other dealings in
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* this Software without prior written authorization from Xilinx.
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*
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******************************************************************************/
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/*****************************************************************************/
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/**
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*
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* @file microblaze_sleep.h
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*
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* @addtogroup microblaze_sleep_routines Sleep Routines for Microblaze
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*
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* The microblaze_sleep.h file contains microblaze sleep APIs. These APIs
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* provides delay for requested duration.
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*
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* @{
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* <pre>
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* MODIFICATION HISTORY:
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*
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* Ver Who Date Changes
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* ----- ---- -------- -------------------------------------------------------
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* 4.1 asa 04/18/14 Add sleep function - first release.
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* 6.6 srm 10/18/17 Added the Register offset definitions and Control/Status
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* Register bit masks of the Axi timer.
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*
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* </pre>
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*
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* @note
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* The microblaze_sleep.h file may contain architecture-dependent items.
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*
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******************************************************************************/
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#ifndef MICROBLAZE_SLEEP_H /* prevent circular inclusions */
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#define MICROBLAZE_SLEEP_H /* by using protection macros */
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#ifdef __cplusplus
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extern "C" {
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#endif
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/***************************** Include Files *********************************/
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#include "xil_types.h"
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#include "mb_interface.h"
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#include "xparameters.h"
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#include "sleep.h"
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/************************** Constant Definitions *****************************/
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#if defined (XSLEEP_TIMER_IS_AXI_TIMER)
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/** @name Register Offset Definitions
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* Register offsets within the Axi timer counter, there are multiple
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* timer counters within a single device
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* @{
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*/
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#define XSLEEP_TIMER_AXITIMER_TCSR0_OFFSET 0U /**< Control/Status register */
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#define XSLEEP_TIMER_AXITIMER_TLR_OFFSET 4U /**< Load register */
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#define XSLEEP_TIMER_AXITIMER_TCR_OFFSET 8U /**< Timer counter register */
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/* @} */
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/** @name Control Status Register Bit Definitions
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* Control Status Register bit masks
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* Used to configure the Axi timer counter device.
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* @{
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*/
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#define XSLEEP_TIMER_AXITIMER_CSR_ENABLE_TMR_MASK 0x00000080U
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/**< Enables only the specific timer */
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#define XSLEEP_TIMER_AXITIMER_CSR_AUTO_RELOAD_MASK 0x00000010U
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/**< In compare mode, configures the timer
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* counter to reload from the Load Register.
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* The default mode causes the timer counter
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* to hold when the compare value is hit. In
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* capture mode, configures the timer counter
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* to not hold the previous capture value if
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* a new event occurs. The default mode cause
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* the timer counter to hold the capture value
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* until recognized.*/
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#define XSLEEP_TIMER_AXITIMER_CSR_LOAD_MASK 0x00000020U
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/**< Loads the timer using the load value
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* provided earlier in the Load Register,
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* XSLEEP_TIMER_AXITIMER_TLR_OFFSET. */
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#define XSLEEP_TIMER_AXITIMER_CSR_INT_OCCURED_MASK 0x00000100U
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/**< If bit is set, an interrupt has occured.
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* If set and '1' is written to this bit
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* position, bit is cleared.*/
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#define XSLEEP_TIMER_AXITIMER_CSR_ENABLE_TMR_MASK 0x00000080U
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/**< Enables only the specific timer */
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/* @} */
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/**************************** Type Definitions *******************************/
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/************************** Function Prototypes ******************************/
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static void Xil_SleepAxiTimer(u32 delay, u64 frequency);
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static void XTime_StartAxiTimer();
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#endif
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void MB_Sleep(u32 MilliSeconds) __attribute__((__deprecated__));
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#ifdef __cplusplus
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}
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#endif
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#endif /* end of protection macro */
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/**
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* @} End of "addtogroup microblaze_sleep_routines".
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*/ |