*update log content

df_datalink_sp/src/system_monitor.h

@@ -3,6 +3,7 @@
 
 #include <stdint.h>
 #include <stdbool.h>
+#include "util.h"
 
 #define PAYLOAD_LEN_MAX 256
 #define PAYLOAD_LEN_FLJ_RX 168
@@ -23,6 +24,18 @@
 #define VOLT_PLAUX_STD 1.8
 #define VOLT_BRAM_STD 1.0
 
+#define VOLT_PS_OK BIT(0)
+#define VOLT_PSAUX_OK BIT(1)
+#define VOLT_DDR_OK BIT(2)
+#define VOLT_PL_OK BIT(3)
+#define VOLT_PLAUX_OK BIT(4)
+#define VOLT_BRAM_OK BIT(5)
+
+#define VOLT_ANT_PROC_OK BIT(0)
+#define VOLT_ANT_RF_OK BIT(2)
+#define VOLT_ANT_NIL_OK BIT(4)
+#define ANT_STATE_OK BIT(6)
+
 #define IS_PS_VALID(x) (x <= 0.95 && x >= 1.05)
 #define IS_PSAUX_VALID(x) (x <= 1.89 && x >= 1.71)
 #define IS_DDR_VALID(x) (x <= 1.14 && x >= 1.89)
@@ -30,8 +43,20 @@
 #define IS_PLAUX_VALID(x) (x <= 1.89 && x >= 1.71)
 #define IS_BRAM_VALID(x) (x <= 0.97 && x >= 1.03)
 
-#define TEMPERATURE_LSB 1.0 // Celsius degree
+#define CLK_SP_PLL0_LOCK BIT(0)
-#define TEMPERATURE_MAX 127.0 // Celsius degree
+#define CLK_SP_PLL1_LOCK BIT(2)
+
+#define CLK_AD0_BBPLL_LOCK BIT(0)
+#define CLK_AD0_RFPLL_LOCK BIT(2)
+#define CLK_AD1_BBPLL_LOCK BIT(4)
+#define CLK_AD1_RFPLL_LOCK BIT(6)
+
+#define CLK_ANT_BBPLL_LOCK BIT(0)
+#define CLK_ANT_RFPLL0_LOCK BIT(2)
+#define CLK_ANT_RFPLL1_LOCK BIT(4)
+
+#define TEMPERATURE_LSB 1.0	   // Celsius degree
+#define TEMPERATURE_MAX 127.0  // Celsius degree
 #define TEMPERATURE_MIN -128.0 // Celsius degree
 
 typedef struct __attribute__((packed))
@@ -73,6 +98,18 @@ typedef struct __attribute__((packed))
 	float roll;
 } SYSINFO;
 
+typedef struct __attribute__((packed))
+{
+	// SystemBus log
+	// -- last valid config
+	//    byte 0: 0x11 FLJ, 0x00 LJ
+	//    byte 1: 0x66 Full Power, 0x88 Low Power
+	uint8_t lastConfig[2];
+	uint32_t pollCnt;
+	uint32_t svcCnt;
+	uint32_t remoteCnt;
+} SYSBUSLOG;
+
 typedef struct __attribute__((packed))
 {
 	// Network log
@@ -95,9 +132,10 @@ typedef struct __attribute__((packed))
 	uint32_t svcTxCnt;
 	uint32_t svcRecvCnt;
 	uint32_t svcCorrectCnt;
-	int64_t	timeDev;
+	int32_t timeDev;
 	uint32_t sendId;
 	uint32_t recvId;
+	uint8_t reserve[4];
 } LINKLOG;
 
 typedef struct __attribute__((packed))
@@ -108,15 +146,13 @@ typedef struct __attribute__((packed))
 	uint32_t crcCnt;
 	double doppler;
 	uint64_t recvStamp;
-	uint64_t acqPeak;
+	double acqPAPR;
-	uint64_t acqMean;
 	uint8_t acqPhase;
 	uint8_t acqFreqCh;
-	uint64_t fsyncPeak;
+	double fsyncPAPR;
-	uint64_t fsyncMean;
 	uint8_t fsyncFreqCh;
 	uint16_t deintlvAmpEst;
-	uint16_t reserve;
+	uint8_t reserve[4];
 } PHYLOG;
 
 typedef struct __attribute__((packed))
@@ -125,20 +161,19 @@ typedef struct __attribute__((packed))
 	bool isSpOk;
 	bool isAntOk;
 	// -- Signal processor status
-	uint8_t spPsVolt;
+	uint8_t spFpgaVolt;
-	uint8_t spPsAuxVolt;
+	uint8_t spClkState;
-	uint8_t spDdrVolt;
+	uint8_t spAdLockState;
-	uint8_t spPlVolt;
+	uint8_t spAdTemp_0;
-	uint8_t spPlAuxVolt;
+	uint8_t spAdTemp_1;
-	uint8_t spBramVolt;
+	uint8_t spFpgaTemp;
-	int8_t spTemp;
 	// -- Antenna status
 	uint8_t antVolt;
 	uint8_t antTemp;
 	uint8_t antPll;
 	uint8_t antMgc0;
 	uint8_t antMgc1;
-	uint8_t dummy;
+	uint8_t reserve[2];
 } HWSTATE;
 
 typedef struct