From 64c116dbe07b6c2e996e415492dd5daf0210d661 Mon Sep 17 00:00:00 2001
From: Gatsby Van <gatsby_van@163.com>
Date: Wed, 31 Jan 2024 00:28:17 +0800
Subject: [PATCH] update self test content

---
 df_datalink_sp/src/systembus/systembus.c | 23 ++++++++++-------------
 1 file changed, 10 insertions(+), 13 deletions(-)

diff --git a/df_datalink_sp/src/systembus/systembus.c b/df_datalink_sp/src/systembus/systembus.c
index b567c43..4aee8c2 100644
--- a/df_datalink_sp/src/systembus/systembus.c
+++ b/df_datalink_sp/src/systembus/systembus.c
@@ -52,27 +52,24 @@
 #define ST_RET_OK 0xAA
 #define ST_RET_ERROR 0x55
 // -- -- Signal processor voltage
-#define WD_SP_VOLT_L 0x03
-#define WD_SP_VOLT_H 0x04
+#define WD_SP_VOLT 0x03
 // -- -- Signal processor temperature
-#define WD_SP_TEMP_L 0x05
-#define WD_SP_TEMP_H 0x06
+#define WD_SP_TEMP 0x04
 // -- -- Signal processor chip status
-#define WD_SP_CS_L 0x07
-#define WD_SP_CS_H 0x08
+#define WD_SP_CS 0x05
 // -- -- Signal processor antenna voltage
-#define WD_AS_VOLT 0x09
+#define WD_ANT_VOLT 0x06
 // -- -- Signal processor antenna temperature
-#define WD_AS_TEMP 0x0A
+#define WD_ANT_TEMP 0x07
 // -- -- Signal processor antenna PLL lock status
-#define WD_AS_PLL 0x0B
+#define WD_ANT_PLL 0x08
 // -- -- Signal processor antenna MGC
-#define WD_AS_MGC_L 0x0C
-#define WD_AS_MGC_H 0x0D
+#define WD_ANT_MGC_L 0x09
+#define WD_ANT_MGC_H 0x0A
 // -- -- Signal processor antenna status
-#define WD_AS_ST 0x0E.
+#define WD_ANT_ST 0x0B
 // -- -- Dummy must be 0x00
-#define WD_ST_DUMMY 0x0F
+#define WD_ST_DUMMY 0x0C
 
 // Data Send Test Command
 #define CMD_DATA_TEST_A 0xE2