//arch = zynq; split = false; format = BIN
the_ROM_image:
{
	[bootloader]C:\Users\cxlab\Desktop\fpga_project\01_CX7045_demo\cmos\CX9261A_FPGA_DEMO240318\project_fix_dac.sdk\FSBL\Debug\FSBL.elf
	C:\Users\cxlab\Desktop\fpga_project\01_CX7045_demo\cmos\CX9261A_FPGA_DEMO240318\project_fix_dac.runs\impl_2\CX9261A_ZC706.bit
	C:\Users\cxlab\Desktop\fpga_project\01_CX7045_demo\cmos\CX9261A_FPGA_DEMO240318\project_fix_dac.sdk\CX9261A_DEMO\Debug\CX9261A_DEMO.elf
}