feat: 新增9371地检驱动工程, 9371自收发正常

dj_f1_ad9371/vitis_classic_autobuild/.gitignore

@@ -0,0 +1,32 @@
+# Buid folder
+build/
+
+# Xilinx tools generated files
+.metadata/
+.settings/
+.wsdata/
+.Xil/
+logs/
+Packages/
+*.log*
+
+# System generated files
+# -- macOS
+.DS_Store
+.AppleDouble
+.LSOverride
+._*
+
+# -- Windows
+Thumbs.db
+ehthumbs.db
+Desktop.ini
+
+# -- Linux
+*~
+
+# IDEs and editors' files
+*.idea
+*.vscode
+*.sublime-workspace
+*.sublime-project

dj_f1_ad9371/vitis_classic_autobuild/Makefile

@@ -0,0 +1,8 @@
+include ../../scripts/generic_variables.mk
+
+PLATFORM := xilinx
+CONFIG_FILE := $(PROJECT)/config.json
+XILINX_VITIS_CLASSIC = y
+SCRIPT_DIR = ../../scripts
+
+include ../../scripts/generic.mk

dj_f1_ad9371/vitis_classic_autobuild/autobuild.bat

@@ -0,0 +1,32 @@
+@echo off
+set "platform=xilinx"
+set "pltform_ver=2024.1"
+set "work_dir=%~dp0build"
+set "config=%~dp0config.json"
+set "tools_dir=%~dp0..\..\scripts\platform\%platform%"
+
+REM Set up enviroment
+call "%tools_dir%\setenv.bat" "%pltform_ver%"
+if "%ERRORLEVEL%" neq "0" (
+    echo Error: Failed to installize enviroment.
+    pause >nul
+    exit /b 1
+)
+
+REM Build project
+call "%tools_dir%\build.bat"  "%config%" "%work_dir%"
+if "%ERRORLEVEL%" neq "0" (
+    echo Error: Failed to build project.
+    pause >nul
+    exit /b 1
+)
+
+REM Lauch SDK
+call "%tools_dir%\launch.bat" "%pltform_ver%" "%work_dir%"
+if "%ERRORLEVEL%" neq "0" (
+    echo Error: Failed to launch SDK.
+    pause >nul
+    exit /b 1
+)
+
+exit /b 0

dj_f1_ad9371/vitis_classic_autobuild/config.json

@@ -0,0 +1,34 @@
+{
+    "project_name": "dj_f1",
+    "version": "0.1.0",
+    "hw_design": "../system_top.xsa",
+    "hw_version": "dj_f1_-HW-0.1.0",
+    "apps": {
+        "dj_f1_ad9371": {
+            "sources": ["source/"],
+            "target_cpu": "ps7_cortexa9_0",
+            "os": "standalone",
+            "language": "C",
+            "mem_layout" : {
+                "heap_size": "0x80000",
+                "stack_size": "0x4000"
+            },
+            "build_config": {
+                "debug": {
+                    "include-path": [
+                        "source/",
+                        "source/include"
+                    ],
+                    "libraries": ["m"]
+                },
+                "release": {
+                    "include-path": [
+                        "source/",
+                        "source/include"
+                    ],
+                    "libraries": ["m"]
+                }
+            }
+        }
+    }
+}

dj_f1_ad9371/vitis_classic_autobuild/source/drivers/api/gpio.c

@@ -0,0 +1,241 @@
+/***************************************************************************//**
+ *   @file   gpio.c
+ *   @brief  Implementation of the GPIO Interface
+ *   @author Antoniu Miclaus ([email protected])
+********************************************************************************
+ * Copyright 2020(c) Analog Devices, Inc.
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *  - Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *  - Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *  - Neither the name of Analog Devices, Inc. nor the names of its
+ *    contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *  - The use of this software may or may not infringe the patent rights
+ *    of one or more patent holders.  This license does not release you
+ *    from the requirement that you obtain separate licenses from these
+ *    patent holders to use this software.
+ *  - Use of the software either in source or binary form, must be run
+ *    on or directly connected to an Analog Devices Inc. component.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT,
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, INTELLECTUAL PROPERTY RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*******************************************************************************/
+
+#include <inttypes.h>
+#include "gpio.h"
+#include <stdlib.h>
+#include "error.h"
+
+/******************************************************************************/
+/************************ Functions Definitions *******************************/
+/******************************************************************************/
+
+/**
+ * @brief Obtain the GPIO decriptor.
+ * @param desc - The GPIO descriptor.
+ * @param param - GPIO Initialization parameters.
+ * @return 0 in case of success, -1 otherwise.
+ */
+int32_t gpio_get(struct gpio_desc **desc,
+		       const struct gpio_init_param *param)
+{
+	int32_t ret;
+
+	if (!param || !param->platform_ops)
+		return -EINVAL;
+
+	if (!param->platform_ops->gpio_ops_get)
+		return -ENOSYS;
+
+	ret = param->platform_ops->gpio_ops_get(desc, param);
+	if (ret)
+		return ret;
+
+	(*desc)->platform_ops = param->platform_ops;
+
+	return 0;
+}
+
+/**
+ * @brief Get the value of an optional GPIO.
+ * @param desc - The GPIO descriptor.
+ * @param param - GPIO Initialization parameters.
+ * @return 0 in case of success, -1 otherwise.
+ */
+int32_t gpio_get_optional(struct gpio_desc **desc,
+				const struct gpio_init_param *param)
+{
+	int32_t ret;
+
+	if (!param || (param->number == -1)) {
+		*desc = NULL;
+		return 0;
+	}
+
+	if (!param->platform_ops)
+		return -EINVAL;
+
+	if (!param->platform_ops->gpio_ops_get_optional)
+		return -ENOSYS;
+
+	ret = param->platform_ops->gpio_ops_get_optional(desc, param);
+	if (ret)
+		return ret;
+
+	(*desc)->platform_ops = param->platform_ops;
+
+	return 0;
+}
+/**
+ * @brief Free the resources allocated by gpio_get().
+ * @param desc - The GPIO descriptor.
+ * @return 0 in case of success, -1 otherwise.
+ */
+int32_t gpio_remove(struct gpio_desc *desc)
+{
+	if (desc) {
+		if (!desc->platform_ops)
+			return -EINVAL;
+
+		if (!desc->platform_ops->gpio_ops_remove)
+			return -ENOSYS;
+
+		return desc->platform_ops->gpio_ops_remove(desc);
+	}
+
+	return 0;
+}
+
+/**
+ * @brief Enable the input direction of the specified GPIO.
+ * @param desc - The GPIO descriptor.
+ * @return 0 in case of success, -1 otherwise.
+ */
+int32_t gpio_direction_input(struct gpio_desc *desc)
+{
+	if (desc) {
+		if (!desc->platform_ops)
+			return -EINVAL;
+
+		if (!desc->platform_ops->gpio_ops_direction_input)
+			return -ENOSYS;
+
+		return desc->platform_ops->gpio_ops_direction_input(desc);
+	}
+
+	return 0;
+}
+
+/**
+ * @brief Enable the output direction of the specified GPIO.
+ * @param desc - The GPIO descriptor.
+ * @param value - The value.
+ *                Example: GPIO_HIGH
+ *                         GPIO_LOW
+ * @return 0 in case of success, -1 otherwise.
+ */
+int32_t gpio_direction_output(struct gpio_desc *desc,
+				    uint8_t value)
+{
+	if (desc) {
+		if (!desc->platform_ops)
+			return -EINVAL;
+
+		if (!desc->platform_ops->gpio_ops_direction_output)
+			return -ENOSYS;
+
+		return desc->platform_ops->
+		       gpio_ops_direction_output(desc, value);
+	}
+
+	return 0;
+}
+
+/**
+ * @brief Get the direction of the specified GPIO.
+ * @param desc - The GPIO descriptor.
+ * @param direction - The direction.
+ *                    Example: GPIO_OUT
+ *                             GPIO_IN
+ * @return 0 in case of success, -1 otherwise.
+ */
+int32_t gpio_get_direction(struct gpio_desc *desc,
+				 uint8_t *direction)
+{
+	if (desc) {
+		if (!desc->platform_ops)
+			return -EINVAL;
+
+		if (!desc->platform_ops->gpio_ops_get_direction)
+			return -ENOSYS;
+
+		return desc->platform_ops->
+		       gpio_ops_get_direction(desc, direction);
+	}
+
+	return 0;
+}
+
+/**
+ * @brief Set the value of the specified GPIO.
+ * @param desc - The GPIO descriptor.
+ * @param value - The value.
+ *                Example: GPIO_HIGH
+ *                         GPIO_LOW
+ * @return 0 in case of success, -1 otherwise.
+ */
+int32_t gpio_set_value(struct gpio_desc *desc,
+			     uint8_t value)
+{
+	if (desc) {
+		if (!desc->platform_ops)
+			return -EINVAL;
+
+		if (!desc->platform_ops->gpio_ops_set_value)
+			return -ENOSYS;
+
+		return desc->platform_ops->gpio_ops_set_value(desc, value);
+	}
+
+	return 0;
+}
+
+/**
+ * @brief Get the value of the specified GPIO.
+ * @param desc - The GPIO descriptor.
+ * @param value - The value.
+ *                Example: GPIO_HIGH
+ *                         GPIO_LOW
+ * @return 0 in case of success, -1 otherwise.
+ */
+int32_t gpio_get_value(struct gpio_desc *desc,
+			     uint8_t *value)
+{
+	if (desc) {
+		if (!desc->platform_ops)
+			return -EINVAL;
+
+		if (!desc->platform_ops->gpio_ops_set_value)
+			return -ENOSYS;
+
+		return desc->platform_ops->gpio_ops_get_value(desc, value);
+	}
+
+	return 0;
+}

dj_f1_ad9371/vitis_classic_autobuild/source/drivers/api/i2c.c

@@ -0,0 +1,135 @@
+/***************************************************************************//**
+ *   @file   i2c.c
+ *   @brief  Implementation of the I2C Interface
+ *   @author Antoniu Miclaus ([email protected])
+********************************************************************************
+ * Copyright 2020(c) Analog Devices, Inc.
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *  - Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *  - Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *  - Neither the name of Analog Devices, Inc. nor the names of its
+ *    contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *  - The use of this software may or may not infringe the patent rights
+ *    of one or more patent holders.  This license does not release you
+ *    from the requirement that you obtain separate licenses from these
+ *    patent holders to use this software.
+ *  - Use of the software either in source or binary form, must be run
+ *    on or directly connected to an Analog Devices Inc. component.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT,
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, INTELLECTUAL PROPERTY RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*******************************************************************************/
+
+#include <inttypes.h>
+#include "i2c.h"
+#include <stdlib.h>
+#include "error.h"
+
+/**
+ * @brief Initialize the I2C communication peripheral.
+ * @param desc - The I2C descriptor.
+ * @param param - The structure that contains the I2C parameters.
+ * @return 0 in case of success, -1 otherwise.
+ */
+int32_t i2c_init(struct i2c_desc **desc,
+		       const struct i2c_init_param *param)
+{
+	int32_t ret;
+
+	if (!param || !param->platform_ops)
+		return -EINVAL;
+
+	if (!param->platform_ops->i2c_ops_init)
+		return -ENOSYS;
+
+	ret = param->platform_ops->i2c_ops_init(desc, param);
+	if (ret)
+		return ret;
+
+	(*desc)->platform_ops = param->platform_ops;
+
+	return 0;
+}
+
+/**
+ * @brief Free the resources allocated by i2c_init().
+ * @param desc - The I2C descriptor.
+ * @return 0 in case of success, -1 otherwise.
+ */
+int32_t i2c_remove(struct i2c_desc *desc)
+{
+	if (!desc || !desc->platform_ops)
+		return -EINVAL;
+
+	if (!desc->platform_ops->i2c_ops_remove)
+		return -ENOSYS;
+
+	return desc->platform_ops->i2c_ops_remove(desc);
+}
+
+/**
+ * @brief I2C Write data to slave device.
+ * @param desc - The I2C descriptor.
+ * @param data - The buffer with the transmitted/received data.
+ * @param bytes_number - Number of bytes to write.
+ * @param stop_bit - Stop conditional control.
+ *                   Example: 0 - A stop condition will not be generated.
+ *                            1 - A stop condition will be generated.
+ * @return 0 in case of success, -1 otherwise.
+ */
+int32_t i2c_write(struct i2c_desc *desc,
+			uint8_t *data,
+			uint8_t bytes_number,
+			uint8_t stop_bit)
+{
+	if (!desc || !desc->platform_ops)
+		return -EINVAL;
+
+	if (!desc->platform_ops->i2c_ops_write)
+		return -ENOSYS;
+
+	return desc->platform_ops->i2c_ops_write(desc, data, bytes_number,
+			stop_bit);
+}
+
+/**
+ * @brief I2C Read data from slave device.
+ * @param desc - The i2c descriptor.
+ * @param data - The buffer with the transmitted/received data.
+ * @param bytes_number - Number of bytes to read.
+ * @param stop_bit - Stop conditional control.
+ *                   Example: 0 - A stop condition will not be generated.
+ *                            1 - A stop condition will be generated.
+ * @return 0 in case of success, -1 otherwise.
+ */
+int32_t i2c_read(struct i2c_desc *desc,
+		       uint8_t *data,
+		       uint8_t bytes_number,
+		       uint8_t stop_bit)
+{
+	if (!desc || !desc->platform_ops)
+		return -EINVAL;
+
+	if (!desc->platform_ops->i2c_ops_read)
+		return -ENOSYS;
+
+	return desc->platform_ops->i2c_ops_read(desc, data, bytes_number,
+						stop_bit);
+}

dj_f1_ad9371/vitis_classic_autobuild/source/drivers/api/irq.c

@@ -0,0 +1,229 @@
+/***************************************************************************//**
+ *   @file   irq.c
+ *   @brief  Implementation of the IRQ Interface
+ *   @author Andrei Porumb ([email protected])
+********************************************************************************
+ * Copyright 2021(c) Analog Devices, Inc.
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *  - Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *  - Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *  - Neither the name of Analog Devices, Inc. nor the names of its
+ *    contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *  - The use of this software may or may not infringe the patent rights
+ *    of one or more patent holders.  This license does not release you
+ *    from the requirement that you obtain separate licenses from these
+ *    patent holders to use this software.
+ *  - Use of the software either in source or binary form, must be run
+ *    on or directly connected to an Analog Devices Inc. component.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT,
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, INTELLECTUAL PROPERTY RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*******************************************************************************/
+
+#include <inttypes.h>
+#include <stdlib.h>
+#include "irq.h"
+#include "error.h"
+
+/**
+ * @brief Initialize the IRQ interrupts.
+ * @param desc - The IRQ descriptor.
+ * @param param - The structure that contains the IRQ parameters.
+ * @return 0 in case of success, -1 otherwise.
+ */
+int32_t irq_ctrl_init(struct irq_ctrl_desc **desc,
+			    const struct irq_init_param *param)
+{
+	int32_t ret;
+
+	if (!param || !param->platform_ops)
+		return -EINVAL;
+
+	if (!param->platform_ops->init)
+		return -ENOSYS;
+
+	ret = param->platform_ops->init(desc, param);
+	if (ret)
+		return ret;
+
+	(*desc)->platform_ops = param->platform_ops;
+
+	return 0;
+}
+
+/**
+ * @brief Free the resources allocated by irq_ctrl_init().
+ * @param desc - The SPI descriptor.
+ * @return 0 in case of success, -1 otherwise.
+ */
+int32_t irq_ctrl_remove(struct irq_ctrl_desc *desc)
+{
+	if (!desc || !desc->platform_ops)
+		return -EINVAL;
+
+	if (!desc->platform_ops->remove)
+		return -ENOSYS;
+
+	return desc->platform_ops->remove(desc);
+}
+
+/**
+ * @brief Register a callback to handle the irq events.
+ * @param desc - The IRQ controller descriptor.
+ * @param irq_id - Interrupt identifier.
+ * @param callback - Callback descriptor - platform specific type.
+ * @return SUCCESS in case of success, FAILURE otherwise.
+ */
+int32_t irq_register_callback(struct irq_ctrl_desc *desc,
+				    uint32_t irq_id,
+				    struct callback_desc *callback)
+{
+	if (!desc || !desc->platform_ops)
+		return -EINVAL;
+
+	if (!desc->platform_ops->register_callback)
+		return -ENOSYS;
+
+	return desc->platform_ops->register_callback(desc, irq_id, callback);
+}
+
+/**
+ * @brief Unregisters a generic IRQ handling function.
+ * @param desc - The IRQ controller descriptor.
+ * @param irq_id - Interrupt identifier.
+ * @param callback - Callback descriptor - platform specific type.
+ * @return SUCCESS in case of success, FAILURE otherwise.
+ */
+int32_t irq_unregister_callback(struct irq_ctrl_desc *desc,
+				      uint32_t irq_id,
+				      struct callback_desc *callback)
+{
+	if (!desc || !desc->platform_ops)
+		return -EINVAL;
+
+	if (!desc->platform_ops->unregister_callback)
+		return -ENOSYS;
+
+	return desc->platform_ops->unregister_callback(desc, irq_id, callback);
+}
+
+/**
+ * @brief Enable global interrupts.
+ * @return 0 in case of success, -1 otherwise.
+ */
+int32_t irq_global_enable(struct irq_ctrl_desc *desc)
+{
+	if (!desc || !desc->platform_ops)
+		return -EINVAL;
+
+	if (!desc->platform_ops->global_enable)
+		return -ENOSYS;
+
+	return desc->platform_ops->global_enable(desc);
+}
+
+/**
+ * @brief Disable global interrupts.
+ * @return 0 in case of success, -1 otherwise.
+ */
+int32_t irq_global_disable(struct irq_ctrl_desc *desc)
+{
+	if (!desc || !desc->platform_ops)
+		return -EINVAL;
+
+	if (!desc->platform_ops->global_disable)
+		return -ENOSYS;
+
+	return desc->platform_ops->global_disable(desc);
+}
+
+/**
+ * @brief Set interrupt trigger level.
+ * @param desc - The IRQ controller descriptor.
+ * @param irq_id - Interrupt identifier.
+ * @param trig - New trigger level for the interrupt.
+ * @return 0 in case of success, -1 otherwise.
+ */
+int32_t irq_trigger_level_set(struct irq_ctrl_desc *desc,
+				    uint32_t irq_id,
+				    enum irq_trig_level trig)
+{
+	if (!desc || !desc->platform_ops)
+		return -EINVAL;
+
+	if(!desc->platform_ops->trigger_level_set)
+		return -ENOSYS;
+
+	return desc->platform_ops->trigger_level_set(desc, irq_id, trig);
+}
+
+/**
+ * @brief Enable specific interrupt.
+ * @param desc - The IRQ controller descriptor.
+ * @param irq_id - Interrupt identifier.
+ * @return 0 in case of success, -1 otherwise.
+ */
+int32_t irq_enable(struct irq_ctrl_desc *desc, uint32_t irq_id)
+{
+	if (!desc || !desc->platform_ops)
+		return -EINVAL;
+
+	if (!desc->platform_ops->enable)
+		return -ENOSYS;
+
+	return desc->platform_ops->enable(desc, irq_id);
+}
+
+/**
+ * @brief Disable specific interrupt.
+ * @param desc - The IRQ controller descriptor.
+ * @param irq_id - Interrupt identifier.
+ * @return 0 in case of success, -1 otherwise.
+ */
+int32_t irq_disable(struct irq_ctrl_desc *desc, uint32_t irq_id)
+{
+	if (!desc || !desc->platform_ops)
+		return -EINVAL;
+
+	if (!desc->platform_ops->disable)
+		return -ENOSYS;
+
+	return desc->platform_ops->disable(desc, irq_id);
+}
+
+/**
+ * @brief Set the priority for an interrupt.
+ * @param desc - The IRQ controller descriptor.
+ * @param irq_id - Interrupt identifier.
+ * @param priority_level - The priority level of the interrupt.
+ * @return 0 in case of success, negative errno error codes.
+ */
+int32_t irq_set_priority(struct irq_ctrl_desc *desc,
+			       uint32_t irq_id,
+			       uint32_t priority_level)
+{
+	if (!desc || !desc->platform_ops)
+		return -EINVAL;
+
+	if (!desc->platform_ops->set_priority)
+		return -ENOSYS;
+
+	return desc->platform_ops->set_priority(desc, irq_id, priority_level);
+}

dj_f1_ad9371/vitis_classic_autobuild/source/drivers/api/spi.c

@@ -0,0 +1,161 @@
+/***************************************************************************//**
+ *   @file   spi.c
+ *   @brief  Implementation of the SPI Interface
+ *   @author Antoniu Miclaus ([email protected])
+********************************************************************************
+ * Copyright 2020(c) Analog Devices, Inc.
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *  - Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *  - Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *  - Neither the name of Analog Devices, Inc. nor the names of its
+ *    contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *  - The use of this software may or may not infringe the patent rights
+ *    of one or more patent holders.  This license does not release you
+ *    from the requirement that you obtain separate licenses from these
+ *    patent holders to use this software.
+ *  - Use of the software either in source or binary form, must be run
+ *    on or directly connected to an Analog Devices Inc. component.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT,
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, INTELLECTUAL PROPERTY RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*******************************************************************************/
+
+#include <inttypes.h>
+#include "spi.h"
+#include <stdlib.h>
+#include "error.h"
+
+/**
+ * @brief Initialize the SPI communication peripheral.
+ * @param desc - The SPI descriptor.
+ * @param param - The structure that contains the SPI parameters.
+ * @return 0 in case of success, -1 otherwise.
+ */
+int32_t spi_init(struct spi_desc **desc,
+		       const struct spi_init_param *param)
+{
+	int32_t ret;
+
+	if (!param || !param->platform_ops)
+		return -EINVAL;
+
+	if (!param->platform_ops->init)
+		return -ENOSYS;
+
+	ret = param->platform_ops->init(desc, param);
+	if (ret)
+		return ret;
+
+	(*desc)->platform_ops = param->platform_ops;
+	(*desc)->parent = param->parent;
+
+	return 0;
+}
+
+/**
+ * @brief Free the resources allocated by spi_init().
+ * @param desc - The SPI descriptor.
+ * @return 0 in case of success, -1 otherwise.
+ */
+int32_t spi_remove(struct spi_desc *desc)
+{
+	if (!desc || !desc->platform_ops)
+		return -EINVAL;
+
+	if (!desc->platform_ops->remove)
+		return -ENOSYS;
+
+	return desc->platform_ops->remove(desc);
+}
+
+/**
+ * @brief Write and read data to/from SPI.
+ * @param desc - The SPI descriptor.
+ * @param data - The buffer with the transmitted/received data.
+ * @param bytes_number - Number of bytes to write/read.
+ * @return 0 in case of success, -1 otherwise.
+ */
+int32_t spi_write_and_read(struct spi_desc *desc,
+				 uint8_t *data,
+				 uint16_t bytes_number)
+{
+	if (!desc || !desc->platform_ops)
+		return -EINVAL;
+
+	if (!desc->platform_ops->write_and_read)
+		return -ENOSYS;
+
+	return desc->platform_ops->write_and_read(desc, data, bytes_number);
+}
+
+/**
+ * @brief Write and read data to/from SPI in 3 wire mode.
+ * @param desc - The SPI descriptor.
+ * @param write_data - The buffer with the transmitted data.
+ * @param read_data - The buffer with the received data.
+ * @param write_bytes_number - Number of bytes to write.
+ * @param read_bytes_number - Number of bytes to read.
+ * @return SUCCESS in case of success, FAILURE otherwise.
+ */
+int32_t spi_write_and_read_3wire(struct spi_desc *desc,
+			   uint8_t *write_data,
+			   uint8_t *read_data,
+			   uint16_t write_bytes_number,
+			   uint16_t read_bytes_number)
+{
+	if (!desc || !desc->platform_ops)
+		return -EINVAL;
+
+	if (!desc->platform_ops->write_and_read_3wire)
+		return -ENOSYS;
+	return desc->platform_ops->write_and_read_3wire(desc, write_data, read_data,
+			write_bytes_number, read_bytes_number);
+}
+/**
+ * @brief  Iterate over head list and send all spi messages
+ * @param desc - The SPI descriptor.
+ * @param msgs - Array of messages.
+ * @param len - Number of messages in the array.
+ * @return 0 in case of success, negativ error code otherwise.
+ */
+int32_t spi_transfer(struct spi_desc *desc,
+			   struct spi_msg *msgs,
+			   uint32_t len)
+{
+	int32_t  ret;
+	uint32_t i;
+
+	if (!desc || !desc->platform_ops)
+		return -EINVAL;
+
+	if (desc->platform_ops->transfer)
+		return desc->platform_ops->transfer(desc, msgs, len);
+
+	for (i = 0; i < len; i++) {
+		if (msgs[i].rx_buff != msgs[i].tx_buff || !msgs[i].tx_buff)
+			return -EINVAL;
+		ret = spi_write_and_read(desc, msgs[i].rx_buff,
+					       msgs[i].bytes_number);
+		if (IS_ERR_VALUE(ret))
+			return ret;
+	}
+
+	return 0;
+}

dj_f1_ad9371/vitis_classic_autobuild/source/drivers/api/timer.c

@@ -0,0 +1,211 @@
+/***************************************************************************//**
+*   @file   timer.c
+*   @brief  Implementation of the timer Interface
+*   @author RBolboac ([email protected])
+********************************************************************************
+* Copyright 2022(c) Analog Devices, Inc.
+*
+* All rights reserved.
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions are met:
+*  - Redistributions of source code must retain the above copyright
+*    notice, this list of conditions and the following disclaimer.
+*  - Redistributions in binary form must reproduce the above copyright
+*    notice, this list of conditions and the following disclaimer in
+*    the documentation and/or other materials provided with the
+*    distribution.
+*  - Neither the name of Analog Devices, Inc. nor the names of its
+*    contributors may be used to endorse or promote products derived
+*    from this software without specific prior written permission.
+*  - The use of this software may or may not infringe the patent rights
+*    of one or more patent holders.  This license does not release you
+*    from the requirement that you obtain separate licenses from these
+*    patent holders to use this software.
+*  - Use of the software either in source or binary form, must be run
+*    on or directly connected to an Analog Devices Inc. component.
+*
+* THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR IMPLIED
+* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT, MERCHANTABILITY
+* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+* IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+* LIMITED TO, INTELLECTUAL PROPERTY RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR
+* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*******************************************************************************/
+
+/******************************************************************************/
+/***************************** Include Files **********************************/
+/******************************************************************************/
+#include "error.h"
+#include "timer.h"
+
+/******************************************************************************/
+/************************ Functions Definitions *******************************/
+/******************************************************************************/
+/**
+ * @brief Initialize hardware timer and the handler structure associated with
+ *        it.
+ * @param [out] desc - Pointer to the reference of the device handler.
+ * @param [in] param - Initialization structure.
+ * @return 0 in case of success, negative error code otherwise
+ */
+int32_t timer_init(struct timer_desc **desc,
+			 struct timer_init_param *param)
+{
+	int32_t ret;
+
+	if (!param || !param->platform_ops)
+		return -EINVAL;
+
+	if (!param->platform_ops->init)
+		return -ENOSYS;
+
+	ret = param->platform_ops->init(desc, param);
+	if (ret)
+		return ret;
+
+	(*desc)->platform_ops = param->platform_ops;
+
+	return 0;
+}
+
+/**
+ * @brief Free the memory allocated by timer_init().
+ * @param [in] desc - Pointer to the device handler.
+ * @return 0 in case of success, negative error code otherwise
+ */
+int32_t timer_remove(struct timer_desc *desc)
+{
+	if (!desc || !desc->platform_ops)
+		return -EINVAL;
+
+	if (!desc->platform_ops->remove)
+		return -ENOSYS;
+
+	return desc->platform_ops->remove(desc);
+}
+
+/**
+ * @brief Start a timer.
+ * @param [in] desc - Pointer to the device handler.
+ * @return 0 in case of success, negative error code otherwise
+ */
+int32_t timer_start(struct timer_desc *desc)
+{
+	if (!desc || !desc->platform_ops)
+		return -EINVAL;
+
+	if (!desc->platform_ops->start)
+		return -ENOSYS;
+
+	return desc->platform_ops->start(desc);
+}
+
+/**
+ * @brief Stop a timer from counting.
+ * @param [in] desc - Pointer to the device handler.
+ * @return 0 in case of success, negative error code otherwise
+ */
+int32_t timer_stop(struct timer_desc *desc)
+{
+	if (!desc || !desc->platform_ops)
+		return -EINVAL;
+
+	if (!desc->platform_ops->stop)
+		return -ENOSYS;
+
+	return desc->platform_ops->stop(desc);
+}
+
+/**
+ * @brief Get the value of the counter register for the timer.
+ * @param [in]  desc    - Pointer to the device handler.
+ * @param [out] counter - Pointer to the counter value.
+ * @return 0 in case of success, error code otherwise.
+ */
+int32_t timer_counter_get(struct timer_desc *desc,
+				uint32_t *counter)
+{
+	if (!desc || !desc->platform_ops || !counter)
+		return -EINVAL;
+
+	if (!desc->platform_ops->counter_get)
+		return -ENOSYS;
+
+	return desc->platform_ops->counter_get(desc, counter);
+}
+
+/**
+ * @brief Set the timer counter register value.
+ * @param [in] desc    - Pointer to the device handler.
+ * @param [in] new_val - The new value of the counter register.
+ * @return 0 in case of success, error code otherwise.
+ */
+int32_t timer_counter_set(struct timer_desc *desc, uint32_t new_val)
+{
+	if (!desc || !desc->platform_ops)
+		return -EINVAL;
+
+	if (!desc->platform_ops->counter_set)
+		return -ENOSYS;
+
+	return desc->platform_ops->counter_set(desc, new_val);
+}
+
+/**
+ * @brief Get the timer clock frequency.
+ * @param [in]  desc    - Pointer to the device handler.
+ * @param [out] freq_hz - The value in Hz of the timer clock.
+ * @return 0 in case of success, error code otherwise.
+ */
+int32_t timer_count_clk_get(struct timer_desc *desc,
+				  uint32_t *freq_hz)
+{
+	if (!desc || !desc->platform_ops || !freq_hz)
+		return -EINVAL;
+
+	if (!desc->platform_ops->count_clk_get)
+		return -ENOSYS;
+
+	return desc->platform_ops->count_clk_get(desc, freq_hz);
+}
+
+/**
+ * @brief Set the timer clock frequency.
+ * @param [in] desc    - Pointer to the device handler.
+ * @param [in] freq_hz - The value in Hz of the new timer clock.
+ * @return 0 in case of success, error code otherwise.
+ */
+int32_t timer_count_clk_set(struct timer_desc *desc,
+				  uint32_t freq_hz)
+{
+	if (!desc || !desc->platform_ops)
+		return -EINVAL;
+
+	if (!desc->platform_ops->count_clk_set)
+		return -ENOSYS;
+
+	return desc->platform_ops->count_clk_set(desc, freq_hz);
+}
+
+/**
+ * @brief Get the elapsed time in nsec for the timer.
+ * @param [in] desc         - Pointer to the device handler.
+ * @param [in] elapsed_time - The elapsed time in nsec.
+ * @return 0 in case of success, error code otherwise.
+ */
+int32_t timer_get_elapsed_time_nsec(struct timer_desc *desc,
+		uint64_t *elapsed_time)
+{
+	if (!desc || !desc->platform_ops)
+		return -EINVAL;
+
+	if (!desc->platform_ops->get_elapsed_time_nsec)
+		return -ENOSYS;
+
+	return desc->platform_ops->get_elapsed_time_nsec(desc, elapsed_time);
+}

dj_f1_ad9371/vitis_classic_autobuild/source/drivers/api/trng.c

@@ -0,0 +1,111 @@
+/***************************************************************************//**
+ *   @file   trng.c
+ *   @brief  Implementation of the TRNG Interface
+ *   @author Antoniu Miclaus ([email protected])
+********************************************************************************
+ * Copyright 2023(c) Analog Devices, Inc.
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *  - Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *  - Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *  - Neither the name of Analog Devices, Inc. nor the names of its
+ *    contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *  - The use of this software may or may not infringe the patent rights
+ *    of one or more patent holders.  This license does not release you
+ *    from the requirement that you obtain separate licenses from these
+ *    patent holders to use this software.
+ *  - Use of the software either in source or binary form, must be run
+ *    on or directly connected to an Analog Devices Inc. component.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT,
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, INTELLECTUAL PROPERTY RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*******************************************************************************/
+
+/******************************************************************************/
+/***************************** Include Files **********************************/
+/******************************************************************************/
+#include <inttypes.h>
+#include "trng.h"
+#include <stdlib.h>
+#include "error.h"
+
+/******************************************************************************/
+/************************ Functions Definitions *******************************/
+/******************************************************************************/
+
+/**
+ * @brief Initialize the TRNG.
+ * @param desc - The TRNG descriptor.
+ * @param param - The structure that contains the TRNG parameters.
+ * @return 0 in case of success, -1 otherwise.
+ */
+int trng_init(struct trng_desc **desc,
+		    const struct trng_init_param *param)
+{
+	int ret;
+
+	if (!param || !param->platform_ops)
+		return -EINVAL;
+
+	if (!param->platform_ops->init)
+		return -ENOSYS;
+
+	ret = param->platform_ops->init(desc, param);
+	if (ret)
+		return ret;
+
+	(*desc)->platform_ops = param->platform_ops;
+
+	return 0;
+}
+
+/**
+ * @brief Free the resources allocated by trng_init().
+ * @param desc - The TRNG descriptor.
+ * @return 0 in case of success, -1 otherwise.
+ */
+int trng_remove(struct trng_desc *desc)
+{
+	if (!desc || !desc->platform_ops)
+		return -EINVAL;
+
+	if (!desc->platform_ops->remove)
+		return -ENOSYS;
+
+	return desc->platform_ops->remove(desc);
+}
+
+/**
+ * @brief Fill buffer with rng data.
+ * @param desc - The TRNG descriptor.
+ * @param buff - Buffer to be filled
+ * @param len - Size of the buffer
+ * @return 0 in case of success, -1 otherwise.
+ */
+int trng_fill_buffer(struct trng_desc *desc, uint8_t *buff,
+			   uint32_t len)
+{
+	if (!desc || !desc->platform_ops)
+		return -EINVAL;
+
+	if (!desc->platform_ops->fill_buffer)
+		return -ENOSYS;
+
+	return desc->platform_ops->fill_buffer(desc, buff, len);
+}

dj_f1_ad9371/vitis_classic_autobuild/source/drivers/axi_core/axi_dmac/axi_dmac.c

@@ -0,0 +1,547 @@
+/*******************************************************************************
+ *   @file   axi_dmac.c
+ *   @brief  Driver for the Analog Devices AXI-DMAC core.
+ *   @author DBogdan ([email protected])
+********************************************************************************
+ * Copyright 2018(c) Analog Devices, Inc.
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *  - Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *  - Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *  - Neither the name of Analog Devices, Inc. nor the names of its
+ *    contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *  - The use of this software may or may not infringe the patent rights
+ *    of one or more patent holders.  This license does not release you
+ *    from the requirement that you obtain separate licenses from these
+ *    patent holders to use this software.
+ *  - Use of the software either in source or binary form, must be run
+ *    on or directly connected to an Analog Devices Inc. component.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT,
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, INTELLECTUAL PROPERTY RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*******************************************************************************/
+
+/******************************************************************************/
+/***************************** Include Files **********************************/
+/******************************************************************************/
+#include <stdlib.h>
+#include <stdio.h>
+#include <stdbool.h>
+#include <stdint.h>
+#include "axi_io.h"
+#include "error.h"
+#include "delay.h"
+#include "axi_dmac.h"
+
+/*******************************************************************************
+ * @brief ISR for dev to mem DMA transfer. It computes the next transfer params,
+ *			if any, and sets the transfer structure fields accordingly.
+ *
+ * @param instance - the instance that triggered the ISR.
+ *
+ * @return None.
+*******************************************************************************/
+void axi_dmac_dev_to_mem_isr(void *instance)
+{
+	struct axi_dmac *dmac = (struct axi_dmac *)instance;
+	uint32_t burst_size;
+	uint32_t reg_val;
+
+	/* Get interrupt sources and clear interrupts. */
+	axi_dmac_read(dmac, AXI_DMAC_REG_IRQ_PENDING, &reg_val);
+	axi_dmac_write(dmac, AXI_DMAC_REG_IRQ_PENDING, reg_val);
+
+	if (reg_val & AXI_DMAC_IRQ_SOT) {
+		if (dmac->remaining_size) {
+			/* See if remaining size is bigger than max transfer size and
+			 * set burst size. */
+			if (dmac->remaining_size > dmac->max_length) {
+				burst_size = dmac->max_length;
+			} else {
+				burst_size = dmac->remaining_size - 1;
+			}
+
+			/* The current transfer was started; set up the new one. */
+			axi_dmac_write(dmac, AXI_DMAC_REG_DEST_ADDRESS, dmac->next_dest_addr);
+			axi_dmac_write(dmac, AXI_DMAC_REG_DEST_STRIDE, 0x0);
+			axi_dmac_write(dmac, AXI_DMAC_REG_X_LENGTH, burst_size);
+			axi_dmac_write(dmac, AXI_DMAC_REG_Y_LENGTH, 0x0);
+
+			/* Compute size of the next transfer. */
+			dmac->remaining_size = dmac->remaining_size - (burst_size + 1);
+			/* Address must advance with +1 since the DMAC writes X_LENGTH+1. */
+			dmac->next_dest_addr = dmac->next_dest_addr + (burst_size + 1);
+
+			/* Trigger the next transfer. */
+			axi_dmac_write(dmac, AXI_DMAC_REG_TRANSFER_SUBMIT, AXI_DMAC_TRANSFER_SUBMIT);
+		}
+	}
+	if (reg_val & AXI_DMAC_IRQ_EOT) {
+		if (!dmac->remaining_size) {
+			dmac->transfer.transfer_done = true;
+			dmac->next_dest_addr = 0;
+		}
+	}
+}
+
+/*******************************************************************************
+ * @brief ISR for mem DMA to dev transfer. It computes the next transfer params,
+ *			if any, and sets the transfer structure fields accordingly.
+ *
+ * @param instance - the instance that triggered the ISR.
+ *
+ * @return None.
+*******************************************************************************/
+void axi_dmac_mem_to_dev_isr(void *instance)
+{
+	struct axi_dmac *dmac = (struct axi_dmac *)instance;
+	uint32_t burst_size;
+	uint32_t reg_val;
+
+	/* Get interrupt sources and clear interrupts. */
+	axi_dmac_read(dmac, AXI_DMAC_REG_IRQ_PENDING, &reg_val);
+	axi_dmac_write(dmac, AXI_DMAC_REG_IRQ_PENDING, reg_val);
+
+	if (reg_val & AXI_DMAC_IRQ_SOT) {
+		if ((dmac->transfer.cyclic == CYCLIC) &&
+		    (dmac->next_src_addr >= (dmac->init_addr + dmac->transfer.size - 1))) {
+			dmac->remaining_size = dmac->transfer.size;
+			dmac->next_src_addr = dmac->init_addr;
+		}
+
+		if (dmac->remaining_size) {
+			/** See if remaining size is bigger than max transfer size and
+			 * set burst size. */
+			if (dmac->remaining_size > dmac->max_length) {
+				burst_size = dmac->max_length;
+			} else {
+				burst_size = dmac->remaining_size - 1;
+			}
+
+			/* The current transfer was started; set up the new one. */
+			axi_dmac_write(dmac, AXI_DMAC_REG_SRC_ADDRESS, dmac->next_src_addr);
+			axi_dmac_write(dmac, AXI_DMAC_REG_SRC_STRIDE, 0x0);
+			axi_dmac_write(dmac, AXI_DMAC_REG_X_LENGTH, burst_size);
+			axi_dmac_write(dmac, AXI_DMAC_REG_Y_LENGTH, 0x0);
+
+			/* Compute parameters for the next transfer. */
+			dmac->remaining_size = dmac->remaining_size - (burst_size + 1);
+			/* Address must advance with +1 since the DMAC writes X_LENGTH+1. */
+			dmac->next_src_addr = dmac->next_src_addr + (burst_size + 1);
+
+			/* Trigger the current transfer */
+			axi_dmac_write(dmac, AXI_DMAC_REG_TRANSFER_SUBMIT, AXI_DMAC_TRANSFER_SUBMIT);
+		}
+	}
+	if (reg_val & AXI_DMAC_IRQ_EOT) {
+		if ((!dmac->remaining_size) && (dmac->transfer.cyclic != CYCLIC)) {
+			dmac->transfer.transfer_done = true;
+			dmac->next_src_addr = 0;
+		}
+	}
+}
+
+/*******************************************************************************
+ * @brief ISR for mem DMA to mem DMA transfer. It computes the next transfer
+ *			params, if any, and sets the transfer structure fields accordingly.
+ *
+ * @param instance - the instance that triggered the ISR.
+ *
+ * @return None.
+*******************************************************************************/
+void axi_dmac_mem_to_mem_isr(void *instance)
+{
+	struct axi_dmac *dmac = (struct axi_dmac *)instance;
+	uint32_t burst_size;
+	uint32_t reg_val;
+
+	/* Get interrupt sources and clear interrupts. */
+	axi_dmac_read(dmac, AXI_DMAC_REG_IRQ_PENDING, &reg_val);
+	axi_dmac_write(dmac, AXI_DMAC_REG_IRQ_PENDING, reg_val);
+
+	if (reg_val & AXI_DMAC_IRQ_SOT) {
+		if (dmac->remaining_size) {
+			/** See if remaining size is bigger than max transfer size and
+			 * set burst size. */
+			if (dmac->remaining_size > dmac->max_length) {
+				burst_size = dmac->max_length;
+			} else {
+				burst_size = dmac->remaining_size - 1;
+			}
+
+			/* The current transfer was started; set up the new one. */
+			axi_dmac_write(dmac, AXI_DMAC_REG_SRC_ADDRESS, dmac->next_src_addr);
+			axi_dmac_write(dmac, AXI_DMAC_REG_SRC_STRIDE, 0x0);
+			axi_dmac_write(dmac, AXI_DMAC_REG_DEST_ADDRESS, dmac->next_dest_addr);
+			axi_dmac_write(dmac, AXI_DMAC_REG_DEST_STRIDE, 0x0);
+			axi_dmac_write(dmac, AXI_DMAC_REG_X_LENGTH, burst_size);
+			axi_dmac_write(dmac, AXI_DMAC_REG_Y_LENGTH, 0x0);
+
+			/* Compute parameters for the next transfer. */
+			dmac->remaining_size = dmac->remaining_size - (burst_size + 1);
+			/* Address must advance with +1 since the DMAC writes X_LENGTH+1. */
+			dmac->next_src_addr = dmac->next_src_addr + (burst_size + 1);
+			dmac->next_dest_addr = dmac->next_dest_addr + (burst_size + 1);
+
+			/* If transfer finished advance src address so that transfer_done can be set*/
+			if (!dmac->remaining_size) {
+				dmac->next_src_addr = dmac->next_src_addr + (burst_size + 1);
+			}
+
+			/* Trigger the current transfer */
+			axi_dmac_write(dmac, AXI_DMAC_REG_TRANSFER_SUBMIT, AXI_DMAC_TRANSFER_SUBMIT);
+		}
+	}
+	if (reg_val & AXI_DMAC_IRQ_EOT) {
+		if (!dmac->remaining_size) {
+			if(dmac->next_src_addr > (dmac->init_addr + dmac->transfer.size)) {
+				dmac->transfer.transfer_done = true;
+				dmac->next_src_addr = 0;
+				dmac->next_dest_addr = 0;
+			}
+		}
+	}
+}
+
+/*******************************************************************************
+ * @brief Wrapper for AXI IO through UIO/devmem read function.
+ *
+ * @param dmac - DMAC istance containing UIO index (/dev/uioX)/base address.
+ * @param reg_addr - Address to read from.
+ * @param reg_data - Location where read data will be stored.
+ *
+ * @return 0 - success.
+*******************************************************************************/
+int32_t axi_dmac_read(struct axi_dmac *dmac,
+		      uint32_t reg_addr,
+		      uint32_t *reg_data)
+{
+	axi_io_read(dmac->base, reg_addr, reg_data);
+
+	return 0;
+}
+
+/*******************************************************************************
+ * @brief Wrapper for AXI IO through UIO/devmem wrrite function.
+ *
+ * @param dmac - DMAC istance containing UIO index (/dev/uioX)/base address.
+ * @param reg_addr - Address to write to.
+ * @param reg_data - Data to be written.
+ *
+ * @return 0 - success.
+*******************************************************************************/
+int32_t axi_dmac_write(struct axi_dmac *dmac,
+		       uint32_t reg_addr,
+		       uint32_t reg_data)
+{
+	axi_io_write(dmac->base, reg_addr, reg_data);
+
+	return 0;
+}
+
+/*******************************************************************************
+ * @brief Get transfer status (value of dmac->transfer.transfer_done flag).
+ *
+ * @note This function should not be used if DMA IRQ is not used.
+ *
+ * @param dmac - DMAC istance.
+ * @param rdy - Transfer status (0 - not ready, 1 - ready).
+ *
+ * @return 0 - success.
+*******************************************************************************/
+int32_t axi_dmac_is_transfer_ready(struct axi_dmac *dmac, bool *rdy)
+{
+	*rdy = dmac->transfer.transfer_done;
+
+	return 0;
+}
+
+/*******************************************************************************
+ * @brief Get DMAC capabilities.
+ *
+ * @param dmac - DMAC istance.
+ *
+ * @return 0 for success, -1 in case of failure.
+*******************************************************************************/
+static int32_t axi_dmac_detect_caps(struct axi_dmac *dmac)
+{
+	uint32_t reg_val, initial_reg_val = 0;
+	uint32_t src_mem_mapped = 0;
+	uint32_t dest_mem_mapped = 0;
+
+	dmac->max_length = -1;
+	dmac->direction = INVALID_DIR;
+
+	/* Check if HW cyclic possible */
+	axi_dmac_read(dmac, AXI_DMAC_REG_FLAGS, &initial_reg_val);
+	axi_dmac_write(dmac, AXI_DMAC_REG_FLAGS, DMA_CYCLIC);
+	axi_dmac_read(dmac, AXI_DMAC_REG_FLAGS, &reg_val);
+	if (reg_val == DMA_CYCLIC)
+		dmac->hw_cyclic = true;
+	/* Restore initial value for AXI_DMAC_REG_FLAGS register */
+	axi_dmac_write(dmac, AXI_DMAC_REG_FLAGS, initial_reg_val);
+
+	/* Get maximum burst size and set value. */
+	axi_dmac_write(dmac, AXI_DMAC_REG_X_LENGTH, dmac->max_length);
+	axi_dmac_read(dmac, AXI_DMAC_REG_X_LENGTH, &dmac->max_length);
+
+	/* Get transfer direction and set value. */
+	axi_dmac_write(dmac, AXI_DMAC_REG_DEST_ADDRESS, 0xffffffff);
+	axi_dmac_read(dmac, AXI_DMAC_REG_DEST_ADDRESS, &dest_mem_mapped);
+	axi_dmac_write(dmac, AXI_DMAC_REG_SRC_ADDRESS, 0xffffffff);
+	axi_dmac_read(dmac, AXI_DMAC_REG_SRC_ADDRESS, &src_mem_mapped);
+
+	if (dest_mem_mapped && !src_mem_mapped) {
+		dmac->direction = DMA_DEV_TO_MEM;
+	} else if (!dest_mem_mapped && src_mem_mapped) {
+		dmac->direction = DMA_MEM_TO_DEV;
+	} else if (dest_mem_mapped && src_mem_mapped) {
+		dmac->direction = DMA_MEM_TO_MEM;
+	} else {
+		printf("Destination and source memory-mapped interfaces not supported.\n");
+		return -1;
+	}
+	return 0;
+}
+
+/*******************************************************************************
+ * @brief Get transfer status (value of dmac->transfer.transfer_done flag).
+ *
+ * @param dmac_core - DMAC istance.
+ * @param init - Structure containing initializing data.
+ *
+ * @return 0 for success, -1 in case of failure.
+*******************************************************************************/
+int32_t axi_dmac_init(struct axi_dmac **dmac_core,
+		      const struct axi_dmac_init *init)
+{
+	struct axi_dmac *dmac;
+
+	dmac = (struct axi_dmac *)calloc(1, sizeof(*dmac));
+	if (!dmac)
+		return -1;
+
+	dmac->name = init->name;
+	dmac->base = init->base;
+	dmac->irq_option = init->irq_option;
+
+	*dmac_core = dmac;
+
+	int32_t status = axi_dmac_detect_caps(*dmac_core);
+	if (status < 0)
+		return -1;
+
+	return 0;
+}
+
+/*******************************************************************************
+ * @brief Remove the DMAC instance.
+ *
+ * @param dmac - DMAC istance.
+ *
+ * @return 0 for success, -1 in case of failure.
+*******************************************************************************/
+int32_t axi_dmac_remove(struct axi_dmac *dmac)
+{
+	if (!dmac)
+		return -1;
+
+	free(dmac);
+
+	return 0;
+}
+
+/*******************************************************************************
+ * @brief Start a DMA transfer.
+ *
+ * @param dmac - DMAC istance.
+ * @param dma_transfer - Structure containing transfer details.
+ *
+ * @return 0 for success, -1 in case of failure.
+*******************************************************************************/
+int32_t axi_dmac_transfer_start(struct axi_dmac *dmac,
+				struct axi_dma_transfer *dma_transfer)
+{
+	uint32_t reg_val, burst_size;
+
+	if (dma_transfer->size == 0)
+		return 0; /* Nothing to do. */
+
+	/* Set current transfer parameters. */
+	dmac->transfer.size = dma_transfer->size;
+	dmac->transfer.cyclic = dma_transfer->cyclic;
+	dmac->transfer.dest_addr = dma_transfer->dest_addr;
+	dmac->transfer.src_addr = dma_transfer->src_addr;
+
+	dmac->remaining_size = dma_transfer->size;
+	dmac->next_dest_addr = dma_transfer->dest_addr;
+	dmac->next_src_addr = dma_transfer->src_addr;
+
+	/* If HW cyclic transfer selected and not available, show error */
+	/* HW cyclic transfer available only for MEM to DEV transfers. */
+	if ((!dmac->hw_cyclic) && (dma_transfer->cyclic == CYCLIC)) {
+		printf("Transfer mode not supported!\n");
+		return -1;
+	}
+
+	/* Cyclic transfers not possible for DEV_TO_MEM and MEM_TO_MEM transmissions. */
+	if ((dmac->direction == DMA_DEV_TO_MEM)
+	    || (dmac->direction == DMA_MEM_TO_MEM)) {
+		if (dma_transfer->cyclic == CYCLIC) {
+			printf("Transfer mode not supported!\n");
+			return -1;
+		}
+	}
+
+	/* Cyclic transfers set to HW or SW depending on size for MEM to DEV. */
+	if ((dmac->direction == DMA_MEM_TO_DEV) && (dmac->transfer.cyclic == CYCLIC)) {
+		if ((dmac->remaining_size - 1) <= dmac->max_length) {
+			if (dmac->hw_cyclic) {
+				axi_dmac_read(dmac, AXI_DMAC_REG_FLAGS, &reg_val);
+				reg_val = reg_val | DMA_CYCLIC;
+				axi_dmac_write(dmac, AXI_DMAC_REG_FLAGS, reg_val);
+			}
+		} else {
+			axi_dmac_read(dmac, AXI_DMAC_REG_FLAGS, &reg_val);
+			reg_val = reg_val & ~DMA_CYCLIC;
+			axi_dmac_write(dmac, AXI_DMAC_REG_FLAGS, reg_val);
+		}
+	}
+
+	/* Enable DMA if not already enabled. */
+	axi_dmac_read(dmac, AXI_DMAC_REG_CTRL, &reg_val);
+	if (!(reg_val & AXI_DMAC_CTRL_ENABLE)) {
+		axi_dmac_write(dmac, AXI_DMAC_REG_CTRL, 0x0);
+		axi_dmac_write(dmac, AXI_DMAC_REG_CTRL, AXI_DMAC_CTRL_ENABLE);
+		axi_dmac_write(dmac, AXI_DMAC_REG_IRQ_MASK, 0x0);
+	}
+
+	axi_dmac_read(dmac, AXI_DMAC_REG_TRANSFER_SUBMIT, &reg_val);
+	/* If we don't have a start of transfer then start compute
+	 * values and trigger next transfer. */
+	if (!(reg_val & AXI_DMAC_QUEUE_FULL)) {
+		switch (dmac->direction) {
+		case DMA_DEV_TO_MEM:
+			dmac->init_addr = dmac->next_dest_addr;
+			axi_dmac_write(dmac, AXI_DMAC_REG_DEST_ADDRESS, dmac->next_dest_addr);
+			axi_dmac_write(dmac, AXI_DMAC_REG_DEST_STRIDE, 0x0);
+			break;
+		case DMA_MEM_TO_DEV:
+			dmac->init_addr = dmac->next_src_addr;
+			axi_dmac_write(dmac, AXI_DMAC_REG_SRC_ADDRESS, dmac->next_src_addr);
+			axi_dmac_write(dmac, AXI_DMAC_REG_SRC_STRIDE, 0x0);
+			break;
+		case DMA_MEM_TO_MEM:
+			dmac->init_addr = dmac->next_src_addr;
+			axi_dmac_write(dmac, AXI_DMAC_REG_DEST_ADDRESS, dmac->next_dest_addr);
+			axi_dmac_write(dmac, AXI_DMAC_REG_DEST_STRIDE, 0x0);
+			axi_dmac_write(dmac, AXI_DMAC_REG_SRC_ADDRESS, dmac->next_src_addr);
+			axi_dmac_write(dmac, AXI_DMAC_REG_SRC_STRIDE, 0x0);
+			break;
+		default:
+			return -1; /* Other directions are not supported yet. */
+		}
+
+		/* Compute the burst size. */
+		if (dmac->remaining_size > dmac->max_length) {
+			burst_size = dmac->max_length;
+		} else {
+			burst_size = dmac->remaining_size - 1;
+		}
+
+		/* Compute next address (src or dest, or both, depending on type of transfer). */
+		switch (dmac->direction) {
+		case DMA_DEV_TO_MEM:
+			dmac->next_dest_addr = dmac->next_dest_addr + (burst_size + 1);
+			break;
+		case DMA_MEM_TO_DEV:
+			dmac->next_src_addr = dmac->next_src_addr + (burst_size + 1);
+			break;
+		case DMA_MEM_TO_MEM:
+			dmac->next_dest_addr = dmac->next_dest_addr + (burst_size + 1);
+			dmac->next_src_addr = dmac->next_src_addr + (burst_size + 1);
+			break;
+		default:
+			return -1;
+		}
+
+		/* Compute remaining size. */
+		dmac->remaining_size = dmac->remaining_size - (burst_size + 1);
+
+		/* Specify the length of the transfer and trigger transfer. */
+		axi_dmac_write(dmac, AXI_DMAC_REG_X_LENGTH, burst_size);
+		axi_dmac_write(dmac, AXI_DMAC_REG_Y_LENGTH, 0x0);
+		axi_dmac_write(dmac, AXI_DMAC_REG_TRANSFER_SUBMIT, AXI_DMAC_TRANSFER_SUBMIT);
+	} else {
+		return -1;
+	}
+
+	return 0;
+}
+
+/*******************************************************************************
+ * @brief Wait for DMA transfer to be completed.
+ *
+ * @param dmac - DMAC istance.
+ * @param timeout_ms - Number of ms to wait for completion of transfer.
+ *
+ * @return 0 for success, -1 in case trasnfer not completed in specified time.
+*******************************************************************************/
+int32_t axi_dmac_transfer_wait_completion(struct axi_dmac *dmac,
+		uint32_t timeout_ms)
+{
+	uint32_t timeout = 0;
+	uint32_t reg_val = 0;
+
+	if (dmac->irq_option == IRQ_ENABLED) {
+		while (!dmac->transfer.transfer_done) {
+			timeout++;
+			mdelay(1);
+			if (timeout == timeout_ms) {
+				printf("Error transferring data using DMA.\n");
+				return -1;
+			}
+		}
+	} else if (dmac->irq_option == IRQ_DISABLED) {
+		axi_dmac_read(dmac, AXI_DMAC_REG_IRQ_PENDING, &reg_val);
+		while (reg_val != (AXI_DMAC_IRQ_SOT | AXI_DMAC_IRQ_EOT)) {
+			timeout++;
+			mdelay(1);
+			if (timeout == timeout_ms) {
+				printf("Error transferring data using DMA.\n");
+				return -1;
+			}
+			axi_dmac_read(dmac, AXI_DMAC_REG_IRQ_PENDING, &reg_val);
+		}
+	}
+
+	return 0;
+}
+
+/*******************************************************************************
+ * @brief Stop a DMA transfer.
+ *
+ * @param dmac - DMAC istance.
+ *
+ * @return None
+*******************************************************************************/
+void axi_dmac_transfer_stop(struct axi_dmac *dmac)
+{
+	axi_dmac_write(dmac, AXI_DMAC_REG_CTRL, AXI_DMAC_CTRL_DISABLE);
+}

dj_f1_ad9371/vitis_classic_autobuild/source/drivers/axi_core/axi_dmac/axi_dmac.h

@@ -0,0 +1,156 @@
+/***************************************************************************//**
+ *   @file   axi_dmac.h
+ *   @brief  Driver for the Analog Devices AXI-DMAC core.
+ *   @author DBogdan ([email protected])
+********************************************************************************
+ * Copyright 2018(c) Analog Devices, Inc.
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *  - Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *  - Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *  - Neither the name of Analog Devices, Inc. nor the names of its
+ *    contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *  - The use of this software may or may not infringe the patent rights
+ *    of one or more patent holders.  This license does not release you
+ *    from the requirement that you obtain separate licenses from these
+ *    patent holders to use this software.
+ *  - Use of the software either in source or binary form, must be run
+ *    on or directly connected to an Analog Devices Inc. component.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT,
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, INTELLECTUAL PROPERTY RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*******************************************************************************/
+#ifndef AXI_DMAC_H_
+#define AXI_DMAC_H_
+
+/******************************************************************************/
+/***************************** Include Files **********************************/
+/******************************************************************************/
+#include <stdint.h>
+#include "util.h"
+
+/******************************************************************************/
+/********************** Macros and Constants Definitions **********************/
+/******************************************************************************/
+#define AXI_DMAC_REG_IRQ_MASK		0x80
+#define AXI_DMAC_REG_IRQ_PENDING	0x84
+#define AXI_DMAC_IRQ_SOT			BIT(0)
+#define AXI_DMAC_IRQ_EOT			BIT(1)
+
+#define AXI_DMAC_REG_INTF_DESC		0x010
+#define AXI_DMAC_DMA_TYPE_DEST		GENMASK(5,4)
+#define AXI_DMAC_DMA_TYPE_SRC		GENMASK(13,12)
+//Define macro for src and dest
+
+#define AXI_DMAC_REG_CTRL			0x400
+#define AXI_DMAC_CTRL_ENABLE		BIT(0)
+#define AXI_DMAC_CTRL_DISABLE		0u
+#define AXI_DMAC_CTRL_PAUSE			BIT(1)
+
+#define AXI_DMAC_REG_TRANSFER_ID		0x404
+#define AXI_DMAC_REG_TRANSFER_SUBMIT	0x408
+#define AXI_DMAC_TRANSFER_SUBMIT		BIT(0)
+#define AXI_DMAC_QUEUE_FULL				BIT(0)
+#define AXI_DMAC_REG_FLAGS				0x40c
+#define AXI_DMAC_REG_DEST_ADDRESS		0x410
+#define AXI_DMAC_REG_SRC_ADDRESS		0x414
+#define AXI_DMAC_REG_X_LENGTH			0x418
+#define AXI_DMAC_REG_Y_LENGTH			0x41c
+#define AXI_DMAC_REG_DEST_STRIDE		0x420
+#define AXI_DMAC_REG_SRC_STRIDE			0x424
+#define AXI_DMAC_REG_TRANSFER_DONE		0x428
+
+/******************************************************************************/
+/*************************** Types Declarations *******************************/
+/******************************************************************************/
+enum use_irq {
+	IRQ_DISABLED = 0,
+	IRQ_ENABLED = 1
+};
+
+enum dma_direction {
+	INVALID_DIR = 0,
+	DMA_DEV_TO_MEM = 1,
+	DMA_MEM_TO_DEV = 2,
+	DMA_MEM_TO_MEM = 3
+};
+
+enum dma_flags {
+	DMA_CYCLIC = 1,
+	DMA_LAST = 2,
+	DMA_PARTIAL_REPORTING_EN = 4
+};
+
+// Could be transformed to a bool
+enum cyclic_transfer {
+	NO = 0,
+	CYCLIC = 1
+};
+
+struct axi_dma_transfer {
+	uint32_t size;
+	volatile bool transfer_done;
+	enum cyclic_transfer cyclic;
+	uint32_t src_addr;
+	uint32_t dest_addr;
+};
+
+struct axi_dmac {
+	const char *name;
+	uint32_t base;
+	enum use_irq irq_option;
+	enum dma_direction direction;
+	bool hw_cyclic;
+	uint32_t max_length;
+	volatile struct axi_dma_transfer transfer;
+	//Current sub-transfer properties
+	uint32_t init_addr;
+	uint32_t remaining_size;
+	uint32_t next_src_addr;
+	uint32_t next_dest_addr;
+};
+
+struct axi_dmac_init {
+	const char *name;
+	uint32_t base;
+	enum use_irq irq_option;
+};
+
+/******************************************************************************/
+/************************ Functions Declarations ******************************/
+/******************************************************************************/
+void axi_dmac_dev_to_mem_isr(void *instance);
+void axi_dmac_mem_to_dev_isr(void *instance);
+void axi_dmac_mem_to_mem_isr(void *instance);
+void axi_dmac_write_isr(void *instance);
+int32_t axi_dmac_read(struct axi_dmac *dmac, uint32_t reg_addr,
+		      uint32_t *reg_data);
+int32_t axi_dmac_write(struct axi_dmac *dmac, uint32_t reg_addr,
+		       uint32_t reg_data);
+int32_t axi_dmac_is_transfer_ready(struct axi_dmac *dmac, bool *rdy);
+int32_t axi_dmac_init(struct axi_dmac **adc_core,
+		      const struct axi_dmac_init *init);
+int32_t axi_dmac_remove(struct axi_dmac *dmac);
+int32_t axi_dmac_transfer_start(struct axi_dmac *dmac,
+				struct axi_dma_transfer *dma_transfer);
+int32_t axi_dmac_transfer_wait_completion(struct axi_dmac *dmac,
+		uint32_t timeout_ms);
+void axi_dmac_transfer_stop(struct axi_dmac *dmac);
+
+#endif

dj_f1_ad9371/vitis_classic_autobuild/source/drivers/axi_core/spi_engine/spi_engine.h

@@ -0,0 +1,233 @@
+/*******************************************************************************
+ *   @file   spi_engine.h
+ *   @brief  Header file of SPI Engine core features.
+ *   @author Sergiu Cuciurean ([email protected])
+********************************************************************************
+ * Copyright 2019(c) Analog Devices, Inc.
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *  - Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *  - Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *  - Neither the name of Analog Devices, Inc. nor the names of its
+ *    contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *  - The use of this software may or may not infringe the patent rights
+ *    of one or more patent holders.  This license does not release you
+ *    from the requirement that you obtain separate licenses from these
+ *    patent holders to use this software.
+ *  - Use of the software either in source or binary form, must be run
+ *    on or directly connected to an Analog Devices Inc. component.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT,
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, INTELLECTUAL PROPERTY RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*******************************************************************************/
+
+#ifndef SPI_ENGINE_H
+#define SPI_ENGINE_H
+
+/******************************************************************************/
+/***************************** Include Files **********************************/
+/******************************************************************************/
+
+#include <stdint.h>
+
+#include "spi_engine_private.h"
+#include "drivers/platform/xilinx_spi.h"
+#include "drivers/axi_core/axi_dmac/axi_dmac.h"
+
+/******************************************************************************/
+/********************** Macros and Constants Definitions **********************/
+/******************************************************************************/
+
+#define OFFLOAD_DISABLED		0x00
+#define OFFLOAD_TX_EN			BIT(0)
+#define OFFLOAD_RX_EN			BIT(1)
+#define OFFLOAD_TX_RX_EN		OFFLOAD_TX_EN | OFFLOAD_RX_EN
+
+#define SPI_ENGINE_MSG_QUEUE_END	0xFFFFFFFF
+
+/* Spi engine commands */
+#define	WRITE(no_bytes)			((SPI_ENGINE_INST_TRANSFER << 12) |\
+	(SPI_ENGINE_INSTRUCTION_TRANSFER_W << 8) | no_bytes)
+
+#define	READ(no_bytes)			((SPI_ENGINE_INST_TRANSFER << 12) |\
+	(SPI_ENGINE_INSTRUCTION_TRANSFER_R << 8) | no_bytes)
+
+#define	WRITE_READ(no_bytes)		((SPI_ENGINE_INST_TRANSFER << 12) |\
+	(SPI_ENGINE_INSTRUCTION_TRANSFER_RW << 8) | no_bytes)
+
+#define SLEEP(time)			SPI_ENGINE_CMD_SLEEP(time & 0xF)
+
+/* The delay and chip select parmeters are passed over the engine descriptor
+and will be used inside the function call */
+#define CS_HIGH				SPI_ENGINE_CMD_ASSERT(0x03, 0xFF)
+#define CS_LOW				SPI_ENGINE_CMD_ASSERT(0x03, 0x00)
+
+/******************************************************************************/
+/*************************** Types Declarations *******************************/
+/******************************************************************************/
+
+/**
+ * @struct spi_engine_init_param
+ * @brief  Structure containing the init parameters needed by the SPI engine
+ */
+struct spi_engine_init_param {
+	/** SPI engine reference clock */
+	uint32_t	ref_clk_hz;
+	/** Type of implementation */
+	enum xil_spi_type	type;
+	/** Base address where the HDL core is situated */
+	uint32_t 		spi_engine_baseaddr;
+	/** Delay between the CS toggle and the start of SCLK */
+	uint32_t		cs_delay;
+	/** Data with of one SPI transfer ( in bits ) */
+	uint8_t			data_width;
+	/**  output of SDO when CS is inactive or read-only transfers */
+	uint8_t			sdo_idle_state;
+};
+
+
+/**
+ * @struct spi_engine_desc
+ * @brief  Structure representing an SPI engine device
+ */
+struct spi_engine_desc {
+	/** SPI engine reference clock */
+	uint32_t	ref_clk_hz;
+	/** Type of implementation */
+	enum xil_spi_type	type;
+	/** Pointer to a DMAC used in transmission */
+	struct axi_dmac		*offload_tx_dma;
+	/** Pointer to a DMAC used in reception */
+	struct axi_dmac		*offload_rx_dma;
+	/** Transfer mode for Tx DMAC */
+	enum cyclic_transfer cyclic;
+	/** Offload's module transfer direction : TX, RX or both */
+	uint8_t			offload_config;
+	/** Number of words that the module has to send */
+	uint8_t			offload_tx_len;
+	/** Number of words that the module has to receive */
+	uint8_t			offload_rx_len;
+	/** Base address where the HDL core is situated */
+	uint32_t		spi_engine_baseaddr;
+	/** Base address where the RX DMAC core is situated */
+	uint32_t		rx_dma_baseaddr;
+	/** Base address where the TX DMAC core is situated */
+	uint32_t		tx_dma_baseaddr;
+	/** Delay between the CS toggle and the start of SCLK */
+	uint8_t			cs_delay;
+	/** Clock divider used in transmission delays */
+	uint32_t		clk_div;
+	/** Data with of one SPI transfer ( in bits ) */
+	uint8_t			data_width;
+	/** The maximum data width supported by the engine */
+	uint8_t 		max_data_width;
+	/**  output of SDO when CS is inactive or read-only transfers */
+	uint8_t			sdo_idle_state;
+};
+
+
+/**
+ * @struct spi_engine_offload_init_param
+ * @brief  Structure containing the init parameters needed by the offload module
+ */
+struct spi_engine_offload_init_param {
+	/** Base address where the RX DMAC core is situated */
+	uint32_t	rx_dma_baseaddr;
+	/** Base address where the TX DMAC core is situated */
+	uint32_t	tx_dma_baseaddr;
+	/** DMAC flags - if not initialized, the default value is DMA_CYCLIC */
+	uint32_t	dma_flags;
+	/** Offload's module transfer direction : TX, RX or both */
+	uint8_t		offload_config;
+};
+
+/**
+ * @struct spi_engine_offload_message
+ * @brief  Structure representing an offload message
+ */
+struct spi_engine_offload_message {
+	/** Pointer to the SPI engine commands buffer that will be sent.
+	 * The available commands can be found at:
+	 * https://wiki.analog.com/resources/fpga/peripherals/spi_engine/
+	*/
+	uint32_t *commands;
+	/** Length of the SPI engine commands buffer */
+	uint32_t no_commands;
+	/** Pointer of the data that will be sent over spi */
+	uint32_t *commands_data;
+	/** The address where the data that will be transmitted is situated */
+	uint32_t tx_addr;
+	/** The address where the data that will be received is situated */
+	uint32_t rx_addr;
+};
+
+/******************************************************************************/
+/************************ Functions Declarations ******************************/
+/******************************************************************************/
+
+/**
+ * @brief SPI engine platform ops structure
+ */
+extern const struct spi_platform_ops spi_eng_platform_ops;
+
+/* Write SPI Engine's axi registers */
+int32_t spi_engine_write(struct spi_engine_desc *desc,
+			 uint32_t reg_addr,
+			 uint32_t reg_data);
+
+/* Read SPI Engine's axi registers */
+int32_t spi_engine_read(struct spi_engine_desc *desc,
+			uint32_t reg_addr,
+			uint32_t *reg_data);
+/* Initialize the SPI engine device */
+int32_t spi_engine_init(struct spi_desc **desc,
+			const struct spi_init_param *param);
+
+/* Write and read data over SPI using the SPI engine */
+int32_t spi_engine_write_and_read(struct spi_desc *desc,
+				  uint8_t *data,
+				  uint16_t bytes_number);
+
+/* Write and read data over SPI using the SPI engine in 3-wire mode */
+int32_t spi_engine_write_and_read_3wire(struct spi_desc *desc,
+		   uint8_t *write_data,
+		   uint8_t *read_data,
+		   uint16_t write_bytes_number,
+		   uint16_t read_bytes_number);
+/* Free the resources used by the SPI engine device */
+int32_t spi_engine_remove(struct spi_desc *desc);
+
+/* Initialize the SPI engine offload module */
+int32_t spi_engine_offload_init(struct spi_desc *desc,
+				const struct spi_engine_offload_init_param *param);
+
+/* Write and read data over SPI using the offload module */
+int32_t spi_engine_offload_transfer(struct spi_desc *desc,
+				    struct spi_engine_offload_message msg,
+				    uint32_t no_samples);
+
+/* Set SPI transfer width */
+int32_t spi_engine_set_transfer_width(struct spi_desc *desc,
+				      uint8_t data_wdith);
+
+/* Set SPI transfer speed */
+void spi_engine_set_speed(struct spi_desc *desc,
+			  uint32_t speed_hz);
+
+#endif // SPI_ENGINE_H

dj_f1_ad9371/vitis_classic_autobuild/source/drivers/axi_core/spi_engine/spi_engine_private.h

@@ -0,0 +1,158 @@
+/*******************************************************************************
+ *   @file   spi_engine_private.h
+ *   @brief  Private definitions of the SPI Engine
+ *   @author Sergiu Cuciurean ([email protected])
+********************************************************************************
+ * Copyright 2019(c) Analog Devices, Inc.
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *  - Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *  - Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *  - Neither the name of Analog Devices, Inc. nor the names of its
+ *    contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *  - The use of this software may or may not infringe the patent rights
+ *    of one or more patent holders.  This license does not release you
+ *    from the requirement that you obtain separate licenses from these
+ *    patent holders to use this software.
+ *  - Use of the software either in source or binary form, must be run
+ *    on or directly connected to an Analog Devices Inc. component.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT,
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, INTELLECTUAL PROPERTY RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*******************************************************************************/
+
+#ifndef SPI_ENGINE_PRIVATE_H
+#define SPI_ENGINE_PRIVATE_H
+
+#include <stdint.h>
+#include <stdbool.h>
+
+#include "spi.h"
+#include "util.h"
+
+/******************************************************************************/
+/*************************** Spi Engine registers *****************************/
+/******************************************************************************/
+
+#define SPI_ENGINE_REG_VERSION			0x00
+#define SPI_ENGINE_REG_DATA_WIDTH		0x0C
+#define SPI_ENGINE_REG_RESET			0x40
+#define SPI_ENGINE_REG_INT_ENABLE		0x80
+#define SPI_ENGINE_REG_INT_PENDING		0x84
+#define SPI_ENGINE_REG_INT_SOURCE		0x88
+#define SPI_ENGINE_REG_SYNC_ID			0xC0
+#define SPI_ENGINE_REG_CMD_FIFO_ROOM		0xD0
+#define SPI_ENGINE_REG_SDO_FIFO_ROOM		0xD4
+#define SPI_ENGINE_REG_SDI_FIFO_LEVEL		0xD8
+#define SPI_ENGINE_REG_CMD_FIFO 		0xE0
+#define SPI_ENGINE_REG_SDO_DATA_FIFO		0xE4
+#define SPI_ENGINE_REG_SDI_DATA_FIFO		0xE8
+#define SPI_ENGINE_REG_SDI_DATA_FIFO_PEEK	0xEC
+
+#define SPI_ENGINE_REG_NUM_OF_SDI_MSK		GENMASK(23, 16)
+#define SPI_ENGINE_REG_DATA_WIDTH_MSK		GENMASK(15, 0)
+
+/******************************************************************************/
+/************************ Spi Engine register parameters **********************/
+/******************************************************************************/
+
+#define SPI_ENGINE_INST_TRANSFER		0x00
+#define SPI_ENGINE_INST_ASSERT			0x01
+#define SPI_ENGINE_INST_CONFIG			0x02
+#define SPI_ENGINE_INST_SYNC_SLEEP		0x03
+#define SPI_ENGINE_INST_MISC			0x03
+#define SPI_ENGINE_CMD_REG_CLK_DIV		0x00
+#define SPI_ENGINE_CMD_REG_CONFIG		0x01
+#define SPI_ENGINE_CMD_DATA_TRANSFER_LEN	0x02
+#define SPI_ENGINE_MISC_SYNC			0x00
+#define SPI_ENGINE_MISC_SLEEP			0x01
+#define SPI_ENGINE_SYNC_TRANSFER_BEGIN		BIT(1)
+#define SPI_ENGINE_SYNC_TRANSFER_END		BIT(2)
+#define SPI_ENGINE_INT_CMD_ALMOST_EMPTY		BIT(0)
+#define SPI_ENGINE_INT_SDO_ALMOST_EMPTY		BIT(1)
+#define SPI_ENGINE_INT_SDI_ALMOST_FULL		BIT(2)
+#define SPI_ENGINE_INT_SYNC			BIT(3)
+#define SPI_ENGINE_OFFLOAD_CTRL_ENABLE		BIT(0)
+#define SPI_ENGINE_OFFLOAD_STATUS_ENABLED	BIT(0)
+#define SPI_ENGINE_CONFIG_CPHA			BIT(0)
+#define SPI_ENGINE_CONFIG_CPOL			BIT(1)
+#define SPI_ENGINE_CONFIG_3WIRE			BIT(2)
+#define SPI_ENGINE_CONFIG_SDO_IDLE		BIT(3)
+#define SPI_ENGINE_VERSION_MAJOR(x) 		((x >> 16) & 0xff)
+#define SPI_ENGINE_VERSION_MINOR(x) 		((x >> 8) & 0xff)
+#define SPI_ENGINE_VERSION_PATCH(x) 		(x & 0xff)
+
+/******************************************************************************/
+/**************************** Spi Engine commands *****************************/
+/******************************************************************************/
+
+#define SPI_ENGINE_INSTRUCTION_TRANSFER_W	0x01
+#define SPI_ENGINE_INSTRUCTION_TRANSFER_R	0x02
+#define SPI_ENGINE_INSTRUCTION_TRANSFER_RW	0x03
+
+#define SPI_ENGINE_REG_OFFLOAD_CTRL(x)		(0x100 + (0x20 * x))
+#define SPI_ENGINE_REG_OFFLOAD_STATUS(x)	(0x104 + (0x20 * x))
+#define SPI_ENGINE_REG_OFFLOAD_RESET(x)		(0x108 + (0x20 * x))
+#define SPI_ENGINE_REG_OFFLOAD_CMD_MEM(x)	(0x110 + (0x20 * x))
+#define SPI_ENGINE_REG_OFFLOAD_SDO_MEM(x)	(0x114 + (0x20 * x))
+
+#define SPI_ENGINE_CMD(inst, arg1, arg2) 				\
+			(((inst & 0x03) << 12) | 			\
+			((arg1 & 0x03) << 8) | arg2 )
+
+#define SPI_ENGINE_CMD_TRANSFER(readwrite, n)				\
+	SPI_ENGINE_CMD(SPI_ENGINE_INST_TRANSFER,			\
+			(readwrite), (n))
+
+#define SPI_ENGINE_CMD_ASSERT(delay, cs) 				\
+	SPI_ENGINE_CMD(SPI_ENGINE_INST_ASSERT,				\
+			(delay), (cs))
+
+#define SPI_ENGINE_CMD_CONFIG(reg, val)					\
+	SPI_ENGINE_CMD(SPI_ENGINE_INST_CONFIG,				\
+			(reg), (val))
+
+#define SPI_ENGINE_CMD_SLEEP(delay) 					\
+	SPI_ENGINE_CMD(SPI_ENGINE_INST_MISC, 				\
+			SPI_ENGINE_MISC_SLEEP, 				\
+			(delay))
+
+#define SPI_ENGINE_CMD_SYNC(id) 					\
+	SPI_ENGINE_CMD(SPI_ENGINE_INST_MISC, 				\
+			SPI_ENGINE_MISC_SYNC, 				\
+			(id))
+
+/******************************************************************************/
+/*************************** Types Declarations *******************************/
+/******************************************************************************/
+
+typedef struct spi_engine_cmd_queue {
+	uint32_t	cmd;
+	struct		spi_engine_cmd_queue *next;
+} spi_engine_cmd_queue;
+
+typedef struct spi_engine_msg {
+	uint32_t			*tx_buf;
+	uint32_t			*rx_buf;
+	uint32_t			tx_length;
+	uint32_t			rx_length;
+	struct spi_engine_cmd_queue	*cmds;
+} spi_engine_msg;
+
+#endif // SPI_ENGINE_PRIVATE_H

dj_f1_ad9371/vitis_classic_autobuild/source/drivers/platform/xilinx_axi_io.c

@@ -0,0 +1,79 @@
+/***************************************************************************//**
+ *   @file   xilinx/xilinx_axi_io.c
+ *   @brief  Implementation of Xilinx AXI IO.
+ *   @author Antoniu Miclaus ([email protected])
+********************************************************************************
+ * Copyright 2019(c) Analog Devices, Inc.
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *  - Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *  - Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *  - Neither the name of Analog Devices, Inc. nor the names of its
+ *    contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *  - The use of this software may or may not infringe the patent rights
+ *    of one or more patent holders.  This license does not release you
+ *    from the requirement that you obtain separate licenses from these
+ *    patent holders to use this software.
+ *  - Use of the software either in source or binary form, must be run
+ *    on or directly connected to an Analog Devices Inc. component.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT,
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, INTELLECTUAL PROPERTY RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*******************************************************************************/
+
+/******************************************************************************/
+/***************************** Include Files **********************************/
+/******************************************************************************/
+
+#include <xil_io.h>
+#include "error.h"
+#include "axi_io.h"
+
+/******************************************************************************/
+/************************ Functions Definitions *******************************/
+/******************************************************************************/
+
+/**
+ * @brief AXI IO Xilinx specific read function.
+ * @param base - Base address
+ * @param offset - Address offset
+ * @param data - variable where returned data is stored
+ * @return 0 in case of success, -1 otherwise.
+ */
+int32_t axi_io_read(uint32_t base, uint32_t offset, uint32_t *data)
+{
+	*data = Xil_In32(base + offset);
+
+	return 0;
+}
+
+/**
+ * @brief AXI IO Xilinx specific write function.
+ * @param base - Base address
+ * @param offset - Address offset
+ * @param data - data to be written.
+ * @return 0 in case of success, -1 otherwise.
+ */
+int32_t axi_io_write(uint32_t base, uint32_t offset, uint32_t data)
+{
+	Xil_Out32(base + offset, data);
+
+	return 0;
+}
+

dj_f1_ad9371/vitis_classic_autobuild/source/drivers/platform/xilinx_delay.c

@@ -0,0 +1,100 @@
+/***************************************************************************//**
+ *   @file   xilinx/xilinx_delay.c
+ *   @brief  Implementation of Xilinx Delay Functions.
+ *   @author Antoniu Miclaus ([email protected])
+********************************************************************************
+ * Copyright 2019(c) Analog Devices, Inc.
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *  - Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *  - Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *  - Neither the name of Analog Devices, Inc. nor the names of its
+ *    contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *  - The use of this software may or may not infringe the patent rights
+ *    of one or more patent holders.  This license does not release you
+ *    from the requirement that you obtain separate licenses from these
+ *    patent holders to use this software.
+ *  - Use of the software either in source or binary form, must be run
+ *    on or directly connected to an Analog Devices Inc. component.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT,
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, INTELLECTUAL PROPERTY RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*******************************************************************************/
+
+/******************************************************************************/
+/***************************** Include Files **********************************/
+/******************************************************************************/
+
+#include "delay.h"
+#include <sleep.h>
+#ifdef _XPARAMETERS_PS_H_
+#include "util.h"
+#include "xtime_l.h"
+#endif
+
+/******************************************************************************/
+/************************ Functions Definitions *******************************/
+/******************************************************************************/
+
+/**
+ * @brief Generate microseconds delay.
+ * @param usecs - Delay in microseconds.
+ * @return None.
+ */
+void udelay(uint32_t usecs)
+{
+#ifdef _XPARAMETERS_PS_H_
+	usleep(usecs);
+#else
+	usleep_MB(usecs);
+#endif
+}
+
+/**
+ * @brief Generate miliseconds delay.
+ * @param msecs - Delay in miliseconds.
+ * @return None.
+ */
+void mdelay(uint32_t msecs)
+{
+#ifdef _XPARAMETERS_PS_H_
+	usleep(msecs * 1000);
+#else
+	usleep_MB(msecs * 1000);
+#endif
+}
+
+/**
+ * @brief Get current time.
+ * @return Current time structure from system start (seconds, microseconds).
+ */
+struct time get_time(void)
+{
+	struct time t = {0, 0};
+#ifdef _XPARAMETERS_PS_H_
+	unsigned long long Xtime_Global;
+	uint32_t rem;
+
+	XTime_GetTime(&Xtime_Global);
+	t.s = div_u64_rem(Xtime_Global, COUNTS_PER_SECOND, &rem);
+	t.us = div_u64((uint64_t)rem * 1000000, COUNTS_PER_SECOND);
+#endif
+
+	return t;
+}

dj_f1_ad9371/vitis_classic_autobuild/source/drivers/platform/xilinx_gpio.c

@@ -0,0 +1,464 @@
+/***************************************************************************//**
+ *   @file   xilinx/xilinx_gpio.c
+ *   @brief  Implementation of Xilinx GPIO Generic Driver.
+ *   @author Antoniu Miclaus ([email protected])
+********************************************************************************
+ * Copyright 2019(c) Analog Devices, Inc.
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *  - Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *  - Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *  - Neither the name of Analog Devices, Inc. nor the names of its
+ *    contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *  - The use of this software may or may not infringe the patent rights
+ *    of one or more patent holders.  This license does not release you
+ *    from the requirement that you obtain separate licenses from these
+ *    patent holders to use this software.
+ *  - Use of the software either in source or binary form, must be run
+ *    on or directly connected to an Analog Devices Inc. component.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT,
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, INTELLECTUAL PROPERTY RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*******************************************************************************/
+
+/******************************************************************************/
+/***************************** Include Files **********************************/
+/******************************************************************************/
+
+#include <stdlib.h>
+
+#include <xparameters.h>
+#ifdef XPAR_XGPIO_NUM_INSTANCES
+#include <xgpio.h>
+#endif
+#ifdef XPAR_XGPIOPS_NUM_INSTANCES
+#include <xgpiops.h>
+#endif
+
+#include "error.h"
+#include "gpio.h"
+#include "xilinx_gpio.h"
+
+/******************************************************************************/
+/************************ Functions Definitions *******************************/
+/******************************************************************************/
+
+/**
+ * @brief Prepare the GPIO decriptor.
+ * @param desc - The GPIO descriptor.
+ * @param param - The structure that contains the GPIO parameters.
+ * @return 0 in case of success, -1 otherwise.
+ */
+int32_t _gpio_init(struct gpio_desc *desc,
+		   const struct gpio_init_param *param)
+{
+	int32_t				ret;
+	struct xil_gpio_desc		*xdesc;
+	struct xil_gpio_init_param	*xinit;
+
+	ret = -1;
+
+	xdesc = desc->extra;
+	xinit = param->extra;
+
+	xdesc->type = xinit->type;
+	desc->number = param->number;
+
+	switch (xinit->type) {
+	case GPIO_PL:
+#ifdef XGPIO_H
+		xdesc->instance = (XGpio *)malloc(sizeof(XGpio));
+		if(!xdesc->instance)
+			goto pl_error;
+
+		xdesc->config = XGpio_LookupConfig(xinit->device_id);
+		if(xdesc->config == NULL)
+			goto pl_error;
+
+		ret = XGpio_CfgInitialize(xdesc->instance,
+					  xdesc->config,
+					  ((XGpio_Config*)xdesc->config)
+					  ->BaseAddress);
+		if(ret < 0)
+			goto pl_error;
+
+		break;
+pl_error:
+		free(xdesc->instance);
+#endif
+		goto error;
+	case GPIO_PS:
+#ifdef XGPIOPS_H
+		xdesc->instance = (XGpioPs *)malloc(sizeof(XGpioPs));
+		if(!xdesc->instance)
+			goto ps_error;
+
+		xdesc->config = XGpioPs_LookupConfig(xinit->device_id);
+		if(xdesc->config == NULL)
+			goto ps_error;
+
+		ret = XGpioPs_CfgInitialize(xdesc->instance,
+					    xdesc->config,
+					    ((XGpioPs_Config*)xdesc->config)->BaseAddr);
+		if(ret < 0)
+			goto ps_error;
+		break;
+ps_error:
+		free(xdesc->instance);
+#endif
+		goto error;
+error:
+	default:
+		return -1;
+	}
+
+	return 0;
+}
+
+/**
+ * @brief Obtain the GPIO decriptor.
+ * @param desc - The GPIO descriptor.
+ * @param param - GPIO initialization parameters
+ * @return 0 in case of success, -1 otherwise.
+ */
+int32_t xil_gpio_get(struct gpio_desc **desc,
+		     const struct gpio_init_param *param)
+{
+	struct gpio_desc	*descriptor;
+	struct xil_gpio_desc	*extra;
+	int32_t			ret;
+
+	descriptor = (struct gpio_desc *)malloc(sizeof(*descriptor));
+	extra = (struct xil_gpio_desc*)malloc(sizeof(*extra));
+
+	if (!descriptor || !extra)
+		return -1;
+
+	descriptor->extra = extra;
+	ret = _gpio_init(descriptor, param);
+
+	if(ret != 0)
+		goto error;
+
+	*desc = descriptor;
+
+	return 0;
+error:
+	free(extra);
+	free(descriptor);
+
+	return -1;
+}
+
+/**
+ * @brief Get the value of an optional GPIO.
+ * @param desc - The GPIO descriptor.
+ * @param param - GPIO Initialization parameters.
+ * @return 0 in case of success, -1 otherwise.
+ */
+int32_t xil_gpio_get_optional(struct gpio_desc **desc,
+			      const struct gpio_init_param *param)
+{
+	if(param == NULL) {
+		*desc = NULL;
+		return 0;
+	}
+
+	return xil_gpio_get(desc, param);
+}
+
+/**
+ * @brief Free the resources allocated by gpio_get().
+ * @param desc - The GPIO descriptor.
+ * @return 0 in case of success, -1 otherwise.
+ */
+int32_t xil_gpio_remove(struct gpio_desc *desc)
+{
+	if (desc != NULL) {
+		free(((struct xil_gpio_desc *)(desc->extra))->instance);
+		free(desc->extra);
+		free(desc);
+	}
+
+	return 0;
+}
+
+/**
+ * @brief Enable the input direction of the specified GPIO.
+ * @param desc - The GPIO descriptor.
+ * @return 0 in case of success, -1 otherwise.
+ */
+int32_t xil_gpio_direction_input(struct gpio_desc *desc)
+{
+	struct xil_gpio_desc	*extra;
+#ifdef XGPIO_H
+	uint8_t pin = desc->number;
+	uint32_t channel = 1;
+	uint32_t config	 = 0;
+#endif
+	extra = desc->extra;
+
+	switch (extra->type) {
+	case GPIO_PL:
+#ifdef XGPIO_H
+		/* We assume that pin 32 is the first pin from channel 2 */
+		if (pin >= 32) {
+			channel = 2;
+			pin -= 32;
+		}
+
+		config = XGpio_GetDataDirection((XGpio *)extra->instance,
+						channel);
+		config |= (1 << pin);
+		XGpio_SetDataDirection((XGpio *)extra->instance,
+				       channel,
+				       config);
+#endif
+		break;
+	case GPIO_PS:
+#ifdef XGPIOPS_H
+		XGpioPs_SetDirectionPin(extra->instance,
+					desc->number,
+					GPIO_IN);
+#endif
+		break;
+	default:
+		return -1;
+	}
+
+	return 0;
+}
+
+/**
+ * @brief Enable the output direction of the specified GPIO.
+ * @param desc - The GPIO descriptor.
+ * @param value - The value.
+ *                Example: GPIO_HIGH
+ *                         GPIO_LOW
+ * @return 0 in case of success, -1 otherwise.
+ */
+int32_t xil_gpio_direction_output(struct gpio_desc *desc,
+				  uint8_t value)
+{
+	struct xil_gpio_desc	*extra;
+#ifdef XGPIO_H
+	uint8_t pin = desc->number;
+	uint8_t channel;
+	uint32_t reg_val;
+#endif
+	extra = desc->extra;
+
+	switch (extra->type) {
+	case GPIO_PL:
+#ifdef XGPIO_H
+		if (pin >= 32) {
+			channel = 2;
+			pin -= 32;
+		} else
+			channel = 1;
+
+		reg_val = XGpio_GetDataDirection(extra->instance,
+						 channel);
+		reg_val &= ~(1 << pin);
+		XGpio_SetDataDirection(extra->instance,
+				       channel,
+				       reg_val);
+		reg_val = XGpio_DiscreteRead(extra->instance,
+					     channel);
+		if(value)
+			reg_val |= (1 << pin);
+		else
+			reg_val &= ~(1 << pin);
+		XGpio_DiscreteWrite(extra->instance,
+				    channel,
+				    reg_val);
+#endif
+		break;
+	case GPIO_PS:
+#ifdef XGPIOPS_H
+		XGpioPs_SetDirectionPin(extra->instance,
+					desc->number,
+					GPIO_OUT);
+		XGpioPs_SetOutputEnablePin(extra->instance,
+					   desc->number,
+					   GPIO_OUT);
+		XGpioPs_WritePin(extra->instance,
+				 desc->number,
+				 value);
+#endif
+		break;
+	default:
+		return -1;
+	}
+
+	return 0;
+}
+
+/**
+ * @brief Get the direction of the specified GPIO.
+ * @param desc - The GPIO descriptor.
+ * @param direction - The direction.
+ *                    Example: GPIO_OUT
+ *                             GPIO_IN
+ * @return 0 in case of success, -1 otherwise.
+ */
+int32_t xil_gpio_get_direction(struct gpio_desc *desc,
+			       uint8_t *direction)
+{
+	if (!desc)
+		return -1;
+
+	struct xil_gpio_desc	*extra;
+	uint8_t pin = desc->number;
+
+#ifdef XGPIO_H
+	uint8_t channel;
+#endif
+	extra = desc->extra;
+
+	switch (extra->type) {
+	case GPIO_PL:
+#ifdef XGPIO_H
+		if (pin >= 32) {
+			channel = 2;
+			pin -= 32;
+		} else
+			channel = 1;
+		*direction = ((XGpio_GetDataDirection(extra->instance,
+						      channel) >> pin) & 0x1) ^ 0x1;
+#endif
+		break;
+	case GPIO_PS:
+#ifdef XGPIOPS_H
+		*direction = XGpioPs_GetDirectionPin(extra->instance, pin);
+#endif
+		break;
+	default:
+		return -1;
+	}
+
+	return 0;
+}
+
+/**
+ * @brief Set the value of the specified GPIO.
+ * @param desc - The GPIO descriptor.
+ * @param value - The value.
+ *                Example: GPIO_HIGH
+ *                         GPIO_LOW
+ * @return 0 in case of success, -1 otherwise.
+ */
+int32_t xil_gpio_set_value(struct gpio_desc *desc,
+			   uint8_t value)
+{
+	struct xil_gpio_desc	*extra;
+#ifdef XGPIO_H
+	uint8_t pin = desc->number;
+	uint8_t channel;
+	uint32_t reg_val;
+#endif
+	extra = desc->extra;
+
+	switch (extra->type) {
+	case GPIO_PL:
+#ifdef XGPIO_H
+		if (pin >= 32) {
+			channel = 2;
+			pin -= 32;
+		} else
+			channel = 1;
+
+		reg_val = XGpio_DiscreteRead(extra->instance, channel);
+		if(value)
+			reg_val |= (1 << pin);
+		else
+			reg_val &= ~(1 << pin);
+		XGpio_DiscreteWrite(extra->instance, channel, reg_val);
+#endif
+		break;
+	case GPIO_PS:
+#ifdef XGPIOPS_H
+		XGpioPs_WritePin(extra->instance, desc->number, value);
+#endif
+		break;
+	default:
+		return -1;
+	}
+
+	return 0;
+}
+
+/**
+ * @brief Get the value of the specified GPIO.
+ * @param desc - The GPIO descriptor.
+ * @param value - The value.
+ *                Example: GPIO_HIGH
+ *                         GPIO_LOW
+ * @return 0 in case of success, -1 otherwise.
+ */
+int32_t xil_gpio_get_value(struct gpio_desc *desc,
+			   uint8_t *value)
+{
+	if (!desc)
+		return -1;
+
+	struct xil_gpio_desc	*extra;
+	uint8_t pin = desc->number;
+
+#ifdef XGPIO_H
+	uint8_t channel;
+#endif
+	extra = desc->extra;
+
+	switch (extra->type) {
+	case GPIO_PL:
+#ifdef XGPIO_H
+		if (pin >= 32) {
+			channel = 2;
+			pin -= 32;
+		} else
+			channel = 1;
+		*value = (XGpio_DiscreteRead(extra->instance, channel) >> pin) & 0x01;
+#endif
+		break;
+	case GPIO_PS:
+#ifdef XGPIOPS_H
+		*value = XGpioPs_ReadPin(extra->instance, pin);
+#endif
+		break;
+	default:
+		return -1;
+	}
+
+	return 0;
+}
+
+/**
+ * @brief Xilinx platform specific GPIO platform ops structure
+ */
+const struct gpio_platform_ops xil_gpio_ops = {
+	.gpio_ops_get = &xil_gpio_get,
+	.gpio_ops_get_optional = &xil_gpio_get_optional,
+	.gpio_ops_remove = &xil_gpio_remove,
+	.gpio_ops_direction_input = &xil_gpio_direction_input,
+	.gpio_ops_direction_output = &xil_gpio_direction_output,
+	.gpio_ops_get_direction = &xil_gpio_get_direction,
+	.gpio_ops_set_value = &xil_gpio_set_value,
+	.gpio_ops_get_value = &xil_gpio_get_value,
+};

dj_f1_ad9371/vitis_classic_autobuild/source/drivers/platform/xilinx_gpio.h

@@ -0,0 +1,95 @@
+/*******************************************************************************
+ *   @file   xilinx/xilinx_gpio.h
+ *   @brief  Header containing extra types used in the gpio driver
+ *   @author scuciurean ([email protected])
+********************************************************************************
+ * Copyright 2019(c) Analog Devices, Inc.
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *  - Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *  - Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *  - Neither the name of Analog Devices, Inc. nor the names of its
+ *    contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *  - The use of this software may or may not infringe the patent rights
+ *    of one or more patent holders.  This license does not release you
+ *    from the requirement that you obtain separate licenses from these
+ *    patent holders to use this software.
+ *  - Use of the software either in source or binary form, must be run
+ *    on or directly connected to an Analog Devices Inc. component.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT,
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, INTELLECTUAL PROPERTY RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*******************************************************************************/
+
+#ifndef XILINX_GPIO_H_
+#define XILINX_GPIO_H_
+
+/******************************************************************************/
+/***************************** Include Files **********************************/
+/******************************************************************************/
+
+#include <stdint.h>
+#include <stdbool.h>
+
+/******************************************************************************/
+/*************************** Types Declarations *******************************/
+/******************************************************************************/
+
+/**
+ * @enum xil_gpio_type
+ * @brief Xilinx platform architecture sections
+ */
+enum xil_gpio_type {
+	/** Programmable Logic */
+	GPIO_PL,
+	/** Processing System */
+	GPIO_PS
+};
+
+/**
+ * @struct xil_gpio_init_param
+ * @brief Structure holding the initialization parameters for Xilinx platform
+ * specific GPIO parameters.
+ */
+struct xil_gpio_init_param {
+	/** Xilinx architecture */
+	enum xil_gpio_type	type;
+	/** Device ID */
+	uint32_t		device_id;
+};
+
+/**
+ * @struct xil_gpio_desc
+ * @brief Xilinx platform specific GPIO descriptor
+ */
+struct xil_gpio_desc {
+	/** Xilinx architecture */
+	enum xil_gpio_type	type;
+	/** Xilinx GPIO configuration */
+	void			*config;
+	/** Xilinx GPIO Instance */
+	void			*instance;
+};
+
+/**
+ * @brief Xilinx platform specific gpio platform ops structure
+ */
+extern const struct gpio_platform_ops xil_gpio_ops;
+
+#endif

dj_f1_ad9371/vitis_classic_autobuild/source/drivers/platform/xilinx_gpio_irq.c

@@ -0,0 +1,360 @@
+/***************************************************************************//**
+ *   @file   xilinx/xilinx_gpio_irq.c
+ *   @brief  Implementation of Xilinx GPIO IRQ Generic Driver.
+ *   @author Porumb Andrei ([email protected])
+********************************************************************************
+ * Copyright 2021(c) Analog Devices, Inc.
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *  - Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *  - Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *  - Neither the name of Analog Devices, Inc. nor the names of its
+ *    contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *  - The use of this software may or may not infringe the patent rights
+ *    of one or more patent holders.  This license does not release you
+ *    from the requirement that you obtain separate licenses from these
+ *    patent holders to use this software.
+ *  - Use of the software either in source or binary form, must be run
+ *    on or directly connected to an Analog Devices Inc. component.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT,
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, INTELLECTUAL PROPERTY RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*******************************************************************************/
+
+/******************************************************************************/
+/***************************** Include Files **********************************/
+/******************************************************************************/
+
+#include <stdlib.h>
+#include "xparameters.h"
+#include "error.h"
+#include "xilinx_gpio_irq.h"
+#include "util.h"
+#include "list.h"
+#include "irq.h"
+
+/******************************************************************************/
+/************************ Functions Definitions *******************************/
+/******************************************************************************/
+
+/**
+ * @brief Comparing function used by list.
+ * @param desc_a - Compared item
+ * @param desc_b - Reference item
+ * @return - 0 if items match
+ */
+static int32_t call_cmp(struct xil_callback_desc *desc_a,
+			struct xil_callback_desc *desc_b)
+{
+	return desc_a->pin_nb - desc_b->pin_nb;
+}
+
+/**
+ * @brief Function called when GPIO IRQ occurs.
+ * @param param - GPIO IRQ desc's extra field
+ * @return - None.
+ */
+static void xil_gpio_irq_handler(struct xil_gpio_irq_desc *param)
+{
+	int32_t status = 0;
+	int32_t pin_nb;
+	struct xil_callback_desc *callback_desc;
+
+	status = iterator_move_to_idx(param->it, 0);
+	while(!status) {
+		iterator_read(param->it, &callback_desc);
+		status = iterator_move(param->it, 1);
+		if(XGpioPs_IntrGetStatusPin(&param->my_Gpio, callback_desc->pin_nb))
+			callback_desc->triggered = true;
+	}
+
+	status = iterator_move_to_idx(param->it, 0);
+	while(!status) {
+		iterator_read(param->it, &callback_desc);
+		status = iterator_move(param->it, 1);
+		if(callback_desc->triggered == true) {
+			callback_desc->triggered = false;
+			XGpioPs_IntrDisablePin(&param->my_Gpio, callback_desc->pin_nb);
+			XGpioPs_IntrClearPin(&param->my_Gpio, callback_desc->pin_nb);
+			callback_desc->callback.legacy_callback(callback_desc->callback.ctx, 0U, NULL);
+			if(callback_desc->enabled)
+				XGpioPs_IntrEnablePin(&param->my_Gpio, callback_desc->pin_nb);
+		}
+	}
+}
+
+/**
+ * @brief Disable specific GPIO IRQ pin.
+ * @param desc - The GPIO IRQ controller descriptor.
+ * @param irq_id - Pin number.
+ * @return 0 in case of success, -1 otherwise.
+ */
+int32_t xil_gpio_irq_disable(struct irq_ctrl_desc *desc, uint32_t irq_id)
+{
+	int32_t status;
+	struct xil_gpio_irq_desc *extra;
+	struct xil_callback_desc *callback_desc;
+
+	extra = desc->extra;
+
+	status = iterator_move_to_idx(extra->it, 0);
+	while(!status) {
+		iterator_read(extra->it, &callback_desc);
+		status = iterator_move(extra->it, 1);
+		if(callback_desc->pin_nb == irq_id) {
+			callback_desc->enabled = false;
+			break;
+		}
+	}
+
+	XGpioPs_IntrDisablePin(&extra->my_Gpio, irq_id);
+
+	return 0;
+}
+
+/**
+ * @brief Initialize the GPIO IRQ controller.
+ * @param desc - The GPIO IRQ controller descriptor.
+ * @param param - The GPIO IRQ controller initial parameters.
+ * irq_ctrl_id from irq_init_param is the interrupt id for the parent controller
+ * @return 0 in case of success, -1 otherwise.
+ */
+int32_t xil_gpio_irq_ctrl_init(struct irq_ctrl_desc **desc,
+			       const struct irq_init_param *param)
+{
+	int32_t i;
+	int32_t status;
+	struct irq_ctrl_desc *ldesc;
+	static XGpioPs_Config *GPIO_Config;
+	struct xil_gpio_irq_desc *xil_desc;
+	struct xil_gpio_irq_init_param *xil_ip;
+	struct callback_desc callback;
+
+	xil_desc = (struct xil_gpio_irq_desc *)calloc(1, sizeof(*xil_desc));
+	if(!xil_desc)
+		return -ENOMEM;
+
+	ldesc = (struct irq_ctrl_desc *)calloc(1, sizeof(*ldesc));
+	if(!ldesc) {
+		free(xil_desc);
+		return -ENOMEM;
+	}
+
+	xil_ip = param->extra;
+	GPIO_Config = XGpioPs_LookupConfig(xil_ip->gpio_device_id);
+	status = XGpioPs_CfgInitialize(&xil_desc->my_Gpio, GPIO_Config,
+				       GPIO_Config->BaseAddr);
+	if(status)
+		goto error_desc;
+
+	ldesc->extra = xil_desc;
+	xil_desc->parent_desc = xil_ip->parent_desc;
+
+	status = list_init(&xil_desc->callback_list, LIST_DEFAULT,
+				 call_cmp);
+	if(status)
+		goto error_list;
+
+	status = iterator_init(&xil_desc->it, xil_desc->callback_list, 0);
+	if(status) {
+		iterator_remove(xil_desc->it);
+		goto error_list;
+	}
+
+	ldesc->irq_ctrl_id = param->irq_ctrl_id;
+	status = irq_trigger_level_set(xil_desc->parent_desc, ldesc->irq_ctrl_id,
+					     IRQ_EDGE_RISING);
+	if(status)
+		goto error_op;
+
+	status = irq_enable(xil_desc->parent_desc, ldesc->irq_ctrl_id);
+	if(status)
+		goto error_op;
+
+	callback.legacy_callback = &xil_gpio_irq_handler;
+	callback.ctx = ldesc->extra;
+	status = irq_register_callback(xil_desc->parent_desc, ldesc->irq_ctrl_id,
+					     &callback);
+	if(status)
+		goto error_op;
+
+	*desc = ldesc;
+
+	return 0;
+
+error_op:
+	iterator_remove(xil_desc->it);
+error_list:
+	list_remove(xil_desc->callback_list);
+error_desc:
+	free(xil_desc);
+	free(ldesc);
+	return status;
+}
+
+/**
+ * @brief Set GPIO interrupt trigger level.
+ * @param desc - The GPIO IRQ controller descriptor.
+ * @param irq_id - Pin number.
+ * @param trig - New trigger level for the GPIO interrupt.
+ * @return 0 in case of success, -1 otherwise.
+ */
+int32_t xil_gpio_irq_trigger_level_set(struct irq_ctrl_desc *desc,
+				       uint32_t irq_id,
+				       enum irq_trig_level trig)
+{
+	static const int32_t trig_level[5] = {XGPIOPS_IRQ_TYPE_LEVEL_LOW,
+					      XGPIOPS_IRQ_TYPE_LEVEL_HIGH,
+					      XGPIOPS_IRQ_TYPE_EDGE_FALLING,
+					      XGPIOPS_IRQ_TYPE_EDGE_RISING,
+					      XGPIOPS_IRQ_TYPE_EDGE_BOTH
+					     };
+	struct xil_gpio_irq_desc *extra;
+
+	extra = desc->extra;
+	XGpioPs_SetIntrTypePin(&extra->my_Gpio, irq_id, trig_level[trig]);
+
+	return 0;
+}
+
+/**
+ * @brief Register pin specific GPIO interrupt.
+ * @param desc - The GPIO IRQ controller descriptor.
+ * @param irq_id - Pin number.
+ * @param callback_desc - Callback.
+ * @return 0 in case of success, -1 otherwise.
+ */
+int32_t xil_gpio_irq_register_callback(struct irq_ctrl_desc *desc,
+				       uint32_t irq_id,
+				       struct callback_desc *callback_desc)
+{
+	struct xil_callback_desc *dev_callback;
+	struct xil_gpio_irq_desc *extra;
+
+	dev_callback = (struct xil_callback_desc *)calloc(1,
+			sizeof(*dev_callback));
+	if(!dev_callback)
+		return -1;
+
+	dev_callback->pin_nb = irq_id;
+	dev_callback->callback.legacy_callback = callback_desc->legacy_callback;
+	dev_callback->callback.ctx = callback_desc->ctx;
+	dev_callback->triggered = false;
+
+	extra = desc->extra;
+	XGpioPs_SetDirectionPin(&extra->my_Gpio, irq_id, 0);
+	list_add_last(extra->callback_list, dev_callback);
+
+	return 0;
+}
+
+/**
+ * @brief Unregister pin specific GPIO interrupt.
+ * @param desc - The GPIO IRQ controller descriptor.
+ * @param irq_id - Pin number.
+ * @param cb - Callback descriptor.
+ * @return 0 in case of success, -1 otherwise.
+ */
+int32_t xil_gpio_irq_unregister_callback(struct irq_ctrl_desc *desc,
+		uint32_t irq_id, struct callback_desc *cb)
+{
+	int32_t status;
+	struct xil_gpio_irq_desc *extra;
+	struct xil_callback_desc *dev_callback;
+	struct xil_callback_desc search_callback;
+
+	extra = desc->extra;
+	search_callback.pin_nb = irq_id;
+	status = list_get_find(extra->callback_list, &dev_callback,
+				     &search_callback);
+	if(status)
+		return -ENXIO;
+
+	free(dev_callback);
+
+	return 0;
+}
+
+/**
+ * @brief Enable specific GPIO IRQ pin.
+ * @param desc - The GPIO IRQ controller descriptor.
+ * @param irq_id - Pin number.
+ * @return 0 in case of success, -1 otherwise.
+ */
+int32_t xil_gpio_irq_enable(struct irq_ctrl_desc *desc, uint32_t irq_id)
+{
+	int32_t status;
+	struct xil_gpio_irq_desc *extra;
+	struct xil_callback_desc *callback_desc;
+
+	extra = desc->extra;
+
+	status = iterator_move_to_idx(extra->it, 0);
+	while(!status) {
+		iterator_read(extra->it, &callback_desc);
+		status = iterator_move(extra->it, 1);
+		if(callback_desc->pin_nb == irq_id) {
+			callback_desc->enabled = true;
+			XGpioPs_IntrClearPin(&extra->my_Gpio, irq_id);
+			break;
+		}
+	}
+
+	XGpioPs_IntrEnablePin(&extra->my_Gpio, irq_id);
+
+	return 0;
+}
+
+/**
+ * @brief Remove the GPIO IRQ controller.
+ * @param desc - The GPIO IRQ controller descriptor.
+ * @return 0 in case of success, -1 otherwise.
+ */
+int32_t xil_gpio_irq_ctrl_remove(struct irq_ctrl_desc *desc)
+{
+	struct xil_gpio_irq_desc *extra;
+	struct xil_callback_desc *callback_desc;
+
+	if (!desc)
+		return -EINVAL;
+
+	extra = desc->extra;
+	while (0 == list_get_first(extra->callback_list, &callback_desc))
+		free(callback_desc);
+
+	iterator_remove(extra->it);
+	list_remove(extra->callback_list);
+	free(extra);
+	free(desc);
+
+	return 0;
+}
+
+/**
+ * @brief Xilinx platform specific GPIO IRQ platform ops structure
+ */
+const struct irq_platform_ops xil_gpio_irq_ops = {
+	.init = &xil_gpio_irq_ctrl_init,
+	.enable = &xil_gpio_irq_enable,
+	.disable = &xil_gpio_irq_disable,
+	.trigger_level_set = &xil_gpio_irq_trigger_level_set,
+	.register_callback = &xil_gpio_irq_register_callback,
+	.unregister_callback = xil_gpio_irq_unregister_callback,
+	.remove = &xil_gpio_irq_ctrl_remove
+};

dj_f1_ad9371/vitis_classic_autobuild/source/drivers/platform/xilinx_gpio_irq.h

@@ -0,0 +1,92 @@
+/***************************************************************************//**
+ *   @file   xilinx_gpio_irq.h
+ *   @brief  Implementation of Xilinx GPIO IRQ Generic Driver.
+ *   @author Porumb Andrei ([email protected])
+********************************************************************************
+ * Copyright 2021(c) Analog Devices, Inc.
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *  - Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *  - Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *  - Neither the name of Analog Devices, Inc. nor the names of its
+ *    contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *  - The use of this software may or may not infringe the patent rights
+ *    of one or more patent holders.  This license does not release you
+ *    from the requirement that you obtain separate licenses from these
+ *    patent holders to use this software.
+ *  - Use of the software either in source or binary form, must be run
+ *    on or directly connected to an Analog Devices Inc. component.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT,
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, INTELLECTUAL PROPERTY RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*******************************************************************************/
+
+#ifndef XILINX_GPIO_IRQ_H_
+#define XILINX_GPIO_IRQ_H_
+
+/******************************************************************************/
+/***************************** Include Files **********************************/
+/******************************************************************************/
+
+#include "stdbool.h"
+#include "list.h"
+#include "xgpiops.h"
+#include "irq.h"
+
+/******************************************************************************/
+/*************************** Types Declarations *******************************/
+/******************************************************************************/
+/**
+ * @struct xil_callback_desc
+ * @brief Structure holding callback parameters for each pin
+ */
+struct xil_callback_desc {
+	int32_t pin_nb;
+	struct callback_desc callback;
+	bool triggered;
+	bool enabled;
+};
+
+/**
+ * @struct xil_gpio_irq_init_param
+ * @brief Structure holding the initialization parameters for Xilinx platform
+ * specific GPIO IRQ parameters.
+ */
+struct xil_gpio_irq_init_param {
+	struct irq_ctrl_desc *parent_desc;
+	int32_t gpio_device_id;
+};
+
+/**
+ * @struct xil_gpio_irq_desc
+ * @brief Xilinx platform specific GPIO IRQ descriptor
+ */
+struct xil_gpio_irq_desc {
+	struct irq_ctrl_desc *parent_desc;
+	XGpioPs my_Gpio;
+	struct list_desc *callback_list;
+	struct iterator *it;
+};
+
+/**
+ * @brief Xilinx specific GPIO IRQ platform ops structure
+ */
+extern const struct irq_platform_ops xil_gpio_irq_ops;
+
+#endif

dj_f1_ad9371/vitis_classic_autobuild/source/drivers/platform/xilinx_i2c.c

@@ -0,0 +1,514 @@
+/***************************************************************************//**
+ *   @file   xilinx/xilinx_i2c.c
+ *   @brief  Implementation of Xilinx I2C Generic Driver.
+ *   @author Antoniu Miclaus ([email protected])
+********************************************************************************
+ * Copyright 2019(c) Analog Devices, Inc.
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *  - Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *  - Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *  - Neither the name of Analog Devices, Inc. nor the names of its
+ *    contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *  - The use of this software may or may not infringe the patent rights
+ *    of one or more patent holders.  This license does not release you
+ *    from the requirement that you obtain separate licenses from these
+ *    patent holders to use this software.
+ *  - Use of the software either in source or binary form, must be run
+ *    on or directly connected to an Analog Devices Inc. component.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT,
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, INTELLECTUAL PROPERTY RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*******************************************************************************/
+
+/******************************************************************************/
+/***************************** Include Files **********************************/
+/******************************************************************************/
+
+#include <stdlib.h>
+
+#include <xparameters.h>
+#ifdef XPAR_XIIC_NUM_INSTANCES
+#include <xiic.h>
+#endif
+#ifdef XPAR_XIICPS_NUM_INSTANCES
+#include <xiicps.h>
+#endif
+
+#include "error.h"
+#include "i2c.h"
+#include "xilinx_i2c.h"
+#include "list.h"
+
+/******************************************************************************/
+/*************************** Types Declarations *******************************/
+/******************************************************************************/
+
+static struct list_desc *pl_list = NULL;
+static struct iterator  *pl_it = NULL;
+
+#ifdef XIICPS_H
+static struct list_desc *ps_list = NULL;
+static struct iterator  *ps_it = NULL;
+#endif /* XIICPS_H */
+
+/**
+ * @struct inst_table_item
+ * @brief Table item for I2C cores already started.
+ */
+struct inst_table_item {
+	/** Instance the BSP driver uses for this core. */
+	void *instance;
+	/** Core ID in BSP. */
+	uint32_t device_id;
+	/** Number of ADI driver instances running on this core. */
+	uint32_t inst_no;
+};
+
+#ifdef XPAR_XIICPS_NUM_INSTANCES
+/** Save the current state of the bitrate to not change it each time */
+static uint32_t ps_last_bitrate = 0;
+#endif
+
+/**
+ * @brief Xilinx platform specific I2C platform ops structure
+ */
+const struct i2c_platform_ops xil_i2c_ops = {
+	.i2c_ops_init = &xil_i2c_init,
+	.i2c_ops_write = &xil_i2c_write,
+	.i2c_ops_read = &xil_i2c_read,
+	.i2c_ops_remove = &xil_i2c_remove
+};
+
+/******************************************************************************/
+/************************ Functions Definitions *******************************/
+/******************************************************************************/
+
+/**
+ * @brief Compare two I2C cores by ID.
+ * @param el1 - First I2C core to compare.
+ * @param el2 - Second I2C core to compare.
+ * @return \ref 0 if the two cores have the same ID,
+ *         \ref difference between the first and the second IDs otherwise.
+ */
+static int32_t xil_i2c_cmp(void *el1, void *el2)
+{
+	struct inst_table_item *sel1 = el1, *sel2 = el2;
+
+	return (sel1->device_id - sel2->device_id);
+}
+
+/**
+ * @brief Configure slave address and bitrate if needed
+ * @param desc - Descriptor of the I2C device
+ * @return 0 in case of success, -1 otherwise.
+ */
+static int32_t xil_i2c_set_transmission_config(struct i2c_desc *desc)
+{
+	struct xil_i2c_desc *xil_i2c_desc = desc->extra;
+#ifdef XIICPS_H
+	int32_t ret;
+#endif
+
+	switch (xil_i2c_desc->type) {
+	case IIC_PL:
+#ifdef XIIC_H
+		break;
+#endif
+		return -1;
+	case IIC_PS:
+#ifdef XIICPS_H
+		if (desc->max_speed_hz != ps_last_bitrate) {
+			ret = XIicPs_SetSClk(xil_i2c_desc->instance, desc->max_speed_hz);
+			if (ret != XST_SUCCESS)
+				return -1;
+			ps_last_bitrate = desc->max_speed_hz;
+		}
+		break;
+#endif
+		return -1;
+	default:
+
+		return -1;
+	}
+
+	return 0;
+}
+
+/**
+ * @brief Initialize the I2C communication peripheral.
+ * @param desc - The I2C descriptor.
+ * @param param - The structure that contains the I2C parameters.
+ * @return 0 in case of success, -1 otherwise.
+ */
+int32_t xil_i2c_init(struct i2c_desc **desc,
+		     const struct i2c_init_param *param)
+{
+	int32_t		ret;
+	struct i2c_desc	*idesc;
+	struct xil_i2c_desc	*xdesc;
+	struct xil_i2c_init_param	*xinit;
+
+	idesc = (struct i2c_desc *)malloc(sizeof(*idesc));
+	xdesc = (struct xil_i2c_desc *)malloc(sizeof(*xdesc));
+
+	if(!idesc || !xdesc)
+		goto error;
+
+	idesc->max_speed_hz = param->max_speed_hz;
+	idesc->slave_address = param->slave_address;
+	xinit = param->extra;
+
+	idesc->extra = xdesc;
+	xdesc->type = xinit->type;
+	xdesc->device_id = xinit->device_id;
+	switch (xinit->type) {
+	case IIC_PL:
+#ifdef XIIC_H
+		; /** Intentional empty statement */
+		struct inst_table_item tab_check_pl;
+		struct inst_table_item *temp_el_pl;
+
+		if (!pl_list)
+			list_init(&pl_list, LIST_DEFAULT, xil_i2c_cmp);
+		if (!pl_it)
+			iterator_init(&pl_it, pl_list, true);
+
+		tab_check_pl.device_id = xdesc->device_id;
+
+		if (!IS_ERR_VALUE(list_read_find(pl_list, (void **)&temp_el_pl,
+					&tab_check_pl))) {
+			xdesc->instance = temp_el_pl->instance;
+			temp_el_pl->inst_no++;
+			break;
+		}
+
+		xdesc->instance = (XIic *)malloc(sizeof(XIic));
+		if(!xdesc->instance)
+			goto pl_error;
+
+		xdesc->config = XIic_LookupConfig(xinit->device_id);
+		if(xdesc->config == NULL)
+			goto pl_error;
+
+		ret = XIic_CfgInitialize(xdesc->instance,
+					 xdesc->config,
+					 ((XIic_Config*)xdesc->config)
+					 ->BaseAddress);
+		if(ret != 0)
+			goto pl_error;
+
+		ret = XIic_Start(xdesc->instance);
+		if(ret != 0)
+			goto pl_error;
+
+		ret = XIic_SetAddress(xdesc->instance,
+				      XII_ADDR_TO_SEND_TYPE,
+				      param->slave_address);
+		if(ret != 0)
+			goto pl_error;
+
+		ret = XIic_SelfTest(xdesc->instance);
+		if(ret < 0)
+			goto pl_error;
+
+		ret = XIic_SetGpOutput(xdesc->instance, 1);
+		if(ret < 0)
+			goto pl_error;
+
+		temp_el_pl = (struct inst_table_item*)calloc(1, sizeof(*temp_el_pl));
+		temp_el_pl->device_id = xinit->device_id;
+		temp_el_pl->inst_no = 1;
+		temp_el_pl->instance = xdesc->instance;
+		pl_list->push(pl_list, temp_el_pl);
+
+		break;
+pl_error:
+		free(xdesc->instance);
+#endif
+		goto error;
+	case IIC_PS:
+#ifdef XIICPS_H
+		; /** Intentional empty statement */
+		struct inst_table_item tab_check_ps;
+		struct inst_table_item *temp_el_ps;
+
+		if (!pl_list)
+			list_init(&ps_list, LIST_DEFAULT, xil_i2c_cmp);
+		if (!pl_it)
+			iterator_init(&ps_it, ps_list, true);
+
+		tab_check_ps.device_id = xdesc->device_id;
+
+		if (!IS_ERR_VALUE(list_read_find(ps_list,
+					(void **)&temp_el_ps,
+					&tab_check_ps))) {
+			xdesc->instance = temp_el_ps->instance;
+			temp_el_ps->inst_no++;
+			break;
+		}
+
+		xdesc->instance = (XIicPs *)malloc(sizeof(XIicPs));
+		if(!xdesc->instance)
+			goto ps_error;
+
+		xdesc->config = XIicPs_LookupConfig(xinit->device_id);
+		if(xdesc->config == NULL)
+			goto ps_error;
+
+		ret = XIicPs_CfgInitialize(xdesc->instance,
+					   xdesc->config,
+					   ((XIicPs_Config*)xdesc->config)
+					   ->BaseAddress);
+		if(ret != 0)
+			goto ps_error;
+
+		XIicPs_SetSClk(xdesc->instance, param->max_speed_hz);
+
+		temp_el_ps = (struct inst_table_item*)calloc(1, sizeof(*temp_el_ps));
+		temp_el_ps->device_id = xinit->device_id;
+		temp_el_ps->inst_no = 1;
+		temp_el_ps->instance = xdesc->instance;
+		ps_list->push(ps_list, temp_el_ps);
+
+		break;
+ps_error:
+		free(xdesc->instance);
+#endif
+		goto error;
+
+	default:
+		goto error;
+		break;
+	}
+
+	*desc = idesc;
+
+	return 0;
+
+error:
+	free(idesc);
+	free(xdesc);
+
+	return -1;
+}
+
+/**
+ * @brief Free the resources allocated by i2c_init().
+ * @param desc - The I2C descriptor.
+ * @return 0 in case of success, -1 otherwise.
+ */
+int32_t xil_i2c_remove(struct i2c_desc *desc)
+{
+	struct xil_i2c_desc	*xdesc;
+	int32_t		ret;
+
+	xdesc = desc->extra;
+
+	switch (xdesc->type) {
+	case IIC_PL:
+#ifdef XIIC_H
+		; /** Intentional empty statement */
+		struct inst_table_item tab_check_pl;
+		struct inst_table_item *temp_el_pl;
+		tab_check_pl.device_id = xdesc->device_id;
+		ret = iterator_find(pl_it, &tab_check_pl);
+		if (ret != 0)
+			goto error;
+		iterator_read(pl_it, (void **)&temp_el_pl);
+		temp_el_pl->inst_no--;
+		if (temp_el_pl->inst_no != 0)
+			break;
+
+		ret = XIic_Stop(((XIic *)xdesc->instance));
+
+		if(ret != 0)
+			goto error;
+
+		/** Remove list element */
+		iterator_get(pl_it, (void **)&temp_el_pl);
+		free(temp_el_pl);
+		break;
+#endif
+		goto error;
+	case IIC_PS:
+#ifdef XIICPS_H
+		; /** Intentional empty statement */
+		struct inst_table_item tab_check_ps;
+		struct inst_table_item *temp_el_ps;
+		tab_check_ps.device_id = xdesc->device_id;
+		ret = iterator_find(ps_it, &tab_check_ps);
+		if (ret != 0)
+			goto error;
+		iterator_read(ps_it, (void **)&temp_el_ps);
+		temp_el_ps->inst_no--;
+		if (temp_el_ps->inst_no != 0)
+			break;
+
+		/** Remove list element */
+		iterator_get(ps_it, (void **)&temp_el_ps);
+		free(temp_el_ps);
+		break;
+#endif
+		/* Intended fallthrough */
+error:
+	default:
+
+		return -1;
+	}
+
+	free(desc->extra);
+	free(desc);
+
+	return 0;
+}
+
+/**
+ * @brief Write data to a slave device.
+ * @param desc - The I2C descriptor.
+ * @param data - Buffer that stores the transmission data.
+ * @param bytes_number - Number of bytes to write.
+ * @param stop_bit - Stop condition control.
+ *                   Example: 0 - A stop condition will not be generated;
+ *                            1 - A stop condition will be generated.
+ * @return 0 in case of success, -1 otherwise.
+ */
+int32_t xil_i2c_write(struct i2c_desc *desc,
+		      uint8_t *data,
+		      uint8_t bytes_number,
+		      uint8_t stop_bit)
+{
+	struct xil_i2c_desc	*xdesc;
+	int32_t		ret;
+
+	xdesc = desc->extra;
+
+	switch (xdesc->type) {
+	case IIC_PL:
+#ifdef XIIC_H
+		ret = xil_i2c_set_transmission_config(desc);
+		if (ret != 0)
+			return -1;
+
+		XIic_Send(((XIic*)xdesc->instance)->BaseAddress,
+			  desc->slave_address,
+			  data,
+			  bytes_number,
+			  stop_bit ? XIIC_STOP : XIIC_REPEATED_START);
+		break;
+#endif
+		goto error;
+	case IIC_PS:
+#ifdef XIICPS_H
+		ret = xil_i2c_set_transmission_config(desc);
+		if (ret != 0)
+			return -1;
+
+		ret = XIicPs_SetOptions(xdesc->instance,
+					stop_bit ? 0 : XIICPS_REP_START_OPTION);
+		if(ret != 0)
+			goto error;
+
+		XIicPs_MasterSend(xdesc->instance,
+				  data,
+				  bytes_number,
+				  desc->slave_address);
+		if(ret != 0)
+			goto error;
+
+		break;
+#endif
+		/* Intended fallthrough */
+error:
+	default:
+
+		return -1;
+	}
+
+	return 0;
+}
+
+/**
+ * @brief Read data from a slave device.
+ * @param desc - The I2C descriptor.
+ * @param data - Buffer that will store the received data.
+ * @param bytes_number - Number of bytes to read.
+ * @param stop_bit - Stop condition control.
+ *                   Example: 0 - A stop condition will not be generated;
+ *                            1 - A stop condition will be generated.
+ * @return 0 in case of success, -1 otherwise.
+ */
+int32_t xil_i2c_read(struct i2c_desc *desc,
+		     uint8_t *data,
+		     uint8_t bytes_number,
+		     uint8_t stop_bit)
+{
+	struct xil_i2c_desc	*xdesc;
+	int32_t		ret;
+
+	xdesc = desc->extra;
+
+	switch (xdesc->type) {
+	case IIC_PL:
+#ifdef XIIC_H
+		ret = xil_i2c_set_transmission_config(desc);
+		if (ret != 0)
+			return -1;
+
+		ret = XIic_Recv(((XIic*)xdesc->instance)->BaseAddress,
+				desc->slave_address,
+				data,
+				bytes_number,
+				stop_bit ? XIIC_STOP : XIIC_REPEATED_START);
+		if(ret != bytes_number)
+			goto error;
+
+		break;
+#endif
+		goto error;
+	case IIC_PS:
+#ifdef XIICPS_H
+		ret = xil_i2c_set_transmission_config(desc);
+		if (ret != 0)
+			return -1;
+
+		ret = XIicPs_SetOptions(xdesc->instance,
+					stop_bit ? 0 : XIICPS_REP_START_OPTION);
+		if(ret != 0)
+			goto error;
+
+		XIicPs_MasterRecv(xdesc->instance,
+				  data,
+				  bytes_number,
+				  desc->slave_address);
+		if(ret != 0)
+			goto error;
+
+		break;
+#endif
+		/* Intended fallthrough */
+error:
+	default:
+		return -1;
+
+		break;
+	}
+
+	return 0;
+}

dj_f1_ad9371/vitis_classic_autobuild/source/drivers/platform/xilinx_i2c.h

@@ -0,0 +1,115 @@
+/*******************************************************************************
+ *   @file   xilinx/xilinx_i2c.h
+ *   @brief  Header containing types used in the i2c driver.
+ *   @author scuciurean ([email protected])
+********************************************************************************
+ * Copyright 2019(c) Analog Devices, Inc.
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *  - Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *  - Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *  - Neither the name of Analog Devices, Inc. nor the names of its
+ *    contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *  - The use of this software may or may not infringe the patent rights
+ *    of one or more patent holders.  This license does not release you
+ *    from the requirement that you obtain separate licenses from these
+ *    patent holders to use this software.
+ *  - Use of the software either in source or binary form, must be run
+ *    on or directly connected to an Analog Devices Inc. component.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT,
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, INTELLECTUAL PROPERTY RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*******************************************************************************/
+
+#ifndef XILINX_I2C_H_
+#define XILINX_I2C_H_
+
+/******************************************************************************/
+/***************************** Include Files **********************************/
+/******************************************************************************/
+
+#include <stdint.h>
+
+/******************************************************************************/
+/*************************** Types Declarations *******************************/
+/******************************************************************************/
+
+/**
+ * @enum xil_i2c_type
+ * @brief Xilinx platform architecture sections
+ */
+enum xil_i2c_type {
+	/** Programmable Logic */
+	IIC_PL,
+	/** Processing System */
+	IIC_PS
+};
+
+/**
+ * @struct xil_i2c_init
+ * @brief Structure holding the initialization parameters for Xilinx platform
+ * specific I2C parameters.
+ */
+struct xil_i2c_init_param {
+	/** Xilinx architecture */
+	enum xil_i2c_type	type;
+	/** Device ID */
+	uint32_t		device_id;
+};
+
+/**
+ * @struct xil_i2c_desc
+ * @brief Xilinx platform specific I2C descriptor
+ */
+struct xil_i2c_desc {
+	/** Xilinx architecture */
+	enum xil_i2c_type	type;
+	/** Device ID */
+	uint32_t		device_id;
+	/** Xilinx I2C configuration */
+	void			*config;
+	/** Xilinx I2C Instance */
+	void			*instance;
+};
+
+/**
+ * @brief Xilinx platform specific i2c platform ops structure
+ */
+extern const struct i2c_platform_ops xil_i2c_ops;
+
+/******************************************************************************/
+/************************ Functions Declarations ******************************/
+/******************************************************************************/
+
+/* Initialize the I2C communication peripheral. */
+int32_t xil_i2c_init(struct i2c_desc **desc,
+		     const struct i2c_init_param *param);
+
+/* Free the resources allocated by i2c_init(). */
+int32_t xil_i2c_remove(struct i2c_desc *desc);
+
+/* I2C Write data */
+int32_t xil_i2c_write(struct i2c_desc *desc, uint8_t *data,
+		      uint8_t bytes_number, uint8_t stop_bit);
+
+/* I2C Read data. */
+int32_t xil_i2c_read(struct i2c_desc *desc, uint8_t *data,
+		     uint8_t bytes_number, uint8_t stop_bit);
+
+#endif // XILINX_I2C_H_

dj_f1_ad9371/vitis_classic_autobuild/source/drivers/platform/xilinx_irq.c

@@ -0,0 +1,433 @@
+/***************************************************************************//**
+ *   @file   xilinx/xilinx_irq.c
+ *   @brief  Implementation of Xilinx IRQ Generic Driver.
+ *   @author Cristian Pop ([email protected])
+********************************************************************************
+ * Copyright 2019(c) Analog Devices, Inc.
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *  - Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *  - Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *  - Neither the name of Analog Devices, Inc. nor the names of its
+ *    contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *  - The use of this software may or may not infringe the patent rights
+ *    of one or more patent holders.  This license does not release you
+ *    from the requirement that you obtain separate licenses from these
+ *    patent holders to use this software.
+ *  - Use of the software either in source or binary form, must be run
+ *    on or directly connected to an Analog Devices Inc. component.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT,
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, INTELLECTUAL PROPERTY RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*******************************************************************************/
+
+/******************************************************************************/
+/***************************** Include Files **********************************/
+/******************************************************************************/
+
+#include <xparameters.h>
+#include <stdlib.h>
+#include "error.h"
+#include "irq.h"
+#include "xilinx_irq.h"
+#ifdef XPAR_XSCUGIC_NUM_INSTANCES
+#include <xscugic.h>
+#endif
+#ifdef XPAR_XINTC_NUM_INSTANCES
+#include <xintc.h>
+#endif
+#ifdef XPAR_XTMRCTR_NUM_INSTANCES
+#include <xtmrctr.h>
+#endif
+
+/******************************************************************************/
+/************************ Functions Definitions *******************************/
+/******************************************************************************/
+
+/**
+ * @brief Initialize the IRQ interrupts.
+ * @param desc - The IRQ controller descriptor.
+ * @param param - The structure that contains the IRQ parameters.
+ * @return 0 in case of success, -1 otherwise.
+ */
+int32_t xil_irq_ctrl_init(struct irq_ctrl_desc **desc,
+			  const struct irq_init_param *param)
+{
+	int32_t status;
+	struct irq_ctrl_desc *descriptor;
+	struct xil_irq_desc *xil_dev;
+#ifdef XSCUGIC_H
+	void *config;
+#endif
+
+	descriptor = (struct irq_ctrl_desc *)calloc(1, sizeof *descriptor);
+	if(!descriptor)
+		return -1;
+	xil_dev = (struct xil_irq_desc *)calloc(1, sizeof *xil_dev);
+	if(!xil_dev) {
+		free(descriptor);
+		return -1;
+	}
+
+	Xil_ExceptionInit();
+
+	descriptor->irq_ctrl_id = param->irq_ctrl_id;
+	descriptor->extra = xil_dev;
+	xil_dev->type = ((struct xil_irq_init_param *)param->extra)->type;
+
+	switch(xil_dev->type) {
+	case IRQ_PS:
+#ifdef XSCUGIC_H
+		xil_dev->instance = calloc(1, sizeof(XScuGic));
+		if(!xil_dev->instance)
+			goto error;
+
+		config = XScuGic_LookupConfig(descriptor->irq_ctrl_id);
+		if(!config)
+			goto ps_error;
+
+		status = XScuGic_CfgInitialize(xil_dev->instance, config,
+					       ((XScuGic_Config *)config)->CpuBaseAddress);
+		if (status != 0)
+			goto ps_error;
+
+		Xil_ExceptionRegisterHandler(XIL_EXCEPTION_ID_INT,
+					     (Xil_ExceptionHandler)XScuGic_InterruptHandler,
+					     xil_dev->instance);
+
+		break;
+ps_error:
+		free(xil_dev->instance);
+#endif
+		goto error;
+	case IRQ_PL:
+#ifdef XINTC_H
+		xil_dev->instance = calloc(1, sizeof(XIntc));
+		if(!xil_dev->instance)
+			goto error;
+
+		status = XIntc_Initialize(xil_dev->instance, descriptor->irq_ctrl_id);
+		if(status != 0)
+			goto pl_error;
+
+		status = XIntc_Start(xil_dev->instance, XIN_REAL_MODE);
+		if(status != 0)
+			goto pl_error;
+
+		break;
+pl_error:
+		free(xil_dev->instance);
+#endif
+		goto error;
+	default:
+		goto error;
+
+		break;
+	}
+
+	*desc = descriptor;
+
+	return 0;
+
+error:
+	free(xil_dev);
+	free(descriptor);
+
+	return -1;
+}
+
+/**
+ * @brief Enable global interrupts.
+ * @return 0 in case of success, -1 otherwise.
+ */
+int32_t xil_irq_global_enable(struct irq_ctrl_desc *desc)
+{
+	/* Enable interrupts */
+	Xil_ExceptionEnable();
+
+	return 0;
+}
+
+/**
+ * @brief Disable global interrupts.
+ * @return 0 in case of success, -1 otherwise.
+ */
+int32_t xil_irq_global_disable(struct irq_ctrl_desc *desc)
+{
+	/* Disable interrupts */
+	Xil_ExceptionDisable();
+
+	return 0;
+}
+
+/**
+ * @brief Enable specific interrupt.
+ * @param desc - The IRQ controller descriptor.
+ * @param irq_id - Interrupt identifier.
+ * @return 0 in case of success, -1 otherwise.
+ */
+int32_t xil_irq_enable(struct irq_ctrl_desc *desc, uint32_t irq_id)
+{
+	struct xil_irq_desc *xil_dev = desc->extra;
+
+	switch(xil_dev->type) {
+	case IRQ_PS:
+#ifdef XSCUGIC_H
+		XScuGic_Enable(xil_dev->instance, irq_id);
+#endif
+		break;
+	case IRQ_PL:
+#ifdef XINTC_H
+		XIntc_Enable(xil_dev->instance, irq_id);
+#endif
+		break;
+	default:
+
+		return -1;
+	}
+
+	return 0;
+}
+
+/**
+ * @brief Disable specific interrupt.
+ * @param desc - The IRQ controller descriptor.
+ * @param irq_id - Interrupt identifier.
+ * @return 0 in case of success, -1 otherwise.
+ */
+int32_t xil_irq_disable(struct irq_ctrl_desc *desc, uint32_t irq_id)
+{
+	struct xil_irq_desc *xil_dev = desc->extra;
+
+	switch(xil_dev->type) {
+	case IRQ_PS:
+#ifdef XSCUGIC_H
+		XScuGic_Disable(xil_dev->instance, irq_id);
+#endif
+		break;
+	case IRQ_PL:
+#ifdef XINTC_H
+		XIntc_Disable(xil_dev->instance, irq_id);
+#endif
+		break;
+	default:
+
+		return -1;
+	}
+
+	return 0;
+}
+
+/**
+ * @brief Register a callback to handle the irq events.
+ * @param desc - The IRQ controller descriptor.
+ * @param irq_id - Interrupt identifier.
+ * @param callback_desc - Callback descriptor
+ * @return 0 in case of success, -1 otherwise.
+ */
+int32_t xil_irq_register_callback(struct irq_ctrl_desc *desc,
+				  uint32_t irq_id,
+				  struct callback_desc *callback_desc)
+{
+	struct xil_irq_desc *xil_dev = desc->extra;
+
+	switch(xil_dev->type) {
+	case IRQ_PS:
+#ifdef XSCUGIC_H
+		return XScuGic_Connect(xil_dev->instance, irq_id,
+				       (Xil_InterruptHandler) callback_desc->callback,
+				       callback_desc->ctx);
+#endif
+		break;
+	case IRQ_PL:
+#ifdef XINTC_H
+		if (irq_id == XPAR_AXI_INTC_AXI_TIMER_INTERRUPT_INTR) {
+			int32_t ret;
+
+			ret = XIntc_Connect(xil_dev->instance, irq_id,
+					    XTmrCtr_InterruptHandler, callback_desc->legacy_config);
+			if (IS_ERR_VALUE(ret))
+				return -1;
+			XTmrCtr_SetHandler(callback_desc->legacy_config,
+					   (XTmrCtr_Handler)callback_desc->callback,
+					   callback_desc->ctx);
+
+			return 0;
+		}
+		return XIntc_Connect(xil_dev->instance, irq_id,
+				     (XInterruptHandler) callback_desc->callback,
+				     callback_desc->ctx);
+#endif
+		break;
+	default:
+		break;
+	}
+
+	return -1;
+}
+
+/**
+ * @brief Set interrupt trigger level.
+ * @param desc - The IRQ controller descriptor.
+ * @param irq_id - Interrupt identifier.
+ * @param trig - New trigger level for the interrupt.
+ * @return 0 in case of success, -1 otherwise.
+ */
+int32_t xil_irq_trigger_level_set(struct irq_ctrl_desc *desc,
+				  uint32_t irq_id,
+				  enum irq_trig_level trig)
+{
+	struct xil_irq_desc *xil_dev = desc->extra;
+
+	if(trig == IRQ_EDGE_BOTH)
+		return -EINVAL;
+
+	switch(xil_dev->type) {
+	case IRQ_PS:
+#ifdef XSCUGIC_H
+		;
+		uint8_t priority, trigger;
+
+		XScuGic_GetPriorityTriggerType(xil_dev->instance, irq_id, &priority,
+					       &trigger);
+		trigger = trig;
+		XScuGic_SetPriorityTriggerType(xil_dev->instance, irq_id, priority,
+					       trigger);
+
+		return 0;
+#endif
+		break;
+	case IRQ_PL:
+#ifdef XINTC_H
+		/* Interrupt trigger determined in hardware. TODO: verify */
+		return 0;
+#endif
+		break;
+	default:
+		break;
+	}
+
+	return -1;
+}
+
+/**
+ * @brief Set interrupt trigger level.
+ * @param desc - The IRQ controller descriptor.
+ * @param irq_id - Interrupt identifier.
+ * @param priority_level - New priority level for the interrupt.
+ * @return 0 in case of success, -1 otherwise.
+ */
+int32_t xil_irq_set_priority(struct irq_ctrl_desc *desc,
+		uint32_t irq_id,
+		uint32_t priority_level)
+{
+	struct xil_irq_desc *xil_dev = desc->extra;
+
+	if(priority_level % 8 != 0)
+		return -EINVAL;
+
+	switch(xil_dev->type) {
+	case IRQ_PS:
+#ifdef XSCUGIC_H
+		;
+		uint8_t priority, trigger;
+
+		XScuGic_GetPriorityTriggerType(xil_dev->instance, irq_id, &priority,
+					       &trigger);
+		priority = priority_level;
+		XScuGic_SetPriorityTriggerType(xil_dev->instance, irq_id, priority,
+					       trigger);
+
+		return 0;
+#endif
+		break;
+	case IRQ_PL:
+#ifdef XINTC_H
+		/* Interrupt priority level determined in hardware. TODO: verify */
+		return 0;
+#endif
+		break;
+	default:
+		break;
+	}
+
+	return -1;
+}
+
+/**
+ * @brief Unregisters a generic IRQ handling function.
+ * @param desc - The IRQ controller descriptor.
+ * @param irq_id - Interrupt identifier.
+ * @param cb - Callback descriptor.
+ * @return 0 in case of success, -1 otherwise.
+ */
+int32_t xil_irq_unregister_callback(struct irq_ctrl_desc *desc,
+				    uint32_t irq_id, struct callback_desc *cb)
+{
+	struct xil_irq_desc *xil_dev = desc->extra;
+
+	switch(xil_dev->type) {
+	case IRQ_PS:
+#ifdef XSCUGIC_H
+		XScuGic_Disconnect(xil_dev->instance, irq_id);
+#endif
+		break;
+	case IRQ_PL:
+#ifdef XINTC_H
+		XIntc_Disconnect(xil_dev->instance, irq_id);
+#endif
+		break;
+	default:
+
+		return -1;
+	}
+
+	return 0;
+}
+
+/**
+ * @brief Free the resources allocated by irq_ctrl_init().
+ * @param desc - The IRQ control descriptor.
+ * @return 0 in case of success, -1 otherwise.
+ */
+int32_t xil_irq_ctrl_remove(struct irq_ctrl_desc *desc)
+{
+	struct xil_irq_desc *xil_dev = desc->extra;
+	free(xil_dev->instance);
+	free(desc->extra);
+	free(desc);
+
+	return 0;
+}
+
+/**
+ * @brief Xilinx platform specific IRQ platform ops structure
+ */
+const struct irq_platform_ops xil_irq_ops = {
+	.init = &xil_irq_ctrl_init,
+	.register_callback = &xil_irq_register_callback,
+	.unregister_callback = &xil_irq_unregister_callback,
+	.global_enable = &xil_irq_global_enable,
+	.global_disable = &xil_irq_global_disable,
+	.trigger_level_set = &xil_irq_trigger_level_set,
+	.set_priority = &xil_irq_set_priority,
+	.enable = &xil_irq_enable,
+	.disable = &xil_irq_disable,
+	.remove = &xil_irq_ctrl_remove
+};

dj_f1_ad9371/vitis_classic_autobuild/source/drivers/platform/xilinx_irq.h

@@ -0,0 +1,91 @@
+/*******************************************************************************
+ *   @file   xilinx_irq.h
+ *   @brief  Header containing types used in the irq driver.
+ *   @author Cristian Pop ([email protected])
+********************************************************************************
+ * Copyright 2019(c) Analog Devices, Inc.
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *  - Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *  - Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *  - Neither the name of Analog Devices, Inc. nor the names of its
+ *    contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *  - The use of this software may or may not infringe the patent rights
+ *    of one or more patent holders.  This license does not release you
+ *    from the requirement that you obtain separate licenses from these
+ *    patent holders to use this software.
+ *  - Use of the software either in source or binary form, must be run
+ *    on or directly connected to an Analog Devices Inc. component.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT,
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, INTELLECTUAL PROPERTY RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*******************************************************************************/
+
+#ifndef XILINX_IRQ_H_
+#define XILINX_IRQ_H_
+
+/******************************************************************************/
+/***************************** Include Files **********************************/
+/******************************************************************************/
+
+#include <stdint.h>
+#include "irq.h"
+
+/******************************************************************************/
+/*************************** Types Declarations *******************************/
+/******************************************************************************/
+
+/**
+ * @enum xil_irq_type
+ * @brief Xilinx platform architecture sections
+ */
+enum xil_irq_type {
+	/** Programmable Logic */
+	IRQ_PL,
+	/** Processing System */
+	IRQ_PS
+};
+
+/**
+ * @struct xil_irq_init_param
+ * @brief Structure holding the initialization parameters for Xilinx platform
+ * specific IRQ parameters.
+ */
+struct xil_irq_init_param {
+	/** Xilinx architecture */
+	enum xil_irq_type	type;
+};
+
+/**
+ * @struct xil_irq_desc
+ * @brief Xilinx platform specific IRQ descriptor
+ */
+struct xil_irq_desc {
+	/** Xilinx architecture */
+	enum xil_irq_type	type;
+	/** Xilinx IRQ Instance */
+	void				*instance;
+};
+
+/**
+ * @brief Xilinx specific IRQ platform ops structure
+ */
+extern const struct irq_platform_ops xil_irq_ops;
+
+#endif

dj_f1_ad9371/vitis_classic_autobuild/source/drivers/platform/xilinx_spi.c

@@ -0,0 +1,462 @@
+/***************************************************************************//**
+ *   @file   xilinx/xilinx_spi.c
+ *   @brief  Implementation of Xilinx SPI Generic Driver.
+ *   @author Antoniu Miclaus ([email protected])
+********************************************************************************
+ * Copyright 2019(c) Analog Devices, Inc.
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *  - Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *  - Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *  - Neither the name of Analog Devices, Inc. nor the names of its
+ *    contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *  - The use of this software may or may not infringe the patent rights
+ *    of one or more patent holders.  This license does not release you
+ *    from the requirement that you obtain separate licenses from these
+ *    patent holders to use this software.
+ *  - Use of the software either in source or binary form, must be run
+ *    on or directly connected to an Analog Devices Inc. component.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT,
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, INTELLECTUAL PROPERTY RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*******************************************************************************/
+
+/******************************************************************************/
+/***************************** Include Files **********************************/
+/******************************************************************************/
+
+#include <stdlib.h>
+
+#include <xparameters.h>
+#ifdef XPAR_XSPI_NUM_INSTANCES
+#include <xspi.h>
+#endif
+#ifdef XPAR_XSPIPS_NUM_INSTANCES
+#include <xspips.h>
+#endif
+
+#include "error.h"
+#include "spi.h"
+#include "xilinx_spi.h"
+
+#if defined(PLATFORM_ZYNQ)
+#define SPI_CLK_FREQ_HZ(dev)	(XPAR_PS7_SPI_ ## dev ## _SPI_CLK_FREQ_HZ)
+#define SPI_NUM_INSTANCES	XPAR_XSPIPS_NUM_INSTANCES
+#elif defined(PLATFORM_ZYNQMP)
+#define SPI_CLK_FREQ_HZ(dev)	(XPAR_PSU_SPI_ ## dev ## _SPI_CLK_FREQ_HZ)
+#define SPI_NUM_INSTANCES	XPAR_XSPIPS_NUM_INSTANCES
+#else
+#define SPI_NUM_INSTANCES	0
+#endif
+
+#warning SPI delays are not supported on the xilinx platform
+
+/******************************************************************************/
+/************************ Functions Definitions *******************************/
+/******************************************************************************/
+
+/**
+ * @brief Initialize the hardware SPI peripherial
+ *
+ * @param xdesc Platform specific SPI descriptor
+ * @param xinit Platform specific SPI init param
+ * @return int32_t -1 if the device couldn't be found or configured
+ */
+static int32_t spi_init_pl(struct spi_desc *desc,
+			   const struct spi_init_param *param)
+{
+#ifdef XSPI_H
+	int32_t				ret;
+	struct xil_spi_desc 		*xdesc;
+	struct xil_spi_init_param	*xinit;
+
+	xdesc = (struct xil_spi_desc*)malloc(sizeof(struct xil_spi_desc));
+	if(!xdesc) {
+		free(xdesc);
+		return -1;
+	}
+
+	desc->extra = xdesc;
+	xinit = param->extra;
+	xdesc->type = xinit->type;
+	xdesc->flags = xinit->flags;
+
+	xdesc->instance = (XSpi*)calloc(1, sizeof(XSpi));
+	if(!xdesc->instance)
+		goto pl_error;
+
+	xdesc->config = XSpi_LookupConfig(param->device_id);
+	if(xdesc->config == NULL)
+		goto pl_error;
+
+	ret = XSpi_CfgInitialize(xdesc->instance,
+				 xdesc->config,
+				 ((XSpi_Config*)xdesc->config)
+				 ->BaseAddress);
+	if(ret != 0)
+		goto pl_error;
+
+	ret = XSpi_Initialize(xdesc->instance, param->device_id);
+	if (ret != 0)
+		goto pl_error;
+
+	ret = XSpi_SetOptions(xdesc->instance,
+			      XSP_MASTER_OPTION |
+			      ((desc->mode & SPI_CPOL) ?
+			       XSP_CLK_ACTIVE_LOW_OPTION : 0) |
+			      ((desc->mode & SPI_CPHA) ?
+			       XSP_CLK_PHASE_1_OPTION : 0));
+	if (ret != 0)
+		goto pl_error;
+
+	ret = XSpi_Start(xdesc->instance);
+	if (ret != 0)
+		goto pl_error;
+
+	XSpi_IntrGlobalDisable((XSpi *)(xdesc->instance));
+
+	return 0;
+
+pl_error:
+	free(xdesc->instance);
+	free(xdesc);
+#endif
+	return -1;
+}
+
+/**
+ * @brief Initialize the hardware SPI peripherial
+ *
+ * @param xdesc Platform specific SPI descriptor
+ * @param xinit Platform specific SPI init param
+ * @return int32_t -1 if the device couldn't be found or configured
+ */
+static int32_t spi_init_ps(struct spi_desc *desc,
+			   const struct spi_init_param *param)
+{
+#ifdef XSPIPS_H
+	int32_t				ret;
+	struct xil_spi_desc 		*xdesc;
+	struct xil_spi_init_param	*xinit;
+	const uint32_t			prescaler_default = XSPIPS_CLK_PRESCALE_64;
+	const uint32_t			prescaler_min = XSPIPS_CLK_PRESCALE_4;
+	const uint32_t			prescaler_max = XSPIPS_CLK_PRESCALE_256;
+	uint32_t			prescaler = 0u;
+	uint32_t			input_clock = 0u;
+
+	xdesc = (struct xil_spi_desc*)malloc(sizeof(struct xil_spi_desc));
+	if(!xdesc) {
+		free(xdesc);
+		return -1;
+	}
+
+	desc->extra = xdesc;
+	xinit = param->extra;
+	xdesc->type = xinit->type;
+	xdesc->flags = xinit->flags;
+
+	xdesc->instance = (XSpiPs*)malloc(sizeof(XSpiPs));
+	if(!xdesc->instance)
+		goto ps_error;
+
+	xdesc->config = XSpiPs_LookupConfig(param->device_id);
+	if(xdesc->config == NULL)
+		goto ps_error;
+
+	ret = XSpiPs_CfgInitialize(xdesc->instance,
+				   xdesc->config,
+				   ((XSpiPs_Config*)xdesc->config)
+				   ->BaseAddress);
+	if(ret != 0)
+		goto ps_error;
+
+	switch (param->device_id) {
+#if (SPI_NUM_INSTANCES >= 1)
+	case 0:
+		input_clock = SPI_CLK_FREQ_HZ(0);
+		break;
+#endif
+#if (SPI_NUM_INSTANCES >= 2)
+	case 1:
+		input_clock = SPI_CLK_FREQ_HZ(1);
+		break;
+#endif
+	default:
+		goto ps_error;
+	};
+
+	if (desc->max_speed_hz != 0u) {
+		uint32_t div = input_clock / desc->max_speed_hz;
+		uint32_t rem = input_clock % desc->max_speed_hz;
+		uint32_t po2 = !(div & (div - 1)) && !rem;
+
+		// find the power of two just higher than div and
+		// store the exponent in prescaler
+		while(div) {
+			prescaler += 1;
+			div >>= 1u;
+		}
+
+		// this exponent - 1 is needed because of the way
+		// xilinx stores it into registers
+		if (prescaler)
+			prescaler -= 1;
+
+		// this exponent - 1 is needed when initial div was
+		// precisely a power of two
+		if (prescaler && po2)
+			prescaler -= 1;
+
+		if (prescaler < prescaler_min)
+			prescaler = prescaler_min;
+
+		if (prescaler > prescaler_max)
+			prescaler = prescaler_max;
+	} else
+		prescaler = prescaler_default;
+
+	ret = XSpiPs_SetClkPrescaler(xdesc->instance, prescaler);
+
+	if(ret != 0)
+		goto ps_error;
+
+	return 0;
+
+ps_error:
+	free(xdesc->instance);
+	free(xdesc);
+#endif
+	return -1;
+}
+
+/**
+ * @brief Initialize the SPI communication peripheral.
+ * @param desc - The SPI descriptor.
+ * @param param - The structure that contains the SPI parameters.
+ * @return 0 in case of success, -1 otherwise.
+ */
+int32_t xil_spi_init(struct spi_desc **desc,
+		     const struct spi_init_param *param)
+{
+	int32_t				ret;
+	enum xil_spi_type		*spi_type;
+
+	if (!param) {
+		return -1;
+	}
+
+	*desc = malloc(sizeof(**desc));
+	if(! *desc) {
+		free(*desc);
+		return -1;
+	}
+
+	spi_type = param->extra;
+
+	if(!spi_type)
+		goto init_error;
+
+	(*desc)->max_speed_hz = param->max_speed_hz;
+	(*desc)->mode = param->mode;
+	(*desc)->bit_order = param->bit_order;
+	(*desc)->chip_select = param->chip_select;
+
+	switch (*spi_type) {
+	case SPI_PL:
+		ret = spi_init_pl(*desc, param);
+		break;
+	case SPI_PS:
+		ret = spi_init_ps(*desc, param);
+		break;
+
+	default:
+		goto init_error;
+		break;
+	}
+
+	if (ret != 0) {
+init_error:
+		free(*desc);
+
+		return -1;
+	}
+
+	return ret;
+}
+
+/**
+ * @brief Free the resources allocated by spi_init().
+ * @param desc - The SPI descriptor.
+ * @return 0 in case of success, -1 otherwise.
+ */
+int32_t xil_spi_remove(struct spi_desc *desc)
+{
+#ifdef XSPI_H
+	int32_t				ret;
+#endif
+	struct xil_spi_desc	*xdesc = NULL;
+	enum xil_spi_type	*spi_type;
+
+	spi_type = desc->extra;
+
+	if(!spi_type)
+		return -1;
+
+	switch (*spi_type ) {
+	case SPI_PL:
+#ifdef XSPI_H
+		xdesc = desc->extra;
+
+		if(!xdesc)
+			return -1;
+
+		ret = XSpi_Stop((XSpi *)(xdesc->instance));
+		if(ret != 0)
+			goto error;
+#endif
+		break;
+	case SPI_PS:
+#ifdef XSPIPS_H
+		xdesc = desc->extra;
+
+		if(!xdesc)
+			return -1;
+#endif
+		break;
+
+		/* Intended fallthrough */
+#ifdef XSPI_H
+error:
+#endif
+	default:
+		return -1;
+	}
+
+	if(xdesc)
+		free(xdesc->instance);
+	free(desc->extra);
+	free(desc);
+
+	return 0;
+}
+
+/**
+ * @brief Write and read data to/from SPI.
+ * @param desc - The SPI descriptor.
+ * @param data - The buffer with the transmitted/received data.
+ * @param bytes_number - Number of bytes to write/read.
+ * @return 0 in case of success, -1 otherwise.
+ */
+int32_t xil_spi_write_and_read(struct spi_desc *desc,
+			       uint8_t *data,
+			       uint16_t bytes_number)
+{
+	int32_t			ret;
+#ifdef XSPI_H
+	uint32_t		ctrl_reg;
+#endif
+	struct xil_spi_desc	*xdesc;
+	enum xil_spi_type	*spi_type;
+
+	ret = -1;
+
+	spi_type = desc->extra;
+
+	if(!spi_type)
+		return -1;
+
+	xdesc = desc->extra;
+
+	switch (*spi_type) {
+	case SPI_PL:
+#ifdef XSPI_H
+		ret = XSpi_SetOptions(xdesc->instance,
+				      XSP_MASTER_OPTION |
+				      ((desc->mode & SPI_CPOL) ?
+				       XSP_CLK_ACTIVE_LOW_OPTION : 0) |
+				      ((desc->mode & SPI_CPHA) ?
+				       XSP_CLK_PHASE_1_OPTION : 0));
+		if (ret != 0)
+			goto error;
+
+		ctrl_reg = XSpi_GetControlReg(((XSpi*)xdesc->instance));
+		if (desc->bit_order == SPI_BIT_ORDER_LSB_FIRST)
+			ctrl_reg |= XSP_CR_LSB_MSB_FIRST_MASK;
+		else
+			ctrl_reg &= ~ XSP_CR_LSB_MSB_FIRST_MASK;
+		XSpi_SetControlReg(((XSpi*)xdesc->instance), ctrl_reg);
+
+		ret = XSpi_SetSlaveSelect(xdesc->instance,
+					  0x01 << desc->chip_select);
+		if (ret != 0)
+			goto error;
+
+		ret = XSpi_Transfer(xdesc->instance,
+				    data,
+				    data,
+				    bytes_number);
+		if (ret != 0)
+			goto error;
+#endif
+		break;
+	case SPI_PS:
+#ifdef XSPIPS_H
+		ret = XSpiPs_SetOptions(xdesc->instance,
+					XSPIPS_MASTER_OPTION |
+					((xdesc->flags & SPI_CS_DECODE) ?
+					 XSPIPS_DECODE_SSELECT_OPTION : 0) |
+					XSPIPS_FORCE_SSELECT_OPTION |
+					((desc->mode & SPI_CPOL) ?
+					 XSPIPS_CLK_ACTIVE_LOW_OPTION : 0) |
+					((desc->mode & SPI_CPHA) ?
+					 XSPIPS_CLK_PHASE_1_OPTION : 0));
+		if (ret != 0)
+			goto error;
+
+		ret = XSpiPs_SetSlaveSelect(xdesc->instance,
+					    desc->chip_select);
+		if (ret != 0)
+			goto error;
+		ret = XSpiPs_PolledTransfer(xdesc->instance,
+					    data,
+					    data,
+					    bytes_number);
+		if (ret != 0)
+			goto error;
+		ret = XSpiPs_SetSlaveSelect(xdesc->instance, SPI_DEASSERT_CURRENT_SS);
+		if (ret != 0)
+			goto error;
+#endif
+		break;
+error:
+	default:
+		return -1;
+	}
+
+	return ret;
+}
+
+/**
+ * @brief Xilinx platform specific SPI platform ops structure
+ */
+const struct spi_platform_ops xil_spi_ops = {
+	.init = &xil_spi_init,
+	.write_and_read = &xil_spi_write_and_read,
+	.remove = &xil_spi_remove
+};

dj_f1_ad9371/vitis_classic_autobuild/source/drivers/platform/xilinx_spi.h

@@ -0,0 +1,110 @@
+/*******************************************************************************
+ *   @file   xilinx/xilinx_spi.h
+ *   @brief  Header containing extra types used in the spi driver.
+ *   @author scuciurean ([email protected])
+********************************************************************************
+ * Copyright 2019(c) Analog Devices, Inc.
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *  - Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *  - Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *  - Neither the name of Analog Devices, Inc. nor the names of its
+ *    contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *  - The use of this software may or may not infringe the patent rights
+ *    of one or more patent holders.  This license does not release you
+ *    from the requirement that you obtain separate licenses from these
+ *    patent holders to use this software.
+ *  - Use of the software either in source or binary form, must be run
+ *    on or directly connected to an Analog Devices Inc. component.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT,
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, INTELLECTUAL PROPERTY RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*******************************************************************************/
+#ifndef XILINX_SPI_H_
+#define XILINX_SPI_H_
+
+/******************************************************************************/
+/***************************** Include Files **********************************/
+/******************************************************************************/
+
+#include <stdint.h>
+#include "spi.h"
+
+/******************************************************************************/
+/********************** Macros and Constants Definitions **********************/
+/******************************************************************************/
+
+#define SPI_CS_DECODE			0x01
+#define SPI_DEASSERT_CURRENT_SS	0x0F
+
+/******************************************************************************/
+/*************************** Types Declarations *******************************/
+/******************************************************************************/
+
+/**
+ * @enum xil_spi_type
+ * @brief Xilinx platform architecture sections
+ */
+enum xil_spi_type {
+	/** Programmable Logic */
+	SPI_PL,
+	/** Processing System */
+	SPI_PS,
+	/** SPI Engine */
+	SPI_ENGINE
+};
+
+/**
+ * @struct xil_spi_init_param
+ * @brief Structure holding the initialization parameters for Xilinx platform
+ * specific SPI parameters when using xil_spi_ops.
+ */
+struct xil_spi_init_param {
+	/** Xilinx architecture */
+	enum xil_spi_type	type;
+	/** SPI flags */
+	uint32_t		flags;
+};
+
+/**
+ * @struct xil_spi_desc
+ * @brief Xilinx platform specific SPI descriptor
+ */
+struct xil_spi_desc {
+	/** Xilinx architecture */
+	enum xil_spi_type	type;
+	/** SPI flags */
+	uint32_t		flags;
+	/** SPI configuration */
+	void			*config;
+	/** SPI instance */
+	void			*instance;
+};
+
+/**
+ * @brief Xilinx specific SPI platform ops structure
+ */
+extern const struct spi_platform_ops xil_spi_ops;
+
+/**
+ * @brief Xilinx SPI PS register functions. No extra param needed
+ */
+extern const struct spi_platform_ops xil_spi_pl_ops;
+
+#endif // XILINX_SPI_H_

dj_f1_ad9371/vitis_classic_autobuild/source/drivers/platform/xilinx_spi_pl.c

@@ -0,0 +1,532 @@
+/*******************************************************************************
+ *   @file   xilinx/xilinx_spi_pl.c
+ *   @brief  Driver for spi pl device using registers
+ *   @author Mihail Chindris ([email protected])
+********************************************************************************
+ * Copyright 2021(c) Analog Devices, Inc.
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *  - Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *  - Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *  - Neither the name of Analog Devices, Inc. nor the names of its
+ *    contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *  - The use of this software may or may not infringe the patent rights
+ *    of one or more patent holders.  This license does not release you
+ *    from the requirement that you obtain separate licenses from these
+ *    patent holders to use this software.
+ *  - Use of the software either in source or binary form, must be run
+ *    on or directly connected to an Analog Devices Inc. component.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT,
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, INTELLECTUAL PROPERTY RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*******************************************************************************/
+
+#include <xparameters.h>
+
+#ifdef XPAR_XSPI_NUM_INSTANCES
+
+/******************************************************************************/
+/***************************** Include Files **********************************/
+/******************************************************************************/
+
+#include <xspi.h>
+#include <stdlib.h>
+#include <stdbool.h>
+#include "spi.h"
+#include "error.h"
+#include "delay.h"
+#include "util.h"
+
+/******************************************************************************/
+/********************** Macros and Constants Definitions **********************/
+/******************************************************************************/
+
+#define XPS_TYPE_WRITE		0x1
+#define XPS_TYPE_READ		0x2
+#define XSP_DEFAULT_SR_VALUE	0x25
+#define XSP_DUMMY_DATA		0xFF
+
+/*
+ * Used to store current spi device configuration in order to not update it for
+ * each spi transaction if not needed.
+ */
+static struct spi_desc g_spi_desc[XPAR_XSPI_NUM_INSTANCES];
+
+/******************************************************************************/
+/*************************** Types Declarations *******************************/
+/******************************************************************************/
+
+/* Xilinx PL spi specific data */
+struct xspi_desc {
+	uint32_t base_addr;
+	uint32_t disable_slaves_mask;
+	uint32_t fifo_depth;
+	uint8_t  cs_asserted;
+};
+
+/* Structure used to iterate over SPI messages */
+struct msg_iter {
+	struct spi_msg	*msgs;
+	uint32_t	len;
+	uint32_t	i;
+	uint32_t	buff_i;
+	uint8_t		is_wr;
+};
+
+/******************************************************************************/
+/************************ Functions Definitions *******************************/
+/******************************************************************************/
+
+/* Read device register */
+static inline uint32_t _read(struct xspi_desc *xdesc, uint32_t reg)
+{
+	return Xil_In32(xdesc->base_addr + reg);
+}
+
+/* Write device register */
+static inline void _write(struct xspi_desc *xdesc, uint32_t reg, uint32_t val)
+{
+	Xil_Out32(xdesc->base_addr + reg, val);
+}
+
+/* Update device register. Only bits set to 1 in mask will be modified */
+static inline void _wr_mask(struct xspi_desc *xdesc, uint32_t reg,
+			    uint32_t val, uint32_t mask)
+{
+	uint32_t tmp;
+
+	tmp = _read(xdesc, reg);
+	tmp &= ~mask;
+	tmp |= val & mask;
+	_write(xdesc, reg, tmp);
+}
+
+/* Update spi device configuration if needed */
+static void _update_mode(struct spi_desc *desc)
+{
+	uint32_t		val;
+	uint32_t		mask;
+
+	if (desc->mode == g_spi_desc[desc->device_id].mode &&
+	    desc->bit_order == g_spi_desc[desc->device_id].bit_order)
+		return ;
+
+	/* Update mode */
+	val = desc->mode | SPI_CPOL ? XSP_CR_CLK_POLARITY_MASK : 0;
+	val |= desc->mode | SPI_CPHA ? XSP_CR_CLK_PHASE_MASK : 0;
+	mask = XSP_CR_CLK_POLARITY_MASK | XSP_CR_CLK_PHASE_MASK;
+
+	val |= desc->bit_order == SPI_BIT_ORDER_LSB_FIRST ?
+	       XSP_CR_LSB_MSB_FIRST_MASK : 0;
+	mask |= XSP_CR_LSB_MSB_FIRST_MASK;
+
+	_wr_mask(desc->extra, XSP_CR_OFFSET, val, mask);
+	g_spi_desc[desc->device_id] = *desc;
+}
+
+/* Configure SPI PL device */
+static int32_t _xil_spi_init_dev(struct xspi_desc *xdesc)
+{
+	uint32_t val;
+
+	/* Software reset */
+	_write(xdesc, XSP_SRR_OFFSET, XSP_SRR_RESET_MASK);
+	mdelay(1);
+
+	/* Check if success reset */
+	val = _read(xdesc, XSP_SR_OFFSET);
+	if (val != XSP_DEFAULT_SR_VALUE)
+		return -ENODEV;
+
+	/* Disable interrupts. Drivers only works with pooled mode */
+	_write(xdesc, XSP_IIER_OFFSET, 0);
+
+	/* Deasert chip selects */
+	_write(xdesc, XSP_SSR_OFFSET, 0xFFFFFFFF);
+
+	/* Get fifo depth */
+	while (!(_read(xdesc, XSP_SR_OFFSET) & XSP_SR_TX_FULL_MASK))
+		_write(xdesc, XSP_DTR_OFFSET, XSP_DUMMY_DATA);
+	xdesc->fifo_depth = _read(xdesc, XSP_TFO_OFFSET) + 1;
+
+	/* Configure spi device */
+	val = XSP_CR_ENABLE_MASK |
+	      XSP_CR_MANUAL_SS_MASK |
+	      XSP_CR_TXFIFO_RESET_MASK |
+	      XSP_CR_RXFIFO_RESET_MASK |
+	      XSP_CR_MASTER_MODE_MASK |
+	      XSP_CR_TRANS_INHIBIT_MASK;
+
+	_write(xdesc, XSP_CR_OFFSET, val);
+
+	return 0;
+}
+
+/* Initialize spi_desc structure and device */
+static int32_t xil_spi_init_pl(struct spi_desc **desc,
+			       const struct spi_init_param *param)
+{
+	struct spi_desc		*ldesc;
+	struct xspi_desc	*xdesc;
+	int32_t			err;
+	XSpi_Config		*cfg;
+
+	if (!desc || !param || param->device_id >= XPAR_XSPI_NUM_INSTANCES)
+		return -EINVAL;
+
+	cfg = XSpi_LookupConfig(param->device_id);
+	if (!cfg)
+		return -EINVAL;
+
+	if (param->chip_select > cfg->NumSlaveBits)
+		return -EINVAL;
+
+	ldesc = (struct spi_desc *)calloc(1, sizeof(*ldesc));
+	if (!ldesc)
+		return -ENOMEM;
+
+	xdesc = (struct xspi_desc *)calloc(1, sizeof(*xdesc));
+	if (!xdesc) {
+		err = -ENOMEM;
+		goto error;
+	}
+
+	ldesc->bit_order = param->bit_order;
+	ldesc->chip_select = param->chip_select;
+	ldesc->mode = param->mode;
+	xdesc->base_addr = cfg->BaseAddress;
+	xdesc->disable_slaves_mask = (1 << cfg->NumSlaveBits) - 1;
+	xdesc->cs_asserted = 0;
+
+	err = _xil_spi_init_dev(xdesc);
+	if (IS_ERR_VALUE(err))
+		goto error;
+
+	ldesc->extra = xdesc;
+	*desc = ldesc;
+
+	return 0;
+
+error:
+	free(xdesc);
+	free(ldesc);
+
+	return err;
+}
+
+/* Remove allocated resources */
+static int32_t xil_spi_remove_pl(struct spi_desc *desc)
+{
+	if (!desc)
+		return -EINVAL;
+
+	free(desc->extra);
+	free(desc);
+
+	return 0;
+}
+
+/*
+ * Fill fifo until fifo is full or no more data available.
+ * Return the number of written bytes.
+ */
+static uint32_t _wr_fifo(struct xspi_desc *xdesc, uint8_t *data,
+			 uint32_t len)
+{
+	uint32_t i;
+	uint32_t to_write;
+	uint32_t tx_available;
+
+	tx_available = xdesc->fifo_depth - _read(xdesc, XSP_TFO_OFFSET);
+	to_write = min(tx_available, len);
+	for (i = 0; i < to_write; ++i)
+		if (data)
+			_write(xdesc, XSP_DTR_OFFSET, data[i]);
+		else
+			_write(xdesc, XSP_DTR_OFFSET, XSP_DUMMY_DATA);
+
+	return to_write;
+}
+
+/*
+ * Read fifo until fifo is empty or no more buffer available to read into
+ * Returns the number of read bytes
+ */
+static uint32_t _rd_fifo(struct xspi_desc *xdesc, uint8_t *data,
+			 uint32_t len)
+{
+	uint32_t rx_available;
+	uint32_t to_read;
+	uint32_t tmp;
+	uint32_t i;
+
+	tmp = _read(xdesc, XSP_SR_OFFSET);
+	if (tmp & XSP_SR_RX_EMPTY_MASK)
+		return 0;
+
+	rx_available = _read(xdesc, XSP_RFO_OFFSET) + 1;
+	to_read = min(rx_available, len);
+	for (i = 0; i < to_read; ++i) {
+		tmp = _read(xdesc, XSP_DRR_OFFSET);
+		if (data)
+			data[i] = tmp;
+	}
+
+	return to_read;
+}
+
+/* If start is 0 stop transfer, else start it.
+ * CS will be asserted if needed. If different CS othere than the one needed
+ * is asserted. Deassert it and assert correct one */
+static void _xil_spi_start_transfer(struct spi_desc *desc, uint8_t start)
+{
+	struct xspi_desc	*xdesc;
+
+	xdesc = desc->extra;
+	if (start) {
+		if (xdesc->cs_asserted) {
+			if (desc->chip_select ==
+			    g_spi_desc[desc->device_id].chip_select)
+				return ;
+			else
+				/* Stop transfer to start again with new CS */
+				_xil_spi_start_transfer(desc, 0);
+		}
+		_write(xdesc, XSP_SSR_OFFSET, ~(1 << desc->chip_select));
+		_wr_mask(xdesc, XSP_CR_OFFSET, 0, XSP_CR_TRANS_INHIBIT_MASK);
+	} else {
+		_wr_mask(xdesc, XSP_CR_OFFSET, XSP_CR_TRANS_INHIBIT_MASK,
+			 XSP_CR_TRANS_INHIBIT_MASK);
+		_write(xdesc, XSP_SSR_OFFSET, xdesc->disable_slaves_mask);
+	}
+	xdesc->cs_asserted = start;
+}
+
+
+/* SPI polled transfer */
+static int32_t xil_spi_write_and_read_pl(struct spi_desc *desc,
+		uint8_t *data,
+		uint16_t bytes_number)
+{
+	struct xspi_desc	*xdesc;
+	uint32_t		rx;
+	uint32_t		tx;
+
+	if (!desc || !desc->extra)
+		return -EINVAL;
+
+	xdesc = desc->extra;
+	_update_mode(desc);
+
+	_xil_spi_start_transfer(desc, 1);
+	rx = 0;
+	tx = 0;
+	while (rx < bytes_number) {
+		if (tx < bytes_number)
+			tx += _wr_fifo(xdesc, data + tx, bytes_number - tx);
+		rx += _rd_fifo(xdesc, data + rx, bytes_number - rx);
+	}
+	_xil_spi_start_transfer(desc, 0);
+
+	return 0;
+}
+
+/* Get type of message. It can be READ, WRITE or both */
+static uint32_t _get_msg_type(struct spi_msg *msg)
+{
+	uint32_t	type;
+
+	type = 0;
+	if (msg->tx_buff)
+		type |= XPS_TYPE_WRITE;
+	if (msg->rx_buff)
+		type |= XPS_TYPE_READ;
+
+	return type;
+}
+
+/* Get information based on current iterator position */
+static void _get_data(struct msg_iter *it, uint8_t **buff, uint32_t *len,
+		      uint32_t *type)
+{
+	struct spi_msg *msg;
+
+	if (it->i == it->len) {
+		*len = 0;
+		return ;
+	}
+
+	msg = it->msgs + it->i;
+	if (it->is_wr)
+		*buff = msg->tx_buff;
+	else
+		*buff = msg->rx_buff;
+
+	if (*buff)
+		*buff += it->buff_i;
+
+	*len = msg->bytes_number - it->buff_i;
+	if (type)
+		*type = _get_msg_type(msg);
+}
+
+/*
+ * Increment iterator position with desired length.
+ * If the new position has a different message type, new_type will be set to 1
+ * If a CS change is needed, cs_change is set
+ */
+static void _increment_iter(struct msg_iter *it, uint32_t len,
+			    uint8_t *cs_change, uint8_t *new_type)
+{
+	struct spi_msg	*msg;
+	uint32_t	type;
+	uint32_t	extra_len;
+
+	if (!len)
+		return ;
+
+	*cs_change = 0;
+	*new_type = 0;
+	msg = it->msgs + it->i;
+	if (it->buff_i + len > msg->bytes_number)
+		extra_len = it->buff_i + len - msg->bytes_number;
+	else
+		extra_len = 0;
+	len -= extra_len;
+	it->buff_i += len;
+	if (it->buff_i == msg->bytes_number) {
+		type = _get_msg_type(msg);
+		++it->i;
+		it->buff_i = 0;
+		if (cs_change && msg->cs_change)
+			*cs_change = 1;
+		if (new_type)
+			if (it->i == it->len ||
+			    type != _get_msg_type(it->msgs + it->i))
+				*new_type = 1;
+	}
+	if (extra_len)
+		_increment_iter(it, extra_len, cs_change, new_type);
+}
+
+/*
+ * SPI polling transfer of multiple messages.
+ */
+static int32_t xil_spi_transfer_pl(struct spi_desc *desc,
+				   struct spi_msg *msgs,
+				   uint32_t len)
+
+{
+	struct xspi_desc	*xdesc;
+	uint8_t			cs_change;
+	uint8_t			new_type;
+	struct msg_iter		rx = {.msgs = msgs, .len = len, .is_wr = 0};
+	struct msg_iter		tx = {.msgs = msgs, .len = len, .is_wr = 1};
+	uint8_t			*buff;
+	uint32_t		bytes;
+	uint32_t		type;
+	/* Bytes to increment rx when only a write transaction is executed */
+	uint32_t		to_inc_rx;
+	/* Difference between rx and tx iterators in bytes */
+	uint32_t		tx_advance;
+	/* Save bytes sent during a write loop */
+	uint32_t		tx_sent;
+	/* Used to loop if need to empty the RX FIFO */
+	uint32_t		loop;
+
+	if (!desc || !desc->extra)
+		return -EINVAL;
+
+	xdesc = desc->extra;
+	_update_mode(desc);
+
+	tx_advance = 0;
+	to_inc_rx = 0;
+	buff = NULL;
+	type = 0;
+	do {
+		_xil_spi_start_transfer(desc, 1);
+
+		tx_sent = 0;
+		/* Writing loop */
+		do {
+			_get_data(&tx, &buff, &bytes, &type);
+			if (type & XPS_TYPE_READ)
+				/*
+				 * Do not write more bytes than fifo_depth if
+				 * they haven't been read.
+				 */
+				bytes = min(bytes,
+						  xdesc->fifo_depth - tx_advance);
+			bytes = _wr_fifo(xdesc, buff, bytes);
+			tx_sent += bytes;
+			_increment_iter(&tx, bytes, &cs_change, &new_type);
+			tx_advance += bytes;
+		} while (!cs_change && !new_type && bytes);
+
+		if (type & XPS_TYPE_READ) {
+			loop = 1;
+			/*
+			 * Loop only when no more data to write otherwise read
+			 * only available data.
+			 */
+			while (loop) {
+				if (!new_type)
+					loop = 0;
+				_get_data(&rx, &buff, &bytes, NULL);
+				bytes = _rd_fifo(xdesc, buff, bytes);
+				_increment_iter(&rx, bytes, &cs_change, &new_type);
+				tx_advance -= bytes;
+				if (loop && new_type)
+					break;
+			}
+		} else {
+			/* Clean RX FIFO if it was only a WRITE message */
+			to_inc_rx += tx_sent;
+			if (new_type) {
+				/* Wait for TX to be sent */
+				while (!(_read(xdesc, XSP_SR_OFFSET) &
+					 XSP_SR_TX_EMPTY_MASK))
+					;
+				/* Reset fifo. Only write was performed */
+				_wr_mask(xdesc, XSP_CR_OFFSET,
+					 XSP_CR_RXFIFO_RESET_MASK,
+					 XSP_CR_RXFIFO_RESET_MASK);
+
+				_increment_iter(&rx, to_inc_rx, NULL, NULL);
+				tx_advance -= to_inc_rx;
+				to_inc_rx = 0;
+			}
+		}
+
+		if ((cs_change && rx.i != len) || (!cs_change && rx.i == len))
+			_xil_spi_start_transfer(desc, 0);
+	} while (rx.i < len);
+
+	return 0;
+}
+
+const struct spi_platform_ops xil_spi_pl_ops = {
+	.init = xil_spi_init_pl,
+	.remove = xil_spi_remove_pl,
+	.write_and_read = xil_spi_write_and_read_pl,
+	.transfer = xil_spi_transfer_pl
+};
+
+#endif // XPAR_XSPI_NUM_INSTANCES

dj_f1_ad9371/vitis_classic_autobuild/source/drivers/platform/xilinx_timer.c

@@ -0,0 +1,456 @@
+/***************************************************************************//**
+*   @file   xilinx/xilinx_timer.c
+*   @brief  Timer and GIC control module source.
+*   @author Andrei Drimbarean ([email protected])
+********************************************************************************
+* Copyright 2020(c) Analog Devices, Inc.
+*
+* All rights reserved.
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions are met:
+*  - Redistributions of source code must retain the above copyright
+*    notice, this list of conditions and the following disclaimer.
+*  - Redistributions in binary form must reproduce the above copyright
+*    notice, this list of conditions and the following disclaimer in
+*    the documentation and/or other materials provided with the
+*    distribution.
+*  - Neither the name of Analog Devices, Inc. nor the names of its
+*    contributors may be used to endorse or promote products derived
+*    from this software without specific prior written permission.
+*  - The use of this software may or may not infringe the patent rights
+*    of one or more patent holders.  This license does not release you
+*    from the requirement that you obtain separate licenses from these
+*    patent holders to use this software.
+*  - Use of the software either in source or binary form, must be run
+*    on or directly connected to an Analog Devices Inc. component.
+*
+* THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR IMPLIED
+* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT, MERCHANTABILITY
+* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+* IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+* LIMITED TO, INTELLECTUAL PROPERTY RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR
+* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*******************************************************************************/
+
+/******************************************************************************/
+/***************************** Include Files **********************************/
+/******************************************************************************/
+
+#include <stdlib.h>
+#include <xparameters.h>
+#include "timer.h"
+#include "xilinx_timer.h"
+#include "error.h"
+
+/******************************************************************************/
+/********************** Macros and Constants Definitions **********************/
+/******************************************************************************/
+
+#if defined(_XPARAMETERS_PS_H_)
+#define CORE_PRIVATE_TIMER_CLOCK (XPAR_CPU_CORTEXA9_CORE_CLOCK_FREQ_HZ / 2)
+#endif
+
+/******************************************************************************/
+/************************ Functions Definitions *******************************/
+/******************************************************************************/
+
+/**
+ * @brief Set the current counter value of the timer.
+ * @param [in] desc - Pointer to the device handler.
+ * @param [in] new_val - New value for the timer counter.
+ * @return 0 in case of success, -1 otherwise
+ */
+int32_t xilinx_timer_counter_set(struct timer_desc *desc,
+				 uint32_t new_val)
+{
+	struct xil_timer_desc *xdesc;
+
+	if (!desc)
+		return -1;
+
+	xdesc = desc->extra;
+
+	switch (xdesc->type) {
+	case TIMER_PS:
+#ifdef XSCUTIMER_H
+		XScuTimer_LoadTimer((XScuTimer *)xdesc->instance, new_val - 1);
+		break;
+#endif
+		return -1;
+	case TIMER_PL:
+#ifdef XTMRCTR_H
+		XTmrCtr_SetResetValue(xdesc->instance, xdesc->active_tmr, new_val);
+		XTmrCtr_Reset(xdesc->instance, xdesc->active_tmr);
+		break;
+#endif
+		return -1;
+	default:
+		return -1;
+	}
+
+	return 0;
+}
+
+/**
+ * @brief Set the timer clock frequency.
+ * @param [in] desc - Pointer to the device handler.
+ * @param [in] freq_hz - New timer frequency in hertz.
+ * @return 0 in case of success, -1 otherwise
+ */
+int32_t xilinx_timer_count_clk_set(struct timer_desc *desc,
+				   uint32_t freq_hz)
+{
+	struct xil_timer_desc *xdesc;
+
+	if (!desc || !freq_hz)
+		return -1;
+
+	xdesc = desc->extra;
+
+	switch (xdesc->type) {
+	case TIMER_PS:
+#ifdef XSCUTIMER_H
+		;
+		uint32_t prescaler = CORE_PRIVATE_TIMER_CLOCK / freq_hz;
+		if (prescaler == 0 || prescaler >= 256)
+			return -1;
+		XScuTimer_SetPrescaler(xdesc->instance, prescaler - 1);
+		desc->freq_hz = CORE_PRIVATE_TIMER_CLOCK / prescaler;
+		break;
+#endif
+		return -1;
+	case TIMER_PL:
+#ifdef XTMRCTR_H
+		(void *)xdesc;
+		/** Cannot be done. */
+#endif
+		return -1;
+	default:
+		return -1;
+	}
+
+	return 0;
+}
+
+/**
+ * @brief Initialize hardware timer and the handler structure associated with
+ *        it.
+ * @param [out] desc - Pointer to the reference of the device handler.
+ * @param [in] param - Initialization structure.
+ * @return 0 in case of success, -1 otherwise
+ */
+int32_t xilinx_timer_init(struct timer_desc **desc,
+			  const struct timer_init_param *param)
+{
+	int32_t ret;
+	struct timer_desc *dev;
+	struct xil_timer_desc *xdesc;
+	struct xil_timer_init_param *xinit;
+
+	if (!desc || !param)
+		return -1;
+
+	xinit = param->extra;
+
+	dev = (struct timer_desc *)calloc(1, sizeof(*dev));
+	if(!dev)
+		return -1;
+	xdesc = (struct xil_timer_desc *)calloc(1, sizeof(*xdesc));
+	if(!xdesc)
+		goto error_desc;
+
+	dev->id = param->id;
+	dev->freq_hz = param->freq_hz;
+	dev->ticks_count = param->ticks_count;
+	dev->extra = xdesc;
+	xdesc->active_tmr = xinit->active_tmr;
+	xdesc->type = xinit->type;
+
+	switch (xdesc->type) {
+	case TIMER_PS:
+#ifdef XSCUTIMER_H
+		xdesc->config = XScuTimer_LookupConfig(dev->id);
+		xdesc->instance = calloc(1, sizeof(XScuTimer));
+		if (!xdesc->instance)
+			goto error_xdesc;
+		ret = XScuTimer_CfgInitialize(xdesc->instance, xdesc->config,
+					      ((XScuTimer_Config *)xdesc->config)->BaseAddr);
+		if (ret != XST_SUCCESS) {
+			free(xdesc->instance);
+			goto error_xdesc;
+		}
+		ret = xilinx_timer_count_clk_set(dev, param->freq_hz);
+		if (IS_ERR_VALUE(ret))
+			goto error_xdesc;
+
+		ret = xilinx_timer_counter_set(dev, dev->ticks_count);
+		if (IS_ERR_VALUE(ret))
+			goto error_xdesc;
+
+		XScuTimer_EnableAutoReload((XScuTimer *)xdesc->instance);
+		XScuTimer_EnableInterrupt((XScuTimer *)xdesc->instance);
+		break;
+#endif
+		goto error_xdesc;
+	case TIMER_PL:
+#ifdef XTMRCTR_H
+		xdesc->instance = (XTmrCtr *)calloc(1, sizeof(XTmrCtr));
+		if (!xdesc->instance)
+			return -1;
+
+		xdesc->config = XTmrCtr_LookupConfig(dev->id);
+		if (!xdesc->config) {
+			free(xdesc->instance);
+			goto error_desc;
+		}
+		XTmrCtr_CfgInitialize(xdesc->instance, xdesc->config,
+				      ((XTmrCtr_Config *)xdesc->config)->BaseAddress);
+		ret = XTmrCtr_InitHw(xdesc->instance);
+		if (ret != 0) {
+			free(xdesc->instance);
+			goto error_desc;
+		}
+		dev->freq_hz = ((XTmrCtr_Config *)xdesc->config)->SysClockFreqHz;
+
+		ret = XTmrCtr_SelfTest(xdesc->instance, dev->id);
+		if(ret != 0)
+			goto error_desc;
+		XTmrCtr_SetOptions(xdesc->instance, xdesc->active_tmr,
+				   XTC_DOWN_COUNT_OPTION | XTC_INT_MODE_OPTION |
+				   XTC_AUTO_RELOAD_OPTION);
+		XTmrCtr_SetResetValue(xdesc->instance, xdesc->active_tmr,
+				      dev->ticks_count);
+		break;
+#endif
+		goto error_xdesc;
+	default:
+		goto error_xdesc;
+	}
+
+	*desc = dev;
+
+	return 0;
+
+error_xdesc:
+	free(xdesc);
+error_desc:
+	free(dev);
+
+	return -1;
+}
+
+/**
+ * @brief Free the memory allocated by timer_setup().
+ * @param [in] desc - Pointer to the device handler.
+ * @return 0 in case of success, -1 otherwise
+ */
+int32_t xilinx_timer_remove(struct timer_desc *desc)
+{
+	struct xil_timer_desc *xdesc;
+
+	if(!desc)
+		return -1;
+
+	xdesc = desc->extra;
+
+	switch (xdesc->type) {
+	case TIMER_PS:
+#ifdef XSCUTIMER_H
+		XScuTimer_Stop(xdesc->instance);
+		free(xdesc->instance);
+		break;
+#endif
+		return -1;
+	case TIMER_PL:
+#ifdef XTMRCTR_H
+		XTmrCtr_Stop(xdesc->instance, xdesc->active_tmr);
+		break;
+#endif
+		return -1;
+	default:
+		return -1;
+	}
+
+	free(xdesc);
+	free(desc);
+
+	return 0;
+}
+
+/**
+ * @brief Start a timer.
+ * @param [in] desc - Pointer to the device handler.
+ * @return 0 in case of success, -1 otherwise
+ */
+int32_t xilinx_timer_start(struct timer_desc *desc)
+{
+	struct xil_timer_desc *xdesc;
+
+	if (!desc)
+		return -1;
+
+	xdesc = desc->extra;
+
+	switch (xdesc->type) {
+	case TIMER_PS:
+#ifdef XSCUTIMER_H
+		XScuTimer_Start(xdesc->instance);
+		break;
+#endif
+		return -1;
+	case TIMER_PL:
+#ifdef XTMRCTR_H
+		XTmrCtr_Start(xdesc->instance, xdesc->active_tmr);
+		break;
+#endif
+		return -1;
+	}
+
+	return 0;
+}
+
+/**
+ * @brief Stop a timer from counting.
+ * @param [in] desc - Pointer to the device handler.
+ * @return 0 in case of success, -1 otherwise
+ */
+int32_t xilinx_timer_stop(struct timer_desc *desc)
+{
+	struct xil_timer_desc *xdesc;
+
+	if (!desc)
+		return -1;
+
+	xdesc = desc->extra;
+
+	switch (xdesc->type) {
+	case TIMER_PS:
+#ifdef XSCUTIMER_H
+		XScuTimer_Stop(xdesc->instance);
+		break;
+#endif
+		return -1;
+	case TIMER_PL:
+#ifdef XTMRCTR_H
+		XTmrCtr_Stop(xdesc->instance, xdesc->active_tmr);
+		break;
+#endif
+		return -1;
+	default:
+		return -1;
+	}
+
+	return 0;
+}
+
+/**
+ * @brief Get the current counter value of the timer.
+ * @param [in] desc - Pointer to the device handler.
+ * @param [out] counter - Pointer to the current counter value.
+ * @return 0 in case of success, -1 otherwise
+ */
+int32_t xilinx_timer_counter_get(struct timer_desc *desc,
+				 uint32_t *counter)
+{
+	struct xil_timer_desc *xdesc;
+
+	if (!desc || !counter)
+		return -1;
+
+	xdesc = desc->extra;
+
+	switch (xdesc->type) {
+	case TIMER_PS:
+#ifdef XSCUTIMER_H
+		*counter = XScuTimer_GetCounterValue((XScuTimer *)xdesc->instance);
+		++(*counter);
+		break;
+#endif
+		return -1;
+	case TIMER_PL:
+#ifdef XTMRCTR_H
+		*counter = XTmrCtr_GetValue(xdesc->instance, xdesc->active_tmr);
+		break;
+#endif
+		return -1;
+	default:
+		*counter = 0;
+
+		return -1;
+	}
+
+	return 0;
+}
+
+
+/**
+ * @brief Get the timer clock frequency.
+ * @param [in] desc - Pointer to the device handler.
+ * @param [out] freq_hz - Pointer to the returned frequency.
+ * @return 0 in case of success, -1 otherwise
+ */
+int32_t xilinx_timer_count_clk_get(struct timer_desc *desc,
+				   uint32_t *freq_hz)
+{
+	struct xil_timer_desc *xdesc;
+
+	if (!desc || !freq_hz)
+		return -1;
+
+	xdesc = desc->extra;
+
+	switch (xdesc->type) {
+	case TIMER_PS:
+#ifdef XSCUTIMER_H
+		*freq_hz = desc->freq_hz;
+		break;
+#endif
+		return -1;
+	case TIMER_PL:
+#ifdef XTMRCTR_H
+		*freq_hz = ((XTmrCtr_Config *)xdesc->config)->SysClockFreqHz;
+		break;
+#endif
+		return -1;
+	default:
+		*freq_hz = 0;
+
+		return -1;
+	}
+
+	return 0;
+}
+
+
+/**
+ * @brief Get the elapsed time in nsec for the timer.
+ * @param [in] desc         - Pointer to the device handler.
+ * @param [in] elapsed_time - The elapsed time in nsec.
+ * @return -ENOSYS.
+ */
+int32_t xilinx_timer_get_elapsed_time_nsec(struct timer_desc *desc,
+		uint64_t *elapsed_time)
+{
+	/* Function not implemented */
+	return -ENOSYS;
+}
+
+/**
+ * @brief Xilinx platform specific timer platform ops structure
+ */
+const struct timer_platform_ops xil_timer_ops = {
+	.init = &xilinx_timer_init,
+	.start = &xilinx_timer_start,
+	.stop = &xilinx_timer_stop,
+	.counter_get = &xilinx_timer_counter_get,
+	.counter_set = &xilinx_timer_counter_set,
+	.count_clk_get = &xilinx_timer_count_clk_get,
+	.count_clk_set = &xilinx_timer_count_clk_set,
+	.get_elapsed_time_nsec = &xilinx_timer_get_elapsed_time_nsec,
+	.remove = &xilinx_timer_remove
+};

dj_f1_ad9371/vitis_classic_autobuild/source/drivers/platform/xilinx_timer.h

@@ -0,0 +1,101 @@
+/***************************************************************************//**
+*   @file   xilinx_timer.h
+*   @brief  Timer control module header.
+*   @author Andrei Drimbarean ([email protected])
+********************************************************************************
+* Copyright 2020(c) Analog Devices, Inc.
+*
+* All rights reserved.
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions are met:
+*  - Redistributions of source code must retain the above copyright
+*    notice, this list of conditions and the following disclaimer.
+*  - Redistributions in binary form must reproduce the above copyright
+*    notice, this list of conditions and the following disclaimer in
+*    the documentation and/or other materials provided with the
+*    distribution.
+*  - Neither the name of Analog Devices, Inc. nor the names of its
+*    contributors may be used to endorse or promote products derived
+*    from this software without specific prior written permission.
+*  - The use of this software may or may not infringe the patent rights
+*    of one or more patent holders.  This license does not release you
+*    from the requirement that you obtain separate licenses from these
+*    patent holders to use this software.
+*  - Use of the software either in source or binary form, must be run
+*    on or directly connected to an Analog Devices Inc. component.
+*
+* THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR IMPLIED
+* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT, MERCHANTABILITY
+* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+* IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+* LIMITED TO, INTELLECTUAL PROPERTY RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR
+* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*******************************************************************************/
+
+#ifndef XILINX_TIMER_H_
+#define XILINX_TIMER_H_
+
+/******************************************************************************/
+/***************************** Include Files **********************************/
+/******************************************************************************/
+
+#include <xparameters.h>
+#ifdef XPAR_XSCUTIMER_NUM_INSTANCES
+#include <xscutimer.h>
+#endif
+#ifdef XPAR_XTMRCTR_NUM_INSTANCES
+#include <xtmrctr.h>
+#endif
+
+/******************************************************************************/
+/*************************** Types Declarations *******************************/
+/******************************************************************************/
+
+/**
+ * @enum xil_timer_type
+ * @brief Xilinx platform architecture sections
+ */
+enum xil_timer_type {
+	/** Programmable Logic */
+	TIMER_PL,
+	/** Processing System */
+	TIMER_PS
+};
+
+/**
+ * @struct xil_timer_desc
+ * @brief Xilinx specific timer descriptor
+ */
+struct xil_timer_desc {
+	/** Pointer to the BSP driver handler */
+	void *instance;
+	/** Pointer to the BSP driver configuration handler */
+	void *config;
+	/** Timer used from the PL 3-timer core */
+	uint8_t active_tmr;
+	/** Platform selection parameter */
+	enum xil_timer_type type;
+};
+
+/**
+ * @struct xil_timer_init_param
+ * @brief Xilinx specific timer initialization structure
+ */
+struct xil_timer_init_param {
+	/** Timer used from the PL 3-timer core */
+	uint8_t active_tmr;
+	/** Platform selection parameter */
+	enum xil_timer_type type;
+};
+
+/**
+ * @brief Xilinx platform specific timer platform ops structure
+ */
+extern const struct timer_platform_ops xil_timer_ops;
+
+#endif /* XILINX_TIMER_H_ */

dj_f1_ad9371/vitis_classic_autobuild/source/include/axi_io.h

@@ -0,0 +1,59 @@
+/***************************************************************************//**
+ *   @file   axi_io.h
+ *   @brief  Header file of AXI IO.
+ *   @author Antoniu Miclaus ([email protected])
+********************************************************************************
+ * Copyright 2019(c) Analog Devices, Inc.
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *  - Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *  - Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *  - Neither the name of Analog Devices, Inc. nor the names of its
+ *    contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *  - The use of this software may or may not infringe the patent rights
+ *    of one or more patent holders.  This license does not release you
+ *    from the requirement that you obtain separate licenses from these
+ *    patent holders to use this software.
+ *  - Use of the software either in source or binary form, must be run
+ *    on or directly connected to an Analog Devices Inc. component.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT,
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, INTELLECTUAL PROPERTY RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*******************************************************************************/
+
+#ifndef _AXI_IO_H_
+#define _AXI_IO_H_
+
+/******************************************************************************/
+/***************************** Include Files **********************************/
+/******************************************************************************/
+
+#include <stdint.h>
+
+/******************************************************************************/
+/************************ Functions Declarations ******************************/
+/******************************************************************************/
+
+/* AXI IO Read data */
+int32_t axi_io_read(uint32_t base, uint32_t offset, uint32_t *data);
+
+/* AXI IO Write data */
+int32_t axi_io_write(uint32_t base, uint32_t offset, uint32_t data);
+
+#endif // _AXI_IO_H_

dj_f1_ad9371/vitis_classic_autobuild/source/include/circ_queue.h

@@ -0,0 +1,105 @@
+/*****************************************************************************/
+/**
+ * @file circ_queue.h
+ * @author 范浩 ([email protected])
+ * @brief 简单的循环FIFO有界队列
+ * @version 0.1
+ * @date 2023-02-23
+ * @note 从 https://github.com/chrismerck/rpa_queue.git 派生
+ * @copyright Copyright(c) 2025 北京理工大学空天网络信息技术研究所
+ *
+ ******************************************************************************/
+
+/**
+ * @addtogroup Utility
+ * @brief 工具函数集合
+ * @{
+ */
+
+/**
+ * @defgroup CircularQueue
+ * @brief 循环队列实现
+ * @{
+ */
+
+#ifndef CIRC_QUEUE_H
+#define CIRC_QUEUE_H
+
+#include <stdbool.h>
+#include <stdint.h>
+#include <stddef.h>
+
+/**
+ * @struct CIRC_QUEUE
+ * @brief 循环队列实例
+ */
+typedef struct
+{
+    void **data;
+    volatile uint32_t nelts; ///< 元素数量
+    uint32_t in;             ///< 下一个空位置
+    uint32_t out;            ///< 下一个已填充位置
+    uint32_t bounds;         ///< 队列最大容量
+} CIRC_QUEUE;
+
+/**
+ * @brief 创建FIFO队列
+ * @param queue 新队列指针
+ * @param queue_capacity 队列最大容量
+ * @return 成功返回true，失败返回false
+ */
+bool CircQueueCreate(CIRC_QUEUE **queue, uint32_t queue_capacity);
+
+/**
+ * @brief 释放队列内存 -- 在销毁后调用
+ * @param queue 队列指针
+ */
+void CircQueueFree(CIRC_QUEUE *queue);
+
+/**
+ * @brief 检测循环队列是否已满。此工具函数应在临界区内调用，不是线程安全的。
+ * @param queue 队列指针
+ * @return 如果队列已满返回true，否则返回false
+ */
+bool isCircQueueFull(CIRC_QUEUE *queue);
+
+/**
+ * @brief 检测循环队列是否为空。此工具函数应在临界区内调用，不是线程安全的。
+ * @param queue 队列指针
+ * @return 如果队列为空返回true，否则返回false
+ */
+bool isCircQueueEmpty(CIRC_QUEUE *queue);
+
+/**
+ * @brief 将对象推入/添加到队列中，如果队列已满则阻塞
+ *
+ * @param queue 队列指针
+ * @param data 数据指针
+ * @return 推入成功返回true
+ * @return 推入失败返回false
+ */
+bool CircQueuePush(CIRC_QUEUE *queue, void *data);
+
+/**
+ * @brief 从队列中弹出/获取对象，如果队列为空则阻塞
+ *
+ * @param queue 队列指针
+ * @param data 数据指针的指针
+ * @return 弹出失败返回false
+ * @return 弹出成功返回true
+ */
+bool CircQueuePop(CIRC_QUEUE *queue, void **data);
+
+/**
+ * @brief 返回队列大小
+ *
+ * @param queue 队列指针
+ * @return 队列中的元素数量
+ */
+uint32_t CircQueueSize(CIRC_QUEUE *queue);
+
+#endif /* CIRC_QUEUE_H */
+
+/** @} CircularQueue*/
+
+/** @} Utility*/

dj_f1_ad9371/vitis_classic_autobuild/source/include/clist.h

@@ -0,0 +1,137 @@
+/*****************************************************************************/
+/**
+ * @file clist.h
+ * @author 范浩 ([email protected])
+ * @brief A basic list data structure
+ * @version 0.1
+ * @date 2023-02-23
+ * @note Forked from https://github.com/clibs/list
+ * @copyright Copyright(c) 2025 北京理工大学空天网络信息技术研究所
+ *
+ ******************************************************************************/
+
+/**
+ * @addtogroup Utility
+ * @{
+ */
+
+/**
+ * @defgroup cList
+ * @{
+ */
+
+#ifndef __CLIST_H__
+#define __CLIST_H__
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#include <stdlib.h>
+#include <stdint.h>
+
+	/**
+	 * @enum clist_direction_t
+	 * @brief clist_t iterator direction.
+	 */
+	typedef enum
+	{
+		LIST_HEAD,
+		LIST_TAIL
+	} clist_direction_t;
+
+	/**
+	 * @struct clist_node_t
+	 * @brief clist_t node struct.
+	 */
+	typedef struct clist_node
+	{
+		struct clist_node *prev; ///< previous node
+		struct clist_node *next; ///< next node
+		void *val;
+	} clist_node_t;
+
+	/**
+	 * @struct clist_t
+	 * @brief clist_t struct.
+	 */
+	typedef struct
+	{
+		clist_node_t *head;					 ///< first node
+		clist_node_t *tail;					 ///< last node
+		uint32_t len;						 ///< list length
+		void (*free)(void *val);			 ///< node free function handle
+		int8_t (*compare)(void *a, void *b); ///< node compare function handle
+	} clist_t;
+
+	/**
+	 * @struct clist_iterator_t
+	 * @brief clist_t iterator struct.
+	 */
+	typedef struct
+	{
+		clist_node_t *next;			 ///< next element
+		clist_direction_t direction; ///< iter direction
+	} clist_iterator_t;
+
+	// Node prototypes.
+
+	clist_node_t *
+	clist_node_new(void *val);
+
+	// clist_t prototypes.
+
+	clist_t *
+	clist_new(void);
+
+	clist_node_t *
+	clist_rpush(clist_t *self, clist_node_t *node);
+
+	clist_node_t *
+	clist_lpush(clist_t *self, clist_node_t *node);
+
+	clist_node_t *
+	clist_find(clist_t *self, void *val);
+
+	clist_node_t *
+	clist_at(clist_t *self, int index);
+
+	clist_node_t *
+	clist_rpop(clist_t *self);
+
+	clist_node_t *
+	clist_lpop(clist_t *self);
+
+	void
+	clist_remove(clist_t *self, clist_node_t *node);
+
+	void
+	clist_clear(clist_t *self);
+
+	void
+	clist_destroy(clist_t *self);
+
+	// clist_t iterator prototypes.
+
+	clist_iterator_t *
+	clist_iterator_new(clist_t *list, clist_direction_t direction);
+
+	clist_iterator_t *
+	clist_iterator_new_from_node(clist_node_t *node, clist_direction_t direction);
+
+	clist_node_t *
+	clist_iterator_next(clist_iterator_t *self);
+
+	void
+	clist_iterator_destroy(clist_iterator_t *self);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __CLIBS_LIST_H__ */
+
+/** @} cList*/
+
+/** @} Utility*/

dj_f1_ad9371/vitis_classic_autobuild/source/include/common.h

@@ -0,0 +1,153 @@
+/*****************************************************************************/
+/**
+ * @file common.h
+ * @author 范浩 ([email protected])
+ * @brief 通用宏定义头文件
+ * @version 0.0
+ * @date 2022-07-16
+ * @copyright Copyright(c) 2025 北京理工大学空天网络信息技术研究所
+ *
+ ******************************************************************************/
+/**
+ * @defgroup COMMON_MACRO 通用宏定义
+ * @brief 提供程序中通用的宏定义和调试工具
+ * @{
+ */
+
+#ifndef __COMMON_H_
+#define __COMMON_H_
+#include <stdio.h>
+#include <assert.h>
+
+/**
+ * @brief 创建代码块
+ *
+ * 创建一个do-while(0)代码块，确保多语句宏的安全使用
+ *
+ * @param block 代码块内容
+ */
+#define __PRINT_BLOCK(block) \
+    do                       \
+    {                        \
+        block                \
+    } while (0)
+
+/**
+ * @brief 断言宏
+ *
+ * 如果表达式为假，则调用AppAssert函数
+ *
+ * @param exp 要检查的表达式
+ */
+#define ASSERT(exp) ((exp) ? (void)0 : AppAssert(__FILE__, __LINE__))
+
+/**
+ * @brief 空操作
+ *
+ * 插入一条汇编NOP指令
+ */
+#define _nop_() __asm__("nop")
+
+/**
+ * @brief 字符串化宏
+ *
+ * 将参数转换为字符串
+ *
+ * @param x 要转换为字符串的表达式
+ */
+#define STR(x) #x
+
+// #define _DEBUG_LEVEL 3
+
+/**
+ * @brief 调试级别控制的打印函数
+ *
+ * 当调试级别大于0时启用
+ */
+#if _DEBUG_LEVEL > 0
+#define DBG_PRINT(...) printf(__VA_ARGS__)
+#endif
+
+/**
+ * @brief 错误信息打印
+ *
+ * 当调试级别大于等于1时启用，打印错误信息
+ */
+#if _DEBUG_LEVEL >= 1
+#define DBG_ERROR(...) __PRINT_BLOCK( \
+    printf("in "__FILE__              \
+           ":%d [error]\t",           \
+           __LINE__);                 \
+    printf(__VA_ARGS__);)
+#endif
+
+/**
+ * @brief 警告信息打印
+ *
+ * 当调试级别大于等于2时启用，打印警告信息
+ */
+#if _DEBUG_LEVEL >= 2
+#define DBG_WARNING(...) __PRINT_BLOCK( \
+    printf("[warning]\t");              \
+    printf(__VA_ARGS__);)
+#endif
+
+/**
+ * @brief 一般信息打印
+ *
+ * 当调试级别大于等于3时启用，打印一般信息
+ */
+#if _DEBUG_LEVEL >= 3
+#define DBG_INFO(...) __PRINT_BLOCK( \
+    printf("[Info]\t");              \
+    printf(__VA_ARGS__);)
+#endif
+
+/**
+ * @brief 未定义调试级别时的错误信息打印空实现
+ */
+#ifndef DBG_ERROR
+#define DBG_ERROR(...) \
+    {                  \
+    }
+#endif
+
+/**
+ * @brief 未定义调试级别时的警告信息打印空实现
+ */
+#ifndef DBG_WARNING
+#define DBG_WARNING(...) \
+    {                    \
+    }
+#endif
+
+/**
+ * @brief 未定义调试级别时的一般信息打印空实现
+ */
+#ifndef DBG_INFO
+#define DBG_INFO(...) \
+    {                 \
+    }
+#endif
+
+/**
+ * @brief 未定义调试级别时的打印函数空实现
+ */
+#ifndef DBG_PRINT
+#define DBG_PRINT(...) \
+    {                  \
+    }
+#endif
+
+/**
+ * @brief 应用程序断言函数
+ *
+ * 当断言失败时调用，打印文件名和行号
+ *
+ * @param file 断言失败的文件名
+ * @param line 断言失败的行号
+ */
+void AppAssert(const char *file, int line);
+#endif /* __COMMON_H_ */
+
+/** @} */

dj_f1_ad9371/vitis_classic_autobuild/source/include/delay.h

@@ -0,0 +1,70 @@
+/***************************************************************************//**
+ *   @file   delay.h
+ *   @brief  Header file of Delay functions
+ *   @author DBogdan ([email protected])
+********************************************************************************
+ * Copyright 2019(c) Analog Devices, Inc.
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *  - Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *  - Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *  - Neither the name of Analog Devices, Inc. nor the names of its
+ *    contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *  - The use of this software may or may not infringe the patent rights
+ *    of one or more patent holders.  This license does not release you
+ *    from the requirement that you obtain separate licenses from these
+ *    patent holders to use this software.
+ *  - Use of the software either in source or binary form, must be run
+ *    on or directly connected to an Analog Devices Inc. component.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT,
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, INTELLECTUAL PROPERTY RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*******************************************************************************/
+
+#ifndef _DELAY_H_
+#define _DELAY_H_
+
+/******************************************************************************/
+/***************************** Include Files **********************************/
+/******************************************************************************/
+
+#include <stdint.h>
+
+/**
+ * @struct time
+ * @brief Structure holding time data (seconds, microseconds).
+ */
+struct time {
+	unsigned int s, us;
+};
+
+/******************************************************************************/
+/************************ Functions Declarations ******************************/
+/******************************************************************************/
+
+/* Generate microseconds delay. */
+void udelay(uint32_t usecs);
+
+/* Generate miliseconds delay. */
+void mdelay(uint32_t msecs);
+
+/* Get current time */
+struct time get_time(void);
+
+#endif // _DELAY_H_

dj_f1_ad9371/vitis_classic_autobuild/source/include/error.h

@@ -0,0 +1,51 @@
+/*****************************************************************************/
+/**
+ * @file common.h
+ * @author 范浩 ([email protected])
+ * @brief Common error numbers
+ * @version 0.0
+ * @date 2022-06-18
+ * @copyright Copyright(c) 2025 北京理工大学空天网络信息技术研究所
+ *
+ ******************************************************************************/
+
+/**
+ * @addtogroup COMMON_MACRO
+ * @{
+ */
+
+#ifndef SRC_ERROR_H_
+#define SRC_ERROR_H_
+
+#include <errno.h>
+
+/**
+ * @name ERRORNO
+ * @{
+ */
+
+#ifdef SUCCESS
+#undef SUCCESS
+#endif
+#define SUCCESS		0
+#ifdef FAILURE
+#undef FAILURE
+#endif
+#define FAILURE		-1
+
+#define EPARAM -2	/*!< Data crc check failed */
+#define ECRC -3     /*!< Data crc check failed */
+#define EDINVAL -4	/*!< Device is invalid (sleep or power off) */
+#define EDCONF -5	/*!< Device confugure error */
+#define ETIMEOUT -6 /*!< Timeout error */
+#define EIGNORE -7	/*!< Received an unsupported command, and ignore it */
+#define EQUEUE  -8	/*!< Queue overflow */
+#define EUNEXP  -9	/*!< Encounter an unexpected error */
+
+#define IS_ERR_VALUE(x)	((x) != SUCCESS)
+
+#endif // ERROR_H_
+
+/** @} ERRORNO*/
+
+/** @} COMMON_MACRO*/

dj_f1_ad9371/vitis_classic_autobuild/source/include/global_timer.h

@@ -0,0 +1,91 @@
+#ifndef _GLOBAL_TIMER_H_
+#define _GLOBAL_TIMER_H_
+
+/******************************************************************************/
+/***************************** Include Files **********************************/
+/******************************************************************************/
+
+#include <stdint.h>
+
+/**
+ * @struct timer_init_param
+ * @brief  Structure holding the parameters for timer initialization
+ */
+struct global_timer_init_param {
+	/** timer ID */
+	uintptr_t base_addr;
+	/** timer ID */
+	uint16_t id;
+	/** timer count frequency (Hz) */
+	uint32_t freq_hz;
+	/** counter start value */
+	uint64_t load_value;
+};
+
+/**
+ * @struct timer_desc
+ * @brief Structure holding timer descriptor
+ */
+struct global_timer_desc {
+	/** timer ID */
+	uintptr_t base_addr;
+	/** timer ID */
+	uint16_t id;
+	/** timer count frequency (Hz) */
+	uint32_t freq_hz;
+	/** counter start value */
+	uint64_t load_value;
+};
+
+/******************************************************************************/
+/************************ Functions Declarations ******************************/
+/******************************************************************************/
+
+/* Initialize hardware timer and the handler structure associated with it. */
+int32_t global_timer_init(struct global_timer_desc **desc,
+		   struct global_timer_init_param *param);
+
+/* Free the memory allocated by timer_setup(). */
+int32_t global_timer_remove(struct global_timer_desc *desc);
+
+/* Start a timer. */
+int32_t global_timer_start(struct global_timer_desc *desc);
+
+/* Stop a timer from counting. */
+int32_t global_timer_stop(struct global_timer_desc *desc);
+
+/* Get the value of the counter register for the timer. */
+int32_t global_timer_counter_get(struct global_timer_desc *desc, uint64_t *counter);
+
+/* Set the timer counter register value. */
+int32_t global_timer_counter_set(struct global_timer_desc *desc, uint64_t new_val);
+
+/* Get the timer clock frequency. */
+int32_t global_timer_count_clk_get(struct global_timer_desc *desc, uint32_t *freq_hz);
+
+/* Set the timer clock frequency. */
+int32_t global_timer_count_clk_set(struct global_timer_desc *desc, uint32_t freq_hz);
+
+/* Enable global timer interrupt. */
+int32_t global_timer_irq_enable(struct global_timer_desc *desc);
+
+/* Disable global timer interrupt. */
+int32_t global_timer_irq_disable(struct global_timer_desc *desc);
+
+/* Implement a acknowledgment global timer interrupt. */
+int32_t global_timer_irq_ack(struct global_timer_desc *desc);
+
+/* Set comparator register. */
+int32_t global_timer_compara_set(struct global_timer_desc *desc, uint64_t com_val);
+
+/* Set auto increment register . */
+int32_t global_timer_auto_inc_set(struct global_timer_desc *desc, uint32_t inc_val);
+
+/* Enable global timer auto increment mode. */
+int32_t global_timer_auto_inc_enable(struct global_timer_desc *desc);
+
+/* Disable global timer auto increment mode. */
+int32_t global_timer_auto_inc_disable(struct global_timer_desc *desc);
+
+#endif /* SRC_TIMER_H_ */
+

dj_f1_ad9371/vitis_classic_autobuild/source/include/gpio.h

@@ -0,0 +1,188 @@
+/***************************************************************************//**
+ *   @file   gpio.h
+ *   @brief  Header file of GPIO Interface
+ *   @author DBogdan ([email protected])
+********************************************************************************
+ * Copyright 2019(c) Analog Devices, Inc.
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *  - Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *  - Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *  - Neither the name of Analog Devices, Inc. nor the names of its
+ *    contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *  - The use of this software may or may not infringe the patent rights
+ *    of one or more patent holders.  This license does not release you
+ *    from the requirement that you obtain separate licenses from these
+ *    patent holders to use this software.
+ *  - Use of the software either in source or binary form, must be run
+ *    on or directly connected to an Analog Devices Inc. component.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT,
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, INTELLECTUAL PROPERTY RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*******************************************************************************/
+
+#ifndef _GPIO_H_
+#define _GPIO_H_
+
+/******************************************************************************/
+/***************************** Include Files **********************************/
+/******************************************************************************/
+
+#include <stdint.h>
+
+/******************************************************************************/
+/********************** Macros and Constants Definitions **********************/
+/******************************************************************************/
+
+#define GPIO_OUT	0x01
+#define GPIO_IN		0x00
+
+/******************************************************************************/
+/*************************** Types Declarations *******************************/
+/******************************************************************************/
+
+/**
+ * @struct gpio_platform_ops
+ * @brief Structure holding gpio function pointers that point to the platform
+ * specific function
+ */
+struct gpio_platform_ops ;
+
+/**
+ * @enum gpio_pull_up
+ * @brief Enum that holds the possible pull up/ pull down resistor configuration.
+ */
+enum gpio_pull_up {
+	PULL_NONE,
+	/** Strong pull up */
+	PULL_UP,
+	/** Strong pull down */
+	PULL_DOWN,
+	PULL_UP_WEAK,
+	PULL_DOWN_WEAK
+};
+
+/**
+ * @struct gpio_init_param
+ * @brief Structure holding the parameters for GPIO initialization.
+ */
+struct gpio_init_param {
+	/** Port number */
+	int32_t		port;
+	/** GPIO number */
+	int32_t		number;
+	/** Pull up/down resistor configuration */
+	enum gpio_pull_up pull;
+	/** GPIO platform specific functions */
+	const struct gpio_platform_ops *platform_ops;
+	/** GPIO extra parameters (device specific) */
+	void		*extra;
+};
+
+/**
+ * @struct gpio_desc
+ * @brief Structure holding the GPIO descriptor.
+ */
+struct gpio_desc {
+	/** Port number */
+	int32_t		port;
+	/** GPIO number */
+	int32_t		number;
+	/** Pull up/down resistor configuration */
+	enum gpio_pull_up pull;
+	/** GPIO platform specific functions */
+	const struct gpio_platform_ops *platform_ops;
+	/** GPIO extra parameters (device specific) */
+	void		*extra;
+};
+
+/**
+ * @enum gpio_values
+ * @brief Enum that holds the possible output states of a GPIO.
+ */
+enum gpio_values {
+	/** GPIO logic low */
+	GPIO_LOW,
+	/** GPIO logic high */
+	GPIO_HIGH,
+	/** GPIO high impedance */
+	GPIO_HIGH_Z
+};
+
+/**
+ * @struct gpio_platform_ops
+ * @brief Structure holding gpio function pointers that point to the platform
+ * specific function
+ */
+struct gpio_platform_ops {
+	/** gpio initialization function pointer */
+	int32_t (*gpio_ops_get)(struct gpio_desc **,
+				const struct gpio_init_param *);
+	/** gpio optional descriptor function pointer */
+	int32_t (*gpio_ops_get_optional)(struct gpio_desc **,
+					 const struct gpio_init_param *);
+	/** gpio remove function pointer */
+	int32_t (*gpio_ops_remove)(struct gpio_desc *);
+	/** gpio direction input function pointer */
+	int32_t (*gpio_ops_direction_input)(struct gpio_desc *);
+	/** gpio direction output function pointer */
+	int32_t (*gpio_ops_direction_output)(struct gpio_desc *, uint8_t);
+	/** gpio get direction function pointer */
+	int32_t (*gpio_ops_get_direction)(struct gpio_desc *, uint8_t *);
+	/** gpio set value function pointer */
+	int32_t (*gpio_ops_set_value)(struct gpio_desc *, uint8_t);
+	/** gpio get value function pointer */
+	int32_t (*gpio_ops_get_value)(struct gpio_desc *, uint8_t *);
+};
+
+/******************************************************************************/
+/************************ Functions Declarations ******************************/
+/******************************************************************************/
+
+/* Obtain the GPIO decriptor. */
+int32_t gpio_get(struct gpio_desc **desc,
+		       const struct gpio_init_param *param);
+
+/* Obtain optional GPIO descriptor. */
+int32_t gpio_get_optional(struct gpio_desc **desc,
+				const struct gpio_init_param *param);
+
+/* Free the resources allocated by gpio_get(). */
+int32_t gpio_remove(struct gpio_desc *desc);
+
+/* Enable the input direction of the specified GPIO. */
+int32_t gpio_direction_input(struct gpio_desc *desc);
+
+/* Enable the output direction of the specified GPIO. */
+int32_t gpio_direction_output(struct gpio_desc *desc,
+				    uint8_t value);
+
+/* Get the direction of the specified GPIO. */
+int32_t gpio_get_direction(struct gpio_desc *desc,
+				 uint8_t *direction);
+
+/* Set the value of the specified GPIO. */
+int32_t gpio_set_value(struct gpio_desc *desc,
+			     uint8_t value);
+
+/* Get the value of the specified GPIO. */
+int32_t gpio_get_value(struct gpio_desc *desc,
+			     uint8_t *value);
+
+#endif // _GPIO_H_

dj_f1_ad9371/vitis_classic_autobuild/source/include/i2c.h

@@ -0,0 +1,134 @@
+/***************************************************************************//**
+ *   @file   i2c.h
+ *   @brief  Header file of I2C Interface
+ *   @author DBogdan ([email protected])
+********************************************************************************
+ * Copyright 2019(c) Analog Devices, Inc.
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *  - Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *  - Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *  - Neither the name of Analog Devices, Inc. nor the names of its
+ *    contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *  - The use of this software may or may not infringe the patent rights
+ *    of one or more patent holders.  This license does not release you
+ *    from the requirement that you obtain separate licenses from these
+ *    patent holders to use this software.
+ *  - Use of the software either in source or binary form, must be run
+ *    on or directly connected to an Analog Devices Inc. component.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT,
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, INTELLECTUAL PROPERTY RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*******************************************************************************/
+
+#ifndef _I2C_H_
+#define _I2C_H_
+
+/******************************************************************************/
+/***************************** Include Files **********************************/
+/******************************************************************************/
+
+#include <stdint.h>
+
+/******************************************************************************/
+/*************************** Types Declarations *******************************/
+/******************************************************************************/
+
+/**
+ * @struct i2c_platform_ops
+ * @brief Structure holding I2C function pointers that point to the platform
+ * specific function
+ */
+struct i2c_platform_ops ;
+
+/**
+ * @struct i2c_init_param
+ * @brief Structure holding the parameters for I2C initialization.
+ */
+struct i2c_init_param {
+	/** Device ID */
+	uint32_t	device_id;
+	/** I2C maximum transfer speed supported */
+	uint32_t	max_speed_hz;
+	/** Slave address */
+	uint8_t		slave_address;
+	/** I2C platform specific functions */
+	const struct i2c_platform_ops *platform_ops;
+	/** I2C extra parameters (device specific parameters) */
+	void		*extra;
+};
+
+/**
+ * @struct i2c_desc
+ * @brief Structure holding I2C descriptor
+ */
+struct i2c_desc {
+	/** Device ID */
+	uint32_t	device_id;
+	/** I2C maximum transfer speed supported */
+	uint32_t	max_speed_hz;
+	/** Slave address */
+	uint8_t		slave_address;
+	/** I2C platform specific functions */
+	const struct i2c_platform_ops *platform_ops;
+	/** I2C extra parameters (device specific parameters) */
+	void		*extra;
+};
+
+/**
+ * @struct i2c_platform_ops
+ * @brief Structure holding i2c function pointers that point to the platform
+ * specific function
+ */
+struct i2c_platform_ops {
+	/** i2c initialization function pointer */
+	int32_t (*i2c_ops_init)(struct i2c_desc **,
+				const struct i2c_init_param *);
+	/** i2c write function pointer */
+	int32_t (*i2c_ops_write)(struct i2c_desc *, uint8_t *, uint8_t, uint8_t);
+	/** i2c write function pointer */
+	int32_t (*i2c_ops_read)(struct i2c_desc *, uint8_t *, uint8_t, uint8_t);
+	/** i2c remove function pointer */
+	int32_t (*i2c_ops_remove)(struct i2c_desc *);
+};
+
+/******************************************************************************/
+/************************ Functions Declarations ******************************/
+/******************************************************************************/
+
+/* Initialize the I2C communication peripheral. */
+int32_t i2c_init(struct i2c_desc **desc,
+		       const struct i2c_init_param *param);
+
+/* Free the resources allocated by i2c_init(). */
+int32_t i2c_remove(struct i2c_desc *desc);
+
+/* Write data to a slave device. */
+int32_t i2c_write(struct i2c_desc *desc,
+			uint8_t *data,
+			uint8_t bytes_number,
+			uint8_t stop_bit);
+
+/* Read data from a slave device. */
+int32_t i2c_read(struct i2c_desc *desc,
+		       uint8_t *data,
+		       uint8_t bytes_number,
+		       uint8_t stop_bit);
+
+#endif // _I2C_H_

dj_f1_ad9371/vitis_classic_autobuild/source/include/irq.h

@@ -0,0 +1,235 @@
+/***************************************************************************//**
+ *   @file   irq.h
+ *   @brief  Header file of IRQ interface.
+ *   @author Cristian Pop ([email protected])
+********************************************************************************
+ * Copyright 2019(c) Analog Devices, Inc.
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *  - Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *  - Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *  - Neither the name of Analog Devices, Inc. nor the names of its
+ *    contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *  - The use of this software may or may not infringe the patent rights
+ *    of one or more patent holders.  This license does not release you
+ *    from the requirement that you obtain separate licenses from these
+ *    patent holders to use this software.
+ *  - Use of the software either in source or binary form, must be run
+ *    on or directly connected to an Analog Devices Inc. component.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT,
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, INTELLECTUAL PROPERTY RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*******************************************************************************/
+
+#ifndef _IRQ_H_
+#define _IRQ_H_
+
+/******************************************************************************/
+/***************************** Include Files **********************************/
+/******************************************************************************/
+
+#include <stdint.h>
+
+/******************************************************************************/
+/*************************** Types Declarations *******************************/
+/******************************************************************************/
+
+/**
+ * @enum irq_uart_event_e
+ * @brief Possible events for uart interrupt
+ * @todo replace this with enum irq_event
+ */
+enum irq_uart_event_e {
+	/** Write operation finalized */
+	IRQ_WRITE_DONE,
+	/** Read operation finalized */
+	IRQ_READ_DONE,
+	/** An error occurred */
+	IRQ_ERROR
+};
+
+enum irq_event {
+	EVT_GPIO,
+	EVT_UART_TX_COMPLETE,
+	EVT_UART_RX_COMPLETE,
+	EVT_UART_ERROR,
+	EVT_RTC,
+	EVT_XINT,
+	EVT_TIM_ELAPSED
+};
+
+enum irq_trig_level {
+	IRQ_LEVEL_LOW,
+	IRQ_LEVEL_HIGH,
+	IRQ_EDGE_FALLING,
+	IRQ_EDGE_RISING,
+	IRQ_EDGE_BOTH
+};
+
+enum irq_peripheral {
+	GPIO_IRQ,
+	UART_IRQ,
+	RTC_IRQ,
+	TIM_IRQ
+};
+
+/**
+ * @struct irq_platform_ops
+ * @brief Structure holding IRQ function pointers that point to the platform
+ * specific function
+ */
+struct irq_platform_ops ;
+
+/**
+ * @struct irq_init_param
+ * @brief Structure holding the initial parameters for Interrupt Request.
+ */
+struct irq_init_param {
+	/** Interrupt request controller ID. */
+	uint32_t	irq_ctrl_id;
+	/** Platform specific IRQ platform ops structure. */
+	const struct irq_platform_ops *platform_ops;
+	/**
+	 * This is intended to store irq controller specific configurations,
+	 * it should not be a reference to any peripheral descriptor.
+	*/
+	void		*extra;
+};
+
+/**
+ * @struct irq_desc
+ * @brief Structure for Interrupt Request descriptor.
+ */
+struct irq_ctrl_desc {
+	/** Interrupt request controller ID. */
+	uint32_t	irq_ctrl_id;
+	/** Platform specific IRQ platform ops structure. */
+	const struct irq_platform_ops *platform_ops;
+	/**
+	 * This is intended to store irq controller specific configurations,
+	 * it should not be a reference to any peripheral descriptor.
+	*/
+	void		*extra;
+};
+
+/**
+ * @struct callback_desc
+ * @brief Structure describing a callback to be registered
+ * @todo: remove this, use struct irq_callback instead.
+ */
+struct callback_desc {
+	/** Callback to be called when the event an event occurs. */
+	void (*callback)(void *context);
+	/**
+	 * Callback to be called when the event an event occurs
+	 *  @param ctx - Same as \ref callback_desc.ctx
+	 *  @param event - Event that generated the callback
+	 *  @param extra - Platform specific data
+	 */
+	void (*legacy_callback)(void *ctx, uint32_t event,
+				void *extra); /* TODO: remove this. */
+	/** Parameter to be passed when the callback is called */
+	void *ctx;
+	/** Platform specific configuration for a callback */
+	void *legacy_config; /* TODO: remove this. */
+	/** Platform specific event that triggers the calling of the callback. */
+	enum irq_event event;
+	/** Interrupt source peripheral specifier. */
+	enum irq_peripheral peripheral;
+	/** This will be used to store HAL specific descriptors */
+	void *handle;
+};
+
+/**
+ * @struct irq_platform_ops
+ * @brief Structure holding IRQ function pointers that point to the platform
+ * specific function
+ */
+struct irq_platform_ops {
+	/** Initialize a interrupt controller peripheral. */
+	int32_t (*init)(struct irq_ctrl_desc **desc,
+			const struct irq_init_param *param);
+	/** Register a legacy_callback to handle the irq events */
+	int32_t (*register_callback)(struct irq_ctrl_desc *desc, uint32_t irq_id,
+				     struct callback_desc *callback);
+	/** Unregisters a generic IRQ handling function */
+	int32_t (*unregister_callback)(struct irq_ctrl_desc *desc,
+				       uint32_t irq_id,
+				       struct callback_desc *callback);
+	/** Global interrupt enable */
+	int32_t (*global_enable)(struct irq_ctrl_desc *desc);
+	/** Global interrupt disable */
+	int32_t (*global_disable)(struct irq_ctrl_desc *desc);
+	/** Set interrupt trigger level. */
+	int32_t (*trigger_level_set)(struct irq_ctrl_desc *desc, uint32_t irq_id,
+				     enum irq_trig_level trig);
+	/** Enable specific interrupt */
+	int32_t (*enable)(struct irq_ctrl_desc *desc, uint32_t irq_id);
+	/** Disable specific interrupt */
+	int32_t (*disable)(struct irq_ctrl_desc *desc, uint32_t irq_id);
+	/** Set the priority level for a specific interrupt */
+	int32_t (*set_priority)(struct irq_ctrl_desc *desc, uint32_t irq_id,
+				uint32_t priority_level);
+	/** IRQ remove function pointer */
+	int32_t (*remove)(struct irq_ctrl_desc *desc);
+};
+
+/******************************************************************************/
+/************************ Functions Declarations ******************************/
+/******************************************************************************/
+
+/* Initialize a interrupt controller peripheral. */
+int32_t irq_ctrl_init(struct irq_ctrl_desc **desc,
+			    const struct irq_init_param *param);
+
+/* Free the resources allocated by irq_ctrl_init(). */
+int32_t irq_ctrl_remove(struct irq_ctrl_desc *desc);
+
+/* Register a callback to handle the irq events */
+int32_t irq_register_callback(struct irq_ctrl_desc *desc,
+				    uint32_t irq_id,
+				    struct callback_desc *callback_desc);
+
+/* Unregisters a generic IRQ handling function */
+int32_t irq_unregister_callback(struct irq_ctrl_desc *desc,
+				      uint32_t irq_id,
+				      struct callback_desc *callback_desc);
+
+/* Global interrupt enable */
+int32_t irq_global_enable(struct irq_ctrl_desc *desc);
+
+/* Global interrupt disable */
+int32_t irq_global_disable(struct irq_ctrl_desc *desc);
+
+/* Set interrupt trigger level. */
+int32_t irq_trigger_level_set(struct irq_ctrl_desc *desc,
+				    uint32_t irq_id,
+				    enum irq_trig_level trig);
+
+/* Enable specific interrupt */
+int32_t irq_enable(struct irq_ctrl_desc *desc, uint32_t irq_id);
+
+/* Disable specific interrupt */
+int32_t irq_disable(struct irq_ctrl_desc *desc, uint32_t irq_id);
+
+/** Set the priority level for a specific interrupt */
+int32_t irq_set_priority(struct irq_ctrl_desc *desc,
+			       uint32_t irq_id,
+			       uint32_t priority_level);
+#endif // _IRQ_H_

dj_f1_ad9371/vitis_classic_autobuild/source/include/list.h

@@ -0,0 +1,327 @@
+/***************************************************************************//**
+ *   @file   list.h
+ *   @brief  List library header
+ *   @author Mihail Chindris ([email protected])
+********************************************************************************
+ *   @copyright
+ * Copyright 2020(c) Analog Devices, Inc.
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *  - Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *  - Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *  - Neither the name of Analog Devices, Inc. nor the names of its
+ *    contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *  - The use of this software may or may not infringe the patent rights
+ *    of one or more patent holders.  This license does not release you
+ *    from the requirement that you obtain separate licenses from these
+ *    patent holders to use this software.
+ *  - Use of the software either in source or binary form, must be run
+ *    on or directly connected to an Analog Devices Inc. component.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT,
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, INTELLECTUAL PROPERTY RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+********************************************************************************
+ *
+ *  @section list_details Library description
+ *   This library handles double linked lists and it expose inseart,
+ *   read, get and delete functions. \n
+ *   It also can be accesed using it member functions which wrapp function for
+ *   usual list types.\n
+ *  @subsection example Sample code
+ *   @code{.c}
+ *	// -- Use a generic list
+ *	struct list_desc *list1;
+ *	struct iterator  *it;
+ *	uint32_t	 a;
+ *	// Create list list1
+ *	list_init(&list1, LIST_DEFAULT, NULL);
+ *	// Add items to the list
+ *	list_add_last(list1, 1);
+ *	list_add_last(list1, 2);
+ *	list_add_last(list1, 3);
+ *	// Here the list will be: 1 -> 2 - > 3
+ *
+ *	list_read_last(list1, &a);
+ *	printf("Last: %d\n", a);
+ *	// 3 will be printed
+ *	// Create an iterator on the end of the list
+ *	iterator_init(&it, list1, 0);
+ *	// Move the iterator backword with one position
+ *	iterator_move(it, -1);
+ *	// Read the data at the current position
+ *	iterator_read(it, &a);
+ *	printf("Current: %d\n", a);
+ *	// 2 will be printed
+ *	iterator_remove(it);
+ *	list_remove(list1);
+ *
+ *	// -- Use a popular list
+ *	struct list_desc *stack;
+ *	// Create a FIFO list
+ *	list_init(&stack, LIST_STACK, NULL);
+ *	// Put elements in the list
+ *	stack->push(stack, 1);
+ *	stack->push(stack, 2);
+ *	stack->push(stack, 3);
+ *	// Read from the stack
+ *	stack->pop(stack, &a);
+ *	printf("Last: %d\n", a);
+ *	// 3 will be printed
+ *	list_remove(stack);
+ *    @endcode
+*******************************************************************************/
+
+#ifndef _LIST_H_
+#define _LIST_H_
+
+/******************************************************************************/
+/***************************** Include Files **********************************/
+/******************************************************************************/
+
+#include <stdint.h>
+#include <stdbool.h>
+
+/******************************************************************************/
+/*************************** Types Declarations *******************************/
+/******************************************************************************/
+
+/**
+ * @struct list_desc
+ * @brief Structure storing the list and function wrapper for usual list types
+ *
+ * With this structure the funtionalities of usual list types
+ * ( \ref adapter_type ) can be accesed with the functions referenced in this
+ * structure.
+ * For example:
+ * @code{.c}
+ * my_queue->push(my_queue, my_data);
+ * @endcode
+ */
+struct list_desc;
+
+/**
+ * @struct list_iterator
+ * @brief Structure used to iterate through the list using Iterator functions.
+ */
+struct iterator;
+
+/**
+ * @brief Prototype of the compare function.
+ *
+ * The function used to compare the elements of the liste when doing
+ * operations on an ordered list.
+ * @param data1 - First element to be compared
+ * @param data2 - Second element to be compared
+ * @return
+ *  - -1 - If data1 < data2
+ *  - 0 - If data1 == data2
+ *  - 1 - If data1 > data2
+ */
+typedef int32_t (*f_cmp)(void *data1, void *data2);
+
+/**
+ * @name Generic functions
+ * Each function interacting with the list have one of the following formats.\n
+ * Aditionaly they may have one more parametere for specific functionalities.\n
+ * In the Iterator functions, the list reference is replaced by the iterator's
+ * one.
+ * @{
+ */
+
+/**
+ * @brief Add an element in the list.
+ *
+ * The element of the list is created and the data field is stored in it.
+ * @param list_desc - Reference to the list. Created by \ref list_init.
+ * @param data - Data to store in a list element
+ * @return
+ *  - 0 : On success
+ *  - -1 : Otherwise
+ */
+typedef int32_t (*f_add)(struct list_desc *list_desc, void *data);
+
+/**
+ * @brief Edit an element in the list. The content is replaced by new_data.
+ * @param list_desc - Reference to the list. Created by \ref list_init.
+ * @param new_data - New data to replace the old one
+ * @return
+ *  - 0 : On success
+ *  - -1 : Otherwise
+ */
+typedef int32_t (*f_edit)(struct list_desc *list_desc, void *new_data);
+
+/**
+ * @brief Read an element from the list.
+ * @param list_desc - Reference to the list. Created by \ref list_init.
+ * @param result - If not null, result is filled with:
+ * @param data - Content of the list element, NULL if some error occur.
+ * @return \n
+ *  - 0 : On success
+ *  - -1 : Otherwise
+ * @note If the content of an element can be 0 then the result must be checked
+ * to see if the functions has succeded
+ */
+typedef int32_t (*f_read)(struct list_desc *list_desc, void **data);
+
+/**
+ * @brief Read and remove an element from the list.
+ * @param list_desc - Reference to the list. Created by \ref list_init.
+ * @param result - If not null, result is filled with:
+ * @param data - Content of the list element, NULL if some error occur.
+ * @return
+ *  - 0 : On success
+ *  - -1 : Otherwise
+ */
+typedef int32_t (*f_get)(struct list_desc *list_desc, void **data);
+
+/** @} */
+
+/**
+ * @enum adapter_type
+ * @brief Selects functionalities for functions in \ref list_desc
+ */
+enum adapter_type {
+	/** Default type is LIST_STACK */
+	LIST_DEFAULT,
+	/**
+	 * Functions for a FIFO list (First-in first-out). Elements are inserted
+	 * in one end and extracted from the other end.
+	 *  - \e Push: Insert element
+	 *  - \e Pop: Get next element (Read and remove)
+	 *  - \e Top_next: Read next element
+	 *  - \e Back: Read first element
+	 *  - \e Swap: Edit the content of the next element
+	 */
+	LIST_QUEUE,
+	/**
+	 * Functions for a LIFO list (Last-in first-out). Elements are inserted
+	 * and extracted only from the same end.
+	 *  - \e Push: Insert element
+	 *  - \e Pop: Get top element (Read and remove)
+	 *  - \e Top_next: Read top element
+	 *  - \e Back: Read bottom element
+	 *  - \e Swap: Edit the content of the top element
+	 */
+	LIST_STACK,
+	/**
+	 * Functions for ordered list. The order of element is determinated
+	 * usinge the \ref f_cmp.
+	 *  - \e Push: Insert element
+	 *  - \e Pop: Get lowest element (Read and remove)
+	 *  - \e Top_next: Read lowest element
+	 *  - \e Back: Read the biggest element
+	 *  - \e Swap: Edit the lowest element
+	 */
+	LIST_PRIORITY_LIST
+};
+
+struct list_desc {
+	/** Refer to \ref adapter_type */
+	f_add	push;
+	/** Refer to \ref adapter_type */
+	f_get	pop;
+	/** Refer to \ref adapter_type */
+	f_read	top_next;
+	/** Refer to \ref adapter_type */
+	f_read	back;
+	/** Refer to \ref adapter_type */
+	f_edit	swap;
+	/** Structure storing the list internal parameters */
+	void	*priv_desc;
+};
+
+/******************************************************************************/
+/************************ Functions Declarations ******************************/
+/******************************************************************************/
+
+int32_t list_init(struct list_desc **list_desc,
+			enum adapter_type type,
+			f_cmp comparator);
+int32_t list_remove(struct list_desc *list_desc);
+int32_t list_get_size(struct list_desc *list_desc,
+			    uint32_t *out_size);
+
+/**
+ * @name Iterator functions
+ * An iterator is used to iterate through the list. For a list, any number of
+ * iterators can be created. All must be removed before removing a list.
+ * @{
+ */
+int32_t iterator_init(struct iterator **iter,
+			    struct list_desc *list_desc,
+			    bool start);
+int32_t iterator_remove(struct iterator *iter);
+int32_t iterator_move(struct iterator *iter, int32_t steps);
+int32_t iterator_move_to_idx(struct iterator *iter, int32_t idx);
+int32_t iterator_find(struct iterator *iter, void *cmp_data);
+int32_t iterator_insert(struct iterator *iter, void *data,
+			      bool after);
+int32_t iterator_edit(struct iterator *iter, void *new_data);
+int32_t iterator_read(struct iterator *iter, void **data);
+int32_t iterator_get(struct iterator *iter, void **data);
+/** @}*/
+
+/**
+ * @name Operations on the ends of the list
+ * These functions will operate on the first or last element of the list
+ * @{
+ */
+int32_t list_add_first(struct list_desc *list_desc, void *data);
+int32_t list_edit_first(struct list_desc *list_desc,
+			      void *new_data);
+int32_t list_read_first(struct list_desc *list_desc, void **data);
+int32_t list_get_first(struct list_desc *list_desc, void **data);
+
+int32_t list_add_last(struct list_desc *list_desc, void *data);
+int32_t list_edit_last(struct list_desc *list_desc, void *new_data);
+int32_t list_read_last(struct list_desc *list_desc, void **data);
+int32_t list_get_last(struct list_desc *list_desc, void **data);
+/** @}*/
+
+/**
+ * @name Operations by index
+ * These functions use an index to identify the element in the list.
+ * @{
+ */
+int32_t list_add_idx(struct list_desc *list_desc, void *data,
+			   uint32_t idx);
+int32_t list_edit_idx(struct list_desc *list_desc, void *new_data,
+			    uint32_t idx);
+int32_t list_read_idx(struct list_desc *list_desc, void **data,
+			    uint32_t idx);
+int32_t list_get_idx(struct list_desc *list_desc, void **data,
+			   uint32_t idx);
+/** @}*/
+
+/**
+ * @name Operations by comparation
+ * These functions use the specified \ref f_cmp at \ref list_init to identify
+ * the element this will operate on.
+ * @{
+ */
+int32_t list_add_find(struct list_desc *list_desc, void *data);
+int32_t list_edit_find(struct list_desc *list_desc, void *new_data,
+			     void *cmp_data);
+int32_t list_read_find(struct list_desc *list_desc, void **data,
+			     void *cmp_data);
+int32_t list_get_find(struct list_desc *list_desc, void **data,
+			    void *cmp_data);
+/** @}*/
+
+#endif // _LIST_H_

dj_f1_ad9371/vitis_classic_autobuild/source/include/ring_buffer.h

@@ -0,0 +1,150 @@
+#include <stdint.h>
+#include <stdbool.h>
+#include <stddef.h>
+/**
+ * @file
+ * Prototypes and structures for the ring buffer module.
+ */
+
+#ifndef __RINGBUFFER_H
+#define __RINGBUFFER_H
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/**
+ * Structure which holds a ring buffer.
+ * The buffer contains a buffer array
+ * as well as metadata for the ring buffer.
+ */
+typedef struct {
+  void *buffer;       ///< Buffer memory
+  size_t tail;        ///< Index of tail
+  size_t head;        ///< Index of head
+  size_t capacity;    ///< Capacity of buffer (in elements)
+  size_t size;        ///< Size of data stored in buffer (in elements)
+  size_t element_size; ///< Size of each element in bytes
+} RING_BUFFER;
+
+/**
+ * Initialize a ringbuffer for specific data type.
+ * @param capacity capacity of the ringbuffer (in elements)
+ * @param element_size size of each element in bytes
+ * @return The initialized ringbuffer pointer, NULL of not enough memory
+ */
+RING_BUFFER *RingBuff_Create(size_t capacity, size_t element_size);
+
+/**
+ * Destroy a ringbuffer.
+ * @param rb The buffer to destroyed.
+ */
+void RingBuff_Destroy(RING_BUFFER *rb);
+
+/**
+ * Flush all the data stored in ring buffer
+ * @param rb The buffer to be flushed.
+ */
+void RingBuff_Flush(RING_BUFFER *rb);
+
+/**
+ * Adds an element to a ring buffer.
+ * @param rb The buffer in which the data should be placed.
+ * @param element A pointer to the element to place in the queue.
+ * @return The number of elements added (0 or 1).
+ */
+size_t RingBuff_PushElement(RING_BUFFER *rb, const void *element);
+
+/**
+ * Adds multiple elements to a ring buffer.
+ * @param rb The buffer in which the data should be placed.
+ * @param elements A pointer to the array of elements to place in the queue.
+ * @param count The number of elements to add.
+ * @return The number of elements actually added.
+ */
+size_t RingBuff_Push(RING_BUFFER *rb, const void *elements, size_t count);
+
+/**
+ * Returns the oldest element from a ring buffer and removes it.
+ * @param rb The buffer from which the data should be returned.
+ * @param element A pointer to where the element should be placed.
+ * @return 1 if an element was retrieved, 0 otherwise.
+ */
+size_t RingBuff_PopElement(RING_BUFFER *rb, void *element);
+
+/**
+ * Returns multiple elements from a ring buffer and removes them.
+ * @param rb The buffer from which the data should be returned.
+ * @param elements A pointer to the array where elements should be placed.
+ * @param count The maximum number of elements to return.
+ * @return The number of elements actually returned.
+ */
+size_t RingBuff_Pop(RING_BUFFER *rb, void *elements, size_t count);
+
+/**
+ * Peeks the oldest element in a ring buffer without removing it.
+ * @param rb The buffer from which the data should be returned.
+ * @param element A pointer to where the element should be placed.
+ * @return 1 if an element was retrieved, 0 otherwise.
+ */
+size_t RingBuff_PeekElement(const RING_BUFFER *rb, void *element);
+
+/**
+ * Peeks multiple elements from a ring buffer without removing them.
+ * @param rb The buffer from which the data should be returned.
+ * @param elements A pointer to the array where elements should be placed.
+ * @param count The maximum number of elements to return.
+ * @return The number of elements actually returned.
+ */
+size_t RingBuff_Peek(const RING_BUFFER *rb, void *elements, size_t count);
+
+/**
+ * Returns the number of elements in a ring buffer.
+ * @param rb The buffer for which the number of elements should be returned.
+ * @return The number of elements in the ring buffer.
+ */
+size_t RingBuff_Size(RING_BUFFER *rb);
+
+/**
+ * Returns the capacity of a ring buffer.
+ * @param rb The buffer for which the capacity should be returned.
+ * @return The capacity of the ring buffer.
+ */
+size_t RingBuff_Capacity(RING_BUFFER *rb);
+
+/**
+ * Returns whether a ring buffer is empty.
+ * @param buffer The buffer for which it should be returned whether it is empty.
+ * @return 1 if empty; 0 otherwise.
+ */
+uint8_t RingBuff_isEmpty(RING_BUFFER *rb);
+
+/**
+ * Returns whether a ring buffer is full.
+ * @param buffer The buffer for which it should be returned whether it is full.
+ * @return 1 if full; 0 otherwise.
+ */
+uint8_t RingBuff_isFull(RING_BUFFER *rb);
+
+/**
+ * Get element at specific index without removing it.
+ * @param rb The buffer from which the data should be returned.
+ * @param index The index of the element to get (0 is the oldest element).
+ * @param element A pointer to where the element should be placed.
+ * @return 1 if element was retrieved, 0 otherwise.
+ */
+uint8_t RingBuff_GetAt(const RING_BUFFER *rb, size_t index, void *element);
+
+/**
+ * Debug function to print the contents of the ring buffer.
+ * @param rb The buffer to print.
+ * @param print_func Function pointer to print each element.
+ */
+void RingBuff_Debug(const RING_BUFFER *rb, void (*print_func)(const void *element));
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __RINGBUFFER_H */

dj_f1_ad9371/vitis_classic_autobuild/source/include/spi.h

@@ -0,0 +1,209 @@
+/***************************************************************************//**
+ *   @file   spi.h
+ *   @brief  Header file of SPI Interface
+ *   @author DBogdan ([email protected])
+********************************************************************************
+ * Copyright 2019(c) Analog Devices, Inc.
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *  - Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *  - Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *  - Neither the name of Analog Devices, Inc. nor the names of its
+ *    contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *  - The use of this software may or may not infringe the patent rights
+ *    of one or more patent holders.  This license does not release you
+ *    from the requirement that you obtain separate licenses from these
+ *    patent holders to use this software.
+ *  - Use of the software either in source or binary form, must be run
+ *    on or directly connected to an Analog Devices Inc. component.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT,
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, INTELLECTUAL PROPERTY RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*******************************************************************************/
+
+#ifndef _SPI_H_
+#define _SPI_H_
+
+/******************************************************************************/
+/***************************** Include Files **********************************/
+/******************************************************************************/
+
+#include <stdint.h>
+
+/******************************************************************************/
+/********************** Macros and Constants Definitions **********************/
+/******************************************************************************/
+
+#define	SPI_CPHA	0x01
+#define	SPI_CPOL	0x02
+#define	SPI_3WIRE	0x04
+
+/******************************************************************************/
+/*************************** Types Declarations *******************************/
+/******************************************************************************/
+
+/**
+ * @enum spi_mode
+ * @brief SPI configuration for clock phase and polarity.
+ */
+enum spi_mode {
+	/** Data on rising, shift out on falling */
+	SPI_MODE_0 = (0 | 0),
+	/** Data on falling, shift out on rising */
+	SPI_MODE_1 = (0 | SPI_CPHA),
+	/** Data on rising, shift out on falling */
+	SPI_MODE_2 = (SPI_CPOL | 0),
+	/** Data on falling, shift out on rising */
+	SPI_MODE_3 = (SPI_CPOL | SPI_CPHA),
+	/** Data on rising, shift out on falling */
+	SPI_MODE_4 = SPI_3WIRE
+};
+
+/**
+ * @enum spi_bit_order
+ * @brief SPI configuration for bit order (MSB/LSB).
+ */
+enum spi_bit_order {
+	/** Most-significant bit (MSB) first */
+	SPI_BIT_ORDER_MSB_FIRST = 0,
+	/** Least-significant bit (LSB) first */
+	SPI_BIT_ORDER_LSB_FIRST = 1,
+};
+
+/**
+ * @struct spi_msg_list
+ * @brief List item describing a SPI transfer
+ */
+struct spi_msg {
+	/** Buffer with data to send. If NULL, 0x00 will be sent */
+	uint8_t			*tx_buff;
+	/** Buffer where to store data. If NULL, incoming data won't be saved */
+	uint8_t			*rx_buff;
+	/** Length of buffers. Must have equal size. */
+	uint32_t		bytes_number;
+	/** If set, CS will be deasserted after the transfer */
+	uint8_t			cs_change;
+	/**
+	 * Minimum delay (in us) between the CS de-assert event of the current message
+	 * and the assert of the next one.
+	 */
+	uint32_t		cs_change_delay;
+	/** Delay (in us) between the CS assert and the first SCLK edge. */
+	uint32_t		cs_delay_first;
+	/** Delay (in us) between the last SCLK edge and the CS deassert */
+	uint32_t		cs_delay_last;
+};
+
+/**
+ * @struct spi_platform_ops
+ * @brief Structure holding SPI function pointers that point to the platform
+ * specific function
+ */
+struct spi_platform_ops ;
+
+/**
+ * @struct spi_init_param
+ * @brief Structure holding the parameters for SPI initialization
+ */
+struct spi_init_param {
+	/** Device ID */
+	uint32_t	device_id;
+	/** maximum transfer speed */
+	uint32_t	max_speed_hz;
+	/** SPI chip select */
+	uint8_t		chip_select;
+	/** SPI mode */
+	enum spi_mode	mode;
+	/** SPI bit order */
+	enum spi_bit_order	bit_order;
+	const struct spi_platform_ops *platform_ops;
+	/**  SPI extra parameters (device specific) */
+	void		*extra;
+	/** Parent of the device */
+	struct spi_desc *parent;
+};
+
+/**
+ * @struct spi_desc
+ * @brief Structure holding SPI descriptor.
+ */
+struct spi_desc {
+	/** Device ID */
+	uint32_t	device_id;
+	/** maximum transfer speed */
+	uint32_t	max_speed_hz;
+	/** SPI chip select */
+	uint8_t		chip_select;
+	/** SPI mode */
+	enum spi_mode	mode;
+	/** SPI bit order */
+	enum spi_bit_order	bit_order;
+	const struct spi_platform_ops *platform_ops;
+	/**  SPI extra parameters (device specific) */
+	void		*extra;
+	/** Parent of the device */
+	struct spi_desc *parent;
+};
+
+/**
+ * @struct spi_platform_ops
+ * @brief Structure holding SPI function pointers that point to the platform
+ * specific function
+ */
+struct spi_platform_ops {
+	/** SPI initialization function pointer */
+	int32_t (*init)(struct spi_desc **, const struct spi_init_param *);
+	/** SPI write/read function pointer */
+	int32_t (*write_and_read)(struct spi_desc *, uint8_t *, uint16_t);
+	/** SPI write function pointer */
+	int32_t (*write_and_read_3wire)(struct spi_desc *, uint8_t *,uint8_t *,uint16_t, uint16_t);
+	/** Iterate over the spi_msg array and send all messages at once */
+	int32_t (*transfer)(struct spi_desc *, struct spi_msg *, uint32_t);
+	/** SPI remove function pointer */
+	int32_t (*remove)(struct spi_desc *);
+};
+
+/******************************************************************************/
+/************************ Functions Declarations ******************************/
+/******************************************************************************/
+
+/* Initialize the SPI communication peripheral. */
+int32_t spi_init(struct spi_desc **desc,
+		       const struct spi_init_param *param);
+
+/* Free the resources allocated by spi_init(). */
+int32_t spi_remove(struct spi_desc *desc);
+
+/* Write and read data to/from SPI. */
+int32_t spi_write_and_read(struct spi_desc *desc,
+				 uint8_t *data,
+				 uint16_t bytes_number);
+int32_t spi_write_and_read_3wire(struct spi_desc *desc,
+			   uint8_t *write_data,
+			   uint8_t *read_data,
+			   uint16_t write_bytes_number,
+			   uint16_t read_bytes_number);
+
+/* Iterate over the spi_msg array and send all messages at once */
+int32_t spi_transfer(struct spi_desc *desc,
+			   struct spi_msg *msgs,
+			   uint32_t len);
+
+
+#endif // _SPI_H_

dj_f1_ad9371/vitis_classic_autobuild/source/include/timer.h

@@ -0,0 +1,159 @@
+/***************************************************************************//**
+*   @file   timer.h
+*   @brief  Timer control module header.
+*   @author Andrei Drimbarean ([email protected])
+********************************************************************************
+* Copyright 2019(c) Analog Devices, Inc.
+*
+* All rights reserved.
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions are met:
+*  - Redistributions of source code must retain the above copyright
+*    notice, this list of conditions and the following disclaimer.
+*  - Redistributions in binary form must reproduce the above copyright
+*    notice, this list of conditions and the following disclaimer in
+*    the documentation and/or other materials provided with the
+*    distribution.
+*  - Neither the name of Analog Devices, Inc. nor the names of its
+*    contributors may be used to endorse or promote products derived
+*    from this software without specific prior written permission.
+*  - The use of this software may or may not infringe the patent rights
+*    of one or more patent holders.  This license does not release you
+*    from the requirement that you obtain separate licenses from these
+*    patent holders to use this software.
+*  - Use of the software either in source or binary form, must be run
+*    on or directly connected to an Analog Devices Inc. component.
+*
+* THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR IMPLIED
+* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT, MERCHANTABILITY
+* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+* IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+* LIMITED TO, INTELLECTUAL PROPERTY RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR
+* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*******************************************************************************/
+
+#ifndef _SRC_TIMER_H_
+#define _SRC_TIMER_H_
+
+/******************************************************************************/
+/***************************** Include Files **********************************/
+/******************************************************************************/
+
+#include <stdint.h>
+
+/******************************************************************************/
+/*************************** Types Declarations *******************************/
+/******************************************************************************/
+
+/**
+ * @struct timer_desc
+ * @brief Structure holding timer descriptor
+ */
+struct timer_desc {
+	/** timer ID */
+	uint16_t id;
+	/** timer count frequency (Hz) */
+	uint32_t freq_hz;
+	/** the number of ticks the timer counts until it resets */
+	uint32_t ticks_count;
+	/** Timer platform operations */
+	const struct timer_platform_ops *platform_ops;
+	/** timer extra parameters (device specific) */
+	void *extra;
+};
+
+/**
+ * @struct timer_platform_ops
+ * @brief Structure holding timer function pointers that point to the platform
+ * specific function
+ */
+struct timer_platform_ops ;
+
+/**
+ * @struct timer_init_param
+ * @brief  Structure holding the parameters for timer initialization
+ */
+struct timer_init_param {
+	/** timer ID */
+	uint16_t id;
+	/** timer count frequency (Hz) */
+	uint32_t freq_hz;
+	/** the number of ticks the timer counts until it resets */
+	uint32_t ticks_count;
+	/** Timer platform operations */
+	const struct timer_platform_ops *platform_ops;
+	/** timer extra parameters (device specific) */
+	void *extra;
+};
+
+/**
+ * @struct timer_platform_ops
+ * @brief Structure holding timer function pointers that point to the platform
+ * specific function
+ */
+struct timer_platform_ops {
+	/** timer initialization function pointer */
+	int32_t (*init)(struct timer_desc **,
+			const struct timer_init_param *);
+	/** timer start function pointer */
+	int32_t (*start)(struct timer_desc *);
+	/** timer stop function pointer */
+	int32_t (*stop)(struct timer_desc *);
+	/** timer get counter function pointer */
+	int32_t (*counter_get)(struct timer_desc *, uint32_t *counter);
+	/** timer set counter function pointer */
+	int32_t (*counter_set)(struct timer_desc *, uint32_t new_val);
+	/** timer get clock frequency function pointer */
+	int32_t (*count_clk_get)(struct timer_desc *, uint32_t *freq_hz);
+	/** timer set clock frequency function pointer */
+	int32_t (*count_clk_set)(struct timer_desc *, uint32_t freq_hz);
+	/** timer get elapsed time in nsec */
+	int32_t (*get_elapsed_time_nsec)(struct timer_desc *,
+					 uint64_t *elapsed_time);
+	/** timer remove function pointer */
+	int32_t (*remove)(struct timer_desc *);
+};
+
+/******************************************************************************/
+/************************ Functions Declarations ******************************/
+/******************************************************************************/
+
+/* Initialize hardware timer and the handler structure associated with it. */
+int32_t timer_init(struct timer_desc **desc,
+			 struct timer_init_param *param);
+
+/* Free the memory allocated by timer_setup(). */
+int32_t timer_remove(struct timer_desc *desc);
+
+/* Start a timer. */
+int32_t timer_start(struct timer_desc *desc);
+
+/* Stop a timer from counting. */
+int32_t timer_stop(struct timer_desc *desc);
+
+/* Get the value of the counter register for the timer. */
+int32_t timer_counter_get(struct timer_desc *desc,
+				uint32_t *counter);
+
+/* Set the timer counter register value. */
+int32_t timer_counter_set(struct timer_desc *desc,
+				uint32_t new_val);
+
+/* Get the timer clock frequency. */
+int32_t timer_count_clk_get(struct timer_desc *desc,
+				  uint32_t *freq_hz);
+
+/* Set the timer clock frequency. */
+int32_t timer_count_clk_set(struct timer_desc *desc,
+				  uint32_t freq_hz);
+
+/* Get the elapsed time in nsec for the timer. */
+int32_t timer_get_elapsed_time_nsec(struct timer_desc *desc,
+		uint64_t *elapsed_time);
+
+#endif // _SRC_TIMER_H_

dj_f1_ad9371/vitis_classic_autobuild/source/include/trng.h

@@ -0,0 +1,115 @@
+/***************************************************************************//**
+ *   @file   trng.h
+ *   @brief  Header file of true random number generator
+ *   @author Mihail Chindris ([email protected])
+********************************************************************************
+ *   @copyright
+ * Copyright 2020(c) Analog Devices, Inc.
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *  - Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *  - Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *  - Neither the name of Analog Devices, Inc. nor the names of its
+ *    contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *  - The use of this software may or may not infringe the patent rights
+ *    of one or more patent holders.  This license does not release you
+ *    from the requirement that you obtain separate licenses from these
+ *    patent holders to use this software.
+ *  - Use of the software either in source or binary form, must be run
+ *    on or directly connected to an Analog Devices Inc. component.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT,
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, INTELLECTUAL PROPERTY RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*******************************************************************************/
+
+#ifndef _TRNG_H_
+#define _TRNG_H_
+
+/******************************************************************************/
+/***************************** Include Files **********************************/
+/******************************************************************************/
+
+#include <stdint.h>
+
+/******************************************************************************/
+/*************************** Types Declarations *******************************/
+/******************************************************************************/
+
+/**
+ * @struct trng_platform_ops
+ * @brief Structure holding TRNG function pointers that point to the platform
+ * specific function
+ */
+struct trng_platform_ops;
+
+/**
+ * @struct trng_desc
+ * @brief TRNG Descriptor
+ */
+struct trng_desc {
+	/** Platform ops */
+	const struct trng_platform_ops *platform_ops;
+	/** Platform specific parameters */
+	void *extra;
+};
+
+/**
+ * @struct trng_init_param
+ * @brief Init parameter for TRNG
+ */
+struct trng_init_param {
+	/** Device id */
+	uint32_t	dev_id;
+	/** Platform specific parameter */
+	void		*extra;
+	/** Platform ops */
+	const struct trng_platform_ops *platform_ops;
+};
+
+/**
+ * @struct trng_platform_ops
+ * @brief Structure holding TRNG function pointers that point to the platform
+ * specific function
+ */
+struct trng_platform_ops {
+	/** TRNG initialization function pointer */
+	int (*init)(struct trng_desc **,
+		    const struct trng_init_param *);
+	/** Fill buffer with random numbers */
+	int (*fill_buffer)(struct trng_desc *, uint8_t *, uint32_t);
+	/** TRNG remove function pointer */
+	int (*remove)(struct trng_desc *);
+};
+
+/******************************************************************************/
+/************************ Functions Declarations ******************************/
+/******************************************************************************/
+
+/* Initialize descriptor */
+int trng_init(struct trng_desc **desc,
+		    const struct trng_init_param *param);
+
+/* Free resources allocated in descriptor */
+int trng_remove(struct trng_desc *desc);
+
+/* Fill buffer with random numbers */
+int trng_fill_buffer(struct trng_desc *desc, uint8_t *buff,
+			   uint32_t len);
+
+#endif // _TRNG_H_

dj_f1_ad9371/vitis_classic_autobuild/source/include/util.h

@@ -0,0 +1,448 @@
+/*****************************************************************************/
+/**
+ * @file util.h
+ * @author 范浩 ([email protected])
+ * @brief 工具函数头文件
+ * @version 0.0
+ * @date 2023-05-06
+ *
+ * @copyright Copyright(c) 2025 北京理工大学空天网络信息技术研究所
+ *
+ ******************************************************************************/
+
+/**
+ * @defgroup Utility
+ * @brief 通用工具函数集合
+ * @{
+ */
+
+#ifndef __UTIL_H_
+#define __UTIL_H_
+
+#include <stdint.h>
+#include <stdlib.h>
+#include <stdbool.h>
+// #define __CRC_LSB
+#define __BITSWAP_TABLE
+#define __CRC_LSB
+#define CRC16_INIT 0x0000
+#define CRC8_INIT 0x00
+
+/**
+ * @brief 获取指定位的掩码
+ * @param x 位索引
+ */
+#define BIT(x) (1 << (x))
+
+/**
+ * @brief 获取数组元素个数
+ * @param x 数组
+ */
+#define ARRAY_SIZE(x) \
+	(sizeof(x) / sizeof((x)[0]))
+
+/**
+ * @brief 向上取整除法
+ * @param x 被除数
+ * @param y 除数
+ */
+#define DIV_ROUND_UP(x, y) \
+	(((x) + (y)-1) / (y))
+
+/**
+ * @brief 最接近取整除法
+ * @param x 被除数
+ * @param y 除数
+ */
+#define DIV_ROUND_CLOSEST(x, y) \
+	(((x) + (y) / 2) / (y))
+
+/**
+ * @brief 无符号长整型最接近取整除法
+ * @param x 被除数
+ * @param y 除数
+ */
+#define DIV_ROUND_CLOSEST_ULL(x, y) \
+	DIV_ROUND_CLOSEST(x, y)
+
+/**
+ * @brief 返回两个数的较小值
+ * @param x 第一个数
+ * @param y 第二个数
+ */
+#define min(x, y) \
+	(((x) < (y)) ? (x) : (y))
+
+/**
+ * @brief 返回两个数的较小值（指定类型）
+ * @param type 返回值类型
+ * @param x 第一个数
+ * @param y 第二个数
+ */
+#define min_t(type, x, y) \
+	(type) min((type)(x), (type)(y))
+
+/**
+ * @brief 返回两个数的较大值
+ * @param x 第一个数
+ * @param y 第二个数
+ */
+#define max(x, y) \
+	(((x) > (y)) ? (x) : (y))
+
+/**
+ * @brief 返回两个数的较大值（指定类型）
+ * @param type 返回值类型
+ * @param x 第一个数
+ * @param y 第二个数
+ */
+#define max_t(type, x, y) \
+	(type) max((type)(x), (type)(y))
+
+/**
+ * @brief 将值限制在指定范围内
+ * @param val 待限制的值
+ * @param min_val 最小值
+ * @param max_val 最大值
+ */
+#define clamp(val, min_val, max_val) \
+	(max(min((val), (max_val)), (min_val)))
+
+/**
+ * @brief 将值限制在指定范围内（指定类型）
+ * @param type 返回值类型
+ * @param val 待限制的值
+ * @param min_val 最小值
+ * @param max_val 最大值
+ */
+#define clamp_t(type, val, min_val, max_val) \
+	(type) clamp((type)(val), (type)(min_val), (type)(max_val))
+
+/**
+ * @brief 交换两个变量的值
+ * @param x 第一个变量
+ * @param y 第二个变量
+ */
+#define swap(x, y)             \
+	{                          \
+		typeof(x) _tmp_ = (x); \
+		(x) = (y);             \
+		(y) = _tmp_;           \
+	}
+
+/**
+ * @brief 向上取整
+ * @param x 被除数
+ * @param y 除数
+ */
+#define round_up(x, y) \
+	(((x) + (y)-1) / (y))
+
+/**
+ * @brief 每个长整型的位数
+ */
+#define BITS_PER_LONG 32
+
+/**
+ * @brief 生成从l位到h位的掩码
+ * @param h 高位
+ * @param l 低位
+ */
+#define GENMASK(h, l) ({                    \
+	uint32_t t = (uint32_t)(~0UL);          \
+	t = t << (BITS_PER_LONG - (h - l + 1)); \
+	t = t >> (BITS_PER_LONG - (h + 1));     \
+	t;                                      \
+})
+
+/**
+ * @brief 32位字节交换常量
+ * @param x 32位值
+ */
+#define bswap_constant_32(x)                                  \
+	((((x) & 0xff000000) >> 24) | (((x) & 0x00ff0000) >> 8) | \
+	 (((x) & 0x0000ff00) << 8) | (((x) & 0x000000ff) << 24))
+
+/**
+ * @brief 16位字节交换常量
+ * @param x 16位值
+ */
+#define bswap_constant_16(x) ((((x) & (uint16_t)0xff00) >> 8) | \
+							  (((x) & (uint16_t)0x00ff) << 8))
+
+/**
+ * @brief 8位位交换常量
+ * @param x 8位值
+ */
+#define bit_swap_constant_8(x) \
+	((((x) & 0x80) >> 7) |     \
+	 (((x) & 0x40) >> 5) |     \
+	 (((x) & 0x20) >> 3) |     \
+	 (((x) & 0x10) >> 1) |     \
+	 (((x) & 0x08) << 1) |     \
+	 (((x) & 0x04) << 3) |     \
+	 (((x) & 0x02) << 5) |     \
+	 (((x) & 0x01) << 7))
+
+/**
+ * @brief 无符号16位最大值
+ */
+#define U16_MAX ((uint16_t)~0U)
+
+/**
+ * @brief 有符号16位最大值
+ */
+#define S16_MAX ((int16_t)(U16_MAX >> 1))
+
+/**
+ * @brief 无符号64位除法
+ * @param x 被除数
+ * @param y 除数
+ */
+#define DIV_U64(x, y) (x / y)
+
+/**
+ * @brief 未使用参数标记（避免编译警告）
+ * @param x 未使用的参数
+ */
+#define UNUSED_PARAM(x) ((void)x)
+
+/**
+ * @brief 有符号右移
+ * @param x 待移位的值
+ * @param s 移位位数
+ */
+#define shift_right(x, s) ((x) < 0 ? -(-(x) >> (s)) : (x) >> (s))
+
+/**
+ * @brief 输出32位值到指定地址
+ * @param addr 目标地址
+ * @param value 要输出的值
+ */
+void IO_Out32(uintptr_t addr, uint32_t value);
+
+/**
+ * @brief 从指定地址读取32位值
+ * @param addr 源地址
+ * @return 读取的32位值
+ */
+uint32_t IO_In32(uintptr_t addr);
+
+/**
+ * @brief 字节位翻转（左右翻转）
+ * @param byte 输入字节
+ * @return 位翻转后的字节
+ */
+uint8_t byte_bit_swap(uint8_t byte);
+
+/**
+ * @brief 32位字位翻转（左右翻转）
+ * @param word 输入32位字
+ * @return 位翻转后的32位字
+ */
+uint32_t word_bit_swap(uint32_t word);
+
+/**
+ * @brief 计算32位值中1的个数
+ * @param word 输入32位字
+ * @return 1的个数
+ */
+uint32_t count_ones(uint32_t word);
+
+/**
+ * @brief 将定点数转换为浮点数
+ * @param val 定点数值
+ * @param frac_bits 小数部分的位数
+ * @return 转换后的浮点数
+ */
+double fix2double(int32_t val, uint8_t frac_bits);
+
+/**
+ * @brief 查找第一个设置的位
+ * @param word 输入32位字
+ * @return 第一个设置的位的位置
+ */
+uint32_t find_first_set_bit(uint32_t word);
+
+/**
+ * @brief 查找最后一个设置的位
+ * @param word 输入32位字
+ * @return 最后一个设置的位的位置
+ */
+uint32_t find_last_set_bit(uint32_t word);
+
+/**
+ * @brief 在数组中查找最接近的元素
+ * @param val 目标值
+ * @param array 输入数组
+ * @param size 数组大小
+ * @return 最接近元素的索引
+ */
+uint32_t find_closest(int32_t val,
+					  const int32_t *array,
+					  uint32_t size);
+
+/**
+ * @brief 将值移位并应用指定掩码
+ * @param mask 掩码
+ * @param val 输入值
+ * @return 处理后的值
+ */
+uint32_t field_prep(uint32_t mask, uint32_t val);
+
+/**
+ * @brief 从字中获取指定掩码的字段
+ * @param mask 掩码
+ * @param word 输入字
+ * @return 提取的字段
+ */
+uint32_t field_get(uint32_t mask, uint32_t word);
+
+/**
+ * @brief 计算以2为底的对数
+ * @param x 输入值
+ * @return 对数结果
+ */
+int32_t log_base_2(uint32_t x);
+
+/**
+ * @brief 计算两个数的最大公约数
+ * @param a 第一个数
+ * @param b 第二个数
+ * @return 最大公约数
+ */
+uint32_t greatest_common_divisor(uint32_t a,
+								 uint32_t b);
+
+/**
+ * @brief 计算分数的最佳有理近似
+ * @param given_numerator 给定的分子
+ * @param given_denominator 给定的分母
+ * @param max_numerator 最大分子
+ * @param max_denominator 最大分母
+ * @param best_numerator 最佳分子结果
+ * @param best_denominator 最佳分母结果
+ */
+void rational_best_approximation(uint32_t given_numerator,
+								 uint32_t given_denominator,
+								 uint32_t max_numerator,
+								 uint32_t max_denominator,
+								 uint32_t *best_numerator,
+								 uint32_t *best_denominator);
+
+/**
+ * @brief 计算8位值的汉明重量（置位数）
+ * @param word 输入值
+ * @return 汉明重量
+ */
+uint32_t hweight8(uint32_t word);
+
+/**
+ * @brief 计算整数除法的商和余数
+ * @param n 被除数指针
+ * @param base 除数
+ * @return 商
+ */
+uint64_t do_div(uint64_t *n,
+				uint64_t base);
+
+/**
+ * @brief 无符号64位除法（64位除数，带余数）
+ * @param dividend 被除数
+ * @param divisor 除数
+ * @param remainder 余数结果
+ * @return 商
+ */
+uint64_t div64_u64_rem(uint64_t dividend, uint64_t divisor,
+					   uint64_t *remainder);
+
+/**
+ * @brief 无符号64位除法（32位除数，带余数）
+ * @param dividend 被除数
+ * @param divisor 除数
+ * @param remainder 余数结果
+ * @return 商
+ */
+uint64_t div_u64_rem(uint64_t dividend, uint32_t divisor, uint32_t *remainder);
+
+/**
+ * @brief 有符号64位除法（带余数）
+ * @param dividend 被除数
+ * @param divisor 除数
+ * @param remainder 余数结果
+ * @return 商
+ */
+int64_t div_s64_rem(int64_t dividend, int32_t divisor, int32_t *remainder);
+
+/**
+ * @brief 无符号64位除法
+ * @param dividend 被除数
+ * @param divisor 除数
+ * @return 商
+ */
+uint64_t div_u64(uint64_t dividend, uint32_t divisor);
+
+/**
+ * @brief 有符号64位除法
+ * @param dividend 被除数
+ * @param divisor 除数
+ * @return 商
+ */
+int64_t div_s64(int64_t dividend, int32_t divisor);
+
+/**
+ * @brief 将字符串转换为32位有符号整数
+ * @param str 输入字符串
+ * @return 32位有符号整数
+ */
+int32_t str_to_int32(const char *str);
+
+/**
+ * @brief 将字符串转换为32位无符号整数
+ * @param str 输入字符串
+ * @return 32位无符号整数
+ */
+uint32_t srt_to_uint32(const char *str);
+
+/**
+ * @brief 生成CRC16校验值
+ * @param buffPtr 数据缓冲区指针
+ * @param dataLen 数据长度
+ * @param poly 多项式
+ * @param crcVal CRC值结果
+ * @return 操作状态
+ */
+int crc16_gen(uint8_t *buffPtr, uint32_t dataLen, uint16_t poly, uint16_t *crcVal);
+
+/**
+ * @brief 检查CRC16校验
+ * @param buffPtr 数据缓冲区指针
+ * @param dataLen 数据长度
+ * @param crcOffset CRC偏移量
+ * @param poly 多项式
+ * @return 校验结果
+ */
+bool crc16_check(uint8_t *buffPtr, uint32_t dataLen, uint32_t crcOffset, uint16_t poly);
+
+/**
+ * @brief 生成CRC8校验值
+ * @param buffPtr 数据缓冲区指针
+ * @param dataLen 数据长度
+ * @param poly 多项式
+ * @param crcVal CRC值结果
+ * @return 操作状态
+ */
+int crc8_gen(uint8_t *buffPtr, uint32_t dataLen, uint16_t poly, uint8_t *crcVal);
+
+/**
+ * @brief 检查CRC8校验
+ * @param buffPtr 数据缓冲区指针
+ * @param dataLen 数据长度
+ * @param crcOffset CRC偏移量
+ * @param poly 多项式
+ * @return 校验结果
+ */
+bool crc8_check(uint8_t *buffPtr, uint32_t dataLen, uint32_t crcOffset, uint16_t poly);
+#endif // __UTIL_H_
+
+/** @} */

dj_f1_ad9371/vitis_classic_autobuild/source/tp_app.c

@@ -0,0 +1,41 @@
+// Standard
+#include <stdlib.h>
+#include <stdint.h>
+#include <stdbool.h>
+// Xilinx
+#include "sleep.h"
+#include "xil_cache.h"
+#include "xscugic.h"
+#include "xscutimer.h"
+#include "xgpiops.h"
+#include "drivers/platform/xilinx_irq.h"
+#include "drivers/platform/xilinx_timer.h"
+// App
+#include "common.h"
+#include "error.h"
+#include "timer.h"
+#include "tp_app_config.h"
+#include "tp_dev_profile/dev_profile.h"
+// RF-Driver
+#include "tp_hardware/headless.h"
+
+/************************** Constant Definitions *****************************/
+
+/************************** Function Prototypes ******************************/
+
+int main(void)
+{
+	int32_t status;
+	DBG_PRINT("Application Version: %2d.%2d.%4d.\n", _APP_VER_MAIN, _APP_VER_MINOR, _APP_VER_PATCH);
+
+	status = HARDWARE_initialize();
+	if (status == SUCCESS)
+	{
+		DBG_PRINT("Hardware Init SUCCESS! \n");
+	}
+	else
+	{
+		DBG_PRINT("Hardware Init FAILED! \n");
+		return status;
+	}
+} // main

dj_f1_ad9371/vitis_classic_autobuild/source/tp_app_config.h

@@ -0,0 +1,44 @@
+#ifndef __TP_APP_CONFIG_H_
+#define __TP_APP_CONFIG_H_
+
+#define XILINX_PLATFORM
+
+#include "xparameters.h"
+
+/******** Software Version ********/
+#define _APP_NAME	"dfdl_tp (DF Datalink Testplatform Application)"
+#define _APP_VER	0x00010008
+
+#define _APP_VER_MAIN	((_APP_VER & 0xFF000000) >> 24)
+#define _APP_VER_MINOR	((_APP_VER & 0x00FF0000) >> 16)
+#define _APP_VER_PATCH	(_APP_VER & 0x0000FFFF)
+
+/*********** Debug Info Level ************/
+// _DEBUG_LEVEL 1
+// 3 - print all debug info
+// 2 - print warnings and errors
+// 1 - print only errors
+// other - print nothing
+
+/************ Hardware Configs ************/
+#define CPU_CLK_HZ 			XPAR_CPU_CORTEXA9_0_CPU_CLK_FREQ_HZ
+#define GLOBAL_TIMER_CLK_HZ (CPU_CLK_HZ/2)
+#define SCU_TIMER_CLK_HZ 	(CPU_CLK_HZ/2)
+#define FCLK_CLK0_HZ 		100000000
+
+/********* Zynq Platform Configs **********/
+// SCU Timer (for logging)
+#define SCUTIMER_DEVICE_ID XPAR_PS7_SCUTIMER_0_DEVICE_ID
+#define SCUTIMER_INTR_ID XPAR_SCUTIMER_INTR
+
+// -- Xadc
+#define PHY_HW_XADC_DEVICE_ID XPAR_PS7_XADC_0_DEVICE_ID
+
+// Global Timer config
+#define GLOBAL_TIMER_DEVICE_ID	XPAR_GLOBAL_TMR_DEVICE_ID
+#define GLOBAL_TIMER_BASEADDR	XPAR_GLOBAL_TMR_BASEADDR
+#define GLOBAL_TIMER_INTR_ID	XPAR_GLOBAL_TMR_INTR
+
+// INTC configis
+#define INTC_DEVICE_ID XPAR_SCUGIC_0_DEVICE_ID
+#endif // __TP_APP_CONFIG_H_

dj_f1_ad9371/vitis_classic_autobuild/source/tp_dev_profile/dev_profile.h

@@ -0,0 +1,12 @@
+#ifndef _DEV_PROFILE_H_
+#define _DEV_PROFILE_H_
+
+#include "irq.h"
+#include "error.h"
+
+// device parameters
+extern struct irq_init_param intc_init_param;
+extern struct timer_init_param scutimer_init_param;
+extern struct global_timer_init_param globaltimer_init_param;
+
+#endif /* SRC_DEV_PROFILE_H_ */

dj_f1_ad9371/vitis_classic_autobuild/source/tp_dev_profile/global_timer_profile.c

@@ -0,0 +1,11 @@
+#include "dev_profile.h"
+#include "global_timer.h"
+#include "tp_app_config.h"
+
+struct global_timer_init_param globaltimer_init_param = {
+	.base_addr = GLOBAL_TIMER_BASEADDR,
+	.id = GLOBAL_TIMER_DEVICE_ID,
+	.freq_hz = GLOBAL_TIMER_CLK_HZ,
+	.load_value = 0x0000000000000000
+};
+

dj_f1_ad9371/vitis_classic_autobuild/source/tp_dev_profile/intc_profile.c

@@ -0,0 +1,14 @@
+#include "dev_profile.h"
+#include "irq.h"
+#include "tp_app_config.h"
+#include "drivers/platform/xilinx_irq.h"
+
+struct xil_irq_init_param xil_intc_init_param = {
+	.type = IRQ_PS
+};
+
+struct irq_init_param intc_init_param = {
+	.irq_ctrl_id = INTC_DEVICE_ID,
+	.platform_ops = &xil_irq_ops,
+	.extra = &xil_intc_init_param
+};

dj_f1_ad9371/vitis_classic_autobuild/source/tp_dev_profile/timer_profile.c

@@ -0,0 +1,17 @@
+#include "dev_profile.h"
+#include "timer.h"
+#include "tp_app_config.h"
+#include "drivers/platform/xilinx_timer.h"
+
+struct xil_timer_init_param xil_scutimer_init_param = {
+	.active_tmr = 0,
+	.type = TIMER_PS
+};
+
+struct timer_init_param scutimer_init_param = {
+	.id = SCUTIMER_DEVICE_ID,
+	.freq_hz = SCU_TIMER_CLK_HZ,
+	.ticks_count = (SCU_TIMER_CLK_HZ/10), //update log every 100ms
+	.platform_ops = &xil_timer_ops,
+	.extra = &xil_scutimer_init_param
+};

dj_f1_ad9371/vitis_classic_autobuild/source/tp_hardware/headless.c

@@ -0,0 +1,944 @@
+/**
+ *   @file   ad9371/src/app/headless.c
+ *   @brief  Implementation of Main Function.
+ ********************************************************************************
+ * Copyright 2017(c) Analog Devices, Inc.
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *  - Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *  - Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *  - Neither the name of Analog Devices, Inc. nor the names of its
+ *    contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *  - The use of this software may or may not infringe the patent rights
+ *    of one or more patent holders.  This license does not release you
+ *    from the requirement that you obtain separate licenses from these
+ *    patent holders to use this software.
+ *  - Use of the software either in source or binary form, must be run
+ *    on or directly connected to an Analog Devices Inc. component.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT,
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, INTELLECTUAL PROPERTY RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *******************************************************************************/
+
+/***************************** Include Files ********************************/
+#include <stdbool.h>
+#include "headless.h"
+#include "delay.h"
+
+
+/************************** Variable Definitions *****************************/
+XScuGic Intc;
+
+#include "xparameters.h"
+#include "xil_io.h"
+#define JESDPHY_READ(addr) Xil_In32(XPAR_JESD204B_JESD204_PHY_BASEADDR + (addr))
+#define JESDRX_READ(addr) Xil_In32(XPAR_JESD204B_JESD204_RX_BASEADDR + (addr))
+#define JESDTX_READ(addr) Xil_In32(XPAR_JESD204B_JESD204_TX_BASEADDR + (addr))
+#define JESDRX_WRITE(addr, value) Xil_Out32(XPAR_JESD204B_JESD204_RX_BASEADDR + (addr), value)
+#define JESDTX_WRITE(addr, value) Xil_Out32(XPAR_JESD204B_JESD204_TX_BASEADDR + (addr), value)
+
+/************************** Function Prototypes ******************************/
+
+int HARDWARE_initialize()
+{
+	int status;
+
+	// use configuration
+	mykDevice.rx->rxPllLoFrequency_Hz = 2500000000u;
+	mykDevice.tx->txPllLoFrequency_Hz = 2500000000u;
+	mykDevice.tx->tx1Atten_mdB = 20000;
+	mykDevice.tx->tx2Atten_mdB = 20000;
+
+	status = HARDWARE_ad9371Config();
+
+	if (status != ADIERR_OK)
+	{
+		return ADIERR_FAILED;
+	}
+
+	return ADIERR_OK;
+}
+
+// this function is NOT safe
+int HARDWARE_ad9371Config(void)
+{
+	int status;
+	uint8_t framerStatus;
+	uint8_t obsFramerStatus;
+	uint8_t deframerStatus;
+
+	/**********************************************************/
+	/*********** Initialize Configuration Interface ***********/
+	/**********************************************************/
+	status = CMB_initPlatform();
+	if (status != ADIERR_OK)
+	{
+		return ADIERR_FAILED;
+	}
+
+	status = HW_adiCfgProfileInit();
+	if (status != ADIERR_OK)
+	{
+		return ADIERR_FAILED;
+	}
+
+	HW_PRINT("HW:: Initialize configuration interface done!\n");
+
+	/**********************************************************/
+	/****************** AD9528 Configuration ******************/
+	/**********************************************************/
+	status = HW_9528Config(ad9528Init);
+	if (status != ADIERR_OK)
+	{
+		return ADIERR_FAILED;
+	}
+
+	HW_PRINT("HW:: AD9528 configuration done!\n");
+
+	uint8_t reg = 0;
+	status = HW_9528GetLockStatus(ad9528Init, &reg);
+	if (status != ADIERR_OK)
+	{
+		return ADIERR_FAILED;
+	}
+
+	HW_PRINT("HW:: AD9528 REG508: 0x%02x\n", reg);
+
+	/**********************************************************/
+	/****************** AD9371 Configuration ******************/
+	/**********************************************************/
+	JESDTX_WRITE(0x004, 0x00010000);
+	JESDRX_WRITE(0x004, 0x00010000);
+
+	status = HW_9371Config(ad9528Init, &mykDevice);
+	if (status != ADIERR_OK)
+	{
+		return ADIERR_FAILED;
+	}
+
+	status = HW_9371Config(ad9528Init, &mykDevice);
+	if (status != ADIERR_OK)
+	{
+		return ADIERR_FAILED;
+	}
+
+	uint32_t linkErrRx;
+	uint32_t linkErrTx;
+
+	while (true)
+	{
+		mdelay(1000);
+
+		status = HW_9371CheckJesdStatus(&mykDevice, &framerStatus,
+										&obsFramerStatus, &deframerStatus);
+		if (status != ADIERR_OK)
+		{
+			return ADIERR_FAILED;
+		}
+		else
+		{
+			// typical value: 0x3E
+			HW_PRINT("HW:: RxFramerStatus = 0x%x\n", framerStatus);
+			// typical value: 0x3E
+			HW_PRINT("HW:: OrxFramerStatus = 0x%x\n", obsFramerStatus);
+			// typical value: 0x28
+			HW_PRINT("HW:: DeframerStatus = 0x%x\n", deframerStatus);
+		}
+		linkErrRx = JESDRX_READ(0x01C);
+		linkErrTx = JESDTX_READ(0x01C);
+
+//		JESDTX_WRITE(0x004, 0x00010001);
+//		JESDRX_WRITE(0x004, 0x00010001);
+	}
+
+	// never reach
+	HW_PRINT("HW:: All configuration done!\n");
+
+	return ADIERR_OK;
+}
+
+
+/*****************************************************************************/
+/*
+ *
+ * This function setups the interrupt system.
+ *
+ * @param	DeviceId is the unique identifier for a GIC device.
+ * @param    GicPtr is a pointer to the instance of the INTC.
+ *
+ * @return
+ *       - XST_SUCCESS if successful,
+ *       - XST_FAILURE.if not succesful
+ *
+ * @note     None.
+ *
+ ******************************************************************************/
+int HW_setupIntrSystem(u16 DeviceId, XScuGic *GicPtr)
+{
+	int status;
+	XScuGic_Config *CfgPtr;
+
+	/*
+	 * Initialize the interrupt controller driver so that it is ready to
+	 * use.
+	 */
+	CfgPtr = XScuGic_LookupConfig(DeviceId);
+	if (!CfgPtr)
+	{
+		HW_PRINT("No interrupt config found for %d\n", DeviceId);
+		return XST_FAILURE;
+	}
+
+	status = XScuGic_CfgInitialize(GicPtr, CfgPtr, CfgPtr->CpuBaseAddress);
+	if (status != XST_SUCCESS)
+	{
+		HW_PRINT("No interrupt config found for %d\n", DeviceId);
+		return XST_FAILURE;
+	}
+
+	Xil_ExceptionInit();
+	Xil_ExceptionRegisterHandler(XIL_EXCEPTION_ID_INT,
+								 (Xil_ExceptionHandler)XScuGic_InterruptHandler,
+								 (void *)GicPtr);
+	Xil_ExceptionEnable();
+
+	return XST_SUCCESS;
+}
+
+int HW_connectIntr(XScuGic *GicPtr, u32 IntrId, Xil_InterruptHandler Handler,
+				   void *CallBackRef, u8 Priority, u8 Trigger)
+{
+	int status;
+	// Register interrupt handler
+	status = XScuGic_Connect(GicPtr, IntrId, (Xil_InterruptHandler)Handler,
+							 CallBackRef);
+	if (status != XST_SUCCESS)
+	{
+		return XST_FAILURE;
+	}
+	XScuGic_SetPriorityTriggerType(GicPtr, IntrId, Priority, Trigger);
+
+	XScuGic_Enable(GicPtr, IntrId);
+
+	return XST_SUCCESS;
+}
+
+int HW_adiCfgProfileInit(void)
+{
+	if (!ad9528Init)
+	{
+		HW_PRINT("Cannot find ad9528 configuration profile with name 'ad9528Init'!");
+		return ADIERR_FAILED;
+	}
+
+	mykDevice.rx->framer->serializerLanesEnabled = 0x03;
+	mykDevice.rx->framer->serializerLaneCrossbar = 0xE4;
+	mykDevice.obsRx->framer->serializerLanesEnabled = 0x04;
+	mykDevice.tx->deframer->deserializerLanesEnabled = 0x03;
+	mykDevice.tx->deframer->deserializerLaneCrossbar = 0xE4;
+
+	return ADIERR_OK;
+}
+
+int HW_9528Config(ad9528Device_t *clockAD9528_device)
+{
+	ADI_ERR error;
+	/**************************************************************************/
+	/*****      System Clocks Initialization Initialization Sequence      *****/
+	/**************************************************************************/
+
+	/* Perform a hard reset on the AD9528 DUT */
+	error = AD9528_resetDevice(clockAD9528_device);
+	if (error != ADIERR_OK)
+	{
+		HW_PRINT("AD9528_resetDevice() failed\n");
+		return ADIERR_FAILED;
+	}
+
+	/* Initialize the AD9528 by writing all SPI registers */
+	error = AD9528_initialize(clockAD9528_device);
+	if (error != ADIERR_OK)
+	{
+		HW_PRINT("WARNING: AD9528_initialize() issues.\n");
+	}
+
+	return ADIERR_OK;
+}
+
+int HW_9528GetLockStatus(ad9528Device_t *device, uint8_t *reg508)
+{
+	ADI_ERR error;
+
+	error = CMB_SPIReadByte(device->spiSettings, AD9528_ADDR_STATUS_READBACK0, reg508);
+	if (error != ADIERR_OK)
+	{
+		HW_PRINT("HW_9528GetLockStatus failed.\n");
+		return ADIERR_FAILED;
+	}
+
+	return ADIERR_OK;
+}
+
+int HW_9371Config(ad9528Device_t *clockAD9528_device, mykonosDevice_t *mykDevice)
+{
+	ADI_ERR error;
+	mykonosErr_t mykError;
+	const char *errorString;
+	uint8_t pllLockStatus;
+	uint8_t mcsStatus;
+	uint8_t arm_major;
+	uint8_t arm_minor;
+	uint8_t arm_release;
+	uint32_t initCalMask = TX_BB_FILTER | ADC_TUNER | TIA_3DB_CORNER | DC_OFFSET |
+						   TX_ATTENUATION_DELAY | RX_GAIN_DELAY | FLASH_CAL |
+						   PATH_DELAY | TX_LO_LEAKAGE_INTERNAL | TX_QEC_INIT |
+						   LOOPBACK_RX_LO_DELAY | LOOPBACK_RX_RX_QEC_INIT |
+						   RX_LO_DELAY | RX_QEC_INIT;
+	uint8_t errorFlag = 0;
+	uint8_t errorCode = 0;
+	uint32_t initCalsCompleted;
+	uint32_t trackingCalMask = TRACK_ORX1_QEC | TRACK_ORX2_QEC | TRACK_RX1_QEC |
+							   TRACK_RX2_QEC | TRACK_TX1_QEC | TRACK_TX2_QEC;
+
+	/*************************************************************************/
+	/*****                Mykonos Initialization Sequence                *****/
+	/*************************************************************************/
+
+	/* Perform a hard reset on the MYKONOS DUT (Toggle RESETB pin on device) */
+	if ((mykError = MYKONOS_resetDevice(mykDevice)) != MYKONOS_ERR_OK)
+	{
+		errorString = getMykonosErrorMessage(mykError);
+		goto error_11;
+	}
+
+	if ((mykError = MYKONOS_initialize(mykDevice)) != MYKONOS_ERR_OK)
+	{
+		errorString = getMykonosErrorMessage(mykError);
+		goto error_11;
+	}
+
+	/*************************************************************************/
+	/*****                Mykonos CLKPLL Status Check                    *****/
+	/*************************************************************************/
+
+	if ((mykError = MYKONOS_checkPllsLockStatus(mykDevice,
+												&pllLockStatus)) != MYKONOS_ERR_OK)
+	{
+		errorString = getMykonosErrorMessage(mykError);
+		goto error_11;
+	}
+
+	/*************************************************************************/
+	/*****                Mykonos Perform MultiChip Sync                 *****/
+	/*************************************************************************/
+
+	if ((mykError = MYKONOS_enableMultichipSync(mykDevice, 1,
+												&mcsStatus)) != MYKONOS_ERR_OK)
+	{
+		errorString = getMykonosErrorMessage(mykError);
+		goto error_11;
+	}
+
+	/* Minimum 3 SYSREF pulses from Clock Device has to be produced for MulticChip Sync */
+
+	AD9528_requestSysref(clockAD9528_device, 1);
+	mdelay(1);
+	AD9528_requestSysref(clockAD9528_device, 1);
+	mdelay(1);
+	AD9528_requestSysref(clockAD9528_device, 1);
+	mdelay(1);
+	AD9528_requestSysref(clockAD9528_device, 1);
+	mdelay(1);
+
+	/*************************************************************************/
+	/*****                Mykonos Verify MultiChip Sync                 *****/
+	/*************************************************************************/
+
+	if ((mykError = MYKONOS_enableMultichipSync(mykDevice, 0,
+												&mcsStatus)) != MYKONOS_ERR_OK)
+	{
+		errorString = getMykonosErrorMessage(mykError);
+		goto error_11;
+	}
+
+	if ((mcsStatus & 0x0B) == 0x0B)
+		HW_PRINT("MCS successful\n");
+	else
+		HW_PRINT("MCS failed\n");
+
+	/*************************************************************************/
+	/*****                Mykonos Load ARM file                          *****/
+	/*************************************************************************/
+
+	if (pllLockStatus & 0x01)
+	{
+		HW_PRINT("CLKPLL locked\n");
+		if ((mykError = MYKONOS_initArm(mykDevice)) != MYKONOS_ERR_OK)
+		{
+			errorString = getMykonosErrorMessage(mykError);
+			goto error_11;
+		}
+
+		if ((mykError = MYKONOS_loadArmFromBinary(mykDevice,
+												  &firmware_Mykonos_M3_bin[0], firmware_Mykonos_M3_bin_len)) != MYKONOS_ERR_OK)
+		{
+			errorString = getMykonosErrorMessage(mykError);
+			goto error_11;
+		}
+	}
+	else
+	{
+		HW_PRINT("CLKPLL not locked (0x%x)\n", pllLockStatus);
+		error = ADIERR_FAILED;
+		goto error_2;
+	}
+
+	/* Read back the version of the ARM binary loaded into the Mykonos ARM memory */
+	if ((mykError = MYKONOS_getArmVersion(mykDevice, &arm_major, &arm_minor,
+										  &arm_release, NULL)) == MYKONOS_ERR_OK)
+		HW_PRINT("AD9371 ARM version %d.%d.%d\n", arm_major, arm_minor, arm_release);
+
+	/*************************************************************************/
+	/*****                Mykonos Set RF PLL Frequencies                 *****/
+	/*************************************************************************/
+
+	if ((mykError = MYKONOS_setRfPllFrequency(mykDevice, RX_PLL,
+											  mykDevice->rx->rxPllLoFrequency_Hz)) != MYKONOS_ERR_OK)
+	{
+		errorString = getMykonosErrorMessage(mykError);
+		goto error_11;
+	}
+
+	if ((mykError = MYKONOS_setRfPllFrequency(mykDevice, TX_PLL,
+											  mykDevice->tx->txPllLoFrequency_Hz)) != MYKONOS_ERR_OK)
+	{
+		errorString = getMykonosErrorMessage(mykError);
+		goto error_11;
+	}
+
+	if ((mykError = MYKONOS_setRfPllFrequency(mykDevice, SNIFFER_PLL,
+											  mykDevice->obsRx->snifferPllLoFrequency_Hz)) != MYKONOS_ERR_OK)
+	{
+		errorString = getMykonosErrorMessage(mykError);
+		goto error_11;
+	}
+
+	/* Wait 200ms for PLLs to lock */
+	mdelay(200);
+
+	if ((mykError = MYKONOS_checkPllsLockStatus(mykDevice,
+												&pllLockStatus)) != MYKONOS_ERR_OK)
+	{
+		errorString = getMykonosErrorMessage(mykError);
+		goto error_11;
+	}
+
+	if ((pllLockStatus & 0x0F) == 0x0F)
+		HW_PRINT("PLLs locked\n");
+	else
+	{
+		HW_PRINT("PLLs not locked (0x%x)\n", pllLockStatus);
+		error = ADIERR_FAILED;
+		goto error_2;
+	}
+
+	//	/*************************************************************************/
+	//	/*****                Mykonos Set GPIOs                              *****/
+	//	/*************************************************************************/
+	//
+	//	if ((mykGpioErr = MYKONOS_setRx1GainCtrlPin(mykDevice, 0, 0, 0, 0,
+	//			  0)) != MYKONOS_ERR_GPIO_OK) {
+	//		errorString = getGpioMykonosErrorMessage(mykGpioErr);
+	//		goto error_11;
+	//	}
+	//
+	//	if ((mykGpioErr = MYKONOS_setRx2GainCtrlPin(mykDevice, 0, 0, 0, 0,
+	//			  0)) != MYKONOS_ERR_GPIO_OK) {
+	//		errorString = getGpioMykonosErrorMessage(mykGpioErr);
+	//		goto error_11;
+	//	}
+	//
+	//	if ((mykGpioErr = MYKONOS_setTx1AttenCtrlPin(mykDevice, 0, 0, 0, 0,
+	//			  0)) != MYKONOS_ERR_GPIO_OK) {
+	//		errorString = getGpioMykonosErrorMessage(mykGpioErr);
+	//		goto error_11;
+	//	}
+	//
+	//	if ((mykGpioErr = MYKONOS_setTx2AttenCtrlPin(mykDevice, 0, 0, 0,
+	//			  0)) != MYKONOS_ERR_GPIO_OK) {
+	//		errorString = getGpioMykonosErrorMessage(mykGpioErr);
+	//		goto error_11;
+	//	}
+	//
+	//	if ((mykGpioErr = MYKONOS_setupGpio(mykDevice)) != MYKONOS_ERR_GPIO_OK) {
+	//		errorString = getGpioMykonosErrorMessage(mykGpioErr);
+	//		goto error_11;
+	//	}
+	//
+	//	/*************************************************************************/
+	//	/*****                Mykonos Set manual gains values                *****/
+	//	/*************************************************************************/
+	//
+	//	if ((mykError = MYKONOS_setRx1ManualGain(mykDevice, 255)) != MYKONOS_ERR_OK) {
+	//		errorString = getMykonosErrorMessage(mykError);
+	//		goto error_11;
+	//	}
+	//
+	//	if ((mykError = MYKONOS_setRx2ManualGain(mykDevice, 255)) != MYKONOS_ERR_OK) {
+	//		errorString = getMykonosErrorMessage(mykError);
+	//		goto error_11;
+	//	}
+	//
+	//	if ((mykError = MYKONOS_setObsRxManualGain(mykDevice, OBS_RX1_TXLO,
+	//			255)) != MYKONOS_ERR_OK) {
+	//		errorString = getMykonosErrorMessage(mykError);
+	//		goto error_11;
+	//	}
+	//
+	//	if ((mykError = MYKONOS_setObsRxManualGain(mykDevice, OBS_RX2_TXLO,
+	//			255)) != MYKONOS_ERR_OK) {
+	//		errorString = getMykonosErrorMessage(mykError);
+	//		goto error_11;
+	//	}
+	//
+	//	if ((mykError = MYKONOS_setObsRxManualGain(mykDevice, OBS_SNIFFER_A,
+	//			255)) != MYKONOS_ERR_OK) {
+	//		errorString = getMykonosErrorMessage(mykError);
+	//		goto error_11;
+	//	}
+	//
+	//	if ((mykError = MYKONOS_setObsRxManualGain(mykDevice, OBS_SNIFFER_B,
+	//			255)) != MYKONOS_ERR_OK) {
+	//		errorString = getMykonosErrorMessage(mykError);
+	//		goto error_11;
+	//	}
+	//
+	//	if ((mykError = MYKONOS_setObsRxManualGain(mykDevice, OBS_SNIFFER_C,
+	//			255)) != MYKONOS_ERR_OK) {
+	//		errorString = getMykonosErrorMessage(mykError);
+	//		goto error_11;
+	//	}
+	//
+	//	/*************************************************************************/
+	//	/*****                Mykonos Initialize attenuations                *****/
+	//	/*************************************************************************/
+	//
+	//	mykError = MYKONOS_setTx1Attenuation(mykDevice, 10000);
+	//	if (mykError != MYKONOS_ERR_OK) {
+	//		errorString = getMykonosErrorMessage(mykError);
+	//		goto error_11;
+	//	}
+	//
+	//	mykError = MYKONOS_setTx2Attenuation(mykDevice, 10000);
+	//	if (mykError != MYKONOS_ERR_OK) {
+	//		errorString = getMykonosErrorMessage(mykError);
+	//		goto error_11;
+	//	}
+
+	/*************************************************************************/
+	/*****           Mykonos ARM Initialization Calibrations             *****/
+	/*************************************************************************/
+
+	if ((mykError = MYKONOS_runInitCals(mykDevice,
+										(initCalMask & ~TX_LO_LEAKAGE_EXTERNAL))) != MYKONOS_ERR_OK)
+	{
+		errorString = getMykonosErrorMessage(mykError);
+		goto error_11;
+	}
+
+	if ((mykError = MYKONOS_waitInitCals(mykDevice, 60000, &errorFlag,
+										 &errorCode)) != MYKONOS_ERR_OK)
+	{
+		errorString = getMykonosErrorMessage(mykError);
+		goto error_11;
+	}
+
+	if ((errorFlag != 0) || (errorCode != 0))
+	{
+		/*** < Info: abort init cals > ***/
+		if ((mykError = MYKONOS_abortInitCals(mykDevice,
+											  &initCalsCompleted)) != MYKONOS_ERR_OK)
+		{
+			errorString = getMykonosErrorMessage(mykError);
+			goto error_11;
+		}
+		if (initCalsCompleted)
+			HW_PRINT("Completed calibrations: %x\n", (unsigned int)initCalsCompleted);
+	}
+	else
+		HW_PRINT("Calibrations completed successfully\n");
+
+	/*************************************************************************/
+	/*****  Mykonos ARM Initialization External LOL Calibrations with PA *****/
+	/*************************************************************************/
+
+	/* Please ensure PA is enabled operational at this time */
+	if (initCalMask & TX_LO_LEAKAGE_EXTERNAL)
+	{
+		if ((mykError = MYKONOS_runInitCals(mykDevice,
+											TX_LO_LEAKAGE_EXTERNAL)) != MYKONOS_ERR_OK)
+		{
+			errorString = getMykonosErrorMessage(mykError);
+			goto error_11;
+		}
+
+		if ((mykError = MYKONOS_waitInitCals(mykDevice, 60000, &errorFlag,
+											 &errorCode)) != MYKONOS_ERR_OK)
+		{
+			errorString = getMykonosErrorMessage(mykError);
+			goto error_11;
+		}
+
+		if ((errorFlag != 0) || (errorCode != 0))
+		{
+			/*** < Info: abort init cals > ***/
+			if ((mykError = MYKONOS_abortInitCals(mykDevice,
+												  &initCalsCompleted)) != MYKONOS_ERR_OK)
+			{
+				errorString = getMykonosErrorMessage(mykError);
+				goto error_11;
+			}
+		}
+		else
+			HW_PRINT("External LOL Calibrations completed successfully\n");
+	}
+
+	/*************************************************************************/
+	/*****             SYSTEM JESD bring up procedure                    *****/
+	/*************************************************************************/
+
+	if ((mykError = MYKONOS_enableSysrefToRxFramer(mykDevice,
+												   1)) != MYKONOS_ERR_OK)
+	{
+		errorString = getMykonosErrorMessage(mykError);
+		goto error_11;
+	}
+	/*** < Info: Mykonos is waiting for sysref in order to start
+	 * transmitting CGS from the RxFramer> ***/
+
+	if ((mykError = MYKONOS_enableSysrefToObsRxFramer(mykDevice,
+													  1)) != MYKONOS_ERR_OK)
+	{
+		errorString = getMykonosErrorMessage(mykError);
+		goto error_11;
+	}
+	/*** < Info: Mykonos is waiting for sysref in order to start
+	 * transmitting CGS from the ObsRxFramer> ***/
+
+	if ((mykError = MYKONOS_enableSysrefToDeframer(mykDevice,
+												   0)) != MYKONOS_ERR_OK)
+	{
+		errorString = getMykonosErrorMessage(mykError);
+		goto error_11;
+	}
+
+	if ((mykError = MYKONOS_resetDeframer(mykDevice)) != MYKONOS_ERR_OK)
+	{
+		errorString = getMykonosErrorMessage(mykError);
+		goto error_11;
+	}
+
+	if ((mykError = MYKONOS_enableSysrefToDeframer(mykDevice, 1)) != MYKONOS_ERR_OK)
+	{
+		errorString = getMykonosErrorMessage(mykError);
+		goto error_11;
+	}
+
+	/*************************************************************************/
+	/*****            Enable SYSREF to Mykonos and BBIC                  *****/
+	/*************************************************************************/
+
+	/* Request a SYSREF from the AD9528 */
+	AD9528_requestSysref(clockAD9528_device, 1);
+	mdelay(1);
+
+	/*** < Info: Mykonos is actively transmitting CGS from the RxFramer> ***/
+
+	/*** < Info: Mykonos is actively transmitting CGS from the ObsRxFramer> ***/
+
+	/* Request two SYSREFs from the AD9528 */
+	AD9528_requestSysref(clockAD9528_device, 1);
+	mdelay(1);
+	AD9528_requestSysref(clockAD9528_device, 1);
+	mdelay(5);
+
+	/*************************************************************************/
+	/*****           Mykonos enable tracking calibrations                *****/
+	/*************************************************************************/
+
+	if ((mykError = MYKONOS_enableTrackingCals(mykDevice,
+											   trackingCalMask)) != MYKONOS_ERR_OK)
+	{
+		errorString = getMykonosErrorMessage(mykError);
+		goto error_11;
+	}
+
+	/*** < Info: Allow Rx1/2 QEC tracking and Tx1/2 QEC tracking to run when in the radioOn state
+	 *  Tx calibrations will only run if radioOn and the obsRx path is set to OBS_INTERNAL_CALS > ***/
+
+	/*** < Info: Function to turn radio on, Enables transmitters and receivers
+	 * that were setup during MYKONOS_initialize() > ***/
+	if ((mykError = MYKONOS_radioOn(mykDevice)) != MYKONOS_ERR_OK)
+	{
+		errorString = getMykonosErrorMessage(mykError);
+		goto error_11;
+	}
+
+	/*** < Info: Allow TxQEC to run when User: is not actively using ORx receive path > ***/
+	if ((mykError = MYKONOS_setObsRxPathSource(mykDevice,
+											   OBS_RXOFF)) != MYKONOS_ERR_OK)
+	{
+		errorString = getMykonosErrorMessage(mykError);
+		goto error_11;
+	}
+	if ((mykError = MYKONOS_setObsRxPathSource(mykDevice,
+											   OBS_INTERNALCALS)) != MYKONOS_ERR_OK)
+	{
+		errorString = getMykonosErrorMessage(mykError);
+		goto error_11;
+	}
+
+	mdelay(1000);
+
+	if ((mykError = MYKONOS_setObsRxPathSource(mykDevice,
+											   OBS_RX1_SNIFFERLO)) != MYKONOS_ERR_OK)
+	{
+		errorString = getMykonosErrorMessage(mykError);
+		goto error_11;
+	}
+
+	Xil_DCacheInvalidateRange(DDR_MEM_BASEADDR + 0x800000, 16384 * 8);
+
+	HW_PRINT("Done\n");
+
+	return 0;
+
+error_11:
+	HW_PRINT("%s", errorString);
+
+error_2:
+	//	axi_clkgen_remove(rx_clkgen);
+	return error;
+}
+
+int HW_9371CheckJesdStatus(mykonosDevice_t *mykDevice, uint8_t *framerStatus,
+						   uint8_t *obsFramerStatus, uint8_t *deframerStatus)
+{
+	mykonosErr_t mykError;
+	const char *errorString = NULL;
+
+	/*************************************************************************/
+	/*****               Check Mykonos Framer Status                     *****/
+	/*************************************************************************/
+
+	if ((mykError = MYKONOS_readRxFramerStatus(mykDevice,
+											   framerStatus)) != MYKONOS_ERR_OK)
+	{
+		errorString = getMykonosErrorMessage(mykError);
+		return ADIERR_FAILED;
+	}
+	else
+	{
+		// typical value: 0x3E
+	}
+
+	if ((mykError = MYKONOS_readOrxFramerStatus(mykDevice,
+												obsFramerStatus)) != MYKONOS_ERR_OK)
+	{
+		errorString = getMykonosErrorMessage(mykError);
+		return ADIERR_FAILED;
+	}
+	else
+	{
+		// typical value: 0x3E
+	}
+
+	/*************************************************************************/
+	/*****               Check Mykonos Deframer Status                   *****/
+	/*************************************************************************/
+
+	if ((mykError = MYKONOS_readDeframerStatus(mykDevice,
+											   deframerStatus)) != MYKONOS_ERR_OK)
+	{
+		errorString = getMykonosErrorMessage(mykError);
+		return ADIERR_FAILED;
+	}
+	else
+	{
+		// typical value: 0x28
+	}
+
+	return ADIERR_OK;
+}
+
+int HW_9371SmallFrequencyChange(mykonosDevice_t *mykDevice, uint64_t freq_Hz)
+{
+	mykonosErr_t mykError = MYKONOS_ERR_OK;
+	uint8_t pllLockStatus = 0;
+	/*
+	 * Move the device into the radio off state.
+	 */
+	if ((mykError = MYKONOS_radioOff(mykDevice)) != MYKONOS_ERR_OK)
+	{
+		HW_PRINT("Turn radio off failed!\n\r");
+		return ADIERR_FAILED;
+	}
+
+	/*
+	 * Program the new local oscillator (LO) frequency. Check if PLL is locked.
+	 */
+	if ((mykError = MYKONOS_setRfPllFrequency(mykDevice, TX_PLL,
+											  freq_Hz)) != MYKONOS_ERR_OK)
+	{
+		HW_PRINT("Set TX PLL failed!\n\r");
+		return ADIERR_FAILED;
+	}
+	mykError = MYKONOS_checkPllsLockStatus(mykDevice, &pllLockStatus);
+	if ((pllLockStatus & 0x07) != 0x07)
+	{
+		/*** < Info: Clock, Rx and Tx PLLs not locked > ***/
+		HW_PRINT("Not all PLLs locked, lock status: 0x%02x\n", pllLockStatus);
+	}
+
+	/*
+	 * Reset the external channel.
+	 */
+	//	If((mykError = MYKONOS_resetExtTxLolChannel(mykDevice, TX1_TX2))
+	//		!= MYKONOS_ERR_OK) ; //where TX1_TX2 is part of the enum mykonosTxChannels_t
+	//	{
+	//		HW_PRINT("Reset external channel FAILED!");
+	//	}
+
+	/*
+	 * Move the device back into the radio on state.
+	 */
+	if ((mykError = MYKONOS_radioOn(mykDevice)) != MYKONOS_ERR_OK)
+	{
+		HW_PRINT("Turn radio on failed!\n\r");
+		return ADIERR_FAILED;
+	}
+
+	/*
+	 * Reenable tracking calibrations.
+	 */
+	//	If((mykError = MYKONOS_MYKONOS_setObsRxPathSource(mykDevice, OBS_INTERNALCALS))
+	//		!= MYKONOS_ERR_OK) ; //where TX1_TX2 is part of the enum mykonosTxChannels_t
+	//	{
+	//		HW_PRINT("Reenable tracking calibrations FAILED!");
+	//	}
+	return ADIERR_OK;
+}
+
+int HW_9371LargeFrequencyChange(mykonosDevice_t *mykDevice, uint64_t freq_Hz)
+{
+	mykonosErr_t mykError = MYKONOS_ERR_OK;
+	uint8_t pllLockStatus = 0;
+	uint8_t errorFlag = 0;
+	uint8_t errorCode = 0;
+	uint32_t initCalsCompleted = 0;
+	uint16_t errorWord = 0;
+	uint16_t statusWord = 0;
+	uint8_t status = 0;
+	mykonosInitCalStatus_t initCalStatus = {0};
+
+	/*
+	 * Move the device into the radio off state.
+	 */
+	if ((mykError = MYKONOS_radioOff(mykDevice)) != MYKONOS_ERR_OK)
+	{
+		HW_PRINT("Turn radio off failed!\n\r");
+		return ADIERR_FAILED;
+	}
+
+	/*
+	 * Program the new local oscillator (LO) frequency. Check if PLL is locked.
+	 */
+	if ((mykError = MYKONOS_setRfPllFrequency(mykDevice, TX_PLL,
+											  freq_Hz)) != MYKONOS_ERR_OK)
+	{
+		HW_PRINT("Set TX PLL failed!\n\r");
+		return ADIERR_FAILED;
+	}
+	mykError = MYKONOS_checkPllsLockStatus(mykDevice, &pllLockStatus);
+	if ((pllLockStatus & 0x07) != 0x07)
+	{
+		/*** < Info: Clock, Rx and Tx PLLs not locked > ***/
+		HW_PRINT("Not all PLLs locked, lock status: 0x%02x\n", pllLockStatus);
+	}
+
+	/*
+	 * Rerun the initialization calibrations.
+	 */
+	uint32_t initCalMask = TX_QEC_INIT | LOOPBACK_RX_LO_DELAY |
+						   LOOPBACK_RX_RX_QEC_INIT | RX_LO_DELAY | RX_QEC_INIT;
+	if ((mykError = MYKONOS_runInitCals(mykDevice, initCalMask)) != MYKONOS_ERR_OK)
+	{
+		HW_PRINT("Rerun the initialization calibrations FAILED!");
+		return ADIERR_FAILED;
+	}
+	if ((mykError = MYKONOS_waitInitCals(mykDevice, 60000, &errorFlag,
+										 &errorCode)) != MYKONOS_ERR_OK)
+	{
+		HW_PRINT("Initialize calibration TIME OUT!");
+		return ADIERR_FAILED;
+	}
+	if ((errorFlag != 0) || (errorCode != 0))
+	{
+		HW_PRINT("initial cals error!\n\r");
+
+		if ((mykError = MYKONOS_getInitCalStatus(mykDevice, &initCalStatus)) != MYKONOS_ERR_OK)
+		{
+			/*** < User log error return value to debug why init failed > ***/
+		}
+
+		// abort init calibrations
+		if ((mykError = MYKONOS_abortInitCals(mykDevice, &initCalsCompleted)) != MYKONOS_ERR_OK)
+		{
+			/*** < User log error return value to debug why init failed > ***/
+		}
+		if (initCalsCompleted)
+		{
+			/*** < which calls had completed, per the mask > ***/
+		}
+		if ((mykError = MYKONOS_readArmCmdStatus(mykDevice, &errorWord,
+												 &statusWord)) != MYKONOS_ERR_OK)
+		{
+			/*** < User log error return value to debug why init failed > ***/
+		}
+		if ((mykError = MYKONOS_readArmCmdStatusByte(mykDevice, 2, &status)) != MYKONOS_ERR_OK)
+		{
+		}
+		if (status != 0)
+		{
+			/*** < Arm Mailbox Status Error errorWord > ***/
+			/*** < Pending Flag per opcode statusWord, this follows the mask > ***/
+		}
+	}
+
+	/*
+	 * Move the device back into the radio on state.
+	 */
+	if ((mykError = MYKONOS_radioOn(mykDevice)) != MYKONOS_ERR_OK)
+	{
+		HW_PRINT("Turn radio on failed!\n\r");
+		return ADIERR_FAILED;
+	}
+
+	return ADIERR_OK;
+}

dj_f1_ad9371/vitis_classic_autobuild/source/tp_hardware/headless.h

@@ -0,0 +1,319 @@
+/*
+ * headless.h
+ *
+ *  Created on: 2021��6��8��
+ *      Author: Josh
+ */
+
+#ifndef SRC_HEADLESS_H_
+#define SRC_HEADLESS_H_
+
+/***************************** Include Files ********************************/
+#include <stdlib.h>
+#include <stdio.h>
+#include "xil_cache.h"
+#include "xscugic.h"
+//#include "xgpio.h"
+
+#include "tp_hardware/mykonos/ad9528.h"
+#include "tp_hardware/mykonos/mykonos.h"
+#include "tp_hardware/mykonos/Mykonos_M3.h"
+#include "tp_hardware/mykonos/mykonos_gpio.h"
+#include "hw_common.h"
+#include "myk_ad9528init.h"
+#include "myk_init.h"
+#include "parameters.h"
+
+/*
+*
+* This function setups ad9528 and ad9371 via spi.
+*
+* @param	None.
+*
+* @return
+*       - ADIERR_FAILED if successful,
+*       - ADIERR_OK if not succesful
+*
+* @note     None.
+*
+******************************************************************************/
+int HARDWARE_initialize();
+
+int HARDWARE_ad9371Config(void);
+
+/*****************************************************************************/
+/*
+*
+* Setup up interrupt system, initialize exception handlers.
+*
+* @param	DeviceId is the unique identifier for a device.
+* @param	GicPtr is a pointer to the XScuGic instance.
+*
+* @return
+*       - XST_SUCCESS if successful,
+*       - XST_FAILURE if not succesful
+*
+* @note     None.
+*
+******************************************************************************/
+int HW_setupIntrSystem(u16 DeviceId, XScuGic * GicPtr);
+
+/*****************************************************************************/
+/*
+*
+* Make the connection between the Int_Id of the interrupt source and the
+* associated handler. Set the interrupt priority and trigger type  for the
+* specified IRQ source..
+*
+* @param	GicPtr is a pointer to the XScuGic instance.
+* @param	Int_Id contains the ID of the interrupt source and should be
+*		in the range of 0 to XSCUGIC_MAX_NUM_INTR_INPUTS - 1
+* @param	Handler to the handler for that interrupt.
+* @param	CallBackRef is the callback reference, usually the instance
+*		pointer of the connecting driver.
+* @param	Priority is the new priority for the IRQ source. 0 is highest
+*           priority, 0xF8(248) is lowest. There are 32 priority levels
+*           supported with a step of 8. Hence the supported priorities are
+*           0, 8, 16, 32, 40 ..., 248.
+* @param	Trigger is the new trigger type for the IRQ source.
+* Each bit pair describes the configuration for an INT_ID.
+* SFI    Read Only    b10 always
+* PPI    Read Only    depending on how the PPIs are configured.
+*                    b01    Active HIGH level sensitive
+*                    b11 Rising edge sensitive
+* SPI                LSB is read only.
+*                    b01    Active HIGH level sensitive
+*                    b11 Rising edge sensitive/
+*
+* @return
+*       - XST_SUCCESS if successful,
+*       - XST_FAILURE if not succesful
+*
+* @note     None.
+*
+******************************************************************************/
+int HW_connectIntr(XScuGic *GicPtr,u32 IntrId,Xil_InterruptHandler Handler,
+		void *CallBackRef, u8 Priority, u8 Trigger);
+
+/*****************************************************************************/
+/*
+*
+* Initialize Analog Device related configuration profile. This is a HARDWARE-
+* ASSOTIATED function, which may differ between different board.
+*
+* @param	None.
+*
+* @return
+*       - ADIERR_OK if configuration profile exists,
+*       - ADIERR_FAILED if onfiguration profile does not exist
+*
+* @note     None.
+*
+******************************************************************************/
+int HW_adiCfgProfileInit(void);
+
+/******************************************************************************/
+/**
+*
+* This function conducts AD9528 device configuration initializing procedure.
+*
+* @param	clockAD9528_device is a pointer to the data structure holding
+* 			AD9528 settings, which contains basic AD9528 settings such as
+* 			spi and gpio.
+*
+* @return
+*       - ADIERR_OK if successful.
+*       - ADIERR_FAILED if not successful.
+*
+* @note		None.
+*
+*******************************************************************************/
+int HW_9528Config(ad9528Device_t *clockAD9528_device);
+
+/******************************************************************************/
+/**
+*
+* This function read AD9528 reg508 status, to check whether ad9528 is locked or
+* not.
+*
+* @param	clockAD9528_device is a pointer to the data structure holding
+* 			AD9528 settings, which contains basic AD9528 settings.
+*
+* @return
+*       - ADIERR_OK if successful.
+*       - ADIERR_FAILED if not successful.
+*
+* @note		None.
+*
+*******************************************************************************/
+int HW_9528GetLockStatus(ad9528Device_t *device, uint8_t *reg508);
+
+/******************************************************************************/
+/**
+*
+* Conduct AD9371 device configuration initializing procedure.
+*
+* @param	clockAD9528_device is a pointer to the data structure holding
+* 			AD9528 settings, which contains basic AD9528 settings.
+* @param	mykDevice is ADI hardware layer settings pointer specific to
+* 			a Mykonos instance which contains basic settings such as spi,
+* 			gpio, tx/rx and jesd configurations.
+*
+* @return
+*       - ADIERR_OK if successful.
+*       - ADIERR_FAILED if not successful.
+*
+* @note		None.
+*
+*******************************************************************************/
+int HW_9371Config(ad9528Device_t *clockAD9528_device, mykonosDevice_t *mykDevice);
+
+/******************************************************************************/
+/**
+*
+* Read AD9371's RX framer, ORX framer and TX deframer status, to check jesd204b
+* sync status.
+*
+* @param	mykDevice is ADI hardware layer settings pointer specific to
+* 			a Mykonos instance which contains basic settings such as spi,
+* 			gpio, tx/rx and jesd configurations.
+* @param	framerStatus is the RX framer status byte read
+* framerStatus |  Description
+* -------------|-----------------------------------------------------------------------------
+*         [7]  | SYSREF phase error ? a new SYSREF had different timing than the first that set the LMFC timing.
+*         [6]  | Framer lane FIFO read/write pointer delta has changed.  Can help debug issues with deterministic latency.
+*         [5]  | Framer has received the SYSREF and has retimed its LMFC
+*       [4:2]  | Framer ILAS state: 0=CGS, 1= 1st Multframe, 2= 2nd Multiframe, 3= 3rd Multiframe, 4= 4th multiframe, 5= Last multiframe, 6=invalid, 7= ILAS complete
+*       [1:0]  | Framer Tx state: 0=CGS, 1= ILAS, 2 = ADC Data
+* @param	obsFramerStatus is the ORX framer status byte read
+* obsFramerStatus |  Description
+* ----------------|-----------------------------------------------------------------------------
+*            [7]  | SYSREF phase error ? a new SYSREF had different timing than the first that set the LMFC timing.
+*            [6]  | Framer lane FIFO read/write pointer delta has changed.  Can help debug issues with deterministic latency.
+*            [5]  | Framer has received the SYSREF and has retimed its LMFC
+*          [4:2]  | Framer ILAS state: 0=CGS, 1= 1st Multframe, 2= 2nd Multiframe, 3= 3rd Multiframe, 4= 4th multiframe, 5= Last multiframe, 6=invalid, 7= ILAS complete
+*          [1:0]  | Framer Tx state: 0=CGS, 1= ILAS, 2 = ADC Data
+* @param	deframerStatus  is the TX deframer status byte read
+* deframerStatus  |  Bit Name                |  Description
+* ----------------|--------------------------|---------------------------------------------
+*            [7]  | Unused                   | Unused
+*            [6]  | Deframer IRQ             | This bit indicates that the IRQ interrupt was asserted.
+*            [5]  | Deframer SYSREF Received | When this bit is set, it indicates that the SYSREF pulse was received by the deframer IP
+*            [4]  | Deframer Receiver Error  | This bit is set when PRBS has received an error.
+*            [3]  | Valid Checksum           | This bit is set when the received ILAS checksum is valid.
+*            [2]  | EOF Event                | This bit captures the internal status of the framer End of Frame event. Value =1 if framing error during ILAS
+*            [1]  | EOMF Event               | This bit captures the internal status of the framer End of Multi-Frame event. Value =1 if framing error during ILAS
+*            [0]  | FS Lost                  | This bit captures the internal status of the framer Frame Symbol event. Value =1 if framing error during ILAS or user data (invalid replacement characters)
+*
+* @return
+*       - ADIERR_OK if successful.
+*       - ADIERR_FAILED if not successful.
+*
+* @note		None.
+*
+*******************************************************************************/
+int HW_9371CheckJesdStatus(mykonosDevice_t *mykDevice, uint8_t *framerStatus,
+		uint8_t *obsFramerStatus, uint8_t *deframerStatus);
+
+/******************************************************************************/
+/**
+*
+* This function conducts AD9371/9375 samll RF PLL frequcny change procedure. The
+* procedure is performed as follows:
+*	1. Move the device into the radio off state.
+*	2. Program the new local oscillator (LO) frequency.
+*	3. Reset the external channel.(ignored)
+* 	4. Move the device back into the radio on state.
+*	5. Reenable tracking calibrations.(ignored)
+*
+* @param	mykDevice is ADI hardware layer settings pointer specific to
+* 			a Mykonos instance which contains basic settings such as spi,
+* 			gpio, tx/rx and jesd configurations.
+* @param	freq_Hz is the target frequancy in Hz.
+*
+* @return	None.
+*
+* @note		The procedure is used when a radio frequency (RF) phased-lock loop
+*		(PLL) change is required with the following conditions:
+*		- A desire to change the Rx, Tx, and ORx frequencies.
+* 		- The frequency step change is less than 100 MHz.
+* 		- The frequency step does not cross the divide by 2 boundaries outlined
+*			in AD9371/9375-UG-992-Rev.B-Table 96.
+*
+*******************************************************************************/
+int HW_9371SmallFrequencyChange(mykonosDevice_t *mykDevice, uint64_t freq_Hz);
+
+/******************************************************************************/
+/**
+*
+* This function conducts AD9371/9375 large RF PLL frequcny change procedure. The
+* procedure is performed as follows:
+*	1. Move the device into the radio off state.
+*	2. Program the new local oscillator (LO) frequency.
+*	3. Rerun the initialization calibrations.
+* 	4. Move the device back into the radio on state.
+*	5. Reenable tracking calibrations.(ignored)
+*
+* @param	mykDevice is ADI hardware layer settings pointer specific to
+* 			a Mykonos instance which contains basic settings such as spi,
+* 			gpio, tx/rx and jesd configurations.
+* @param	freq_Hz is the target frequancy in Hz.
+*
+* @return	None.
+*
+* @note		The procedure is used when a radio frequency (RF) phased-lock loop
+*		(PLL) change is required with the following conditions:
+*		- A desire to change the Rx, Tx, and ORx frequencies.
+* 		- The frequency step change is more than 100 MHz.
+* 		- The frequency step does cross the divide by 2 boundaries outlined
+*			in AD9371/9375-UG-992-Rev.B-Table 96.
+*
+*******************************************************************************/
+int HW_9371LargeFrequencyChange(mykonosDevice_t *mykDevice, uint64_t freq_Hz);
+
+/******************************************************************************/
+/**
+*
+* Handles AD9371 TX & RX frequency change axi gpio interruput.
+*
+* @param	CallBackRef is the callback reference, usually the instance
+*		pointer of the connecting driver.
+*
+* @return	None.
+*
+* @note		None.
+*
+*******************************************************************************/
+void FreqIntrHandler(void *CallbackRef);
+
+/******************************************************************************/
+/**
+*
+* Handles AD9371 Rx gain index change axi gpio interruput.
+*
+* @param	CallBackRef is the callback reference, usually the instance
+*		pointer of the connecting driver.
+*
+* @return	None.
+*
+* @note		None.
+*
+*******************************************************************************/
+void GainIntrHandler(void *CallbackRef);
+
+/******************************************************************************/
+/**
+*
+* Handles AD9371 Tx attenuation change axi gpio interruput.
+*
+* @param	CallBackRef is the callback reference, usually the instance
+*		pointer of the connecting driver.
+*
+* @return	None.
+*
+* @note		None.
+*
+*******************************************************************************/
+void AttnIntrHandler(void *CallbackRef);
+
+#endif /* SRC_HEADLESS_H_ */

dj_f1_ad9371/vitis_classic_autobuild/source/tp_hardware/hw_common.c

@@ -0,0 +1,300 @@
+/**
+ * \file common.c
+ * \brief Contains Mykonos API common wrapper functions for user hardware platform drivers
+ */
+
+/**
+* \page Disclaimer Legal Disclaimer
+* Copyright 2015-2017 Analog Devices Inc.
+* Released under the AD9371 API license, for more information see the "LICENSE.txt" file in this zip file.
+*
+*/
+#include <stdint.h>
+#include <stdio.h>
+#include "error.h"
+#include "hw_common.h"
+#include "parameters.h"
+#include "gpio.h"
+#include "spi.h"
+#include "delay.h"
+#include "drivers/platform/xilinx_gpio.h"
+#include "drivers/platform/xilinx_spi.h"
+#include "drivers/axi_core/spi_engine/spi_engine.h"
+
+ADI_LOGLEVEL CMB_LOGLEVEL = ADIHAL_LOG_NONE;
+
+static uint32_t _desired_time_to_elapse_us = 0;
+struct spi_desc 	*spi_ad_desc;
+struct gpio_desc	*gpio_ad9371_resetb;
+struct gpio_desc	*gpio_ad9528_resetb;
+struct gpio_desc	*gpio_ad9528_sysref_req;
+
+commonErr_t CMB_initPlatform(void)
+{
+	struct spi_init_param spi_param;
+	struct gpio_init_param gpio_param;
+	struct xil_gpio_init_param xil_gpio_param;
+	struct spi_engine_init_param spi_engine_param;
+
+	int32_t status = COMMONERR_OK;
+	xil_gpio_param.device_id = 0;
+	xil_gpio_param.type = GPIO_PS;
+	gpio_param.extra = &xil_gpio_param;
+	gpio_param.platform_ops = &xil_gpio_ops;
+
+	gpio_param.number = AD9371_RESET_B;
+	status |= gpio_get(&gpio_ad9371_resetb, &gpio_param);
+	gpio_param.number = AD9528_RESET_B;
+	status |= gpio_get(&gpio_ad9528_resetb, &gpio_param);
+	gpio_param.number = AD9528_SYSREF_REQ;
+	status |= gpio_get(&gpio_ad9528_sysref_req, &gpio_param);
+
+	spi_engine_param.type = SPI_ENGINE;
+	spi_engine_param.ref_clk_hz = 100000000U;
+	spi_engine_param.spi_engine_baseaddr = HWSPI_EIGINE_BASEADDR;
+	spi_engine_param.cs_delay = 3;
+	spi_engine_param.data_width = 8;
+	spi_engine_param.sdo_idle_state = 0x01;
+	spi_param.device_id = 0;
+	spi_param.mode = SPI_MODE_0;
+	spi_param.chip_select = 0;
+	spi_param.max_speed_hz = 25000000u;
+	spi_param.extra = &spi_engine_param;
+	spi_param.platform_ops = &spi_eng_platform_ops;
+
+	status |= spi_init(&spi_ad_desc, &spi_param);
+
+	if (status != SUCCESS) {
+		return COMMONERR_FAILED;
+	}
+
+	return COMMONERR_OK;
+}
+
+commonErr_t CMB_closeHardware(void)
+{
+	return(COMMONERR_OK);
+}
+
+commonErr_t CMB_setGPIO(uint32_t GPIO)
+{
+	return(COMMONERR_OK);
+}
+
+commonErr_t CMB_hardReset(uint8_t spiChipSelectIndex)
+{
+	struct gpio_desc *reset_gpio;
+
+	switch (spiChipSelectIndex) {
+	case AD9371_CS:
+		reset_gpio = gpio_ad9371_resetb;
+		break;
+	case AD9528_CS:
+		reset_gpio = gpio_ad9528_resetb;
+		break;
+	default:
+		return(COMMONERR_FAILED);
+	}
+
+	gpio_direction_output(reset_gpio, 1);
+	CMB_wait_ms(1);
+	gpio_direction_output(reset_gpio, 0);
+	CMB_wait_ms(1);
+	gpio_direction_output(reset_gpio, 1);
+	CMB_wait_ms(1);
+
+	return(COMMONERR_OK);
+}
+
+commonErr_t CMB_setSPIOptions(const spiSettings_t *spiSettings)
+{
+	return(COMMONERR_OK);
+}
+
+commonErr_t CMB_setSPIChannel(uint16_t chipSelectIndex )
+{
+	return(COMMONERR_OK);
+}
+
+commonErr_t CMB_SPIWriteByte(const spiSettings_t *spiSettings, uint16_t addr,
+			     uint8_t data)
+{
+	uint8_t buf[3];
+
+	spi_ad_desc->mode = (spiSettings->CPOL == 0) ? 0x00 : SPI_CPOL;
+	spi_ad_desc->mode |= (spiSettings->CPOL == 0) ? 0x00 : SPI_CPHA;
+	spi_ad_desc->chip_select = spiSettings->chipSelectIndex;
+
+	buf[0] = (uint8_t) ((addr >> 8) & 0x7f);
+	buf[1] = (uint8_t) (addr & 0xff);
+	buf[2] = (uint8_t) data;
+
+	spi_write_and_read(spi_ad_desc, buf, 3);
+
+	return(COMMONERR_OK);
+}
+
+commonErr_t CMB_SPIWriteBytes(const spiSettings_t *spiSettings, uint16_t *addr,
+			      uint8_t *data, uint32_t count)
+{
+	uint32_t index;
+
+	for (index = 0; index < count; index++)
+		if (CMB_SPIWriteByte(spiSettings, *(addr + index),
+				     *(data + index)) != COMMONERR_OK)
+			return(COMMONERR_FAILED);
+
+	return(COMMONERR_OK);
+}
+
+commonErr_t CMB_SPIReadByte(const spiSettings_t *spiSettings, uint16_t addr,
+			    uint8_t *readdata)
+{
+	uint8_t buf[3];
+
+	spi_ad_desc->mode = (spiSettings->CPOL == 0) ? 0x00 : SPI_CPOL;
+	spi_ad_desc->mode |= (spiSettings->CPOL == 0) ? 0x00 : SPI_CPHA;
+	spi_ad_desc->chip_select = spiSettings->chipSelectIndex;
+
+	buf[0] = (uint8_t) ((addr >> 8) | 0x80);
+	buf[1] = (uint8_t) (addr & 0xff);
+	buf[2] = (uint8_t) 0x00;
+
+	spi_write_and_read(spi_ad_desc, buf, 3);
+	*readdata = buf[2];
+
+	return(COMMONERR_OK);
+}
+
+commonErr_t CMB_SPIWriteField(const spiSettings_t *spiSettings, uint16_t addr,
+			      uint8_t field_val, uint8_t mask, uint8_t start_bit)
+{
+	uint8_t data;
+
+	if (CMB_SPIReadByte(spiSettings, addr, &data) != COMMONERR_OK)
+		return(COMMONERR_FAILED);
+
+	data = (data & ~mask) | ((field_val << start_bit) & mask);
+
+	if (CMB_SPIWriteByte(spiSettings, addr, data) != COMMONERR_OK)
+		return(COMMONERR_FAILED);
+
+	return(COMMONERR_OK);
+}
+
+/* read a field in a single register space (not multibyte fields) */
+commonErr_t CMB_SPIReadField(const spiSettings_t *spiSettings, uint16_t addr,
+			     uint8_t *field_val, uint8_t mask, uint8_t start_bit)
+{
+	uint8_t data;
+
+	if (CMB_SPIReadByte(spiSettings, addr, &data) != COMMONERR_OK)
+		return(COMMONERR_FAILED);
+
+	data = (data & mask) >> start_bit;
+	*field_val = data;
+
+	return(COMMONERR_OK);
+}
+
+
+commonErr_t CMB_writeToLog(ADI_LOGLEVEL level, uint8_t deviceIndex,
+			   uint32_t errorCode, const char *comment)
+{
+
+	if((CMB_LOGLEVEL & ADIHAL_LOG_ERROR) && (level == ADIHAL_LOG_ERROR)) {
+		printf("ERROR: %d: %s", (int)errorCode, comment);
+	} else if((CMB_LOGLEVEL & ADIHAL_LOG_WARNING)
+		  && (level == ADIHAL_LOG_WARNING)) {
+		printf("WARNING: %d: %s",(int)errorCode, comment);
+	} else if((CMB_LOGLEVEL & ADIHAL_LOG_MESSAGE)
+		  && (level == ADIHAL_LOG_MESSAGE)) {
+		printf("MESSAGE: %d: %s",(int)errorCode, comment);
+	} else if(CMB_LOGLEVEL == ADIHAL_LOG_NONE ) {
+		printf("MESSAGE: %d: %s",(int)errorCode, comment);
+	} else {
+		printf("Undefined Log Level: 0x%X", level);
+	}
+
+	return(COMMONERR_OK);
+}
+
+/* if filename null, a default path will be used in logging.c */
+commonErr_t CMB_openLog(const char *filename)
+{
+	return(COMMONERR_OK);
+}
+
+commonErr_t CMB_closeLog(void)
+{
+	return(COMMONERR_OK);
+}
+
+commonErr_t CMB_flushLog(void)
+{
+	return(COMMONERR_OK);
+}
+
+commonErr_t CMB_wait_ms(uint32_t time_ms)
+{
+	mdelay(time_ms);
+
+	return(COMMONERR_OK);
+}
+
+commonErr_t CMB_wait_us(uint32_t time_us)
+{
+	udelay(time_us);
+
+	return(COMMONERR_OK);
+}
+
+commonErr_t CMB_setTimeout_ms(uint32_t timeOut_ms)
+{
+#ifdef _XPARAMETERS_PS_H_
+	_desired_time_to_elapse_us = timeOut_ms * 1000;
+#else
+	_desired_time_to_elapse_us = timeOut_ms * 50;	// FIXME
+#endif
+
+	return(COMMONERR_OK);
+}
+
+commonErr_t CMB_setTimeout_us(uint32_t timeOut_us)
+{
+	_desired_time_to_elapse_us = timeOut_us;
+
+	return(COMMONERR_OK);
+}
+
+
+commonErr_t CMB_hasTimeoutExpired()
+{
+	udelay(1);
+
+	_desired_time_to_elapse_us--;
+	if (_desired_time_to_elapse_us > 0)
+		return(COMMONERR_OK);
+
+	return(COMMONERR_FAILED);
+}
+
+commonErr_t CMB_regRead(uint32_t offset, uint32_t *data)
+{
+	return(COMMONERR_OK);
+}
+
+commonErr_t CMB_regWrite(uint32_t offset, uint32_t data)
+{
+	return(COMMONERR_OK);
+}
+
+commonErr_t CMB_memRead(uint32_t offset, uint32_t *data, uint32_t len)
+{
+	return(COMMONERR_OK);
+}
+
+commonErr_t CMB_memWrite(uint32_t offset, uint32_t *data, uint32_t len)
+{
+	return(COMMONERR_OK);
+}

dj_f1_ad9371/vitis_classic_autobuild/source/tp_hardware/hw_common.h

@@ -0,0 +1,126 @@
+/**
+ * \file common.h
+ * \brief Contains type definitions and prototype declarations for common.c
+ */
+
+/**
+* \page Disclaimer Legal Disclaimer
+* Copyright 2015-2017 Analog Devices Inc.
+* Released under the AD9371 API license, for more information see the "LICENSE.txt" file in this zip file.
+*
+*/
+
+#ifndef _COMMON_H_
+#define _COMMON_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* build project settings include the path to the desired platform folder for correct includes */
+#include <stdint.h>
+
+#define HW_PRINT(...)  __asm__("nop")
+// #define HW_PRINT(...)  printf(__VA_ARGS__)
+
+/*========================================
+ * Enums and structures
+ *=======================================*/
+/* proposed to increase number of error return values to make unique for each return */
+typedef enum
+{
+    ADIERR_OK=0,
+    ADIERR_INV_PARM,
+    ADIERR_FAILED
+} ADI_ERR;
+
+/*!< \brief COMMON layer error reporting enumerated types */
+typedef enum
+{
+    COMMONERR_OK=0,
+    COMMONERR_FAILED
+} commonErr_t;
+
+/* bit 0 is MESSAGE, bit 1 is WARNING, bit 2 is ERROR */
+typedef enum
+{
+    ADIHAL_LOG_NONE    = 0x0,
+    ADIHAL_LOG_MESSAGE = 0x1,
+    ADIHAL_LOG_WARNING = 0x2,
+    ADIHAL_LOG_ERROR   = 0x4,
+	ADIHAL_LOG_SPI     = 0x8,
+	ADIHAL_LOG_AXI_REG = 0x10,
+	ADIHAL_LOG_AXI_MEM = 0x20,
+	ADIHAL_LOG_ALL     = 0x3F
+} ADI_LOGLEVEL;
+
+/**
+ * \brief Data structure to hold SPI settings for all system device types
+ */
+typedef struct
+{
+	uint8_t chipSelectIndex;        ///< valid 1~8
+	uint8_t writeBitPolarity;       ///< the level of the write bit of a SPI write instruction word, value is inverted for SPI read operation
+	uint8_t longInstructionWord;    ///< 1 = 16bit instruction word, 0 = 8bit instruction word
+	uint8_t MSBFirst;               ///< 1 = MSBFirst, 0 = LSBFirst
+	uint8_t CPHA;                   ///< clock phase, sets which clock edge the data updates (valid 0 or 1)
+	uint8_t CPOL;                   ///< clock polarity 0 = clock starts low, 1 = clock starts high
+    uint8_t enSpiStreaming;         ///< Not implemented. SW feature to improve SPI throughput.
+    uint8_t autoIncAddrUp;          ///< Not implemented. For SPI Streaming, set address increment direction. 1= next addr = addr+1, 0:addr = addr-1
+    uint8_t fourWireMode;           ///< 1: Use 4-wire SPI, 0: 3-wire SPI (SDIO pin is bidirectional). NOTE: ADI's FPGA platform always uses 4-wire mode.
+    uint32_t spiClkFreq_Hz;         ///< SPI Clk frequency in Hz (default 25000000), platform will use next lowest frequency that it's baud rate generator can create */
+} spiSettings_t;
+
+/* global variable so application layer can set the log level */
+extern ADI_LOGLEVEL CMB_LOGLEVEL;
+extern struct spi_desc 	*spi_ad_desc;
+extern struct gpio_desc	*gpio_ad9371_resetb;
+extern struct gpio_desc	*gpio_ad9528_resetb;
+extern struct gpio_desc	*gpio_ad9528_sysref_req;
+
+/* initialize hardware platform */
+commonErr_t CMB_initPlatform(void);
+
+/* close hardware pointers */
+commonErr_t CMB_closeHardware(void);
+
+/* GPIO function */
+commonErr_t CMB_setGPIO(uint32_t GPIO);
+
+/* hardware reset function */
+commonErr_t CMB_hardReset(uint8_t spiChipSelectIndex);
+
+/* SPI read/write functions */
+commonErr_t CMB_setSPIOptions(const spiSettings_t *spiSettings); /* allows the platform HAL to work with devices with various SPI settings */
+commonErr_t CMB_setSPIChannel(uint16_t chipSelectIndex );  /* value of 0 deasserts all chip selects */
+commonErr_t CMB_SPIWriteByte(const spiSettings_t *spiSettings, uint16_t addr, uint8_t data); /* single SPI byte write function */
+commonErr_t CMB_SPIWriteBytes(const spiSettings_t *spiSettings, uint16_t *addr, uint8_t *data, uint32_t count);
+commonErr_t CMB_SPIReadByte (const spiSettings_t *spiSettings, uint16_t addr, uint8_t *readdata); /* single SPI byte read function */
+commonErr_t CMB_SPIWriteField(const spiSettings_t *spiSettings, uint16_t addr, uint8_t  field_val, uint8_t mask, uint8_t start_bit); /* write a field in a single register */
+commonErr_t CMB_SPIReadField (const spiSettings_t *spiSettings, uint16_t addr, uint8_t *field_val, uint8_t mask, uint8_t start_bit);	/* read a field in a single register */
+
+/* platform timer functions */
+commonErr_t CMB_wait_ms(uint32_t time_ms);
+commonErr_t CMB_wait_us(uint32_t time_us);
+commonErr_t CMB_setTimeout_ms(uint32_t timeOut_ms);
+commonErr_t CMB_setTimeout_us(uint32_t timeOut_us);
+commonErr_t CMB_hasTimeoutExpired();
+
+/* platform logging functions */
+commonErr_t CMB_openLog(const char *filename);
+commonErr_t CMB_closeLog(void);
+commonErr_t CMB_writeToLog(ADI_LOGLEVEL level, uint8_t deviceIndex, uint32_t errorCode, const char *comment);
+commonErr_t CMB_flushLog(void);
+
+/* platform FPGA AXI register read/write functions */
+commonErr_t CMB_regRead(uint32_t offset, uint32_t *data);
+commonErr_t CMB_regWrite(uint32_t offset, uint32_t data);
+
+/* platform DDR3 memory read/write functions */
+commonErr_t CMB_memRead(uint32_t offset, uint32_t *data, uint32_t len);
+commonErr_t CMB_memWrite(uint32_t offset, uint32_t *data, uint32_t len);
+
+#ifdef __cplusplus
+}
+#endif
+#endif

dj_f1_ad9371/vitis_classic_autobuild/source/tp_hardware/myk_ad9528init.c

@@ -0,0 +1,102 @@
+/*
+ * myk_clock_init.c
+ *
+ */
+
+/**
+ * \page Disclaimer Legal Disclaimer
+ * Copyright 2015-2017 Analog Devices Inc.
+ * Released under the AD9371 API license, for more information see the "LICENSE.txt" file in this zip file.
+ *
+ */
+/* AD9528 data structure initialization file */
+#include <stdint.h>
+#include <stdlib.h>
+#include <stddef.h>
+#include "common.h"
+
+#include "./mykonos/ad9528.h"
+#include "./mykonos/t_ad9528.h"
+#include "myk_ad9528init.h"
+#include "parameters.h"
+
+static ad9528pll1Settings_t clockPll1Settings = {
+    .refA_Frequency_Hz  = 122880000,
+    .refA_Divider       = 1,
+    .refA_bufferCtrl    = SINGLE_ENDED,
+    .refB_Frequency_Hz  = 0,
+    .refB_Divider       = 1,
+    .refB_bufferCtrl    = DISABLED,
+    .vcxo_Frequency_Hz  = 122880000,
+    .vcxoBufferCtrl     = DIFFERENTIAL,
+    .nDivider           = 1,
+	.bypassPll1 		= 0
+};
+
+static ad9528pll2Settings_t clockPll2Settings = {
+    .rfDivider = 3,
+    .n2Divider = 10,
+    .totalNdiv = 30
+};
+
+/*******************************************************************
+ * Output Distribution Settings
+ * 9369CE02A uses the following clock outputs
+ * OUT 1: FPGA_REF_CLK
+ * OUT 2: FPGA_AUX_CLK
+ * OUT 3: FPGA_SYSREF
+ * OUT 12: SYSREF_IN
+ * OUT 13: DEV_CLK_IN
+ *******************************************************************
+ */
+static ad9528outputSettings_t clockOutputSettings = {
+    .outPowerDown       = 0x0,
+    .outSource          = {
+    	SYSREF,      SYSREF,      CHANNEL_DIV, SYSREF,
+    	CHANNEL_DIV, CHANNEL_DIV, SYSREF,      SYSREF,
+    	CHANNEL_DIV, CHANNEL_DIV, CHANNEL_DIV, CHANNEL_DIV,
+    	SYSREF     , CHANNEL_DIV
+    },
+    .outBufferCtrl      = {0,0,0,0,0,0,0,0,0,0,0,0,0,0},
+    .outAnalogDelay     = {0,0,0,0,0,0,0,0,0,0,0,0,0,0},
+    .outDigitalDelay    = {0,0,0,0,0,0,0,0,0,0,0,0,0,0},
+    .outChannelDiv      = {10,10,10,10,10,10,10,10,10,10,10,10,10,10},
+    .outFrequency_Hz    = {
+    		122880000, 122880000, 122880000, 122880000,
+			122880000, 122880000, 122880000, 122880000,
+			122880000, 122880000, 122880000, 122880000,
+			122880000, 122880000
+    }
+};
+
+static ad9528sysrefSettings_t clockSysrefSettings = {
+    .sysrefRequestMethod    = SPI,
+    .sysrefSource           = INTERNAL,
+    .sysrefPinEdgeMode      = LEVEL_ACTIVE_HIGH,
+    .sysrefPinBufferMode    = DISABLED,
+    .sysrefPatternMode      = NSHOT,
+    .sysrefNshotMode        = FOUR_PULSES,
+    .sysrefDivide           = 512
+};
+
+static const spiSettings_t clockSpiSettings = {
+    .chipSelectIndex        = AD9528_CS, //chip select Index
+    .writeBitPolarity       = 0, //Write bit polarity
+    .longInstructionWord    = 1, //16bit instruction word
+    .MSBFirst               = 1, //MSB first
+    .CPHA                   = 0, //Clock phase
+    .CPOL                   = 0, //Clock polarity
+    .enSpiStreaming         = 0, //uint8_t enSpiStreaming;
+    .autoIncAddrUp          = 1, //uint8_t autoIncAddrUp;
+    .fourWireMode           = 1  //uint8_t fourWireMode;
+};
+
+ad9528Device_t clockAD9528_ = {
+    &clockSpiSettings,
+    &clockPll1Settings,
+    &clockPll2Settings,
+    &clockOutputSettings,
+    &clockSysrefSettings
+};
+
+ad9528Device_t *ad9528Init = &clockAD9528_;

dj_f1_ad9371/vitis_classic_autobuild/source/tp_hardware/myk_ad9528init.h

@@ -0,0 +1,20 @@
+/*
+ * myk_clock_init.h
+ *
+ */
+
+/**
+* \page Disclaimer Legal Disclaimer
+* Copyright 2015-2017 Analog Devices Inc.
+* Released under the AD9371 API license, for more information see the "LICENSE.txt" file in this zip file.
+*
+*/
+
+#ifndef MYK_CLOCK_INIT_H_
+#define MYK_CLOCK_INIT_H_
+
+#include "./mykonos/ad9528.h"
+
+extern ad9528Device_t *ad9528Init;
+
+#endif /* MYK_CLOCK_INIT_H_ */

dj_f1_ad9371/vitis_classic_autobuild/source/tp_hardware/myk_init.c

@@ -0,0 +1,559 @@
+/**
+ * \file myk_init.c
+ *
+ * \brief Contains init setting structure declarations for the _instance API
+ *
+ * The top level structure mykonosDevice_t mykDevice uses keyword
+ * extern to allow the application layer main() to have visibility
+ * to these settings.
+ *
+ * All data structures required for operation have been initialized with values which reflect
+ * these settings:
+ *
+ * Device Clock = $122.88$ Mhz
+ * Rx enabled channels = $2$
+ * Tx enabled channels = $2$
+ *
+ * Mykonos Framer:
+ * Lane Rate = $4915.2$ Mbs
+ * L = $2$
+ * K = $32$
+ * M = $4$
+ * F = $4$
+ *
+ * Mykonos Deframer:
+ * Lane Rate = $4915.2$ Mbs
+ * L = $2$
+ * K = $32$
+ * M = $4$
+ * F = $4$
+ *
+ * Mykonos Observation framer:
+ * Lane Rate = $4915.2$ Mbs
+ * L = $2$
+ * K = $32$
+ * M = $4$
+ * F = $4$
+ *
+ * Using these profiles:
+ * $Rx 100Mhz, IQrate 122.88Mhz, Dec5$
+ * $Tx 100/100Mhz, IQrate 122.88Mhz, Dec5$
+ * $ORX 100Mhz, IQrate 122.88Mhz, Dec5$
+ * $SRx 20Mhz, IQrate 30.72Mhz, Dec5$
+ *
+ */
+
+/**
+* \page Disclaimer Legal Disclaimer
+* Copyright 2015-2017 Analog Devices Inc.
+* Released under the AD9371 API license, for more information see the "LICENSE.txt" file in this zip file.
+*
+*/
+
+#include <stddef.h>
+#include "./mykonos/t_mykonos.h"
+#include "myk_init.h"
+#include "parameters.h"
+#include "./mykonos/mykonos_gpio.h"
+
+static int16_t txFirCoefs[] = {-94,-26,282,177,-438,-368,756,732,-1170,-1337,1758,2479,-2648,-5088,4064,16760,16759,4110,-4881,-2247,2888,1917,-1440,-1296,745,828,-358,-474,164,298,-16,-94};
+
+static mykonosFir_t txFir =
+{
+    6,              /* Filter gain in dB*/
+    32,             /* Number of coefficients in the FIR filter*/
+    &txFirCoefs[0]  /* A pointer to an array of filter coefficients*/
+};
+
+static int16_t rxFirCoefs[] = {-20,6,66,22,-128,-54,240,126,-402,-248,634,444,-956,-756,1400,1244,-2028,-2050,2978,3538,-4646,-7046,9536,30880,30880,9536,-7046,-4646,3538,2978,-2050,-2028,1244,1400,-756,-956,444,634,-248,-402,126,240,-54,-128,22,66,6,-20};
+
+static mykonosFir_t rxFir =
+{
+    -6,             /* Filter gain in dB*/
+    48,             /* Number of coefficients in the FIR filter*/
+    &rxFirCoefs[0]  /* A pointer to an array of filter coefficients*/
+};
+
+static int16_t obsrxFirCoefs[] = {-14,-19,44,41,-89,-95,175,178,-303,-317,499,527,-779,-843,1184,1317,-1781,-2059,2760,3350,-4962,-7433,9822,32154,32154,9822,-7433,-4962,3350,2760,-2059,-1781,1317,1184,-843,-779,527,499,-317,-303,178,175,-95,-89,41,44,-19,-14};
+static mykonosFir_t obsrxFir =
+{
+    -6,             /* Filter gain in dB*/
+    48,             /* Number of coefficients in the FIR filter*/
+    &obsrxFirCoefs[0]/* A pointer to an array of filter coefficients*/
+};
+
+static int16_t snifferFirCoefs[] = {-1,-5,-14,-23,-16,24,92,137,80,-120,-378,-471,-174,507,1174,1183,98,-1771,-3216,-2641,942,7027,13533,17738,17738,13533,7027,942,-2641,-3216,-1771,98,1183,1174,507,-174,-471,-378,-120,80,137,92,24,-16,-23,-14,-5,-1};
+static mykonosFir_t snifferRxFir=
+{
+    -6,             /* Filter gain in dB*/
+    48,             /* Number of coefficients in the FIR filter*/
+    &snifferFirCoefs[0]/* A pointer to an array of filter coefficients*/
+};
+
+static mykonosJesd204bFramerConfig_t rxFramer =
+{
+    0,              /* JESD204B Configuration Bank ID -extension to Device ID (Valid 0..15)*/
+    0,              /* JESD204B Configuration Device ID - link identification number. (Valid 0..255)*/
+    0,              /* JESD204B Configuration starting Lane ID.  If more than one lane used, each lane will increment from the Lane0 ID. (Valid 0..31)*/
+    4,              /* number of ADCs (0, 2, or 4) - 2 ADCs per receive chain*/
+    32,             /* number of frames in a multiframe (default=32), F*K must be a multiple of 4. (F=2*M/numberOfLanes)*/
+    0,              /* scrambling off if framerScramble= 0, if framerScramble>0 scramble is enabled.*/
+    1,              /* 0=use internal SYSREF, 1= use external SYSREF*/
+    0x03,           /* serializerLanesEnabled - bit per lane, [0] = Lane0 enabled, [1] = Lane1 enabled*/
+    0xE4,           /* serializerLaneCrossbar*/
+    22,             /* serializerAmplitude - default 22 (valid (0-31)*/
+    4,              /* preEmphasis - < default 4 (valid 0 - 7)*/
+    0,              /* invertLanePolarity - default 0 ([0] will invert lane [0], bit1 will invert lane1)*/
+    0,              /* lmfcOffset - LMFC_Offset offset value for deterministic latency setting*/
+    0,              /* Flag for determining if SYSREF on relink should be set. Where, if > 0 = set, 0 = not set*/
+    0,              /* Flag for determining if auto channel select for the xbar should be set. Where, if > 0 = set, '0' = not set*/
+    0,              /* Selects SYNCb input source. Where, 0 = use RXSYNCB for this framer, 1 = use OBSRX_SYNCB for this framer*/
+    0,              /* Flag for determining if CMOS mode for RX Sync signal is used. Where, if > 0 = CMOS, '0' = LVDS*/
+    0,              /* Selects framer bit repeat or oversampling mode for lane rate matching. Where, 0 = bitRepeat mode (changes effective lanerate), 1 = overSample (maintains same lane rate between ObsRx framer and Rx framer and oversamples the ADC samples)*/
+    0               /* Flag for determining if API will calculate the appropriate settings for framer lane outputs to physical lanes. Where, if '0' = API will set automatic lane crossbar, '1' = set to manual mode and the value in serializerLaneCrossbar will be used*/
+};
+
+static mykonosJesd204bFramerConfig_t obsRxFramer =
+{
+    0,              /* JESD204B Configuration Bank ID -extension to Device ID (Valid 0..15)*/
+    0,              /* JESD204B Configuration Device ID - link identification number. (Valid 0..255)*/
+    0,              /* JESD204B Configuration starting Lane ID.  If more than one lane used, each lane will increment from the Lane0 ID. (Valid 0..31)*/
+    2,              /* number of ADCs (0, 2, or 4) - 2 ADCs per receive chain*/
+    32,             /* number of frames in a multiframe (default=32), F*K must be a multiple of 4. (F=2*M/numberOfLanes)*/
+    0,              /* scrambling off if framerScramble= 0, if framerScramble>0 scramble is enabled.*/
+    1,              /* 0=use internal SYSREF, 1= use external SYSREF*/
+    0x04,           /* serializerLanesEnabled - bit per lane, [0] = Lane0 enabled, [1] = Lane1 enabled*/
+    0xE4,           /* Lane crossbar to map framer lane outputs to physical lanes*/
+    22,             /* serializerAmplitude - default 22 (valid (0-31)*/
+    4,              /* preEmphasis - < default 4 (valid 0 - 7)*/
+    0,              /* invertLanePolarity - default 0 ([0] will invert lane [0], bit1 will invert lane1)*/
+    0,              /* lmfcOffset - LMFC_Offset offset value for deterministic latency setting*/
+    0,              /* Flag for determining if SYSREF on relink should be set. Where, if > 0 = set, 0 = not set*/
+    0,              /* Flag for determining if auto channel select for the xbar should be set. Where, if > 0 = set, '0' = not set*/
+    1,              /* Selects SYNCb input source. Where, 0 = use RXSYNCB for this framer, 1 = use OBSRX_SYNCB for this framer*/
+    0,              /* Flag for determining if CMOS mode for RX Sync signal is used. Where, if > 0 = CMOS, '0' = LVDS*/
+    0,              /* Selects framer bit repeat or oversampling mode for lane rate matching. Where, 0 = bitRepeat mode (changes effective lanerate), 1 = overSample (maintains same lane rate between ObsRx framer and Rx framer and oversamples the ADC samples)*/
+    0               /* Flag for determining if API will calculate the appropriate settings for framer lane outputs to physical lanes. Where, if '0' = API will set automatic lane crossbar, '1' = set to manual mode and the value in serializerLaneCrossbar will be used*/
+};
+
+static mykonosJesd204bDeframerConfig_t deframer =
+{
+    0,              /* bankId extension to Device ID (Valid 0..15)*/
+    0,              /* deviceId  link identification number. (Valid 0..255)*/
+    0,              /* lane0Id Lane0 ID. (Valid 0..31)*/
+    4,              /* M  number of DACss (0, 2, or 4) - 2 DACs per transmit chain */
+    32,             /* K  #frames in a multiframe (default=32), F*K=multiple of 4. (F=2*M/numberOfLanes)*/
+    0,              /* scramble  scrambling off if scramble= 0.*/
+    1,              /* External SYSREF select. 0 = use internal SYSREF, 1 = external SYSREF*/
+    0x03,           /* Deserializer lane select bit field. Where, [0] = Lane0 enabled, [1] = Lane1 enabled, etc */
+    0xE4,           /* Lane crossbar to map physical lanes to deframer lane inputs [1:0] = Deframer Input 0 Lane section, [3:2] = Deframer Input 1 lane select, etc */
+    1,              /* Equalizer setting. Applied to all deserializer lanes. Range is 0..4*/
+    0,              /* PN inversion per each lane.  bit[0] = 1 Invert PN of Lane 0, bit[1] = Invert PN of Lane 1, etc).*/
+    0,              /* LMFC_Offset offset value to adjust deterministic latency. Range is 0..31*/
+    0,              /* Flag for determining if SYSREF on relink should be set. Where, if > 0 = set, '0' = not set*/
+    0,              /* Flag for determining if auto channel select for the xbar should be set. Where, if > 0 = set, '0' = not set*/
+    0,              /* Flag for determining if CMOS mode for TX Sync signal is used. Where, if > 0 = CMOS, '0' = LVDS*/
+    0               /* Flag for determining if API will calculate the appropriate settings for deframer lane in to physical lanes. Where, if '0' = API will set automatic lane crossbar, '1' = set to manual mode and the value in deserializerLaneCrossbar will be used*/
+};
+
+static mykonosRxGainControl_t rxGainControl =
+{
+    MGC,            /* Current Rx gain control mode setting*/
+    255,            /* Rx1 Gain Index, can be used in different ways for manual and AGC gain control*/
+    255,            /* Rx2 Gain Index, can be used in different ways for manual and AGC gain control*/
+    255,            /* Max gain index for the currently loaded Rx1 Gain table*/
+    195,            /* Min gain index for the currently loaded Rx1 Gain table*/
+    255,            /* Max gain index for the currently loaded Rx2 Gain table*/
+    195,            /* Min gain index for the currently loaded Rx2 Gain table*/
+    0,              /* Stores Rx1 RSSI value read back from the Mykonos*/
+    0               /* Stores Rx2 RSSI value read back from the Mykonos*/
+};
+
+
+static mykonosORxGainControl_t orxGainControl =
+{
+    MGC,            /* Current ORx gain control mode setting*/
+    255,            /* ORx1 Gain Index, can be used in different ways for manual and AGC gain control*/
+    255,            /* ORx2 Gain Index, can be used in different ways for manual and AGC gain control*/
+    255,            /* Max gain index for the currently loaded ORx Gain table*/
+    237             /* Min gain index for the currently loaded ORx Gain table*/
+};
+
+static mykonosSnifferGainControl_t snifferGainControl =
+{
+    MGC,            /* Current Sniffer gain control mode setting*/
+    255,            /* Current Sniffer gain index. Can be used differently for MANUAL Gain control/AGC*/
+    255,            /* Max gain index for the currently loaded Sniffer Gain table*/
+    203             /* Min gain index for the currently loaded Sniffer Gain table*/
+};
+
+static mykonosPeakDetAgcCfg_t rxPeakAgc =
+{
+	0x0C,	/* apdHighThresh: */
+	0x08,	/* apdLowThresh */
+	0xB5,	/* hb2HighThresh */
+	0x80,	/* hb2LowThresh */
+	0x40,	/* hb2VeryLowThresh */
+	0x06,	/* apdHighThreshExceededCnt */
+	0x04,	/* apdLowThreshExceededCnt */
+	0x06,	/* hb2HighThreshExceededCnt */
+	0x04,	/* hb2LowThreshExceededCnt */
+	0x04,	/* hb2VeryLowThreshExceededCnt */
+	0x4,	/* apdHighGainStepAttack */
+	0x2,	/* apdLowGainStepRecovery */
+	0x4,	/* hb2HighGainStepAttack */
+	0x2,	/* hb2LowGainStepRecovery */
+	0x4,	/* hb2VeryLowGainStepRecovery */
+	0x1,	/* apdFastAttack */
+	0x1,	/* hb2FastAttack */
+	0x1,	/* hb2OverloadDetectEnable */
+	0x1,	/* hb2OverloadDurationCnt */
+	0x1	/* hb2OverloadThreshCnt */
+};
+
+static mykonosPowerMeasAgcCfg_t rxPwrAgc =
+{
+    0x01,	/* pmdUpperHighThresh */
+    0x03,	/* pmdUpperLowThresh */
+    0x0C,	/* pmdLowerHighThresh */
+    0x00,	/* pmdLowerLowThresh */
+    0x4,	/* pmdUpperHighGainStepAttack */
+    0x2,	/* pmdUpperLowGainStepAttack */
+    0x2,	/* pmdLowerHighGainStepRecovery */
+    0x4,	/* pmdLowerLowGainStepRecovery */
+    0x08,	/* pmdMeasDuration */
+    0x02	/* pmdMeasConfig */
+};
+
+static mykonosAgcCfg_t rxAgcConfig =
+{
+    255,	/* agcRx1MaxGainIndex */
+    195,	/* agcRx1MinGainIndex */
+    255,	/* agcRx2MaxGainIndex */
+    195,	/* agcRx2MinGainIndex: */
+    255,	/* agcObsRxMaxGainIndex */
+    203,	/* agcObsRxMinGainIndex */
+    1,		/* agcObsRxSelect */
+    1,		/* agcPeakThresholdMode */
+    1,		/* agcLowThsPreventGainIncrease */
+	30720,	/* agcGainUpdateCounter */
+    3,	/* agcSlowLoopSettlingDelay */
+    2,	/* agcPeakWaitTime */
+    1,	/* agcResetOnRxEnable */
+    0,	/* agcEnableSyncPulseForGainCounter */
+    &rxPeakAgc,
+    &rxPwrAgc
+};
+
+static mykonosPeakDetAgcCfg_t obsRxPeakAgc =
+{
+	0x1F,	/* apdHighThresh: */
+	0x16,	/* apdLowThresh */
+	0xB5,	/* hb2HighThresh */
+	0x80,	/* hb2LowThresh */
+	0x40,	/* hb2VeryLowThresh */
+	0x06,	/* apdHighThreshExceededCnt */
+	0x04,	/* apdLowThreshExceededCnt */
+	0x06,	/* hb2HighThreshExceededCnt */
+	0x04,	/* hb2LowThreshExceededCnt */
+	0x04,	/* hb2VeryLowThreshExceededCnt */
+	0x4,	/* apdHighGainStepAttack */
+	0x2,	/* apdLowGainStepRecovery */
+	0x4,	/* hb2HighGainStepAttack */
+	0x2,	/* hb2LowGainStepRecovery */
+	0x4,	/* hb2VeryLowGainStepRecovery */
+	0x1,	/* apdFastAttack */
+	0x1,	/* hb2FastAttack */
+	0x1,	/* hb2OverloadDetectEnable */
+	0x1,	/* hb2OverloadDurationCnt */
+	0x1		/* hb2OverloadThreshCnt */
+};
+
+static mykonosPowerMeasAgcCfg_t obsRxPwrAgc =
+{
+    0x01,	/* pmdUpperHighThresh */
+    0x03,	/* pmdUpperLowThresh */
+    0x0C,	/* pmdLowerHighThresh */
+    0x00,	/* pmdLowerLowThresh */
+    0x4,	/* pmdUpperHighGainStepAttack */
+    0x2,	/* pmdUpperLowGainStepAttack */
+    0x2,	/* pmdLowerHighGainStepRecovery */
+    0x4,	/* pmdLowerLowGainStepRecovery */
+    0x08,	/* pmdMeasDuration */
+    0x02	/* pmdMeasConfig */
+};
+
+static mykonosAgcCfg_t obsRxAgcConfig =
+{
+    255,	/* agcRx1MaxGainIndex */
+    195,	/* agcRx1MinGainIndex */
+    255,	/* agcRx2MaxGainIndex */
+    195,	/* agcRx2MinGainIndex: */
+    255,	/* agcObsRxMaxGainIndex */
+    203,	/* agcObsRxMinGainIndex */
+    1,		/* agcObsRxSelect */
+    1,		/* agcPeakThresholdMode */
+    1,		/* agcLowThsPreventGainIncrease */
+	30720,	/* agcGainUpdateCounter */
+    3,		/* agcSlowLoopSettlingDelay */
+    2,		/* agcPeakWaitTime */
+    1,		/* agcResetOnRxEnable */
+    0,		/* agcEnableSyncPulseForGainCounter */
+    &obsRxPeakAgc,
+    &obsRxPwrAgc
+};
+
+
+static mykonosRxProfile_t rxProfile =
+{/* Rx 100MHz, IQrate 122.88MSPS, Dec5 */
+    1,              /* The divider used to generate the ADC clock*/
+    &rxFir,         /* Pointer to Rx FIR filter structure*/
+    2,              /* Rx FIR decimation (1,2,4)*/
+    5,              /* Decimation of Dec5 or Dec4 filter (5,4)*/
+    1,              /* If set, and DEC5 filter used, will use a higher rejection DEC5 FIR filter (1=Enabled, 0=Disabled)*/
+    1,              /* RX Half band 1 decimation (1 or 2)*/
+    122880,         /* Rx IQ data rate in kHz*/
+    100000000,      /* The Rx RF passband bandwidth for the profile*/
+    100000,         /* Rx BBF 3dB corner in kHz*/
+    NULL            /* pointer to custom ADC profile*/
+};
+
+static mykonosRxProfile_t orxProfile =
+{/* ORX 100MHz, IQrate 122.88MSPS, Dec5 */
+    1,              /* The divider used to generate the ADC clock*/
+    &obsrxFir,      /* Pointer to Rx FIR filter structure or NULL*/
+    2,              /* Rx FIR decimation (1,2,4)*/
+    5,              /* Decimation of Dec5 or Dec4 filter (5,4)*/
+    0,              /* If set, and DEC5 filter used, will use a higher rejection DEC5 FIR filter (1=Enabled, 0=Disabled)*/
+    1,              /* RX Half band 1 decimation (1 or 2)*/
+    122880,         /* Rx IQ data rate in kHz*/
+    100000000,      /* The Rx RF passband bandwidth for the profile*/
+    100000,         /* Rx BBF 3dB corner in kHz*/
+    NULL            /* pointer to custom ADC profile*/
+};
+
+
+static mykonosRxProfile_t snifferProfile =
+{ /* SRx 20MHz, IQrate 30.72MSPS, Dec5 */
+    1,              /* The divider used to generate the ADC clock*/
+    &snifferRxFir,  /* Pointer to Rx FIR filter structure or NULL*/
+    4,              /* Rx FIR decimation (1,2,4)*/
+    5,              /* Decimation of Dec5 or Dec4 filter (5,4)*/
+    0,              /* If set, and DEC5 filter used, will use a higher rejection DEC5 FIR filter (1=Enabled, 0=Disabled)*/
+    2,              /* RX Half band 1 decimation (1 or 2)*/
+    30720,          /* Rx IQ data rate in kHz*/
+    10000000,       /* The Rx RF passband bandwidth for the profile*/
+    100000,         /* Rx BBF 3dB corner in kHz*/
+    NULL            /* pointer to custom ADC profile*/
+};
+
+
+
+static mykonosTxProfile_t txProfile =
+{ /* Tx 20/100MHz, IQrate 122.88MSPS, Dec5 */
+    DACDIV_2p5,     /* The divider used to generate the DAC clock*/
+    &txFir,         /* Pointer to Tx FIR filter structure*/
+    2,              /* The Tx digital FIR filter interpolation (1,2,4)*/
+    2,              /* Tx Halfband1 filter interpolation (1,2)*/
+    1,              /* Tx Halfband2 filter interpolation (1,2)*/
+    1,              /* TxInputHbInterpolation (1,2)*/
+    122880,         /* Tx IQ data rate in kHz*/
+	100000000,      /* Primary Signal BW*/
+    100000000,      /* The Tx RF passband bandwidth for the profile*/
+    710539,         /* The DAC filter 3dB corner in kHz*/
+    50000,          /* Tx BBF 3dB corner in kHz*/
+    0               /* Enable DPD, only valid for AD9373*/
+};
+
+static mykonosDigClocks_t mykonosClocks =
+{
+    122880,         /* CLKPLL and device reference clock frequency in kHz*/
+    9830400,        /* CLKPLL VCO frequency in kHz*/
+    VCODIV_2,       /* CLKPLL VCO divider*/
+    4               /* CLKPLL high speed clock divider*/
+};
+
+static mykonosRxSettings_t  rxSettings =
+{
+    &rxProfile,     /* Rx datapath profile, 3dB corner frequencies, and digital filter enables*/
+    &rxFramer,      /* Rx JESD204b framer configuration structure*/
+    &rxGainControl, /* Rx Gain control settings structure*/
+    &rxAgcConfig,   /* Rx AGC control settings structure*/
+	RX1_RX2,        /* The desired Rx Channels to enable during initialization*/
+    0,              /* Internal LO = 0, external LO*2 = 1*/
+    2550000000U,    /* Rx PLL LO Frequency (internal or external LO)*/
+    0               /* Flag to choose if complex baseband or real IF data are selected for Rx and ObsRx paths. Where, if > 0 = real IF data, '0' = zero IF (IQ) data*/
+};
+
+static mykonosDpdConfig_t dpdConfig =
+{
+    5,              /* 1/2^(damping + 8) fraction of power `forgotten' per sample (default: `1/8192' = 5, valid 0 to 15), 0 = infinite damping*/
+    1,              /* number of weights to use for int8_cpx weights weights member of this structure (default = 1)*/
+    2,              /* DPD model version: one of four different generalized polynomial models: 0 = same as R0 silicon, 1-3 are new and the best one depends on the PA (default: 2)*/
+    1,              /* 1 = Update saved model whenever peak Tx digital RMS is within 1dB of historical peak Tx RMS*/
+    20,             /* Determines how much weight the loaded prior model has on DPD modeling (Valid 0 - 32, default 20)*/
+    0,              /* Default off = 0, 1=enables automatic outlier removal during DPD modeling */
+    512,            /* Number of samples to capture (default: 512, valid 64-32768)*/
+    4096,           /* threshold for sample in AM-AM plot outside of 1:1 line to be thrown out. (default: 50% = 8192/2, valid 8192 to 1)*/
+    0,              /* 16th of an ORx sample (16=1sample), (default 0, valid -64 to 64)*/
+    255,            /* Default 255 (-30dBFs=(20Log10(value/8192)), (valid range  1 to 8191)*/
+    {{64,0},{0,0},{0,0}}/* DPD model error weighting (real/imag valid from -128 to 127)*/
+};
+
+static mykonosClgcConfig_t clgcConfig =
+{
+    -2000,          /* (value = 100 * dB (valid range -32768 to 32767) - total gain and attenuation from Mykonos Tx1 output to ORx1 input in (dB * 100)*/
+    -2000,          /* (value = 100 * dB (valid range -32768 to 32767) - total gain and attenuation from Mykonos Tx2 output to ORx2 input in (dB * 100)*/
+    0,              /* (valid range 0 - 40dB), no default, depends on PA, Protects PA by making sure Tx1Atten is not reduced below the limit*/
+    0,              /* (valid range 0 - 40dB), no default, depends on PA, Protects PA by making sure Tx2Atten is not reduced below the limit*/
+    75,             /* valid range 1-100, default 75*/
+    75,             /* valid range 1-100, default 45*/
+    0,              /* 0= allow CLGC to run, but Tx1Atten will not be updated. User can still read back power measurements.  1=CLGC runs, and Tx1Atten automatically updated*/
+    0,              /* 0= allow CLGC to run, but Tx2Atten will not be updated. User can still read back power measurements.  1=CLGC runs, and Tx2Atten automatically updated*/
+    0,              /* 16th of an ORx sample (16=1sample), (default 0, valid -64 to 64)*/
+    255,            /* Default 255 (-30dBFs=(20Log10(value/8192)), (valid range  1 to 8191)*/
+    600,            /* Threshold for Tx1 in order to stop tracking, value = 100 * dB, default 6db then value = 600*/
+    600,            /* Threshold for Tx2 in order to stop tracking, value = 100 * dB, default 6db then value = 600*/
+    0,              /* Threshold feature enable for Tx1, 0 = disable, 1 = enable, default = 0*/
+    0               /* Threshold feature enable for Tx1, 0 = disable, 1 = enable, default = 0*/
+};
+
+static mykonosVswrConfig_t vswrConfig =
+{
+    0,              /* 16th of an ORx sample (16=1sample), (default 0, valid -64 to 64)*/
+    255,            /* Default 255 (-30dBFs=(20Log10(value/8192)), (valid range  1 to 8191)*/
+    0,              /* 3p3V GPIO pin to use to control VSWR switch for Tx1 (valid 0-11) (output from Mykonos)*/
+    1,              /* 3p3V GPIO pin to use to control VSWR switch for Tx2 (valid 0-11) (output from Mykonos)*/
+    0,              /* 3p3v GPIO pin polarity for forward path of Tx1, opposite used for reflection path (1 = high level, 0 = low level)*/
+    0,              /* 3p3v GPIO pin polarity for forward path of Tx2, opposite used for reflection path (1 = high level, 0 = low level)*/
+    50,             /* Delay for Tx1 after flipping the VSWR switch until measurement is made. In us resolution*/
+    50              /* Delay for Tx2 after flipping the VSWR switch until measurement is made. In us resolution*/
+};
+
+static mykonosTxSettings_t txSettings =
+{
+    &txProfile,     /* Tx datapath profile, 3dB corner frequencies, and digital filter enables*/
+    &deframer,      /* Mykonos JESD204b deframer config for the Tx data path*/
+    TX1_TX2,        /* The desired Tx channels to enable during initialization*/
+    0,              /* Internal LO=0, external LO*2 if =1*/
+    2500000000U,    /* Tx PLL LO frequency (internal or external LO)*/
+    TXATTEN_0P05_DB,/* Initial and current Tx1 Attenuation*/
+    10000,          /* Initial and current Tx1 Attenuation mdB*/
+    10000,          /* Initial and current Tx2 Attenuation mdB*/
+    NULL,           /* DPD,CLGC,VSWR settings. Only valid for AD9373 device, set pointer to NULL otherwise*/
+    NULL,           /* CLGC Config Structure. Only valid for AD9373 device, set pointer to NULL otherwise*/
+    NULL            /* VSWR Config Structure. Only valid for AD9373 device, set pointer to NULL otherwise*/
+};
+
+
+static mykonosObsRxSettings_t obsRxSettings =
+{
+    &orxProfile,    /* ORx datapath profile, 3dB corner frequencies, and digital filter enables*/
+    &orxGainControl,/* ObsRx gain control settings structure*/
+    &obsRxAgcConfig,/* ORx AGC control settings structure*/
+    &snifferProfile,/* Sniffer datapath profile, 3dB corner frequencies, and digital filter enables*/
+    &snifferGainControl,/* SnRx gain control settings structure*/
+    &obsRxFramer,   /* ObsRx JESD204b framer configuration structure */
+    (MYK_ORX1_ORX2 | MYK_SNRXA_B_C),/* obsRxChannel */
+    OBSLO_TX_PLL,   /* (obsRxLoSource) The Obs Rx mixer can use the Tx Synth(TX_PLL) or Sniffer Synth (SNIFFER_PLL) */
+    2600000000U,    /* SnRx PLL LO frequency in Hz */
+    0,              /* Flag to choose if complex baseband or real IF data are selected for Rx and ObsRx paths. Where if > 0 = real IF data, '0' = complex data*/
+    NULL,           /* Custom Loopback ADC profile to set the bandwidth of the ADC response */
+    OBS_RXOFF       /* Default ObsRx channel to enter when radioOn called */
+};
+
+static mykonosArmGpioConfig_t armGpio =
+{
+    1,	// useRx2EnablePin; /*!< 0= RX1_ENABLE controls RX1 and RX2, 1 = separate RX1_ENABLE/RX2_ENABLE pins */
+    1,	// useTx2EnablePin; /*!< 0= TX1_ENABLE controls TX1 and TX2, 1 = separate TX1_ENABLE/TX2_ENABLE pins */
+    0,	// txRxPinMode;     /*!< 0= ARM command mode, 1 = Pin mode to power up Tx/Rx chains */
+    0,	// orxPinMode;      /*!< 0= ARM command mode, 1 = Pin mode to power up ObsRx receiver*/
+
+    /*Mykonos ARM input GPIO pins -- Only valid if orxPinMode = 1 */
+    0,	// orxTriggerPin; /*!< Select desired GPIO pin (valid 4-15) */
+    0,	// orxMode2Pin;   /*!< Select desired GPIO pin (valid 0-18) */
+    0,	// orxMode1Pin;   /*!< Select desired GPIO pin (valid 0-18) */
+    0,	// orxMode0Pin;   /*!< Select desired GPIO pin (valid 0-18) */
+
+    /* Mykonos ARM output GPIO pins  --  always available, even when pin mode not enabled*/
+    0,	// rx1EnableAck;  /*!< Select desired GPIO pin (0-15), [4] = Output Enable */
+    0,	// rx2EnableAck;  /*!< Select desired GPIO pin (0-15), [4] = Output Enable */
+    0,	// tx1EnableAck;  /*!< Select desired GPIO pin (0-15), [4] = Output Enable */
+    0,	// tx2EnableAck;  /*!< Select desired GPIO pin (0-15), [4] = Output Enable */
+    0,	// orx1EnableAck;  /*!< Select desired GPIO pin (0-15), [4] = Output Enable */
+    0,	// orx2EnableAck;  /*!< Select desired GPIO pin (0-15), [4] = Output Enable */
+    0,	// srxEnableAck;  /*!< Select desired GPIO pin (0-15), [4] = Output Enable */
+    0 	// txObsSelect;   /*!< Select desired GPIO pin (0-15), [4] = Output Enable */
+    /* When 2Tx are used with only 1 ORx input, this GPIO tells the BBIC which Tx channel is   */
+    /* active for calibrations, so BBIC can route correct RF Tx path into the single ORx input*/
+};
+
+static mykonosGpio3v3_t gpio3v3 =
+{
+    0,				/*!< Oe per pin, 1=output, 0 = input */
+    GPIO3V3_BITBANG_MODE,	/*!< Mode for GPIO3V3[3:0] */
+    GPIO3V3_BITBANG_MODE,	/*!< Mode for GPIO3V3[7:4] */
+    GPIO3V3_BITBANG_MODE,	/*!< Mode for GPIO3V3[11:8] */
+};
+
+static mykonosGpioLowVoltage_t gpio =
+{
+    0,/* Oe per pin, 1=output, 0 = input */
+    GPIO_MONITOR_MODE,/* Mode for GPIO[3:0] */
+    GPIO_MONITOR_MODE,/* Mode for GPIO[7:4] */
+    GPIO_MONITOR_MODE,/* Mode for GPIO[11:8] */
+    GPIO_MONITOR_MODE,/* Mode for GPIO[15:12] */
+    GPIO_MONITOR_MODE,/* Mode for GPIO[18:16] */
+};
+
+static mykonosAuxIo_t mykonosAuxIo =
+{
+    0,	//auxDacEnableMask uint16_t
+    {0,0,0,0,0,0,0,0,0,0},	 //AuxDacValue uint16[10]
+    {0,0,0,0,0,0,0,0,0,0},	 //AuxDacSlope uint8[10]
+    {0,0,0,0,0,0,0,0,0,0},	 //AuxDacVref uint8[10]
+    &gpio3v3,	//pointer to gpio3v3 struct
+    &gpio,	//pointer to gpio1v8 struct
+    &armGpio
+};
+
+static const spiSettings_t mykSpiSettings =
+{
+    .chipSelectIndex = AD9371_CS, /* chip select index - valid 1~8 */
+    .writeBitPolarity = 0, /* the level of the write bit of a SPI write instruction word, value is inverted for SPI read operation */
+    .longInstructionWord = 1, /* 1 = 16-bit instruction word, 0 = 8-bit instruction word */
+    .MSBFirst = 1, /* 1 = MSBFirst, 0 = LSBFirst */
+    .CPHA = 0, /* clock phase, sets which clock edge the data updates (valid 0 or 1) */
+    .CPOL = 0, /* clock polarity 0 = clock starts low, 1 = clock starts high */
+    .enSpiStreaming = 0, /* Not implemented in ADIs platform layer. SW feature to improve SPI throughput */
+    .autoIncAddrUp = 1, /* Not implemented in ADIs platform layer. For SPI Streaming, set address increment direction. 1= next addr = addr+1, 0:addr=addr-1 */
+    .fourWireMode = 1,  /* 1: Use 4-wire SPI, 0: 3-wire SPI (SDIO pin is bidirectional). NOTE: ADI's FPGA platform always uses 4-wire mode */
+	.spiClkFreq_Hz = 25000000 /* Set but not used*/
+};
+
+static mykonosTempSensorConfig_t tempSensor =
+{
+    7,              /* 3-bit value that controls the AuxADC decimation factor when used for temp sensor calculations; AuxADC_decimation = 256 * 2^tempDecimation*/
+    67,             /* 8-bit offset that gets added to temp sensor code internally*/
+    1,              /* this bit overrides the factory-calibrated fuse offset and uses the value stored in the offset member*/
+    15,             /* 4-bit code with a resolution of 1°C/LSB, each time a temperature measurement is performed, the device compares the current temperature against the previous value.*/
+};
+
+static mykonosTempSensorStatus_t tempStatus =
+{
+    0,              /* 16-bit signed temperature value (in deg C) that is read back*/
+    0,              /* If the absolute value of the difference is greater than the value in temperature configuration tempWindow, the windowExceeded flag is set.*/
+    0,              /* when windowExceeded member gets set, this bit is set to 1 if current value is greater than previous value, else reset*/
+    0,              /* when the reading is complete and a valid temperature value stored in tempCode.*/
+};
+
+mykonosDevice_t mykDevice =
+{
+    &mykSpiSettings,    /* SPI settings data structure pointer */
+    &rxSettings,        /* Rx settings data structure pointer */
+    &txSettings,        /* Tx settings data structure pointer */
+    &obsRxSettings,     /* ObsRx settings data structure pointer */
+    &mykonosAuxIo,          /* Auxiliary IO settings data structure pointer */
+    &mykonosClocks,     /* Holds settings for CLKPLL and reference clock */
+    0                   /* Mykonos initialize function uses this as an output to remember which profile data structure pointers are valid */
+};

dj_f1_ad9371/vitis_classic_autobuild/source/tp_hardware/myk_init.h

@@ -0,0 +1,24 @@
+/**
+ * \file myk_init.h
+ *
+ * \brief Contains structure definitions for myk_init.c
+ *
+ * The top level structure mykonosDevice_t mykDevice uses keyword
+ * extern to allow the application layer main() to have visibility
+ * to these settings.
+ */
+
+/**
+* \page Disclaimer Legal Disclaimer
+* Copyright 2015-2017 Analog Devices Inc.
+* Released under the AD9371 API license, for more information see the "LICENSE.txt" file in this zip file.
+*
+*/
+
+#ifndef MYK_INIT_H_
+#define MYK_INIT_H_
+
+
+extern mykonosDevice_t mykDevice;
+
+#endif

dj_f1_ad9371/vitis_classic_autobuild/source/tp_hardware/mykonos/Mykonos_M3.h

@@ -0,0 +1,13 @@
+/**
+SOFTWARE LICENSE AGREEMENT
+20180301-AD937X-CTSLA
+**/
+
+// Version 5.2.2
+#ifndef SRC_MYKONOS_BIN_H_
+#define SRC_MYKONOS_BIN_H_
+
+extern unsigned char firmware_Mykonos_M3_bin[];
+extern unsigned int firmware_Mykonos_M3_bin_len;
+
+#endif

dj_f1_ad9371/vitis_classic_autobuild/source/tp_hardware/mykonos/ad9528.c

@@ -0,0 +1,556 @@
+/**
+ * \file ad9528.c
+ * \brief Contains source code for configuring and initializing AD9528 clock device
+ */
+
+/**
+* \page Disclaimer Legal Disclaimer
+* Copyright 2015-2017 Analog Devices Inc.
+* Released under the AD9371 API license, for more information see the "LICENSE.txt" file in this zip file.
+*
+*/
+
+#include <stddef.h>
+#include "ad9528.h"
+
+/**
+ * \brief Performs a hard reset on the AD9528 DUT
+ *
+ * <B>Dependencies</B>
+ * - device->spiSettings->chipSelectIndex
+ *
+ * \param device is structure pointer to the AD9528 data structure containing settings
+ * \return Returns enum ADI_ERR, ADIERR_OK=pass, !ADIERR_OK=fail
+ */
+ADI_ERR AD9528_resetDevice(ad9528Device_t *device)
+{
+    /* toggle RESETB on device with matching spi chip select index */
+    CMB_hardReset(device->spiSettings->chipSelectIndex);
+    return ADIERR_OK;
+}
+
+/**
+ * \brief Sets the AD9528 device SPI settings (3wire/4wire, MSBFirst, etc).
+ *
+ * This function will use the settings in the device->spiSettings structure
+ * to set SPI stream mode, address auto increment direction, MSBFirst/LSBfirst,
+ * and 3wire/4wire mode.  The AD9528 device always uses SPI MODE 0 (CPHA=0, CPOL=0).
+ * This function will update your device->spiSettings to set CHPA=0 and CPOL=0 and
+ * longInstructionWord =1 to use a 16bit instruction word.
+ *
+ * <B>Dependencies</B>
+ * - writes device->spiSettings->CPHA = 0
+ * - writes device->spiSettings->CPOL = 0
+ * - writes device->spiSettings->longInstructionWord = 1
+ *
+ * - device->spiSettings->MSBFirst
+ * - device->spiSettings->enSpiStreaming
+ * - device->spiSettings->autoIncAddrUp
+ * - device->spiSettings->fourWireMode
+ *
+ * \param device is structure pointer to the AD9528 data structure containing settings
+ *
+ * \return Returns enum ADI_ERR, ADIERR_OK=pass, !ADIERR_OK=fail
+ */
+ADI_ERR AD9528_setSpiSettings(ad9528Device_t *device)
+{
+    uint8_t spiReg = 0;
+
+    if (device->spiSettings->MSBFirst == 0)
+    {
+        spiReg |= 0x42; /* SPI bit is 1=LSB first */
+    }
+
+    if (device->spiSettings->autoIncAddrUp != 0)
+    {
+        spiReg |= 0x24;
+    }
+
+    if (device->spiSettings->fourWireMode != 0)
+    {
+        spiReg |= 0x18;
+    }
+
+    CMB_SPIWriteByte(device->spiSettings, AD9528_ADDR_ADI_SPI_CONFIG_A, spiReg);
+
+    if (device->spiSettings->enSpiStreaming != 0)
+    {
+        /* Allow SPI streaming mode: SPI message ends when chip select deasserts */
+        CMB_SPIWriteByte(device->spiSettings, AD9528_ADDR_ADI_SPI_CONFIG_B, 0x00);
+    }
+    else
+    {
+        /* Force single instruction mode */
+        CMB_SPIWriteByte(device->spiSettings, AD9528_ADDR_ADI_SPI_CONFIG_B, 0x80);
+    }
+
+    return ADIERR_OK;
+}
+
+
+/**
+ * \brief Initializes the AD9528 by writing all SPI registers
+ *
+ * Initializes the AD9528 for use with the AD9369 transceiver.  Designed to work with
+ * a reference clock of 122.88MHz.  Reference clock is expected to be 30.72MHz.
+ * The output clocks from the AD9528 can run at 122.88M, 153.6M, 184.32M, 245.76M, or 307.2M.
+ * Typical setup: REFA frequency = 30.72, VCXO = 122.88MHz
+ * SYNC(SYSREF) pulses output at rate of 120kHz
+ *
+ * <B>Dependencies</B>
+ * - All parameters in device structure
+ *
+ * \param device is structure pointer to AD9528 clock device structure
+ *
+ * \return Returns enum ADI_ERR, 0=pass, >0 = fail
+ */
+ADI_ERR AD9528_initialize(ad9528Device_t *device) { //writes all registers to desired values, leaves clock outputs off, SYSREF output disabled.
+    ADI_ERR retval = ADIERR_OK;
+
+    CMB_writeToLog(ADIHAL_LOG_MESSAGE, device->spiSettings->chipSelectIndex, ADIERR_OK, "\n// AD9528_initialize\n");
+
+    retval = AD9528_setSpiSettings(device);
+    if (retval != ADIERR_OK)
+    {
+        return retval;
+    }
+
+	/* Check device information */
+	uint8_t regInfo = 0;
+	CMB_SPIReadByte(device->spiSettings, AD9528_ADDR_ADI_CHIP_TYPE, &regInfo);
+	HW_PRINT("AD9528 device chip type: 0x%02X (default=0x05)", regInfo);
+
+	CMB_SPIReadByte(device->spiSettings, AD9528_ADDR_ADI_SPI_VERSION, &regInfo);
+	HW_PRINT("AD9528 SPI version: 0x%02X (default=0x00)", regInfo);
+
+	CMB_SPIReadByte(device->spiSettings, AD9528_ADDR_ADI_VENDOR_ID_L, &regInfo);
+	HW_PRINT("AD9528 Vendor ID 0 : 0x%02X (0x56)", regInfo);
+
+	CMB_SPIReadByte(device->spiSettings, AD9528_ADDR_ADI_VENDOR_ID_H, &regInfo);
+	HW_PRINT("AD9528 Vendor ID 0 : 0x%02X (0x04)", regInfo);
+
+    /**********************************************************************
+     * Configure PLL1
+     **********************************************************************
+     */
+
+    CMB_SPIWriteByte(device->spiSettings, AD9528_ADDR_REF_A_DIVIDER_LSB,
+    		device->pll1Settings->refA_Divider & 0xFF);		//REF A div[7:0]
+    CMB_SPIWriteByte(device->spiSettings, AD9528_ADDR_REF_A_DIVIDER_MSB,
+    		(device->pll1Settings->refA_Divider >> 8) & 0x03); //REF A div[9:8]
+    CMB_SPIWriteByte(device->spiSettings, AD9528_ADDR_REF_B_DIVIDER_LSB,
+    		device->pll1Settings->refB_Divider & 0xFF);		//REF B div[7:0]
+    CMB_SPIWriteByte(device->spiSettings, AD9528_ADDR_REF_B_DIVIDER_MSB,
+    		(device->pll1Settings->refB_Divider >> 8) & 0x03); //REF B div[9:8]
+    CMB_SPIWriteByte(device->spiSettings, AD9528_ADDR_PLL1_N_DIV_LSB,
+    		device->pll1Settings->nDivider & 0xFF); //PLL1 N div[7:0]
+    CMB_SPIWriteByte(device->spiSettings, AD9528_ADDR_PLL1_N_DIV_MSB,
+    		(device->pll1Settings->nDivider >> 8) & 0x03); //PLL1 N div[9:8]
+    CMB_SPIWriteByte(device->spiSettings, AD9528_ADDR_PLL1_CHARGEPUMP,
+    		0x0A); //PLL1 Charge Pump control 1
+    CMB_SPIWriteByte(device->spiSettings, AD9528_ADDR_PLL1_CP_CTRL2,
+    		0x03); //PLL1 Charge Pump control 2
+
+    uint8_t reg108 = 0;
+    uint8_t reg109 = 0;
+    switch (device->pll1Settings->refA_bufferCtrl){
+        case DISABLED:
+        	reg108 &= ~0x28;
+        	reg109 &= ~0x01;
+        	break; //clear all REFA enable bits
+        case SINGLE_ENDED:
+        	reg108 |=  0x08;
+        	reg109 &= ~0x01;
+        	break; //Set REFA receiver enable, clear REFA SE negative input enable
+        case NEG_SINGLE_ENDED:
+        	reg108 |=  0x08;
+        	reg108 &= ~0x10;
+        	reg109 |= 0x01;
+        	break; //Disable REFA diff receiver, enable REFA receiver and use negative REFA input
+        case DIFFERENTIAL:
+        	reg108 |=  0x28;
+        	reg109 &= ~0x01;
+        	break;
+        default:
+        	reg108 |=  0x08;
+        	reg109 &= ~0x01;
+        	break; //default to single ended case
+    }
+    switch (device->pll1Settings->refB_bufferCtrl){
+        case DISABLED:
+        	reg108 &= ~0x50;
+        	reg109 &= ~0x02;
+        	break; //clear all REFB enable bits
+        case SINGLE_ENDED:
+        	reg108 |=  0x10;
+        	reg109 &= ~0x02;
+        	break; //Set REFB receiver enable, clear REFB SE negative input enable
+        case NEG_SINGLE_ENDED:
+        	reg108 |=  0x10;
+        	reg108 &= ~0x40;
+        	reg109 |= 0x02;
+        	break; //Disable REFB diff receiver, enable REFB receiver and use negative REFB input
+        case DIFFERENTIAL:
+        	reg108 |=  0x50;
+        	reg109 &= ~0x02;
+        	break;
+        default:
+        	reg108 |=  0x10;
+        	reg109 &= ~0x02;
+        	break; //default to single ended case
+    }
+    switch (device->pll1Settings->vcxoBufferCtrl){
+        case DISABLED:
+        	reg108 &= ~0x03;
+        	reg108 |=  0x04;
+        	break; //power down VCXO input
+        case SINGLE_ENDED:
+        	reg108 &= ~0x07;
+        	break; //Clear VCXO receiver power down, defaults to Single ended mode
+        case NEG_SINGLE_ENDED:
+        	reg108 &= ~0x07;
+        	reg108 |=  0x02;
+        	break; //Clear VCXO power down, enable Negative single ended mode[1]
+        case DIFFERENTIAL:
+        	reg108 &= ~0x07;
+        	reg108 |=  0x01;
+        	break; //Clear VCXO power down, enable differential input buffer[0]
+        default:
+        	reg108 &= ~0x07;
+        	break; //default to positive single ended case
+    }
+
+
+    CMB_SPIWriteByte(device->spiSettings, AD9528_ADDR_INPUT_RECEIVERS1,
+    		reg108); //Input receiver settings (single ended or differential clock inputs)
+    CMB_SPIWriteByte(device->spiSettings, AD9528_ADDR_INPUT_RECEIVERS2,
+    		reg109); //Input receiver settings
+
+
+    CMB_SPIWriteByte(device->spiSettings, AD9528_ADDR_INPUT_RECEIVERS3,
+    		0x0A); //Reference selection mode
+    CMB_SPIWriteByte(device->spiSettings, AD9528_ADDR_PLL1_FASTLOCK,
+    		0x00); //Disable Fast lock
+
+    /**********************************************************************
+     * Configure PLL2
+     **********************************************************************
+     */
+    uint8_t pll2_Bdiv = device->pll2Settings->totalNdiv / 4;
+    uint8_t pll2_Adiv = device->pll2Settings->totalNdiv % 4;
+
+    if (pll2_Adiv > 3) {  //A div valid range (0 to 3)
+        CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, ADIERR_INV_PARM, "\n// AD9528 PLL2 A Divider out of range (0 to 3)\n");
+        return ADIERR_INV_PARM;
+    }
+    if (pll2_Bdiv < 3 || pll2_Bdiv > 63) {
+        CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, ADIERR_INV_PARM, "\n// AD9528 PLL2 B Divider out of range (3 to 63)\n");
+        return ADIERR_INV_PARM;
+    }
+    CMB_SPIWriteByte(device->spiSettings, AD9528_ADDR_PLL2_CHARGEPUMP,
+    		0xE6); //PLL2 Charge Pump[7:0]
+    CMB_SPIWriteByte(device->spiSettings, AD9528_ADDR_PLL2_N_DIV,
+    		((pll2_Adiv & 0x3) << 6) | (pll2_Bdiv & 0x3F)); //PLL2 A and B divider
+    CMB_SPIWriteByte(device->spiSettings, AD9528_ADDR_PLL2_CTRL, 0x03); //PLL2 control
+    CMB_SPIWriteByte(device->spiSettings, AD9528_ADDR_PLL2_VCO_CTRL, 0x01); //Manual VCO CAL
+
+    if (device->pll2Settings->rfDivider < 3 || device->pll2Settings->rfDivider > 5) {
+        CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, ADIERR_INV_PARM, "\n// AD9528 PLL2 RF Divider out of range (3,4, or 5)\n");
+        return ADIERR_INV_PARM;
+    }
+
+    CMB_SPIWriteByte(device->spiSettings, AD9528_ADDR_PLL2_VCO_DIV,
+    		device->pll2Settings->rfDivider); //VCO divider
+    CMB_SPIWriteByte(device->spiSettings, AD9528_ADDR_PLL2_LF_CTRL1,
+    		0x3A); //PLL2 Loop filter [7:0]
+    CMB_SPIWriteByte(device->spiSettings, AD9528_ADDR_PLL2_LF_CTRL2,
+    		0x00); //PLL2 Loop filter [8]
+    CMB_SPIWriteByte(device->spiSettings, AD9528_ADDR_PLL2_RDIV,
+    		0x00); //R divider
+    CMB_SPIWriteByte(device->spiSettings, AD9528_ADDR_PLL2_REPLICA_CHDIV,
+    		(device->pll2Settings->totalNdiv / device->pll2Settings->rfDivider)
+			-1 ); //Replica channel divider: Ndivider = rfDivider * R divider
+    CMB_SPIWriteByte(device->spiSettings, AD9528_ADDR_PLL2_REPLICA_DIV_PHASE,
+    		0x00); //Replica Channel Divider phase
+
+    /**********************************************************************
+     * Configure Output Distribution
+     **********************************************************************
+     */
+    uint16_t offset = 0;
+    for (int i = 0; i < 14; ++i){
+        CMB_SPIWriteByte(device->spiSettings, AD9528_ADDR_CH_OUT0_CTRL1 + offset,
+        		((device->outputSettings->outSource[i] & 0x7) << 5) |
+				(device->outputSettings->outAnalogDelay[i] & 0x1F));
+        CMB_SPIWriteByte(device->spiSettings, AD9528_ADDR_CH_OUT0_CTRL2 + offset,
+        		((device->outputSettings->outBufferCtrl[i] & 0x3) << 6) |
+				(device->outputSettings->outDigitalDelay[i] & 0x3F));
+        CMB_SPIWriteByte(device->spiSettings, AD9528_ADDR_CH_OUT0_CHDIV + offset,
+        		device->outputSettings->outChannelDiv[i]-1);
+        offset += 3;
+    }
+
+    CMB_SPIWriteByte(device->spiSettings, AD9528_ADDR_OUTPUT_SYNC, 0x00); //Sync outputs
+    CMB_SPIWriteByte(device->spiSettings, AD9528_ADDR_MASK_SYNC1, 0x00); //Mask SYNC[7:0]
+    CMB_SPIWriteByte(device->spiSettings, AD9528_ADDR_MASK_SYNC2, 0x00); //Mask SYNC[13:8]
+    CMB_SPIWriteByte(device->spiSettings, AD9528_ADDR_EN_OUTPUT_PATH_SEL1,
+    		0x00); //Bypass SYSREF resample [6:0], bit0:Enable VCXO to feed output distrubution
+    CMB_SPIWriteByte(device->spiSettings, AD9528_ADDR_EN_OUTPUT_PATH_SEL2,
+    		0x00); //Bypass SYSREF resample [13:7]
+
+    /**********************************************************************
+     * Configure SYSREF operation
+     **********************************************************************
+     */
+    CMB_SPIWriteByte(device->spiSettings, AD9528_ADDR_SYSERF_DIV_LSB,
+    		device->sysrefSettings->sysrefDivide & 0xFF); //SYSREF divider [7:0]
+    CMB_SPIWriteByte(device->spiSettings, AD9528_ADDR_SYSERF_DIV_MSB,
+    		(device->sysrefSettings->sysrefDivide >> 8) & 0xFF); //SYSREF divider [7:0]
+
+    CMB_SPIWriteByte(device->spiSettings, AD9528_ADDR_SYSREF_CTRL3,
+    		((device->sysrefSettings->sysrefRequestMethod & 0x1) << 7) |
+    		((device->sysrefSettings->sysrefPinEdgeMode & 0x3) << 5) );
+
+    CMB_SPIWriteByte(device->spiSettings, AD9528_ADDR_SYSREF_CTRL4,
+    		((device->sysrefSettings->sysrefSource & 0x03) << 6) |
+    		((device->sysrefSettings->sysrefPatternMode & 0x3) << 4 ) |
+    		((device->sysrefSettings->sysrefNshotMode & 0x7) << 1) );
+
+    if(device->sysrefSettings->sysrefPinBufferMode == DISABLED)
+    {
+    	CMB_SPIWriteByte(device->spiSettings, AD9528_ADDR_SYSREF_CTRL5,
+    			0x04); //power down input buffer for external SYSREF
+    }
+    else if(device->sysrefSettings->sysrefPinBufferMode == SINGLE_ENDED)
+    {
+    	CMB_SPIWriteByte(device->spiSettings, AD9528_ADDR_SYSREF_CTRL5,
+    			0x00); //enable positive singled ended input
+    }
+    else if(device->sysrefSettings->sysrefPinBufferMode == NEG_SINGLE_ENDED)
+    {
+    	CMB_SPIWriteByte(device->spiSettings, AD9528_ADDR_SYSREF_CTRL5,
+    			0x02); //enable negative singled ended input
+    }
+    else if(device->sysrefSettings->sysrefPinBufferMode == DIFFERENTIAL)
+    {
+    	CMB_SPIWriteByte(device->spiSettings, AD9528_ADDR_SYSREF_CTRL5,
+    			0x01); //enable differential input buffer
+    }
+    else
+    {
+    	CMB_SPIWriteByte(device->spiSettings, AD9528_ADDR_SYSREF_CTRL5,
+    			0x04); //power down input buffer for external SYSREF
+    }
+
+    /**********************************************************************
+     * Power down control
+     **********************************************************************
+     */
+
+    if (device->pll1Settings->bypassPll1 > 0)
+    {
+        CMB_SPIWriteByte(device->spiSettings, AD9528_ADDR_POWERDOWN_CTRL,
+        		0x14);// power up PLL2 and output distribution, power down PLL1
+    }
+    else
+    {
+        CMB_SPIWriteByte(device->spiSettings, AD9528_ADDR_POWERDOWN_CTRL,
+        		0x10);// power up PLL1, PLL2 and output distribution
+    }
+
+    CMB_SPIWriteByte(device->spiSettings, AD9528_ADDR_CH_POWERDOWN1,
+    		device->outputSettings->outPowerDown & 0xFF); //power down out[7:0]
+    CMB_SPIWriteByte(device->spiSettings, AD9528_ADDR_CH_POWERDOWN2,
+    		((device->outputSettings->outPowerDown >> 8) & 0x3F)); //power down out[13:8]
+    CMB_SPIWriteByte(device->spiSettings, AD9528_ADDR_LDO_ENABLES1,
+    		0xFF); //LDO enable per output channel [7:0]
+    CMB_SPIWriteByte(device->spiSettings, AD9528_ADDR_LDO_ENABLES2,
+    		0xFF); //LDO enable per output channel [15:8]
+    CMB_SPIWriteByte(device->spiSettings, AD9528_ADDR_STATUS0_CTRL,
+    		0x07); //STATUS 0 outputs REFA present
+    CMB_SPIWriteByte(device->spiSettings, AD9528_ADDR_STATUS1_CTRL,
+    		0x01); //STATUS 1 outputs PLL1 and PLL2 locked
+    CMB_SPIWriteByte(device->spiSettings, AD9528_ADDR_STATUS_OE,
+    		0x0C);// Make Status0 and Status1 outputs after reset.
+
+    CMB_SPIWriteByte(device->spiSettings, AD9528_ADDR_IO_UPDATE,
+    		0x01); //IO update to make all these settings valid in the 9528
+
+    uint8_t reg508 = 0;
+    CMB_setTimeout_ms(1000);
+     do{
+         CMB_SPIReadByte(device->spiSettings, AD9528_ADDR_STATUS_READBACK0, &reg508);
+         if(CMB_hasTimeoutExpired() > 0)
+         {
+             return ADIERR_FAILED;
+         }
+     }while((reg508 & 0xA2) != 0xA2);
+
+    return ADIERR_OK;
+}
+
+/// Send a SPI message to request a SYSREF pulse or continuous SYSREF from the AD9528.
+/*******************************************************************************//**
+ * Requests a SYSREF from the AD9528.  It will use whatever settings for SYSREF
+ * that are current configured in the AD9528.  This could be a single pulse,
+ * multiple pulses, or continuous pulses.
+ * <B>Dependencies</B>
+ * - device->spiSettings
+ * - device->sysrefSettings->sysrefPatternMode
+ *
+ * \param device is structure pointer to AD9528 clock device structure
+ * \param enableSYSREF If NSHOT SYSREF mode, this parameter is ignored.  If PRBS/CONTINUOUS SYSREF mode, 1= enable SYSREF, 0= disable SYSREF.
+ *
+ * \return Returns enum ADI_ERR, 0=pass, >0 = fail
+ ***********************************************************************************/
+ADI_ERR AD9528_requestSysref(ad9528Device_t *device, uint8_t enableSYSREF){
+    uint8_t _enableSYSREF=0;
+
+    if (device->sysrefSettings->sysrefPatternMode == NSHOT || enableSYSREF > 0)
+    {
+        _enableSYSREF = 1;
+    }
+    else
+    {
+        _enableSYSREF = 0;
+    }
+
+    CMB_SPIWriteField(device->spiSettings, AD9528_ADDR_SYSREF_CTRL4, _enableSYSREF, 0x01, 0x00); //Set SPI SYSREF request bit
+    CMB_SPIWriteByte(device->spiSettings, AD9528_ADDR_IO_UPDATE, 0x01); //IO update to make all these settings valid in the 9528
+
+    return ADIERR_OK;
+}
+
+/// Allow changing the 9528 SYSREF frequency and pattern mode(CONTINUOUS, PRBS vs NSHOT mode)
+/*******************************************************************************//**
+ * NOTE: this function will update the device structure with the parameter values passed
+ * into this function. The device->sysrefSettings->sysrefPatternMode, device->sysrefSettings->sysrefNshotMode,
+ * and device->sysrefSettings->sysrefDivide values will be updated in the device structure.
+ *
+ * <B>Dependencies</B>
+ * - device->spiSettings
+ *
+ * \param device is structure pointer to AD9528 clock device structure
+ * \param divideFromPll1Out Sets the SYSREF pulse frequency. SYSREF frequency = PLL1_VCXO frequency/divideFromPll1Out
+ * \param sysrefPatternMode Valid settings: NSHOT, CONTINUOUS, PRBS, STOP
+ * \param nShotPulses Valid settings: ONE_PULSE=0, TWO_PULSES=2, FOUR_PULSES=3, SIX_PULSES=4, EIGHT_PULSES=5
+ *
+ * \return Returns enum ADI_ERR, 0=pass, >0 = fail
+ ***********************************************************************************/
+ADI_ERR AD9528_setupSYSREF(ad9528Device_t *device, uint16_t divideFromPll1Out,  sysrefPatternMode_t sysrefPatternMode, sysrefNshotMode_t nShotPulses)
+{
+    uint8_t reg403=0;
+
+    device->sysrefSettings->sysrefPatternMode = sysrefPatternMode;
+    device->sysrefSettings->sysrefNshotMode = nShotPulses;
+    device->sysrefSettings->sysrefDivide = divideFromPll1Out >> 1;  //SYSREF frequency is (PLL1)VCXO frequency / 2 / device->sysrefSettings->sysrefDivide
+
+    CMB_SPIReadByte(device->spiSettings, AD9528_ADDR_SYSREF_CTRL4, &reg403);
+
+    reg403 = reg403 & ~0x01; //clear bit 0 to stop a continuous sysref if it is on.
+    CMB_SPIWriteByte(device->spiSettings, AD9528_ADDR_SYSREF_CTRL4, reg403);
+
+    reg403 = reg403 & ~0x3E; //clear bits for pattern mode and Nshot mode bitfields
+    reg403 = reg403 | ((sysrefPatternMode & 0x3) << 4) | ((nShotPulses & 0x7) << 1);
+    CMB_SPIWriteByte(device->spiSettings, AD9528_ADDR_SYSREF_CTRL4, reg403); //update internal sysref pattern mode and Nshot mode (number of pulses)
+
+    //SYSREF request bit x403[0] is left 0.  The next call to AD9528_requestSysref will start the SYSREF
+    CMB_SPIWriteByte(device->spiSettings, AD9528_ADDR_IO_UPDATE, 0x01); //IO update to make all these settings valid in the 9528
+
+
+    return ADIERR_OK;
+}
+
+/// Update the AD9528 clock outputs that are enabled.
+/*******************************************************************************//**
+ * NOTE: this function will update the device structure with the parameter values passed
+ * into this function. The device->sysrefSettings->sysrefPatternMode, device->sysrefSettings->sysrefNshotMode,
+ * and device->sysrefSettings->sysrefDivide values will be updated in the device structure.
+ *
+ * <B>Dependencies</B>
+ * - device->spiSettings
+ *
+ * \param device is structure pointer to AD9528 clock device structure
+ * \param clkEnable Sets which clock outputs are enabled. Bit per clock output. bit0 = out0, etc.
+ *
+ * \return Returns enum ADI_ERR, 0=pass, >0 = fail
+ ***********************************************************************************/
+ADI_ERR AD9528_enableClockOutputs(ad9528Device_t *device, uint16_t clkEnable)
+{ //clkEnable: bit per clock output
+
+    device->outputSettings->outPowerDown = ~clkEnable;
+    CMB_SPIWriteByte(device->spiSettings, AD9528_ADDR_CH_POWERDOWN1, device->outputSettings->outPowerDown & 0xFF); //power down out[7:0]
+    CMB_SPIWriteByte(device->spiSettings, AD9528_ADDR_CH_POWERDOWN2, ((device->outputSettings->outPowerDown >> 8) & 0x3F)); //power down out[13:8]
+
+    CMB_SPIWriteByte(device->spiSettings, AD9528_ADDR_IO_UPDATE, 0x01); //IO update to make all these settings valid in the 9528
+    return ADIERR_OK;
+}
+
+/// Waits for PLL1 and PLL2 to lock and the REFA and VCXO clocks to be present
+/*******************************************************************************//**
+ * Waits until Reference A clock and VCXO clock input to be detected (present),
+ * and PLL1 and PLL2 to lock.  Will timeout after 1 second and return ADIERR_FAILED.
+ * If clock are detected and PLLs locked, returns ADIERR_OK.
+ *
+ * <B>Dependencies</B>
+ * - device->spiSettings
+ *
+ * \param device is structure pointer to AD9528 clock device structure
+ *
+ * \return Returns enum ADI_ERR, 0=pass, >0 = fail
+ ***********************************************************************************/
+ADI_ERR AD9528_waitForPllLock(ad9528Device_t *device)
+{
+    uint8_t reg = 0;
+
+    CMB_setTimeout_ms(1000);
+    do{
+        CMB_SPIReadByte(device->spiSettings, AD9528_ADDR_STATUS_READBACK0, &reg);
+        if(CMB_hasTimeoutExpired() > 0)
+        {
+            return ADIERR_FAILED;
+        }
+    }while((reg & 0x27) != 0x27);
+
+    return ADIERR_OK;
+}
+
+/// Reads the Lock Status of the PLLs and present detect of the reference clocks
+/*******************************************************************************//**
+ * NOTE: This is a non blocking function that reads a register to see if PLL1
+ * and PLL2 are locked and Reference clock A and the VCXO input clock are
+ * detected (present). If the *status parameter is not NULL, the status will
+ * be returned.  If *status is NULL, the error return value will denote if
+ * the PllStatus is locked or not with ADIERR_OK or ADIERR_FAILED.
+ *
+ * <B>Dependencies</B>
+ * - device->spiSettings
+ *
+ * \param device is structure pointer to AD9528 clock device structure
+ *
+ * \return Returns enum ADI_ERR, 0=pass, >0 = fail
+ ***********************************************************************************/
+ADI_ERR AD9528_readPllStatus(ad9528Device_t *device, uint8_t *status)
+{
+    uint8_t reg = 0;
+
+    //bit5 is VCXO clock detected
+    //bit2 is REFCLK A detected
+    //bit1 is PLL2 lock detect
+    //bit0 is PLL1 lock detect
+
+    /* read twice to refresh status bits */
+    CMB_SPIReadByte(device->spiSettings, AD9528_ADDR_STATUS_READBACK0, &reg);
+    CMB_SPIReadByte(device->spiSettings, AD9528_ADDR_STATUS_READBACK0, &reg);
+    /* if status is a valid pointer, return the PLL status */
+    if (status != NULL)
+    {
+        *status = reg;
+    }
+
+    /* PLLs 1 and 2 are locked and VCXO and REFA detected if reg508 has bits 5,2,1 and 0 set */
+    if((reg & 0x27) == 0x27)
+        return ADIERR_OK;
+    else
+        return ADIERR_FAILED;
+}

dj_f1_ad9371/vitis_classic_autobuild/source/tp_hardware/mykonos/ad9528.h

@@ -0,0 +1,40 @@
+/**
+ * \file ad9528.h
+ * \brief Contains function declarations and ad9528Device_t structure typedef for ad9528.c
+ */
+
+/**
+* \page Disclaimer Legal Disclaimer
+* Copyright 2015-2017 Analog Devices Inc.
+* Released under the AD9371 API license, for more information see the "LICENSE.txt" file in this zip file.
+*
+*/
+
+#ifndef _AD9528_LIB_H_
+#define _AD9528_LIB_H_
+
+#include <stdint.h>
+#include "t_ad9528.h"
+#include "tp_hardware/hw_common.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define CLEMENTE_TDD_AD9528_CLKOUT_INDEX 13
+
+//AD9528 API functions
+ADI_ERR AD9528_resetDevice(ad9528Device_t *device);
+ADI_ERR AD9528_setSpiSettings(ad9528Device_t *device);
+ADI_ERR AD9528_initialize(ad9528Device_t *device); //writes all registers to desired values, leaves clock outputs off.
+ADI_ERR AD9528_waitForPllLock(ad9528Device_t *device);
+ADI_ERR AD9528_readPllStatus(ad9528Device_t *device, uint8_t *status);
+ADI_ERR AD9528_enableClockOutputs(ad9528Device_t *device, uint16_t clkEnable); //clkEnable: bit per clock output
+ADI_ERR AD9528_setupSYSREF(ad9528Device_t *device, uint16_t divideFromPll1Out,  sysrefPatternMode_t sysrefPatternMode, sysrefNshotMode_t nShotPulses);
+ADI_ERR AD9528_requestSysref(ad9528Device_t *device, uint8_t enableSYSREF);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif

dj_f1_ad9371/vitis_classic_autobuild/source/tp_hardware/mykonos/mykonos.h

@@ -0,0 +1,277 @@
+/*!
+ * \file mykonos.h
+ * \brief Contains macro definitions and function prototypes for mykonos.c
+ *
+ * Mykonos API version: 1.5.2.3566
+ */
+
+/**
+* \page Disclaimer Legal Disclaimer
+* Copyright 2015-2017 Analog Devices Inc.
+* Released under the AD9371 API license, for more information see the "LICENSE.txt" file in this zip file.
+*
+*/
+
+#ifndef _MYKONOS_LIB_H_
+#define _MYKONOS_LIB_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "t_mykonos.h"
+#include "mykonos_version.h"
+
+#define TX_PROFILE_VALID    0x01
+#define RX_PROFILE_VALID    0x02
+#define ORX_PROFILE_VALID   0x04
+#define SNIFF_PROFILE_VALID 0x08
+
+/* 
+ ****************************************************************************
+ * General Initialization functions 
+ ****************************************************************************
+ */
+mykonosErr_t MYKONOS_resetDevice(mykonosDevice_t *device);
+mykonosErr_t MYKONOS_getDeviceRev(mykonosDevice_t *device, uint8_t *revision);
+mykonosErr_t MYKONOS_getProductId(mykonosDevice_t *device, uint8_t *productId);
+mykonosErr_t MYKONOS_setSpiSettings(mykonosDevice_t *device);
+mykonosErr_t MYKONOS_verifyDeviceDataStructure(mykonosDevice_t *device);
+mykonosErr_t MYKONOS_verifyProfiles(mykonosDevice_t *device);
+mykonosErr_t MYKONOS_initialize(mykonosDevice_t *device); 
+mykonosErr_t MYKONOS_waitForEvent(mykonosDevice_t *device, waitEvent_t waitEvent, uint32_t timeout_us);
+mykonosErr_t MYKONOS_readEventStatus(mykonosDevice_t *device, waitEvent_t waitEvent, uint8_t *eventDone);
+mykonosErr_t MYKONOS_getApiVersion (mykonosDevice_t *device, uint32_t *siVer, uint32_t *majorVer, uint32_t *minorVer, uint32_t *buildVer);
+
+/*
+ *****************************************************************************
+ * PLL / Synthesizer functions
+ *****************************************************************************
+ */
+mykonosErr_t MYKONOS_initDigitalClocks(mykonosDevice_t *device);
+mykonosErr_t MYKONOS_setRfPllFrequency(mykonosDevice_t *device, mykonosRfPllName_t pllName, uint64_t rfPllLoFrequency_Hz);
+mykonosErr_t MYKONOS_getRfPllFrequency(mykonosDevice_t *device, mykonosRfPllName_t pllName, uint64_t *rfPllLoFrequency_Hz);
+mykonosErr_t MYKONOS_checkPllsLockStatus(mykonosDevice_t *device, uint8_t *pllLockStatus);
+mykonosErr_t MYKONOS_setRfPllLoopFilter(mykonosDevice_t *device, mykonosRfPllName_t pllName, uint16_t loopBandwidth_kHz, uint8_t stability);
+mykonosErr_t MYKONOS_getRfPllLoopFilter(mykonosDevice_t *device, mykonosRfPllName_t pllName, uint16_t *loopBandwidth_kHz, uint8_t *stability);
+/*
+ *****************************************************************************
+ * ARM Processor Control Functions
+ *****************************************************************************
+ */
+mykonosErr_t MYKONOS_initArm(mykonosDevice_t *device);
+mykonosErr_t MYKONOS_loadArmFromBinary(mykonosDevice_t *device, uint8_t *binary, uint32_t count);
+mykonosErr_t MYKONOS_loadArmConcurrent(mykonosDevice_t *device, uint8_t *binary, uint32_t count);
+mykonosErr_t MYKONOS_verifyArmChecksum(mykonosDevice_t *device);
+mykonosErr_t MYKONOS_checkArmState(mykonosDevice_t *device, mykonosArmState_t armStateCheck);
+mykonosErr_t MYKONOS_getArmVersion(mykonosDevice_t *device, uint8_t *majorVer, uint8_t *minorVer, uint8_t *rcVer, mykonosBuild_t *buildType);
+
+mykonosErr_t MYKONOS_configDpd(mykonosDevice_t *device);
+mykonosErr_t MYKONOS_getDpdConfig(mykonosDevice_t *device);
+mykonosErr_t MYKONOS_getDpdStatus(mykonosDevice_t *device, mykonosTxChannels_t txChannel, mykonosDpdStatus_t *dpdStatus);
+mykonosErr_t MYKONOS_restoreDpdModel(mykonosDevice_t *device, mykonosTxChannels_t txChannel, uint8_t *modelDataBuffer, uint32_t modelNumberBytes);
+mykonosErr_t MYKONOS_saveDpdModel(mykonosDevice_t *device, mykonosTxChannels_t txChannel, uint8_t *modelDataBuffer, uint32_t modelNumberBytes);
+mykonosErr_t MYKONOS_setDpdActState(mykonosDevice_t *device, mykonosTxChannels_t txChannel, uint8_t actState);
+mykonosErr_t MYKONOS_resetDpd(mykonosDevice_t *device, mykonosTxChannels_t txChannel, mykonosDpdResetMode_t reset);
+mykonosErr_t MYKONOS_setDpdBypassConfig(mykonosDevice_t *device, mykonosDpdBypassConfig_t *actConfig);
+mykonosErr_t MYKONOS_getDpdBypassConfig(mykonosDevice_t *device, mykonosDpdBypassConfig_t *actConfig);
+mykonosErr_t MYKONOS_setDpdActuatorCheck(mykonosDevice_t *device, mykonosDpdActuatorCheck_t *actCheck);
+mykonosErr_t MYKONOS_getDpdActuatorCheck(mykonosDevice_t *device, mykonosDpdActuatorCheck_t *actCheck);
+
+mykonosErr_t MYKONOS_setClgcAttenTuningConfig(mykonosDevice_t *device, mykonosClgcAttenTuningConfig_t *attRangeCfg);
+mykonosErr_t MYKONOS_getClgcAttenTuningConfig(mykonosDevice_t *device, mykonosClgcAttenTuningConfig_t *attRangeCfg);
+
+mykonosErr_t MYKONOS_configClgc(mykonosDevice_t *device);
+mykonosErr_t MYKONOS_getClgcConfig(mykonosDevice_t *device);
+mykonosErr_t MYKONOS_getClgcStatus(mykonosDevice_t *device, mykonosTxChannels_t txChannel, mykonosClgcStatus_t *clgcStatus);
+mykonosErr_t MYKONOS_setClgcGain(mykonosDevice_t *device, mykonosTxChannels_t txChannel, int16_t gain);
+
+mykonosErr_t MYKONOS_configVswr(mykonosDevice_t *device);
+mykonosErr_t MYKONOS_getVswrConfig(mykonosDevice_t *device);
+mykonosErr_t MYKONOS_getVswrStatus(mykonosDevice_t *device, mykonosTxChannels_t txChannel, mykonosVswrStatus_t *vswrStatus);
+
+mykonosErr_t MYKONOS_runInitCals(mykonosDevice_t *device, uint32_t calMask);
+mykonosErr_t MYKONOS_waitInitCals(mykonosDevice_t *device, uint32_t timeoutMs, uint8_t *errorFlag, uint8_t *errorCode);
+mykonosErr_t MYKONOS_abortInitCals(mykonosDevice_t *device, uint32_t *calsCompleted);
+mykonosErr_t MYKONOS_getInitCalStatus(mykonosDevice_t *device, mykonosInitCalStatus_t *initCalStatus);
+
+mykonosErr_t MYKONOS_resetExtTxLolChannel(mykonosDevice_t *device, mykonosTxChannels_t channelSel);
+
+mykonosErr_t MYKONOS_radioOn(mykonosDevice_t *device);
+mykonosErr_t MYKONOS_radioOff(mykonosDevice_t *device);
+mykonosErr_t MYKONOS_getRadioState(mykonosDevice_t *device, uint32_t *radioStatus);
+mykonosErr_t MYKONOS_enableTrackingCals(mykonosDevice_t *device, uint32_t enableMask);
+mykonosErr_t MYKONOS_rescheduleTrackingCal(mykonosDevice_t *device, mykonosTrackingCalibrations_t trackingCal);
+mykonosErr_t MYKONOS_setAllTrackCalState(mykonosDevice_t *device, uint32_t trackingCalMask);
+mykonosErr_t MYKONOS_getAllTrackCalState(mykonosDevice_t *device, uint32_t *trackCals);
+mykonosErr_t MYKONOS_setTrackingCalState(mykonosDevice_t *device, mykonosTrackingCalibrations_t trackingCal, uint8_t trackCalState);
+mykonosErr_t MYKONOS_getTrackingCalState(mykonosDevice_t *device, mykonosTrackingCalibrations_t trackingCal, uint8_t *trackCalState);
+mykonosErr_t MYKONOS_getEnabledTrackingCals(mykonosDevice_t *device, uint32_t *enableMask);
+mykonosErr_t MYKONOS_getPendingTrackingCals(mykonosDevice_t *device, uint32_t *pendingCalMask);
+mykonosErr_t MYKONOS_getTxLolStatus(mykonosDevice_t *device, mykonosTxChannels_t txChannel, mykonosTxLolStatus_t *txLolStatus);
+mykonosErr_t MYKONOS_getTxQecStatus(mykonosDevice_t *device, mykonosTxChannels_t txChannel, mykonosTxQecStatus_t *txQecStatus);
+
+mykonosErr_t MYKONOS_getRxQecStatus(mykonosDevice_t *device, mykonosRxChannels_t rxChannel, mykonosRxQecStatus_t *rxQecStatus);
+mykonosErr_t MYKONOS_getOrxQecStatus(mykonosDevice_t *device, mykonosObsRxChannels_t orxChannel, mykonosOrxQecStatus_t *orxQecStatus);
+
+mykonosErr_t MYKONOS_setSnifferChannel(mykonosDevice_t *device, mykonosSnifferChannel_t snifferChannel);
+mykonosErr_t MYKONOS_setRadioControlPinMode(mykonosDevice_t *device);
+
+mykonosErr_t MYKONOS_setPathDelay(mykonosDevice_t *device, mykonosPathdelay_t *pathDelay);
+mykonosErr_t MYKONOS_getPathDelay(mykonosDevice_t *device, mykonosPathDelaySel_t select, mykonosPathdelay_t *pathDelay);
+
+mykonosErr_t MYKONOS_getDpdErrorCounters(mykonosDevice_t *device,  mykonosTxChannels_t txChannel, mykonosDpdErrorCounters_t *dpdErrCnt);
+
+/* Low level ARM functions */
+mykonosErr_t MYKONOS_readArmMem(mykonosDevice_t *device, uint32_t address, uint8_t *returnData, uint32_t bytesToRead, uint8_t autoIncrement);
+mykonosErr_t MYKONOS_writeArmMem(mykonosDevice_t *device, uint32_t address, uint8_t *data, uint32_t byteCount);
+mykonosErr_t MYKONOS_writeArmConfig(mykonosDevice_t *device, uint8_t objectId, uint16_t offset, uint8_t *data, uint8_t byteCount);
+mykonosErr_t MYKONOS_readArmConfig(mykonosDevice_t *device, uint8_t objectId, uint16_t offset, uint8_t *data, uint8_t byteCount);
+mykonosErr_t MYKONOS_sendArmCommand(mykonosDevice_t *device, uint8_t opCode,  uint8_t *extendedData, uint8_t extendedDataNumBytes);
+mykonosErr_t MYKONOS_readArmCmdStatus(mykonosDevice_t *device, uint16_t *errorWord, uint16_t *statusWord);
+mykonosErr_t MYKONOS_readArmCmdStatusByte(mykonosDevice_t *device, uint8_t opCode, uint8_t *cmdStatByte);
+mykonosErr_t MYKONOS_waitArmCmdStatus(mykonosDevice_t *device, uint8_t opCode, uint32_t timeoutMs, uint8_t *cmdStatByte);
+mykonosErr_t MYKONOS_writeArmProfile(mykonosDevice_t *device);
+mykonosErr_t MYKONOS_loadAdcProfiles(mykonosDevice_t *device);
+
+
+/*
+ *****************************************************************************
+ * JESD204B Datapath Functions
+ *****************************************************************************
+ */
+/* Functions to setup the JESD204B IP */
+mykonosErr_t MYKONOS_resetDeframer(mykonosDevice_t *device);
+mykonosErr_t MYKONOS_setupSerializers(mykonosDevice_t *device);
+mykonosErr_t MYKONOS_setupDeserializers(mykonosDevice_t *device);
+mykonosErr_t MYKONOS_setupJesd204bFramer(mykonosDevice_t *device);
+mykonosErr_t MYKONOS_setupJesd204bObsRxFramer(mykonosDevice_t *device);
+mykonosErr_t MYKONOS_setupJesd204bDeframer(mykonosDevice_t *device);
+mykonosErr_t MYKONOS_enableRxFramerLink(mykonosDevice_t *device, uint8_t enable);
+mykonosErr_t MYKONOS_enableObsRxFramerLink(mykonosDevice_t *device, uint8_t enable);
+
+/* Functions to initialize the JESD204B link */
+mykonosErr_t MYKONOS_enableMultichipSync(mykonosDevice_t *device, uint8_t enableMcs, uint8_t *mcsStatus);
+mykonosErr_t MYKONOS_enableSysrefToRxFramer(mykonosDevice_t *device, uint8_t enable);
+mykonosErr_t MYKONOS_enableSysrefToObsRxFramer(mykonosDevice_t *device, uint8_t enable);
+mykonosErr_t MYKONOS_enableSysrefToDeframer(mykonosDevice_t *device, uint8_t enable);
+
+/* Functions to help debug the JESD204B link */
+mykonosErr_t MYKONOS_readRxFramerStatus(mykonosDevice_t *device, uint8_t *framerStatus);
+mykonosErr_t MYKONOS_readOrxFramerStatus(mykonosDevice_t *device, uint8_t *obsFramerStatus);
+mykonosErr_t MYKONOS_readDeframerStatus(mykonosDevice_t *device, uint8_t *deframerStatus);
+mykonosErr_t MYKONOS_getDeframerFifoDepth(mykonosDevice_t *device, uint8_t *fifoDepth, uint8_t *readEnLmfcCount);
+
+/* PRBS debug functions */
+mykonosErr_t MYKONOS_enableRxFramerPrbs(mykonosDevice_t *device, mykonosPrbsOrder_t polyOrder, uint8_t enable);
+mykonosErr_t MYKONOS_enableObsRxFramerPrbs(mykonosDevice_t *device, mykonosPrbsOrder_t polyOrder, uint8_t enable);
+mykonosErr_t MYKONOS_rxInjectPrbsError(mykonosDevice_t *device);
+mykonosErr_t MYKONOS_obsRxInjectPrbsError(mykonosDevice_t *device);
+mykonosErr_t MYKONOS_enableDeframerPrbsChecker(mykonosDevice_t *device, uint8_t lanes, mykonosPrbsOrder_t polyOrder, uint8_t enable);
+mykonosErr_t MYKONOS_clearDeframerPrbsCounters(mykonosDevice_t *device);
+mykonosErr_t MYKONOS_readDeframerPrbsCounters(mykonosDevice_t *device, uint8_t counterSelect, uint32_t *prbsErrorCount);
+
+/* Miscellaneous debug functions */
+mykonosErr_t MYKONOS_jesd204bIlasCheck(mykonosDevice_t *device, uint16_t *mismatch);
+mykonosErr_t MYKONOS_setRxFramerDataSource(mykonosDevice_t *device, uint8_t dataSource);
+mykonosErr_t MYKONOS_setObsRxFramerDataSource(mykonosDevice_t *device, uint8_t dataSource);
+
+/*
+ *****************************************************************************
+ * Shared Data path functions
+ *****************************************************************************
+ */
+mykonosErr_t MYKONOS_programFir(mykonosDevice_t *device, mykonosfirName_t filterToProgram, mykonosFir_t *firFilter);
+mykonosErr_t MYKONOS_readFir(mykonosDevice_t *device, mykonosfirName_t filterToRead, mykonosFir_t *firFilter);
+
+/*
+ *****************************************************************************
+ * Rx Data path functions
+ *****************************************************************************
+ */
+mykonosErr_t MYKONOS_programRxGainTable(mykonosDevice_t *device, uint8_t *gainTablePtr, uint8_t numGainIndexesInTable, mykonosGainTable_t rxChannel);
+mykonosErr_t MYKONOS_setRx1ManualGain(mykonosDevice_t *device, uint8_t gainIndex);
+mykonosErr_t MYKONOS_setRx2ManualGain(mykonosDevice_t *device, uint8_t gainIndex);
+mykonosErr_t MYKONOS_getRx1Gain(mykonosDevice_t *device, uint8_t *rx1GainIndex);
+mykonosErr_t MYKONOS_getRx2Gain(mykonosDevice_t *device, uint8_t *rx2GainIndex);
+mykonosErr_t MYKONOS_setupRxAgc(mykonosDevice_t *device);
+mykonosErr_t MYKONOS_resetRxAgc(mykonosDevice_t *device);
+mykonosErr_t MYKONOS_setRxAgcMinMaxGainIndex(mykonosDevice_t *device, mykonosRxChannels_t rxChannelSelect, uint8_t maxGainIndex, uint8_t minGainIndex);
+mykonosErr_t MYKONOS_setObsRxAgcMinMaxGainIndex(mykonosDevice_t *device, mykonosObsRxChannels_t obsRxChannelSelect, uint8_t maxGainIndex, uint8_t minGainIndex);
+mykonosErr_t MYKONOS_setRx1TempGainComp(mykonosDevice_t *device, int16_t rx1TempCompGain_mdB);
+mykonosErr_t MYKONOS_getRx1TempGainComp(mykonosDevice_t *device, int16_t *rx1TempCompGain_mdB);
+mykonosErr_t MYKONOS_setRx2TempGainComp(mykonosDevice_t *device, int16_t rx2TempCompGain_mdB);
+mykonosErr_t MYKONOS_getRx2TempGainComp(mykonosDevice_t *device, int16_t *rx2TempCompGain_mdB);
+mykonosErr_t MYKONOS_setObsRxTempGainComp(mykonosDevice_t *device, int16_t obsRxTempCompGain_mdB);
+mykonosErr_t MYKONOS_getObsRxTempGainComp(mykonosDevice_t *device, int16_t *obsRxTempCompGain_mdB);
+mykonosErr_t MYKONOS_enableRxGainCtrSyncPulse(mykonosDevice_t *device, uint8_t enable);
+mykonosErr_t MYKONOS_setRxGainControlMode(mykonosDevice_t *device, mykonosGainMode_t mode);
+mykonosErr_t MYKONOS_getRx1DecPower(mykonosDevice_t *device, uint16_t *rx1DecPower_mdBFS);
+mykonosErr_t MYKONOS_getRx2DecPower(mykonosDevice_t *device, uint16_t *rx2DecPower_mdBFS);
+
+/*
+ *****************************************************************************
+ * Observation Rx Data path functions
+ *****************************************************************************
+ */
+mykonosErr_t MYKONOS_setDefaultObsRxPath(mykonosDevice_t *device,  mykonosObsRxChannels_t defaultObsRxCh);
+mykonosErr_t MYKONOS_setObsRxPathSource(mykonosDevice_t *device, mykonosObsRxChannels_t obsRxCh);
+mykonosErr_t MYKONOS_getObsRxPathSource(mykonosDevice_t *device, mykonosObsRxChannels_t *obsRxCh);
+mykonosErr_t MYKONOS_setObsRxManualGain(mykonosDevice_t *device, mykonosObsRxChannels_t obsRxCh, uint8_t gainIndex);
+mykonosErr_t MYKONOS_getObsRxGain(mykonosDevice_t *device, uint8_t *gainIndex);
+mykonosErr_t MYKONOS_setupObsRxAgc(mykonosDevice_t *device);
+mykonosErr_t MYKONOS_enableObsRxGainCtrSyncPulse(mykonosDevice_t *device, uint8_t enable);
+mykonosErr_t MYKONOS_setObsRxGainControlMode(mykonosDevice_t *device, mykonosGainMode_t mode);
+mykonosErr_t MYKONOS_getObsRxDecPower(mykonosDevice_t *device, uint16_t *obsRxDecPower_mdBFS);
+
+/*
+ *****************************************************************************
+ * Tx Data path functions
+ *****************************************************************************
+ */
+mykonosErr_t MYKONOS_setTx1Attenuation(mykonosDevice_t *device, uint16_t tx1Attenuation_mdB);
+mykonosErr_t MYKONOS_setTx2Attenuation(mykonosDevice_t *device, uint16_t tx2Attenuation_mdB);
+mykonosErr_t MYKONOS_getTx1Attenuation(mykonosDevice_t *device, uint16_t *tx1Attenuation_mdB);
+mykonosErr_t MYKONOS_getTx2Attenuation(mykonosDevice_t *device, uint16_t *tx2Attenuation_mdB);
+mykonosErr_t MYKONOS_getTxFilterOverRangeStatus(mykonosDevice_t *device, uint8_t *txFilterStatus);
+mykonosErr_t MYKONOS_enableTxNco(mykonosDevice_t *device, uint8_t enable, int32_t tx1ToneFreq_kHz, int32_t tx2ToneFreq_kHz);
+
+/*
+ *****************************************************************************
+ * PA Protection Functions
+ *****************************************************************************
+ */
+mykonosErr_t MYKONOS_setupPaProtection(mykonosDevice_t *device, uint16_t powerThreshold, uint8_t attenStepSize, uint8_t avgDuration, uint8_t stickyFlagEnable, uint8_t txAttenControlEnable);
+mykonosErr_t MYKONOS_enablePaProtection(mykonosDevice_t *device, uint8_t enable);
+mykonosErr_t MYKONOS_getDacPower(mykonosDevice_t *device, mykonosTxChannels_t channel, uint16_t *channelPower);
+mykonosErr_t MYKONOS_getPaProtectErrorFlagStatus(mykonosDevice_t *device, uint8_t *errorFlagStatus);
+mykonosErr_t MYKONOS_clearPaErrorFlag(mykonosDevice_t *device);
+
+/*
+ *****************************************************************************
+ * Low level functions and helper functions. BBP should not need to call
+ *****************************************************************************
+ */
+const char* getMykonosErrorMessage(mykonosErr_t errorCode);
+
+mykonosErr_t MYKONOS_initSubRegisterTables(mykonosDevice_t *device);
+mykonosErr_t MYKONOS_setTxPfirSyncClk(mykonosDevice_t *device); /* Helper function */
+mykonosErr_t MYKONOS_setRxPfirSyncClk(mykonosDevice_t *device); /* Helper function */
+
+/*
+ *****************************************************************************
+ * Functions to configure DC offsets
+ *****************************************************************************
+ */
+mykonosErr_t MYKONOS_setRfDcOffsetCnt(mykonosDevice_t *device, mykonosDcOffsetChannels_t channel, uint16_t measureCount);
+mykonosErr_t MYKONOS_getRfDcOffsetCnt(mykonosDevice_t *device, mykonosDcOffsetChannels_t channel, uint16_t *measureCount);
+mykonosErr_t MYKONOS_setDigDcOffsetMShift(mykonosDevice_t *device, mykonosDcOffsetChannels_t channel, uint8_t mShift);
+mykonosErr_t MYKONOS_getDigDcOffsetMShift(mykonosDevice_t *device, mykonosDcOffsetChannels_t channel, uint8_t *mShift);
+mykonosErr_t MYKONOS_setDigDcOffsetEn(mykonosDevice_t *device, uint8_t enableMask);
+mykonosErr_t MYKONOS_getDigDcOffsetEn(mykonosDevice_t *device, uint8_t *enableMask);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif

dj_f1_ad9371/vitis_classic_autobuild/source/tp_hardware/mykonos/mykonosMmap.c

@@ -0,0 +1,136 @@
+/**
+ * \file mykonosMmap.c
+ * \brief Contains the Mykonos memory mapping
+ *
+ * Mykonos API version: 1.5.2.3566
+ */
+
+/**
+* \page Disclaimer Legal Disclaimer
+* Copyright 2015-2017 Analog Devices Inc.
+* Released under the AD9371 API license, for more information see the "LICENSE.txt" file in this zip file.
+*
+*/
+
+#include <stdint.h>
+uint8_t mykonosMmap [] = {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+                                 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+                                 0x13,0x03,0x03,0x13,0x13,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,
+                                 0x00,0xE4,0xE4,0x00,0x04,0x00,0x00,0x00,0x00,0x00,0x00,0x02,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xA5,0xA5,0x05,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+                                 0x01,0x00,0xE4,0xE4,0x00,0x00,0x00,0x1F,0x00,0x14,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+                                 0x00,0x00,0x00,0x02,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x9F,0xE0,0x20,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0xF5,0x8F,0x0F,0x00,
+                                 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+                                 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+                                 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+                                 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+                                 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+                                 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+                                 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+                                 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+                                 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+                                 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+                                 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+                                 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
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+                                 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+                                 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+                                 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+                                 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+                                 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+                                 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+                                 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+                                 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+                                 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+                                 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+                                 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+                                 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+                                 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+                                 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+                                 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+                                 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+                                 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+                                 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+                                 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+                                 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+                                 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+                                 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+                                 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+                                 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+                                 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+                                 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+                                 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+                                 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+                                 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+                                 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+                                 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+                                 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+                                 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+                                 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+                                 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+                                 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+                                 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+                                 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+                                 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+                                 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+                                 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+                                 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+                                 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00};
+/*!< Mykonos memory map */

dj_f1_ad9371/vitis_classic_autobuild/source/tp_hardware/mykonos/mykonos_gpio.h

@@ -0,0 +1,172 @@
+/*!
+ * \file mykonos_gpio.h
+ * \brief Contains macro definitions and function prototypes for mykonos_gpio.c
+ *
+ * Mykonos API version: 1.5.2.3566
+ */
+
+/**
+* \page Disclaimer Legal Disclaimer
+* Copyright 2015-2017 Analog Devices Inc.
+* Released under the AD9371 API license, for more information see the "LICENSE.txt" file in this zip file.
+*
+*/
+
+#ifndef MYKONOSGPIO_H_
+#define MYKONOSGPIO_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "t_mykonos.h"
+#include "t_mykonos_gpio.h"
+
+/*
+ *****************************************************************************
+ * GPIO functions
+ *****************************************************************************
+ */
+
+/* GPIO CMOS and SPI setting Functions */
+mykonosGpioErr_t MYKONOS_setGpioDrv(mykonosDevice_t *device, uint32_t gpioDrv);
+mykonosGpioErr_t MYKONOS_getGpioDrv(mykonosDevice_t *device, uint32_t *gpioDrv);
+
+mykonosGpioErr_t MYKONOS_setGpioSlewRate(mykonosDevice_t *device, mykonosGpioSelect_t gpioSelect, mykonosGpioSlewRate_t slewRate);
+mykonosGpioErr_t MYKONOS_getGpioSlewRate(mykonosDevice_t *device, mykonosGpioSelect_t gpioSelect, mykonosGpioSlewRate_t *slewRate);
+
+mykonosGpioErr_t MYKONOS_setCmosDrv(mykonosDevice_t *device, mykonosCmosPadDrvStr_t spiDrv);
+mykonosGpioErr_t MYKONOS_getCmosDrv(mykonosDevice_t *device, mykonosCmosPadDrvStr_t *spiDrv);
+
+
+/* Monitor output Functions */
+mykonosGpioErr_t MYKONOS_setGpioMonitorOut(mykonosDevice_t *device, uint8_t monitorIndex, uint8_t monitorMask);
+mykonosGpioErr_t MYKONOS_getGpioMonitorOut(mykonosDevice_t *device, uint8_t *monitorIndex, uint8_t *monitorMask);
+
+/* RX GPIO Functions */
+mykonosGpioErr_t MYKONOS_setRx1GainCtrlPin(mykonosDevice_t *device, uint8_t incStep, uint8_t decStep, mykonosGpioSelect_t rx1GainIncPin, mykonosGpioSelect_t rx1GainDecPin, uint8_t enable);
+mykonosGpioErr_t MYKONOS_setRx2GainCtrlPin(mykonosDevice_t *device, uint8_t incStep, uint8_t decStep, mykonosGpioSelect_t rx2GainIncPin, mykonosGpioSelect_t rx2GainDecPin, uint8_t enable);
+mykonosGpioErr_t MYKONOS_getRx1GainCtrlPin(mykonosDevice_t *device, uint8_t *incStep, uint8_t *decStep, mykonosGpioSelect_t *rx1GainIncPin, mykonosGpioSelect_t *rx1GainDecPin, uint8_t *enable);
+mykonosGpioErr_t MYKONOS_getRx2GainCtrlPin(mykonosDevice_t *device, uint8_t *incStep, uint8_t *decStep, mykonosGpioSelect_t *rx2GainIncPin, mykonosGpioSelect_t *rx2GainDecPin, uint8_t *enable);
+
+mykonosGpioErr_t MYKONOS_setRxHybridGainChangePin(mykonosDevice_t *device, mykonosGpioSelect_t rx1GainChangePin, mykonosGpioSelect_t rx2GainChangePin);
+mykonosGpioErr_t MYKONOS_getRxHybridGainChangePin(mykonosDevice_t *device, mykonosGpioSelect_t *rx1GainChangePin, mykonosGpioSelect_t *rx2GainChangePin);
+mykonosGpioErr_t MYKONOS_setObsRxHybridGainChangePin(mykonosDevice_t *device, mykonosGpioSelect_t obsRxGainChangePin);
+mykonosGpioErr_t MYKONOS_getObsRxHybridGainChangePin(mykonosDevice_t *device, mykonosGpioSelect_t *obsRxGainChangePin);
+
+mykonosGpioErr_t MYKONOS_setRxAgcEnSyncPin(mykonosDevice_t *device, mykonosGpioSelect_t rx1AgcSyncPin, mykonosGpioSelect_t rx2AgcSyncPin);
+mykonosGpioErr_t MYKONOS_getRxAgcEnSyncPin(mykonosDevice_t *device, mykonosGpioSelect_t *rx1AgcSyncPin, mykonosGpioSelect_t *rx2AgcSyncPin);
+mykonosGpioErr_t MYKONOS_setObsRxAgcEnSyncPin(mykonosDevice_t *device, mykonosGpioSelect_t obsRxAgcSyncPin);
+mykonosGpioErr_t MYKONOS_getObsRxAgcEnSyncPin(mykonosDevice_t *device, mykonosGpioSelect_t *obsRxAgcSyncPin);
+
+/* TX GPIO Functions */
+mykonosGpioErr_t MYKONOS_setTx1AttenCtrlPin(mykonosDevice_t *device, uint8_t stepSize, mykonosGpioSelect_t tx1AttenIncPin, mykonosGpioSelect_t tx1AttenDecPin, uint8_t enable, uint8_t useTx1ForTx2);
+mykonosGpioErr_t MYKONOS_setTx2AttenCtrlPin(mykonosDevice_t *device, uint8_t stepSize, mykonosGpioSelect_t tx2AttenIncPin, mykonosGpioSelect_t tx2AttenDecPin, uint8_t enable);
+mykonosGpioErr_t MYKONOS_getTx1AttenCtrlPin(mykonosDevice_t *device, uint8_t *stepSize, mykonosGpioSelect_t *tx1AttenIncPin, mykonosGpioSelect_t *tx1AttenDecPin, uint8_t *enable, uint8_t *useTx1ForTx2);
+mykonosGpioErr_t MYKONOS_getTx2AttenCtrlPin(mykonosDevice_t *device, uint8_t *stepSize, mykonosGpioSelect_t *tx2AttenIncPin, mykonosGpioSelect_t *tx2AttenDecPin, uint8_t *enable, uint8_t *useTx1ForTx2);
+
+mykonosGpioErr_t MYKONOS_spi2GpioSetup(mykonosDevice_t *device, uint8_t enable, uint8_t updateTxAttenPinSelect);
+
+/* GPIO memory source Functions */
+mykonosGpioErr_t MYKONOS_setGpioPinLevel(mykonosDevice_t *device, uint32_t gpioPinLevel);
+mykonosGpioErr_t MYKONOS_getGpioPinLevel(mykonosDevice_t *device, uint32_t *gpioPinLevel);
+mykonosGpioErr_t MYKONOS_getGpioSetLevel(mykonosDevice_t *device, uint32_t *gpioPinSetLevel);
+
+/* Gain Compensation Functions */
+mykonosGpioErr_t MYKONOS_setRxGainCompensation (mykonosDevice_t *device, mykonosGainComp_t *gainComp, uint8_t enable);
+mykonosGpioErr_t MYKONOS_getRxGainCompensation (mykonosDevice_t *device, mykonosGainComp_t *gainComp, uint8_t *enabled);
+
+mykonosGpioErr_t MYKONOS_setObsRxGainCompensation (mykonosDevice_t *device, mykonosObsRxGainComp_t *gainComp, uint8_t enable);
+mykonosGpioErr_t MYKONOS_getObsRxGainCompensation (mykonosDevice_t *device, mykonosObsRxGainComp_t *gainComp, uint8_t *enabled);
+
+/* SLICER Functions */
+mykonosGpioErr_t MYKONOS_setRxSlicerCtrl(mykonosDevice_t *device, uint8_t slicerStep, mykonosRxSlicer_t rx1Pins, mykonosRxSlicer_t rx2Pins, uint8_t enable);
+mykonosGpioErr_t MYKONOS_getRxSlicerCtrl(mykonosDevice_t *device, uint8_t *slicerStep, mykonosRxSlicer_t *rx1Pins, mykonosRxSlicer_t *rx2Pins, uint8_t *enable);
+
+mykonosGpioErr_t MYKONOS_setObsRxSlicerCtrl(mykonosDevice_t *device, uint8_t slicerStep, mykonosObsRxSlicer_t obsRxPins, uint8_t enable);
+mykonosGpioErr_t MYKONOS_getObsRxSlicerCtrl(mykonosDevice_t *device, uint8_t *slicerStep, mykonosObsRxSlicer_t *obsRxPins, uint8_t *enable);
+
+/* Floating Point Formatter Functions */
+mykonosGpioErr_t MYKONOS_setFloatPointFrmt (mykonosDevice_t *device, mykonosFloatPntFrmt_t *floatFrmt);
+mykonosGpioErr_t MYKONOS_getFloatPointFrmt (mykonosDevice_t *device, mykonosFloatPntFrmt_t *floatFrmt);
+
+mykonosGpioErr_t MYKONOS_setRxEnFloatPntFrmt (mykonosDevice_t *device, uint8_t rx1Att, uint8_t rx2Att, uint8_t enable);
+mykonosGpioErr_t MYKONOS_getRxEnFloatPntFrmt (mykonosDevice_t *device, uint8_t *rx1Att, uint8_t *rx2Att, uint8_t *enable);
+
+mykonosGpioErr_t MYKONOS_setOrxEnFloatPntFrmt (mykonosDevice_t *device, uint8_t orxAtt, uint8_t enable);
+mykonosGpioErr_t MYKONOS_getOrxEnFloatPntFrmt (mykonosDevice_t *device, uint8_t *orxAtt, uint8_t *enable);
+
+/*
+ *****************************************************************************
+ * General Purpose Interrupt functions
+ *****************************************************************************
+ */
+mykonosGpioErr_t MYKONOS_configGpInterrupt(mykonosDevice_t *device, uint16_t gpMask);
+mykonosGpioErr_t MYKONOS_readGpInterruptStatus(mykonosDevice_t *device, uint16_t *status);
+
+/*
+ *****************************************************************************
+ * ARM GPIO usage functions
+ *****************************************************************************
+ */
+mykonosGpioErr_t MYKONOS_setArmGpioPins(mykonosDevice_t *device);
+
+/*
+ *****************************************************************************
+ * AuxADC/AuxDAC functions
+ *****************************************************************************
+ */
+mykonosGpioErr_t MYKONOS_setupAuxAdcs(mykonosDevice_t *device, uint8_t adcDecimation, uint8_t enable);
+mykonosGpioErr_t MYKONOS_setAuxAdcChannel(mykonosDevice_t *device, mykonosAuxAdcChannels_t auxAdcChannel);
+mykonosGpioErr_t MYKONOS_readAuxAdc(mykonosDevice_t *device, uint16_t *adcCode);
+mykonosGpioErr_t MYKONOS_setupAuxDacs(mykonosDevice_t *device);
+mykonosGpioErr_t MYKONOS_writeAuxDac(mykonosDevice_t *device, uint8_t auxDacIndex, uint16_t auxDacCode);
+
+/*
+ *****************************************************************************
+ * GPIO3v3 functions
+ *****************************************************************************
+ */
+mykonosGpioErr_t MYKONOS_setupGpio3v3(mykonosDevice_t *device);
+
+mykonosGpioErr_t MYKONOS_setGpio3v3PinLevel(mykonosDevice_t *device, uint16_t gpio3v3PinLevel);
+mykonosGpioErr_t MYKONOS_getGpio3v3SetLevel(mykonosDevice_t *device, uint16_t *gpio3v3SetLevel);
+
+mykonosGpioErr_t MYKONOS_getGpio3v3PinLevel(mykonosDevice_t *device, uint16_t *gpio3v3PinLevel);
+
+mykonosGpioErr_t MYKONOS_setGpio3v3Oe(mykonosDevice_t *device, uint16_t gpio3v3OutEn);
+mykonosGpioErr_t MYKONOS_getGpio3v3Oe(mykonosDevice_t *device, uint16_t *gpio3v3OutEn);
+
+mykonosGpioErr_t MYKONOS_setGpio3v3SourceCtrl(mykonosDevice_t *device, uint16_t gpio3v3SrcCtrl);
+mykonosGpioErr_t MYKONOS_getGpio3v3SourceCtrl(mykonosDevice_t *device, uint16_t *gpio3v3SrcCtrl);
+
+/*
+ *****************************************************************************
+ * GPIO helper functions
+ *****************************************************************************
+ */
+mykonosGpioErr_t MYKONOS_setupGpio(mykonosDevice_t *device);
+mykonosGpioErr_t MYKONOS_setGpioOe(mykonosDevice_t *device, uint32_t gpioOutEn, uint32_t gpioUsedMask);
+mykonosGpioErr_t MYKONOS_getGpioOe(mykonosDevice_t *device, uint32_t *gpioOutEn);
+
+mykonosGpioErr_t MYKONOS_setGpioSourceCtrl(mykonosDevice_t *device, uint32_t gpioSrcCtrl);
+mykonosGpioErr_t MYKONOS_getGpioSourceCtrl(mykonosDevice_t *device, uint32_t *gpioSrcCtrl);
+
+/*
+ *****************************************************************************
+ * Temperature Sensor functions
+ *****************************************************************************
+ */
+mykonosGpioErr_t MYKONOS_setupTempSensor(mykonosDevice_t *device, mykonosTempSensorConfig_t *tempSensor);
+mykonosGpioErr_t MYKONOS_getTempSensorConfig(mykonosDevice_t *device, mykonosTempSensorConfig_t *tempSensor);
+
+mykonosGpioErr_t MYKONOS_startTempMeasurement(mykonosDevice_t *device);
+mykonosGpioErr_t MYKONOS_readTempSensor(mykonosDevice_t *device, mykonosTempSensorStatus_t *tempStatus);
+
+const char* getGpioMykonosErrorMessage(mykonosGpioErr_t errorCode);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* MYKONOSGPIO_H_ */

dj_f1_ad9371/vitis_classic_autobuild/source/tp_hardware/mykonos/mykonos_macros.h

@@ -0,0 +1,707 @@
+/**
+ * \file mykonos_macros.h
+ * \brief Contains address and miscellaneous macro definitions for Mykonos API
+ *
+ * Mykonos API version: 1.5.2.3566
+ */
+
+/**
+* \page Disclaimer Legal Disclaimer
+* Copyright 2015-2017 Analog Devices Inc.
+* Released under the AD9371 API license, for more information see the "LICENSE.txt" file in this zip file.
+*
+*/
+
+#ifndef CLEMENTE_TDD_MACROS_H
+#define CLEMENTE_TDD_MACROS_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define MYKONOS_ADDR_CONFIGURATION_CONTROL_0                0x000
+#define MYKONOS_ADDR_SPI_CONFIGURATION_CONTROL_1            0x001
+#define MYKONOS_ADDR_PRODUCT_ID                             0x004
+#define MYKONOS_GPIO_DRV_CTL_0                              0x020
+#define MYKONOS_GPIO_DRV_CTL_1                              0x021
+#define MYKONOS_GPIO_SLEW_CTL_0                             0x022
+#define MYKONOS_GPIO_SLEW_CTL_1                             0x023
+#define MYKONOS_GPIO_SLEW_CTL_2                             0x024
+#define MYKONOS_GPIO_SLEW_CTL_3                             0x025
+
+#define MYKONOS_ADDR_DIGITAL_IO_CONTROL                     0x028
+
+#define MYKONOS_ADDR_SYSREF_PAD_CONFIG                      0x040
+#define MYKONOS_ADDR_TX1_SYNC_PAD_CONFIG                    0x041
+#define MYKONOS_ADDR_TX2_SYNC_PAD_CONFIG                    0x042
+#define MYKONOS_ADDR_RX1_SYNC_CONFIG                        0x043
+#define MYKONOS_ADDR_RX2_SYNC_CONFIG                        0x044
+
+/* Mykonos Framer Registers */
+#define MYKONOS_ADDR_FRAMER_RESET                           0x059
+#define MYKONOS_ADDR_FRAMER_CLK_EN                          0x05A
+#define MYKONOS_ADDR_FRAMER_ADDR                            0x05B
+#define MYKONOS_ADDR_FRAMER_DATA                            0x05C
+#define MYKONOS_ADDR_FRAMER_WRITE_EN                        0x05D
+#define MYKONOS_ADDR_FRAMER_SYSREF_FIFO_EN                  0x05E
+#define MYKONOS_ADDR_FRAMER_CONFIG_F                        0x05F
+#define MYKONOS_ADDR_FRAMER_LANE_CTL                        0x060
+#define MYKONOS_ADDR_FRAMER_ADC_XBAR_SEL                    0x061
+#define MYKONOS_ADDR_FRAMER_LANE_XBAR_SEL                   0x062
+#define MYKONOS_ADDR_FRAMER_CONFIG_LOOPBACK_XBAR_REV        0x063
+#define MYKONOS_ADDR_FRAMER_SYNCN_FILT                      0x064
+#define MYKONOS_ADDR_FRAMER_LMFC_F_OFFSET                   0x065
+#define MYKONOS_ADDR_FRAMER_LMFC_K_OFFSET                   0x066
+#define MYKONOS_ADDR_FRAMER_TEST_CNTR_CTL                   0x067
+#define MYKONOS_ADDR_FRAMER_STATUS_STRB                     0x068
+#define MYKONOS_ADDR_FRAMER_STATUS                          0x069
+#define MYKONOS_ADDR_FRAMER_SYSREF_TO_LMFC_CNTR_STAT        0x06A
+#define MYKONOS_ADDR_FRAMER_SYSREF_TO_LMFC_ERR_MARGIN       0x06B
+#define MYKONOS_ADDR_FRAMER_LANE_FIFO_STRB                  0x06C
+#define MYKONOS_ADDR_FRAMER_LANE0_FIFO_RDWR_ADDR            0x06D
+#define MYKONOS_ADDR_FRAMER_LANE1_FIFO_RDWR_ADDR            0x06E
+#define MYKONOS_ADDR_FRAMER_LANE2_FIFO_RDWR_ADDR            0x06F
+#define MYKONOS_ADDR_FRAMER_LANE3_FIFO_RDWR_ADDR            0x070
+#define MYKONOS_ADDR_FRAMER_PRBS10_CTL                      0x071
+#define MYKONOS_ADDR_FRAMER_PRBS20_CTL                      0x072
+#define MYKONOS_ADDR_FRAMER_PATTERN_GEN_EN                  0x073
+#define MYKONOS_ADDR_FRAMER_PATTERN_GEN_7_TO_0              0x074
+#define MYKONOS_ADDR_FRAMER_PATTERN_GEN_15_TO_8             0x075
+#define MYKONOS_ADDR_FRAMER_PATTERN_GEN_19_TO_16            0x076
+#define MYKONOS_ADDR_FRAMER_CONFIG_JTX_GEN                  0x077
+#define MYKONOS_ADDR_FRAMER_LANE_DATA_CTL                   0x078
+#define MYKONOS_ADDR_FRAMER_DATA_SAMPLE_CTL                 0x079
+
+/* Mykonos Deframer Sub Address Map */
+#define MYKONOS_SUBADDR_DEFRAMER_LANE0_ILAS_RECVD           0x00
+#define MYKONOS_SUBADDR_DEFRAMER_LANE0_ILAS_CFG             0x50
+
+/* Mykonos Deframer Registers */
+#define MYKONOS_ADDR_DEFRAMER_RESET                         0x07A
+#define MYKONOS_ADDR_DEFRAMER_CLK_EN                        0x07B
+#define MYKONOS_ADDR_DEFRAMER_ADDR                          0x07C
+#define MYKONOS_ADDR_DEFRAMER_DATA                          0x07D
+#define MYKONOS_ADDR_DEFRAMER_WR_EN                         0x07E
+#define MYKONOS_ADDR_DEFRAMER_SYSREF_FIFO_EN                0x07F
+#define MYKONOS_ADDR_DEFRAMER_CONFIG_F                      0x080
+#define MYKONOS_ADDR_DEFRAMER_LANE_FIFO_CTL                 0x081
+#define MYKONOS_ADDR_DEFRAMER_DAC_XBAR_SEL                  0x082
+#define MYKONOS_ADDR_DEFRAMER_LANE_XBAR_SEL                 0x083
+#define MYKONOS_ADDR_DEFRAMER_LMFC_F_OFFSET                 0x084
+#define MYKONOS_ADDR_DEFRAMER_LMFC_K_OFFSET                 0x085
+#define MYKONOS_ADDR_DEFRAMER_CONFIG_SYNC_USER_DATA_CTL     0x086
+#define MYKONOS_ADDR_DEFRAMER_SYNC_REQ_RETIME               0x087
+#define MYKONOS_ADDR_DEFRAMER_TEST                          0x088
+#define MYKONOS_ADDR_DEFRAMER_DET_FIFO_WR_STRT_DAC_XBAR_REV 0x089
+#define MYKONOS_ADDR_DEFRAMER_STAT_STRB                     0x08A
+#define MYKONOS_ADDR_DEFRAMER_STAT                          0x08B
+#define MYKONOS_ADDR_DEFRAMER_TEST_ERR_CNT_STAT             0x08C
+#define MYKONOS_ADDR_DEFRAMER_DET_FIFO_RD_ADDR              0x08D
+#define MYKONOS_ADDR_DEFRAMER_DET_FIFO_WR_ADDR              0x08E
+#define MYKONOS_ADDR_DEFRAMER_QBLMFC_VS_EXTLMFC_CNTR_STAT   0x08F
+#define MYKONOS_ADDR_DEFRAMER_DET_FIFO_STAT                 0x090
+#define MYKONOS_ADDR_DEFRAMER_STRT_RD_DEL_STOP_WR           0x091
+#define MYKONOS_ADDR_DEFRAMER_FIFO_SAMPLE_SPI_ADDR_RD       0x092
+#define MYKONOS_ADDR_DEFRAMER_FIFO_BYTE_SPI_ADDR_RD         0x093
+#define MYKONOS_ADDR_DEFRAMER_FIFO_BYTE_SPI_DATA_RD         0x094
+#define MYKONOS_ADDR_DEFRAMER_SAMPLE0_7_TO_0                0x095
+#define MYKONOS_ADDR_DEFRAMER_SAMPLE0_15_TO_8               0x096
+#define MYKONOS_ADDR_DEFRAMER_SAMPLE1_7_TO_0                0x097
+#define MYKONOS_ADDR_DEFRAMER_SAMPLE1_15_TO_8               0x098
+#define MYKONOS_ADDR_DEFRAMER_SAMPLE2_7_TO_0                0x099
+#define MYKONOS_ADDR_DEFRAMER_SAMPLE2_15_TO_8               0x09A
+#define MYKONOS_ADDR_DEFRAMER_SAMPLE3_7_TO_0                0x09B
+#define MYKONOS_ADDR_DEFRAMER_SAMPLE3_15_TO_8               0x09C
+#define MYKONOS_ADDR_DEFRAMER_LANE_FIFO_STRB                0x09D
+#define MYKONOS_ADDR_DEFRAMER_LANE0_FIFO_RDWR_ADDR          0x09E
+#define MYKONOS_ADDR_DEFRAMER_LANE1_FIFO_RDWR_ADDR          0x09F
+#define MYKONOS_ADDR_DEFRAMER_LANE2_FIFO_RDWR_ADDR          0x0A0
+#define MYKONOS_ADDR_DEFRAMER_LANE3_FIFO_RDWR_ADDR          0x0A1
+#define MYKONOS_ADDR_DEFRAMER_SYSREF_TO_LMFC_CNTR_STAT      0x0A2
+#define MYKONOS_ADDR_DEFRAMER_SYSREF_TO_LMFC_ERR_MARGIN     0x0A3
+#define MYKONOS_ADDR_DEFRAMER_PRBS10_CTL                    0x0A4
+#define MYKONOS_ADDR_DEFRAMER_PRBS20_CTL                    0x0A5
+#define MYKONOS_ADDR_DEFRAMER_PRBS20_STRB_CHKSUM_TYPE       0x0A6
+#define MYKONOS_ADDR_DEFRAMER_PRBS20_ERR_CNTR_7_TO_0        0x0A7
+#define MYKONOS_ADDR_DEFRAMER_PRBS20_ERR_CNTR_15_TO_8       0x0A8
+#define MYKONOS_ADDR_DEFRAMER_PRBS20_ERR_CNTR_23_TO_16      0x0A9
+#define MYKONOS_ADDR_DEFRAMER_LANE_DATA_CTL                 0x0AA
+#define MYKONOS_ADDR_DEFRAMER_STATUS_2                      0x0AB
+#define MYKONOS_ADDR_DEFRAMER_DET_FIFO_PHASE                0x0AC
+
+/* Mykonos Serializer Registers */
+#define MYKONOS_ADDR_SERIALIZER_CTL_0                       0x0B0
+#define MYKONOS_ADDR_SERIALIZER_CTL_1                       0x0B1
+#define MYKONOS_ADDR_SERIALIZER_CTL_2                       0x0B2
+#define MYKONOS_ADDR_SERIALIZER_CTL_3                       0x0B3
+#define MYKONOS_ADDR_SERIALIZER_HS_DIV_TXSER_CLK_EN         0x0B4
+#define MYKONOS_ADDR_SERIALIZER_SPECIAL                     0x0B5
+
+/* Mykonos Deserializer Registers */
+#define MYKONOS_ADDR_DESERIALIZER_PDET_CTL                  0x0BC
+#define MYKONOS_ADDR_DESERIALIZER_CTL_0                     0x0BD
+#define MYKONOS_ADDR_DESERIALIZER_SIN_SHAPE_0               0x0BE
+#define MYKONOS_ADDR_DESERIALIZER_SIN_SHAPE_1               0x0BF
+#define MYKONOS_ADDR_DESERIALIZER_EQ_CTL_0                  0x0C1
+#define MYKONOS_ADDR_DESERIALIZER_EQ_CTL_1                  0x0C2
+#define MYKONOS_ADDR_DESERIALIZER_MISC_CTL                  0x0C3
+#define MYKONOS_ADDR_DESERIALIZER_EQ_HP_EN                  0x0C4
+#define MYKONOS_ADDR_DESERIALIZER_EQ_CTL_1_TO_0             0x0C5
+#define MYKONOS_ADDR_DESERIALIZER_EQ_CTL_3_TO_2             0x0C6
+#define MYKONOS_ADDR_DESERIALIZER_HS_DIV_RXCDR_CLK_EN       0x0CD
+#define MYKONOS_ADDR_DESERIALIZER_SPECIAL                   0x0CE
+#define MYKONOS_ADDR_DESERIALIZER_CDR_CAL_CTL               0x0D0
+
+#define MYKONOS_ADDR_CONFIGURATION_CONTROL_1                0x100
+#define MYKONOS_ADDR_CONFIGURATION_CONTROL_2                0x101
+#define MYKONOS_ADDR_CONFIGURATION_CONTROL_4                0x102
+#define MYKONOS_ADDR_CONFIGURATION_CONTROL_5                0x103
+#define MYKONOS_ADDR_DPD_SNIFFER_CONFIGURATION_CONTROL_1    0x104
+#define MYKONOS_ADDR_DPD_SNIFFER_CONFIGURATION_CONTROL_2    0x105
+#define MYKONOS_ADDR_DPD_SNIFFER_GPIO_SELECT                0x106
+#define MYKONOS_ADDR_SNIFFER_CONFIGURATION_CONTROL          0x107
+#define MYKONOS_ADDR_DPD_CONFIGURATION_CONTROL              0x108
+#define MYKONOS_ADDR_LOOPBACK_CONFIGURATION_CONTROL         0x109
+
+#define MYKONOS_ADDR_CLOCK_CONTROL_0						0x117
+#define MYKONOS_ADDR_CLOCK_CONTROL_1						0x118
+#define MYKONOS_ADDR_CLOCK_CONTROL_2						0x119
+#define MYKONOS_ADDR_CLOCK_CONTROL_3						0x11A
+#define MYKONOS_ADDR_CLOCK_CONTROL_4						0x11B
+#define MYKONOS_ADDR_CLOCK_CONTROL_5                        0x11C
+
+#define MYKONOS_ADDR_MCS_CONTROL                            0x120
+#define MYKONOS_ADDR_MCS_STATUS                             0x121
+
+/* CLK PLL Registers */
+#define MYKONOS_ADDR_CLK_SYNTH_DIVIDER_INT_BYTE0            0x141
+#define MYKONOS_ADDR_CLK_SYNTH_DIVIDER_INT_BYTE1            0x142
+#define MYKONOS_ADDR_CLK_SYNTH_DIVIDER_FRAC_BYTE0           0x143
+#define MYKONOS_ADDR_CLK_SYNTH_DIVIDER_FRAC_BYTE1           0x144
+#define MYKONOS_ADDR_CLK_SYNTH_DIVIDER_FRAC_BYTE2           0x145
+#define MYKONOS_ADDR_CLK_SYNTH_F_VCOTN_BYTE1                0x148
+#define MYKONOS_ADDR_CLK_SYNTH_BYTE1                        0x149
+#define MYKONOS_ADDR_CLK_SYNTH_BYTE2                        0x14A
+#define MYKONOS_ADDR_CLK_SYNTH_BYTE3                        0x14B
+#define MYKONOS_ADDR_CLK_SYNTH_BYTE5                        0x14D
+#define MYKONOS_ADDR_CLK_SYNTH_BYTE6                        0x14E
+#define MYKONOS_ADDR_CLK_SYNTH_BYTE7                        0x14F
+#define MYKONOS_ADDR_CLK_SYNTH_LF_R3                        0x150
+#define MYKONOS_ADDR_CLK_SYNTH_BYTE9                        0x152
+#define MYKONOS_ADDR_CLK_SYNTH_CAL_STAT                     0x154
+#define MYKONOS_ADDR_CLK_SYNTH_VCO_CAL_REF                  0x155
+#define MYKONOS_ADDR_CLK_SYNTH_VCO_BAND_BYTE1               0x157
+#define MYKONOS_ADDR_CLK_SYNTH_CAL_CONTROL                  0x159
+#define MYKONOS_ADDR_CLK_SYNTH_VCO_VAR_CTL1                 0x15E
+#define MYKONOS_ADDR_CLK_SYNTH_VCO_VAR_CTL2                 0x15F
+
+/* DPD Registers */
+#define MYKONOS_ADDR_TX1_DPD_MODEL_INDIRECT_PTR             0x178
+#define MYKONOS_ADDR_TX2_DPD_MODEL_INDIRECT_PTR             0x17C
+#define MYKONOS_ADDR_DPD_RMS_BUF_SIZE                       0x180
+#define MYKONOS_ADDR_TX1_DPD_MODEL_WORKING_PTR              0x188
+#define MYKONOS_ADDR_TX2_DPD_MODEL_WORKING_PTR              0x18C
+
+/* Rx NCO Control registers */
+#define MYKONOS_ADDR_CALPLL_SDM_CONTROL                     0x17F
+#define MYKONOS_ADDR_RX_NCO_CONTROL                         0x190
+#define MYKONOS_ADDR_RX_NCO_CH1_FTW_BYTE_3                  0x191
+#define MYKONOS_ADDR_RX_NCO_CH1_FTW_BYTE_2                  0x192
+#define MYKONOS_ADDR_RX_NCO_CH1_FTW_BYTE_1                  0x193
+#define MYKONOS_ADDR_RX_NCO_CH2_FTW_BYTE_3                  0x194
+#define MYKONOS_ADDR_RX_NCO_CH2_FTW_BYTE_2                  0x195
+#define MYKONOS_ADDR_RX_NCO_CH2_FTW_BYTE_1                  0x196
+#define MYKONOS_ADDR_RX_NCO_DPD_SNIFFER_FTW_BYTE_3          0x197
+#define MYKONOS_ADDR_RX_NCO_DPD_SNIFFER_FTW_BYTE_2          0x198
+#define MYKONOS_ADDR_RX_NCO_DPD_SNIFFER_FTW_BYTE_1          0x199
+
+#define MYKONOS_ADDR_ENSM_CONFIG_7_0                        0x1B0
+#define MYKONOS_ADDR_CALIBRATION_CONTROL                    0x1B2
+#define MYKONOS_ADDR_ENSM_MANUAL_GAIN_LOCK_GPIO_SELECT      0x1B5
+#define MYKONOS_ADDR_REFERENCE_CLOCK_CYCLES                 0x1C0
+#define MYKONOS_ADDR_TX_PD_OVERIDE_7_0                      0x209
+#define MYKONOS_ADDR_RCAL_CONTROL                           0x224
+#define MYKONOS_ADDR_REF_PAD_CONFIG1                        0x230
+#define MYKONOS_ADDR_REF_PAD_CONFIG2                        0x231
+
+#define MYKONOS_ADDR_RXSYNTH_CP_CAL_STAT                    0x254
+#define MYKONOS_ADDR_RXSYNTH_VCO_BAND_BYTE1                 0x257
+#define MYKONOS_ADDR_TXSYNTH_CP_CAL_STAT                    0x2C4
+#define MYKONOS_ADDR_TXSYNTH_VCO_BAND_BYTE1                 0x2C7
+#define MYKONOS_ADDR_SNIFF_RXSYNTH_CP_CAL_STAT              0x354
+#define MYKONOS_ADDR_SNIFF_RXSYNTH_VCO_BAND_BYTE1           0x357
+#define MYKONOS_ADDR_SNIFF_RXLOGEN_BYTE1                    0x380
+
+#define MYKONOS_ADDR_RX_FILTER_CONFIGURATION                0x410
+#define MYKONOS_ADDR_RX_FILTER_GAIN                         0x411
+#define MYKONOS_ADDR_DPD_SNIFFER_RX_FILTER_GAIN             0x412
+
+/* Mykonos Temperature Gain Compensation Registers */
+#define MYKONOS_ADDR_RX1_TEMP_GAIN_COMP                     0x420
+#define MYKONOS_ADDR_RX2_TEMP_GAIN_COMP                     0x421
+#define MYKONOS_ADDR_OBS_TEMP_GAIN_COMP                     0x422
+
+/* Mykonos AGC General Registers */
+#define MYKONOS_ADDR_AGC_CFG_1                              0x42E
+#define MYKONOS_ADDR_AGC_CFG_2                              0x42F
+#define MYKONOS_ADDR_AGC_GAIN_CHANGE_GPIO_SEL               0x430
+#define MYKONOS_ADDR_AGC_RX1_MAX_GAIN_INDEX                 0x431
+#define MYKONOS_ADDR_AGC_RX1_MIN_GAIN_INDEX                 0x432
+#define MYKONOS_ADDR_AGC_MANUAL_GAIN_CFG                    0x433
+#define MYKONOS_ADDR_AGC_MANUAL_GAIN_GPIO_SEL               0x434
+#define MYKONOS_ADDR_AGC_MANUAL_GAIN_INDEX_CH_1             0x435
+#define MYKONOS_ADDR_AGC_MANUAL_GAIN_INDEX_CH_2             0x436
+#define MYKONOS_ADDR_AGC_LOCK_LEVEL                         0x437
+#define MYKONOS_ADDR_AGC_OVRG_GAIN_STEP_1                   0x438
+#define MYKONOS_ADDR_AGC_OVRG_GAIN_STEP_2                   0x439
+#define MYKONOS_ADDR_AGC_OVRG_GAIN_STEP_3                   0x43A
+#define MYKONOS_ADDR_AGC_OVRG_GAIN_STEP_4                   0x43B
+#define MYKONOS_ADDR_AGC_OVRG_GAIN_STEP_5                   0x43C
+#define MYKONOS_ADDR_AGC_OVRG_GAIN_STEP_6                   0x43D
+#define MYKONOS_ADDR_AGC_RX1_GAIN_LOCK_DELAY                0x43E
+#define MYKONOS_ADDR_AGC_RX2_GAIN_LOCK_DELAY                0x43F
+#define MYKONOS_ADDR_AGC_RX1_ATTACK_DELAY                   0x440
+#define MYKONOS_ADDR_AGC_RX2_ATTACK_DELAY                   0x441
+#define MYKONOS_ADDR_AGC_ULB_THRSH                          0x442
+#define MYKONOS_ADDR_AGC_LLB_THRSH                          0x443
+#define MYKONOS_ADDR_AGC_RX_BLOCK_DET_DECAY                 0x444
+#define MYKONOS_ADDR_AGC_RESET_PD_HIGH_CNT                  0x445
+#define MYKONOS_ADDR_AGC_RX2_MAX_GAIN_INDEX                 0x446
+#define MYKONOS_ADDR_AGC_RX2_MIN_GAIN_INDEX                 0x447
+#define MYKONOS_ADDR_AGC_ORX_SNRX_CFG_1                     0x448
+#define MYKONOS_ADDR_AGC_ORX_SNRX_CFG_2                     0x449
+#define MYKONOS_ADDR_AGC_ORX_SNRX_MAX_GAIN_INDEX            0x44A
+#define MYKONOS_ADDR_AGC_ORX_SNRX_MIN_GAIN_INDEX            0x44B
+#define MYKONOS_ADDR_AGC_ORX_SNRX_MANUAL_GAIN_CFG           0x44C
+#define MYKONOS_ADDR_AGC_ORX_SNRX_GPIO_SEL                  0x44D
+#define MYKONOS_ADDR_AGC_ORX_SNRX_LOCK_LEVEL                0x44E
+#define MYKONOS_ADDR_AGC_ORX_SNRX_OVRG_GAIN_STEP_1          0x44F
+#define MYKONOS_ADDR_AGC_ORX_SNRX_OVRG_GAIN_STEP_2          0x450
+#define MYKONOS_ADDR_AGC_ORX_SNRX_OVRG_GAIN_STEP_3          0x451
+#define MYKONOS_ADDR_AGC_ORX_SNRX_OVRG_GAIN_STEP_4          0x452
+#define MYKONOS_ADDR_AGC_ORX_SNRX_OVRG_GAIN_STEP_5          0x453
+#define MYKONOS_ADDR_AGC_ORX_SNRX_OVRG_GAIN_STEP_6          0x454
+#define MYKONOS_ADDR_AGC_ORX_SNRX_GAIN_LOCK_DELAY           0x455
+#define MYKONOS_ADDR_AGC_ORX_SNRX_ATTACK_DELAY              0x456
+#define MYKONOS_ADDR_AGC_ORX_SNRX_ULB_THRSH                 0x457
+#define MYKONOS_ADDR_AGC_ORX_SNRX_LLB_THRSH                 0x458
+#define MYKONOS_ADDR_AGC_ORX_SNRX_BLOCK_DET_DECAY           0x459
+#define MYKONOS_ADDR_AGC_ORX_SNRX_RESET_PD_HIGH_CNT         0x45A
+#define MYKONOS_ADDR_AGC_ORX1_MANUAL_GAIN_INDEX             0x45B
+#define MYKONOS_ADDR_AGC_ORX2_MANUAL_GAIN_INDEX             0x45C
+#define MYKONOS_ADDR_AGC_SNRX_MANUAL_GAIN_INDEX             0x45D
+#define MYKONOS_ADDR_AGC_LOOPBACK1_MANUAL_GAIN_INDEX        0x45E
+#define MYKONOS_ADDR_AGC_LOOPBACK2_MANUAL_GAIN_INDEX        0x45F
+#define MYKONOS_ADDR_AGC_ORX_SNRX_ACTIVE                    0x460
+
+/* Mykonos Fast Attack AGC Registers */
+#define MYKONOS_ADDR_AGC_FAST_CFG_1                         0x468
+#define MYKONOS_ADDR_AGC_FAST_CFG_2                         0x469
+#define MYKONOS_ADDR_AGC_FAST_ENRGY_LOST_THRSH              0x46A
+#define MYKONOS_ADDR_AGC_FAST_STRONG_SIG_THRSH              0x46B
+#define MYKONOS_ADDR_AGC_FAST_SETTING_DELAY                 0x46C
+#define MYKONOS_ADDR_AGC_FAST_OPT_MAX_GAIN                  0x46D
+#define MYKONOS_ADDR_AGC_FAST_ENRGY_DET_CNT                 0x46E
+#define MYKONOS_ADDR_AGC_FAST_AGCLL_UPPER_LIMIT             0x46F
+#define MYKONOS_ADDR_AGC_FAST_GAIN_LOCK_EXIT_CNT            0x470
+#define MYKONOS_ADDR_AGC_FAST_ORX_SNRX_CFG_1                0x471
+#define MYKONOS_ADDR_AGC_FAST_ORX_SNRX_CFG_2                0x472
+#define MYKONOS_ADDR_AGC_FAST_ORX_SNRX_ENRGY_LOST_THRSH     0x473
+#define MYKONOS_ADDR_AGC_FAST_ORX_SNRX_STRONG_SIG_THRSH     0x474
+#define MYKONOS_ADDR_AGC_FAST_ORX_SNRX_SET_DELAY            0x475
+#define MYKONOS_ADDR_AGC_FAST_ORX_SNRX_OPT_MAX_GAIN         0x476
+#define MYKONOS_ADDR_AGC_FAST_ORX_SNRX_ENRGY_DET_CNT        0x477
+#define MYKONOS_ADDR_AGC_FAST_ORX_SNRX_AGCLL_UPPER_LIMIT    0x478
+#define MYKONOS_ADDR_AGC_FAST_ORX_SNRX_GAIN_LOCK_EXIT_CNT   0x479
+
+/* Mykonos Slow Loop - Hybrid AGC Registers */
+#define MYKONOS_ADDR_AGC_SLOW_LOCK_LEV_THRSH                    0x480
+#define MYKONOS_ADDR_AGC_SLOW_ULB_CNT_THRSH                     0x481
+#define MYKONOS_ADDR_AGC_SLOW_LLB_CNT_THRSH                     0x482
+#define MYKONOS_ADDR_AGC_SLOW_HIGH_OVRG_CNT_THRSH               0x483
+#define MYKONOS_ADDR_AGC_SLOW_LOW_OVRG_CNT_THRSH                0x484
+#define MYKONOS_ADDR_AGC_SLOW_VERYLOW_OVRG_CNT_THRSH            0x485
+#define MYKONOS_ADDR_AGC_SLOW_DIG_SAT_CNT_THRSH                 0x486
+#define MYKONOS_ADDR_AGC_SLOW_UPPER0_THRSH_GAIN_STEP            0x487
+#define MYKONOS_ADDR_AGC_SLOW_LOWER0_THRSH_GAIN_STEP            0x488
+#define MYKONOS_ADDR_AGC_SLOW_UPPER1_THRSH_GAIN_STEP            0x489
+#define MYKONOS_ADDR_AGC_SLOW_LOWER1_THRSH_GAIN_STEP            0x48A
+#define MYKONOS_ADDR_AGC_SLOW_GAIN_UPDATE_CNT_1                 0x48B
+#define MYKONOS_ADDR_AGC_SLOW_GAIN_UPDATE_CNT_2                 0x48C
+#define MYKONOS_ADDR_AGC_SLOW_GAIN_UPDATE_CNT_3                 0x48D
+#define MYKONOS_ADDR_AGC_SLOW_LOOP_CFG                          0x48E
+#define MYKONOS_ADDR_AGC_SLOW_POWER_THRSH                       0x48F
+#define MYKONOS_ADDR_AGC_SLOW_ORX_SNRX_LOCK_LEV_THRSH           0x490
+
+#define MYKONOS_ADDR_AGC_SLOW_ORX_SNRX_ULB_CNT_THRSH                0x491
+#define MYKONOS_ADDR_AGC_SLOW_ORX_SNRX_LLB_CNT_THRSH                0x492
+#define MYKONOS_ADDR_AGC_SLOW_ORX_SNRX_ADC_HIGH_OVRG_CNT_THRSH      0x493
+#define MYKONOS_ADDR_AGC_SLOW_ORX_SNRX_ADC_LOW_OVRG_CNT_THRSH       0x494
+#define MYKONOS_ADDR_AGC_SLOW_ORX_SNRX_ADC_VERYLOW_OVRG_CNT_THRSH   0x495
+
+#define MYKONOS_ADDR_AGC_SLOW_ORX_SNRX_DIG_SAT_CNT_THRSH        0x496
+#define MYKONOS_ADDR_AGC_SLOW_ORX_SNRX_UPPER0_THRSH_GAIN_STEP   0x497
+#define MYKONOS_ADDR_AGC_SLOW_ORX_SNRX_LOWER0_THRSH_GAIN_STEP   0x498
+#define MYKONOS_ADDR_AGC_SLOW_ORX_SNRX_UPPER1_THRSH_GAIN_STEP   0x499
+#define MYKONOS_ADDR_AGC_SLOW_ORX_SNRX_LOWER1_THRSH_GAIN_STEP   0x49A
+#define MYKONOS_ADDR_AGC_SLOW_ORX_SNRX_GAIN_UPDATE_CTR_1        0x49B
+#define MYKONOS_ADDR_AGC_SLOW_ORX_SNRX_GAIN_UPDATE_CTR_2        0x49C
+#define MYKONOS_ADDR_AGC_SLOW_ORX_SNRX_GAIN_UPDATE_CTR_3        0x49D
+#define MYKONOS_ADDR_AGC_SLOW_ORX_SNRX_LOOP_CFG                 0x49E
+#define MYKONOS_ADDR_AGC_SLOW_ORX_SNRX_POWER_THRSH              0x49F
+#define MYKONOS_ADDR_AGC_SLOW_ORX_SNRX_UL_SIG_POW_MEAS_DEL_1    0x4A0
+#define MYKONOS_ADDR_AGC_SLOW_ORX_SNRX_UL_SIG_POW_MEAS_DEL_2    0x4A1
+#define MYKONOS_ADDR_AGC_SLOW_ORX_SNRX_UL_SIG_POW_MEAS_DUR_1    0x4A2
+#define MYKONOS_ADDR_AGC_SLOW_ORX_SNRX_UL_SIG_POW_MEAS_DUR_2    0x4A3
+
+/* Mykonos Gain Control Read Registers */
+#define MYKONOS_ADDR_GAIN_CTL_CHANNEL_1                         0x4B0
+#define MYKONOS_ADDR_GAIN_CTL_FAST_ATTK_STATE                   0x4B1
+#define MYKONOS_ADDR_GAIN_CTL_SLOW_LOOP_STATE                   0x4B2
+#define MYKONOS_ADDR_GAIN_CTL_CHANNEL_2                         0x4B3
+#define MYKONOS_ADDR_GAIN_CTL_OVRG_SIGS_CHANNEL_1               0x4B4
+#define MYKONOS_ADDR_GAIN_CTL_OVRG_SIGS_CHANNEL_2               0x4B5
+#define MYKONOS_ADDR_GAIN_CTL_ORX_SNRX_GAIN                     0x4B6
+#define MYKONOS_ADDR_GAIN_CTL_ORX_SNRX_LOOP_STATE               0x4B7
+#define MYKONOS_ADDR_GAIN_CTL_ORX_SNRX_OVRG_SIGS                0x4B8
+
+/* Mykonos Rx Data Path Overrange Registers */
+#define MYKONOS_ADDR_RX_OVRG_DATAPATH_OVRFLW                    0x4B9
+#define MYKONOS_ADDR_RX_OVRG_ORX_SNRX_DATAPATH_OVRFLW           0x4BA
+
+/* Mykonos RSSI Measurement Registers and Dec Power Measurement Registers*/
+#define MYKONOS_ADDR_RSSI_MEAS_DURATION_0_1                     0x4C0
+#define MYKONOS_ADDR_RSSI_MEAS_DURATION_2_3                     0x4C1
+#define MYKONOS_ADDR_RSSI_CFG                                   0x4C6
+#define MYKONOS_DEC_POWER_CONFIG_1                              0x4C7
+#define MYKONOS_DEC_POWER_CONFIG_2								0x4C8
+#define MYKONOS_ADDR_DPD_SNF_RSSI_CFG                           0x4CF
+#define MYKONOS_ADDR_DPD_RSSI_CFG                               0x4D6
+#define MYKONOS_SNIFFER_DEC_POWER_CONFIG_1						0x4D7
+#define MYKONOS_SNIFFER_DEC_POWER_CONFIG_2						0x4D8
+#define MYKONOS_CH1_DECIMATED_PWR								0x4DE
+#define MYKONOS_CH2_DECIMATED_PWR								0x4DF
+#define MYKONOS_SNIFFER_DECIMATED_PWR							0x4E6
+
+#define MYKONOS_ADDR_DIGITAL_GAIN_CONFIG                    0x4F0
+#define MYKONOS_ADDR_DPD_SNIFFER_DIGITAL_GAIN_CONFIG        0x4F1
+#define MYKONOS_ADDR_GAIN_TABLE_ADDR						0x500
+#define MYKONOS_ADDR_GAIN_TABLE_RX1_FE_GAIN					0x501
+#define MYKONOS_ADDR_GAIN_TABLE_RX1_EXT_CTL					0x502
+#define MYKONOS_ADDR_GAIN_TABLE_RX1_DIG_GAIN				0x503
+#define MYKONOS_ADDR_GAIN_TABLE_RX2_FE_GAIN					0x504
+#define MYKONOS_ADDR_GAIN_TABLE_RX2_EXT_CTL					0x505
+#define MYKONOS_ADDR_GAIN_TABLE_RX2_DIG_GAIN				0x506
+#define MYKONOS_ADDR_GAIN_TABLE_RX3_FE_GAIN					0x507
+#define MYKONOS_ADDR_GAIN_TABLE_RX3_LNA_ENAB				0x508
+#define MYKONOS_ADDR_GAIN_TABLE_RX3_DIG_GAIN				0x509
+#define MYKONOS_ADDR_GAIN_TABLE_CONFIGURATION               0x516
+#define MYKONOS_ADDR_CH3_GAIN_TABLE_CONFIGURATION           0x517
+#define MYKONOS_ADDR_RXFE1_LOCM                             0x520
+#define MYKONOS_ADDR_RXFE2_LOCM                             0x521
+#define MYKONOS_ADDR_RXLOOPBACK1_CNTRL_1                    0x540
+#define MYKONOS_ADDR_RXLOOPBACK2_CNTRL_1                    0x541
+#define MYKONOS_ADDR_RX_LOOPBACK1_CNTRL_4                   0x546
+#define MYKONOS_ADDR_RX_LOOPBACK2_CNTRL_4                   0x547
+
+/* Mykonos Overload/Peak Detection Registers */
+#define MYKONOS_ADDR_OVRLD_ADC_OVRLD_CFG                    0x580
+#define MYKONOS_ADDR_OVRLD_ADC_OVRLD_UPPER_THRSH            0x581
+#define MYKONOS_ADDR_OVRLD_ADC_OVRLD_LOWER_THRSH            0x582
+
+#define MYKONOS_ADDR_OVRLD_PD_DEC_OVRLD_CFG                 0x583
+#define MYKONOS_ADDR_OVRLD_PD_DEC_OVRLD_UPPER_THRSH         0x584
+#define MYKONOS_ADDR_OVRLD_PD_DEC_OVRLD_LOWER_THRSH         0x585
+#define MYKONOS_ADDR_OVRLD_PD_DEC_VERYLOW_THRSH             0x586
+#define MYKONOS_ADDR_ORX_SNRX_OVRLD_ADC_OVRLD_CFG           0x587
+#define MYKONOS_ADDR_ORX_SNRX_OVRLD_PD_DEC_OVRLD_CFG        0x58A
+#define MYKONOS_ADDR_ORX_SNRX_OVRLD_PD_DEC_OVRLD_UPPER_THRSH    0x58B
+#define MYKONOS_ADDR_ORX_SNRX_OVRLD_PD_DEC_OVRLD_LOWER_THRSH    0x58C
+#define MYKONOS_ADDR_ORX_SNRX_OVRLD_PD_DEC_OVRLD_VERYLOW_THRSH  0x58D
+
+#define MYKONOS_ADDR_RX_ADC_FLASH_DELAY                     0x5B6
+#define MYKONOS_ADDR_RX_ADC_FLASH_CTRL                      0x5B7
+#define MYKONOS_ADDR_RX_ADC1_PRFL                           0x5DD
+#define MYKONOS_ADDR_RX_ADC2_PRFL                           0x5DE
+#define MYKONOS_ADDR_ORX_ADC_PRFL                           0x5DF
+
+#define MYKONOS_ADDR_RFDC_MEASURE_COUNT_1                   0x631
+#define MYKONOS_ADDR_RFDC_MEASURE_COUNT_2                   0x632
+#define MYKONOS_ADDR_RFDC_PROGRAM_SHIFT                     0x635
+#define MYKONOS_ADDR_RFDC_CONFIG2                           0x636
+#define MYKONOS_DPD_Sniffer_RFDC_CAL_TRACK_EN               0x642
+#define MYKONOS_ADDR_RFDC_SNF_MEASURE_COUNT_1               0x644
+#define MYKONOS_ADDR_RFDC_SNF_MEASURE_COUNT_2               0x645
+#define MYKONOS_ADDR_RFDC_ORX_MEASURE_COUNT_1               0x650
+#define MYKONOS_ADDR_RFDC_ORX_MEASURE_COUNT_2               0x651
+#define MYKONOS_ADDR_DIGITAL_DC_MIN_CAL_IDX                 0x63A
+#define MYKONOS_ADDR_DIGITAL_DC_OFFSET_SHIFT                0x674
+#define MYKONOS_ADDR_DIGITAL_DC_OFFSET_CONFIG               0x676
+#define MYKONOS_DIGITAL_DC_OFFSET_CH3_TRACKING              0x67A
+#define MYKONOS_ADDR_DIGITAL_DC_OFFSET_SNF                  0x67C
+#define MYKONOS_ADDR_DIGITAL_DC_OFFSET_CH3_DPD_M_SHIFT      0x67D
+
+#define MYKONOS_ADDR_RX_GAIN_COMP_DELAY                     0x710
+#define MYKONOS_ADDR_RX1_GAIN_COMP_OFFSET                   0x711
+#define MYKONOS_ADDR_RX2_GAIN_COMP_OFFSET                   0x712
+#define MYKONOS_ADDR_RX_GAIN_COMP_CFG                       0x713
+#define MYKONOS_ADDR_RX_SLCR_PIN_CFG                        0x714
+#define MYKONOS_ADDR_DPD_SNF_RX_GAIN_COMP_DELAY             0x715
+#define MYKONOS_ADDR_DPD_SNF_RX_GAIN_COMP_OFFSET            0x716
+#define MYKONOS_ADDR_DPD_SNF_RX_GAIN_COMP_CFG               0x717
+#define MYKONOS_ADDR_DPD_SNF_RX_SLCR_PIN_CFG                0x718
+
+#define MYKONOS_ADDR_FLOATING_POINT_CFG                     0x750
+#define MYKONOS_ADDR_FLOATING_POINT_RX_CTRL                 0x751
+#define MYKONOS_ADDR_FLOATING_POINT_ORX_CTRL                0x752
+
+
+#define MYKONOS_ADDR_SNRX_LNA_BIAS_C                        0x81B
+
+
+#define MYKONOS_ADDR_ORX_ADC_FLASH_DELAY                     0x846
+#define MYKONOS_ADDR_ORX_ADC_FLASH_CTRL                      0x847
+
+#define MYKONOS_ADDR_TX_FILTER_CONFIGURATION                0x910
+#define MYKONOS_ADDR_TX1_ATTENUATION_0_READBACK             0x940
+#define MYKONOS_ADDR_TX1_ATTENUATION_1_READBACK             0x941
+#define MYKONOS_ADDR_TX2_ATTENUATION_0_READBACK             0x942
+#define MYKONOS_ADDR_TX2_ATTENUATION_1_READBACK             0x943
+#define MYKONOS_ADDR_TX_FILTER_OVERFLOW 					0x950
+
+/* Mykonos PA Protection Block Registers */
+#define MYKONOS_ADDR_PA_PROTECTION_CONFIGURATION            0x955
+#define MYKONOS_ADDR_PA_PROTECTION_ATTEN_CONTROL            0x956
+#define MYKONOS_ADDR_PA_PROTECTION_THRESHOLD_LSB            0x957
+#define MYKONOS_ADDR_PA_PROTECTION_THRESHOLD_MSB            0x958
+#define MYKONOS_ADDR_PA_PROTECTION_POWER_READBACK_LSB       0x959
+#define MYKONOS_ADDR_PA_PROTECTION_POWER_READBACK_MSB       0x95A
+#define MYKONOS_ADDR_TX1_ATTENUATION_0                      0x960
+#define MYKONOS_ADDR_TX1_ATTENUATION_1                      0x961
+#define MYKONOS_ADDR_TX2_ATTENUATION_0                      0x962
+#define MYKONOS_ADDR_TX2_ATTENUATION_1                      0x963
+#define MYKONOS_ADDR_TX1_GAIN_0                             0x967
+#define MYKONOS_ADDR_TX1_GAIN_1                             0x968
+#define MYKONOS_ADDR_TX1_GAIN_2                             0x969
+#define MYKONOS_ADDR_TX2_GAIN_0                             0x96A
+#define MYKONOS_ADDR_TX2_GAIN_1                             0x96B
+#define MYKONOS_ADDR_TX2_GAIN_2                             0x96C
+#define MYKONOS_ADDR_TX_INCR_DECR_WORD                      0x96D
+#define MYKONOS_ADDR_TX_TPC_CONFIG                          0x96E
+#define MYKONOS_ADDR_TX_TPC_GPIO_CFG                        0x96F
+
+#define MYKONOS_ADDR_TX_ABBF_FREQ_CAL_NCO_I_MSB             0x9CB
+#define MYKONOS_ADDR_TX_ABBF_FREQ_CAL_NCO_I_LSB             0x9CC
+#define MYKONOS_ADDR_TX_ABBF_FREQ_CAL_NCO_Q_MSB             0x9CD
+#define MYKONOS_ADDR_TX_ABBF_FREQ_CAL_NCO_Q_LSB             0x9CE
+
+/* Mykonos GPIO Registers */
+#define MYKONOS_ADDR_GPIO_3V3_DIR_CTL_7_0					0xB00
+#define MYKONOS_ADDR_GPIO_3V3_DIR_CTL_15_8					0xB01
+#define MYKONOS_ADDR_GPIO_3V3_SPI_SRC_7_0					0xB02
+#define MYKONOS_ADDR_GPIO_3V3_SPI_SRC_15_8					0xB03
+#define MYKONOS_ADDR_GPIO_3V3_SPI_READ_7_0					0xB04
+#define MYKONOS_ADDR_GPIO_3V3_SPI_READ_15_8					0xB05
+#define MYKONOS_ADDR_GPIO_3V3_LSB_SRC_CTL					0xB06
+#define MYKONOS_ADDR_GPIO_3V3_MSB_SRC_CTL					0xB07
+
+#define MYKONOS_ADDR_GPIO_DIR_CTL_7_0					    0xB20
+#define MYKONOS_ADDR_GPIO_DIR_CTL_15_8					    0xB21
+#define MYKONOS_ADDR_GPIO_DIR_CTL_18_16					    0xB22
+#define MYKONOS_ADDR_GPIO_SPI_SRC_7_0					    0xB23
+#define MYKONOS_ADDR_GPIO_SPI_SRC_15_8					    0xB24
+#define MYKONOS_ADDR_GPIO_SPI_SRC_18_16					    0xB25
+#define MYKONOS_ADDR_GPIO_SPI_READ_7_0					    0xB26
+#define MYKONOS_ADDR_GPIO_SPI_READ_15_8					    0xB27
+#define MYKONOS_ADDR_GPIO_SPI_READ_18_16				    0xB28
+#define MYKONOS_ADDR_SOURCE_CONTROL_LOWER_BYTE              0xB29
+#define MYKONOS_ADDR_SOURCE_CONTROL_UPPER_BYTE              0xB2A
+#define MYKONOS_ADDR_SOURCE_CONTROL_EXTRA_BITS              0xB2B
+
+#define MYKONOS_ADDR_GPIO_MONITOR_INDEX                     0xB40
+#define MYKONOS_ADDR_GPIO_MONITOR_ENABLE                    0xB41
+
+#define MYKONOS_ADDR_GP_INTERRUPT_MASK_1                    0xB42
+#define MYKONOS_ADDR_GP_INTERRUPT_MASK_0                    0xB43
+#define MYKONOS_ADDR_GP_INTERRUPT_READ_1                    0xB44
+#define MYKONOS_ADDR_GP_INTERRUPT_READ_0                    0xB45
+
+#define MYKONOS_ADDR_PDAUXDAC_MANUAL_CONTROL_5_0            0xB73
+#define MYKONOS_ADDR_PDAUXDAC_MANUAL_CONTROL_9_6            0xB74
+#define MYKONOS_ADDR_PDAUXDAC_MANUAL_IN_5_0                 0xB75
+#define MYKONOS_ADDR_PDAUXDAC_MANUAL_IN_9_6                 0xB76
+#define MYKONOS_ADDR_AUX_DAC_LATCH_CONTROL                  0xB9F
+#define MYKONOS_ADDR_AUXDAC_0_WORD_MSB                      0xBA0
+
+#define MYKONOS_ADR_AUX_ADC_CLOCK_DIVIDE                    0xBC0
+#define MYKONOS_ADDR_AUX_ADC_CFG                            0xBC1
+#define MYKONOS_ADDR_AUX_ADC_READ_MSB                       0xBC2
+#define MYKONOS_ADDR_AUX_ADC_READ_LSB                       0xBC3
+#define MYKONOS_ADDR_AUX_ADC_SEL                            0xBC4
+#define MYKONOS_ADDR_AUX_ADC_BUFFER_CONFIG_0                0xBC5
+#define MYKONOS_ADDR_AUX_ADC_BUFFER_CONFIG_1                0xBC6
+
+#define MYKONOS_ADDR_TEMP_SENSOR_OFFSET                     0xBE0
+#define MYKONOS_ADDR_TEMP_SENSOR_CONTROL_LSB                0xBE1
+#define MYKONOS_ADDR_TEMP_SENSOR_CONTROL_MSB                0xBE2
+#define MYKONOS_ADDR_TEMP_SENSOR_READ                       0xBE3
+#define MYKONOS_ADDR_TEMP_SENSOR_CONFIG                     0xBE4
+
+#define MYKONOS_ADDR_DIGITAL_TEST_BYTE_0                    0xC40
+
+/* ARM subsystem registers */
+#define MYKONOS_ADDR_ARM_CTL_1								0xD00
+#define MYKONOS_ADDR_ARM_CTL_2								0xD01
+#define MYKONOS_ADDR_ARM_ADDR_BYTE_0						0xD02
+#define MYKONOS_ADDR_ARM_ADDR_BYTE_1						0xD03
+#define MYKONOS_ADDR_ARM_DATA_BYTE_0						0xD04
+#define MYKONOS_ADDR_ARM_DATA_BYTE_1						0xD05
+#define MYKONOS_ADDR_ARM_DATA_BYTE_2						0xD06
+#define MYKONOS_ADDR_ARM_DATA_BYTE_3						0xD07
+#define MYKONOS_ADDR_ARM_CLK_CTL							0xD08
+#define MYKONOS_ADDR_AHB_SPI_BRIDGE							0xD09
+#define MYKONOS_ADDR_ARM_BOOT_ADDR_BYTE_0					0xD0A
+#define MYKONOS_ADDR_ARM_BOOT_ADDR_BYTE_1					0xD0B
+#define MYKONOS_ADDR_ARM_BOOT_ADDR_BYTE_2					0xD0C
+#define MYKONOS_ADDR_ARM_BOOT_ADDR_BYTE_3					0xD0D
+#define MYKONOS_ADDR_ARM_STACK_PTR_BYTE_0					0xD0E
+#define MYKONOS_ADDR_ARM_STACK_PTR_BYTE_1					0xD0F
+#define MYKONOS_ADDR_ARM_STACK_PTR_BYTE_2					0xD10
+#define MYKONOS_ADDR_ARM_STACK_PTR_BYTE_3					0xD11
+#define MYKONOS_ADDR_ARM_BRIDGE_CLK_CTL						0xD14
+
+/* ARM mailbox registers */
+#define MYKONOS_ADDR_ARM_CMD								0xD30
+#define MYKONOS_ADDR_ARM_EXT_CMD_BYTE_1						0xD31
+#define MYKONOS_ADDR_ARM_EXT_CMD_BYTE_2						0xD32
+#define MYKONOS_ADDR_ARM_EXT_CMD_BYTE_3						0xD33
+#define MYKONOS_ADDR_ARM_EXT_CMD_BYTE_4						0xD34
+#define MYKONOS_ADDR_ARM_EXT_CMD_BYTE_5						0xD35
+#define MYKONOS_ADDR_ARM_EXT_CMD_BYTE_6						0xD36
+#define MYKONOS_ADDR_ARM_EXT_CMD_BYTE_7						0xD37
+#define MYKONOS_ADDR_ARM_CMD_STATUS_0						0xD38
+#define MYKONOS_ADDR_ARM_CMD_STATUS_1						0xD39
+#define MYKONOS_ADDR_ARM_CMD_STATUS_2						0xD3A
+#define MYKONOS_ADDR_ARM_CMD_STATUS_3						0xD3B
+#define MYKONOS_ADDR_ARM_CMD_STATUS_4						0xD3C
+#define MYKONOS_ADDR_ARM_CMD_STATUS_5						0xD3D
+#define MYKONOS_ADDR_ARM_CMD_STATUS_6						0xD3E
+#define MYKONOS_ADDR_ARM_CMD_STATUS_7						0xD3F
+
+#define MYKONOS_ADDR_ARM_OPCODE_STATE_0						0xD40
+#define MYKONOS_ADDR_ARM_OPCODE_STATE_1						0xD41
+#define MYKONOS_ADDR_ARM_OPCODE_STATE_2						0xD42
+#define MYKONOS_ADDR_ARM_OPCODE_STATE_3						0xD43
+#define MYKONOS_ADDR_ARM_OPCODE_STATE_4						0xD44
+#define MYKONOS_ADDR_ARM_OPCODE_STATE_5						0xD45
+#define MYKONOS_ADDR_ARM_OPCODE_STATE_6						0xD46
+#define MYKONOS_ADDR_ARM_OPCODE_STATE_7						0xD47
+
+/* Mykonos Power-Down Override Control Registers */
+#define MYKONOS_ADDR_TX_PD_OVERRIDE_CONTROL_7_0             0xD89
+
+/* Mykonos Observation Framer Registers */
+#define MYKONOS_ADDR_OBS_FRAMER_RESET						0xDC0
+#define MYKONOS_ADDR_OBS_FRAMER_CLK_EN						0xDC1
+#define MYKONOS_ADDR_OBS_FRAMER_ADDR						0xDC2
+#define MYKONOS_ADDR_OBS_FRAMER_DATA						0xDC3
+#define MYKONOS_ADDR_OBS_FRAMER_WRITE_EN					0xDC4
+#define MYKONOS_ADDR_OBS_FRAMER_SYSREF_FIFO_EN				0xDC5
+#define MYKONOS_ADDR_OBS_FRAMER_CONFIG_F					0xDC6
+#define MYKONOS_ADDR_OBS_FRAMER_LANE_CTL					0xDC7
+#define MYKONOS_ADDR_OBS_FRAMER_ADC_XBAR_SEL				0xDC8
+#define MYKONOS_ADDR_OBS_FRAMER_LANE_XBAR_SEL				0xDC9
+#define MYKONOS_ADDR_OBS_FRAMER_CONFIG_LOOPBACK_XBAR_REV	0xDCA
+#define MYKONOS_ADDR_OBS_FRAMER_SYNCN_FILT					0xDCB
+#define MYKONOS_ADDR_OBS_FRAMER_LMFC_F_OFFSET				0xDCC
+#define MYKONOS_ADDR_OBS_FRAMER_LMFC_K_OFFSET				0xDCD
+#define MYKONOS_ADDR_OBS_FRAMER_TEST_CNTR_CTL				0xDCE
+#define MYKONOS_ADDR_OBS_FRAMER_STATUS_STRB					0xDCF
+#define MYKONOS_ADDR_OBS_FRAMER_STATUS						0xDD0
+#define MYKONOS_ADDR_OBS_FRAMER_SYSREF_TO_LMFC_CNTR_STAT	0xDD1
+#define MYKONOS_ADDR_OBS_FRAMER_SYSREF_TO_LMFC_ERR_MARGIN	0xDD2
+#define MYKONOS_ADDR_OBS_FRAMER_LANE_FIFO_STRB				0xDD3
+#define MYKONOS_ADDR_OBS_FRAMER_LANE0_FIFO_RDWR_ADDR		0xDD4
+#define MYKONOS_ADDR_OBS_FRAMER_LANE1_FIFO_RDWR_ADDR		0xDD5
+#define MYKONOS_ADDR_OBS_FRAMER_LANE2_FIFO_RDWR_ADDR		0xDD6
+#define MYKONOS_ADDR_OBS_FRAMER_LANE3_FIFO_RDWR_ADDR		0xDD7
+#define MYKONOS_ADDR_OBS_FRAMER_PRBS10_CTL					0xDD8
+#define MYKONOS_ADDR_OBS_FRAMER_PRBS20_CTL					0xDD9
+#define MYKONOS_ADDR_OBS_FRAMER_PATTERN_GEN_EN				0xDDA
+#define MYKONOS_ADDR_OBS_FRAMER_PATTERN_GEN_7_TO_0			0xDDB
+#define MYKONOS_ADDR_OBS_FRAMER_PATTERN_GEN_15_TO_8			0xDDC
+#define MYKONOS_ADDR_OBS_FRAMER_PATTERN_GEN_19_TO_16		0xDDD
+#define MYKONOS_ADDR_OBS_FRAMER_CONFIG_JTX_GEN				0xDDE
+#define MYKONOS_ADDR_OBS_FRAMER_LANE_DATA_CTL				0xDDF
+#define MYKONOS_ADDR_OBS_FRAMER_DATA_SAMPLE_CTL				0xDE0
+
+#define MYKONOS_ADDR_PFIR_COEFF_CTL                         0xDFF
+#define MYKONOS_ADDR_PFIR_COEFF_DATA                        0xE00
+#define MYKONOS_ADDR_PFIR_COEFF_ADDR                        0xE01
+
+/* ARM memory */
+#define MYKONOS_ADDR_ARM_START_PROG_ADDR					0x01000000
+#define MYKONOS_ADDR_ARM_END_PROG_ADDR						0x01017FFF
+#define MYKONOS_ADDR_ARM_START_DATA_ADDR					0x20000000
+#define MYKONOS_ADDR_ARM_END_DATA_ADDR						0x2000FFFF
+#define MYKONOS_ADDR_ARM_BUILD_CHKSUM_ADDR					0x01017FE0
+#define MYKONOS_ADDR_ARM_CALC_CHKSUM_ADDR					0x01017FE4
+#define MYKONOS_ADDR_ARM_VERSION                            0x01000128
+#define MYKONOS_ARM_ABORT_OPCODE                            0x00
+#define MYKONOS_ARM_RUNINIT_OPCODE                          0x02
+#define MYKONOS_ARM_RADIOON_OPCODE                          0x04
+#define MYKONOS_ARM_WRITECFG_OPCODE                         0x06
+#define MYKONOS_ARM_READCFG_OPCODE                          0x08
+#define MYKONOS_ARM_SET_OPCODE                              0x0A
+#define MYKONOS_ARM_GET_OPCODE                              0x0C
+
+#define MYKONOS_ARM_OBJECTID_DPDINIT_CONFIG                 0x0F
+#define MYKONOS_ARM_OBJECTID_CLGCINIT_CONFIG                0x10
+#define MYKONOS_ARM_OBJECTID_VSWRINIT_CONFIG                0x11
+#define MYKONOS_ARM_OBJECTID_DPDCONFIG                      0x24
+#define MYKONOS_ARM_DPD_RESET                               0x02
+#define MYKONOS_ARM_OBJECTID_GS_TRACKCALS                   0x66
+#define MYKONOS_ARM_OBJECTID_RXQEC_TRACKING                 0x20
+#define MYKONOS_ARM_OBJECTID_ORXQEC_TRACKING                0x21
+#define MYKONOS_ARM_OBJECTID_TXLOL_TRACKING                 0x22
+#define MYKONOS_ARM_OBJECTID_TXQEC_TRACKING                 0x23
+#define MYKONOS_ARM_OBJECTID_CLGCCONFIG                     0x25
+#define MYKONOS_ARM_OBJECTID_VSWRCONFIG                     0x26
+#define MYKONOS_ARM_OBJECTID_CAL_STATUS                     0x42
+#define MYKONOS_ARM_OBJECTID_INIT_CAL_DONE                  0x43
+#define MYKONOS_ARM_OBJECTID_ORX_MODE                       0x61
+#define MYKONOS_ARM_OBJECTID_TRACKING_CAL_SUSPEND_RESUME    0x65
+#define MYKONOS_ARM_OBJECTID_TRACKING_CAL_CONTROL           0x66
+#define MYKONOS_ARM_OBJECTID_TRACKING_CAL_PENDING           0x67
+#define MYKONOS_ARM_OBJECTID_RADIO_CONTROL                  0x81
+#define MYKONOS_ARM_OBJECTID_CALSCHEDULER                   0x83
+
+#define MYKONOS_ARM_SYSTEMSTATE_POWERUP                     0x00
+#define MYKONOS_ARM_SYSTEMSTATE_READY                       0x01
+#define MYKONOS_ARM_SYSTEMSTATE_IDLE                        0x02
+#define MYKONOS_ARM_SYSTEMSTATE_RADIO_ON                    0x03
+
+#define ORX_TRIGGER_SIGNALID      0x00
+#define ORX_MODE_0_SIGNALID       0x01
+#define ORX_MODE_1_SIGNALID       0x02
+#define ORX_MODE_2_SIGNALID       0x03
+#define RX1_ENABLE_ACK_SIGNALID   0x04
+#define RX2_ENABLE_ACK_SIGNALID   0x05
+#define TX1_ENABLE_ACK_SIGNALID   0x06
+#define TX2_ENABLE_ACK_SIGNALID   0x07
+#define ORX1_ENABLE_ACK_SIGNALID  0x08
+#define ORX2_ENABLE_ACK_SIGNALID  0x09
+#define SRX_ENABLE_ACK_SIGNALID   0x0A
+#define TX_OBS_SELECT_SIGNALID    0x0B
+
+#define DISABLE_DPD_ACTUATOR      0x03
+#define ENABLE_DPD_ACTUATOR       0x04
+#define SET_CLGC_DESIRED_GAIN_1   0x05
+#define SET_CLGC_DESIRED_GAIN_2   0x06
+#define SET_PATH_DELAY            0x08
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif

dj_f1_ad9371/vitis_classic_autobuild/source/tp_hardware/mykonos/mykonos_user.c

@@ -0,0 +1,176 @@
+/**
+ * \file mykonos_user.c
+ * \brief Contains Mykonos default gain table values for Rx, ObsRx, and SnRx
+ *
+ * Mykonos API version: 1.5.2.3566
+ */
+
+/**
+* \page Disclaimer Legal Disclaimer
+* Copyright 2015-2017 Analog Devices Inc.
+* Released under the AD9371 API license, for more information see the "LICENSE.txt" file in this zip file.
+*
+*/
+
+#include <stdint.h>
+#include "t_mykonos.h"
+#include "mykonos_user.h"
+
+/**
+ * \brief Default Rx gain table settings
+ */
+uint8_t RxGainTable [61][4] =
+{
+	/* Order: {FE table, External Ctl, Digital Gain/Atten, Enable Atten} */
+        {0, 0, 0, 0},  /* Gain index 255 */
+        {3, 0, 2, 1},  /* Gain index 254 */
+        {6, 0, 3, 1},  /* Gain index 253 */
+        {10, 0, 0, 0}, /* Gain index 252 */
+        {13, 0, 1, 1}, /* Gain index 251 */
+        {16, 0, 0, 0}, /* Gain index 250 */
+        {18, 0, 3, 1}, /* Gain index 249 */
+        {21, 0, 1, 1}, /* Gain index 248 */
+        {23, 0, 3, 1}, /* Gain index 247 */
+        {25, 0, 4, 1}, /* Gain index 246 */
+        {28, 0, 0, 0}, /* Gain index 245 */
+        {30, 0, 0, 0}, /* Gain index 244 */
+        {31, 0, 5, 1}, /* Gain index 243 */
+        {33, 0, 4, 1}, /* Gain index 242 */
+        {35, 0, 2, 1}, /* Gain index 241 */
+        {37, 0, 0, 0}, /* Gain index 240 */
+        {38, 0, 4, 1}, /* Gain index 239 */
+        {39, 0, 7, 1}, /* Gain index 238 */
+        {41, 0, 2, 1}, /* Gain index 237 */
+        {42, 0, 4, 1}, /* Gain index 236 */
+        {43, 0, 6, 1}, /* Gain index 235 */
+        {44, 0, 8, 1}, /* Gain index 234 */
+        {45, 0, 9, 1},  /* Gain index 233 */
+        {46, 0, 10, 1}, /* Gain index 232 */
+        {47, 0, 10, 1}, /* Gain index 231 */
+        {48, 0, 9, 1}, /* Gain index 230 */
+        {49, 0, 8, 1}, /* Gain index 229 */
+        {50, 0, 6, 1}, /* Gain index 228 */
+        {51, 0, 3, 1}, /* Gain index 227 */
+        {51, 0, 13, 1}, /* Gain index 226 */
+        {52, 0, 9, 1}, /* Gain index 225 */
+        {53, 0, 5, 1}, /* Gain index 224 */
+        {53, 0, 15, 1}, /* Gain index 223 */
+        {54, 0, 9, 1}, /* Gain index 222 */
+        {54, 0, 19, 1}, /* Gain index 221 */
+        {55, 0, 11, 1}, /* Gain index 220 */
+        {55, 0, 21, 1}, /* Gain index 219 */
+        {56, 0, 11, 1}, /* Gain index 218 */
+        {56, 0, 21, 1}, /* Gain index 217 */
+        {57, 0, 9, 1}, /* Gain index 216 */
+        {57, 0, 19, 1}, /* Gain index 215 */
+        {57, 0, 29, 1}, /* Gain index 214 */
+        {58, 0, 12, 1}, /* Gain index 213 */
+        {58, 0, 22, 1}, /* Gain index 212 */
+        {58, 0, 32, 1}, /* Gain index 211 */
+        {59, 0, 11, 1}, /* Gain index 210 */
+        {59, 0, 21, 1}, /* Gain index 209 */
+        {59, 0, 31, 1}, /* Gain index 208 */
+        {59, 0, 41, 1}, /* Gain index 207 */
+        {60, 0, 13, 1}, /* Gain index 206 */
+        {60, 0, 23, 1}, /* Gain index 205 */
+        {60, 0, 33, 1}, /* Gain index 204 */
+        {60, 0, 43, 1}, /* Gain index 203 */
+        {60, 0, 53, 1}, /* Gain index 202 */
+        {61, 0, 14, 1}, /* Gain index 201 */
+        {61, 0, 24, 1}, /* Gain index 200 */
+        {61, 0, 34, 1}, /* Gain index 199 */
+        {61, 0, 44, 1}, /* Gain index 198 */
+        {61, 0, 54, 1}, /* Gain index 197 */
+        {61, 0, 64, 1}, /* Gain index 196 */
+        {61, 0, 74, 1}, /* Gain index 195 */
+};
+
+/**
+ * \brief Default ORx gain table settings
+ */
+uint8_t ORxGainTable [19][4] =
+{
+	/* Order: {FE table, External Ctl, Digital Gain/Atten, Enable Atten} */
+	{0, 0, 0, 0},	/* Gain index 255 */
+	{7, 0, 0, 0},	/* Gain index 254 */
+	{13, 0, 1, 1},	/* Gain index 253 */
+	{18, 0, 3, 1},	/* Gain index 252 */
+	{23, 0, 3, 1},	/* Gain index 251 */
+	{28, 0, 0, 0},	/* Gain index 250 */
+	{32, 0, 0, 0},	/* Gain index 249 */
+	{35, 0, 2, 1},	/* Gain index 248 */
+	{38, 0, 4, 1},	/* Gain index 247 */
+	{41, 0, 2, 1},	/* Gain index 246 */
+	{43, 0, 6, 1},	/* Gain index 245 */
+	{46, 0, 0, 0},	/* Gain index 244 */
+	{47, 0, 10, 1},	/* Gain index 243 */
+	{49, 0, 8, 1},	/* Gain index 242 */
+	{51, 0, 3, 1},	/* Gain index 241 */
+	{52, 0, 9, 1},	/* Gain index 240 */
+	{53, 0, 14, 1},	/* Gain index 239 */
+	{54, 0, 18, 1},	/* Gain index 238 */
+	{56, 0, 0, 0}	/* Gain index 237 */
+
+};
+
+/**
+ * \brief Default SnRx gain table settings
+ */
+uint8_t SnRxGainTable [53][4] =
+{
+	/* Order: {FE table, LNA Bypass, Digital Gain/Atten, Enable Atten} */
+    {0,  0,  0, 0},  /* Gain index 255 */
+    {1,  0,  7, 1},  /* Gain index 254 */
+    {3,  0,  1, 0},  /* Gain index 253 */
+    {3,  0, 15, 1}, /* Gain index 252 */
+    {5,  0,  0, 0},  /* Gain index 251 */
+    {6,  0,  2, 1},  /* Gain index 250 */
+    {7,  0,  2, 1},  /* Gain index 249 */
+    {8,  0, 12, 1}, /* Gain index 248 */
+    {9,  0,  7, 1},  /* Gain index 247 */
+    {11, 0,  1, 0}, /* Gain index 246 */
+    {11, 0, 15, 1},/* Gain index 245 */
+    {13, 0,  1, 0}, /* Gain index 244 */
+    {14, 0,  2, 0}, /* Gain index 243 */
+    {14, 0, 10, 1},/* Gain index 242 */
+    {15, 0,  0, 0}, /* Gain index 241 */
+    {15, 0, 20, 1},/* Gain index 240 */
+    {16, 0,  2, 1}, /* Gain index 239 */
+    {16, 0, 22, 1},/* Gain index 238 */
+    {17, 0,  1, 0}, /* Gain index 237 */
+    {17, 0, 15, 1},/* Gain index 236 */
+    {17, 0, 35, 1},/* Gain index 235 */
+    {17, 0, 55, 1},/* Gain index 234 */
+    {18, 0,  7, 1}, /* Gain index 233 */
+    {18, 0, 27, 1},/* Gain index 232 */
+    { 6, 1,  7, 1},  /* Gain index 231 */
+    { 7, 1,  7, 1},  /* Gain index 230 */
+    { 8, 1, 17, 1}, /* Gain index 229 */
+    { 9, 1, 12, 1}, /* Gain index 228 */
+    {11, 1,  0, 0}, /* Gain index 227 */
+    {12, 1,  3, 1}, /* Gain index 226 */
+    {13, 1,  0, 0}, /* Gain index 225 */
+    {14, 1,  1, 0}, /* Gain index 224 */
+    {14, 1, 15, 1},/* Gain index 223 */
+    {15, 1,  5, 1}, /* Gain index 222 */
+    {15, 1, 25, 1},/* Gain index 221 */
+    {16, 1,  7, 1}, /* Gain index 220 */
+    {16, 1, 27, 1},/* Gain index 219 */
+    {17, 1,  0, 0}, /* Gain index 218 */
+    {17, 1, 20, 1},/* Gain index 217 */
+    {17, 1, 40, 1},/* Gain index 216 */
+    {17, 1, 60, 1},/* Gain index 215 */
+    {18, 1, 12, 1},/* Gain index 214 */
+    {18, 1, 32, 1},/* Gain index 213 */
+    {18, 1, 52, 1},/* Gain index 212 */
+    {18, 1, 72, 1},/* Gain index 211 */
+    {18, 1, 92, 1},/* Gain index 210 */
+    {19, 1,  1, 0}, /* Gain index 209 */
+    {19, 1, 15, 1},/* Gain index 208 */
+    {19, 1, 35, 1},/* Gain index 207 */
+    {19, 1, 55, 1},/* Gain index 206 */
+    {19, 1, 75, 1},/* Gain index 205 */
+    {19, 1, 95, 1},/* Gain index 204 */
+    {19, 1, 115, 1}/* Gain index 203 */
+};
+

dj_f1_ad9371/vitis_classic_autobuild/source/tp_hardware/mykonos/mykonos_user.h

@@ -0,0 +1,85 @@
+/**
+ * \file mykonos_user.h
+ *
+ * \brief Contains macro definitions and global structure declarations for mykonos_user.c
+ *
+ * Mykonos API version: 1.5.2.3566
+ */
+
+/**
+* \page Disclaimer Legal Disclaimer
+* Copyright 2015-2017 Analog Devices Inc.
+* Released under the AD9371 API license, for more information see the "LICENSE.txt" file in this zip file.
+*
+*/
+
+#ifndef _MYKONOSPROFILES_H_
+#define _MYKONOSPROFILES_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* turns verbose messaging on */
+#define MYKONOS_VERBOSE 1
+#define MYK_ENABLE_SPIWRITEARRAY 1
+
+/* 3 Bytes per SPI transaction * 341 transactions = ~1024 byte buffer size */
+/* Minimum MYK_SPIWRITEARRAY_BUFFERSIZE = 27 */
+#define MYK_SPIWRITEARRAY_BUFFERSIZE 341
+/*
+ *****************************************
+ * Rx, ObsRx, and Sniffer gain tables
+ ******************************************
+ */
+#define MAX_GAIN_TABLE_INDEX			255
+
+#define START_RX_GAIN_INDEX 			255
+#define MAX_RX_GAIN_TABLE_NUMINDEXES	(START_RX_GAIN_INDEX + 1)
+#define MIN_RX_GAIN_TABLE_INDEX			0
+
+#define START_ORX_GAIN_INDEX 			47
+#define MAX_ORX_GAIN_TABLE_NUMINDEXES  	(START_ORX_GAIN_INDEX + 1)
+#define MIN_ORX_GAIN_TABLE_INDEX		(MAX_GAIN_TABLE_INDEX - START_ORX_GAIN_INDEX)
+
+#define START_SNRX_GAIN_INDEX 			127
+#define MAX_SNRX_GAIN_TABLE_NUMINDEXES	(START_SNRX_GAIN_INDEX + 1)
+#define MIN_SNRX_GAIN_TABLE_INDEX		(MAX_GAIN_TABLE_INDEX - START_SNRX_GAIN_INDEX)
+
+#define START_LOOPBACK_GAIN_INDEX           47
+#define MAX_LOOPBACK_GAIN_TABLE_NUMINDEXES  (START_LOOPBACK_GAIN_INDEX + 1)
+#define MIN_LOOPBACK_GAIN_TABLE_INDEX       (MAX_GAIN_TABLE_INDEX - START_SNRX_GAIN_INDEX)
+
+extern uint8_t RxGainTable [61][4];
+extern uint8_t ORxGainTable [19][4];
+extern uint8_t SnRxGainTable [53][4];
+
+
+/*
+ ********************************************
+ * Rx, Sniffer, ObsRx and Tx Profiles limits
+ ********************************************
+ */
+#define MIN_RX_IQRATE_KHZ   15000       /*!< Mykonos minimum IQ rate for the Rx channel, expressed in KHz */
+#define MAX_RX_IQRATE_KHZ   320000      /*!< Mykonos maximum IQ rate for the Rx channel, expressed in KHz */
+
+#define MIN_TX_IQRATE_KHZ   15000       /*!< Mykonos minimum IQ rate for the Tx channel, expressed in KHz */
+#define MAX_TX_IQRATE_KHZ   492000      /*!< Mykonos maximum IQ rate for the Tx channel, expressed in KHz */
+
+#define MIN_SNIFFER_RFBW_HZ 5000000     /*!< Mykonos minimum Sniffer channel bandwidth expressed in Hz */
+#define MAX_SNIFFER_RFBW_HZ 20000000    /*!< Mykonos maximum Sniffer channel bandwidth expressed in Hz */
+
+#define MIN_ORX_RFBW_HZ     5000000     /*!< Mykonos minimum Observation channel bandwidth expressed in Hz */
+#define MAX_ORX_RFBW_HZ     250000000   /*!< Mykonos maximum Observation channel bandwidth expressed in Hz */
+
+#define MIN_RX_RFBW_HZ      5000000     /*!< Mykonos minimum Rx channel bandwidth expressed in Hz */
+#define MAX_RX_RFBW_HZ      100000000   /*!< Mykonos maximum Rx channel bandwidth expressed in Hz */
+
+#define MIN_TX_RFBW_HZ      20000000    /*!< Mykonos minimum Tx channel bandwidth expressed in Hz */
+#define MAX_TX_RFBW_HZ      250000000   /*!< Mykonos maximum Tx channel bandwidth expressed in Hz */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif

dj_f1_ad9371/vitis_classic_autobuild/source/tp_hardware/mykonos/mykonos_version.h

@@ -0,0 +1,31 @@
+/**
+ * \file mykonos_version.h
+ * \brief Contains the version number for the Mykonos API
+ *
+ * Mykonos API version: 1.5.2.3566
+ */
+
+/**
+* \page Disclaimer Legal Disclaimer
+* Copyright 2015-2017 Analog Devices Inc.
+* Released under the AD9371 API license, for more information see the "LICENSE.txt" file in * this zip file.
+*
+*/
+
+#ifndef MYKONOS_VERSION_H_
+#define MYKONOS_VERSION_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define MYKONOS_CURRENT_SI_VERSION 1    		/*!< Mykonos current silicon version */
+#define MYKONOS_CURRENT_MAJOR_VERSION 5			/*!< Mykonos current ARM major version */
+#define MYKONOS_CURRENT_MINOR_VERSION 2			/*!< Mykonos current ARM minor version */
+#define MYKONOS_CURRENT_BUILD_VERSION 3566		/*!< Mykonos current API build version */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* MYKONOS_VERSION_H_ */

dj_f1_ad9371/vitis_classic_autobuild/source/tp_hardware/mykonos/t_ad9528.h

@@ -0,0 +1,200 @@
+/**
+ * \file t_ad9528.h
+ * \brief Contains enum and structure data types for all AD9528 function calls
+ */
+
+/**
+* \page Disclaimer Legal Disclaimer
+* Copyright 2015-2017 Analog Devices Inc.
+* Released under the AD9371 API license, for more information see the "LICENSE.txt" file in this zip file.
+*
+*/
+
+#ifndef _AD9528_TYPES_H_
+#define _AD9528_TYPES_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "tp_hardware/hw_common.h"
+
+/* AD9528 SPI Address defines */
+#define AD9528_ADDR_ADI_SPI_CONFIG_A  0x000
+#define AD9528_ADDR_ADI_SPI_CONFIG_B  0x001
+
+#define AD9528_ADDR_ADI_CHIP_TYPE  0x003
+#define AD9528_ADDR_ADI_SPI_VERSION 0x00B
+#define AD9528_ADDR_ADI_VENDOR_ID_L 0x00C
+#define AD9528_ADDR_ADI_VENDOR_ID_H 0x00D
+
+#define AD9528_ADDR_IO_UPDATE         0x00F
+
+#define AD9528_ADDR_REF_A_DIVIDER_LSB 0x100
+#define AD9528_ADDR_REF_A_DIVIDER_MSB 0x101
+#define AD9528_ADDR_REF_B_DIVIDER_LSB 0x102
+#define AD9528_ADDR_REF_B_DIVIDER_MSB 0x103
+#define AD9528_ADDR_PLL1_N_DIV_LSB    0x104
+#define AD9528_ADDR_PLL1_N_DIV_MSB    0x105
+#define AD9528_ADDR_PLL1_CHARGEPUMP   0x106
+#define AD9528_ADDR_PLL1_CP_CTRL2     0x107
+#define AD9528_ADDR_INPUT_RECEIVERS1  0x108
+#define AD9528_ADDR_INPUT_RECEIVERS2  0x109
+#define AD9528_ADDR_INPUT_RECEIVERS3  0x10A
+#define AD9528_ADDR_PLL1_FASTLOCK     0x10B
+
+#define AD9528_ADDR_PLL2_CHARGEPUMP        0x200
+#define AD9528_ADDR_PLL2_N_DIV             0x201
+#define AD9528_ADDR_PLL2_CTRL              0x202
+#define AD9528_ADDR_PLL2_VCO_CTRL          0x203
+#define AD9528_ADDR_PLL2_VCO_DIV           0x204
+#define AD9528_ADDR_PLL2_LF_CTRL1          0x205
+#define AD9528_ADDR_PLL2_LF_CTRL2          0x206
+#define AD9528_ADDR_PLL2_RDIV              0x207
+#define AD9528_ADDR_PLL2_REPLICA_CHDIV     0x208
+#define AD9528_ADDR_PLL2_REPLICA_DIV_PHASE 0x209
+
+#define AD9528_ADDR_CH_OUT0_CTRL1       0x300
+#define AD9528_ADDR_CH_OUT0_CTRL2       0x301
+#define AD9528_ADDR_CH_OUT0_CHDIV       0x302
+#define AD9528_ADDR_OUTPUT_SYNC         0x32A
+#define AD9528_ADDR_MASK_SYNC1          0x32B
+#define AD9528_ADDR_MASK_SYNC2          0x32C
+#define AD9528_ADDR_EN_OUTPUT_PATH_SEL1 0x32D
+#define AD9528_ADDR_EN_OUTPUT_PATH_SEL2 0x32E
+
+#define AD9528_ADDR_SYSERF_DIV_LSB      0x400
+#define AD9528_ADDR_SYSERF_DIV_MSB      0x401
+#define AD9528_ADDR_SYSREF_CTRL3        0x402
+#define AD9528_ADDR_SYSREF_CTRL4        0x403
+#define AD9528_ADDR_SYSREF_CTRL5        0x404
+
+#define AD9528_ADDR_POWERDOWN_CTRL      0x500
+#define AD9528_ADDR_CH_POWERDOWN1       0x501
+#define AD9528_ADDR_CH_POWERDOWN2       0x502
+#define AD9528_ADDR_LDO_ENABLES1        0x503
+#define AD9528_ADDR_LDO_ENABLES2        0x504
+#define AD9528_ADDR_STATUS0_CTRL        0x505
+#define AD9528_ADDR_STATUS1_CTRL        0x506
+#define AD9528_ADDR_STATUS_OE           0x507
+#define AD9528_ADDR_STATUS_READBACK0    0x508
+#define AD9528_ADDR_STATUS_READBACK1    0x509
+
+
+
+///Enum to select what source outputs from each AD9528 output channel
+typedef enum
+{
+    CHANNEL_DIV = 0, PLL1_OUTPUT = 1, //VCXO frequency
+    SYSREF = 2,
+    INV_PLL1_OUTPUT = 5 //VCXO inverted
+} ad9528outSourceSel_t;
+
+///Enum to select what output buffer standard is used for the clock outputs
+typedef enum
+{
+    LVDS = 0, LVDS_BOOST = 1, HSTL = 2
+} ad9528outBufferControl_t;
+
+///Enum to select the clock input buffer mode.
+typedef enum
+{
+    DISABLED = 0, SINGLE_ENDED, NEG_SINGLE_ENDED, DIFFERENTIAL
+} ad9528RefBuffer_t;
+
+/// Structure to hold AD9528 PLL1 settings
+typedef struct
+{
+    uint32_t refA_Frequency_Hz;
+    uint16_t refA_Divider;
+    ad9528RefBuffer_t refA_bufferCtrl;
+
+    uint32_t refB_Frequency_Hz;
+    uint16_t refB_Divider;
+    ad9528RefBuffer_t refB_bufferCtrl;
+
+    uint32_t vcxo_Frequency_Hz;
+    ad9528RefBuffer_t vcxoBufferCtrl;
+
+    uint16_t nDivider;
+    uint8_t bypassPll1;
+} ad9528pll1Settings_t;
+
+/// Structure to hold AD9528 PLL2 settings
+typedef struct
+{
+    uint8_t rfDivider; //VCO divider: Valid range (3,4,5)
+    uint8_t n2Divider; //PLL2 N2 Divider
+    uint8_t totalNdiv; //NDiv = 4*Bdiv + Adiv //Bdiv valid range (3 to 63), Adiv valid range (0-3)
+} ad9528pll2Settings_t;
+
+/// Structure to hold AD9528 Output Clock settings
+typedef struct
+{
+    uint16_t outPowerDown; //bit per output, if 1 power down that output.
+    ad9528outSourceSel_t outSource[14]; //CHANNEL_DIV, PLL1_OUTPUT, SYSREF, INV_PLL1_OUTPUT
+    ad9528outBufferControl_t outBufferCtrl[14]; //LVDS, LVDS_BOOST, HSTL
+    uint8_t outAnalogDelay[14]; //5 bits
+    uint8_t outDigitalDelay[14]; //6 bits, 1/2 clock resolution @ channel div input frequency
+    uint8_t outChannelDiv[14]; //8 bit channel divider
+    uint32_t outFrequency_Hz[14]; //output clock frequency per clock output
+} ad9528outputSettings_t;
+
+///Enum to select the SYSREF output source
+typedef enum
+{
+    EXTERNAL = 0, EXT_RESAMPLED = 1, INTERNAL = 2
+} sysrefSourceSelection_t;
+
+///Enum to choose the SYSREF pattern mode.
+typedef enum
+{
+    NSHOT = 0, CONTINUOUS = 1, PRBS = 2, STOP = 3
+} sysrefPatternMode_t;
+
+///Enum to select the SYSREF input pin mode.
+typedef enum
+{
+    LEVEL_ACTIVE_HIGH = 0, LEVEL_ACTIVE_LOW = 1, RISING_EDGE = 2, FALLING_EDGE = 3
+} sysrefPinEdgeMode_t;
+
+///Enum to select the SYSREF output # of pulses for NSHOT mode.
+typedef enum
+{
+    ONE_PULSE = 0, TWO_PULSES = 2, FOUR_PULSES = 3, SIX_PULSES = 4, EIGHT_PULSES = 5
+} sysrefNshotMode_t;
+
+//Enum to select how a SYSREF is requested.
+typedef enum
+{
+    SPI = 0, PIN = 1
+} sysrefRequestMethod_t;
+
+/// Structure to hold AD9528 SYSREF output settings
+typedef struct
+{
+    sysrefRequestMethod_t sysrefRequestMethod;
+    sysrefSourceSelection_t sysrefSource;
+    sysrefPinEdgeMode_t sysrefPinEdgeMode;
+    ad9528RefBuffer_t sysrefPinBufferMode;
+    sysrefPatternMode_t sysrefPatternMode;
+    sysrefNshotMode_t sysrefNshotMode;
+    uint16_t sysrefDivide;
+
+} ad9528sysrefSettings_t;
+
+/// Structure to hold AD9528 settings
+typedef struct
+{
+    const spiSettings_t *spiSettings;
+    ad9528pll1Settings_t *pll1Settings;
+    ad9528pll2Settings_t *pll2Settings;
+    ad9528outputSettings_t *outputSettings;
+    ad9528sysrefSettings_t *sysrefSettings;
+} ad9528Device_t;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif

dj_f1_ad9371/vitis_classic_autobuild/source/tp_hardware/mykonos/t_mykonos_gpio.h

@@ -0,0 +1,375 @@
+/*!
+ * \file t_mykonos_gpio.h
+ * \brief Mykonos GPIO error handling and type defines
+ *
+ * Mykonos API version: 1.5.2.3566
+ */
+
+/**
+* \page Disclaimer Legal Disclaimer
+* Copyright 2015-2017 Analog Devices Inc.
+* Released under the AD9371 API license, for more information see the "LICENSE.txt" file in this zip file.
+*
+*/
+
+#ifndef T_MYKONOSGPIO_H_
+#define T_MYKONOSGPIO_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+#include "tp_hardware/hw_common.h"
+
+/**
+ *  \brief Enum of unique error codes from the Mykonos GPIO API functions.
+ * Each error condition in the library should get its own enum value to allow
+ * easy debug of errors.
+ */
+typedef enum
+{
+	MYKONOS_ERR_GPIO_OK = 0,
+	MYKONOS_ERR_EN_MONITOR_OUT_NOT_ENABLED,
+    MYKONOS_ERR_EN_MONITOR_OUT_SRC_CTRL,
+    MYKONOS_ERR_MONITOR_OUT_INDEX_RANGE,
+    MYKONOS_ERR_GETGPIOMON_INDEX_NULL_PARM,
+    MYKONOS_ERR_GETGPIOMON_MONITORMASK_NULL_PARM,
+
+    MYKONOS_ERR_MGCRX2_GPIO_DECPIN_INV_PARAM,
+    MYKONOS_ERR_MGCRX2_GPIO_INCPIN_INV_PARAM,
+    MYKONOS_ERR_MGCRX2_SOURCE_CONFIG,
+    MYKONOS_ERR_MGCRX2_STEP_INV_PARAM,
+    MYKONOS_ERR_MGCRX1_GPIO_DECPIN_INV_PARAM,
+    MYKONOS_ERR_MGCRX1_GPIO_INCPIN_INV_PARAM,
+    MYKONOS_ERR_MGCRX1_STEP_INV_PARAM,
+    MYKONOS_ERR_GETRX2PIN_INCSTEP_NULL_PARM,
+    MYKONOS_ERR_GETRX2PIN_DECSTEP_NULL_PARM,
+    MYKONOS_ERR_GETRX2PIN_INCPIN_NULL_PARM,
+    MYKONOS_ERR_GETRX2PIN_DECPIN_NULL_PARM,
+    MYKONOS_ERR_GETRX2PIN_EN_NULL_PARM,
+    MYKONOS_ERR_GETRX1PIN_INCSTEP_NULL_PARM,
+    MYKONOS_ERR_GETRX1PIN_DECSTEP_NULL_PARM,
+    MYKONOS_ERR_GETRX1PIN_INCPIN_NULL_PARM,
+    MYKONOS_ERR_GETRX1PIN_DECPIN_NULL_PARM,
+    MYKONOS_ERR_GETRX1PIN_EN_NULL_PARM,
+
+    MYKONOS_ERR_TPCTX2_GPIO_DECPIN_INV_PARAM,
+    MYKONOS_ERR_TPCTX2_GPIO_INCPIN_INV_PARAM,
+    MYKONOS_ERR_TPCTX2_GPIO_STEP_INV_PARAM,
+    MYKONOS_ERR_TPCTX1_GPIO_DECPIN_INV_PARAM,
+    MYKONOS_ERR_TPCTX1_GPIO_INCPIN_INV_PARAM,
+    MYKONOS_ERR_TPCTX1_GPIO_STEP_INV_PARAM,
+    MYKONOS_ERR_GETTX2PIN_STEP_NULL_PARM,
+    MYKONOS_ERR_GETTX2PIN_INC_NULL_PARM,
+    MYKONOS_ERR_GETTX2PIN_DEC_NULL_PARM,
+    MYKONOS_ERR_GETTX2PIN_EN_NULL_PARM,
+    MYKONOS_ERR_GETTX2PIN_TX1TX2_NULL_PARM,
+    MYKONOS_ERR_GETTX1PIN_STEP_NULL_PARM,
+    MYKONOS_ERR_GETTX1PIN_INC_NULL_PARM,
+    MYKONOS_ERR_GETTX1PIN_DEC_NULL_PARM,
+    MYKONOS_ERR_GETTX1PIN_EN_NULL_PARM,
+    MYKONOS_ERR_GETTX1PIN_TX1TX2_NULL_PARM,
+
+	MYKONOS_ERR_SPI2_INV_GPIO,
+	MYKONOS_ERR_SPI2_INV_SETUP,
+
+	MYKONOS_ERR_SET_GPIO_1V8_INV_POINTER,
+
+	MYKONOS_ERR_GETGPIOSETLEVEL_NULL_PARM,
+	MYKONOS_ERR_READGPIOSPI_NULL_PARM,
+    MYKONOS_ERR_SET_GPIO_1V8_INV_MODE,
+    MYKONOS_ERR_GETGPIO_OE_NULL_PARM,
+    MYKONOS_ERR_GPIO_OE_INV_PARAM,
+    MYKONOS_ERR_GPIO_SRC_PARAM_INV,
+    MYKONOS_ERR_GET_GPIO_SOURCE_CONTROL_NULL_PARM,
+
+    MYKONOS_ERR_INV_GP_INT_MASK_PARM,
+    MYKONOS_ERR_GP_INT_STATUS_NULL_PARAM,
+
+    MYKONOS_ERR_GETGPIO3V3OUT_NULL_PARM,
+    MYKONOS_ERR_SET_GPIO_3V3_INV_POINTER,
+    MYKONOS_ERR_GETGPIO3V3SPI_NULL_PARM,
+    MYKONOS_ERR_GPIO3V3OUTEN_NULL_PARM,
+    MYKONOS_ERR_SET_GPIO_3V3_INV_MODE,
+    MYKONOS_ERR_SET_GPIO_3V3_INV_SRC_CTRL,
+
+    MYKONOS_ERR_SET_ARMGPIO_INV_POINTER,
+    MYKONOS_ERR_SET_ARMGPIO_PINS_ARMERROR,
+    MYKONOS_ERR_SET_ARMGPIO_PINS_INV_SIGNALID,
+    MYKONOS_ERR_SET_ARMGPIO_PINS_INV_GPIOPIN,
+
+    MYKONOS_ERR_SETUPAUXDAC_NULL_PARAM,
+    MYKONOS_ERR_WRITEAUXDAC_NULL_AUXIO,
+    MYKONOS_ERR_READAUXADC_NULL_PARAM,
+    MYKONOS_ERR_SETUPAUXDAC_INV_AUXDACCODE,
+    MYKONOS_ERR_WRITEAUXDAC_INV_AUXDACCODE,
+    MYKONOS_ERR_WRITEAUXDAC_INV_AUXDACINDEX,
+    MYKONOS_ERR_INV_AUX_ADC_CHAN_PARM,
+    MYKONOS_ERR_SETUPAUXADC_INV_VCODIV,
+    MYKONOS_ERR_INV_AUX_ADC_DEC_PARM,
+
+    MYKONOS_ERR_GAINCOMP_NULL_STRUCT,
+    MYKONOS_ERR_GAINCOMP_EN_NULL_PARM,
+    MYKONOS_ERR_GAINCOMP_SET_NULL_STRUCT,
+    MYKONOS_ERR_GAINCOMP_INV_RX1_OFFSET,
+    MYKONOS_ERR_GAINCOMP_INV_RX2_OFFSET,
+    MYKONOS_ERR_GAINCOMP_INV_STEP,
+    MYKONOS_ERR_GAINCOMP_INV_EN,
+
+    MYKONOS_ERR_OBS_RX_GAINCOMP_SET_NULL_STRUCT,
+    MYKONOS_ERR_OBS_RX_GAINCOMP_EN_NULL_PARAM,
+    MYKONOS_ERR_OBS_RX_GAINCOMP_INV_EN,
+    MYKONOS_ERR_OBS_RX_GAINCOMP_INV_OFFSET,
+    MYKONOS_ERR_OBS_RX_GAINCOMP_INV_STEP,
+    MYKONOS_ERR_OBS_RX_GAINCOMP_NULL_STRUCT,
+
+    MYKONOS_ERR_SLICER_STEP_OUT_OF_RANGE,
+    MYKONOS_ERR_SLICER_INV_RX1_SEL,
+    MYKONOS_ERR_SLICER_INV_RX2_SEL,
+    MYKONOS_ERR_SLICER_EN_INV,
+
+    MYKONOS_ERR_SLICER_RX1PIN_NULL_PARM,
+    MYKONOS_ERR_SLICER_RX2PIN_NULL_PARM,
+    MYKONOS_ERR_SLICER_STEP_NULL_PARM,
+    MYKONOS_ERR_SLICER_EN_NULL_PARM,
+
+    MYKONOS_ERR_SLICER_INV_OBS_RX_SEL,
+    MYKONOS_ERR_SLICER_OBS_RX_STEP_OUT_OF_RANGE,
+    MYKONOS_ERR_SLICER_OBS_RX_EN_INV,
+    MYKONOS_ERR_SLICER_OBS_RX_EN_NULL_PARM,
+    MYKONOS_ERR_SLICER_OBS_RX_STEP_NULL_PARM,
+    MYKONOS_ERR_SLICER_OBS_RXPIN_NULL_PARM,
+
+    MYKONOS_ERR_FLOATFRMT_NULL_STRUCT,
+    MYKONOS_ERR_FLOATFRMT_SET_NULL_STRUCT,
+    MYKONOS_ERR_FLOATFRMT_INV_ROUND_MODE,
+    MYKONOS_ERR_FLOATFRMT_INV_DATA_FORMAT,
+    MYKONOS_ERR_FLOATFRMT_INV_ENC_NAN,
+    MYKONOS_ERR_FLOATFRMT_INV_EXP_BITS,
+    MYKONOS_ERR_FLOATFRMT_INV_LEADING,
+    MYKONOS_ERR_FLOATFRMT_INV_RX1ATT,
+    MYKONOS_ERR_FLOATFRMT_INV_RX2ATT,
+    MYKONOS_ERR_FLOATFRMT_INV_EN,
+    MYKONOS_ERR_FLOATFRMT_NULL_RX1ATT,
+    MYKONOS_ERR_FLOATFRMT_NULL_RX2ATT,
+    MYKONOS_ERR_FLOATFRMT_NULL_ENABLE,
+    MYKONOS_ERR_FLOATFRMT_SET_INV_EN,
+    MYKONOS_ERR_FLOATFRMT_SET_INV_RX1ATT,
+    MYKONOS_ERR_FLOATFRMT_SET_INV_RX2ATT,
+
+    MYKONOS_ERR_FLOATFRMT_INV_ORXATT,
+    MYKONOS_ERR_FLOATFRMT_INV_ORXEN,
+    MYKONOS_ERR_FLOATFRMT_NULL_ORXATT,
+    MYKONOS_ERR_FLOATFRMT_NULL_ORXENABLE,
+
+    MYKONOS_ERR_SETUPTEMPSENSOR_NULL_PARAM,
+    MYKONOS_ERR_SETUPTEMPSENSOR_INV_TEMPDECIMATION,
+    MYKONOS_ERR_SETUPTEMPSENSOR_INV_OFFSET,
+    MYKONOS_ERR_SETUPTEMPSENSOR_INV_TEMPWINDOW,
+    MYKONOS_ERR_GETTEMPSENSORCFG_NULL_PARAM,
+    MYKONOS_ERR_READTEMPSENSOR_NULL_PARAM,
+    MYKONOS_ERR_READTEMPSENSOR_NOT_LOCKED,
+
+    MYKONOS_ERR_GAIN_CONTROL_NOT_HYBRID,
+    MYKONOS_ERR_GPIO_HYBRID_RX1_PIN,
+    MYKONOS_ERR_GPIO_HYBRID_RX2_PIN,
+    MYKONOS_ERR_GPIO_HYBRID_RX1_PIN_NULL_PARM,
+    MYKONOS_ERR_GPIO_HYBRID_RX2_PIN_NULL_PARM,
+    MYKONOS_ERR_GPIO_HYBRID_RX1_PIN_READ,
+    MYKONOS_ERR_GPIO_HYBRID_RX2_PIN_READ,
+    MYKONOS_ERR_AGC_OBS_NOT_IN_HYBRID,
+    MYKONOS_ERR_GPIO_HYBRID_ORX_PIN,
+    MYKONOS_ERR_GPIO_HYBRID_ORX_PIN_NULL_PARM,
+
+    MYKONOS_ERR_GAIN_CONTROL_NOT_AGC,
+    MYKONOS_ERR_GPIO_AGC_SYNC_RX1_PIN,
+    MYKONOS_ERR_GPIO_AGC_SYNC_RX2_PIN,
+    MYKONOS_ERR_GPIO_AGC_SYNC_RX1_PIN_NULL_PARM,
+    MYKONOS_ERR_GPIO_AGC_SYNC_RX2_PIN_NULL_PARM,
+    MYKONOS_ERR_OBS_GAIN_CONTROL_NOT_AGC,
+    MYKONOS_ERR_GPIO_AGC_SYNC_ORX_PIN,
+    MYKONOS_ERR_GPIO_AGC_SYNC_ORX_PIN_NULL_PARM,
+
+    MYKONOS_ERR_GETGPIODRV_NULL_PARAM,
+    MYKONOS_ERR_GPIO_DRV_INV_PARAM,
+
+    MYKONOS_ERR_GPIO_SLEW_RATE_INV_PARAM,
+    MYKONOS_ERR_GPIO_GETSLEW_NULL_PARAM,
+
+    MYKONOS_ERR_CMOS_DRV_INV_PARAM,
+    MYKONOS_ERR_CMOS_DRV_NULL_PARAM
+} mykonosGpioErr_t;
+
+/**
+ *  \brief Enum of possible Rx Slicer pin combinations
+ */
+typedef enum
+{
+    GPIO_0_1_2      = 0,    /*!< GPIO combination for RX1        */
+    GPIO_5_6_7      = 1,    /*!< GPIO combination for RX1 or RX2 */
+    GPIO_8_9_10     = 2,    /*!< GPIO combination for RX1        */
+    GPIO_11_12_13   = 3     /*!< GPIO combination for RX2        */
+} mykonosRxSlicer_t;
+
+/**
+ *  \brief Enum of possible observation channel Slicer pin combinations
+ */
+typedef enum
+{
+    GPIO_18_17_16      = 0,    /*!< GPIO combination for observation channel */
+    GPIO_16_15_14      = 1     /*!< GPIO combination for observation channel */
+} mykonosObsRxSlicer_t;
+
+/**
+ *  \brief Enum of possible GPIO slew rate settings
+ */
+typedef enum
+{
+    MYK_SLEWRATE_NONE    = 0,    /*!< Lower slew rate for the GPIO  */
+    MYK_SLEWRATE_LOW     = 1,    /*!< Low slew rate for the GPIO    */
+    MYK_SLEWRATE_MEDIUM  = 2,    /*!< Medium slew rate for the GPIO */
+    MYK_SLEWRATE_HIGH    = 3     /*!< High slew rate for the GPIO   */
+} mykonosGpioSlewRate_t;
+
+/**
+ * \brief Enumerated list of CMOS pads drive strength options
+ */
+typedef enum
+{
+    MYK_CMOSPAD_DRV_1X  = 0x00,       /*!<  2.5pF  load @ 65MHz */
+    MYK_CMOSPAD_DRV_2X  = 0x01,       /*!<    5pF  load @ 65MHz */
+    MYK_CMOSPAD_DRV_3X  = 0x03,       /*!<  7.5pF  load @ 65MHz */
+    MYK_CMOSPAD_DRV_4X  = 0x07,       /*!<   10pF  load @ 65MHz */
+    MYK_CMOSPAD_DRV_5X  = 0x0F        /*!< 12.5pF  load @ 65MHz */
+} mykonosCmosPadDrvStr_t;
+
+
+/**
+ * \brief Enumerated list for Aux ADCs
+ */
+typedef enum
+{
+    MYK_AUXADC_0        = 0x00,       /*!< Aux ADC channel 0 */
+    MYK_AUXADC_1        = 0x01,       /*!< Aux ADC channel 1 */
+    MYK_AUXADC_2        = 0x02,       /*!< Aux ADC channel 2 */
+    MYK_AUXADC_3        = 0x03,       /*!< Aux ADC channel 3 */
+    MYK_AUXADC_0_DIV2   = 0x04,       /*!< Aux ADC channel 0 with the divider by 2 set */
+    MYK_TEMPSENSOR      = 0x10        /*!< Temperature sensor channel */
+} mykonosAuxAdcChannels_t;
+
+
+/**
+ *  \brief Data structure to hold Gain compensation settings for the main receive channels
+ **/
+typedef struct
+{
+    uint8_t rx1Offset;  /*!< These parameter contains the Rx1 offset word used for the gain compensation
+                        when the gain index is at its maximum setting.
+                         It has a range of 0 to 0x1F with a resolution is 0.5dB per LSB. */
+    uint8_t rx2Offset;  /*!< These parameter contains the Rx2 offset word used for the gain compensation
+                        when the gain index is at its maximum setting.
+                        It has a range of 0 to 0x1F with a resolution is 0.5dB per LSB. */
+    uint8_t compStep;   /*!< These bits contains the value in dB that the total Rx gain changes
+                         when there is an LSB change in the gain index according to the following settings:
+                         compStep |  dB ramp
+                         ---------|------------
+                            0     |   0.25dB
+                            1     |   0.5dB
+                            2     |   1.0dB
+                            3     |   2.0dB
+                            4     |   3.0dB
+                            5     |   4.0dB
+                            6     |   6.0dB
+                            7     |   Not valid defaulted to 0.25dB */
+} mykonosGainComp_t;
+
+/**
+ *  \brief Data structure to hold Gain compensation settings for the observation channel
+ **/
+typedef struct
+{
+    uint8_t obsRxOffset;    /*!< These parameter contains the Rx1 offset word used for the gain compensation
+                            when the gain index is at its maximum setting.
+                            It has a range of 0 to 0x1F with a resolution is 0.5dB per LSB. */
+    uint8_t compStep;       /*!< These bits contains the value in dB that the total Rx gain changes
+                            when there is an LSB change in the gain index according to the following settings:
+                            compStep |  dB ramp
+                            ---------|------------
+                               0     |   0.25dB
+                               1     |   0.5dB
+                               2     |   1.0dB
+                               3     |   2.0dB
+                               4     |   3.0dB
+                               5     |   4.0dB
+                               6     |   6.0dB
+                               7     |   Not valid defaulted to 0.25dB */
+} mykonosObsRxGainComp_t;
+
+/**
+ * \brief Data structure to hold floating point formatter settings for the floating point
+ *  number generation
+ **/
+typedef struct
+{
+   uint8_t roundMode;   /*!<These parameter set the round modes for the significand.
+                        The following settings are defined in the IEEE754 specification:
+                        roundMode |  Round type
+                        ----------|-----------------
+                             0    |  RoundTiesToEven
+                             1    |  RoundTowardsPositive
+                             2    |  RoundTowardsNegative
+                             3    |  RoundTowardsZero
+                             4    |  RoundTiesToAway*/
+   uint8_t dataFormat;  /*!< These parameter sets the format of the 16-bit output on the JESD interface:
+                        Setting this to 1 then the format is from MSB to LSB to {sign, significand, exponent}.
+                        Clearing this bit sets the format to {sign, exponent, significand}.*/
+   uint8_t encNan;      /*!< if this parameter is set to 1 then the floating point formatter reserves the highest value
+                        of exponent for NaN to be compatible to the IEEE754 specification.
+                        Clearing this parameter increases the range of the exponent by one.*/
+   uint8_t expBits;     /*!<These parameter is used to indicate the number of exponent bits in the floating point number
+                        according to the following settings:
+                          expBits|  Round type
+                         --------|------------------------------------------------
+                            0    |  2 bit exponent, 13 bit significand, 1 bit sign
+                            1    |  3 bit exponent, 12 bit significand, 1 bit sign
+                            2    |  4 bit exponent, 11 bit significand, 1 bit sign
+                            3    |  5 bit exponent, 10 bit significand, 1 bit sign */
+   uint8_t leading;     /*!< Setting this parameter hides the leading one in the the significand to be compatible to the IEEE754 specification.
+                        Clearing this parameter causes the leading one to be at the MSB of the significand.*/
+}mykonosFloatPntFrmt_t;
+
+/**
+ *  \brief Data structure used to configure the on-die Temperature Sensor
+ */
+typedef struct
+{
+    uint8_t tempDecimation;      /*!<3-bit value that controls the AuxADC decimation factor when used for temp sensor calculations;
+                                 AuxADC_decimation = 256 * 2^tempDecimation */
+    uint8_t offset;              /*!< 8-bit offset that gets added to temp sensor code internally */
+    uint8_t overrideFusedOffset; /*!< This bit overrides the factory-calibrated fuse offset
+                                 and uses the value stored in the offset member */
+    uint8_t tempWindow;          /*!<  4-bit code with a resolution of 1?C/LSB, each time a temperature measurement is performed,
+                                 the device compares the current temperature against the previous value.*/
+}mykonosTempSensorConfig_t;
+
+
+/**
+ *  \brief Data structure used to store Temperature Sensor related values
+ */
+typedef struct
+{
+    int16_t tempCode;       /*!< 16-bit signed temperature value (in deg C) that is read back */
+    uint8_t windowExceeded; /*!< If the absolute value of the difference is greater than the value in temperature configuration
+                            tempWindow, the windowExceeded flag is set.*/
+    uint8_t windowHiLo;     /*!<when windowExceeded member gets set,
+                            this bit is set to 1 if current value is greater than previous value, else reset */
+    uint8_t tempValid;      /*!< When the reading is complete and a valid temperature value stored in tempCode*/
+}mykonosTempSensorStatus_t;
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* T_MYKONOSGPIO_H_ */

dj_f1_ad9371/vitis_classic_autobuild/source/tp_hardware/parameters.h

@@ -0,0 +1,63 @@
+/***************************************************************************//**
+ *   @file   ad9371/src/devices/adi_hal/parameters.h
+ *   @brief  Platform dependent parameters.
+ *   @author DBogdan (dragos.bogdan@analog.com)
+********************************************************************************
+ * Copyright 2019(c) Analog Devices, Inc.
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *  - Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *  - Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *  - Neither the name of Analog Devices, Inc. nor the names of its
+ *    contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *  - The use of this software may or may not infringe the patent rights
+ *    of one or more patent holders.  This license does not release you
+ *    from the requirement that you obtain separate licenses from these
+ *    patent holders to use this software.
+ *  - Use of the software either in source or binary form, must be run
+ *    on or directly connected to an Analog Devices Inc. component.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT,
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, INTELLECTUAL PROPERTY RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*******************************************************************************/
+#ifndef _PARAMETERS_H_
+#define _PARAMETERS_H_
+
+/******************************************************************************/
+/***************************** Include Files **********************************/
+/******************************************************************************/
+#include "xparameters.h"
+
+/******************************************************************************/
+/********************** Macros and Constants Definitions **********************/
+/******************************************************************************/
+#define DDR_MEM_BASEADDR		XPAR_DDR_MEM_BASEADDR
+#define GPIO_0_DEVICE_ID		XPAR_PS7_GPIO_0_DEVICE_ID
+
+#define HWSPI_EIGINE_BASEADDR	XPAR_AXI_SPI_ENGINE_AXI_SPI_ENGINE_BASEADDR
+#define GPIO_OFFSET				54
+#define AD9528_CS				0x00
+#define AD9371_CS				0x01
+
+//#define DAC_GPIO_PLDDR_BYPASS	GPIO_OFFSET + 60
+#define AD9528_RESET_B			GPIO_OFFSET + 4
+#define AD9528_SYSREF_REQ		GPIO_OFFSET + 3
+#define AD9371_RESET_B			GPIO_OFFSET + 1
+
+#endif

dj_f1_ad9371/vitis_classic_autobuild/source/util/circ_queue.c

@@ -0,0 +1,96 @@
+#include "circ_queue.h"
+#include "common.h"
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+
+inline bool isCircQueueFull(CIRC_QUEUE *queue)
+{
+	ASSERT(queue != NULL);
+	return ((queue)->nelts == (queue)->bounds);
+}
+
+inline bool isCircQueueEmpty(CIRC_QUEUE *queue)
+{
+	ASSERT(queue != NULL);
+	return ((queue)->nelts == 0);
+}
+
+void CircQueueFree(CIRC_QUEUE *queue)
+{
+	ASSERT(queue != NULL);
+	if (queue->data)
+		free(queue->data);
+	free(queue);
+}
+
+bool CircQueueCreate(CIRC_QUEUE **q, uint32_t queueCapacity)
+{
+	ASSERT(q != NULL);
+	CIRC_QUEUE *queue;
+	queue = malloc(sizeof(CIRC_QUEUE));
+	if (queue == NULL)
+	{
+		return false;
+	}
+	*q = queue;
+	memset(queue, 0, sizeof(CIRC_QUEUE));
+
+	/* Set all the data in the queue to NULL */
+	queue->data = malloc(queueCapacity * sizeof(void *));
+	if (queue->data == NULL)
+	{
+		free(queue);
+		return false;
+	}
+	queue->bounds = queueCapacity;
+	queue->nelts = 0;
+	queue->in = 0;
+	queue->out = 0;
+	return true;
+}
+
+bool CircQueuePush(CIRC_QUEUE *queue, void *data)
+{
+	ASSERT(queue != NULL);
+
+	if (isCircQueueFull(queue))
+	{
+		return false;
+	}
+
+	queue->data[queue->in] = data;
+	queue->in++;
+	if (queue->in >= queue->bounds)
+	{
+		queue->in -= queue->bounds;
+	}
+	queue->nelts++;
+
+	return true;
+}
+
+inline uint32_t CircQueueSize(CIRC_QUEUE *queue)
+{
+	return queue->nelts;
+}
+
+bool CircQueuePop(CIRC_QUEUE *queue, void **data)
+{
+	ASSERT(queue != NULL);
+
+	if (isCircQueueEmpty(queue))
+	{
+		return false;
+	}
+
+	*data = queue->data[queue->out];
+	queue->nelts--;
+
+	queue->out++;
+	if (queue->out >= queue->bounds)
+	{
+		queue->out -= queue->bounds;
+	}
+	return true;
+}

dj_f1_ad9371/vitis_classic_autobuild/source/util/clist.c

@@ -0,0 +1,257 @@
+#ifndef LIST_MALLOC
+#define LIST_MALLOC malloc
+#endif
+
+#ifndef LIST_FREE
+#define LIST_FREE free
+#endif
+
+#include <stdint.h>
+#include "clist.h"
+
+clist_node_t *
+clist_node_new(void *val)
+{
+	clist_node_t *self;
+	if (!(self = LIST_MALLOC(sizeof(clist_node_t))))
+		return NULL;
+	self->prev = NULL;
+	self->next = NULL;
+	self->val = val;
+	return self;
+}
+
+clist_t *
+clist_new(void)
+{
+	clist_t *self;
+	if (!(self = LIST_MALLOC(sizeof(clist_t))))
+		return NULL;
+	self->head = NULL;
+	self->tail = NULL;
+	self->free = NULL;
+	self->compare = NULL;
+	self->len = 0;
+	return self;
+}
+
+void clist_clear(clist_t *self)
+{
+	clist_node_t *next;
+	clist_node_t *curr = self->head;
+
+	while (curr != NULL)
+	{
+		next = curr->next;
+		if (self->free)
+			self->free(curr->val);
+		LIST_FREE(curr);
+		curr = next;
+	}
+	self->len = 0;
+	self->head = NULL;
+}
+
+void clist_destroy(clist_t *self)
+{
+	clist_clear(self);
+	LIST_FREE(self);
+}
+
+clist_node_t *
+clist_rpush(clist_t *self, clist_node_t *node)
+{
+	if (!node)
+		return NULL;
+
+	if (self->len)
+	{
+		node->prev = self->tail;
+		node->next = NULL;
+		self->tail->next = node;
+		self->tail = node;
+	}
+	else
+	{
+		self->head = self->tail = node;
+		node->prev = node->next = NULL;
+	}
+
+	++self->len;
+	return node;
+}
+
+clist_node_t *
+clist_rpop(clist_t *self)
+{
+	if (!self->len)
+		return NULL;
+
+	clist_node_t *node = self->tail;
+
+	if (--self->len)
+	{
+		(self->tail = node->prev)->next = NULL;
+	}
+	else
+	{
+		self->tail = self->head = NULL;
+	}
+
+	node->next = node->prev = NULL;
+	return node;
+}
+
+clist_node_t *
+clist_lpop(clist_t *self)
+{
+	if (!self->len)
+		return NULL;
+
+	clist_node_t *node = self->head;
+
+	if (--self->len)
+	{
+		(self->head = node->next)->prev = NULL;
+	}
+	else
+	{
+		self->head = self->tail = NULL;
+	}
+
+	node->next = node->prev = NULL;
+	return node;
+}
+
+clist_node_t *
+clist_lpush(clist_t *self, clist_node_t *node)
+{
+	if (!node)
+		return NULL;
+
+	if (self->len)
+	{
+		node->next = self->head;
+		node->prev = NULL;
+		self->head->prev = node;
+		self->head = node;
+	}
+	else
+	{
+		self->head = self->tail = node;
+		node->prev = node->next = NULL;
+	}
+
+	++self->len;
+	return node;
+}
+
+clist_node_t *
+clist_find(clist_t *self, void *val)
+{
+	clist_iterator_t *it = clist_iterator_new(self, LIST_HEAD);
+	clist_node_t *node;
+
+	while ((node = clist_iterator_next(it)))
+	{
+		if (self->compare)
+		{
+			if (self->compare(val, node->val) == 0)
+			{
+				clist_iterator_destroy(it);
+				return node;
+			}
+		}
+		else
+		{
+			if (val == node->val)
+			{
+				clist_iterator_destroy(it);
+				return node;
+			}
+		}
+	}
+
+	clist_iterator_destroy(it);
+	return NULL;
+}
+
+clist_node_t *
+clist_at(clist_t *self, int index)
+{
+	clist_direction_t direction = LIST_HEAD;
+
+	if (index < 0)
+	{
+		direction = LIST_TAIL;
+		index = ~index;
+	}
+
+	if ((unsigned)index < self->len)
+	{
+		clist_iterator_t *it = clist_iterator_new(self, direction);
+		clist_node_t *node = clist_iterator_next(it);
+		while (index--)
+			node = clist_iterator_next(it);
+		clist_iterator_destroy(it);
+		return node;
+	}
+
+	return NULL;
+}
+
+void clist_remove(clist_t *self, clist_node_t *node)
+{
+	node->prev
+		? (node->prev->next = node->next)
+		: (self->head = node->next);
+
+	node->next
+		? (node->next->prev = node->prev)
+		: (self->tail = node->prev);
+
+	if (self->free)
+		self->free(node->val);
+
+	LIST_FREE(node);
+	--self->len;
+}
+
+clist_iterator_t *
+clist_iterator_new(clist_t *list, clist_direction_t direction)
+{
+	clist_node_t *node = direction == LIST_HEAD
+							 ? list->head
+							 : list->tail;
+	return clist_iterator_new_from_node(node, direction);
+}
+
+clist_iterator_t *
+clist_iterator_new_from_node(clist_node_t *node, clist_direction_t direction)
+{
+	clist_iterator_t *self;
+	if (!(self = LIST_MALLOC(sizeof(clist_iterator_t))))
+		return NULL;
+	self->next = node;
+	self->direction = direction;
+	return self;
+}
+
+clist_node_t *
+clist_iterator_next(clist_iterator_t *self)
+{
+	clist_node_t *curr = self->next;
+	if (curr)
+	{
+		self->next = self->direction == LIST_HEAD
+						 ? curr->next
+						 : curr->prev;
+	}
+	return curr;
+}
+
+void clist_iterator_destroy(clist_iterator_t *self)
+{
+	LIST_FREE(self);
+	self = NULL;
+}

dj_f1_ad9371/vitis_classic_autobuild/source/util/common.c

@@ -0,0 +1,51 @@
+/*****************************************************************************/
+/**
+ * Description: Common functions
+ *
+ * Date: 2021-11-16 00:08
+ * LastEditors: Fan Hao
+ * LastEditTime: 2022-07-16 17:13
+ * Revisions: Rev 0.1
+ * History:
+ * [2022-07-16]: New branch for Dijian.
+ * [2021-11-16]: Initial version.
+ *
+ * Copyright(c) 2024 Beijing Institute of Technology.
+ * Lab of Communication and Networking
+ *
+ ******************************************************************************/
+/**
+ * @addtogroup COMMON_MACRO
+ * @{
+ */
+/***************************** Include Files *********************************/
+#include "common.h"
+#include "error.h"
+#include "util.h"
+
+/************************** Constant Definitions *****************************/
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/**************************** Type Definitions *******************************/
+
+/************************** Variable Definitions *****************************/
+
+/*****************************************************************************/
+/**
+ * @brief	Throw an assert.
+ *
+ * @param	file indicate the filename of the assertion
+ * @param	line indicate which line the assertion occurs
+ *
+ * @return	NONE.
+ *
+ ******************************************************************************/
+void AppAssert(const char *file, int line)
+{
+	DBG_PRINT("in %s:%d [assert] .\n", file, line);
+	while (1)
+		;
+}
+
+/** @} */

dj_f1_ad9371/vitis_classic_autobuild/source/util/crc.c

@@ -0,0 +1,444 @@
+/*****************************************************************************/
+/**
+ * Description: CRC implementation file
+ *
+ * Author: Hao Fan
+ * Date: 2021-11-16 00:50
+ * LastEditors: Hao Fan
+ * LastEditTime: 2022-07-17 20:53
+ * Revisions: Rev 0.0
+ * History:
+ * [2022-07-17]: Add CRC16_0x8005 CRC8_0x31.
+ * [2022-01-06]: Initial verion (Basic CRC-16).
+ *
+ * Copyright(c) 2024 Beijing Institute of Technology.
+ * Lab of Communication and Networking
+ *
+ ******************************************************************************/
+/**
+ * @addtogroup Utility
+ * @{
+ */
+#include "util.h"
+#include "error.h"
+
+#ifdef __CRC_LSB
+// CRC-16-CCITT   G(X)=X16+X12+X5+1
+// Reversed
+static const uint16_t crc16_1021_lsb_lut[256] =
+{
+	0x0000, 0x1189, 0x2312, 0x329B, 0x4624, 0x57AD, 0x6536, 0x74BF,
+	0x8C48, 0x9DC1, 0xAF5A, 0xBED3, 0xCA6C, 0xDBE5, 0xE97E, 0xF8F7,
+	0x1081, 0x0108, 0x3393, 0x221A, 0x56A5, 0x472C, 0x75B7, 0x643E,
+	0x9CC9, 0x8D40, 0xBFDB, 0xAE52, 0xDAED, 0xCB64, 0xF9FF, 0xE876,
+	0x2102, 0x308B, 0x0210, 0x1399, 0x6726, 0x76AF, 0x4434, 0x55BD,
+	0xAD4A, 0xBCC3, 0x8E58, 0x9FD1, 0xEB6E, 0xFAE7, 0xC87C, 0xD9F5,
+	0x3183, 0x200A, 0x1291, 0x0318, 0x77A7, 0x662E, 0x54B5, 0x453C,
+	0xBDCB, 0xAC42, 0x9ED9, 0x8F50, 0xFBEF, 0xEA66, 0xD8FD, 0xC974,
+	0x4204, 0x538D, 0x6116, 0x709F, 0x0420, 0x15A9, 0x2732, 0x36BB,
+	0xCE4C, 0xDFC5, 0xED5E, 0xFCD7, 0x8868, 0x99E1, 0xAB7A, 0xBAF3,
+	0x5285, 0x430C, 0x7197, 0x601E, 0x14A1, 0x0528, 0x37B3, 0x263A,
+	0xDECD, 0xCF44, 0xFDDF, 0xEC56, 0x98E9, 0x8960, 0xBBFB, 0xAA72,
+	0x6306, 0x728F, 0x4014, 0x519D, 0x2522, 0x34AB, 0x0630, 0x17B9,
+	0xEF4E, 0xFEC7, 0xCC5C, 0xDDD5, 0xA96A, 0xB8E3, 0x8A78, 0x9BF1,
+	0x7387, 0x620E, 0x5095, 0x411C, 0x35A3, 0x242A, 0x16B1, 0x0738,
+	0xFFCF, 0xEE46, 0xDCDD, 0xCD54, 0xB9EB, 0xA862, 0x9AF9, 0x8B70,
+	0x8408, 0x9581, 0xA71A, 0xB693, 0xC22C, 0xD3A5, 0xE13E, 0xF0B7,
+	0x0840, 0x19C9, 0x2B52, 0x3ADB, 0x4E64, 0x5FED, 0x6D76, 0x7CFF,
+	0x9489, 0x8500, 0xB79B, 0xA612, 0xD2AD, 0xC324, 0xF1BF, 0xE036,
+	0x18C1, 0x0948, 0x3BD3, 0x2A5A, 0x5EE5, 0x4F6C, 0x7DF7, 0x6C7E,
+	0xA50A, 0xB483, 0x8618, 0x9791, 0xE32E, 0xF2A7, 0xC03C, 0xD1B5,
+	0x2942, 0x38CB, 0x0A50, 0x1BD9, 0x6F66, 0x7EEF, 0x4C74, 0x5DFD,
+	0xB58B, 0xA402, 0x9699, 0x8710, 0xF3AF, 0xE226, 0xD0BD, 0xC134,
+	0x39C3, 0x284A, 0x1AD1, 0x0B58, 0x7FE7, 0x6E6E, 0x5CF5, 0x4D7C,
+	0xC60C, 0xD785, 0xE51E, 0xF497, 0x8028, 0x91A1, 0xA33A, 0xB2B3,
+	0x4A44, 0x5BCD, 0x6956, 0x78DF, 0x0C60, 0x1DE9, 0x2F72, 0x3EFB,
+	0xD68D, 0xC704, 0xF59F, 0xE416, 0x90A9, 0x8120, 0xB3BB, 0xA232,
+	0x5AC5, 0x4B4C, 0x79D7, 0x685E, 0x1CE1, 0x0D68, 0x3FF3, 0x2E7A,
+	0xE70E, 0xF687, 0xC41C, 0xD595, 0xA12A, 0xB0A3, 0x8238, 0x93B1,
+	0x6B46, 0x7ACF, 0x4854, 0x59DD, 0x2D62, 0x3CEB, 0x0E70, 0x1FF9,
+	0xF78F, 0xE606, 0xD49D, 0xC514, 0xB1AB, 0xA022, 0x92B9, 0x8330,
+	0x7BC7, 0x6A4E, 0x58D5, 0x495C, 0x3DE3, 0x2C6A, 0x1EF1, 0x0F78
+};
+
+// CRC-16-MAXIM   G(X)=X16+X15+X2+1
+const uint16_t crc16_8005_lsb_lut[256] =
+{
+	0x0000, 0xC0C1, 0xC181, 0x0140, 0xC301, 0x03C0, 0x0280, 0xC241,
+	0xC601, 0x06C0, 0x0780, 0xC741, 0x0500, 0xC5C1, 0xC481, 0x0440,
+	0xCC01, 0x0CC0, 0x0D80, 0xCD41, 0x0F00, 0xCFC1, 0xCE81, 0x0E40,
+	0x0A00, 0xCAC1, 0xCB81, 0x0B40, 0xC901, 0x09C0, 0x0880, 0xC841,
+	0xD801, 0x18C0, 0x1980, 0xD941, 0x1B00, 0xDBC1, 0xDA81, 0x1A40,
+	0x1E00, 0xDEC1, 0xDF81, 0x1F40, 0xDD01, 0x1DC0, 0x1C80, 0xDC41,
+	0x1400, 0xD4C1, 0xD581, 0x1540, 0xD701, 0x17C0, 0x1680, 0xD641,
+	0xD201, 0x12C0, 0x1380, 0xD341, 0x1100, 0xD1C1, 0xD081, 0x1040,
+	0xF001, 0x30C0, 0x3180, 0xF141, 0x3300, 0xF3C1, 0xF281, 0x3240,
+	0x3600, 0xF6C1, 0xF781, 0x3740, 0xF501, 0x35C0, 0x3480, 0xF441,
+	0x3C00, 0xFCC1, 0xFD81, 0x3D40, 0xFF01, 0x3FC0, 0x3E80, 0xFE41,
+	0xFA01, 0x3AC0, 0x3B80, 0xFB41, 0x3900, 0xF9C1, 0xF881, 0x3840,
+	0x2800, 0xE8C1, 0xE981, 0x2940, 0xEB01, 0x2BC0, 0x2A80, 0xEA41,
+	0xEE01, 0x2EC0, 0x2F80, 0xEF41, 0x2D00, 0xEDC1, 0xEC81, 0x2C40,
+	0xE401, 0x24C0, 0x2580, 0xE541, 0x2700, 0xE7C1, 0xE681, 0x2640,
+	0x2200, 0xE2C1, 0xE381, 0x2340, 0xE101, 0x21C0, 0x2080, 0xE041,
+	0xA001, 0x60C0, 0x6180, 0xA141, 0x6300, 0xA3C1, 0xA281, 0x6240,
+	0x6600, 0xA6C1, 0xA781, 0x6740, 0xA501, 0x65C0, 0x6480, 0xA441,
+	0x6C00, 0xACC1, 0xAD81, 0x6D40, 0xAF01, 0x6FC0, 0x6E80, 0xAE41,
+	0xAA01, 0x6AC0, 0x6B80, 0xAB41, 0x6900, 0xA9C1, 0xA881, 0x6840,
+	0x7800, 0xB8C1, 0xB981, 0x7940, 0xBB01, 0x7BC0, 0x7A80, 0xBA41,
+	0xBE01, 0x7EC0, 0x7F80, 0xBF41, 0x7D00, 0xBDC1, 0xBC81, 0x7C40,
+	0xB401, 0x74C0, 0x7580, 0xB541, 0x7700, 0xB7C1, 0xB681, 0x7640,
+	0x7200, 0xB2C1, 0xB381, 0x7340, 0xB101, 0x71C0, 0x7080, 0xB041,
+	0x5000, 0x90C1, 0x9181, 0x5140, 0x9301, 0x53C0, 0x5280, 0x9241,
+	0x9601, 0x56C0, 0x5780, 0x9741, 0x5500, 0x95C1, 0x9481, 0x5440,
+	0x9C01, 0x5CC0, 0x5D80, 0x9D41, 0x5F00, 0x9FC1, 0x9E81, 0x5E40,
+	0x5A00, 0x9AC1, 0x9B81, 0x5B40, 0x9901, 0x59C0, 0x5880, 0x9841,
+	0x8801, 0x48C0, 0x4980, 0x8941, 0x4B00, 0x8BC1, 0x8A81, 0x4A40,
+	0x4E00, 0x8EC1, 0x8F81, 0x4F40, 0x8D01, 0x4DC0, 0x4C80, 0x8C41,
+	0x4400, 0x84C1, 0x8581, 0x4540, 0x8701, 0x47C0, 0x4680, 0x8641,
+	0x8201, 0x42C0, 0x4380, 0x8341, 0x4100, 0x81C1, 0x8081, 0x4040
+};
+
+// CRC-8-MAXIM   G(X)=X8+X5+X4+1
+const uint8_t crc8_31_lsb_lut[256] =
+{
+	0x00, 0x5E, 0xBC, 0xE2, 0x61, 0x3F, 0xDD, 0x83,
+	0xC2, 0x9C, 0x7E, 0x20, 0xA3, 0xFD, 0x1F, 0x41,
+	0x9D, 0xC3, 0x21, 0x7F, 0xFC, 0xA2, 0x40, 0x1E,
+	0x5F, 0x01, 0xE3, 0xBD, 0x3E, 0x60, 0x82, 0xDC,
+	0x23, 0x7D, 0x9F, 0xC1, 0x42, 0x1C, 0xFE, 0xA0,
+	0xE1, 0xBF, 0x5D, 0x03, 0x80, 0xDE, 0x3C, 0x62,
+	0xBE, 0xE0, 0x02, 0x5C, 0xDF, 0x81, 0x63, 0x3D,
+	0x7C, 0x22, 0xC0, 0x9E, 0x1D, 0x43, 0xA1, 0xFF,
+	0x46, 0x18, 0xFA, 0xA4, 0x27, 0x79, 0x9B, 0xC5,
+	0x84, 0xDA, 0x38, 0x66, 0xE5, 0xBB, 0x59, 0x07,
+	0xDB, 0x85, 0x67, 0x39, 0xBA, 0xE4, 0x06, 0x58,
+	0x19, 0x47, 0xA5, 0xFB, 0x78, 0x26, 0xC4, 0x9A,
+	0x65, 0x3B, 0xD9, 0x87, 0x04, 0x5A, 0xB8, 0xE6,
+	0xA7, 0xF9, 0x1B, 0x45, 0xC6, 0x98, 0x7A, 0x24,
+	0xF8, 0xA6, 0x44, 0x1A, 0x99, 0xC7, 0x25, 0x7B,
+	0x3A, 0x64, 0x86, 0xD8, 0x5B, 0x05, 0xE7, 0xB9,
+	0x8C, 0xD2, 0x30, 0x6E, 0xED, 0xB3, 0x51, 0x0F,
+	0x4E, 0x10, 0xF2, 0xAC, 0x2F, 0x71, 0x93, 0xCD,
+	0x11, 0x4F, 0xAD, 0xF3, 0x70, 0x2E, 0xCC, 0x92,
+	0xD3, 0x8D, 0x6F, 0x31, 0xB2, 0xEC, 0x0E, 0x50,
+	0xAF, 0xF1, 0x13, 0x4D, 0xCE, 0x90, 0x72, 0x2C,
+	0x6D, 0x33, 0xD1, 0x8F, 0x0C, 0x52, 0xB0, 0xEE,
+	0x32, 0x6C, 0x8E, 0xD0, 0x53, 0x0D, 0xEF, 0xB1,
+	0xF0, 0xAE, 0x4C, 0x12, 0x91, 0xCF, 0x2D, 0x73,
+	0xCA, 0x94, 0x76, 0x28, 0xAB, 0xF5, 0x17, 0x49,
+	0x08, 0x56, 0xB4, 0xEA, 0x69, 0x37, 0xD5, 0x8B,
+	0x57, 0x09, 0xEB, 0xB5, 0x36, 0x68, 0x8A, 0xD4,
+	0x95, 0xCB, 0x29, 0x77, 0xF4, 0xAA, 0x48, 0x16,
+	0xE9, 0xB7, 0x55, 0x0B, 0x88, 0xD6, 0x34, 0x6A,
+	0x2B, 0x75, 0x97, 0xC9, 0x4A, 0x14, 0xF6, 0xA8,
+	0x74, 0x2A, 0xC8, 0x96, 0x15, 0x4B, 0xA9, 0xF7,
+	0xB6, 0xE8, 0x0A, 0x54, 0xD7, 0x89, 0x6B, 0x35
+};
+#else
+// CRC-16-CCITT   G(X)=X16+X12+X5+1
+static const uint16_t crc16_1021_msb_lut[256] =
+{
+	0x0000, 0x1021, 0x2042, 0x3063, 0x4084, 0x50A5, 0x60C6, 0x70E7,
+	0x8108, 0x9129, 0xA14A, 0xB16B, 0xC18C, 0xD1AD, 0xE1CE, 0xF1EF,
+	0x1231, 0x0210, 0x3273, 0x2252, 0x52B5, 0x4294, 0x72F7, 0x62D6,
+	0x9339, 0x8318, 0xB37B, 0xA35A, 0xD3BD, 0xC39C, 0xF3FF, 0xE3DE,
+	0x2462, 0x3443, 0x0420, 0x1401, 0x64E6, 0x74C7, 0x44A4, 0x5485,
+	0xA56A, 0xB54B, 0x8528, 0x9509, 0xE5EE, 0xF5CF, 0xC5AC, 0xD58D,
+	0x3653, 0x2672, 0x1611, 0x0630, 0x76D7, 0x66F6, 0x5695, 0x46B4,
+	0xB75B, 0xA77A, 0x9719, 0x8738, 0xF7DF, 0xE7FE, 0xD79D, 0xC7BC,
+	0x48C4, 0x58E5, 0x6886, 0x78A7, 0x0840, 0x1861, 0x2802, 0x3823,
+	0xC9CC, 0xD9ED, 0xE98E, 0xF9AF, 0x8948, 0x9969, 0xA90A, 0xB92B,
+	0x5AF5, 0x4AD4, 0x7AB7, 0x6A96, 0x1A71, 0x0A50, 0x3A33, 0x2A12,
+	0xDBFD, 0xCBDC, 0xFBBF, 0xEB9E, 0x9B79, 0x8B58, 0xBB3B, 0xAB1A,
+	0x6CA6, 0x7C87, 0x4CE4, 0x5CC5, 0x2C22, 0x3C03, 0x0C60, 0x1C41,
+	0xEDAE, 0xFD8F, 0xCDEC, 0xDDCD, 0xAD2A, 0xBD0B, 0x8D68, 0x9D49,
+	0x7E97, 0x6EB6, 0x5ED5, 0x4EF4, 0x3E13, 0x2E32, 0x1E51, 0x0E70,
+	0xFF9F, 0xEFBE, 0xDFDD, 0xCFFC, 0xBF1B, 0xAF3A, 0x9F59, 0x8F78,
+	0x9188, 0x81A9, 0xB1CA, 0xA1EB, 0xD10C, 0xC12D, 0xF14E, 0xE16F,
+	0x1080, 0x00A1, 0x30C2, 0x20E3, 0x5004, 0x4025, 0x7046, 0x6067,
+	0x83B9, 0x9398, 0xA3FB, 0xB3DA, 0xC33D, 0xD31C, 0xE37F, 0xF35E,
+	0x02B1, 0x1290, 0x22F3, 0x32D2, 0x4235, 0x5214, 0x6277, 0x7256,
+	0xB5EA, 0xA5CB, 0x95A8, 0x8589, 0xF56E, 0xE54F, 0xD52C, 0xC50D,
+	0x34E2, 0x24C3, 0x14A0, 0x0481, 0x7466, 0x6447, 0x5424, 0x4405,
+	0xA7DB, 0xB7FA, 0x8799, 0x97B8, 0xE75F, 0xF77E, 0xC71D, 0xD73C,
+	0x26D3, 0x36F2, 0x0691, 0x16B0, 0x6657, 0x7676, 0x4615, 0x5634,
+	0xD94C, 0xC96D, 0xF90E, 0xE92F, 0x99C8, 0x89E9, 0xB98A, 0xA9AB,
+	0x5844, 0x4865, 0x7806, 0x6827, 0x18C0, 0x08E1, 0x3882, 0x28A3,
+	0xCB7D, 0xDB5C, 0xEB3F, 0xFB1E, 0x8BF9, 0x9BD8, 0xABBB, 0xBB9A,
+	0x4A75, 0x5A54, 0x6A37, 0x7A16, 0x0AF1, 0x1AD0, 0x2AB3, 0x3A92,
+	0xFD2E, 0xED0F, 0xDD6C, 0xCD4D, 0xBDAA, 0xAD8B, 0x9DE8, 0x8DC9,
+	0x7C26, 0x6C07, 0x5C64, 0x4C45, 0x3CA2, 0x2C83, 0x1CE0, 0x0CC1,
+	0xEF1F, 0xFF3E, 0xCF5D, 0xDF7C, 0xAF9B, 0xBFBA, 0x8FD9, 0x9FF8,
+	0x6E17, 0x7E36, 0x4E55, 0x5E74, 0x2E93, 0x3EB2, 0x0ED1, 0x1EF0
+};
+
+// CRC-16-MAXIM   G(X)=X16+X15+X2+1
+const uint16_t crc16_8005_msb_lut[256] =
+{
+	0x0000, 0x8005, 0x800F, 0x000A, 0x801B, 0x001E, 0x0014, 0x8011,
+	0x8033, 0x0036, 0x003C, 0x8039, 0x0028, 0x802D, 0x8027, 0x0022,
+	0x8063, 0x0066, 0x006C, 0x8069, 0x0078, 0x807D, 0x8077, 0x0072,
+	0x0050, 0x8055, 0x805F, 0x005A, 0x804B, 0x004E, 0x0044, 0x8041,
+	0x80C3, 0x00C6, 0x00CC, 0x80C9, 0x00D8, 0x80DD, 0x80D7, 0x00D2,
+	0x00F0, 0x80F5, 0x80FF, 0x00FA, 0x80EB, 0x00EE, 0x00E4, 0x80E1,
+	0x00A0, 0x80A5, 0x80AF, 0x00AA, 0x80BB, 0x00BE, 0x00B4, 0x80B1,
+	0x8093, 0x0096, 0x009C, 0x8099, 0x0088, 0x808D, 0x8087, 0x0082,
+	0x8183, 0x0186, 0x018C, 0x8189, 0x0198, 0x819D, 0x8197, 0x0192,
+	0x01B0, 0x81B5, 0x81BF, 0x01BA, 0x81AB, 0x01AE, 0x01A4, 0x81A1,
+	0x01E0, 0x81E5, 0x81EF, 0x01EA, 0x81FB, 0x01FE, 0x01F4, 0x81F1,
+	0x81D3, 0x01D6, 0x01DC, 0x81D9, 0x01C8, 0x81CD, 0x81C7, 0x01C2,
+	0x0140, 0x8145, 0x814F, 0x014A, 0x815B, 0x015E, 0x0154, 0x8151,
+	0x8173, 0x0176, 0x017C, 0x8179, 0x0168, 0x816D, 0x8167, 0x0162,
+	0x8123, 0x0126, 0x012C, 0x8129, 0x0138, 0x813D, 0x8137, 0x0132,
+	0x0110, 0x8115, 0x811F, 0x011A, 0x810B, 0x010E, 0x0104, 0x8101,
+	0x8303, 0x0306, 0x030C, 0x8309, 0x0318, 0x831D, 0x8317, 0x0312,
+	0x0330, 0x8335, 0x833F, 0x033A, 0x832B, 0x032E, 0x0324, 0x8321,
+	0x0360, 0x8365, 0x836F, 0x036A, 0x837B, 0x037E, 0x0374, 0x8371,
+	0x8353, 0x0356, 0x035C, 0x8359, 0x0348, 0x834D, 0x8347, 0x0342,
+	0x03C0, 0x83C5, 0x83CF, 0x03CA, 0x83DB, 0x03DE, 0x03D4, 0x83D1,
+	0x83F3, 0x03F6, 0x03FC, 0x83F9, 0x03E8, 0x83ED, 0x83E7, 0x03E2,
+	0x83A3, 0x03A6, 0x03AC, 0x83A9, 0x03B8, 0x83BD, 0x83B7, 0x03B2,
+	0x0390, 0x8395, 0x839F, 0x039A, 0x838B, 0x038E, 0x0384, 0x8381,
+	0x0280, 0x8285, 0x828F, 0x028A, 0x829B, 0x029E, 0x0294, 0x8291,
+	0x82B3, 0x02B6, 0x02BC, 0x82B9, 0x02A8, 0x82AD, 0x82A7, 0x02A2,
+	0x82E3, 0x02E6, 0x02EC, 0x82E9, 0x02F8, 0x82FD, 0x82F7, 0x02F2,
+	0x02D0, 0x82D5, 0x82DF, 0x02DA, 0x82CB, 0x02CE, 0x02C4, 0x82C1,
+	0x8243, 0x0246, 0x024C, 0x8249, 0x0258, 0x825D, 0x8257, 0x0252,
+	0x0270, 0x8275, 0x827F, 0x027A, 0x826B, 0x026E, 0x0264, 0x8261,
+	0x0220, 0x8225, 0x822F, 0x022A, 0x823B, 0x023E, 0x0234, 0x8231,
+	0x8213, 0x0216, 0x021C, 0x8219, 0x0208, 0x820D, 0x8207, 0x0202
+};
+
+// CRC-8-MAXIM   G(X)=X8+X5+X4+1
+const uint8_t crc8_31_msb_lut[256] =
+{
+	0x00, 0x31, 0x62, 0x53, 0xC4, 0xF5, 0xA6, 0x97,
+	0xB9, 0x88, 0xDB, 0xEA, 0x7D, 0x4C, 0x1F, 0x2E,
+	0x43, 0x72, 0x21, 0x10, 0x87, 0xB6, 0xE5, 0xD4,
+	0xFA, 0xCB, 0x98, 0xA9, 0x3E, 0x0F, 0x5C, 0x6D,
+	0x86, 0xB7, 0xE4, 0xD5, 0x42, 0x73, 0x20, 0x11,
+	0x3F, 0x0E, 0x5D, 0x6C, 0xFB, 0xCA, 0x99, 0xA8,
+	0xC5, 0xF4, 0xA7, 0x96, 0x01, 0x30, 0x63, 0x52,
+	0x7C, 0x4D, 0x1E, 0x2F, 0xB8, 0x89, 0xDA, 0xEB,
+	0x3D, 0x0C, 0x5F, 0x6E, 0xF9, 0xC8, 0x9B, 0xAA,
+	0x84, 0xB5, 0xE6, 0xD7, 0x40, 0x71, 0x22, 0x13,
+	0x7E, 0x4F, 0x1C, 0x2D, 0xBA, 0x8B, 0xD8, 0xE9,
+	0xC7, 0xF6, 0xA5, 0x94, 0x03, 0x32, 0x61, 0x50,
+	0xBB, 0x8A, 0xD9, 0xE8, 0x7F, 0x4E, 0x1D, 0x2C,
+	0x02, 0x33, 0x60, 0x51, 0xC6, 0xF7, 0xA4, 0x95,
+	0xF8, 0xC9, 0x9A, 0xAB, 0x3C, 0x0D, 0x5E, 0x6F,
+	0x41, 0x70, 0x23, 0x12, 0x85, 0xB4, 0xE7, 0xD6,
+	0x7A, 0x4B, 0x18, 0x29, 0xBE, 0x8F, 0xDC, 0xED,
+	0xC3, 0xF2, 0xA1, 0x90, 0x07, 0x36, 0x65, 0x54,
+	0x39, 0x08, 0x5B, 0x6A, 0xFD, 0xCC, 0x9F, 0xAE,
+	0x80, 0xB1, 0xE2, 0xD3, 0x44, 0x75, 0x26, 0x17,
+	0xFC, 0xCD, 0x9E, 0xAF, 0x38, 0x09, 0x5A, 0x6B,
+	0x45, 0x74, 0x27, 0x16, 0x81, 0xB0, 0xE3, 0xD2,
+	0xBF, 0x8E, 0xDD, 0xEC, 0x7B, 0x4A, 0x19, 0x28,
+	0x06, 0x37, 0x64, 0x55, 0xC2, 0xF3, 0xA0, 0x91,
+	0x47, 0x76, 0x25, 0x14, 0x83, 0xB2, 0xE1, 0xD0,
+	0xFE, 0xCF, 0x9C, 0xAD, 0x3A, 0x0B, 0x58, 0x69,
+	0x04, 0x35, 0x66, 0x57, 0xC0, 0xF1, 0xA2, 0x93,
+	0xBD, 0x8C, 0xDF, 0xEE, 0x79, 0x48, 0x1B, 0x2A,
+	0xC1, 0xF0, 0xA3, 0x92, 0x05, 0x34, 0x67, 0x56,
+	0x78, 0x49, 0x1A, 0x2B, 0xBC, 0x8D, 0xDE, 0xEF,
+	0x82, 0xB3, 0xE0, 0xD1, 0x46, 0x77, 0x24, 0x15,
+	0x3B, 0x0A, 0x59, 0x68, 0xFF, 0xCE, 0x9D, 0xAC
+};
+#endif
+
+/* CRC lookup table algorithm
+#define CRC_BIT_NUM 8u/16u/32u/64u
+#define BITS_IN_BYTE 8u
+uint8_t dataBuff[ARRAY_SIZE] = { 0x32, 0x33, …};
+uint8_t/uint16_t/uint32_t crc_val = 0x0;
+// LSB
+for(int i = 0; i < sizeof(dataBuff); i++)
+{
+	crc_val = (crc_val >> BITS_IN_BYTE) ^ crc_lsb_lut[(uint8)(crc_val^dataBuff[i])];
+}
+// MSB
+for(int i = 0; i < sizeof(dataBuff); i++)
+{
+	crc_val = (crc_val << BITS_IN_BYTE) ^ crc_msb_lut[(uint8)((crc_val>>8)^dataBuff[i])];
+}
+*/
+
+/*****************************************************************************/
+/**
+ * @brief	CRC8 generator
+ *
+ * @param   buffPtr	data buffer pointer.
+ * @param   dataLen	data length
+ * @param	poly	polynomials of crc
+ * @param	crcVal	a pointer to store generated crc value
+ *
+ * @return  SUCCESS
+ * 			FAILURE
+ *
+ ******************************************************************************/
+int crc8_gen(uint8_t *buffPtr, uint32_t dataLen, uint16_t poly, uint8_t *crcVal)
+{
+	uint8_t crc = CRC8_INIT;
+	const uint8_t *crc_lut = NULL;
+
+	switch (poly)
+	{
+#ifdef __CRC_LSB
+	case 0x31:
+		crc_lut = crc8_31_lsb_lut;
+		break;
+	default:
+		return FAILURE;
+#else
+	case 0x31:
+		crc_lut = crc8_31_msb_lut;
+		break;
+	default:
+		return FAILURE;
+#endif
+	}
+
+	for (int i = 0; i < dataLen; i++)
+	{
+		crc = crc_lut[(uint8_t)(crc ^ buffPtr[i])];
+	}
+	*crcVal = crc;
+	return SUCCESS;
+}
+
+/*****************************************************************************/
+/**
+ * @brief	CRC16 generator
+ *
+ * @param   buffPtr	data buffer pointer.
+ * @param   dataLen	data length
+ * @param	poly	polynomials of crc
+ * @param	crcVal	a pointer to store generated crc value
+ *
+ * @return  SUCCESS
+ * 			FAILURE
+ *
+ ******************************************************************************/
+int crc16_gen(uint8_t *buffPtr, uint32_t dataLen, uint16_t poly, uint16_t *crcVal)
+{
+	uint16_t crc = CRC16_INIT;
+	const uint16_t *crc_lut = NULL;
+	switch (poly)
+	{
+#ifdef __CRC_LSB
+	case 0x8005:
+		crc_lut = crc16_8005_lsb_lut;
+		break;
+	case 0x1021:
+		crc_lut = crc16_1021_lsb_lut;
+		break;
+	default:
+		return FAILURE;
+#else
+	case 0x8005:
+		crc_lut = crc16_8005_msb_lut;
+		break;
+	case 0x1021:
+		crc_lut = crc16_1021_msb_lut;
+		break;
+	default:
+		return FAILURE;
+#endif
+	}
+	for (int i = 0; i < dataLen; i++)
+	{
+#ifdef __CRC_LSB
+		crc = (crc >> 8) ^ crc_lut[(uint8_t)(crc ^ buffPtr[i])];
+#else
+		crc = (crc << 8) ^ crc_lut[(uint8_t)((crc >> 8) ^ buffPtr[i])];
+#endif
+	}
+	*crcVal = crc;
+	return SUCCESS;
+}
+
+/*****************************************************************************/
+/**
+ * @brief	CRC8 compare cheker
+ *
+ * @param   buffPtr	data buffer pointer.
+ * @param   dataLen	data length
+ * @param	crcOffset	byte offset of crc stored position.
+ * @param	poly	polynomials of crc
+ *
+ * @return	true
+ * 			false
+ *
+ ******************************************************************************/
+bool crc8_check(uint8_t *buffPtr, uint32_t dataLen, uint32_t crcOffset, uint16_t poly)
+{
+	int status = SUCCESS;
+	uint8_t crc_comp;
+	uint8_t crc;
+	if (dataLen == 0)
+	{
+		return false;
+	}
+	crc_comp = (uint8_t)(*(buffPtr + crcOffset));
+	status = crc8_gen(buffPtr, dataLen, poly, &crc);
+	if (status == SUCCESS)
+	{
+		if (crc == crc_comp)
+		{
+			return true;
+		}
+		else
+		{
+			return false;
+		}
+	}
+	else
+	{
+		return false;
+	}
+}
+
+/*****************************************************************************/
+/**
+ * @brief	CRC16 compare cheker
+ *
+ * @param   buffPtr	data buffer pointer.
+ * @param   dataLen	data length
+ * @param	crcOffset	byte offset of crc stored position.
+ * @param	poly	polynomials of crc
+ *
+ * @return	true
+ * 			fasle
+ *
+ ******************************************************************************/
+bool crc16_check(uint8_t *buffPtr, uint32_t dataLen, uint32_t crcOffset, uint16_t poly)
+{
+	int status = SUCCESS;
+	uint16_t crc_comp;
+	uint16_t crc;
+	if (dataLen == 0)
+	{
+		return false;
+	}
+	crc_comp = (uint16_t)(*(buffPtr + crcOffset));
+	crc_comp |= (uint16_t)((*(buffPtr + crcOffset + 1)) << 8);
+	status = crc16_gen(buffPtr, dataLen, poly, &crc);
+	if (status == SUCCESS)
+	{
+		if (crc == crc_comp)
+		{
+			return true;
+		}
+		else
+		{
+			return false;
+		}
+	}
+	else
+	{
+		return false;
+	}
+}
+
+/** @}*/

dj_f1_ad9371/vitis_classic_autobuild/source/util/list.c

@@ -0,0 +1,886 @@
+/*******************************************************************************
+ *   @file   list.c
+ *   @brief  List library implementation
+ *   @author Mihail Chindris (mihail.chindris@analog.com)
+********************************************************************************
+ * Copyright 2020(c) Analog Devices, Inc.
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *  - Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *  - Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *  - Neither the name of Analog Devices, Inc. nor the names of its
+ *    contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *  - The use of this software may or may not infringe the patent rights
+ *    of one or more patent holders.  This license does not release you
+ *    from the requirement that you obtain separate licenses from these
+ *    patent holders to use this software.
+ *  - Use of the software either in source or binary form, must be run
+ *    on or directly connected to an Analog Devices Inc. component.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT,
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, INTELLECTUAL PROPERTY RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*******************************************************************************/
+
+/******************************************************************************/
+/***************************** Include Files **********************************/
+/******************************************************************************/
+
+#include "list.h"
+#include "error.h"
+#include <stdlib.h>
+
+/******************************************************************************/
+/*************************** Types Declarations *******************************/
+/******************************************************************************/
+
+/**
+ * @struct list_elem
+ * @brief Format of each element of the list
+ */
+struct list_elem
+{
+	/** User data */
+	void *data;
+	/** Reference to previous element */
+	struct list_elem *prev;
+	/** Reference to next element */
+	struct list_elem *next;
+};
+
+/**
+ * @struct list_iterator
+ * @brief Structure used to iterate through the list
+ */
+struct iterator
+{
+	/** List reference */
+	struct _list_desc *list;
+	/** Current element reference */
+	struct list_elem *elem;
+};
+
+/**
+ * @struct _list_desc
+ * @brief List descriptor
+ */
+struct _list_desc
+{
+	/** Reference to first element in the list */
+	struct list_elem *first;
+	/** Reference to last element in the list*/
+	struct list_elem *last;
+	/** Number of elements in the list */
+	uint32_t nb_elements;
+	/** Function used to compare elements */
+	f_cmp comparator;
+	/** Number of current active iterators */
+	uint32_t nb_iterators;
+	/** Internal list iterator */
+	struct iterator l_it;
+};
+
+/** @brief Default function used to compare element in the list ( \ref f_cmp) */
+static int32_t default_comparator(void *data1, void *data2)
+{
+	return (int32_t)((int32_t *)data1 - (int32_t *)data2);
+}
+
+/**
+ * @brief Creates a new list elements an configure its value
+ * @param data - To set list_elem.data
+ * @param prev - To set list_elem.prev
+ * @param next - To set list_elem.next
+ * @return Address of the new element or NULL if allocation fails.
+ */
+static inline struct list_elem *create_element(void *data,
+											   struct list_elem *prev,
+											   struct list_elem *next)
+{
+	struct list_elem *elem;
+
+	elem = (struct list_elem *)calloc(1, sizeof(*elem));
+	if (!elem)
+		return NULL;
+	elem->data = data;
+	elem->prev = prev;
+	elem->next = next;
+
+	return (elem);
+}
+
+/**
+ * @brief Updates the necesary link on the list elements to add or remove one
+ * @param prev - Low element
+ * @param elem - Middle element
+ * @param next - High element
+ */
+static inline void update_links(struct list_elem *prev, struct list_elem *elem,
+								struct list_elem *next)
+{
+	if (prev)
+		prev->next = elem ? elem : next;
+	if (elem)
+	{
+		elem->prev = prev;
+		elem->next = next;
+	}
+	if (next)
+		next->prev = elem ? elem : prev;
+}
+
+/**
+ * @brief Update according to modification the list descriptor
+ * @param list - List reference
+ * @param new_first - New first element
+ * @param new_last - New last element
+ */
+static inline void update_desc(struct _list_desc *list,
+							   struct list_elem *new_first,
+							   struct list_elem *new_last)
+{
+	if (new_first == list->first)
+	{
+		list->last = new_last;
+		if (new_first == NULL || new_last == NULL)
+			list->first = new_last;
+	}
+	else
+	{ /* if (new_last == list->last) */
+		list->first = new_first;
+		if (new_last == NULL || new_first == NULL)
+			list->last = new_first;
+	}
+}
+
+/**
+ * @brief Set the adapter functions acording to the adapter type
+ * @param ad - Reference of the adapter
+ * @param type - Type of the adapter
+ */
+static inline void set_adapter(struct list_desc *ad, enum adapter_type type)
+{
+	switch (type)
+	{
+	case LIST_PRIORITY_LIST:
+		ad->push = list_add_find;
+		ad->pop = list_get_first;
+		ad->top_next = list_read_first;
+		ad->back = list_read_last;
+		ad->swap = list_edit_first;
+		break;
+	case LIST_QUEUE:
+		ad->push = list_add_last;
+		ad->pop = list_get_first;
+		ad->top_next = list_read_first;
+		ad->back = list_read_last;
+		ad->swap = list_edit_first;
+		break;
+	case LIST_DEFAULT:
+	case LIST_STACK:
+	default:
+		ad->push = list_add_last;
+		ad->pop = list_get_last;
+		ad->top_next = list_read_last;
+		ad->back = list_read_first;
+		ad->swap = list_edit_last;
+		break;
+	}
+}
+
+/**
+ * @brief Create a new empty list
+ * @param list_desc - Where to store the reference of the new created list
+ * @param type - Type of adapter to use.
+ * @param comparator - Used to compare item when using an ordered list or when
+ * using the \em find functions.
+ * @return
+ *  - \ref SUCCESS : On success
+ *  - \ref FAILURE : Otherwise
+ */
+int32_t list_init(struct list_desc **list_desc, enum adapter_type type,
+				  f_cmp comparator)
+{
+	struct list_desc *l_desc;
+	struct _list_desc *list;
+
+	if (!list_desc)
+		return FAILURE;
+	l_desc = (struct list_desc *)calloc(1, sizeof(*l_desc));
+	if (!l_desc)
+		return FAILURE;
+	list = (struct _list_desc *)calloc(1, sizeof(*list));
+	if (!list)
+	{
+		free(l_desc);
+		return FAILURE;
+	}
+
+	*list_desc = l_desc;
+	l_desc->priv_desc = list;
+	list->comparator = comparator ? comparator : default_comparator;
+
+	/* Configure wrapper */
+	set_adapter(l_desc, type);
+	list->l_it.list = list;
+
+	return SUCCESS;
+}
+
+/**
+ * @brief Remove the created list.
+ *
+ * All its elements will be cleared and the data inside each will be lost. If
+ * not all iterators have been removed, the list will not be removed.
+ * @param list_desc - Reference to the list
+ * @return
+ *  - \ref SUCCESS : On success
+ *  - \ref FAILURE : Otherwise
+ */
+int32_t list_remove(struct list_desc *list_desc)
+{
+	void *data;
+	struct _list_desc *list;
+
+	if (!list_desc)
+		return FAILURE;
+
+	list = list_desc->priv_desc;
+	if (list->nb_iterators != 0)
+		return FAILURE;
+
+	/* Remove all the elements */
+	while (SUCCESS == list_get_first(list_desc, &data))
+		;
+	free(list_desc->priv_desc);
+	free(list_desc);
+
+	return SUCCESS;
+}
+
+/**
+ * @brief Get the number of elements inside the list
+ * @param list_desc - List reference
+ * @param out_size - Where to store the number of elements
+ * @return
+ *  - \ref SUCCESS : On success
+ *  - \ref FAILURE : Otherwise
+ */
+int32_t list_get_size(struct list_desc *list_desc, uint32_t *out_size)
+{
+	struct _list_desc *list;
+
+	if (!list_desc || !out_size)
+		return FAILURE;
+
+	list = list_desc->priv_desc;
+	*out_size = list->nb_elements;
+
+	return SUCCESS;
+}
+
+/** @brief Add element at the begining of the list. Refer to \ref f_add */
+int32_t list_add_first(struct list_desc *list_desc, void *data)
+{
+	struct list_elem *prev;
+	struct list_elem *next;
+	struct list_elem *elem;
+	struct _list_desc *list;
+
+	if (!list_desc)
+		return FAILURE;
+
+	list = list_desc->priv_desc;
+
+	prev = NULL;
+	next = list->first;
+	elem = create_element(data, prev, next);
+	if (!elem)
+		return FAILURE;
+
+	update_links(prev, elem, next);
+
+	update_desc(list, elem, list->last);
+
+	list->nb_elements++;
+
+	return SUCCESS;
+}
+
+/** @brief Add element at the end of the list. Refer to \ref f_add */
+int32_t list_add_last(struct list_desc *list_desc, void *data)
+{
+	struct list_elem *prev;
+	struct list_elem *next;
+	struct list_elem *elem;
+	struct _list_desc *list;
+
+	if (!list_desc)
+		return FAILURE;
+	list = list_desc->priv_desc;
+
+	prev = list->last;
+	next = NULL;
+	elem = create_element(data, prev, next);
+	if (!elem)
+		return FAILURE;
+
+	update_links(prev, elem, next);
+
+	update_desc(list, list->first, elem);
+
+	list->nb_elements++;
+
+	return SUCCESS;
+}
+
+/** @brief Add element at the specified idx. Refer to \ref f_add */
+int32_t list_add_idx(struct list_desc *list_desc, void *data, uint32_t idx)
+{
+	struct _list_desc *list;
+
+	if (!list_desc)
+		return FAILURE;
+	list = list_desc->priv_desc;
+
+	/* If there are no elements the creation of an iterator will fail */
+	if (list->nb_elements == 0 || idx == 0)
+		return list_add_first(list_desc, data);
+	if (list->nb_elements == idx)
+		return list_add_last(list_desc, data);
+
+	list->l_it.elem = list->first;
+	if (SUCCESS != iterator_move(&(list->l_it), idx))
+		return FAILURE;
+
+	return iterator_insert(&(list->l_it), data, 0);
+}
+
+/** @brief Add element in ascending order. Refer to \ref f_add */
+int32_t list_add_find(struct list_desc *list_desc, void *data)
+{
+	struct list_elem *elem;
+	struct _list_desc *list;
+
+	if (!list_desc)
+		return FAILURE;
+	list = list_desc->priv_desc;
+
+	/* Based on place iterator */
+	elem = list->first;
+	while (elem)
+	{
+		if (0 < list->comparator(elem->data, data))
+			break;
+		elem = elem->next;
+	}
+	if (elem == NULL)
+	{
+		list->l_it.elem = list->last;
+		return iterator_insert(&(list->l_it), data, 1);
+	}
+	else
+	{
+		list->l_it.elem = elem;
+		return iterator_insert(&(list->l_it), data, 0);
+	}
+}
+
+/** @brief Edit the first element of the list. Refer to \ref f_edit */
+int32_t list_edit_first(struct list_desc *list_desc, void *new_data)
+{
+	struct _list_desc *list;
+
+	if (!list_desc)
+		return FAILURE;
+
+	list = list_desc->priv_desc;
+	list->first->data = new_data;
+
+	return SUCCESS;
+}
+
+/** @brief Edit the last element of the list. Refer to \ref f_edit */
+int32_t list_edit_last(struct list_desc *list_desc, void *new_data)
+{
+	struct _list_desc *list;
+
+	if (!list_desc)
+		return FAILURE;
+
+	list = list_desc->priv_desc;
+	list->last->data = new_data;
+
+	return SUCCESS;
+}
+
+/** @brief Edit the element at the specified idx. Refer to \ref f_edit */
+int32_t list_edit_idx(struct list_desc *list_desc, void *new_data, uint32_t idx)
+{
+	struct _list_desc *list;
+
+	if (!list_desc)
+		return FAILURE;
+	list = list_desc->priv_desc;
+
+	list->l_it.elem = list->first;
+	if (SUCCESS != iterator_move(&(list->l_it), idx))
+		return FAILURE;
+
+	return iterator_edit(&(list->l_it), new_data);
+}
+
+/** @brief Edit the element which match with cmp_data. Refer to \ref f_edit */
+int32_t list_edit_find(struct list_desc *list_desc, void *new_data,
+					   void *cmp_data)
+{
+	struct _list_desc *list;
+
+	if (!list_desc)
+		return FAILURE;
+	list = list_desc->priv_desc;
+
+	list->l_it.elem = list->first;
+	if (SUCCESS != iterator_find(&(list->l_it), cmp_data))
+		return FAILURE;
+
+	return iterator_edit(&(list->l_it), new_data);
+}
+
+/** @brief Read the first element of the list. Refer to \ref f_read */
+int32_t list_read_first(struct list_desc *list_desc, void **data)
+{
+	struct _list_desc *list;
+
+	if (!list_desc || !data)
+		return FAILURE;
+
+	*data = NULL;
+	list = list_desc->priv_desc;
+	if (!list->first)
+		return FAILURE;
+
+	*data = list->first->data;
+
+	return SUCCESS;
+}
+
+/** @brief Read the last element of the list. Refer to \ref f_read */
+int32_t list_read_last(struct list_desc *list_desc, void **data)
+{
+	struct _list_desc *list;
+
+	if (!list_desc || !data)
+		return FAILURE;
+
+	*data = NULL;
+	list = list_desc->priv_desc;
+	if (!list->last)
+		return FAILURE;
+
+	*data = list->last->data;
+
+	return SUCCESS;
+}
+
+/** @brief Read the element at the specified idx. Refer to \ref f_read */
+int32_t list_read_idx(struct list_desc *list_desc, void **data, uint32_t idx)
+{
+	struct _list_desc *list;
+
+	if (!list_desc || !data)
+		return FAILURE;
+
+	*data = NULL;
+	list = list_desc->priv_desc;
+	if (!list)
+		return FAILURE;
+
+	if (idx >= list->nb_elements)
+		return FAILURE;
+
+	list->l_it.elem = list->first;
+	if (SUCCESS != iterator_move(&(list->l_it), idx))
+		return FAILURE;
+
+	return iterator_read(&(list->l_it), data);
+}
+
+/** @brief Read the element which match with cmp_data. Refer to \ref f_read */
+int32_t list_read_find(struct list_desc *list_desc, void **data,
+					   void *cmp_data)
+{
+	struct _list_desc *list;
+
+	if (!list_desc || !data)
+		return FAILURE;
+
+	*data = NULL;
+	list = list_desc->priv_desc;
+	if (!list)
+		return FAILURE;
+
+	list = list_desc->priv_desc;
+	list->l_it.elem = list->first;
+	if (SUCCESS != iterator_find(&(list->l_it), cmp_data))
+		return FAILURE;
+
+	return iterator_read(&(list->l_it), data);
+}
+
+/** @brief Read and delete the first element of the list. Refer to \ref f_get */
+int32_t list_get_first(struct list_desc *list_desc, void **data)
+{
+	struct list_elem *prev;
+	struct list_elem *next;
+	struct list_elem *elem;
+	struct _list_desc *list;
+
+	if (!list_desc || !data)
+		return FAILURE;
+
+	*data = NULL;
+	list = list_desc->priv_desc;
+	if (!list->nb_elements)
+		return FAILURE;
+
+	elem = list->first;
+	prev = elem->prev;
+	next = elem->next;
+
+	update_links(prev, NULL, next);
+	update_desc(list, next, list->last);
+	list->nb_elements--;
+
+	*data = elem->data;
+	free(elem);
+
+	return SUCCESS;
+}
+
+/** @brief Read and delete the last element of the list. Refer to \ref f_get */
+int32_t list_get_last(struct list_desc *list_desc, void **data)
+{
+	struct list_elem *prev;
+	struct list_elem *next;
+	struct list_elem *elem;
+	struct _list_desc *list;
+
+	if (!list_desc || !data)
+		return FAILURE;
+
+	*data = NULL;
+	list = list_desc->priv_desc;
+	if (!list->nb_elements)
+		return FAILURE;
+
+	elem = list->last;
+	prev = elem->prev;
+	next = elem->next;
+
+	update_links(prev, NULL, next);
+	update_desc(list, list->first, prev);
+	list->nb_elements--;
+
+	*data = elem->data;
+	free(elem);
+
+	return SUCCESS;
+}
+
+/** @brief Read and delete the element at idx. Refer to \ref f_get */
+int32_t list_get_idx(struct list_desc *list_desc, void **data, uint32_t idx)
+{
+	struct _list_desc *list;
+
+	if (!list_desc || !data)
+		return FAILURE;
+
+	*data = NULL;
+	list = list_desc->priv_desc;
+	list->l_it.elem = list->first;
+	if (SUCCESS != iterator_move(&(list->l_it), idx))
+		return FAILURE;
+
+	return iterator_get(&(list->l_it), data);
+}
+
+/**
+ * @brief Read and delete the element which match with cmp_data.
+ * Refer to \ref f_get
+ */
+int32_t list_get_find(struct list_desc *list_desc, void **data, void *cmp_data)
+{
+	struct _list_desc *list;
+
+	if (!list_desc || !data)
+		return FAILURE;
+
+	*data = NULL;
+	list = list_desc->priv_desc;
+	list->l_it.elem = list->first;
+	if (SUCCESS != iterator_find(&(list->l_it), cmp_data))
+		return FAILURE;
+
+	return iterator_get(&(list->l_it), data);
+}
+
+/**
+ * @brief Create a new iterator
+ * @param iter - Where to store the reference for the new iterator
+ * @param list_desc - Reference of the list the iterator will be used for
+ * @param start - If it is true the iterator will be positioned at the first
+ * element of the list, else it will be positioned at the last.
+ * @return
+ *  - \ref SUCCESS : On success
+ *  - \ref FAILURE : Otherwise
+ */
+int32_t iterator_init(struct iterator **iter, struct list_desc *list_desc,
+					  bool start)
+{
+	struct iterator *it;
+
+	if (!list_desc)
+		return FAILURE;
+
+	it = (struct iterator *)calloc(1, sizeof(*it));
+	if (!it)
+		return FAILURE;
+	it->list = list_desc->priv_desc;
+	it->list->nb_iterators++;
+	it->elem = start ? it->list->first : it->list->last;
+	*iter = it;
+
+	return SUCCESS;
+}
+
+/**
+ * @brief Remove the created iterator
+ * @param iter - Reference of the iterator
+ * @return
+ *  - \ref SUCCESS : On success
+ *  - \ref FAILURE : Otherwise
+ */
+int32_t iterator_remove(struct iterator *iter)
+{
+	struct iterator *it = iter;
+
+	if (!it)
+		return FAILURE;
+
+	it->list->nb_iterators--;
+	free(it);
+
+	return SUCCESS;
+}
+
+/**
+ * @brief Move the position of the iteration through the list.
+ *
+ * If the required position is outside the list, the call will fail and the
+ * iterator will keep its position.
+ * @param iter - Reference of the iterator
+ * @param steps - Number of positions to be move. If positive, it will be moved
+ * forward, otherwise backwords.
+ * @return
+ *  - \ref SUCCESS : On success
+ *  - \ref FAILURE : Otherwise
+ */
+int32_t iterator_move(struct iterator *iter, int32_t steps)
+{
+	struct iterator *it = iter;
+	struct list_elem *elem;
+	int32_t dir = (steps < 0) ? -1 : 1;
+
+	if (!it)
+		return FAILURE;
+
+	steps = abs(steps);
+	elem = it->elem;
+	while (steps > 0 && elem)
+	{
+		elem = dir > 0 ? elem->next : elem->prev;
+		steps--;
+	}
+	if (!elem)
+		return FAILURE;
+
+	it->elem = elem;
+
+	return SUCCESS;
+}
+
+/**
+ * @brief Move the position of the iterator at the specified index of the list.
+ *
+ * @param iter - Reference of the iterator
+ * @param idx - Position in the list. If negative start counting backwords
+ * @return
+ *  - \ref SUCCESS : On success
+ *  - \ref FAILURE : Otherwise
+ */
+int32_t iterator_move_to_idx(struct iterator *iter, int32_t idx)
+{
+	struct list_elem *elem;
+	int32_t dir = (idx < 0) ? -1 : 1;
+
+	if (!iter)
+		return FAILURE;
+
+	idx = abs(idx);
+	elem = dir > 0 ? iter->list->first : iter->list->last;
+	while (idx > 0 && elem)
+	{
+		elem = dir > 0 ? elem->next : elem->prev;
+		idx--;
+	}
+	if (!elem)
+		return FAILURE;
+
+	iter->elem = elem;
+
+	return SUCCESS;
+}
+
+/**
+ * @brief Place the iterator where cmp_data if found.
+ * @param iter - Reference to the iterator
+ * @param cmp_data - Data to be found
+ * @return
+ *  - \ref SUCCESS : On success
+ *  - \ref FAILURE : Otherwise
+ */
+int32_t iterator_find(struct iterator *iter, void *cmp_data)
+{
+	struct iterator *it = iter;
+	struct list_elem *elem;
+
+	if (!it)
+		return FAILURE;
+
+	elem = it->list->first;
+	while (elem)
+	{
+		if (0 == it->list->comparator(elem->data, cmp_data))
+		{
+			it->elem = elem;
+			return SUCCESS;
+		}
+		elem = elem->next;
+	}
+
+	return FAILURE;
+}
+
+/**
+ * @brief Replace the data at the current position. Refer to \ref f_edit
+ */
+int32_t iterator_edit(struct iterator *iter, void *new_data)
+{
+	struct iterator *it = iter;
+
+	if (!it)
+		return FAILURE;
+
+	it->elem->data = new_data;
+
+	return SUCCESS;
+}
+
+/**
+ * @brief Read and remove the data at the current position. Refer to \ref f_get.
+ *
+ * If the current item is the last one, the iterator will be moved to the
+ * previous one.
+ */
+int32_t iterator_get(struct iterator *iter, void **data)
+{
+	struct iterator *it = iter;
+	struct list_elem *next;
+
+	if (!it || !it->elem || !data)
+		return FAILURE;
+
+	update_links(it->elem->prev, NULL, it->elem->next);
+	if (it->elem == it->list->first)
+		update_desc(it->list, it->elem->next, it->list->last);
+	else if (it->elem == it->list->last)
+		update_desc(it->list, it->list->first, it->elem->prev);
+	it->list->nb_elements--;
+
+	*data = it->elem->data;
+	if (it->elem == it->list->last)
+		next = it->elem->prev;
+	else
+		next = it->elem->next;
+	free(it->elem);
+	it->elem = next;
+
+	return SUCCESS;
+}
+
+/**
+ * @brief Read the data at the current position. Refer to \ref f_read
+ */
+int32_t iterator_read(struct iterator *iter, void **data)
+{
+	struct iterator *it = iter;
+
+	if (!it || !it->elem || !data)
+		return FAILURE;
+
+	*data = it->elem->data;
+
+	return SUCCESS;
+}
+
+/**
+ * @brief Insert an item in the list. Refer to \ref f_add
+ * @param iter
+ * @param data
+ * @param after - If true, the item will be inserted after the current position.
+ * Otherwise it will be inserted before.
+ */
+int32_t iterator_insert(struct iterator *iter, void *data, bool after)
+{
+	struct iterator *it = iter;
+	struct list_elem *elem;
+	struct list_desc list_desc;
+
+	if (!it)
+		return FAILURE;
+
+	list_desc.priv_desc = iter->list;
+	if (after && it->elem == it->list->last)
+		return list_add_last(&list_desc, data);
+	if (!after && it->elem == it->list->first)
+		return list_add_first(&list_desc, data);
+
+	if (after)
+		elem = create_element(data, it->elem, it->elem->next);
+	else
+		elem = create_element(data, it->elem->prev, it->elem);
+	if (!elem)
+		return FAILURE;
+
+	update_links(elem->prev, elem, elem->next);
+
+	it->list->nb_elements++;
+
+	return SUCCESS;
+}

dj_f1_ad9371/vitis_classic_autobuild/source/util/ring_buffer.c

@@ -0,0 +1,301 @@
+#include "ring_buffer.h"
+#include "common.h"
+#include <string.h>
+#include <stdlib.h>
+#include <stdio.h>
+
+/**
+ * @file
+ * Implementation of ring buffer functions for structured data.
+ */
+
+inline size_t RingBuff_Size(RING_BUFFER *rb) {
+  return (rb->size);
+}
+
+inline size_t RingBuff_Capacity(RING_BUFFER *rb) {
+  return (rb->capacity);
+}
+
+inline uint8_t RingBuff_isEmpty(RING_BUFFER *rb) {
+  return (rb->size == 0);
+}
+
+inline uint8_t RingBuff_isFull(RING_BUFFER *rb) {
+  return (rb->size == rb->capacity);
+}
+
+static inline size_t Get_Available2Write(const RING_BUFFER *rb)
+{
+    return (rb->capacity - rb->size);
+}
+
+RING_BUFFER *RingBuff_Create(size_t capacity, size_t element_size)
+{
+    if(capacity <= 1 || element_size == 0) {
+        return NULL;
+    }
+
+    RING_BUFFER *rb = malloc(sizeof(RING_BUFFER));
+    if (rb == NULL){
+        return rb;
+    }
+
+    rb->buffer = malloc(capacity * element_size);
+    if(rb->buffer == NULL) {
+        free(rb);
+        return NULL;
+    }
+
+    rb->tail = 0;
+    rb->head = 0;
+    rb->size = 0;
+    rb->capacity = capacity;
+    rb->element_size = element_size;
+
+    return rb;
+}
+
+void RingBuff_Destroy(RING_BUFFER *rb)
+{
+    if(rb == NULL) {
+        return;
+    }
+    free(rb->buffer);
+    free(rb);
+}
+
+void RingBuff_Flush(RING_BUFFER *rb)
+{
+    ASSERT(rb != NULL);
+    rb->tail = 0;
+    rb->head = 0;
+    rb->size = 0;
+}
+
+size_t RingBuff_PushElement(RING_BUFFER *rb, const void *element)
+{
+    ASSERT(rb != NULL);
+    ASSERT(element != NULL);
+
+    if (RingBuff_isFull(rb)) {
+        return 0;
+    }
+
+    // 计算目标位置的内存地址
+    uint8_t *target = (uint8_t*)rb->buffer + (rb->head * rb->element_size);
+
+    // 复制元素
+    memcpy(target, element, rb->element_size);
+
+    // 更新头指针
+    rb->head = (rb->head + 1) % rb->capacity;
+    rb->size++;
+
+    return 1;
+}
+
+size_t RingBuff_Push(RING_BUFFER *rb, const void *elements, size_t count)
+{
+    ASSERT(rb != NULL);
+    ASSERT(elements != NULL);
+
+    if (count == 0) {
+        return 0;
+    }
+
+    size_t canWrite = Get_Available2Write(rb);
+    if (canWrite == 0) {
+        return 0;
+    }
+
+    if (count > canWrite) {
+        count = canWrite;
+    }
+
+    // 计算可以一次性写入的元素数量
+    size_t endSpace = rb->capacity - rb->head;
+    const uint8_t *src = (const uint8_t*)elements;
+
+    if (count <= endSpace) {
+        // 可以一次性写入
+        uint8_t *dest = (uint8_t*)rb->buffer + (rb->head * rb->element_size);
+        memcpy(dest, src, count * rb->element_size);
+        rb->head = (rb->head + count) % rb->capacity;
+    } else {
+        // 需要分两次写入
+        uint8_t *dest1 = (uint8_t*)rb->buffer + (rb->head * rb->element_size);
+        memcpy(dest1, src, endSpace * rb->element_size);
+
+        // 写入剩余部分
+        size_t remain = count - endSpace;
+        uint8_t *dest2 = (uint8_t*)rb->buffer;
+        memcpy(dest2, src + (endSpace * rb->element_size), remain * rb->element_size);
+        rb->head = remain;
+    }
+
+    rb->size += count;
+    return count;
+}
+
+size_t RingBuff_PopElement(RING_BUFFER *rb, void *element)
+{
+    ASSERT(rb != NULL);
+    ASSERT(element != NULL);
+
+    if (RingBuff_isEmpty(rb)) {
+        return 0;
+    }
+
+    // 计算源位置的内存地址
+    uint8_t *source = (uint8_t*)rb->buffer + (rb->tail * rb->element_size);
+
+    // 复制元素
+    memcpy(element, source, rb->element_size);
+
+    // 更新尾指针
+    rb->tail = (rb->tail + 1) % rb->capacity;
+    rb->size--;
+
+    return 1;
+}
+
+size_t RingBuff_Pop(RING_BUFFER *rb, void *elements, size_t count)
+{
+    ASSERT(rb != NULL);
+    ASSERT(elements != NULL);
+
+    size_t canRead = rb->size;
+    if (canRead == 0 || count == 0) {
+        return 0;
+    }
+
+    if (count > canRead) {
+        count = canRead;
+    }
+
+    // 计算可以一次性读取的元素数量
+    size_t endSpace = rb->capacity - rb->tail;
+    uint8_t *dest = (uint8_t*)elements;
+
+    if (count <= endSpace) {
+        // 可以一次性读取
+        uint8_t *src = (uint8_t*)rb->buffer + (rb->tail * rb->element_size);
+        memcpy(dest, src, count * rb->element_size);
+        rb->tail = (rb->tail + count) % rb->capacity;
+    } else {
+        // 需要分两次读取
+        uint8_t *src1 = (uint8_t*)rb->buffer + (rb->tail * rb->element_size);
+        memcpy(dest, src1, endSpace * rb->element_size);
+
+        // 读取剩余部分
+        size_t remain = count - endSpace;
+        uint8_t *src2 = (uint8_t*)rb->buffer;
+        memcpy(dest + (endSpace * rb->element_size), src2, remain * rb->element_size);
+        rb->tail = remain;
+    }
+
+    rb->size -= count;
+    return count;
+}
+
+size_t RingBuff_PeekElement(const RING_BUFFER *rb, void *element)
+{
+    ASSERT(rb != NULL);
+    ASSERT(element != NULL);
+
+    if (RingBuff_isEmpty((RING_BUFFER*)rb)) {
+        return 0;
+    }
+
+    // 计算源位置的内存地址
+    uint8_t *source = (uint8_t*)rb->buffer + (rb->tail * rb->element_size);
+
+    // 复制元素
+    memcpy(element, source, rb->element_size);
+
+    return 1;
+}
+
+size_t RingBuff_Peek(const RING_BUFFER *rb, void *elements, size_t count)
+{
+    ASSERT(rb != NULL);
+    ASSERT(elements != NULL);
+
+    size_t canRead = ((RING_BUFFER*)rb)->size;
+    if (canRead == 0 || count == 0) {
+        return 0;
+    }
+
+    if (count > canRead) {
+        count = canRead;
+    }
+
+    // 计算可以一次性读取的元素数量
+    size_t endSpace = rb->capacity - rb->tail;
+    uint8_t *dest = (uint8_t*)elements;
+
+    if (count <= endSpace) {
+        // 可以一次性读取
+        uint8_t *src = (uint8_t*)rb->buffer + (rb->tail * rb->element_size);
+        memcpy(dest, src, count * rb->element_size);
+    } else {
+        // 需要分两次读取
+        uint8_t *src1 = (uint8_t*)rb->buffer + (rb->tail * rb->element_size);
+        memcpy(dest, src1, endSpace * rb->element_size);
+
+        // 读取剩余部分
+        size_t remain = count - endSpace;
+        uint8_t *src2 = (uint8_t*)rb->buffer;
+        memcpy(dest + (endSpace * rb->element_size), src2, remain * rb->element_size);
+    }
+
+    return count;
+}
+
+uint8_t RingBuff_GetAt(const RING_BUFFER *rb, size_t index, void *element)
+{
+    ASSERT(rb != NULL);
+    ASSERT(element != NULL);
+
+    if (index >= ((RING_BUFFER*)rb)->size) {
+        return 0;
+    }
+
+    // 计算实际索引位置
+    size_t actual_index = (rb->tail + index) % rb->capacity;
+
+    // 计算源位置的内存地址
+    uint8_t *source = (uint8_t*)rb->buffer + (actual_index * rb->element_size);
+
+    // 复制元素
+    memcpy(element, source, rb->element_size);
+
+    return 1;
+}
+
+void RingBuff_Debug(const RING_BUFFER *rb, void (*print_func)(const void *element))
+{
+    ASSERT(rb != NULL);
+    ASSERT(print_func != NULL);
+
+    printf("Ring Buffer status:\n");
+    printf("Capacity: %zu, Current Size: %zu, Element Size: %zu bytes\n",
+           rb->capacity, ((RING_BUFFER*)rb)->size, rb->element_size);
+    printf("Head Index: %zu, Tail Index: %zu\n", rb->head, rb->tail);
+
+    if (RingBuff_isEmpty((RING_BUFFER*)rb)) {
+        printf("Buffer is empty\n");
+        return;
+    }
+
+    printf("Buffer Contents:\n");
+    for (size_t i = 0; i < ((RING_BUFFER*)rb)->size; i++) {
+        size_t actual_index = (rb->tail + i) % rb->capacity;
+        void *element = (uint8_t*)rb->buffer + (actual_index * rb->element_size);
+
+        printf("[%zu]: ", i);
+        print_func(element);
+        printf("\n");
+    }
+}

dj_f1_ad9371/vitis_classic_autobuild/source/util/tables.txt

@@ -0,0 +1,231 @@
+Generating CRC table for crc8-31-lsb
+
+0x00, 0x5E, 0xBC, 0xE2, 0x61, 0x3F, 0xDD, 0x83,
+0xC2, 0x9C, 0x7E, 0x20, 0xA3, 0xFD, 0x1F, 0x41,
+0x9D, 0xC3, 0x21, 0x7F, 0xFC, 0xA2, 0x40, 0x1E,
+0x5F, 0x01, 0xE3, 0xBD, 0x3E, 0x60, 0x82, 0xDC,
+0x23, 0x7D, 0x9F, 0xC1, 0x42, 0x1C, 0xFE, 0xA0,
+0xE1, 0xBF, 0x5D, 0x03, 0x80, 0xDE, 0x3C, 0x62,
+0xBE, 0xE0, 0x02, 0x5C, 0xDF, 0x81, 0x63, 0x3D,
+0x7C, 0x22, 0xC0, 0x9E, 0x1D, 0x43, 0xA1, 0xFF,
+0x46, 0x18, 0xFA, 0xA4, 0x27, 0x79, 0x9B, 0xC5,
+0x84, 0xDA, 0x38, 0x66, 0xE5, 0xBB, 0x59, 0x07,
+0xDB, 0x85, 0x67, 0x39, 0xBA, 0xE4, 0x06, 0x58,
+0x19, 0x47, 0xA5, 0xFB, 0x78, 0x26, 0xC4, 0x9A,
+0x65, 0x3B, 0xD9, 0x87, 0x04, 0x5A, 0xB8, 0xE6,
+0xA7, 0xF9, 0x1B, 0x45, 0xC6, 0x98, 0x7A, 0x24,
+0xF8, 0xA6, 0x44, 0x1A, 0x99, 0xC7, 0x25, 0x7B,
+0x3A, 0x64, 0x86, 0xD8, 0x5B, 0x05, 0xE7, 0xB9,
+0x8C, 0xD2, 0x30, 0x6E, 0xED, 0xB3, 0x51, 0x0F,
+0x4E, 0x10, 0xF2, 0xAC, 0x2F, 0x71, 0x93, 0xCD,
+0x11, 0x4F, 0xAD, 0xF3, 0x70, 0x2E, 0xCC, 0x92,
+0xD3, 0x8D, 0x6F, 0x31, 0xB2, 0xEC, 0x0E, 0x50,
+0xAF, 0xF1, 0x13, 0x4D, 0xCE, 0x90, 0x72, 0x2C,
+0x6D, 0x33, 0xD1, 0x8F, 0x0C, 0x52, 0xB0, 0xEE,
+0x32, 0x6C, 0x8E, 0xD0, 0x53, 0x0D, 0xEF, 0xB1,
+0xF0, 0xAE, 0x4C, 0x12, 0x91, 0xCF, 0x2D, 0x73,
+0xCA, 0x94, 0x76, 0x28, 0xAB, 0xF5, 0x17, 0x49,
+0x08, 0x56, 0xB4, 0xEA, 0x69, 0x37, 0xD5, 0x8B,
+0x57, 0x09, 0xEB, 0xB5, 0x36, 0x68, 0x8A, 0xD4,
+0x95, 0xCB, 0x29, 0x77, 0xF4, 0xAA, 0x48, 0x16,
+0xE9, 0xB7, 0x55, 0x0B, 0x88, 0xD6, 0x34, 0x6A,
+0x2B, 0x75, 0x97, 0xC9, 0x4A, 0x14, 0xF6, 0xA8,
+0x74, 0x2A, 0xC8, 0x96, 0x15, 0x4B, 0xA9, 0xF7,
+0xB6, 0xE8, 0x0A, 0x54, 0xD7, 0x89, 0x6B, 0x35,
+
+
+Generating CRC table for crc8-31-msb
+
+0x00, 0x31, 0x62, 0x53, 0xC4, 0xF5, 0xA6, 0x97,
+0xB9, 0x88, 0xDB, 0xEA, 0x7D, 0x4C, 0x1F, 0x2E,
+0x43, 0x72, 0x21, 0x10, 0x87, 0xB6, 0xE5, 0xD4,
+0xFA, 0xCB, 0x98, 0xA9, 0x3E, 0x0F, 0x5C, 0x6D,
+0x86, 0xB7, 0xE4, 0xD5, 0x42, 0x73, 0x20, 0x11,
+0x3F, 0x0E, 0x5D, 0x6C, 0xFB, 0xCA, 0x99, 0xA8,
+0xC5, 0xF4, 0xA7, 0x96, 0x01, 0x30, 0x63, 0x52,
+0x7C, 0x4D, 0x1E, 0x2F, 0xB8, 0x89, 0xDA, 0xEB,
+0x3D, 0x0C, 0x5F, 0x6E, 0xF9, 0xC8, 0x9B, 0xAA,
+0x84, 0xB5, 0xE6, 0xD7, 0x40, 0x71, 0x22, 0x13,
+0x7E, 0x4F, 0x1C, 0x2D, 0xBA, 0x8B, 0xD8, 0xE9,
+0xC7, 0xF6, 0xA5, 0x94, 0x03, 0x32, 0x61, 0x50,
+0xBB, 0x8A, 0xD9, 0xE8, 0x7F, 0x4E, 0x1D, 0x2C,
+0x02, 0x33, 0x60, 0x51, 0xC6, 0xF7, 0xA4, 0x95,
+0xF8, 0xC9, 0x9A, 0xAB, 0x3C, 0x0D, 0x5E, 0x6F,
+0x41, 0x70, 0x23, 0x12, 0x85, 0xB4, 0xE7, 0xD6,
+0x7A, 0x4B, 0x18, 0x29, 0xBE, 0x8F, 0xDC, 0xED,
+0xC3, 0xF2, 0xA1, 0x90, 0x07, 0x36, 0x65, 0x54,
+0x39, 0x08, 0x5B, 0x6A, 0xFD, 0xCC, 0x9F, 0xAE,
+0x80, 0xB1, 0xE2, 0xD3, 0x44, 0x75, 0x26, 0x17,
+0xFC, 0xCD, 0x9E, 0xAF, 0x38, 0x09, 0x5A, 0x6B,
+0x45, 0x74, 0x27, 0x16, 0x81, 0xB0, 0xE3, 0xD2,
+0xBF, 0x8E, 0xDD, 0xEC, 0x7B, 0x4A, 0x19, 0x28,
+0x06, 0x37, 0x64, 0x55, 0xC2, 0xF3, 0xA0, 0x91,
+0x47, 0x76, 0x25, 0x14, 0x83, 0xB2, 0xE1, 0xD0,
+0xFE, 0xCF, 0x9C, 0xAD, 0x3A, 0x0B, 0x58, 0x69,
+0x04, 0x35, 0x66, 0x57, 0xC0, 0xF1, 0xA2, 0x93,
+0xBD, 0x8C, 0xDF, 0xEE, 0x79, 0x48, 0x1B, 0x2A,
+0xC1, 0xF0, 0xA3, 0x92, 0x05, 0x34, 0x67, 0x56,
+0x78, 0x49, 0x1A, 0x2B, 0xBC, 0x8D, 0xDE, 0xEF,
+0x82, 0xB3, 0xE0, 0xD1, 0x46, 0x77, 0x24, 0x15,
+0x3B, 0x0A, 0x59, 0x68, 0xFF, 0xCE, 0x9D, 0xAC,
+
+
+Generating CRC table for crc16-8005-lsb
+
+0x0000, 0xC0C1, 0xC181, 0x0140, 0xC301, 0x03C0, 0x0280, 0xC241,
+0xC601, 0x06C0, 0x0780, 0xC741, 0x0500, 0xC5C1, 0xC481, 0x0440,
+0xCC01, 0x0CC0, 0x0D80, 0xCD41, 0x0F00, 0xCFC1, 0xCE81, 0x0E40,
+0x0A00, 0xCAC1, 0xCB81, 0x0B40, 0xC901, 0x09C0, 0x0880, 0xC841,
+0xD801, 0x18C0, 0x1980, 0xD941, 0x1B00, 0xDBC1, 0xDA81, 0x1A40,
+0x1E00, 0xDEC1, 0xDF81, 0x1F40, 0xDD01, 0x1DC0, 0x1C80, 0xDC41,
+0x1400, 0xD4C1, 0xD581, 0x1540, 0xD701, 0x17C0, 0x1680, 0xD641,
+0xD201, 0x12C0, 0x1380, 0xD341, 0x1100, 0xD1C1, 0xD081, 0x1040,
+0xF001, 0x30C0, 0x3180, 0xF141, 0x3300, 0xF3C1, 0xF281, 0x3240,
+0x3600, 0xF6C1, 0xF781, 0x3740, 0xF501, 0x35C0, 0x3480, 0xF441,
+0x3C00, 0xFCC1, 0xFD81, 0x3D40, 0xFF01, 0x3FC0, 0x3E80, 0xFE41,
+0xFA01, 0x3AC0, 0x3B80, 0xFB41, 0x3900, 0xF9C1, 0xF881, 0x3840,
+0x2800, 0xE8C1, 0xE981, 0x2940, 0xEB01, 0x2BC0, 0x2A80, 0xEA41,
+0xEE01, 0x2EC0, 0x2F80, 0xEF41, 0x2D00, 0xEDC1, 0xEC81, 0x2C40,
+0xE401, 0x24C0, 0x2580, 0xE541, 0x2700, 0xE7C1, 0xE681, 0x2640,
+0x2200, 0xE2C1, 0xE381, 0x2340, 0xE101, 0x21C0, 0x2080, 0xE041,
+0xA001, 0x60C0, 0x6180, 0xA141, 0x6300, 0xA3C1, 0xA281, 0x6240,
+0x6600, 0xA6C1, 0xA781, 0x6740, 0xA501, 0x65C0, 0x6480, 0xA441,
+0x6C00, 0xACC1, 0xAD81, 0x6D40, 0xAF01, 0x6FC0, 0x6E80, 0xAE41,
+0xAA01, 0x6AC0, 0x6B80, 0xAB41, 0x6900, 0xA9C1, 0xA881, 0x6840,
+0x7800, 0xB8C1, 0xB981, 0x7940, 0xBB01, 0x7BC0, 0x7A80, 0xBA41,
+0xBE01, 0x7EC0, 0x7F80, 0xBF41, 0x7D00, 0xBDC1, 0xBC81, 0x7C40,
+0xB401, 0x74C0, 0x7580, 0xB541, 0x7700, 0xB7C1, 0xB681, 0x7640,
+0x7200, 0xB2C1, 0xB381, 0x7340, 0xB101, 0x71C0, 0x7080, 0xB041,
+0x5000, 0x90C1, 0x9181, 0x5140, 0x9301, 0x53C0, 0x5280, 0x9241,
+0x9601, 0x56C0, 0x5780, 0x9741, 0x5500, 0x95C1, 0x9481, 0x5440,
+0x9C01, 0x5CC0, 0x5D80, 0x9D41, 0x5F00, 0x9FC1, 0x9E81, 0x5E40,
+0x5A00, 0x9AC1, 0x9B81, 0x5B40, 0x9901, 0x59C0, 0x5880, 0x9841,
+0x8801, 0x48C0, 0x4980, 0x8941, 0x4B00, 0x8BC1, 0x8A81, 0x4A40,
+0x4E00, 0x8EC1, 0x8F81, 0x4F40, 0x8D01, 0x4DC0, 0x4C80, 0x8C41,
+0x4400, 0x84C1, 0x8581, 0x4540, 0x8701, 0x47C0, 0x4680, 0x8641,
+0x8201, 0x42C0, 0x4380, 0x8341, 0x4100, 0x81C1, 0x8081, 0x4040,
+
+
+Generating CRC table for crc16-8005-msb
+
+0x0000, 0x8005, 0x800F, 0x000A, 0x801B, 0x001E, 0x0014, 0x8011,
+0x8033, 0x0036, 0x003C, 0x8039, 0x0028, 0x802D, 0x8027, 0x0022,
+0x8063, 0x0066, 0x006C, 0x8069, 0x0078, 0x807D, 0x8077, 0x0072,
+0x0050, 0x8055, 0x805F, 0x005A, 0x804B, 0x004E, 0x0044, 0x8041,
+0x80C3, 0x00C6, 0x00CC, 0x80C9, 0x00D8, 0x80DD, 0x80D7, 0x00D2,
+0x00F0, 0x80F5, 0x80FF, 0x00FA, 0x80EB, 0x00EE, 0x00E4, 0x80E1,
+0x00A0, 0x80A5, 0x80AF, 0x00AA, 0x80BB, 0x00BE, 0x00B4, 0x80B1,
+0x8093, 0x0096, 0x009C, 0x8099, 0x0088, 0x808D, 0x8087, 0x0082,
+0x8183, 0x0186, 0x018C, 0x8189, 0x0198, 0x819D, 0x8197, 0x0192,
+0x01B0, 0x81B5, 0x81BF, 0x01BA, 0x81AB, 0x01AE, 0x01A4, 0x81A1,
+0x01E0, 0x81E5, 0x81EF, 0x01EA, 0x81FB, 0x01FE, 0x01F4, 0x81F1,
+0x81D3, 0x01D6, 0x01DC, 0x81D9, 0x01C8, 0x81CD, 0x81C7, 0x01C2,
+0x0140, 0x8145, 0x814F, 0x014A, 0x815B, 0x015E, 0x0154, 0x8151,
+0x8173, 0x0176, 0x017C, 0x8179, 0x0168, 0x816D, 0x8167, 0x0162,
+0x8123, 0x0126, 0x012C, 0x8129, 0x0138, 0x813D, 0x8137, 0x0132,
+0x0110, 0x8115, 0x811F, 0x011A, 0x810B, 0x010E, 0x0104, 0x8101,
+0x8303, 0x0306, 0x030C, 0x8309, 0x0318, 0x831D, 0x8317, 0x0312,
+0x0330, 0x8335, 0x833F, 0x033A, 0x832B, 0x032E, 0x0324, 0x8321,
+0x0360, 0x8365, 0x836F, 0x036A, 0x837B, 0x037E, 0x0374, 0x8371,
+0x8353, 0x0356, 0x035C, 0x8359, 0x0348, 0x834D, 0x8347, 0x0342,
+0x03C0, 0x83C5, 0x83CF, 0x03CA, 0x83DB, 0x03DE, 0x03D4, 0x83D1,
+0x83F3, 0x03F6, 0x03FC, 0x83F9, 0x03E8, 0x83ED, 0x83E7, 0x03E2,
+0x83A3, 0x03A6, 0x03AC, 0x83A9, 0x03B8, 0x83BD, 0x83B7, 0x03B2,
+0x0390, 0x8395, 0x839F, 0x039A, 0x838B, 0x038E, 0x0384, 0x8381,
+0x0280, 0x8285, 0x828F, 0x028A, 0x829B, 0x029E, 0x0294, 0x8291,
+0x82B3, 0x02B6, 0x02BC, 0x82B9, 0x02A8, 0x82AD, 0x82A7, 0x02A2,
+0x82E3, 0x02E6, 0x02EC, 0x82E9, 0x02F8, 0x82FD, 0x82F7, 0x02F2,
+0x02D0, 0x82D5, 0x82DF, 0x02DA, 0x82CB, 0x02CE, 0x02C4, 0x82C1,
+0x8243, 0x0246, 0x024C, 0x8249, 0x0258, 0x825D, 0x8257, 0x0252,
+0x0270, 0x8275, 0x827F, 0x027A, 0x826B, 0x026E, 0x0264, 0x8261,
+0x0220, 0x8225, 0x822F, 0x022A, 0x823B, 0x023E, 0x0234, 0x8231,
+0x8213, 0x0216, 0x021C, 0x8219, 0x0208, 0x820D, 0x8207, 0x0202,
+
+
+Generating CRC table for crc16-1021-lsb
+
+0x0000, 0x1189, 0x2312, 0x329B, 0x4624, 0x57AD, 0x6536, 0x74BF,
+0x8C48, 0x9DC1, 0xAF5A, 0xBED3, 0xCA6C, 0xDBE5, 0xE97E, 0xF8F7,
+0x1081, 0x0108, 0x3393, 0x221A, 0x56A5, 0x472C, 0x75B7, 0x643E,
+0x9CC9, 0x8D40, 0xBFDB, 0xAE52, 0xDAED, 0xCB64, 0xF9FF, 0xE876,
+0x2102, 0x308B, 0x0210, 0x1399, 0x6726, 0x76AF, 0x4434, 0x55BD,
+0xAD4A, 0xBCC3, 0x8E58, 0x9FD1, 0xEB6E, 0xFAE7, 0xC87C, 0xD9F5,
+0x3183, 0x200A, 0x1291, 0x0318, 0x77A7, 0x662E, 0x54B5, 0x453C,
+0xBDCB, 0xAC42, 0x9ED9, 0x8F50, 0xFBEF, 0xEA66, 0xD8FD, 0xC974,
+0x4204, 0x538D, 0x6116, 0x709F, 0x0420, 0x15A9, 0x2732, 0x36BB,
+0xCE4C, 0xDFC5, 0xED5E, 0xFCD7, 0x8868, 0x99E1, 0xAB7A, 0xBAF3,
+0x5285, 0x430C, 0x7197, 0x601E, 0x14A1, 0x0528, 0x37B3, 0x263A,
+0xDECD, 0xCF44, 0xFDDF, 0xEC56, 0x98E9, 0x8960, 0xBBFB, 0xAA72,
+0x6306, 0x728F, 0x4014, 0x519D, 0x2522, 0x34AB, 0x0630, 0x17B9,
+0xEF4E, 0xFEC7, 0xCC5C, 0xDDD5, 0xA96A, 0xB8E3, 0x8A78, 0x9BF1,
+0x7387, 0x620E, 0x5095, 0x411C, 0x35A3, 0x242A, 0x16B1, 0x0738,
+0xFFCF, 0xEE46, 0xDCDD, 0xCD54, 0xB9EB, 0xA862, 0x9AF9, 0x8B70,
+0x8408, 0x9581, 0xA71A, 0xB693, 0xC22C, 0xD3A5, 0xE13E, 0xF0B7,
+0x0840, 0x19C9, 0x2B52, 0x3ADB, 0x4E64, 0x5FED, 0x6D76, 0x7CFF,
+0x9489, 0x8500, 0xB79B, 0xA612, 0xD2AD, 0xC324, 0xF1BF, 0xE036,
+0x18C1, 0x0948, 0x3BD3, 0x2A5A, 0x5EE5, 0x4F6C, 0x7DF7, 0x6C7E,
+0xA50A, 0xB483, 0x8618, 0x9791, 0xE32E, 0xF2A7, 0xC03C, 0xD1B5,
+0x2942, 0x38CB, 0x0A50, 0x1BD9, 0x6F66, 0x7EEF, 0x4C74, 0x5DFD,
+0xB58B, 0xA402, 0x9699, 0x8710, 0xF3AF, 0xE226, 0xD0BD, 0xC134,
+0x39C3, 0x284A, 0x1AD1, 0x0B58, 0x7FE7, 0x6E6E, 0x5CF5, 0x4D7C,
+0xC60C, 0xD785, 0xE51E, 0xF497, 0x8028, 0x91A1, 0xA33A, 0xB2B3,
+0x4A44, 0x5BCD, 0x6956, 0x78DF, 0x0C60, 0x1DE9, 0x2F72, 0x3EFB,
+0xD68D, 0xC704, 0xF59F, 0xE416, 0x90A9, 0x8120, 0xB3BB, 0xA232,
+0x5AC5, 0x4B4C, 0x79D7, 0x685E, 0x1CE1, 0x0D68, 0x3FF3, 0x2E7A,
+0xE70E, 0xF687, 0xC41C, 0xD595, 0xA12A, 0xB0A3, 0x8238, 0x93B1,
+0x6B46, 0x7ACF, 0x4854, 0x59DD, 0x2D62, 0x3CEB, 0x0E70, 0x1FF9,
+0xF78F, 0xE606, 0xD49D, 0xC514, 0xB1AB, 0xA022, 0x92B9, 0x8330,
+0x7BC7, 0x6A4E, 0x58D5, 0x495C, 0x3DE3, 0x2C6A, 0x1EF1, 0x0F78,
+
+
+Generating CRC table for crc16-1021-msb
+
+0x0000, 0x1021, 0x2042, 0x3063, 0x4084, 0x50A5, 0x60C6, 0x70E7,
+0x8108, 0x9129, 0xA14A, 0xB16B, 0xC18C, 0xD1AD, 0xE1CE, 0xF1EF,
+0x1231, 0x0210, 0x3273, 0x2252, 0x52B5, 0x4294, 0x72F7, 0x62D6,
+0x9339, 0x8318, 0xB37B, 0xA35A, 0xD3BD, 0xC39C, 0xF3FF, 0xE3DE,
+0x2462, 0x3443, 0x0420, 0x1401, 0x64E6, 0x74C7, 0x44A4, 0x5485,
+0xA56A, 0xB54B, 0x8528, 0x9509, 0xE5EE, 0xF5CF, 0xC5AC, 0xD58D,
+0x3653, 0x2672, 0x1611, 0x0630, 0x76D7, 0x66F6, 0x5695, 0x46B4,
+0xB75B, 0xA77A, 0x9719, 0x8738, 0xF7DF, 0xE7FE, 0xD79D, 0xC7BC,
+0x48C4, 0x58E5, 0x6886, 0x78A7, 0x0840, 0x1861, 0x2802, 0x3823,
+0xC9CC, 0xD9ED, 0xE98E, 0xF9AF, 0x8948, 0x9969, 0xA90A, 0xB92B,
+0x5AF5, 0x4AD4, 0x7AB7, 0x6A96, 0x1A71, 0x0A50, 0x3A33, 0x2A12,
+0xDBFD, 0xCBDC, 0xFBBF, 0xEB9E, 0x9B79, 0x8B58, 0xBB3B, 0xAB1A,
+0x6CA6, 0x7C87, 0x4CE4, 0x5CC5, 0x2C22, 0x3C03, 0x0C60, 0x1C41,
+0xEDAE, 0xFD8F, 0xCDEC, 0xDDCD, 0xAD2A, 0xBD0B, 0x8D68, 0x9D49,
+0x7E97, 0x6EB6, 0x5ED5, 0x4EF4, 0x3E13, 0x2E32, 0x1E51, 0x0E70,
+0xFF9F, 0xEFBE, 0xDFDD, 0xCFFC, 0xBF1B, 0xAF3A, 0x9F59, 0x8F78,
+0x9188, 0x81A9, 0xB1CA, 0xA1EB, 0xD10C, 0xC12D, 0xF14E, 0xE16F,
+0x1080, 0x00A1, 0x30C2, 0x20E3, 0x5004, 0x4025, 0x7046, 0x6067,
+0x83B9, 0x9398, 0xA3FB, 0xB3DA, 0xC33D, 0xD31C, 0xE37F, 0xF35E,
+0x02B1, 0x1290, 0x22F3, 0x32D2, 0x4235, 0x5214, 0x6277, 0x7256,
+0xB5EA, 0xA5CB, 0x95A8, 0x8589, 0xF56E, 0xE54F, 0xD52C, 0xC50D,
+0x34E2, 0x24C3, 0x14A0, 0x0481, 0x7466, 0x6447, 0x5424, 0x4405,
+0xA7DB, 0xB7FA, 0x8799, 0x97B8, 0xE75F, 0xF77E, 0xC71D, 0xD73C,
+0x26D3, 0x36F2, 0x0691, 0x16B0, 0x6657, 0x7676, 0x4615, 0x5634,
+0xD94C, 0xC96D, 0xF90E, 0xE92F, 0x99C8, 0x89E9, 0xB98A, 0xA9AB,
+0x5844, 0x4865, 0x7806, 0x6827, 0x18C0, 0x08E1, 0x3882, 0x28A3,
+0xCB7D, 0xDB5C, 0xEB3F, 0xFB1E, 0x8BF9, 0x9BD8, 0xABBB, 0xBB9A,
+0x4A75, 0x5A54, 0x6A37, 0x7A16, 0x0AF1, 0x1AD0, 0x2AB3, 0x3A92,
+0xFD2E, 0xED0F, 0xDD6C, 0xCD4D, 0xBDAA, 0xAD8B, 0x9DE8, 0x8DC9,
+0x7C26, 0x6C07, 0x5C64, 0x4C45, 0x3CA2, 0x2C83, 0x1CE0, 0x0CC1,
+0xEF1F, 0xFF3E, 0xCF5D, 0xDF7C, 0xAF9B, 0xBFBA, 0x8FD9, 0x9FF8,
+0x6E17, 0x7E36, 0x4E55, 0x5E74, 0x2E93, 0x3EB2, 0x0ED1, 0x1EF0,
+
+
+
+#define CRC_BIT_NUM 8u/16u/32u/64u
+#define BITS_IN_BYTE 8u
+uint8_t dataBuff[ARRAY_SIZE] = { 0x32, 0x33, ...;
+uint8_t/uint16_t/uint32_t crc_val = 0x0;
+// LSB
+for(int i = 0; i < sizeof(dataBuff); i++)
+{
+    crc_val = (crc_val >> BITS_IN_BYTE) ^ crc_lsb_lut[(uint8)(crc_val^dataBuff[i])];
+}
+// MSB
+for(int i = 0; i < sizeof(dataBuff); i++)
+{
+    crc_val = (crc_val << BITS_IN_BYTE) ^ crc_msb_lut[(uint8)((crc_val>>8)^dataBuff[i])];
+}

dj_f1_ad9371/vitis_classic_autobuild/source/util/util.c

@@ -0,0 +1,306 @@
+#include <string.h>
+#include <stdlib.h>
+#include "util.h"
+#include "error.h"
+
+#ifdef __BITSWAP_TABLE
+static uint8_t byte_flipLR[256] =
+{
+	0x00, 0x80, 0x40, 0xC0, 0x20, 0xA0, 0x60, 0xE0,
+	0x10, 0x90, 0x50, 0xD0, 0x30, 0xB0, 0x70, 0xF0,
+	0x08, 0x88, 0x48, 0xC8, 0x28, 0xA8, 0x68, 0xE8,
+	0x18, 0x98, 0x58, 0xD8, 0x38, 0xB8, 0x78, 0xF8,
+	0x04, 0x84, 0x44, 0xC4, 0x24, 0xA4, 0x64, 0xE4,
+	0x14, 0x94, 0x54, 0xD4, 0x34, 0xB4, 0x74, 0xF4,
+	0x0C, 0x8C, 0x4C, 0xCC, 0x2C, 0xAC, 0x6C, 0xEC,
+	0x1C, 0x9C, 0x5C, 0xDC, 0x3C, 0xBC, 0x7C, 0xFC,
+	0x02, 0x82, 0x42, 0xC2, 0x22, 0xA2, 0x62, 0xE2,
+	0x12, 0x92, 0x52, 0xD2, 0x32, 0xB2, 0x72, 0xF2,
+	0x0A, 0x8A, 0x4A, 0xCA, 0x2A, 0xAA, 0x6A, 0xEA,
+	0x1A, 0x9A, 0x5A, 0xDA, 0x3A, 0xBA, 0x7A, 0xFA,
+	0x06, 0x86, 0x46, 0xC6, 0x26, 0xA6, 0x66, 0xE6,
+	0x16, 0x96, 0x56, 0xD6, 0x36, 0xB6, 0x76, 0xF6,
+	0x0E, 0x8E, 0x4E, 0xCE, 0x2E, 0xAE, 0x6E, 0xEE,
+	0x1E, 0x9E, 0x5E, 0xDE, 0x3E, 0xBE, 0x7E, 0xFE,
+	0x01, 0x81, 0x41, 0xC1, 0x21, 0xA1, 0x61, 0xE1,
+	0x11, 0x91, 0x51, 0xD1, 0x31, 0xB1, 0x71, 0xF1,
+	0x09, 0x89, 0x49, 0xC9, 0x29, 0xA9, 0x69, 0xE9,
+	0x19, 0x99, 0x59, 0xD9, 0x39, 0xB9, 0x79, 0xF9,
+	0x05, 0x85, 0x45, 0xC5, 0x25, 0xA5, 0x65, 0xE5,
+	0x15, 0x95, 0x55, 0xD5, 0x35, 0xB5, 0x75, 0xF5,
+	0x0D, 0x8D, 0x4D, 0xCD, 0x2D, 0xAD, 0x6D, 0xED,
+	0x1D, 0x9D, 0x5D, 0xDD, 0x3D, 0xBD, 0x7D, 0xFD,
+	0x03, 0x83, 0x43, 0xC3, 0x23, 0xA3, 0x63, 0xE3,
+	0x13, 0x93, 0x53, 0xD3, 0x33, 0xB3, 0x73, 0xF3,
+	0x0B, 0x8B, 0x4B, 0xCB, 0x2B, 0xAB, 0x6B, 0xEB,
+	0x1B, 0x9B, 0x5B, 0xDB, 0x3B, 0xBB, 0x7B, 0xFB,
+	0x07, 0x87, 0x47, 0xC7, 0x27, 0xA7, 0x67, 0xE7,
+	0x17, 0x97, 0x57, 0xD7, 0x37, 0xB7, 0x77, 0xF7,
+	0x0F, 0x8F, 0x4F, 0xCF, 0x2F, 0xAF, 0x6F, 0xEF,
+	0x1F, 0x9F, 0x5F, 0xDF, 0x3F, 0xBF, 0x7F, 0xFF
+};
+#endif
+
+inline void IO_Out32(uintptr_t addr, uint32_t value)
+{
+	volatile uint32_t *localAddr = (volatile uint32_t *)addr;
+	*localAddr = value;
+}
+
+inline uint32_t IO_In32(uintptr_t addr)
+{
+	return *(volatile uint32_t *)addr;
+}
+
+uint8_t byte_bit_swap(uint8_t byte)
+{
+#ifdef __BITSWAP_TABLE
+	return byte_flipLR[byte];
+#else
+	return bit_swap_constant_8(byte);
+#endif
+}
+
+uint32_t word_bit_swap(uint32_t word)
+{
+#ifdef __BITSWAP_TABLE
+	uint32_t rv_word = (byte_flipLR[word & 0xff] << 24) |
+					   (byte_flipLR[(word >> 8) & 0xff] << 16) |
+					   (byte_flipLR[(word >> 16) & 0xff] << 8) |
+					   (byte_flipLR[(word >> 24) & 0xff]);
+	return rv_word;
+#else
+	word = (((word & 0xaaaaaaaa) >> 1) | ((word & 0x55555555) << 1));
+	word = (((word & 0xcccccccc) >> 2) | ((word & 0x33333333) << 2));
+	word = (((word & 0xf0f0f0f0) >> 4) | ((word & 0x0f0f0f0f) << 4));
+	word = (((word & 0xff00ff00) >> 8) | ((word & 0x00ff00ff) << 8));
+	return ((word >> 16) | (word << 16));
+#endif
+}
+
+uint32_t count_ones(uint32_t word)
+{
+#ifdef __GNUC__
+	return __builtin_popcount(word);
+#else
+	uint32_t one_count = 0;
+	while (word)
+	{
+		if (word & 0x00000001)
+			one_count++;
+		word >>= 1;
+	}
+	return one_count;
+#endif
+}
+
+double fix2double(int32_t val, uint8_t frac_bits)
+{
+	return (((double)val) / (BIT(frac_bits)));
+}
+
+uint32_t find_first_set_bit(uint32_t word)
+{
+#ifdef __GNUC__
+	if (word != 0)
+	{
+		return __builtin_ctz(word);
+	}
+	else
+	{
+		return 32;
+	}
+#else
+	uint32_t first_set_bit = 0;
+
+	while (word)
+	{
+		if (word & 0x1)
+			return first_set_bit;
+		word >>= 1;
+		first_set_bit++;
+	}
+
+	return 32;
+#endif
+}
+
+uint32_t find_last_set_bit(uint32_t word)
+{
+#ifdef __GNUC__
+	if (word != 0)
+	{
+		return (31 - __builtin_clz(word));
+	}
+	else
+	{
+		return 32;
+	}
+#else
+	uint32_t bit = 0;
+	uint32_t last_set_bit = 32;
+
+	while (word)
+	{
+		if (word & 0x1)
+			last_set_bit = bit;
+		word >>= 1;
+		bit++;
+	}
+
+	return last_set_bit;
+#endif
+}
+
+uint32_t find_closest(int32_t val,
+					  const int32_t *array,
+					  uint32_t size)
+{
+	int32_t diff = abs(array[0] - val);
+	uint32_t ret = 0;
+	uint32_t i;
+
+	for (i = 1; i < size; i++)
+	{
+		if (abs(array[i] - val) < diff)
+		{
+			diff = abs(array[i] - val);
+			ret = i;
+		}
+	}
+
+	return ret;
+}
+
+uint32_t field_prep(uint32_t mask, uint32_t val)
+{
+	return (val << find_first_set_bit(mask)) & mask;
+}
+
+uint32_t field_get(uint32_t mask, uint32_t word)
+{
+	return (word & mask) >> find_first_set_bit(mask);
+}
+
+int32_t log_base_2(uint32_t x)
+{
+	return find_last_set_bit(x);
+}
+
+uint32_t greatest_common_divisor(uint32_t a,
+								 uint32_t b)
+{
+	uint32_t div;
+	uint32_t common_div = 1;
+
+	if ((a == 0) || (b == 0))
+		return max(a, b);
+
+	for (div = 1; (div <= a) && (div <= b); div++)
+		if (!(a % div) && !(b % div))
+			common_div = div;
+
+	return common_div;
+}
+
+void rational_best_approximation(uint32_t given_numerator,
+								 uint32_t given_denominator,
+								 uint32_t max_numerator,
+								 uint32_t max_denominator,
+								 uint32_t *best_numerator,
+								 uint32_t *best_denominator)
+{
+	uint32_t gcd;
+
+	gcd = greatest_common_divisor(given_numerator, given_denominator);
+
+	*best_numerator = given_numerator / gcd;
+	*best_denominator = given_denominator / gcd;
+
+	if ((*best_numerator > max_numerator) ||
+		(*best_denominator > max_denominator))
+	{
+		*best_numerator = 0;
+		*best_denominator = 0;
+	}
+}
+
+uint32_t hweight8(uint32_t word)
+{
+	uint32_t count = 0;
+
+	while (word)
+	{
+		if (word & 0x1)
+			count++;
+		word >>= 1;
+	}
+
+	return count;
+}
+
+uint64_t do_div(uint64_t *n,
+				uint64_t base)
+{
+	uint64_t mod = 0;
+
+	mod = *n % base;
+	*n = *n / base;
+
+	return mod;
+}
+
+uint64_t div64_u64_rem(uint64_t dividend, uint64_t divisor, uint64_t *remainder)
+{
+	*remainder = dividend % divisor;
+
+	return dividend / divisor;
+}
+
+uint64_t div_u64_rem(uint64_t dividend, uint32_t divisor, uint32_t *remainder)
+{
+	*remainder = do_div(&dividend, divisor);
+
+	return dividend;
+}
+
+int64_t div_s64_rem(int64_t dividend, int32_t divisor, int32_t *remainder)
+{
+	*remainder = dividend % divisor;
+	return dividend / divisor;
+}
+
+uint64_t div_u64(uint64_t dividend, uint32_t divisor)
+{
+	uint32_t remainder;
+
+	return div_u64_rem(dividend, divisor, &remainder);
+}
+
+int64_t div_s64(int64_t dividend, int32_t divisor)
+{
+	int32_t remainder;
+	return div_s64_rem(dividend, divisor, &remainder);
+}
+
+int32_t str_to_int32(const char *str)
+{
+	char *end;
+	int32_t value = strtol(str, &end, 0);
+
+	if (end == str)
+		return FAILURE;
+	else
+		return value;
+}
+
+uint32_t srt_to_uint32(const char *str)
+{
+	char *end;
+	uint32_t value = strtoul(str, &end, 0);
+
+	if (end == str)
+		return FAILURE;
+	else
+		return value;
+}