feat: 新增9371地检驱动工程, 9371自收发正常
This commit is contained in:
@@ -0,0 +1,11 @@
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<?xml version="1.0" encoding="UTF-8"?>
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<spirit:busDefinition xmlns:xilinx="http://www.xilinx.com" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
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||||
<spirit:vendor>analog.com</spirit:vendor>
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||||
<spirit:library>interface</spirit:library>
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||||
<spirit:name>spi_engine</spirit:name>
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||||
<spirit:version>1.0</spirit:version>
|
||||
<spirit:directConnection>false</spirit:directConnection>
|
||||
<spirit:isAddressable>false</spirit:isAddressable>
|
||||
<spirit:maxMasters>1</spirit:maxMasters>
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||||
<spirit:maxSlaves>1</spirit:maxSlaves>
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||||
</spirit:busDefinition>
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||||
@@ -0,0 +1,11 @@
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<?xml version="1.0" encoding="UTF-8"?>
|
||||
<spirit:busDefinition xmlns:xilinx="http://www.xilinx.com" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
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||||
<spirit:vendor>analog.com</spirit:vendor>
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||||
<spirit:library>interface</spirit:library>
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||||
<spirit:name>spi_engine_ctrl</spirit:name>
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||||
<spirit:version>1.0</spirit:version>
|
||||
<spirit:directConnection>false</spirit:directConnection>
|
||||
<spirit:isAddressable>false</spirit:isAddressable>
|
||||
<spirit:maxMasters>1</spirit:maxMasters>
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||||
<spirit:maxSlaves>1</spirit:maxSlaves>
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||||
</spirit:busDefinition>
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@@ -0,0 +1,174 @@
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<?xml version="1.0" encoding="UTF-8"?>
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<spirit:abstractionDefinition xmlns:xilinx="http://www.xilinx.com" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
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||||
<spirit:vendor>analog.com</spirit:vendor>
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||||
<spirit:library>interface</spirit:library>
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||||
<spirit:name>spi_engine_ctrl_rtl</spirit:name>
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<spirit:version>1.0</spirit:version>
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||||
<spirit:busType spirit:vendor="analog.com" spirit:library="interface" spirit:name="spi_engine_ctrl" spirit:version="1.0"/>
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<spirit:ports>
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<spirit:port>
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<spirit:logicalName>cmd_ready</spirit:logicalName>
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<spirit:wire>
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||||
<spirit:onMaster>
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||||
<spirit:presence>required</spirit:presence>
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||||
<spirit:width>1</spirit:width>
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||||
<spirit:direction>in</spirit:direction>
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</spirit:onMaster>
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||||
<spirit:onSlave>
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||||
<spirit:presence>required</spirit:presence>
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||||
<spirit:width>1</spirit:width>
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</spirit:onSlave>
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</spirit:wire>
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||||
</spirit:port>
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<spirit:port>
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<spirit:logicalName>cmd_valid</spirit:logicalName>
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<spirit:wire>
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<spirit:onMaster>
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<spirit:presence>required</spirit:presence>
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||||
<spirit:width>1</spirit:width>
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</spirit:onMaster>
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||||
<spirit:onSlave>
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<spirit:presence>required</spirit:presence>
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<spirit:width>1</spirit:width>
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<spirit:direction>in</spirit:direction>
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</spirit:onSlave>
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</spirit:wire>
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</spirit:port>
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<spirit:port>
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<spirit:logicalName>cmd_data</spirit:logicalName>
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<spirit:wire>
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<spirit:onMaster>
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<spirit:presence>required</spirit:presence>
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||||
<spirit:width>16</spirit:width>
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</spirit:onMaster>
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||||
<spirit:onSlave>
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||||
<spirit:presence>required</spirit:presence>
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<spirit:width>16</spirit:width>
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||||
<spirit:direction>in</spirit:direction>
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||||
</spirit:onSlave>
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||||
</spirit:wire>
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||||
</spirit:port>
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||||
<spirit:port>
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<spirit:logicalName>sdo_ready</spirit:logicalName>
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||||
<spirit:wire>
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||||
<spirit:onMaster>
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||||
<spirit:presence>required</spirit:presence>
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||||
<spirit:width>1</spirit:width>
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||||
<spirit:direction>in</spirit:direction>
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||||
</spirit:onMaster>
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||||
<spirit:onSlave>
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||||
<spirit:presence>required</spirit:presence>
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||||
<spirit:width>1</spirit:width>
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||||
</spirit:onSlave>
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||||
</spirit:wire>
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||||
</spirit:port>
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||||
<spirit:port>
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||||
<spirit:logicalName>sdo_valid</spirit:logicalName>
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||||
<spirit:wire>
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||||
<spirit:onMaster>
|
||||
<spirit:presence>required</spirit:presence>
|
||||
<spirit:width>1</spirit:width>
|
||||
</spirit:onMaster>
|
||||
<spirit:onSlave>
|
||||
<spirit:presence>required</spirit:presence>
|
||||
<spirit:width>1</spirit:width>
|
||||
<spirit:direction>in</spirit:direction>
|
||||
</spirit:onSlave>
|
||||
</spirit:wire>
|
||||
</spirit:port>
|
||||
<spirit:port>
|
||||
<spirit:logicalName>sdo_data</spirit:logicalName>
|
||||
<spirit:wire>
|
||||
<spirit:onMaster>
|
||||
<spirit:presence>required</spirit:presence>
|
||||
</spirit:onMaster>
|
||||
<spirit:onSlave>
|
||||
<spirit:presence>required</spirit:presence>
|
||||
<spirit:direction>in</spirit:direction>
|
||||
</spirit:onSlave>
|
||||
</spirit:wire>
|
||||
</spirit:port>
|
||||
<spirit:port>
|
||||
<spirit:logicalName>sdi_ready</spirit:logicalName>
|
||||
<spirit:wire>
|
||||
<spirit:onMaster>
|
||||
<spirit:presence>required</spirit:presence>
|
||||
<spirit:width>1</spirit:width>
|
||||
</spirit:onMaster>
|
||||
<spirit:onSlave>
|
||||
<spirit:presence>required</spirit:presence>
|
||||
<spirit:width>1</spirit:width>
|
||||
<spirit:direction>in</spirit:direction>
|
||||
</spirit:onSlave>
|
||||
</spirit:wire>
|
||||
</spirit:port>
|
||||
<spirit:port>
|
||||
<spirit:logicalName>sdi_valid</spirit:logicalName>
|
||||
<spirit:wire>
|
||||
<spirit:onMaster>
|
||||
<spirit:presence>required</spirit:presence>
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||||
<spirit:width>1</spirit:width>
|
||||
<spirit:direction>in</spirit:direction>
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||||
</spirit:onMaster>
|
||||
<spirit:onSlave>
|
||||
<spirit:presence>required</spirit:presence>
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||||
<spirit:width>1</spirit:width>
|
||||
</spirit:onSlave>
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||||
</spirit:wire>
|
||||
</spirit:port>
|
||||
<spirit:port>
|
||||
<spirit:logicalName>sdi_data</spirit:logicalName>
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||||
<spirit:wire>
|
||||
<spirit:onMaster>
|
||||
<spirit:presence>required</spirit:presence>
|
||||
<spirit:direction>in</spirit:direction>
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||||
</spirit:onMaster>
|
||||
<spirit:onSlave>
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||||
<spirit:presence>required</spirit:presence>
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||||
</spirit:onSlave>
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||||
</spirit:wire>
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||||
</spirit:port>
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||||
<spirit:port>
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||||
<spirit:logicalName>sync_ready</spirit:logicalName>
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||||
<spirit:wire>
|
||||
<spirit:onMaster>
|
||||
<spirit:presence>required</spirit:presence>
|
||||
<spirit:width>1</spirit:width>
|
||||
</spirit:onMaster>
|
||||
<spirit:onSlave>
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||||
<spirit:presence>required</spirit:presence>
|
||||
<spirit:width>1</spirit:width>
|
||||
<spirit:direction>in</spirit:direction>
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||||
</spirit:onSlave>
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||||
</spirit:wire>
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||||
</spirit:port>
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||||
<spirit:port>
|
||||
<spirit:logicalName>sync_valid</spirit:logicalName>
|
||||
<spirit:wire>
|
||||
<spirit:onMaster>
|
||||
<spirit:presence>required</spirit:presence>
|
||||
<spirit:width>1</spirit:width>
|
||||
<spirit:direction>in</spirit:direction>
|
||||
</spirit:onMaster>
|
||||
<spirit:onSlave>
|
||||
<spirit:presence>required</spirit:presence>
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||||
<spirit:width>1</spirit:width>
|
||||
</spirit:onSlave>
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||||
</spirit:wire>
|
||||
</spirit:port>
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||||
<spirit:port>
|
||||
<spirit:logicalName>sync_data</spirit:logicalName>
|
||||
<spirit:wire>
|
||||
<spirit:onMaster>
|
||||
<spirit:presence>required</spirit:presence>
|
||||
<spirit:width>8</spirit:width>
|
||||
<spirit:direction>in</spirit:direction>
|
||||
</spirit:onMaster>
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||||
<spirit:onSlave>
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||||
<spirit:presence>required</spirit:presence>
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||||
<spirit:width>8</spirit:width>
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||||
</spirit:onSlave>
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||||
</spirit:wire>
|
||||
</spirit:port>
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||||
</spirit:ports>
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||||
</spirit:abstractionDefinition>
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||||
@@ -0,0 +1,100 @@
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// (c) Copyright 1986-2022 Xilinx, Inc. All Rights Reserved.
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// (c) Copyright 2022-2025 Advanced Micro Devices, Inc. All rights reserved.
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//
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// This file contains confidential and proprietary information
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// of AMD and is protected under U.S. and international copyright
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// and other intellectual property laws.
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//
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// DISCLAIMER
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||||
// This disclaimer is not a license and does not grant any
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||||
// rights to the materials distributed herewith. Except as
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||||
// otherwise provided in a valid license issued to you by
|
||||
// AMD, and to the maximum extent permitted by applicable
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||||
// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
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||||
// WITH ALL FAULTS, AND AMD HEREBY DISCLAIMS ALL WARRANTIES
|
||||
// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
|
||||
// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
|
||||
// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
|
||||
// (2) AMD shall not be liable (whether in contract or tort,
|
||||
// including negligence, or under any other theory of
|
||||
// liability) for any loss or damage of any kind or nature
|
||||
// related to, arising under or in connection with these
|
||||
// materials, including for any direct, or any indirect,
|
||||
// special, incidental, or consequential loss or damage
|
||||
// (including loss of data, profits, goodwill, or any type of
|
||||
// loss or damage suffered as a result of any action brought
|
||||
// by a third party) even if such damage or loss was
|
||||
// reasonably foreseeable or AMD had been advised of the
|
||||
// possibility of the same.
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||||
//
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||||
// CRITICAL APPLICATIONS
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||||
// AMD products are not designed or intended to be fail-
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||||
// safe, or for use in any application requiring fail-safe
|
||||
// performance, such as life-support or safety devices or
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||||
// systems, Class III medical devices, nuclear facilities,
|
||||
// applications related to the deployment of airbags, or any
|
||||
// other applications that could lead to death, personal
|
||||
// injury, or severe property or environmental damage
|
||||
// (individually and collectively, "Critical
|
||||
// Applications"). Customer assumes the sole risk and
|
||||
// liability of any use of AMD products in Critical
|
||||
// Applications, subject only to applicable laws and
|
||||
// regulations governing limitations on product liability.
|
||||
//
|
||||
// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
|
||||
// PART OF THIS FILE AT ALL TIMES.
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//
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// DO NOT MODIFY THIS FILE.
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`ifndef spi_engine_ctrl_v1_0
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`define spi_engine_ctrl_v1_0
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package parameter_structs;
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typedef struct packed {
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bit portEnabled;
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integer portWidth;
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}portConfig;
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typedef struct packed {
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// <typeName> <LogicalName> = {<enablement>, <width>}
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portConfig sdo_data;
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portConfig sdi_data;
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}spi_engine_ctrl_v1_0_port_configuration;
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parameter spi_engine_ctrl_v1_0_port_configuration spi_engine_ctrl_v1_0_default_port_configuration = '{sdo_data:'{1, -1}, sdi_data:'{1, -1}};
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endpackage
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interface spi_engine_ctrl_v1_0 #(parameter_structs::spi_engine_ctrl_v1_0_port_configuration port_configuration)();
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logic cmd_ready; //
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logic cmd_valid; //
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logic [15:0] cmd_data; //
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logic sdo_ready; //
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logic sdo_valid; //
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logic [port_configuration.sdo_data.portWidth-1:0] sdo_data; //
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logic sdi_ready; //
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logic sdi_valid; //
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logic [port_configuration.sdi_data.portWidth-1:0] sdi_data; //
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logic sync_ready; //
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logic sync_valid; //
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logic [7:0] sync_data; //
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modport MASTER (
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input cmd_ready, sdo_ready, sdi_valid, sdi_data, sync_valid, sync_data,
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output cmd_valid, cmd_data, sdo_valid, sdo_data, sdi_ready, sync_ready
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);
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modport SLAVE (
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input cmd_valid, cmd_data, sdo_valid, sdo_data, sdi_ready, sync_ready,
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output cmd_ready, sdo_ready, sdi_valid, sdi_data, sync_valid, sync_data
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);
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modport MONITOR (
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input cmd_ready, cmd_valid, cmd_data, sdo_ready, sdo_valid, sdo_data, sdi_ready, sdi_valid, sdi_data, sync_ready, sync_valid, sync_data
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);
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endinterface // spi_engine_ctrl_v1_0
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`endif
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@@ -0,0 +1,11 @@
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<?xml version="1.0" encoding="UTF-8"?>
|
||||
<spirit:busDefinition xmlns:xilinx="http://www.xilinx.com" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
|
||||
<spirit:vendor>analog.com</spirit:vendor>
|
||||
<spirit:library>interface</spirit:library>
|
||||
<spirit:name>spi_engine_offload_ctrl</spirit:name>
|
||||
<spirit:version>1.0</spirit:version>
|
||||
<spirit:directConnection>false</spirit:directConnection>
|
||||
<spirit:isAddressable>false</spirit:isAddressable>
|
||||
<spirit:maxMasters>1</spirit:maxMasters>
|
||||
<spirit:maxSlaves>1</spirit:maxSlaves>
|
||||
</spirit:busDefinition>
|
||||
@@ -0,0 +1,148 @@
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<?xml version="1.0" encoding="UTF-8"?>
|
||||
<spirit:abstractionDefinition xmlns:xilinx="http://www.xilinx.com" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
|
||||
<spirit:vendor>analog.com</spirit:vendor>
|
||||
<spirit:library>interface</spirit:library>
|
||||
<spirit:name>spi_engine_offload_ctrl_rtl</spirit:name>
|
||||
<spirit:version>1.0</spirit:version>
|
||||
<spirit:busType spirit:vendor="analog.com" spirit:library="interface" spirit:name="spi_engine_offload_ctrl" spirit:version="1.0"/>
|
||||
<spirit:ports>
|
||||
<spirit:port>
|
||||
<spirit:logicalName>cmd_wr_en</spirit:logicalName>
|
||||
<spirit:wire>
|
||||
<spirit:onMaster>
|
||||
<spirit:presence>required</spirit:presence>
|
||||
<spirit:width>1</spirit:width>
|
||||
</spirit:onMaster>
|
||||
<spirit:onSlave>
|
||||
<spirit:presence>required</spirit:presence>
|
||||
<spirit:width>1</spirit:width>
|
||||
<spirit:direction>in</spirit:direction>
|
||||
</spirit:onSlave>
|
||||
</spirit:wire>
|
||||
</spirit:port>
|
||||
<spirit:port>
|
||||
<spirit:logicalName>cmd_wr_data</spirit:logicalName>
|
||||
<spirit:wire>
|
||||
<spirit:onMaster>
|
||||
<spirit:presence>required</spirit:presence>
|
||||
<spirit:width>16</spirit:width>
|
||||
</spirit:onMaster>
|
||||
<spirit:onSlave>
|
||||
<spirit:presence>required</spirit:presence>
|
||||
<spirit:width>16</spirit:width>
|
||||
<spirit:direction>in</spirit:direction>
|
||||
</spirit:onSlave>
|
||||
</spirit:wire>
|
||||
</spirit:port>
|
||||
<spirit:port>
|
||||
<spirit:logicalName>sdo_wr_en</spirit:logicalName>
|
||||
<spirit:wire>
|
||||
<spirit:onMaster>
|
||||
<spirit:presence>required</spirit:presence>
|
||||
<spirit:width>1</spirit:width>
|
||||
</spirit:onMaster>
|
||||
<spirit:onSlave>
|
||||
<spirit:presence>required</spirit:presence>
|
||||
<spirit:width>1</spirit:width>
|
||||
<spirit:direction>in</spirit:direction>
|
||||
</spirit:onSlave>
|
||||
</spirit:wire>
|
||||
</spirit:port>
|
||||
<spirit:port>
|
||||
<spirit:logicalName>sdo_wr_data</spirit:logicalName>
|
||||
<spirit:wire>
|
||||
<spirit:onMaster>
|
||||
<spirit:presence>required</spirit:presence>
|
||||
</spirit:onMaster>
|
||||
<spirit:onSlave>
|
||||
<spirit:presence>required</spirit:presence>
|
||||
<spirit:direction>in</spirit:direction>
|
||||
</spirit:onSlave>
|
||||
</spirit:wire>
|
||||
</spirit:port>
|
||||
<spirit:port>
|
||||
<spirit:logicalName>mem_reset</spirit:logicalName>
|
||||
<spirit:wire>
|
||||
<spirit:onMaster>
|
||||
<spirit:presence>required</spirit:presence>
|
||||
<spirit:width>1</spirit:width>
|
||||
</spirit:onMaster>
|
||||
<spirit:onSlave>
|
||||
<spirit:presence>required</spirit:presence>
|
||||
<spirit:width>1</spirit:width>
|
||||
<spirit:direction>in</spirit:direction>
|
||||
</spirit:onSlave>
|
||||
</spirit:wire>
|
||||
</spirit:port>
|
||||
<spirit:port>
|
||||
<spirit:logicalName>enable</spirit:logicalName>
|
||||
<spirit:wire>
|
||||
<spirit:onMaster>
|
||||
<spirit:presence>required</spirit:presence>
|
||||
<spirit:width>1</spirit:width>
|
||||
</spirit:onMaster>
|
||||
<spirit:onSlave>
|
||||
<spirit:presence>required</spirit:presence>
|
||||
<spirit:width>1</spirit:width>
|
||||
<spirit:direction>in</spirit:direction>
|
||||
</spirit:onSlave>
|
||||
</spirit:wire>
|
||||
</spirit:port>
|
||||
<spirit:port>
|
||||
<spirit:logicalName>enabled</spirit:logicalName>
|
||||
<spirit:wire>
|
||||
<spirit:onMaster>
|
||||
<spirit:presence>required</spirit:presence>
|
||||
<spirit:width>1</spirit:width>
|
||||
<spirit:direction>in</spirit:direction>
|
||||
</spirit:onMaster>
|
||||
<spirit:onSlave>
|
||||
<spirit:presence>required</spirit:presence>
|
||||
<spirit:width>1</spirit:width>
|
||||
</spirit:onSlave>
|
||||
</spirit:wire>
|
||||
</spirit:port>
|
||||
<spirit:port>
|
||||
<spirit:logicalName>sync_ready</spirit:logicalName>
|
||||
<spirit:wire>
|
||||
<spirit:onMaster>
|
||||
<spirit:presence>required</spirit:presence>
|
||||
<spirit:width>1</spirit:width>
|
||||
</spirit:onMaster>
|
||||
<spirit:onSlave>
|
||||
<spirit:presence>required</spirit:presence>
|
||||
<spirit:width>1</spirit:width>
|
||||
<spirit:direction>in</spirit:direction>
|
||||
</spirit:onSlave>
|
||||
</spirit:wire>
|
||||
</spirit:port>
|
||||
<spirit:port>
|
||||
<spirit:logicalName>sync_valid</spirit:logicalName>
|
||||
<spirit:wire>
|
||||
<spirit:onMaster>
|
||||
<spirit:presence>required</spirit:presence>
|
||||
<spirit:width>1</spirit:width>
|
||||
<spirit:direction>in</spirit:direction>
|
||||
</spirit:onMaster>
|
||||
<spirit:onSlave>
|
||||
<spirit:presence>required</spirit:presence>
|
||||
<spirit:width>1</spirit:width>
|
||||
</spirit:onSlave>
|
||||
</spirit:wire>
|
||||
</spirit:port>
|
||||
<spirit:port>
|
||||
<spirit:logicalName>sync_data</spirit:logicalName>
|
||||
<spirit:wire>
|
||||
<spirit:onMaster>
|
||||
<spirit:presence>required</spirit:presence>
|
||||
<spirit:width>8</spirit:width>
|
||||
<spirit:direction>in</spirit:direction>
|
||||
</spirit:onMaster>
|
||||
<spirit:onSlave>
|
||||
<spirit:presence>required</spirit:presence>
|
||||
<spirit:width>8</spirit:width>
|
||||
</spirit:onSlave>
|
||||
</spirit:wire>
|
||||
</spirit:port>
|
||||
</spirit:ports>
|
||||
</spirit:abstractionDefinition>
|
||||
@@ -0,0 +1,97 @@
|
||||
// (c) Copyright 1986-2022 Xilinx, Inc. All Rights Reserved.
|
||||
// (c) Copyright 2022-2025 Advanced Micro Devices, Inc. All rights reserved.
|
||||
//
|
||||
// This file contains confidential and proprietary information
|
||||
// of AMD and is protected under U.S. and international copyright
|
||||
// and other intellectual property laws.
|
||||
//
|
||||
// DISCLAIMER
|
||||
// This disclaimer is not a license and does not grant any
|
||||
// rights to the materials distributed herewith. Except as
|
||||
// otherwise provided in a valid license issued to you by
|
||||
// AMD, and to the maximum extent permitted by applicable
|
||||
// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
|
||||
// WITH ALL FAULTS, AND AMD HEREBY DISCLAIMS ALL WARRANTIES
|
||||
// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
|
||||
// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
|
||||
// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
|
||||
// (2) AMD shall not be liable (whether in contract or tort,
|
||||
// including negligence, or under any other theory of
|
||||
// liability) for any loss or damage of any kind or nature
|
||||
// related to, arising under or in connection with these
|
||||
// materials, including for any direct, or any indirect,
|
||||
// special, incidental, or consequential loss or damage
|
||||
// (including loss of data, profits, goodwill, or any type of
|
||||
// loss or damage suffered as a result of any action brought
|
||||
// by a third party) even if such damage or loss was
|
||||
// reasonably foreseeable or AMD had been advised of the
|
||||
// possibility of the same.
|
||||
//
|
||||
// CRITICAL APPLICATIONS
|
||||
// AMD products are not designed or intended to be fail-
|
||||
// safe, or for use in any application requiring fail-safe
|
||||
// performance, such as life-support or safety devices or
|
||||
// systems, Class III medical devices, nuclear facilities,
|
||||
// applications related to the deployment of airbags, or any
|
||||
// other applications that could lead to death, personal
|
||||
// injury, or severe property or environmental damage
|
||||
// (individually and collectively, "Critical
|
||||
// Applications"). Customer assumes the sole risk and
|
||||
// liability of any use of AMD products in Critical
|
||||
// Applications, subject only to applicable laws and
|
||||
// regulations governing limitations on product liability.
|
||||
//
|
||||
// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
|
||||
// PART OF THIS FILE AT ALL TIMES.
|
||||
//
|
||||
// DO NOT MODIFY THIS FILE.
|
||||
|
||||
|
||||
`ifndef spi_engine_offload_ctrl_v1_0
|
||||
`define spi_engine_offload_ctrl_v1_0
|
||||
|
||||
package parameter_structs;
|
||||
|
||||
typedef struct packed {
|
||||
bit portEnabled;
|
||||
integer portWidth;
|
||||
}portConfig;
|
||||
|
||||
typedef struct packed {
|
||||
// <typeName> <LogicalName> = {<enablement>, <width>}
|
||||
portConfig sdo_wr_data;
|
||||
}spi_engine_offload_ctrl_v1_0_port_configuration;
|
||||
|
||||
parameter spi_engine_offload_ctrl_v1_0_port_configuration spi_engine_offload_ctrl_v1_0_default_port_configuration = '{sdo_wr_data:'{1, -1}};
|
||||
|
||||
endpackage
|
||||
|
||||
interface spi_engine_offload_ctrl_v1_0 #(parameter_structs::spi_engine_offload_ctrl_v1_0_port_configuration port_configuration)();
|
||||
logic cmd_wr_en; //
|
||||
logic [15:0] cmd_wr_data; //
|
||||
logic sdo_wr_en; //
|
||||
logic [port_configuration.sdo_wr_data.portWidth-1:0] sdo_wr_data; //
|
||||
logic mem_reset; //
|
||||
logic enable; //
|
||||
logic enabled; //
|
||||
logic sync_ready; //
|
||||
logic sync_valid; //
|
||||
logic [7:0] sync_data; //
|
||||
|
||||
modport MASTER (
|
||||
input enabled, sync_valid, sync_data,
|
||||
output cmd_wr_en, cmd_wr_data, sdo_wr_en, sdo_wr_data, mem_reset, enable, sync_ready
|
||||
);
|
||||
|
||||
modport SLAVE (
|
||||
input cmd_wr_en, cmd_wr_data, sdo_wr_en, sdo_wr_data, mem_reset, enable, sync_ready,
|
||||
output enabled, sync_valid, sync_data
|
||||
);
|
||||
|
||||
modport MONITOR (
|
||||
input cmd_wr_en, cmd_wr_data, sdo_wr_en, sdo_wr_data, mem_reset, enable, enabled, sync_ready, sync_valid, sync_data
|
||||
);
|
||||
|
||||
endinterface // spi_engine_offload_ctrl_v1_0
|
||||
|
||||
`endif
|
||||
@@ -0,0 +1,90 @@
|
||||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<spirit:abstractionDefinition xmlns:xilinx="http://www.xilinx.com" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
|
||||
<spirit:vendor>analog.com</spirit:vendor>
|
||||
<spirit:library>interface</spirit:library>
|
||||
<spirit:name>spi_engine_rtl</spirit:name>
|
||||
<spirit:version>1.0</spirit:version>
|
||||
<spirit:busType spirit:vendor="analog.com" spirit:library="interface" spirit:name="spi_engine" spirit:version="1.0"/>
|
||||
<spirit:ports>
|
||||
<spirit:port>
|
||||
<spirit:logicalName>sclk</spirit:logicalName>
|
||||
<spirit:wire>
|
||||
<spirit:onMaster>
|
||||
<spirit:presence>required</spirit:presence>
|
||||
<spirit:width>1</spirit:width>
|
||||
</spirit:onMaster>
|
||||
<spirit:onSlave>
|
||||
<spirit:presence>required</spirit:presence>
|
||||
<spirit:width>1</spirit:width>
|
||||
<spirit:direction>in</spirit:direction>
|
||||
</spirit:onSlave>
|
||||
</spirit:wire>
|
||||
</spirit:port>
|
||||
<spirit:port>
|
||||
<spirit:logicalName>sdo</spirit:logicalName>
|
||||
<spirit:wire>
|
||||
<spirit:onMaster>
|
||||
<spirit:presence>required</spirit:presence>
|
||||
<spirit:width>1</spirit:width>
|
||||
</spirit:onMaster>
|
||||
<spirit:onSlave>
|
||||
<spirit:presence>required</spirit:presence>
|
||||
<spirit:width>1</spirit:width>
|
||||
<spirit:direction>in</spirit:direction>
|
||||
</spirit:onSlave>
|
||||
</spirit:wire>
|
||||
</spirit:port>
|
||||
<spirit:port>
|
||||
<spirit:logicalName>sdo_t</spirit:logicalName>
|
||||
<spirit:wire>
|
||||
<spirit:onMaster>
|
||||
<spirit:presence>required</spirit:presence>
|
||||
<spirit:width>1</spirit:width>
|
||||
</spirit:onMaster>
|
||||
<spirit:onSlave>
|
||||
<spirit:presence>required</spirit:presence>
|
||||
<spirit:width>1</spirit:width>
|
||||
<spirit:direction>in</spirit:direction>
|
||||
</spirit:onSlave>
|
||||
</spirit:wire>
|
||||
</spirit:port>
|
||||
<spirit:port>
|
||||
<spirit:logicalName>sdi</spirit:logicalName>
|
||||
<spirit:wire>
|
||||
<spirit:onMaster>
|
||||
<spirit:presence>required</spirit:presence>
|
||||
<spirit:direction>in</spirit:direction>
|
||||
</spirit:onMaster>
|
||||
<spirit:onSlave>
|
||||
<spirit:presence>required</spirit:presence>
|
||||
</spirit:onSlave>
|
||||
</spirit:wire>
|
||||
</spirit:port>
|
||||
<spirit:port>
|
||||
<spirit:logicalName>cs</spirit:logicalName>
|
||||
<spirit:wire>
|
||||
<spirit:onMaster>
|
||||
<spirit:presence>required</spirit:presence>
|
||||
</spirit:onMaster>
|
||||
<spirit:onSlave>
|
||||
<spirit:presence>required</spirit:presence>
|
||||
<spirit:direction>in</spirit:direction>
|
||||
</spirit:onSlave>
|
||||
</spirit:wire>
|
||||
</spirit:port>
|
||||
<spirit:port>
|
||||
<spirit:logicalName>three_wire</spirit:logicalName>
|
||||
<spirit:wire>
|
||||
<spirit:onMaster>
|
||||
<spirit:presence>required</spirit:presence>
|
||||
<spirit:width>1</spirit:width>
|
||||
</spirit:onMaster>
|
||||
<spirit:onSlave>
|
||||
<spirit:presence>required</spirit:presence>
|
||||
<spirit:width>1</spirit:width>
|
||||
<spirit:direction>in</spirit:direction>
|
||||
</spirit:onSlave>
|
||||
</spirit:wire>
|
||||
</spirit:port>
|
||||
</spirit:ports>
|
||||
</spirit:abstractionDefinition>
|
||||
@@ -0,0 +1,94 @@
|
||||
// (c) Copyright 1986-2022 Xilinx, Inc. All Rights Reserved.
|
||||
// (c) Copyright 2022-2025 Advanced Micro Devices, Inc. All rights reserved.
|
||||
//
|
||||
// This file contains confidential and proprietary information
|
||||
// of AMD and is protected under U.S. and international copyright
|
||||
// and other intellectual property laws.
|
||||
//
|
||||
// DISCLAIMER
|
||||
// This disclaimer is not a license and does not grant any
|
||||
// rights to the materials distributed herewith. Except as
|
||||
// otherwise provided in a valid license issued to you by
|
||||
// AMD, and to the maximum extent permitted by applicable
|
||||
// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
|
||||
// WITH ALL FAULTS, AND AMD HEREBY DISCLAIMS ALL WARRANTIES
|
||||
// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
|
||||
// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
|
||||
// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
|
||||
// (2) AMD shall not be liable (whether in contract or tort,
|
||||
// including negligence, or under any other theory of
|
||||
// liability) for any loss or damage of any kind or nature
|
||||
// related to, arising under or in connection with these
|
||||
// materials, including for any direct, or any indirect,
|
||||
// special, incidental, or consequential loss or damage
|
||||
// (including loss of data, profits, goodwill, or any type of
|
||||
// loss or damage suffered as a result of any action brought
|
||||
// by a third party) even if such damage or loss was
|
||||
// reasonably foreseeable or AMD had been advised of the
|
||||
// possibility of the same.
|
||||
//
|
||||
// CRITICAL APPLICATIONS
|
||||
// AMD products are not designed or intended to be fail-
|
||||
// safe, or for use in any application requiring fail-safe
|
||||
// performance, such as life-support or safety devices or
|
||||
// systems, Class III medical devices, nuclear facilities,
|
||||
// applications related to the deployment of airbags, or any
|
||||
// other applications that could lead to death, personal
|
||||
// injury, or severe property or environmental damage
|
||||
// (individually and collectively, "Critical
|
||||
// Applications"). Customer assumes the sole risk and
|
||||
// liability of any use of AMD products in Critical
|
||||
// Applications, subject only to applicable laws and
|
||||
// regulations governing limitations on product liability.
|
||||
//
|
||||
// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
|
||||
// PART OF THIS FILE AT ALL TIMES.
|
||||
//
|
||||
// DO NOT MODIFY THIS FILE.
|
||||
|
||||
|
||||
`ifndef spi_engine_v1_0
|
||||
`define spi_engine_v1_0
|
||||
|
||||
package parameter_structs;
|
||||
|
||||
typedef struct packed {
|
||||
bit portEnabled;
|
||||
integer portWidth;
|
||||
}portConfig;
|
||||
|
||||
typedef struct packed {
|
||||
// <typeName> <LogicalName> = {<enablement>, <width>}
|
||||
portConfig sdi;
|
||||
portConfig cs;
|
||||
}spi_engine_v1_0_port_configuration;
|
||||
|
||||
parameter spi_engine_v1_0_port_configuration spi_engine_v1_0_default_port_configuration = '{sdi:'{1, -1}, cs:'{1, -1}};
|
||||
|
||||
endpackage
|
||||
|
||||
interface spi_engine_v1_0 #(parameter_structs::spi_engine_v1_0_port_configuration port_configuration)();
|
||||
logic sclk; //
|
||||
logic sdo; //
|
||||
logic sdo_t; //
|
||||
logic [port_configuration.sdi.portWidth-1:0] sdi; //
|
||||
logic [port_configuration.cs.portWidth-1:0] cs; //
|
||||
logic three_wire; //
|
||||
|
||||
modport MASTER (
|
||||
input sdi,
|
||||
output sclk, sdo, sdo_t, cs, three_wire
|
||||
);
|
||||
|
||||
modport SLAVE (
|
||||
input sclk, sdo, sdo_t, cs, three_wire,
|
||||
output sdi
|
||||
);
|
||||
|
||||
modport MONITOR (
|
||||
input sclk, sdo, sdo_t, sdi, cs, three_wire
|
||||
);
|
||||
|
||||
endinterface // spi_engine_v1_0
|
||||
|
||||
`endif
|
||||
Reference in New Issue
Block a user