746 lines
46 KiB
XML
746 lines
46 KiB
XML
<?xml version="1.0" encoding="UTF-8"?>
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<!-- Product Version: Vivado v2024.1.2 (64-bit) -->
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<!-- -->
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<!-- Copyright 1986-2022 Xilinx, Inc. All Rights Reserved. -->
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<!-- Copyright 2022-2024 Advanced Micro Devices, Inc. All Rights Reserved. -->
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<Project Product="Vivado" Version="7" Minor="67" Path="/home/josh/Workspace/vivado/brd_hsjl_hy/sjl_ad9653/sjl_ad9653.xpr">
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<DefaultLaunch Dir="$PRUNDIR"/>
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<Configuration>
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<Option Name="Id" Val="7ce4b98f308343e18919f621c7e93e26"/>
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<Option Name="Part" Val="xc7z100ffg900-2"/>
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<Option Name="CompiledLibDir" Val="$PCACHEDIR/compile_simlib"/>
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<Option Name="CompiledLibDirXSim" Val=""/>
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<Option Name="CompiledLibDirModelSim" Val="$PCACHEDIR/compile_simlib/modelsim"/>
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<Option Name="CompiledLibDirQuesta" Val="$PCACHEDIR/compile_simlib/questa"/>
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<Option Name="CompiledLibDirXcelium" Val="$PCACHEDIR/compile_simlib/xcelium"/>
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<Option Name="CompiledLibDirVCS" Val="$PCACHEDIR/compile_simlib/vcs"/>
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<Option Name="CompiledLibDirRiviera" Val="$PCACHEDIR/compile_simlib/riviera"/>
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<Option Name="CompiledLibDirActivehdl" Val="$PCACHEDIR/compile_simlib/activehdl"/>
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<Option Name="SimulatorInstallDirModelSim" Val=""/>
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<Option Name="SimulatorInstallDirQuesta" Val=""/>
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<Option Name="SimulatorInstallDirRiviera" Val=""/>
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<Option Name="SimulatorInstallDirActiveHdl" Val=""/>
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<Option Name="SimulatorGccInstallDirVCS" Val=""/>
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<Option Name="SimulatorGccInstallDirRiviera" Val=""/>
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<Option Name="SimulatorGccInstallDirActiveHdl" Val=""/>
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<Option Name="SimulatorVersionXsim" Val="2024.1"/>
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<Option Name="SimulatorVersionModelSim" Val="2023.2"/>
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<Option Name="SimulatorVersionQuesta" Val="2023.2"/>
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<Option Name="SimulatorVersionXcelium" Val="23.03.002"/>
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<Option Name="SimulatorVersionVCS" Val="U-2023.03-1"/>
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<Option Name="SimulatorVersionRiviera" Val="2023.04"/>
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<Option Name="SimulatorVersionActiveHdl" Val="14.1"/>
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<Option Name="SimulatorGccVersionXsim" Val="9.3.0"/>
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<Option Name="SimulatorGccVersionModelSim" Val="7.4.0"/>
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<Option Name="SimulatorGccVersionQuesta" Val="7.4.0"/>
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<Option Name="SimulatorGccVersionXcelium" Val="9.3.0"/>
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<Option Name="SimulatorGccVersionVCS" Val="9.2.0"/>
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<Option Name="SimulatorGccVersionRiviera" Val="9.3.0"/>
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<Option Name="SimulatorGccVersionActiveHdl" Val="9.3.0"/>
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<Option Name="BoardPart" Val=""/>
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<Option Name="ActiveSimSet" Val="sim_1"/>
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<Option Name="DefaultLib" Val="xil_defaultlib"/>
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<Option Name="ProjectType" Val="Default"/>
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<Option Name="IPRepoPath" Val="$PPRDIR/../../adi_library"/>
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<Option Name="IPOutputRepo" Val="$PCACHEDIR/ip"/>
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<Option Name="IPDefaultOutputPath" Val="$PGENDIR/sources_1"/>
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<Option Name="IPCachePermission" Val="read"/>
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<Option Name="IPCachePermission" Val="write"/>
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<Option Name="EnableCoreContainer" Val="FALSE"/>
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<Option Name="EnableResourceEstimation" Val="FALSE"/>
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<Option Name="SimCompileState" Val="TRUE"/>
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<Option Name="CreateRefXciForCoreContainers" Val="FALSE"/>
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<Option Name="IPUserFilesDir" Val="$PIPUSERFILESDIR"/>
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<Option Name="IPStaticSourceDir" Val="$PIPUSERFILESDIR/ipstatic"/>
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<Option Name="EnableBDX" Val="FALSE"/>
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<Option Name="WTXSimLaunchSim" Val="11"/>
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<Option Name="WTModelSimLaunchSim" Val="0"/>
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<Option Name="WTQuestaLaunchSim" Val="0"/>
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<Option Name="WTIesLaunchSim" Val="0"/>
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<Option Name="WTVcsLaunchSim" Val="0"/>
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<Option Name="WTRivieraLaunchSim" Val="0"/>
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<Option Name="WTActivehdlLaunchSim" Val="0"/>
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<Option Name="WTXSimExportSim" Val="39"/>
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<Option Name="WTModelSimExportSim" Val="39"/>
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<Option Name="WTQuestaExportSim" Val="39"/>
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<Option Name="WTIesExportSim" Val="38"/>
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<Option Name="WTVcsExportSim" Val="39"/>
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<Option Name="WTRivieraExportSim" Val="39"/>
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<Option Name="WTActivehdlExportSim" Val="39"/>
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<Option Name="GenerateIPUpgradeLog" Val="TRUE"/>
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<Option Name="XSimRadix" Val="hex"/>
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<Option Name="XSimTimeUnit" Val="ns"/>
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<Option Name="XSimArrayDisplayLimit" Val="1024"/>
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<Option Name="XSimTraceLimit" Val="65536"/>
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<Option Name="SimTypes" Val="rtl"/>
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<Option Name="SimTypes" Val="bfm"/>
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<Option Name="SimTypes" Val="tlm"/>
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<Option Name="SimTypes" Val="tlm_dpi"/>
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<Option Name="MEMEnableMemoryMapGeneration" Val="TRUE"/>
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<Option Name="DcpsUptoDate" Val="TRUE"/>
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<Option Name="ClassicSocBoot" Val="FALSE"/>
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<Option Name="LocalIPRepoLeafDirName" Val="ip_repo"/>
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</Configuration>
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<FileSets Version="1" Minor="32">
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<FileSet Name="sources_1" Type="DesignSrcs" RelSrcDir="$PSRCDIR/sources_1" RelGenDir="$PGENDIR/sources_1">
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<Filter Type="Srcs"/>
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<File Path="$PSRCDIR/sources_1/bd/system_bd/system_bd.bd">
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<FileInfo>
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<Attr Name="ImportPath" Val="$PPRDIR/../../../dx/dx_sig/dx_sig_basic/dx_sig_basic.srcs/sources_1/bd/system_bd/system_bd.bd"/>
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<Attr Name="ImportTime" Val="1726045922"/>
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<Attr Name="UsedIn" Val="synthesis"/>
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<Attr Name="UsedIn" Val="implementation"/>
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<Attr Name="UsedIn" Val="simulation"/>
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</FileInfo>
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<CompFileExtendedInfo CompFileName="system_bd.bd" FileRelPathName="ip/system_bd_auto_pc_0/system_bd_auto_pc_0.xci">
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<Proxy FileSetName="system_bd_auto_pc_0"/>
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</CompFileExtendedInfo>
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<CompFileExtendedInfo CompFileName="system_bd.bd" FileRelPathName="ip/system_bd_axi_spi_engine_0_0/system_bd_axi_spi_engine_0_0.xci">
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<Proxy FileSetName="system_bd_axi_spi_engine_0_0"/>
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</CompFileExtendedInfo>
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<CompFileExtendedInfo CompFileName="system_bd.bd" FileRelPathName="ip/system_bd_processing_system7_0_0/system_bd_processing_system7_0_0.xci">
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<Proxy FileSetName="system_bd_processing_system7_0_0"/>
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</CompFileExtendedInfo>
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<CompFileExtendedInfo CompFileName="system_bd.bd" FileRelPathName="ip/system_bd_rst_ps7_0_50M_0/system_bd_rst_ps7_0_50M_0.xci">
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<Proxy FileSetName="system_bd_rst_ps7_0_50M_0"/>
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</CompFileExtendedInfo>
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<CompFileExtendedInfo CompFileName="system_bd.bd" FileRelPathName="ip/system_bd_spi_engine_execution_0_0/system_bd_spi_engine_execution_0_0.xci">
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<Proxy FileSetName="system_bd_spi_engine_execution_0_0"/>
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</CompFileExtendedInfo>
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<CompFileExtendedInfo CompFileName="system_bd.bd" FileRelPathName="ip/system_bd_system_ila_0_1/system_bd_system_ila_0_1.xci">
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<Proxy FileSetName="system_bd_system_ila_0_1"/>
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</CompFileExtendedInfo>
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<CompFileExtendedInfo CompFileName="system_bd.bd" FileRelPathName="ip/system_bd_xadc_wiz_0_0/system_bd_xadc_wiz_0_0.xci">
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<Proxy FileSetName="system_bd_xadc_wiz_0_0"/>
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</CompFileExtendedInfo>
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<CompFileExtendedInfo CompFileName="system_bd.bd" FileRelPathName="ip/system_bd_xbar_0/system_bd_xbar_0.xci">
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<Proxy FileSetName="system_bd_xbar_0"/>
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</CompFileExtendedInfo>
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</File>
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<File Path="$PSRCDIR/sources_1/new/ad9653_map_default_ddr.v">
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<FileInfo>
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<Attr Name="UsedIn" Val="synthesis"/>
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<Attr Name="UsedIn" Val="implementation"/>
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<Attr Name="UsedIn" Val="simulation"/>
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</File>
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<File Path="$PGENDIR/sources_1/bd/system_bd/hdl/system_bd_wrapper.v">
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<FileInfo>
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<Attr Name="ImportPath" Val="$PPRDIR/../../../dx/dx_sig/dx_sig_basic/dx_sig_basic.srcs/sources_1/bd/system_bd/hdl/system_bd_wrapper.v"/>
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<Attr Name="ImportTime" Val="1726045922"/>
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<Attr Name="UsedIn" Val="synthesis"/>
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<Attr Name="UsedIn" Val="implementation"/>
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<Attr Name="UsedIn" Val="simulation"/>
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</FileInfo>
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</File>
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<File Path="$PSRCDIR/sources_1/new/system_top.v">
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<FileInfo>
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<Attr Name="ImportPath" Val="$PPRDIR/../../../dx/dx_sig/dx_sig_basic/dx_sig_basic.srcs/sources_1/new/system_top.v"/>
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<Attr Name="ImportTime" Val="1727338838"/>
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<Attr Name="UsedIn" Val="synthesis"/>
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<Attr Name="UsedIn" Val="implementation"/>
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<Attr Name="UsedIn" Val="simulation"/>
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</FileInfo>
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</File>
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<File Path="$PSRCDIR/sources_1/ip/ila_ad9653/ila_ad9653.xci">
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<FileInfo>
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<Attr Name="AutoDisabled" Val="1"/>
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<Attr Name="UsedIn" Val="synthesis"/>
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<Attr Name="UsedIn" Val="implementation"/>
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<Attr Name="UsedIn" Val="simulation"/>
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</File>
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<Config>
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<Option Name="DesignMode" Val="RTL"/>
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<Option Name="TopModule" Val="system_top"/>
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<Option Name="TopAutoSet" Val="TRUE"/>
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</Config>
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</FileSet>
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<FileSet Name="constrs_1" Type="Constrs" RelSrcDir="$PSRCDIR/constrs_1" RelGenDir="$PGENDIR/constrs_1">
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<Filter Type="Constrs"/>
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<File Path="$PSRCDIR/constrs_1/new/sjl_z7100_ad9653_physical.xdc">
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<FileInfo>
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<Attr Name="UsedIn" Val="synthesis"/>
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<Attr Name="UsedIn" Val="implementation"/>
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</FileInfo>
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</File>
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<Config>
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<Option Name="ConstrsType" Val="XDC"/>
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</Config>
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</FileSet>
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<FileSet Name="sim_1" Type="SimulationSrcs" RelSrcDir="$PSRCDIR/sim_1" RelGenDir="$PGENDIR/sim_1">
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<Filter Type="Srcs"/>
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<File Path="$PSRCDIR/sim_1/new/tx_qpsk_tb.v">
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<FileInfo>
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<Attr Name="AutoDisabled" Val="1"/>
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<Attr Name="ImportPath" Val="$PPRDIR/../../sjl_basic_20240930/sjl_basic/sjl_basic.srcs/sim_1/new/tx_qpsk_tb.v"/>
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<Attr Name="ImportTime" Val="1730365792"/>
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<Attr Name="UsedIn" Val="synthesis"/>
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</File>
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<File Path="$PPRDIR/../../../ad9361/dx_sig_lvds_2t2r/dx_sig_lvds_2t2r/dx_sig_lvds_2t2r.srcs/sim_1/new/tb_ad9653_trx_lvds_dual.v">
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<Attr Name="UsedIn" Val="synthesis"/>
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<Config>
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<Option Name="DesignMode" Val="RTL"/>
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<Option Name="TopModule" Val="system_top"/>
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<Option Name="TopLib" Val="xil_defaultlib"/>
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<Option Name="TopAutoSet" Val="TRUE"/>
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<Option Name="TransportPathDelay" Val="0"/>
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<Option Name="TransportIntDelay" Val="0"/>
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<Option Name="SelectedSimModel" Val="rtl"/>
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<Option Name="PamDesignTestbench" Val=""/>
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<Option Name="PamDutBypassFile" Val="xil_dut_bypass"/>
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<Option Name="PamSignalDriverFile" Val="xil_bypass_driver"/>
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<Option Name="PamPseudoTop" Val="pseudo_tb"/>
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<Option Name="SrcSet" Val="sources_1"/>
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</Config>
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</FileSet>
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<FileSet Name="utils_1" Type="Utils" RelSrcDir="$PSRCDIR/utils_1" RelGenDir="$PGENDIR/utils_1">
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<Filter Type="Utils"/>
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<Config>
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<Option Name="TopAutoSet" Val="TRUE"/>
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</Config>
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</FileSet>
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<FileSet Name="system_bd_processing_system7_0_0" Type="BlockSrcs" RelSrcDir="$PSRCDIR/system_bd_processing_system7_0_0" RelGenDir="$PGENDIR/system_bd_processing_system7_0_0">
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<Config>
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<Option Name="TopModule" Val="system_bd_processing_system7_0_0"/>
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<Option Name="UseBlackboxStub" Val="1"/>
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</Config>
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</FileSet>
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<FileSet Name="system_bd_rst_ps7_0_50M_0" Type="BlockSrcs" RelSrcDir="$PSRCDIR/system_bd_rst_ps7_0_50M_0" RelGenDir="$PGENDIR/system_bd_rst_ps7_0_50M_0">
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<Config>
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<Option Name="TopModule" Val="system_bd_rst_ps7_0_50M_0"/>
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<Option Name="UseBlackboxStub" Val="1"/>
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</Config>
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</FileSet>
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<FileSet Name="system_bd_xadc_wiz_0_0" Type="BlockSrcs" RelSrcDir="$PSRCDIR/system_bd_xadc_wiz_0_0" RelGenDir="$PGENDIR/system_bd_xadc_wiz_0_0">
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<Config>
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<Option Name="TopModule" Val="system_bd_xadc_wiz_0_0"/>
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<Option Name="UseBlackboxStub" Val="1"/>
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</Config>
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</FileSet>
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<FileSet Name="system_bd_xbar_0" Type="BlockSrcs" RelSrcDir="$PSRCDIR/system_bd_xbar_0" RelGenDir="$PGENDIR/system_bd_xbar_0">
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<Config>
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<Option Name="TopModule" Val="system_bd_xbar_0"/>
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<Option Name="UseBlackboxStub" Val="1"/>
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</Config>
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</FileSet>
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<FileSet Name="sys_clk_gen" Type="BlockSrcs" RelSrcDir="$PSRCDIR/sys_clk_gen" RelGenDir="$PGENDIR/sys_clk_gen">
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<File Path="$PSRCDIR/sources_1/ip/sys_clk_gen/sys_clk_gen.xci">
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<FileInfo>
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<Attr Name="UsedIn" Val="synthesis"/>
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<Attr Name="UsedIn" Val="implementation"/>
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<Attr Name="UsedIn" Val="simulation"/>
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</FileInfo>
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</File>
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<Config>
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<Option Name="TopModule" Val="sys_clk_gen"/>
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<Option Name="UseBlackboxStub" Val="1"/>
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</Config>
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</FileSet>
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<FileSet Name="ad9653_fifo" Type="BlockSrcs" RelSrcDir="$PSRCDIR/ad9653_fifo" RelGenDir="$PGENDIR/ad9653_fifo">
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<File Path="$PSRCDIR/sources_1/ip/ad9653_fifo/ad9653_fifo.xci">
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<FileInfo>
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<Attr Name="UsedIn" Val="synthesis"/>
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<Attr Name="UsedIn" Val="implementation"/>
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<Attr Name="UsedIn" Val="simulation"/>
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</FileInfo>
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</File>
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<Config>
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<Option Name="TopModule" Val="ad9653_fifo"/>
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<Option Name="UseBlackboxStub" Val="1"/>
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</Config>
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</FileSet>
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<FileSet Name="system_bd_axi_spi_engine_0_0" Type="BlockSrcs" RelSrcDir="$PSRCDIR/system_bd_axi_spi_engine_0_0" RelGenDir="$PGENDIR/system_bd_axi_spi_engine_0_0">
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<Config>
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<Option Name="TopModule" Val="system_bd_axi_spi_engine_0_0"/>
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<Option Name="UseBlackboxStub" Val="1"/>
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</Config>
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</FileSet>
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<FileSet Name="system_bd_spi_engine_execution_0_0" Type="BlockSrcs" RelSrcDir="$PSRCDIR/system_bd_spi_engine_execution_0_0" RelGenDir="$PGENDIR/system_bd_spi_engine_execution_0_0">
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<Config>
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<Option Name="TopModule" Val="system_bd_spi_engine_execution_0_0"/>
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<Option Name="UseBlackboxStub" Val="1"/>
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</Config>
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</FileSet>
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<FileSet Name="ila_rx" Type="BlockSrcs" RelSrcDir="$PSRCDIR/ila_rx" RelGenDir="$PGENDIR/ila_rx">
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<File Path="$PSRCDIR/sources_1/ip/ila_rx/ila_rx.xci">
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<FileInfo>
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<Attr Name="UsedIn" Val="synthesis"/>
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<Attr Name="UsedIn" Val="implementation"/>
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<Attr Name="UsedIn" Val="simulation"/>
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</FileInfo>
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</File>
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<Config>
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<Option Name="TopModule" Val="ila_rx"/>
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<Option Name="UseBlackboxStub" Val="1"/>
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</Config>
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</FileSet>
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<FileSet Name="system_bd_system_ila_0_1" Type="BlockSrcs" RelSrcDir="$PSRCDIR/system_bd_system_ila_0_1" RelGenDir="$PGENDIR/system_bd_system_ila_0_1">
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<Config>
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<Option Name="TopModule" Val="system_bd_system_ila_0_1"/>
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<Option Name="UseBlackboxStub" Val="1"/>
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</Config>
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</FileSet>
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<FileSet Name="system_bd_auto_pc_0" Type="BlockSrcs" RelSrcDir="$PSRCDIR/system_bd_auto_pc_0" RelGenDir="$PGENDIR/system_bd_auto_pc_0">
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<Config>
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<Option Name="TopModule" Val="system_bd_auto_pc_0"/>
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<Option Name="UseBlackboxStub" Val="1"/>
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</Config>
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</FileSet>
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</FileSets>
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<Simulators>
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<Simulator Name="XSim">
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<Option Name="Description" Val="Vivado Simulator"/>
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<Option Name="CompiledLib" Val="0"/>
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</Simulator>
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<Simulator Name="ModelSim">
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<Option Name="Description" Val="ModelSim Simulator"/>
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</Simulator>
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<Simulator Name="Questa">
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<Option Name="Description" Val="Questa Advanced Simulator"/>
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</Simulator>
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<Simulator Name="Xcelium">
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<Option Name="Description" Val="Xcelium Parallel Simulator"/>
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</Simulator>
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<Simulator Name="VCS">
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<Option Name="Description" Val="Verilog Compiler Simulator (VCS)"/>
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</Simulator>
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<Simulator Name="Riviera">
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<Option Name="Description" Val="Riviera-PRO Simulator"/>
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</Simulator>
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</Simulators>
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<Runs Version="1" Minor="22">
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<Run Id="synth_1" Type="Ft3:Synth" SrcSet="sources_1" Part="xc7z100ffg900-2" ConstrsSet="constrs_1" Description="Vivado Synthesis Defaults" AutoIncrementalCheckpoint="false" WriteIncrSynthDcp="false" State="current" Dir="$PRUNDIR/synth_1" IncludeInArchive="true" IsChild="false" AutoIncrementalDir="$PSRCDIR/utils_1/imports/synth_1" AutoRQSDir="$PSRCDIR/utils_1/imports/synth_1" ParallelReportGen="true">
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<Strategy Version="1" Minor="2">
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<StratHandle Name="Vivado Synthesis Defaults" Flow="Vivado Synthesis 2019">
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<Desc>Vivado Synthesis Defaults</Desc>
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</StratHandle>
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<Step Id="synth_design"/>
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</Strategy>
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<GeneratedRun Dir="$PRUNDIR" File="gen_run.xml"/>
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<ReportStrategy Name="Vivado Synthesis Default Reports" Flow="Vivado Synthesis 2019"/>
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<Report Name="ROUTE_DESIGN.REPORT_METHODOLOGY" Enabled="1"/>
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<RQSFiles/>
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</Run>
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<StratHandle Name="Vivado Synthesis Defaults" Flow="Vivado Synthesis 2024">
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<Desc>Vivado Synthesis Defaults</Desc>
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</Strategy>
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<ReportStrategy Name="Vivado Synthesis Default Reports" Flow="Vivado Synthesis 2024"/>
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<Strategy Version="1" Minor="2">
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<StratHandle Name="Vivado Synthesis Defaults" Flow="Vivado Synthesis 2024">
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<Desc>Vivado Synthesis Defaults</Desc>
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</StratHandle>
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<Step Id="synth_design"/>
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</Strategy>
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<GeneratedRun Dir="$PRUNDIR" File="gen_run.xml"/>
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<ReportStrategy Name="Vivado Synthesis Default Reports" Flow="Vivado Synthesis 2024"/>
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<Report Name="ROUTE_DESIGN.REPORT_METHODOLOGY" Enabled="1"/>
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<RQSFiles/>
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</Run>
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<Run Id="sys_clk_gen_synth_1" Type="Ft3:Synth" SrcSet="sys_clk_gen" Part="xc7z100ffg900-2" ConstrsSet="sys_clk_gen" Description="Vivado Synthesis Defaults" AutoIncrementalCheckpoint="false" WriteIncrSynthDcp="false" Dir="$PRUNDIR/sys_clk_gen_synth_1" IncludeInArchive="true" IsChild="false" AutoIncrementalDir="$PSRCDIR/utils_1/imports/sys_clk_gen_synth_1" AutoRQSDir="$PSRCDIR/utils_1/imports/sys_clk_gen_synth_1" ParallelReportGen="true">
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<Strategy Version="1" Minor="2">
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|
<StratHandle Name="Vivado Synthesis Defaults" Flow="Vivado Synthesis 2024">
|
|
<Desc>Vivado Synthesis Defaults</Desc>
|
|
</StratHandle>
|
|
<Step Id="synth_design"/>
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|
</Strategy>
|
|
<GeneratedRun Dir="$PRUNDIR" File="gen_run.xml"/>
|
|
<ReportStrategy Name="Vivado Synthesis Default Reports" Flow="Vivado Synthesis 2024"/>
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<Report Name="ROUTE_DESIGN.REPORT_METHODOLOGY" Enabled="1"/>
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<RQSFiles/>
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</Run>
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|
<Run Id="ad9653_fifo_synth_1" Type="Ft3:Synth" SrcSet="ad9653_fifo" Part="xc7z100ffg900-2" ConstrsSet="ad9653_fifo" Description="Vivado Synthesis Defaults" AutoIncrementalCheckpoint="false" WriteIncrSynthDcp="false" Dir="$PRUNDIR/ad9653_fifo_synth_1" IncludeInArchive="true" IsChild="false" AutoIncrementalDir="$PSRCDIR/utils_1/imports/ad9653_fifo_synth_1" AutoRQSDir="$PSRCDIR/utils_1/imports/ad9653_fifo_synth_1" ParallelReportGen="true">
|
|
<Strategy Version="1" Minor="2">
|
|
<StratHandle Name="Vivado Synthesis Defaults" Flow="Vivado Synthesis 2024">
|
|
<Desc>Vivado Synthesis Defaults</Desc>
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|
</StratHandle>
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<Step Id="synth_design"/>
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|
</Strategy>
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|
<GeneratedRun Dir="$PRUNDIR" File="gen_run.xml"/>
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<ReportStrategy Name="Vivado Synthesis Default Reports" Flow="Vivado Synthesis 2024"/>
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<Report Name="ROUTE_DESIGN.REPORT_METHODOLOGY" Enabled="1"/>
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<RQSFiles/>
|
|
</Run>
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|
<Run Id="system_bd_axi_spi_engine_0_0_synth_1" Type="Ft3:Synth" SrcSet="system_bd_axi_spi_engine_0_0" Part="xc7z100ffg900-2" ConstrsSet="system_bd_axi_spi_engine_0_0" Description="Vivado Synthesis Defaults" AutoIncrementalCheckpoint="false" WriteIncrSynthDcp="false" Dir="$PRUNDIR/system_bd_axi_spi_engine_0_0_synth_1" IncludeInArchive="true" IsChild="false" AutoIncrementalDir="$PSRCDIR/utils_1/imports/system_bd_axi_spi_engine_0_0_synth_1" AutoRQSDir="$PSRCDIR/utils_1/imports/system_bd_axi_spi_engine_0_0_synth_1" ParallelReportGen="true">
|
|
<Strategy Version="1" Minor="2">
|
|
<StratHandle Name="Vivado Synthesis Defaults" Flow="Vivado Synthesis 2024">
|
|
<Desc>Vivado Synthesis Defaults</Desc>
|
|
</StratHandle>
|
|
<Step Id="synth_design"/>
|
|
</Strategy>
|
|
<GeneratedRun Dir="$PRUNDIR" File="gen_run.xml"/>
|
|
<ReportStrategy Name="Vivado Synthesis Default Reports" Flow="Vivado Synthesis 2024"/>
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|
<Report Name="ROUTE_DESIGN.REPORT_METHODOLOGY" Enabled="1"/>
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|
<RQSFiles/>
|
|
</Run>
|
|
<Run Id="system_bd_spi_engine_execution_0_0_synth_1" Type="Ft3:Synth" SrcSet="system_bd_spi_engine_execution_0_0" Part="xc7z100ffg900-2" ConstrsSet="system_bd_spi_engine_execution_0_0" Description="Vivado Synthesis Defaults" AutoIncrementalCheckpoint="false" WriteIncrSynthDcp="false" Dir="$PRUNDIR/system_bd_spi_engine_execution_0_0_synth_1" IncludeInArchive="true" IsChild="false" AutoIncrementalDir="$PSRCDIR/utils_1/imports/system_bd_spi_engine_execution_0_0_synth_1" AutoRQSDir="$PSRCDIR/utils_1/imports/system_bd_spi_engine_execution_0_0_synth_1" ParallelReportGen="true">
|
|
<Strategy Version="1" Minor="2">
|
|
<StratHandle Name="Vivado Synthesis Defaults" Flow="Vivado Synthesis 2024">
|
|
<Desc>Vivado Synthesis Defaults</Desc>
|
|
</StratHandle>
|
|
<Step Id="synth_design"/>
|
|
</Strategy>
|
|
<GeneratedRun Dir="$PRUNDIR" File="gen_run.xml"/>
|
|
<ReportStrategy Name="Vivado Synthesis Default Reports" Flow="Vivado Synthesis 2024"/>
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|
<Report Name="ROUTE_DESIGN.REPORT_METHODOLOGY" Enabled="1"/>
|
|
<RQSFiles/>
|
|
</Run>
|
|
<Run Id="ila_rx_synth_1" Type="Ft3:Synth" SrcSet="ila_rx" Part="xc7z100ffg900-2" ConstrsSet="ila_rx" Description="Vivado Synthesis Defaults" AutoIncrementalCheckpoint="false" WriteIncrSynthDcp="false" Dir="$PRUNDIR/ila_rx_synth_1" IncludeInArchive="true" IsChild="false" AutoIncrementalDir="$PSRCDIR/utils_1/imports/ila_rx_synth_1" AutoRQSDir="$PSRCDIR/utils_1/imports/ila_rx_synth_1" ParallelReportGen="true">
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|
<Strategy Version="1" Minor="2">
|
|
<StratHandle Name="Vivado Synthesis Defaults" Flow="Vivado Synthesis 2024">
|
|
<Desc>Vivado Synthesis Defaults</Desc>
|
|
</StratHandle>
|
|
<Step Id="synth_design"/>
|
|
</Strategy>
|
|
<GeneratedRun Dir="$PRUNDIR" File="gen_run.xml"/>
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|
<ReportStrategy Name="Vivado Synthesis Default Reports" Flow="Vivado Synthesis 2024"/>
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|
<Report Name="ROUTE_DESIGN.REPORT_METHODOLOGY" Enabled="1"/>
|
|
<RQSFiles/>
|
|
</Run>
|
|
<Run Id="system_bd_system_ila_0_1_synth_1" Type="Ft3:Synth" SrcSet="system_bd_system_ila_0_1" Part="xc7z100ffg900-2" ConstrsSet="system_bd_system_ila_0_1" Description="Vivado Synthesis Defaults" AutoIncrementalCheckpoint="false" WriteIncrSynthDcp="false" Dir="$PRUNDIR/system_bd_system_ila_0_1_synth_1" IncludeInArchive="true" IsChild="false" AutoIncrementalDir="$PSRCDIR/utils_1/imports/system_bd_system_ila_0_1_synth_1" AutoRQSDir="$PSRCDIR/utils_1/imports/system_bd_system_ila_0_1_synth_1" ParallelReportGen="true">
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|
<Strategy Version="1" Minor="2">
|
|
<StratHandle Name="Vivado Synthesis Defaults" Flow="Vivado Synthesis 2024">
|
|
<Desc>Vivado Synthesis Defaults</Desc>
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|
</StratHandle>
|
|
<Step Id="synth_design"/>
|
|
</Strategy>
|
|
<GeneratedRun Dir="$PRUNDIR" File="gen_run.xml"/>
|
|
<ReportStrategy Name="Vivado Synthesis Default Reports" Flow="Vivado Synthesis 2024"/>
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|
<Report Name="ROUTE_DESIGN.REPORT_METHODOLOGY" Enabled="1"/>
|
|
<RQSFiles/>
|
|
</Run>
|
|
<Run Id="system_bd_auto_pc_0_synth_1" Type="Ft3:Synth" SrcSet="system_bd_auto_pc_0" Part="xc7z100ffg900-2" ConstrsSet="system_bd_auto_pc_0" Description="Vivado Synthesis Defaults" AutoIncrementalCheckpoint="false" WriteIncrSynthDcp="false" Dir="$PRUNDIR/system_bd_auto_pc_0_synth_1" IncludeInArchive="true" IsChild="false" AutoIncrementalDir="$PSRCDIR/utils_1/imports/system_bd_auto_pc_0_synth_1" AutoRQSDir="$PSRCDIR/utils_1/imports/system_bd_auto_pc_0_synth_1" ParallelReportGen="true">
|
|
<Strategy Version="1" Minor="2">
|
|
<StratHandle Name="Vivado Synthesis Defaults" Flow="Vivado Synthesis 2024">
|
|
<Desc>Vivado Synthesis Defaults</Desc>
|
|
</StratHandle>
|
|
<Step Id="synth_design"/>
|
|
</Strategy>
|
|
<GeneratedRun Dir="$PRUNDIR" File="gen_run.xml"/>
|
|
<ReportStrategy Name="Vivado Synthesis Default Reports" Flow="Vivado Synthesis 2024"/>
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|
<Report Name="ROUTE_DESIGN.REPORT_METHODOLOGY" Enabled="1"/>
|
|
<RQSFiles/>
|
|
</Run>
|
|
<Run Id="impl_1" Type="Ft2:EntireDesign" Part="xc7z100ffg900-2" ConstrsSet="constrs_1" Description="Default settings for Implementation." AutoIncrementalCheckpoint="false" WriteIncrSynthDcp="false" State="current" Dir="$PRUNDIR/impl_1" SynthRun="synth_1" IncludeInArchive="true" IsChild="false" GenFullBitstream="true" AutoIncrementalDir="$PSRCDIR/utils_1/imports/impl_1" LaunchOptions="-jobs 16 " AutoRQSDir="$PSRCDIR/utils_1/imports/impl_1" ParallelReportGen="true">
|
|
<Strategy Version="1" Minor="2">
|
|
<StratHandle Name="Vivado Implementation Defaults" Flow="Vivado Implementation 2019">
|
|
<Desc>Default settings for Implementation.</Desc>
|
|
</StratHandle>
|
|
<Step Id="init_design"/>
|
|
<Step Id="opt_design"/>
|
|
<Step Id="power_opt_design"/>
|
|
<Step Id="place_design"/>
|
|
<Step Id="post_place_power_opt_design"/>
|
|
<Step Id="phys_opt_design"/>
|
|
<Step Id="route_design"/>
|
|
<Step Id="post_route_phys_opt_design"/>
|
|
<Step Id="write_bitstream"/>
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|
</Strategy>
|
|
<GeneratedRun Dir="$PRUNDIR" File="gen_run.xml"/>
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|
<ReportStrategy Name="Vivado Implementation Default Reports" Flow="Vivado Implementation 2019"/>
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|
<Report Name="ROUTE_DESIGN.REPORT_METHODOLOGY" Enabled="1"/>
|
|
<RQSFiles/>
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|
</Run>
|
|
<Run Id="system_bd_processing_system7_0_0_impl_1" Type="Ft2:EntireDesign" Part="xc7z100ffg900-2" ConstrsSet="system_bd_processing_system7_0_0" Description="Default settings for Implementation." AutoIncrementalCheckpoint="false" WriteIncrSynthDcp="false" SynthRun="system_bd_processing_system7_0_0_synth_1" IncludeInArchive="false" IsChild="false" GenFullBitstream="true" AutoIncrementalDir="$PSRCDIR/utils_1/imports/system_bd_processing_system7_0_0_impl_1" AutoRQSDir="$PSRCDIR/utils_1/imports/system_bd_processing_system7_0_0_impl_1" ParallelReportGen="true">
|
|
<Strategy Version="1" Minor="2">
|
|
<StratHandle Name="Vivado Implementation Defaults" Flow="Vivado Implementation 2019"/>
|
|
<Step Id="init_design"/>
|
|
<Step Id="opt_design"/>
|
|
<Step Id="power_opt_design"/>
|
|
<Step Id="place_design"/>
|
|
<Step Id="post_place_power_opt_design"/>
|
|
<Step Id="phys_opt_design"/>
|
|
<Step Id="route_design"/>
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|
<Step Id="post_route_phys_opt_design"/>
|
|
<Step Id="write_bitstream"/>
|
|
</Strategy>
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|
<ReportStrategy Name="Vivado Implementation Default Reports" Flow="Vivado Implementation 2019"/>
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|
<Report Name="ROUTE_DESIGN.REPORT_METHODOLOGY" Enabled="1"/>
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|
<RQSFiles/>
|
|
</Run>
|
|
<Run Id="system_bd_rst_ps7_0_50M_0_impl_1" Type="Ft2:EntireDesign" Part="xc7z100ffg900-2" ConstrsSet="system_bd_rst_ps7_0_50M_0" Description="Default settings for Implementation." AutoIncrementalCheckpoint="false" WriteIncrSynthDcp="false" SynthRun="system_bd_rst_ps7_0_50M_0_synth_1" IncludeInArchive="false" IsChild="false" GenFullBitstream="true" AutoIncrementalDir="$PSRCDIR/utils_1/imports/system_bd_rst_ps7_0_50M_0_impl_1" AutoRQSDir="$PSRCDIR/utils_1/imports/system_bd_rst_ps7_0_50M_0_impl_1" ParallelReportGen="true">
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|
<Strategy Version="1" Minor="2">
|
|
<StratHandle Name="Vivado Implementation Defaults" Flow="Vivado Implementation 2024">
|
|
<Desc>Default settings for Implementation.</Desc>
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|
</StratHandle>
|
|
<Step Id="init_design"/>
|
|
<Step Id="opt_design"/>
|
|
<Step Id="power_opt_design"/>
|
|
<Step Id="place_design"/>
|
|
<Step Id="post_place_power_opt_design"/>
|
|
<Step Id="phys_opt_design"/>
|
|
<Step Id="route_design"/>
|
|
<Step Id="post_route_phys_opt_design"/>
|
|
<Step Id="write_bitstream"/>
|
|
</Strategy>
|
|
<ReportStrategy Name="Vivado Implementation Default Reports" Flow="Vivado Implementation 2024"/>
|
|
<Report Name="ROUTE_DESIGN.REPORT_METHODOLOGY" Enabled="1"/>
|
|
<RQSFiles/>
|
|
</Run>
|
|
<Run Id="system_bd_xadc_wiz_0_0_impl_1" Type="Ft2:EntireDesign" Part="xc7z100ffg900-2" ConstrsSet="system_bd_xadc_wiz_0_0" Description="Default settings for Implementation." AutoIncrementalCheckpoint="false" WriteIncrSynthDcp="false" SynthRun="system_bd_xadc_wiz_0_0_synth_1" IncludeInArchive="false" IsChild="false" GenFullBitstream="true" AutoIncrementalDir="$PSRCDIR/utils_1/imports/system_bd_xadc_wiz_0_0_impl_1" AutoRQSDir="$PSRCDIR/utils_1/imports/system_bd_xadc_wiz_0_0_impl_1" ParallelReportGen="true">
|
|
<Strategy Version="1" Minor="2">
|
|
<StratHandle Name="Vivado Implementation Defaults" Flow="Vivado Implementation 2024">
|
|
<Desc>Default settings for Implementation.</Desc>
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|
</StratHandle>
|
|
<Step Id="init_design"/>
|
|
<Step Id="opt_design"/>
|
|
<Step Id="power_opt_design"/>
|
|
<Step Id="place_design"/>
|
|
<Step Id="post_place_power_opt_design"/>
|
|
<Step Id="phys_opt_design"/>
|
|
<Step Id="route_design"/>
|
|
<Step Id="post_route_phys_opt_design"/>
|
|
<Step Id="write_bitstream"/>
|
|
</Strategy>
|
|
<ReportStrategy Name="Vivado Implementation Default Reports" Flow="Vivado Implementation 2024"/>
|
|
<Report Name="ROUTE_DESIGN.REPORT_METHODOLOGY" Enabled="1"/>
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|
<RQSFiles/>
|
|
</Run>
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|
<Run Id="system_bd_xbar_0_impl_1" Type="Ft2:EntireDesign" Part="xc7z100ffg900-2" ConstrsSet="system_bd_xbar_0" Description="Default settings for Implementation." AutoIncrementalCheckpoint="false" WriteIncrSynthDcp="false" SynthRun="system_bd_xbar_0_synth_1" IncludeInArchive="false" IsChild="false" GenFullBitstream="true" AutoIncrementalDir="$PSRCDIR/utils_1/imports/system_bd_xbar_0_impl_1" AutoRQSDir="$PSRCDIR/utils_1/imports/system_bd_xbar_0_impl_1" ParallelReportGen="true">
|
|
<Strategy Version="1" Minor="2">
|
|
<StratHandle Name="Vivado Implementation Defaults" Flow="Vivado Implementation 2024">
|
|
<Desc>Default settings for Implementation.</Desc>
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|
</StratHandle>
|
|
<Step Id="init_design"/>
|
|
<Step Id="opt_design"/>
|
|
<Step Id="power_opt_design"/>
|
|
<Step Id="place_design"/>
|
|
<Step Id="post_place_power_opt_design"/>
|
|
<Step Id="phys_opt_design"/>
|
|
<Step Id="route_design"/>
|
|
<Step Id="post_route_phys_opt_design"/>
|
|
<Step Id="write_bitstream"/>
|
|
</Strategy>
|
|
<ReportStrategy Name="Vivado Implementation Default Reports" Flow="Vivado Implementation 2024"/>
|
|
<Report Name="ROUTE_DESIGN.REPORT_METHODOLOGY" Enabled="1"/>
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|
<RQSFiles/>
|
|
</Run>
|
|
<Run Id="sys_clk_gen_impl_1" Type="Ft2:EntireDesign" Part="xc7z100ffg900-2" ConstrsSet="sys_clk_gen" Description="Default settings for Implementation." AutoIncrementalCheckpoint="false" WriteIncrSynthDcp="false" SynthRun="sys_clk_gen_synth_1" IncludeInArchive="false" IsChild="false" GenFullBitstream="true" AutoIncrementalDir="$PSRCDIR/utils_1/imports/sys_clk_gen_impl_1" AutoRQSDir="$PSRCDIR/utils_1/imports/sys_clk_gen_impl_1" ParallelReportGen="true">
|
|
<Strategy Version="1" Minor="2">
|
|
<StratHandle Name="Vivado Implementation Defaults" Flow="Vivado Implementation 2024">
|
|
<Desc>Default settings for Implementation.</Desc>
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|
</StratHandle>
|
|
<Step Id="init_design"/>
|
|
<Step Id="opt_design"/>
|
|
<Step Id="power_opt_design"/>
|
|
<Step Id="place_design"/>
|
|
<Step Id="post_place_power_opt_design"/>
|
|
<Step Id="phys_opt_design"/>
|
|
<Step Id="route_design"/>
|
|
<Step Id="post_route_phys_opt_design"/>
|
|
<Step Id="write_bitstream"/>
|
|
</Strategy>
|
|
<ReportStrategy Name="Vivado Implementation Default Reports" Flow="Vivado Implementation 2024"/>
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|
<Report Name="ROUTE_DESIGN.REPORT_METHODOLOGY" Enabled="1"/>
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|
<RQSFiles/>
|
|
</Run>
|
|
<Run Id="ad9653_fifo_impl_1" Type="Ft2:EntireDesign" Part="xc7z100ffg900-2" ConstrsSet="ad9653_fifo" Description="Default settings for Implementation." AutoIncrementalCheckpoint="false" WriteIncrSynthDcp="false" SynthRun="ad9653_fifo_synth_1" IncludeInArchive="false" IsChild="false" GenFullBitstream="true" AutoIncrementalDir="$PSRCDIR/utils_1/imports/ad9653_fifo_impl_1" AutoRQSDir="$PSRCDIR/utils_1/imports/ad9653_fifo_impl_1" ParallelReportGen="true">
|
|
<Strategy Version="1" Minor="2">
|
|
<StratHandle Name="Vivado Implementation Defaults" Flow="Vivado Implementation 2024">
|
|
<Desc>Default settings for Implementation.</Desc>
|
|
</StratHandle>
|
|
<Step Id="init_design"/>
|
|
<Step Id="opt_design"/>
|
|
<Step Id="power_opt_design"/>
|
|
<Step Id="place_design"/>
|
|
<Step Id="post_place_power_opt_design"/>
|
|
<Step Id="phys_opt_design"/>
|
|
<Step Id="route_design"/>
|
|
<Step Id="post_route_phys_opt_design"/>
|
|
<Step Id="write_bitstream"/>
|
|
</Strategy>
|
|
<ReportStrategy Name="Vivado Implementation Default Reports" Flow="Vivado Implementation 2024"/>
|
|
<Report Name="ROUTE_DESIGN.REPORT_METHODOLOGY" Enabled="1"/>
|
|
<RQSFiles/>
|
|
</Run>
|
|
<Run Id="system_bd_axi_spi_engine_0_0_impl_1" Type="Ft2:EntireDesign" Part="xc7z100ffg900-2" ConstrsSet="system_bd_axi_spi_engine_0_0" Description="Default settings for Implementation." AutoIncrementalCheckpoint="false" WriteIncrSynthDcp="false" SynthRun="system_bd_axi_spi_engine_0_0_synth_1" IncludeInArchive="false" IsChild="false" GenFullBitstream="true" AutoIncrementalDir="$PSRCDIR/utils_1/imports/system_bd_axi_spi_engine_0_0_impl_1" AutoRQSDir="$PSRCDIR/utils_1/imports/system_bd_axi_spi_engine_0_0_impl_1" ParallelReportGen="true">
|
|
<Strategy Version="1" Minor="2">
|
|
<StratHandle Name="Vivado Implementation Defaults" Flow="Vivado Implementation 2024">
|
|
<Desc>Default settings for Implementation.</Desc>
|
|
</StratHandle>
|
|
<Step Id="init_design"/>
|
|
<Step Id="opt_design"/>
|
|
<Step Id="power_opt_design"/>
|
|
<Step Id="place_design"/>
|
|
<Step Id="post_place_power_opt_design"/>
|
|
<Step Id="phys_opt_design"/>
|
|
<Step Id="route_design"/>
|
|
<Step Id="post_route_phys_opt_design"/>
|
|
<Step Id="write_bitstream"/>
|
|
</Strategy>
|
|
<ReportStrategy Name="Vivado Implementation Default Reports" Flow="Vivado Implementation 2024"/>
|
|
<Report Name="ROUTE_DESIGN.REPORT_METHODOLOGY" Enabled="1"/>
|
|
<RQSFiles/>
|
|
</Run>
|
|
<Run Id="system_bd_spi_engine_execution_0_0_impl_1" Type="Ft2:EntireDesign" Part="xc7z100ffg900-2" ConstrsSet="system_bd_spi_engine_execution_0_0" Description="Default settings for Implementation." AutoIncrementalCheckpoint="false" WriteIncrSynthDcp="false" SynthRun="system_bd_spi_engine_execution_0_0_synth_1" IncludeInArchive="false" IsChild="false" GenFullBitstream="true" AutoIncrementalDir="$PSRCDIR/utils_1/imports/system_bd_spi_engine_execution_0_0_impl_1" AutoRQSDir="$PSRCDIR/utils_1/imports/system_bd_spi_engine_execution_0_0_impl_1" ParallelReportGen="true">
|
|
<Strategy Version="1" Minor="2">
|
|
<StratHandle Name="Vivado Implementation Defaults" Flow="Vivado Implementation 2024">
|
|
<Desc>Default settings for Implementation.</Desc>
|
|
</StratHandle>
|
|
<Step Id="init_design"/>
|
|
<Step Id="opt_design"/>
|
|
<Step Id="power_opt_design"/>
|
|
<Step Id="place_design"/>
|
|
<Step Id="post_place_power_opt_design"/>
|
|
<Step Id="phys_opt_design"/>
|
|
<Step Id="route_design"/>
|
|
<Step Id="post_route_phys_opt_design"/>
|
|
<Step Id="write_bitstream"/>
|
|
</Strategy>
|
|
<ReportStrategy Name="Vivado Implementation Default Reports" Flow="Vivado Implementation 2024"/>
|
|
<Report Name="ROUTE_DESIGN.REPORT_METHODOLOGY" Enabled="1"/>
|
|
<RQSFiles/>
|
|
</Run>
|
|
<Run Id="ila_rx_impl_1" Type="Ft2:EntireDesign" Part="xc7z100ffg900-2" ConstrsSet="ila_rx" Description="Default settings for Implementation." AutoIncrementalCheckpoint="false" WriteIncrSynthDcp="false" SynthRun="ila_rx_synth_1" IncludeInArchive="false" IsChild="false" GenFullBitstream="true" AutoIncrementalDir="$PSRCDIR/utils_1/imports/ila_rx_impl_1" AutoRQSDir="$PSRCDIR/utils_1/imports/ila_rx_impl_1" ParallelReportGen="true">
|
|
<Strategy Version="1" Minor="2">
|
|
<StratHandle Name="Vivado Implementation Defaults" Flow="Vivado Implementation 2024">
|
|
<Desc>Default settings for Implementation.</Desc>
|
|
</StratHandle>
|
|
<Step Id="init_design"/>
|
|
<Step Id="opt_design"/>
|
|
<Step Id="power_opt_design"/>
|
|
<Step Id="place_design"/>
|
|
<Step Id="post_place_power_opt_design"/>
|
|
<Step Id="phys_opt_design"/>
|
|
<Step Id="route_design"/>
|
|
<Step Id="post_route_phys_opt_design"/>
|
|
<Step Id="write_bitstream"/>
|
|
</Strategy>
|
|
<ReportStrategy Name="Vivado Implementation Default Reports" Flow="Vivado Implementation 2024"/>
|
|
<Report Name="ROUTE_DESIGN.REPORT_METHODOLOGY" Enabled="1"/>
|
|
<RQSFiles/>
|
|
</Run>
|
|
<Run Id="system_bd_system_ila_0_1_impl_1" Type="Ft2:EntireDesign" Part="xc7z100ffg900-2" ConstrsSet="system_bd_system_ila_0_1" Description="Default settings for Implementation." AutoIncrementalCheckpoint="false" WriteIncrSynthDcp="false" SynthRun="system_bd_system_ila_0_1_synth_1" IncludeInArchive="false" IsChild="false" GenFullBitstream="true" AutoIncrementalDir="$PSRCDIR/utils_1/imports/system_bd_system_ila_0_1_impl_1" AutoRQSDir="$PSRCDIR/utils_1/imports/system_bd_system_ila_0_1_impl_1" ParallelReportGen="true">
|
|
<Strategy Version="1" Minor="2">
|
|
<StratHandle Name="Vivado Implementation Defaults" Flow="Vivado Implementation 2024">
|
|
<Desc>Default settings for Implementation.</Desc>
|
|
</StratHandle>
|
|
<Step Id="init_design"/>
|
|
<Step Id="opt_design"/>
|
|
<Step Id="power_opt_design"/>
|
|
<Step Id="place_design"/>
|
|
<Step Id="post_place_power_opt_design"/>
|
|
<Step Id="phys_opt_design"/>
|
|
<Step Id="route_design"/>
|
|
<Step Id="post_route_phys_opt_design"/>
|
|
<Step Id="write_bitstream"/>
|
|
</Strategy>
|
|
<ReportStrategy Name="Vivado Implementation Default Reports" Flow="Vivado Implementation 2024"/>
|
|
<Report Name="ROUTE_DESIGN.REPORT_METHODOLOGY" Enabled="1"/>
|
|
<RQSFiles/>
|
|
</Run>
|
|
<Run Id="system_bd_auto_pc_0_impl_1" Type="Ft2:EntireDesign" Part="xc7z100ffg900-2" ConstrsSet="system_bd_auto_pc_0" Description="Default settings for Implementation." AutoIncrementalCheckpoint="false" WriteIncrSynthDcp="false" SynthRun="system_bd_auto_pc_0_synth_1" IncludeInArchive="false" IsChild="false" GenFullBitstream="true" AutoIncrementalDir="$PSRCDIR/utils_1/imports/system_bd_auto_pc_0_impl_1" AutoRQSDir="$PSRCDIR/utils_1/imports/system_bd_auto_pc_0_impl_1" ParallelReportGen="true">
|
|
<Strategy Version="1" Minor="2">
|
|
<StratHandle Name="Vivado Implementation Defaults" Flow="Vivado Implementation 2024">
|
|
<Desc>Default settings for Implementation.</Desc>
|
|
</StratHandle>
|
|
<Step Id="init_design"/>
|
|
<Step Id="opt_design"/>
|
|
<Step Id="power_opt_design"/>
|
|
<Step Id="place_design"/>
|
|
<Step Id="post_place_power_opt_design"/>
|
|
<Step Id="phys_opt_design"/>
|
|
<Step Id="route_design"/>
|
|
<Step Id="post_route_phys_opt_design"/>
|
|
<Step Id="write_bitstream"/>
|
|
</Strategy>
|
|
<ReportStrategy Name="Vivado Implementation Default Reports" Flow="Vivado Implementation 2024"/>
|
|
<Report Name="ROUTE_DESIGN.REPORT_METHODOLOGY" Enabled="1"/>
|
|
<RQSFiles/>
|
|
</Run>
|
|
</Runs>
|
|
<MsgRule>
|
|
<MsgAttr Name="RuleType" Val="0"/>
|
|
<MsgAttr Name="Limit" Val="-1"/>
|
|
<MsgAttr Name="NewSeverity" Val="ANY"/>
|
|
<MsgAttr Name="Id" Val="Common 17-345"/>
|
|
<MsgAttr Name="Severity" Val="ANY"/>
|
|
<MsgAttr Name="ShowRule" Val="1"/>
|
|
<MsgAttr Name="RuleSource" Val="8"/>
|
|
<MsgAttr Name="StringIsRegExp" Val="0"/>
|
|
<MsgAttr Name="RuleId" Val="1"/>
|
|
<MsgAttr Name="Note" Val=""/>
|
|
<MsgAttr Name="Author" Val=""/>
|
|
<MsgAttr Name="CreatedTimestamp" Val=""/>
|
|
<MsgAttr Name="StringsToMatch" Val="ERROR: [Common 17-345] A valid license was not found for feature 'Synthesis' and/or device 'xc7z100'. Please run the Vivado License Manager for assistance in determining
|
|
which features and devices are licensed for your system.
|
|
Resolution: Check the status of your licenses in the Vivado License Manager. For debug help search Xilinx Support for "Licensing FAQ". If you are using a license server, verify that the license server is up and running a version of the xilinx daemon that is compatible with the version of Xilinx software that you are using. Please note that Vivado 2017.3 and later requires upgrading your license server tools to the Flex 11.14.1 tools. Please confirm with your license admin that the correct version of the license server tools are installed."/>
|
|
</MsgRule>
|
|
<Board/>
|
|
<DashboardSummary Version="1" Minor="0">
|
|
<Dashboards>
|
|
<Dashboard Name="default_dashboard">
|
|
<Gadgets>
|
|
<Gadget Name="drc_1" Type="drc" Version="1" Row="2" Column="0">
|
|
<GadgetParam Name="REPORTS" Type="string_list" Value="impl_1#impl_1_route_report_drc_0 "/>
|
|
</Gadget>
|
|
<Gadget Name="methodology_1" Type="methodology" Version="1" Row="2" Column="1">
|
|
<GadgetParam Name="REPORTS" Type="string_list" Value="impl_1#impl_1_route_report_methodology_0 "/>
|
|
</Gadget>
|
|
<Gadget Name="power_1" Type="power" Version="1" Row="1" Column="0">
|
|
<GadgetParam Name="REPORTS" Type="string_list" Value="impl_1#impl_1_route_report_power_0 "/>
|
|
</Gadget>
|
|
<Gadget Name="timing_1" Type="timing" Version="1" Row="0" Column="1">
|
|
<GadgetParam Name="REPORTS" Type="string_list" Value="impl_1#impl_1_route_report_timing_summary_0 "/>
|
|
</Gadget>
|
|
<Gadget Name="utilization_1" Type="utilization" Version="1" Row="0" Column="0">
|
|
<GadgetParam Name="REPORTS" Type="string_list" Value="synth_1#synth_1_synth_report_utilization_0 "/>
|
|
<GadgetParam Name="RUN.STEP" Type="string" Value="synth_design"/>
|
|
<GadgetParam Name="RUN.TYPE" Type="string" Value="synthesis"/>
|
|
</Gadget>
|
|
<Gadget Name="utilization_2" Type="utilization" Version="1" Row="1" Column="1">
|
|
<GadgetParam Name="REPORTS" Type="string_list" Value="impl_1#impl_1_place_report_utilization_0 "/>
|
|
</Gadget>
|
|
</Gadgets>
|
|
</Dashboard>
|
|
<CurrentDashboard>default_dashboard</CurrentDashboard>
|
|
</Dashboards>
|
|
</DashboardSummary>
|
|
</Project>
|