*add antenna info configs (scan beam directions)

df_datalink_ge/src/main.c

@@ -110,6 +110,7 @@ static PHY_CONFIG phyConfig =
 	.devId = 0,
 	.baseAddr = PHY_BASEADDR,
 	.antBramId = PHY_ANTCONFIG_BRAM_DEVICE_ID,
+	.antInfoBramId = -1,
 	.txBramId = PHY_TXBUFF_BRAM_DEVICE_ID,
 	.rxBramId = PHY_RXBUFF_BRAM_DEVICE_ID,
 	.hwXadcId = PHY_HW_XADC_DEVICE_ID,

df_datalink_sp/src/config/app_config.h

@@ -58,6 +58,7 @@
 #define PHY_BEAM_FORMING_ENABLE
 // -- Antenna Bram Configs
 #define PHY_ANTCONFIG_BRAM_DEVICE_ID XPAR_PHY_DATA_INTERFACE_ANT_INFO_BRAM_CTRL_DEVICE_ID
+#define PHY_ANTINFO_BRAM_DEVICE_ID XPAR_PHY_DATA_INTERFACE_ANT_BEAM_BRAM_CTRL_DEVICE_ID
 // -- Buffers
 #define PHY_TXBUFF_BRAM_DEVICE_ID XPAR_PHY_DATA_INTERFACE_TX_FRAME_BRAM_CTRL_DEVICE_ID
 #define PHY_RXBUFF_BRAM_DEVICE_ID XPAR_PHY_DATA_INTERFACE_RX_FRAME_BRAM_CTRL_DEVICE_ID

df_datalink_sp/src/main.c

@@ -96,6 +96,7 @@ static PHY_CONFIG phyConfig = {
 	.devId = 0,
 	.baseAddr = PHY_BASEADDR,
 	.antBramId = PHY_ANTCONFIG_BRAM_DEVICE_ID,
+	.antInfoBramId = PHY_ANTINFO_BRAM_DEVICE_ID,
 	.txBramId = PHY_TXBUFF_BRAM_DEVICE_ID,
 	.rxBramId = PHY_RXBUFF_BRAM_DEVICE_ID,
 	.hwXadcId = PHY_HW_XADC_DEVICE_ID,

df_datalink_sp/src/networking/phy_layer/phy_layer.c

@@ -456,6 +456,40 @@ int32_t Phy_InstInit(PHY_INST **instPtr, PHY_CONFIG *phyConfig)
 	(*instPtr)->recvDataAddr = rxDataBram.Config.MemBaseAddress;
 	(*instPtr)->sendDataAddr = txDataBram.Config.MemBaseAddress;
 
+	// Setup antenna presets
+	XBram antInfoBram;
+	if (phyConfig->antInfoBramId != -1)
+	{
+		bramConfigPtr = XBram_LookupConfig(phyConfig->antInfoBramId);
+		if (bramConfigPtr == NULL)
+		{
+			Status = EDCONF;
+			goto init_error;
+		}
+		Status = XBram_CfgInitialize(&antInfoBram, bramConfigPtr,
+									bramConfigPtr->CtrlBaseAddress);
+		if (Status != SUCCESS)
+		{
+			goto init_error;
+		}
+		/*
+		* Execute the BRAM driver selftest.
+		*/
+		Status = XBram_SelfTest(&antConfigBram, 0);
+		if (Status != SUCCESS)
+		{
+			goto init_error;
+		}
+
+		memccpy(antConfigBram.config.MemBaseAddress, 
+				antSubnrrwPattern, sizeof(antSubnrrwPattern));
+		uint32_t phyMainCtrl = PhyRead(*instPtr, PHY_MAIN_CTRL);
+		phyMainCtrl &= ~PHY_MAIN_CTRL_NSCAN_MASK;
+		phyMainCtrl |= PHY_MAIN_CTRL_NSCAN_MASK & 
+						(L1_NUM_ANT_SUBNRRW_PATTERN << PHY_MAIN_CTRL_NSCAN_SHIFT);
+		PhyWrite(*instPtr, phyMainCtrl);
+	}
+
 	/* Initialize the XAdc driver. */
 	XAdcPs_Config *xadcConfigPtr;
 

df_datalink_sp/src/networking/phy_layer/phy_layer.h

@@ -181,6 +181,7 @@ typedef struct
 	uint32_t txBramId;
 	uint32_t rxBramId;
 	uint32_t antBramId;
+	uint32_t antInfoBramId;
 	uint32_t hwXadcId;
 	uintptr_t baseAddr;
 #ifndef EMULATION

df_datalink_sp/src/networking/phy_layer/phy_reg.h

@@ -40,6 +40,9 @@
 #define PHY_MAIN_CTRL_MODE_SHIFT 8
 #define PHY_MAIN_CTRL_MODE_WIDTH 8
 #define PHY_MAIN_CTRL_MODE_MASK 0x0000FF00U
+#define PHY_MAIN_CTRL_NSCAN_SHIFT 16
+#define PHY_MAIN_CTRL_NSCAN_WIDTH 8
+#define PHY_MAIN_CTRL_NSCAN_MASK 0x00FF0000U
 
 #define PHY_MAIN_CTRL_EN_EN 0x00000001U
 #define PHY_MAIN_CTRL_EN_DSBL 0x00000000U