From b42316dd84668bc9104715787c9249aa0d7f1b83 Mon Sep 17 00:00:00 2001 From: Josh Gao Date: Mon, 1 Sep 2025 15:45:45 +0800 Subject: [PATCH] =?UTF-8?q?fix:=20=E4=BF=AE=E5=A4=8DRFSoC=20Timer=E4=B8=8D?= =?UTF-8?q?=E6=AD=A3=E5=B8=B8=E8=BF=90=E8=A1=8C=E7=9A=84=E9=97=AE=E9=A2=98?= =?UTF-8?q?;=20=E6=9A=82=E6=97=B6=E4=BF=AE=E6=94=B9Z7=E7=9A=84FPGA?= =?UTF-8?q?=E6=B8=A9=E5=BA=A6=E5=9B=9E=E8=AF=BB?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- src/main.c | 21 +++++++++++++++++--- src/networking/link_layer/link_layer.c | 2 +- src/networking/link_layer/link_layer_types.h | 2 +- src/networking/link_layer/service.c | 2 +- src/networking/phy_layer/phy_layer.c | 10 +++++----- src/networking/phy_layer/phy_layer.h | 2 +- 6 files changed, 27 insertions(+), 12 deletions(-) diff --git a/src/main.c b/src/main.c index 267ac54..10aca2e 100644 --- a/src/main.c +++ b/src/main.c @@ -427,9 +427,24 @@ void AppTimer_IntrHandler(void *context) { Phy_UpdateLogging(phyInstPtr); } - + /* + * Read the new Control/Status Register content. + */ + uint32_t ControlStatusReg; + ControlStatusReg = XTmrCtr_ReadReg(((XTmrCtr *)xdesc->instance)->BaseAddress, + 0, XTC_TCSR_OFFSET); + /* + * Acknowledge the interrupt by clearing the + * interrupt bit in the timer control status + * register, this is done after calling the + * handler so the application could call + * IsExpired, the interrupt is cleared by + * writing a 1 to the interrupt bit of the + * register without changing any of the other + * bits + */ XTmrCtr_WriteReg(((XTmrCtr *)xdesc->instance)->BaseAddress, 0, - XTC_TCSR_OFFSET, XTC_CSR_INT_OCCURED_MASK); + XTC_TCSR_OFFSET, ControlStatusReg | XTC_CSR_INT_OCCURED_MASK); } #else #error No timer implementation! @@ -551,7 +566,7 @@ int main(void) } // Start System Monitor logging. - timer_start(logTmPtr); + Status = timer_start(logTmPtr); DBG_PRINT("Physical started...\n"); Phy_Start(phyInstPtr); diff --git a/src/networking/link_layer/link_layer.c b/src/networking/link_layer/link_layer.c index bae3468..2764044 100644 --- a/src/networking/link_layer/link_layer.c +++ b/src/networking/link_layer/link_layer.c @@ -28,7 +28,7 @@ #include "circ_queue.h" #include "../time_ctrl/time_ctrl.h" #ifndef EMULATION -#include "../config/app_config.h" +#include "../../config/app_config.h" #endif /************************** Constant Definitions *****************************/ #define NET_START_TIME_INFTY UINT32_MAX diff --git a/src/networking/link_layer/link_layer_types.h b/src/networking/link_layer/link_layer_types.h index feb545b..1559399 100644 --- a/src/networking/link_layer/link_layer_types.h +++ b/src/networking/link_layer/link_layer_types.h @@ -25,7 +25,7 @@ #include "geometry/quaternion.h" #include "../phy_layer/phy_layer.h" #ifndef EMULATION -#include "../config/app_config.h" +#include "../../config/app_config.h" #endif /************************** Constant Definitions *****************************/ /** diff --git a/src/networking/link_layer/service.c b/src/networking/link_layer/service.c index 15fa3af..c7e56c4 100644 --- a/src/networking/link_layer/service.c +++ b/src/networking/link_layer/service.c @@ -29,7 +29,7 @@ #include "common.h" #include "circ_queue.h" #ifndef EMULATION -#include "../config/app_config.h" +#include "../../config/app_config.h" #endif /************************** Constant Definitions *****************************/ /***************** Macros (Inline Functions) Definitions *********************/ diff --git a/src/networking/phy_layer/phy_layer.c b/src/networking/phy_layer/phy_layer.c index f4abdf3..d9cfbb7 100644 --- a/src/networking/phy_layer/phy_layer.c +++ b/src/networking/phy_layer/phy_layer.c @@ -1069,7 +1069,6 @@ void Phy_RefreshHwSate(PHY_INST *instPtr) : ((evalData < TEMPERATURE_MIN) ? INT8_MIN : (int8_t)round(evalData / TEMPERATURE_LSB)); // FIXME: XADC range needs further refine instPtr->hwSate.spFpgaVolt = (VOLT_PS_OK | VOLT_PSAUX_OK | VOLT_DDR_OK | VOLT_PL_OK | VOLT_PLAUX_OK | VOLT_BRAM_OK); - instPtr->hwSate.spClkState = (CLK_SP_PLL1_LOCK | CLK_SP_PLL2_LOCK); instPtr->hwSate.isSpOk = (instPtr->hwSate.spFpgaVolt == (VOLT_PS_OK | VOLT_PSAUX_OK | VOLT_DDR_OK | VOLT_PL_OK | VOLT_PLAUX_OK | VOLT_BRAM_OK)) && (instPtr->hwSate.spClkState == (CLK_SP_PLL1_LOCK | CLK_SP_PLL2_LOCK)); #else @@ -1149,10 +1148,11 @@ void Phy_RefreshHwSate(PHY_INST *instPtr) // -- Update FPGA Chip temperature, unit 1 deg rawData = XAdcPs_GetAdcData(&(instPtr->hwXadc), XADCPS_CH_TEMP); evalData = XAdcPs_RawToTemperature(rawData); - instPtr->hwSate.spFpgaTemp = (evalData > TEMPERATURE_MAX) - ? INT8_MAX - : ((evalData < TEMPERATURE_MIN) ? INT8_MIN : (int8_t)round(evalData / TEMPERATURE_LSB)); -// FIXME: XADC readback is required +// instPtr->hwSate.spFpgaTemp = (evalData > TEMPERATURE_MAX) +// ? INT8_MAX +// : ((evalData < TEMPERATURE_MIN) ? INT8_MIN : (int8_t)round(evalData / TEMPERATURE_LSB)); + // FIXME: XADC readback is required + instPtr->hwSate.spFpgaTemp = ((instPtr->hwSate.spAdTemp_0 - 5) + (instPtr->hwSate.spAdTemp_1 - 7)) / 2; instPtr->hwSate.spFpgaVolt = (VOLT_PS_OK | VOLT_PSAUX_OK | VOLT_DDR_OK | VOLT_PL_OK | VOLT_PLAUX_OK | VOLT_BRAM_OK); instPtr->hwSate.isSpOk = (instPtr->hwSate.spFpgaVolt == (VOLT_PS_OK | VOLT_PSAUX_OK | VOLT_DDR_OK | VOLT_PL_OK | VOLT_PLAUX_OK | VOLT_BRAM_OK)) && (instPtr->hwSate.spClkState == (CLK_SP_PLL1_LOCK | CLK_SP_PLL2_LOCK)) diff --git a/src/networking/phy_layer/phy_layer.h b/src/networking/phy_layer/phy_layer.h index 34a189e..ba35acb 100644 --- a/src/networking/phy_layer/phy_layer.h +++ b/src/networking/phy_layer/phy_layer.h @@ -24,7 +24,7 @@ #include "common.h" #ifndef EMULATION #include "xbram.h" -#include "../config/app_config.h" +#include "../../config/app_config.h" #ifdef HSJL_GE // Zynq MPSoC (Zynq UltraScale+) #include "xsysmon.h" #else