forked from 0xha0/df_datalink
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10
Commits
| Author | SHA1 | Date | |
|---|---|---|---|
 josh
|
e2c4733a93 | ||
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josh
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d8ed94bf2b | ||
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josh
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169cb6bd91 | ||
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josh
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6d665eb853 | ||
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josh
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b8e8c6272a | ||
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josh
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6b5ab3dc59 | ||
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josh
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0339fd03c3 | ||
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josh
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a6aff34dee | ||
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josh
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08e1965a8e | ||
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josh
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0753c698f7 |
@@ -46,7 +46,7 @@
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/************************** Function Prototypes ******************************/
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int32_t SetupInterruptSystem(struct irq_ctrl_desc *descPtr);
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void Phy_IntrHandler(void *context);
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void PeriodicPull_Handler(void *callBackRef);
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void PeriodicPoll_Handler(void *callBackRef);
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void ScuTimer_IntrHandler(void *context);
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void Mpc_RxIntrHandler(void *context);
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void Mpc_TxIntrHandler(void *context);
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@@ -57,9 +57,9 @@ struct callback_desc phy_callback_desc =
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.ctx = NULL
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};
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struct callback_desc periodicpull_callback_desc =
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struct callback_desc periodicpoll_callback_desc =
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{
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.callback = PeriodicPull_Handler,
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.callback = PeriodicPoll_Handler,
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.ctx = NULL
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};
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@@ -88,7 +88,8 @@ L2_CONFIG linkConfig =
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.clustId = 1,
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.myId = 1,
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.headId = 1,
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.netScale = 2,
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.netScale = 10,
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.serviceRate = L2_SVC_128K,
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.phyInstPtr = NULL, // physical layer reference
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.tmcInstPtr = NULL
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};
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@@ -246,7 +247,7 @@ int32_t SetupInterruptSystem(struct irq_ctrl_desc *descPtr)
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return Status;
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}
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// Connect the interrupt service routine isr1 to the interrupt controller
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Status = irq_register_callback(descPtr, PERIODIC_5MS_INTR_ID, &periodicpull_callback_desc);
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Status = irq_register_callback(descPtr, PERIODIC_5MS_INTR_ID, &periodicpoll_callback_desc);
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if (Status != SUCCESS)
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{
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DBG_ERROR("PHY_INTR register callback FAILED, ErrorCode: %" PRId32 ".\n", Status);
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@@ -341,14 +342,14 @@ void Phy_IntrHandler(void *context)
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/****************************************************************************/
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/**
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* Handler of periodic 5ms interrupt
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* Handler of periodic 2 ms interrupt
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*
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* @param callBackRef is the linklayer instance pointer.
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*
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* @return None.
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*
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*****************************************************************************/
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void PeriodicPull_Handler(void *callBackRef)
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void PeriodicPoll_Handler(void *callBackRef)
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{
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int32_t Status;
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Status = Linklayer_Proc(linkInstPtr);
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@@ -357,7 +358,7 @@ void PeriodicPull_Handler(void *callBackRef)
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DBG_ERROR("Link layer runs failed, with error code: %" PRId32 "\n", Status);
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_nop_();
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}
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} // PeriodicPull_Handler
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} // PeriodicPoll_Handler
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/*****************************************************************************/
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/**
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@@ -38,7 +38,7 @@
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/************************** Function Prototypes ******************************/
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int32_t SetupInterruptSystem(struct irq_ctrl_desc *descPtr);
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void Phy_IntrHandler(void *context);
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void PeriodicPull_Handler(void *callBackRef);
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void PeriodicPoll_Handler(void *callBackRef);
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void ScuTimer_IntrHandler(void *context);
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void Systembus_RxIntrHandler(void *context);
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void Systembus_TxIntrHandler(void *context);
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@@ -49,8 +49,8 @@ struct callback_desc phy_callback_desc = {
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.ctx = NULL
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};
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struct callback_desc periodicpull_callback_desc = {
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.callback = PeriodicPull_Handler,
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struct callback_desc periodicpoll_callback_desc = {
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.callback = PeriodicPoll_Handler,
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.ctx = NULL
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};
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@@ -94,7 +94,6 @@ static PHY_CONFIG phyConfig = {
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.devId = PHY_DEVICE_ID,
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.baseAddr = PHY_BASEADDR,
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.antBramId = PHY_ANTCONFIG_BRAM_DEVICE_ID,
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.antInfoBramId = PHY_ANTINFO_BRAM_DEVICE_ID,
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.txBramId = PHY_TXBUFF_BRAM_DEVICE_ID,
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.rxBramId = PHY_RXBUFF_BRAM_DEVICE_ID,
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.hwXadcId = PHY_HW_XADC_DEVICE_ID,
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@@ -190,7 +189,7 @@ int32_t SetupInterruptSystem(struct irq_ctrl_desc *descPtr)
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return Status;
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}
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// Connect the interrupt service routine isr1 to the interrupt controller
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Status = irq_register_callback(descPtr, PERIODIC_5MS_INTR_ID, &periodicpull_callback_desc);
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Status = irq_register_callback(descPtr, PERIODIC_5MS_INTR_ID, &periodicpoll_callback_desc);
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if (Status != SUCCESS)
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{
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DBG_ERROR("PHY_INTR register callback FAILED, ErrorCode: %" PRId32 ".\n", Status);
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@@ -282,17 +281,16 @@ void Phy_IntrHandler(void *context)
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Phy_UpdateState(phyInstPtr);
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} // PhyIntr_Handler
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/****************************************************************************/
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/**
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* Handler of periodic 5ms interrupt
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* Handler of periodic 2ms interrupt
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*
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* @param callBackRef is the linklayer instance pointer.
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*
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* @return None.
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*
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*****************************************************************************/
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void PeriodicPull_Handler(void *callBackRef)
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void PeriodicPoll_Handler(void *callBackRef)
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{
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int32_t Status;
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Status = Linklayer_Proc(linkInstPtr);
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@@ -301,7 +299,7 @@ void PeriodicPull_Handler(void *callBackRef)
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DBG_ERROR("Link layer runs failed, with error code: %" PRId32 "\n", Status);
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_nop_();
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}
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} // PeriodicPull_Handler
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} // PeriodicPoll_Handler
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/*****************************************************************************/
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/**
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@@ -81,7 +81,7 @@ void L2_FrameGetChunk(uint8_t *frame, size_t offset, size_t bytes, void *chunk)
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* SUCCESS
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*
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******************************************************************************/
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static int32_t L2_CrcGen(uint8_t *dataBuff, uint32_t dataLen, L2_CRC_TYPE crcType, uint32_t *crc)
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int32_t L2_CrcGen(uint8_t *dataBuff, uint32_t dataLen, L2_CRC_TYPE crcType, uint32_t *crc)
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{
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ASSERT(dataBuff != NULL);
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int32_t Status;
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@@ -33,7 +33,7 @@
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#endif
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/************************** Constant Definitions *****************************/
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#define NET_START_TIME_INFTY UINT32_MAX
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#define LINK_BROCK_THRESHOLD L2_SLOTS_PER_FRAME // 0.5 secods
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#define LINK_BROCK_THRESHOLD L2_SLOTS_PER_FRAME // 1 seconds
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/************************** Variable Definitions *****************************/
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/***************** Macros (Inline Functions) Definitions *********************/
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@@ -59,7 +59,7 @@ inline void L2_RcdShift(L2_RCD *rcd, uint32_t netxVal)
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}
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/**
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* @brief helper function to update linkelayer state
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* @brief helper function to update linklayer state
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*/
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static inline void UpdateMainSate(L2_INST *instPtr, L2_NODE_STATE newSate)
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{
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@@ -131,7 +131,7 @@ static void L2_FrameStateUpdate(L2_INST *instPtr)
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ASSERT(instPtr != NULL);
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PHY_INST *phyRef = instPtr->config.phyInstPtr;
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bool isValid;
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L2_FRAME_TYPE recvType = L2_GetLastOptFrameType(instPtr);
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L2_FRAME_TYPE recvType = L2_GetLastFrameType(instPtr);
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isValid = false;
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// Update frame state.
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if (Phy_IsFrameValid(phyRef) == false)
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@@ -148,20 +148,34 @@ static void L2_FrameStateUpdate(L2_INST *instPtr)
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// Update frame state.
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switch (recvType)
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{
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case L2_SCAN_FRAME:
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case L2_ADV_FRAME:
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isValid = L2_CrcCheck(instPtr->recvPktData, L2_ADV_PACK_LEN, L2_CRC16_1021);
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case L2_FRAME_ADV:
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isValid = L2_CrcCheck(instPtr->recvPktData, L2_GetFrameLen(L2_FRAME_ADV, L2_SVC_NONE), L2_CRC8_31);
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instPtr->log.advRecvCnt++;
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instPtr->log.advCorrectCnt = isValid ? instPtr->log.advCorrectCnt + 1 : instPtr->log.advCorrectCnt;
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break;
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case L2_CFM_FRAME:
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isValid = L2_CrcCheck(instPtr->recvPktData, L2_CMF_PACK_LEN, L2_CRC16_1021);
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instPtr->log.cfmRecvCnt++;
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instPtr->log.cfmCorrectCnt = isValid ? instPtr->log.cfmCorrectCnt + 1 : instPtr->log.cfmCorrectCnt;
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case L2_FRAME_ACK:
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isValid = L2_CrcCheck(instPtr->recvPktData, L2_GetFrameLen(L2_FRAME_ACK, L2_SVC_NONE), L2_CRC8_31);
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instPtr->log.ackRecvCnt++;
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instPtr->log.ackCorrectCnt = isValid ? instPtr->log.ackCorrectCnt + 1 : instPtr->log.ackCorrectCnt;
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break;
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case L2_SVC_FRAME:
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case L2_FRAME_DIS:
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isValid = L2_CrcCheck(instPtr->recvPktData, L2_GetFrameLen(L2_FRAME_DIS, L2_SVC_NONE), L2_CRC8_31);
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instPtr->log.disRecvCnt++;
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instPtr->log.disCorrectCnt = isValid ? instPtr->log.disCorrectCnt + 1 : instPtr->log.disCorrectCnt;
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break;
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case L2_FRAME_MNG:
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isValid = L2_CrcCheck(instPtr->recvPktData, L2_GetFrameLen(L2_FRAME_MNG, L2_SVC_NONE), L2_CRC8_31);
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instPtr->log.mngRecvCnt++;
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instPtr->log.mngCorrectCnt = isValid ? instPtr->log.mngCorrectCnt + 1 : instPtr->log.mngCorrectCnt;
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break;
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case L2_FRAME_RTT:
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isValid = L2_CrcCheck(instPtr->recvPktData, L2_GetFrameLen(L2_FRAME_RTT, L2_SVC_NONE), L2_CRC8_31);
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instPtr->log.rttRecvCnt++;
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instPtr->log.rttCorrectCnt = isValid ? instPtr->log.rttCorrectCnt + 1 : instPtr->log.rttCorrectCnt;
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break;
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case L2_FRAME_SVC:
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#ifndef DATALINK_ENABLE_BERTEST
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isValid = L2_CrcCheck(instPtr->recvPktData, L2_SVC_PACK_LEN, L2_CRC16_1021);
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isValid = L2_CrcCheck(instPtr->recvPktData, L2_GetFrameLen(L2_FRAME_SVC, instPtr->config.serviceRate), L2_CRC8_31);
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#else
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isValid = true;
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#endif
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@@ -265,9 +279,9 @@ inline bool L2_isCxn2Net(L2_INST *instPtr)
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/**
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* @brief Get corresponding frame length in byte of L2 frame.
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*/
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inline uint32_t L2_GetFrameLen(L2_FRAME_TYPE l2FrameType)
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inline uint32_t L2_GetFrameLen(L2_FRAME_TYPE l2FrameType, L2_SVC_RATE l2SvcRate)
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{
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return Phy_GetFrameLen(L2_L2frame2L1frame(l2FrameType));
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return Phy_GetFrameLen(L2_L2frame2L1frame(l2FrameType, l2SvcRate));
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}
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/**
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@@ -377,57 +391,128 @@ inline L2_TOR_TYPE L2_GetNextTor(L2_INST *instPtr)
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return instPtr->tor.next;
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}
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/*****************************************************************************/
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/**
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* @brief Infer last received frame type.
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*
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* @param instPtr A pointer to physical layer control instance.
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*
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* @return L2_FRAME_TYPE.
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*
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******************************************************************************/
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L2_FRAME_TYPE L2_GetLastOptFrameType(L2_INST *instPtr)
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* @brief Get service rate of the node.
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*/
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inline L2_SVC_RATE L2_GetServiceRate(L2_INST *instPtr)
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{
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if (instPtr->myInfo.nodeType == L2_NODE_HEAD || L2_isCxn2Net(instPtr))
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{
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return instPtr->frame.curr;
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}
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switch (instPtr->scanFSM->scanStage)
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{
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case L2_SCAN_INIT_STAGE:
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return L2_SCAN_FRAME;
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case L2_SCAN_ADV_STAGE:
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return L2_ADV_FRAME;
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case L2_SCAN_CFM_STAGE:
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return L2_CFM_FRAME;
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default:
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return L2_NONE_FRAME;
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}
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ASSERT(instPtr != NULL);
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return instPtr->config.serviceRate;
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}
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/*****************************************************************************/
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/**
|
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* @brief Convert L2 frame type to L1 frame type
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*
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* @param l2Frame
|
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* @param l2SvcRate
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*
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* @return L1 frame type.
|
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*
|
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******************************************************************************/
|
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L1_FRAME_TYPE L2_L2frame2L1frame(L2_FRAME_TYPE l2Frame)
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L1_FRAME_TYPE L2_L2frame2L1frame(L2_FRAME_TYPE l2Frame, L2_SVC_RATE l2SvcRate)
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{
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switch (l2Frame)
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{
|
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case L2_SCAN_FRAME:
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return L1_10KBPS_10MS_FRAME;
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case L2_ADV_FRAME:
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return L1_10KBPS_20MS_FRAME;
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case L2_CFM_FRAME:
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case L2_SVC_FRAME:
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return L1_40KBPS_20MS_FRAME;
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case L2_FRAME_ADV:
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return L1_FRAME_ADV_24MS;
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case L2_FRAME_ACK:
|
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return L1_FRAME_ACK_8MS;
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case L2_FRAME_DIS:
|
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case L2_FRAME_MNG:
|
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case L2_FRAME_RTT:
|
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return L1_FRAME_128KBPS_4MS;
|
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case L2_FRAME_SVC:
|
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switch (l2SvcRate)
|
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{
|
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case L2_SVC_128K:
|
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return L1_FRAME_128KBPS_4MS;
|
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case L2_SVC_512K:
|
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return L1_FRAME_512KBPS_4MS;
|
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case L2_SVC_2M:
|
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return L1_FRAME_2MBPS_4MS;
|
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default:
|
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return L1_FRAME_NONE;
|
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}
|
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default:
|
||||
return L1_NONE_FRAME;
|
||||
return L1_FRAME_NONE;
|
||||
}
|
||||
}
|
||||
|
||||
/*****************************************************************************/
|
||||
/**
|
||||
* @brief Get L2 service packet length based on service rate
|
||||
*
|
||||
* @param l2SvcRate
|
||||
*
|
||||
* @return Packet length.
|
||||
*
|
||||
******************************************************************************/
|
||||
size_t L2_GetSvcPacketLen(L2_SVC_RATE l2SvcRate)
|
||||
{
|
||||
switch (l2SvcRate)
|
||||
{
|
||||
case L2_SVC_128K:
|
||||
return sizeof(L2_MSG_SVC_128K);
|
||||
case L2_SVC_512K:
|
||||
return sizeof(L2_MSG_SVC_512K);
|
||||
case L2_SVC_2M:
|
||||
return sizeof(L2_MSG_SVC_2M);
|
||||
default:
|
||||
DBG_ERROR("Unsupported service rate: %" PRId8 ".\n", instPtr->config.serviceRate);
|
||||
return EPARAM;
|
||||
}
|
||||
}
|
||||
|
||||
/*****************************************************************************/
|
||||
/**
|
||||
* @brief Get L2 service payload length based on service rate
|
||||
*
|
||||
* @param l2SvcRate
|
||||
*
|
||||
* @return Payload length.
|
||||
*
|
||||
******************************************************************************/
|
||||
size_t L2_GetSvcPayloadLen(L2_SVC_RATE l2SvcRate)
|
||||
{
|
||||
switch (l2SvcRate)
|
||||
{
|
||||
case L2_SVC_128K:
|
||||
return L2_PAYLOAD_LEN_SVC_128K;
|
||||
case L2_SVC_512K:
|
||||
return L2_PAYLOAD_LEN_SVC_512K;
|
||||
case L2_SVC_2M:
|
||||
return L2_PAYLOAD_LEN_SVC_2M;
|
||||
default:
|
||||
DBG_ERROR("Unsupported service rate: %" PRId8 ".\n", instPtr->config.serviceRate);
|
||||
return EPARAM;
|
||||
}
|
||||
}
|
||||
|
||||
/*****************************************************************************/
|
||||
/**
|
||||
* @brief Convert antenna broadcast id to antenna index
|
||||
*
|
||||
* @param antId
|
||||
*
|
||||
* @return Physical antenna index.
|
||||
*
|
||||
******************************************************************************/
|
||||
PHY_ANT_INDEX L2_AntId2AntIndex(uint8_t antId)
|
||||
{
|
||||
switch (antId)
|
||||
{
|
||||
case L2_BROADCAST_ID1:
|
||||
return PHY_ANT_INDEX_1;
|
||||
case L2_BROADCAST_ID2:
|
||||
return PHY_ANT_INDEX_2;
|
||||
case L2_BROADCAST_ID3:
|
||||
return PHY_ANT_INDEX_3;
|
||||
default:
|
||||
return PHY_ANT_INDEX_NONE;
|
||||
}
|
||||
}
|
||||
|
||||
/** @} LinkLayer_Utility*/
|
||||
|
||||
/**
|
||||
@@ -475,7 +560,6 @@ int32_t Linklayer_Init(L2_INST **instPtr, const L2_CONFIG *config)
|
||||
(*instPtr)->recvPktData = NULL;
|
||||
(*instPtr)->schdEventPool = NULL;
|
||||
(*instPtr)->nodeList = NULL;
|
||||
(*instPtr)->scanFSM = NULL;
|
||||
(*instPtr)->serviceFSM = NULL;
|
||||
memcpy(&((*instPtr)->config), config, sizeof(L2_CONFIG));
|
||||
|
||||
@@ -508,9 +592,9 @@ int32_t Linklayer_Init(L2_INST **instPtr, const L2_CONFIG *config)
|
||||
(*instPtr)->slotNum.last = 0;
|
||||
(*instPtr)->slotNum.curr = 0;
|
||||
(*instPtr)->slotNum.next = 0;
|
||||
(*instPtr)->frame.last = L2_NONE_FRAME;
|
||||
(*instPtr)->frame.curr = L2_NONE_FRAME;
|
||||
(*instPtr)->frame.next = L2_NONE_FRAME;
|
||||
(*instPtr)->frame.last = L2_FRAME_NONE;
|
||||
(*instPtr)->frame.curr = L2_FRAME_NONE;
|
||||
(*instPtr)->frame.next = L2_FRAME_NONE;
|
||||
(*instPtr)->tor.last = L2_TOR_SUSPEND;
|
||||
(*instPtr)->tor.curr = L2_TOR_SUSPEND;
|
||||
(*instPtr)->tor.next = L2_TOR_SUSPEND;
|
||||
@@ -547,13 +631,6 @@ int32_t Linklayer_Init(L2_INST **instPtr, const L2_CONFIG *config)
|
||||
return Status;
|
||||
}
|
||||
|
||||
Status = L2_Scan_Init(&((*instPtr)->scanFSM));
|
||||
if (Status != SUCCESS)
|
||||
{
|
||||
Linklayer_Destroy(*instPtr);
|
||||
return Status;
|
||||
}
|
||||
|
||||
Status = L2_Service_Init(&((*instPtr)->serviceFSM));
|
||||
if (Status != SUCCESS)
|
||||
{
|
||||
@@ -605,9 +682,9 @@ int32_t Linklayer_Reconfig(L2_INST *instPtr, const L2_CONFIG *config)
|
||||
instPtr->slotNum.last = 0;
|
||||
instPtr->slotNum.curr = 0;
|
||||
instPtr->slotNum.next = 0;
|
||||
instPtr->frame.last = L2_NONE_FRAME;
|
||||
instPtr->frame.curr = L2_NONE_FRAME;
|
||||
instPtr->frame.next = L2_NONE_FRAME;
|
||||
instPtr->frame.last = L2_FRAME_NONE;
|
||||
instPtr->frame.curr = L2_FRAME_NONE;
|
||||
instPtr->frame.next = L2_FRAME_NONE;
|
||||
instPtr->tor.last = L2_TOR_SUSPEND;
|
||||
instPtr->tor.curr = L2_TOR_SUSPEND;
|
||||
instPtr->tor.next = L2_TOR_SUSPEND;
|
||||
@@ -629,7 +706,6 @@ int32_t Linklayer_Reconfig(L2_INST *instPtr, const L2_CONFIG *config)
|
||||
// Reset according instance
|
||||
L2_ClearSchedEventPool(instPtr->schdEventPool);
|
||||
L2_NodeList_Clear(instPtr->nodeList);
|
||||
L2_Scan_Reset(instPtr->scanFSM);
|
||||
L2_Service_Reset(instPtr->serviceFSM);
|
||||
return SUCCESS;
|
||||
}
|
||||
@@ -654,7 +730,6 @@ void Linklayer_Destroy(L2_INST *instPtr)
|
||||
// Destroy FSMs and nodeList
|
||||
L2_DestroySchedEventPool(instPtr->schdEventPool);
|
||||
L2_NodeList_Destroy(instPtr->nodeList);
|
||||
L2_Scan_Destroy(instPtr->scanFSM);
|
||||
L2_Service_Destroy(instPtr->serviceFSM);
|
||||
free(instPtr);
|
||||
}
|
||||
@@ -671,7 +746,7 @@ void Linklayer_Destroy(L2_INST *instPtr)
|
||||
int32_t Linklayer_Start(L2_INST *instPtr)
|
||||
{
|
||||
ASSERT(instPtr != NULL);
|
||||
// Set netStartTime at first call.
|
||||
// Set netStartTime at first call, i.e. at the beginning of next time unit.
|
||||
if (instPtr->netStartTime == NET_START_TIME_INFTY)
|
||||
{
|
||||
instPtr->netStartTime = TimeCtrl_GetIntCnt(instPtr->config.tmcInstPtr) / L2_SLOTS_PER_FRAME + 1;
|
||||
@@ -771,7 +846,6 @@ int32_t Linklayer_EventHandler(L2_INST *instPtr, const L2_EVENT *l2Event)
|
||||
break;
|
||||
}
|
||||
DBG_WARNING("Lost connection with head node [%" PRId8 "].\n", L2_GetHeadId(instPtr));
|
||||
L2_Scan_Reset(instPtr->scanFSM);
|
||||
L2_Service_Reset(instPtr->serviceFSM);
|
||||
instPtr->cxn2Net = false;
|
||||
UpdateMainSate(instPtr, L2_INIT_STATE);
|
||||
@@ -781,7 +855,6 @@ int32_t Linklayer_EventHandler(L2_INST *instPtr, const L2_EVENT *l2Event)
|
||||
case L2_EV_LOST_NODE:
|
||||
{
|
||||
DBG_INFO("Event L2_EV_LOST_NODE asserted....\n");
|
||||
L2_Scan_Reset(instPtr->scanFSM);
|
||||
L2_Service_Reset(instPtr->serviceFSM);
|
||||
UpdateMainSate(instPtr, L2_INIT_STATE);
|
||||
// Log reconnect
|
||||
@@ -794,7 +867,6 @@ int32_t Linklayer_EventHandler(L2_INST *instPtr, const L2_EVENT *l2Event)
|
||||
if (instPtr->nextState == L2_INIT_STATE)
|
||||
{
|
||||
// Reset scan net FMS for next scan process.
|
||||
L2_Scan_Reset(instPtr->scanFSM);
|
||||
UpdateMainSate(instPtr, L2_INIT_STATE);
|
||||
instPtr->rtneConfig.rtneTable = initTable;
|
||||
instPtr->rtneConfig.rtnePrd = ARRAY_SIZE(initTable);
|
||||
@@ -851,12 +923,14 @@ int32_t Linklayer_PktHandler(L2_INST *instPtr, L2_FRAME_TYPE frameType)
|
||||
|
||||
switch (frameType)
|
||||
{
|
||||
case L2_SCAN_FRAME:
|
||||
case L2_ADV_FRAME:
|
||||
case L2_CFM_FRAME:
|
||||
case L2_FRAME_ADV:
|
||||
case L2_FRAME_ACK:
|
||||
Status = L2_Scan_PktHandler(instPtr, instPtr->recvPktData);
|
||||
break;
|
||||
case L2_SVC_FRAME:
|
||||
case L2_FRAME_DIS:
|
||||
case L2_FRAME_MNG:
|
||||
case L2_FRAME_RTT:
|
||||
case L2_FRAME_SVC:
|
||||
Status = L2_Service_PktHandler(instPtr, instPtr->recvPktData);
|
||||
break;
|
||||
default:
|
||||
@@ -923,20 +997,23 @@ static int32_t Linklayer_Routine(L2_INST *instPtr)
|
||||
instPtr->rtneConfig.curr = instPtr->rtneConfig.next;
|
||||
instPtr->rtneConfig.next = &(instPtr->rtneConfig.rtneTable[tableIndx][entryIndx]);
|
||||
rtneEntry = instPtr->rtneConfig.rtneTable[tableIndx][entryIndx];
|
||||
DBG_INFO("## Routine: %" PRIu32 "-%" PRIu32 ", Routine period: %" PRIu32 ".\n", tableIndx, entryIndx, instPtr->rtneConfig.rtnePrd);
|
||||
DBG_INFO("## Routine: %" PRIu32 "-%" PRIu32 ", Routine period: %" PRIu32 ".\n", tableIndx, entryIndx,
|
||||
instPtr->rtneConfig.rtnePrd);
|
||||
|
||||
switch (rtneEntry.slotType)
|
||||
{
|
||||
case L2_SLOT_IDLE:
|
||||
// Skip a 5ms slot.
|
||||
DBG_INFO("Skipping idle slot (5ms)...\n");
|
||||
// Skip a 2 ms slot.
|
||||
DBG_INFO("Skipping idle slot (2 ms)...\n");
|
||||
Status = SUCCESS;
|
||||
break;
|
||||
case L2_SLOT_SCAN:
|
||||
case L2_SLOT_ADVERTISE:
|
||||
case L2_SLOT_CONFIRM:
|
||||
case L2_SLOT_ACKNOWLEDGE:
|
||||
Status = L2_Scan_Routine(instPtr, &rtneEntry);
|
||||
break;
|
||||
case L2_SLOT_DISTRIBUTE:
|
||||
case L2_SLOT_MANAGE:
|
||||
case L2_SLOT_RTT:
|
||||
case L2_SLOT_SERVICE:
|
||||
Status = L2_Service_Routine(instPtr, &rtneEntry);
|
||||
break;
|
||||
@@ -1021,29 +1098,28 @@ int32_t Linklayer_Proc(L2_INST *instPtr)
|
||||
// Handle frame received in last slot.
|
||||
if (L2_isDataAvail(instPtr) == true)
|
||||
{
|
||||
if (Linklayer_PktHandler(instPtr, L2_GetLastOptFrameType(instPtr)) != SUCCESS)
|
||||
if (Linklayer_PktHandler(instPtr, L2_GetLastFrameType(instPtr)) != SUCCESS)
|
||||
{
|
||||
DBG_ERROR("Failed to handle last received frame: %" PRId8 ".\n", L2_GetLastOptFrameType(instPtr));
|
||||
DBG_ERROR("Failed to handle last received frame: %" PRId8 ".\n", L2_GetLastFrameType(instPtr));
|
||||
}
|
||||
}
|
||||
|
||||
// Run Link layer routine, setup next slot procedure.
|
||||
if (L2_GetNodeType(instPtr) == L2_NODE_HEAD)
|
||||
{
|
||||
Phy_SetMode(phyRef, PHY_MODE_PULL);
|
||||
Phy_SetMode(phyRef, PHY_MODE_POLL);
|
||||
Status = Linklayer_Routine(instPtr);
|
||||
}
|
||||
else
|
||||
{ // L2_NODE_MEMBER
|
||||
if (L2_isCxn2Net(instPtr))
|
||||
{
|
||||
Phy_SetMode(phyRef, PHY_MODE_PULL);
|
||||
Phy_SetMode(phyRef, PHY_MODE_POLL);
|
||||
Status = Linklayer_Routine(instPtr);
|
||||
}
|
||||
else
|
||||
{
|
||||
Phy_SetMode(phyRef, PHY_MODE_LISTEN);
|
||||
Status = L2_Scan_Proc(instPtr);
|
||||
}
|
||||
}
|
||||
|
||||
@@ -1064,16 +1140,21 @@ int32_t Linklayer_Proc(L2_INST *instPtr)
|
||||
instPtr->linkLog.cxnStatus = (L2_isCxn2Net(instPtr)) ? 0x11 : 0x00;
|
||||
instPtr->linkLog.linkStage = (instPtr->mainState == L2_INIT_STATE) ? 0x11 : 0x22;
|
||||
instPtr->linkLog.recxnCnt = instPtr->log.reconnectCnt;
|
||||
instPtr->linkLog.beamNo = instPtr->scanFSM->beamNo;
|
||||
instPtr->linkLog.beamWidth = instPtr->log.lastBeamWidth;
|
||||
instPtr->linkLog.beamAz = phyRef->antNrrwPattern[instPtr->scanFSM->beamNo].oaxis;
|
||||
instPtr->linkLog.beamEl = phyRef->antNrrwPattern[instPtr->scanFSM->beamNo].raxis;
|
||||
instPtr->linkLog.advTxCnt = (uint16_t)instPtr->log.advTxCnt;
|
||||
instPtr->linkLog.advRecvCnt = (uint16_t)instPtr->log.advRecvCnt;
|
||||
instPtr->linkLog.advCorrectCnt = (uint16_t)instPtr->log.advCorrectCnt;
|
||||
instPtr->linkLog.cfmTxCnt = instPtr->log.cfmTxCnt;
|
||||
instPtr->linkLog.cfmRecvCnt = instPtr->log.cfmRecvCnt;
|
||||
instPtr->linkLog.cfmCorrectCnt = instPtr->log.cfmCorrectCnt;
|
||||
instPtr->linkLog.ackTxCnt = instPtr->log.ackTxCnt;
|
||||
instPtr->linkLog.ackRecvCnt = instPtr->log.ackRecvCnt;
|
||||
instPtr->linkLog.ackCorrectCnt = instPtr->log.ackCorrectCnt;
|
||||
instPtr->linkLog.disTxCnt = instPtr->log.disTxCnt;
|
||||
instPtr->linkLog.disRecvCnt = instPtr->log.disRecvCnt;
|
||||
instPtr->linkLog.disCorrectCnt = instPtr->log.disCorrectCnt;
|
||||
instPtr->linkLog.mngTxCnt = instPtr->log.mngTxCnt;
|
||||
instPtr->linkLog.mngRecvCnt = instPtr->log.mngRecvCnt;
|
||||
instPtr->linkLog.mngCorrectCnt = instPtr->log.mngCorrectCnt;
|
||||
instPtr->linkLog.rttTxCnt = instPtr->log.rttTxCnt;
|
||||
instPtr->linkLog.rttRecvCnt = instPtr->log.rttRecvCnt;
|
||||
instPtr->linkLog.rttCorrectCnt = instPtr->log.rttCorrectCnt;
|
||||
instPtr->linkLog.svcTxCnt = instPtr->log.svcTxCnt;
|
||||
instPtr->linkLog.svcRecvCnt = instPtr->log.svcRecvCnt;
|
||||
instPtr->linkLog.svcCorrectCnt = instPtr->log.svcCorrectCnt;
|
||||
@@ -1086,69 +1167,6 @@ int32_t Linklayer_Proc(L2_INST *instPtr)
|
||||
return SUCCESS;
|
||||
}
|
||||
|
||||
/*****************************************************************************/
|
||||
/**
|
||||
* @brief Steer antenna beam to specified node.
|
||||
*
|
||||
* @param instPtr a pointer to link layer descriptor instance
|
||||
* @param nodeId destination node
|
||||
*
|
||||
* @return Corresponding frame length
|
||||
* L2_FRAME_NONE_LEN if the frame type code cannot be recognized.
|
||||
*
|
||||
******************************************************************************/
|
||||
int32_t L2_SteerBeam2Node(L2_INST *instPtr, uint8_t nodeId)
|
||||
{
|
||||
ASSERT(instPtr != NULL);
|
||||
int32_t Status;
|
||||
|
||||
COORD myPos, dstPos, beamDir;
|
||||
Status = L2_GetNodePos(instPtr->nodeList, nodeId, &dstPos);
|
||||
if (Status != SUCCESS)
|
||||
{
|
||||
DBG_ERROR("Failed to retrieve position info of node %" PRIu8 ", remain last configuration.\n", nodeId);
|
||||
return EPARAM;
|
||||
}
|
||||
myPos.x = instPtr->sysInfo.posX;
|
||||
myPos.y = instPtr->sysInfo.posY;
|
||||
myPos.z = instPtr->sysInfo.posZ;
|
||||
|
||||
// TODO Check data format
|
||||
EULERANGLES attitudeEuler, antAttitudeEuler;
|
||||
attitudeEuler.alpha = DEG2RAD(instPtr->sysInfo.pitch);
|
||||
attitudeEuler.beta = DEG2RAD(instPtr->sysInfo.yaw);
|
||||
attitudeEuler.gamma = DEG2RAD(instPtr->sysInfo.roll);
|
||||
|
||||
// FIXME: confirm date source.
|
||||
antAttitudeEuler.alpha = DEG2RAD(0);
|
||||
antAttitudeEuler.beta = DEG2RAD(0);
|
||||
antAttitudeEuler.gamma = DEG2RAD(0);
|
||||
|
||||
// TODO Check data format
|
||||
QUATERNION attitude, antAttitude;
|
||||
attitude = Quaternion_FromeEulerAngles(attitudeEuler, EULERANGLES_XYZ);
|
||||
antAttitude = Quaternion_FromeEulerAngles(antAttitudeEuler, EULERANGLES_XYZ);
|
||||
|
||||
// --- --- Algorithm --- ---
|
||||
// TODO Check result validation
|
||||
// Compute beam direction vector
|
||||
beamDir = Coord_Sub(dstPos, myPos);
|
||||
|
||||
// Compute antenna attitude respect to ECEF
|
||||
antAttitude = Quaternion_Mult(attitude, antAttitude);
|
||||
|
||||
// Convert beam direction vector to antenna coordinate
|
||||
beamDir = Quaternion_Rotate(Quaternion_GeInverse(antAttitude), beamDir);
|
||||
// Normalize
|
||||
Coord_Normalize(&beamDir);
|
||||
|
||||
double oAxis, rAxis;
|
||||
oAxis = RAD2DEG(atan2(beamDir.z, beamDir.y));
|
||||
rAxis = RAD2DEG(acos(Coord_Dot(beamDir, COORD_X_AXIS)));
|
||||
Status = Phy_SetBeamAngle(instPtr->config.phyInstPtr, oAxis, rAxis);
|
||||
return Status;
|
||||
}
|
||||
|
||||
/*****************************************************************************/
|
||||
/**
|
||||
* @brief Layer 2 setup next slot operation, update current operating frame.
|
||||
@@ -1165,8 +1183,9 @@ int32_t L2_SetupNextSlot(L2_INST *instPtr, L2_TOR_TYPE txrxMode, L2_FRAME_TYPE f
|
||||
ASSERT(instPtr != NULL);
|
||||
PHY_INST *phyRef = instPtr->config.phyInstPtr;
|
||||
int32_t Status;
|
||||
if (frameType < L2_SCAN_FRAME || frameType > L2_SVC_FRAME)
|
||||
if (frameType < L2_FRAME_ADV || frameType > L2_FRAME_SVC)
|
||||
{
|
||||
DBG_WARNING("L2_SetupNextSlot(): UNKNOWN L2-FrameType %" PRId8 "\n", frameType);
|
||||
return FAILURE;
|
||||
}
|
||||
|
||||
@@ -1176,13 +1195,22 @@ int32_t L2_SetupNextSlot(L2_INST *instPtr, L2_TOR_TYPE txrxMode, L2_FRAME_TYPE f
|
||||
instPtr->log.frameTx++;
|
||||
switch (frameType)
|
||||
{
|
||||
case L2_ADV_FRAME:
|
||||
case L2_FRAME_ADV:
|
||||
instPtr->log.advTxCnt++;
|
||||
break;
|
||||
case L2_CFM_FRAME:
|
||||
instPtr->log.cfmTxCnt++;
|
||||
case L2_FRAME_ACK:
|
||||
instPtr->log.ackTxCnt++;
|
||||
break;
|
||||
case L2_SVC_FRAME:
|
||||
case L2_FRAME_DIS:
|
||||
instPtr->log.disTxCnt++;
|
||||
break;
|
||||
case L2_FRAME_MNG:
|
||||
instPtr->log.mngTxCnt++;
|
||||
break;
|
||||
case L2_FRAME_RTT:
|
||||
instPtr->log.rttTxCnt++;
|
||||
break;
|
||||
case L2_FRAME_SVC:
|
||||
instPtr->log.svcTxCnt++;
|
||||
break;
|
||||
default:
|
||||
@@ -1194,13 +1222,22 @@ int32_t L2_SetupNextSlot(L2_INST *instPtr, L2_TOR_TYPE txrxMode, L2_FRAME_TYPE f
|
||||
instPtr->log.frameRx++;
|
||||
switch (frameType)
|
||||
{
|
||||
case L2_ADV_FRAME:
|
||||
case L2_FRAME_ADV:
|
||||
instPtr->log.advRxCnt++;
|
||||
break;
|
||||
case L2_CFM_FRAME:
|
||||
instPtr->log.cfmRxCnt++;
|
||||
case L2_FRAME_ACK:
|
||||
instPtr->log.ackRxCnt++;
|
||||
break;
|
||||
case L2_SVC_FRAME:
|
||||
case L2_FRAME_DIS:
|
||||
instPtr->log.disRxCnt++;
|
||||
break;
|
||||
case L2_FRAME_MNG:
|
||||
instPtr->log.mngRxCnt++;
|
||||
break;
|
||||
case L2_FRAME_RTT:
|
||||
instPtr->log.rttRxCnt++;
|
||||
break;
|
||||
case L2_FRAME_SVC:
|
||||
instPtr->log.svcRxCnt++;
|
||||
break;
|
||||
default:
|
||||
@@ -1225,16 +1262,22 @@ int32_t L2_SetupNextSlot(L2_INST *instPtr, L2_TOR_TYPE txrxMode, L2_FRAME_TYPE f
|
||||
}
|
||||
switch (frameType)
|
||||
{
|
||||
case L2_SCAN_FRAME:
|
||||
frameStr = "Scan";
|
||||
break;
|
||||
case L2_ADV_FRAME:
|
||||
case L2_FRAME_ADV:
|
||||
frameStr = "Advertisement";
|
||||
break;
|
||||
case L2_CFM_FRAME:
|
||||
frameStr = "Confirm";
|
||||
case L2_FRAME_ACK:
|
||||
frameStr = "Acknowledgement";
|
||||
break;
|
||||
case L2_SVC_FRAME:
|
||||
case L2_FRAME_DIS:
|
||||
frameStr = "Distribution";
|
||||
break;
|
||||
case L2_FRAME_MNG:
|
||||
frameStr = "Management";
|
||||
break;
|
||||
case L2_FRAME_RTT:
|
||||
frameStr = "Round Trip Time";
|
||||
break;
|
||||
case L2_FRAME_SVC:
|
||||
frameStr = "Service";
|
||||
break;
|
||||
default:
|
||||
@@ -1277,7 +1320,8 @@ int32_t L2_SetupNextSlot(L2_INST *instPtr, L2_TOR_TYPE txrxMode, L2_FRAME_TYPE f
|
||||
return EPARAM;
|
||||
}
|
||||
|
||||
Status = Phy_SetupNextSlot(phyRef, tor, L2_L2frame2L1frame(frameType), instPtr->sendPktData);
|
||||
Status = Phy_SetupNextSlot(phyRef, tor, L2_L2frame2L1frame(frameType,
|
||||
instPtr->config.serviceRate), instPtr->sendPktData);
|
||||
if (Status != SUCCESS)
|
||||
{
|
||||
DBG_ERROR("Physical setup failed, with error code: %" PRId32 "\n", Status);
|
||||
|
||||
@@ -38,13 +38,14 @@
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
L2_NODE_TYPE myType; ///< node type
|
||||
uint8_t clustId; ///< node cluster id
|
||||
uint8_t myId; ///< node id
|
||||
uint8_t headId; ///< head node id
|
||||
uint8_t netScale; ///< net scale
|
||||
PHY_INST *phyInstPtr; ///< pointer to system physical layer instance
|
||||
TMC_INST *tmcInstPtr; ///< pointer to system timer controller layer instance
|
||||
L2_NODE_TYPE myType; ///< node type
|
||||
uint8_t clustId; ///< node cluster id
|
||||
uint8_t myId; ///< node id
|
||||
uint8_t headId; ///< head node id
|
||||
uint8_t netScale; ///< net scale
|
||||
L2_SVC_RATE serviceRate; ///< service data rate
|
||||
PHY_INST *phyInstPtr; ///< pointer to system physical layer instance
|
||||
TMC_INST *tmcInstPtr; ///< pointer to system timer controller layer instance
|
||||
} L2_CONFIG;
|
||||
|
||||
/**
|
||||
@@ -63,10 +64,25 @@ typedef struct
|
||||
uint32_t advRecvCnt; ///< advertise received frame count
|
||||
uint32_t advCorrectCnt; ///< advertise correctly received frame count
|
||||
|
||||
uint32_t cfmRxCnt; ///< confirm rx frame count
|
||||
uint32_t cfmTxCnt; ///< confirm tx frame count
|
||||
uint32_t cfmRecvCnt; ///< confirm received frame count
|
||||
uint32_t cfmCorrectCnt; ///< confirm correctly received frame count
|
||||
uint32_t ackRxCnt; ///< acknowledgement rx frame count
|
||||
uint32_t ackTxCnt; ///< acknowledgement tx frame count
|
||||
uint32_t ackRecvCnt; ///< acknowledgement received frame count
|
||||
uint32_t ackCorrectCnt; ///< acknowledgement correctly received frame count
|
||||
|
||||
uint32_t disRxCnt; ///< distribution rx frame count
|
||||
uint32_t disTxCnt; ///< distribution tx frame count
|
||||
uint32_t disRecvCnt; ///< distribution received frame count
|
||||
uint32_t disCorrectCnt;///< distribution correctly received frame count
|
||||
|
||||
uint32_t mngRxCnt; ///< management rx frame count
|
||||
uint32_t mngTxCnt; ///< management tx frame count
|
||||
uint32_t mngRecvCnt; ///< management received frame count
|
||||
uint32_t mngCorrectCnt; ///< management correctly received frame count
|
||||
|
||||
uint32_t rttRxCnt; ///< rtt rx frame count
|
||||
uint32_t rttTxCnt; ///< rtt tx frame count
|
||||
uint32_t rttRecvCnt; ///< rtt received frame count
|
||||
uint32_t rttCorrectCnt; ///< rtt correctly received frame count
|
||||
|
||||
uint32_t svcRxCnt; ///< service rx frame count
|
||||
uint32_t svcTxCnt; ///< service tx frame count
|
||||
@@ -74,7 +90,6 @@ typedef struct
|
||||
uint32_t svcCorrectCnt; ///< service correctly received frame count
|
||||
|
||||
int64_t timeDev; ///< last time deviation estimation result
|
||||
uint8_t lastBeamWidth; ///< last beam width
|
||||
uint32_t reconnectCnt; ///< reconnect trial count
|
||||
|
||||
PAYLOAD rxLog;
|
||||
@@ -102,7 +117,6 @@ typedef struct
|
||||
L2_NODE_STATE mainState; ///< the main state of link layer state
|
||||
L2_NODE_STATE nextState; ///< next state of link layer state, which will be applied to mainState every second.
|
||||
L2_RTNE_CONFIG rtneConfig; ///< current routine table configuration and status.
|
||||
L2_SCAN_FSM *scanFSM; ///< FSM of scan net (link set up)
|
||||
L2_SVC_FSM *serviceFSM; ///< FSM of service net (data service)
|
||||
uint8_t *sendPktData; ///< send data buffer
|
||||
uint8_t *recvPktData; ///< received data buffer
|
||||
@@ -128,7 +142,6 @@ int32_t Linklayer_Halt(L2_INST *instPtr);
|
||||
int32_t Linklayer_Proc(L2_INST *instPtr);
|
||||
int32_t Linklayer_EventHandler(L2_INST *instPtr, const L2_EVENT *l2Event);
|
||||
int32_t Linklayer_PktHandler(L2_INST *instPtr, L2_FRAME_TYPE frameType);
|
||||
int32_t L2_SteerBeam2Node(L2_INST *instPtr, uint8_t nodeId);
|
||||
int32_t L2_SetupNextSlot(L2_INST *instPtr, L2_TOR_TYPE txrxMode, L2_FRAME_TYPE frameType);
|
||||
/** @} LinkLayer_Main*/
|
||||
|
||||
@@ -139,6 +152,7 @@ int32_t L2_SetupNextSlot(L2_INST *instPtr, L2_TOR_TYPE txrxMode, L2_FRAME_TYPE f
|
||||
void L2_FrameInsertChunk(uint8_t *frame, size_t offset, size_t bytes, const void *chunk);
|
||||
void L2_FrameGetChunk(uint8_t *frame, size_t offset, size_t bytes, void *chunk);
|
||||
int32_t L2_CrcAppend(uint8_t *dataBuff, uint32_t dataLen, uint32_t crcPos, L2_CRC_TYPE crcType);
|
||||
int32_t L2_CrcGen(uint8_t *dataBuff, uint32_t dataLen, L2_CRC_TYPE crcType, uint32_t *crc);
|
||||
bool L2_CrcCheck(uint8_t *dataBuff, uint32_t dataLen, L2_CRC_TYPE crcType);
|
||||
/** @} LinkLayer_Framing*/
|
||||
|
||||
@@ -157,11 +171,6 @@ int32_t L2_RescheduleEventAfter(L2_INST *instPtr, L2_SCHD_EVENT *schdEvent, uint
|
||||
* @defgroup LinkLayer_Scan
|
||||
* @{
|
||||
*/
|
||||
int32_t L2_Scan_Init(L2_SCAN_FSM **scanFSMPtr);
|
||||
void L2_Scan_RefreashScanTable(L2_INST *instPtr);
|
||||
void L2_Scan_Reset(L2_SCAN_FSM *scanFSMPtr);
|
||||
void L2_Scan_Destroy(L2_SCAN_FSM *scanFSMPtr);
|
||||
int32_t L2_Scan_Proc(L2_INST *instPtr);
|
||||
int32_t L2_Scan_PktHandler(L2_INST *instPtr, uint8_t *msg);
|
||||
int32_t L2_Scan_Routine(L2_INST *instPtr, const L2_RTNE_TABLE_ENTRY *schedEntry);
|
||||
/** @} LinkLayer_Scan*/
|
||||
@@ -198,7 +207,7 @@ L2_NODE_STATE L2_GetMainState(L2_INST *instPtr);
|
||||
bool L2_isStarted(L2_INST *instPtr);
|
||||
bool L2_isDataAvail(L2_INST *instPtr);
|
||||
bool L2_isCxn2Net(L2_INST *instPtr);
|
||||
uint32_t L2_GetFrameLen(L2_FRAME_TYPE l2FrameType);
|
||||
uint32_t L2_GetFrameLen(L2_FRAME_TYPE l2FrameType, L2_SVC_RATE l2SvcRate);
|
||||
uint32_t L2_GetLastFrameNum(L2_INST *instPtr);
|
||||
uint32_t L2_GetLastSlotNum(L2_INST *instPtr);
|
||||
L2_FRAME_TYPE L2_GetLastFrameType(L2_INST *instPtr);
|
||||
@@ -211,10 +220,12 @@ uint32_t L2_GetNextFrameNum(L2_INST *instPtr);
|
||||
uint32_t L2_GetNextSlotNum(L2_INST *instPtr);
|
||||
L2_FRAME_TYPE L2_GetNextFrameType(L2_INST *instPtr);
|
||||
L2_TOR_TYPE L2_GetNextTor(L2_INST *instPtr);
|
||||
L2_FRAME_TYPE L2_GetLastOptFrameType(L2_INST *instPtr);
|
||||
L1_FRAME_TYPE L2_L2frame2L1frame(L2_FRAME_TYPE l2Frame);
|
||||
L1_FRAME_TYPE L2_L2frame2L1frame(L2_FRAME_TYPE l2Frame, L2_SVC_RATE l2SvcRate);
|
||||
size_t L2_GetSvcPacketLen(L2_SVC_RATE l2SvcRate);
|
||||
size_t L2_GetSvcPayloadLen(L2_SVC_RATE l2SvcRate);
|
||||
PHY_ANT_INDEX L2_AntId2AntIndex(uint8_t antId);
|
||||
/** @} LinkLayer_Utility*/
|
||||
|
||||
#endif /* __LINK_LAYER_H_ */
|
||||
|
||||
/** @} LinkLayer*/
|
||||
/** @} LinkLayer*/
|
||||
|
||||
@@ -33,7 +33,9 @@
|
||||
* @{
|
||||
*/
|
||||
// Common node ID definition
|
||||
#define L2_BROADCAST_ID 0xFF
|
||||
#define L2_BROADCAST_ID1 0xF1 // broadcast
|
||||
#define L2_BROADCAST_ID2 0xF2
|
||||
#define L2_BROADCAST_ID3 0xF4
|
||||
#define L2_NONE_ID 0
|
||||
|
||||
// Routine configure
|
||||
@@ -45,15 +47,8 @@
|
||||
#define L2_FRAMENO_NONE 0
|
||||
|
||||
// Common number of slots definition
|
||||
#define L2_SLOTS_PER_FRAME 100
|
||||
#define L2_SLOTS_PER_SUBFRAME 20
|
||||
#define L2_SLOTS_PER_FRAME 250 // 2 ms per slot, 250 slots per time unit
|
||||
|
||||
#define L2_NUM_SLOTS_NONE UINT32_MAX
|
||||
#define L2_NUM_SLOTS_100MS 20
|
||||
#define L2_NUM_SLOTS_20MS 4
|
||||
#define L2_NUM_SLOTS_10MS 2
|
||||
#define L2_NUM_SLOTS_5MS 1
|
||||
#define L2_NUM_SLOTS_SKIP 0
|
||||
/** @} Linklayer_Common_Constants*/
|
||||
|
||||
/**************************** Type Definitions *******************************/
|
||||
@@ -113,7 +108,7 @@ typedef struct
|
||||
uint8_t clustId; ///< node cluster ID
|
||||
uint8_t headId; ///< cluster head ID
|
||||
L2_NODE_TYPE nodeType; ///< node type
|
||||
uint8_t beamNo; ///< beam number to this node
|
||||
uint8_t antIndex; ///< antenna number to this node
|
||||
COORD pos; ///< node position
|
||||
COORD speed; ///< node speed
|
||||
QUATERNION attitude; ///< node attitude
|
||||
@@ -153,12 +148,14 @@ typedef struct
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
L2_SLOT_NONE = 0,
|
||||
L2_SLOT_IDLE = 1,
|
||||
L2_SLOT_SCAN = 2,
|
||||
L2_SLOT_ADVERTISE = 3,
|
||||
L2_SLOT_CONFIRM = 4,
|
||||
L2_SLOT_SERVICE = 5,
|
||||
L2_SLOT_NONE = 0,
|
||||
L2_SLOT_IDLE = 1,
|
||||
L2_SLOT_ADVERTISE = 2,
|
||||
L2_SLOT_ACKNOWLEDGE = 3,
|
||||
L2_SLOT_DISTRIBUTE = 4,
|
||||
L2_SLOT_MANAGE = 5,
|
||||
L2_SLOT_RTT = 6,
|
||||
L2_SLOT_SERVICE = 7
|
||||
} L2_SLOT_TYPE;
|
||||
|
||||
/**
|
||||
@@ -166,13 +163,26 @@ typedef enum
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
L2_NONE_FRAME = 0,
|
||||
L2_SCAN_FRAME = 1,
|
||||
L2_ADV_FRAME = 2,
|
||||
L2_CFM_FRAME = 3,
|
||||
L2_SVC_FRAME = 4
|
||||
L2_FRAME_NONE = 0,
|
||||
L2_FRAME_ADV = 1,
|
||||
L2_FRAME_ACK = 2,
|
||||
L2_FRAME_DIS = 3,
|
||||
L2_FRAME_MNG = 4,
|
||||
L2_FRAME_RTT = 5,
|
||||
L2_FRAME_SVC = 6
|
||||
} L2_FRAME_TYPE;
|
||||
|
||||
/**
|
||||
* @enum L2_SVC_RATE
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
L2_SVC_NONE = 0,
|
||||
L2_SVC_128K = 1, // 128 kbps
|
||||
L2_SVC_512K = 2, // 512 kbps
|
||||
L2_SVC_2M = 3 // 2 Mbps
|
||||
} L2_SVC_RATE;
|
||||
|
||||
/**
|
||||
* @enum L2_CRC_TYPE
|
||||
*/
|
||||
@@ -201,30 +211,10 @@ typedef struct
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
L2_SCAN_NONE_STAGE = 0,
|
||||
L2_SCAN_INIT_STAGE = 1,
|
||||
L2_SCAN_ADV_STAGE = 2,
|
||||
L2_SCAN_CFM_STAGE = 3
|
||||
L2_SCAN_STAGE_NONE = 0,
|
||||
L2_SCAN_STAGE_ADV = 1
|
||||
} SCAN_STAGE;
|
||||
|
||||
/**
|
||||
* @struct L2_SCAN_FSM
|
||||
* @brief Linklayer scan process FSM instance
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
bool isLocked; ///< indicates if init acq done(beam locked).
|
||||
bool isAdvRecvd; ///< indicates if advertisement frame done(beam locked).
|
||||
bool isAckPending; ///< indicates if confirm message acked
|
||||
uint8_t scanCnt; ///< scan count
|
||||
uint8_t advTimeout; ///< adv receive try count
|
||||
uint8_t cfmTimeout; ///< cmf receive try count
|
||||
SCAN_STAGE scanStage; ///< scan stage \n
|
||||
/// only for member node
|
||||
uint8_t beamNo; ///< locked beam number
|
||||
uint8_t tableNo; ///< scan table index
|
||||
} L2_SCAN_FSM;
|
||||
|
||||
/**
|
||||
* @struct L2_SVC_FSM
|
||||
* @brief Linklayer service process FSM
|
||||
|
||||
@@ -23,108 +23,157 @@
|
||||
#ifndef __L2_MSG_DEF_H_
|
||||
#define __L2_MSG_DEF_H_
|
||||
|
||||
#define L2_PACK_LEN_MAX 512 // bytes
|
||||
#define L2_PACK_LEN_MAX 2048 // bytes
|
||||
|
||||
#define L2_PAYLOAD_LEN_ADV 17
|
||||
#define L2_PAYLOAD_LEN_ACK 9
|
||||
#define L2_PAYLOAD_LEN_SVC_128K 42
|
||||
#define L2_PAYLOAD_LEN_SVC_512K 267
|
||||
#define L2_PAYLOAD_LEN_SVC_2M 1222
|
||||
#define L2_MSG_CRC_LEN 1
|
||||
|
||||
#define L2_ADV_PACK_LEN 28 // bytes
|
||||
#define L2_CMF_PACK_LEN 268 // bytes
|
||||
#define L2_SVC_PACK_LEN 268 // bytes
|
||||
|
||||
// Common structure:
|
||||
// [bytes] [name]
|
||||
// 4 fame number
|
||||
// 1 udu number
|
||||
// 10 crypto sync word
|
||||
// 8 message authentication code
|
||||
// 4 frame number
|
||||
// 1 slot number
|
||||
// 1 source id
|
||||
// 1 destination id
|
||||
// 1 message type
|
||||
#define L2_MSG_FRAME_NUM 0
|
||||
#define L2_MSG_UDU_NUM 0
|
||||
#define L2_MSG_UDU_NUM_LEN 1
|
||||
#define L2_MSG_SYNC_WORD 1
|
||||
#define L2_MSG_SYNC_WORD_LEN 10
|
||||
#define L2_MSG_AUTH_CODE 11
|
||||
#define L2_MSG_AUTH_CODE_LEN 8
|
||||
#define L2_MSG_FRAME_NUM 19
|
||||
#define L2_MSG_FRAME_NUM_LEN 4
|
||||
#define L2_MSG_SLOT_NUM 4
|
||||
#define L2_MSG_SLOT_NUM 23
|
||||
#define L2_MSG_SLOT_NUM_LEN 1
|
||||
#define L2_MSG_SRC_ID 5
|
||||
#define L2_MSG_SRC_ID 24
|
||||
#define L2_MSG_SRC_ID_LEN 1
|
||||
#define L2_MSG_DST_ID 6
|
||||
#define L2_MSG_DST_ID 25
|
||||
#define L2_MSG_DST_ID_LEN 1
|
||||
#define L2_MSG_TYPE 7
|
||||
#define L2_MSG_TYPE 26
|
||||
#define L2_MSG_TYPE_LEN 1
|
||||
#define L2_MSG_PAYLOAD 8
|
||||
#define L2_MSG_PAYLOAD 27
|
||||
|
||||
// advertisement payload structure:
|
||||
// [bytes] [name]
|
||||
// 4 position x
|
||||
// 4 position y
|
||||
// 4 position z
|
||||
// 4 net start time
|
||||
// 2 crc
|
||||
#define L2_MSG_ADV_SRC_POSX 8
|
||||
#define L2_MSG_ADV_SRC_POSX_LEN 4
|
||||
#define L2_MSG_ADV_SRC_POSY 12
|
||||
#define L2_MSG_ADV_SRC_POSY_LEN 4
|
||||
#define L2_MSG_ADV_SRC_POSZ 16
|
||||
#define L2_MSG_ADV_SRC_POSZ_LEN 4
|
||||
#define L2_MSG_ADV_SRC_NETSTART_TIME 20
|
||||
#define L2_MSG_ADV_SRC_NETSTART_TIME_LEN 4
|
||||
#define L2_MSG_ADV_SVC_CRC 26
|
||||
#define L2_MSG_ADV_SVC_CRC_LEN 2
|
||||
#pragma pack(push, 1) // Force 1-byte alignment
|
||||
|
||||
// confirm payload structure:
|
||||
// [bytes] [name]
|
||||
// 4 position x
|
||||
// 4 position y
|
||||
// 4 position z
|
||||
// 4 speed x
|
||||
// 4 speed y
|
||||
// 4 speed z
|
||||
// 2 crc
|
||||
#define L2_MSG_CFM_SRC_POSX 8
|
||||
#define L2_MSG_CFM_SRC_POSX_LEN 4
|
||||
#define L2_MSG_CFM_SRC_POSY 12
|
||||
#define L2_MSG_CFM_SRC_POSY_LEN 4
|
||||
#define L2_MSG_CFM_SRC_POSZ 16
|
||||
#define L2_MSG_CFM_SRC_POSZ_LEN 4
|
||||
#define L2_MSG_CFM_SRC_SPEEDX 20
|
||||
#define L2_MSG_CFM_SRC_SPEEDX_LEN 4
|
||||
#define L2_MSG_CFM_SRC_SPEEDY 24
|
||||
#define L2_MSG_CFM_SRC_SPEEDY_LEN 4
|
||||
#define L2_MSG_CFM_SRC_SPEEDZ 28
|
||||
#define L2_MSG_CFM_SRC_SPEEDZ_LEN 4
|
||||
#define L2_MSG_CFM_PAYLOAD_ID 32
|
||||
#define L2_MSG_CFM_PAYLOAD_ID_LEN 4
|
||||
#define L2_MSG_CFM_PAYLOAD 36
|
||||
#define L2_MSG_CFM_PAYLOAD_LEN 230
|
||||
#define L2_MSG_CFM_CRC 266
|
||||
#define L2_MSG_CFM_CRC_LEN 2
|
||||
/**
|
||||
* @struct L2_MSG_COMMON
|
||||
* @brief Link layer common message header, 27 byte / 216 bit in total.
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint8_t uduNum; ///< udu (user data unit) number per pdu (packet data unit)
|
||||
struct
|
||||
{
|
||||
uint8_t cryptoSyncWord[10];
|
||||
uint8_t msgAuthCode[8];
|
||||
} MSG_KEY;
|
||||
|
||||
// service payload structure:
|
||||
// [bytes] [name]
|
||||
// 4 position x
|
||||
// 4 position y
|
||||
// 4 position z
|
||||
// 4 speed x
|
||||
// 4 speed y
|
||||
// 4 speed z
|
||||
// 234 payload
|
||||
// 2 crc
|
||||
#define L2_MSG_SVC_SRC_POSX 8
|
||||
#define L2_MSG_SVC_SRC_POSX_LEN 4
|
||||
#define L2_MSG_SVC_SRC_POSY 12
|
||||
#define L2_MSG_SVC_SRC_POSY_LEN 4
|
||||
#define L2_MSG_SVC_SRC_POSZ 16
|
||||
#define L2_MSG_SVC_SRC_POSZ_LEN 4
|
||||
#define L2_MSG_SVC_SRC_SPEEDX 20
|
||||
#define L2_MSG_SVC_SRC_SPEEDX_LEN 4
|
||||
#define L2_MSG_SVC_SRC_SPEEDY 24
|
||||
#define L2_MSG_SVC_SRC_SPEEDY_LEN 4
|
||||
#define L2_MSG_SVC_SRC_SPEEDZ 28
|
||||
#define L2_MSG_SVC_SRC_SPEEDZ_LEN 4
|
||||
#define L2_MSG_SVC_PAYLOAD_ID 32
|
||||
#define L2_MSG_SVC_PAYLOAD_ID_LEN 4
|
||||
#define L2_MSG_SVC_PAYLOAD 36
|
||||
#define L2_MSG_SVC_PAYLOAD_LEN 230
|
||||
#define L2_MSG_SVC_CRC 266
|
||||
#define L2_MSG_SVC_CRC_LEN 2
|
||||
uint32_t frameNum; ///< frame number
|
||||
uint8_t slotNum; ///< slot number
|
||||
uint8_t src; ///< source id
|
||||
uint8_t dst; ///< destination id
|
||||
uint8_t msgType; ///< message type
|
||||
} L2_MSG_COMMON;
|
||||
|
||||
/**
|
||||
* @struct L2_MSG_ADV
|
||||
* @brief Link layer advertise message definition, 65 byte / 520 bit in total.
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
L2_MSG_COMMON common; ///< common message header
|
||||
double srcPosX; ///< position x
|
||||
double srcPosY; ///< position y
|
||||
double srcPosZ; ///< position z
|
||||
uint32_t srcNetStatTime;///< net start time
|
||||
uint32_t advDataId; ///< advertise payload id
|
||||
uint8_t advData[17]; ///< advertise payload data
|
||||
uint8_t crc; ///< crc
|
||||
} L2_MSG_ADV;
|
||||
|
||||
/**
|
||||
* @struct L2_MSG_ACK
|
||||
* @brief Link layer acknowledge message definition, 65 byte / 520 bit in total.
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
L2_MSG_COMMON common; ///< common message header
|
||||
double srcPosX; ///< position x
|
||||
double srcPosY; ///< position y
|
||||
double srcPosZ; ///< position z
|
||||
double srcSpeedX; ///< speed x
|
||||
double srcSpeedY; ///< speed y
|
||||
double srcSpeedZ; ///< speed z
|
||||
uint32_t ackDataId; ///< acknowledge payload id
|
||||
uint8_t ackData[9]; ///< acknowledge payload data
|
||||
uint8_t crc; ///< crc
|
||||
} L2_MSG_ACK;
|
||||
|
||||
/**
|
||||
* @struct L2_MSG_SVC_128K
|
||||
* @brief Link layer 128 kbps service message definition, 98 byte / 784 bit in total.
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
L2_MSG_COMMON common; ///< common message header
|
||||
double srcPosX; ///< position x
|
||||
double srcPosY; ///< position y
|
||||
double srcPosZ; ///< position z
|
||||
double srcSpeedX; ///< speed x
|
||||
double srcSpeedY; ///< speed y
|
||||
double srcSpeedZ; ///< speed z
|
||||
uint32_t svcDataId; ///< service payload id
|
||||
uint8_t svcData[42]; ///< service payload data
|
||||
uint8_t crc; ///< crc
|
||||
} L2_MSG_SVC_128K;
|
||||
|
||||
/**
|
||||
* @struct L2_MSG_SVC_512K
|
||||
* @brief Link layer 512 kbps service message definition, 323 byte / 2584 bit in total.
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
L2_MSG_COMMON common; ///< common message header
|
||||
double srcPosX; ///< position x
|
||||
double srcPosY; ///< position y
|
||||
double srcPosZ; ///< position z
|
||||
double srcSpeedX; ///< speed x
|
||||
double srcSpeedY; ///< speed y
|
||||
double srcSpeedZ; ///< speed z
|
||||
uint32_t svcDataId; ///< service payload id
|
||||
uint8_t svcData[267]; ///< service payload data
|
||||
uint8_t crc; ///< crc
|
||||
} L2_MSG_SVC_512K;
|
||||
|
||||
/**
|
||||
* @struct L2_MSG_SVC_2M
|
||||
* @brief Link layer 2 Mbps service message definition, 1278 byte / 10224 bit in total.
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
L2_MSG_COMMON common; ///< common message header
|
||||
double srcPosX; ///< position x
|
||||
double srcPosY; ///< position y
|
||||
double srcPosZ; ///< position z
|
||||
double srcSpeedX; ///< speed x
|
||||
double srcSpeedY; ///< speed y
|
||||
double srcSpeedZ; ///< speed z
|
||||
uint32_t svcDataId; ///< service payload id
|
||||
uint8_t svcData[1222]; ///< service payload data
|
||||
uint8_t crc; ///< crc
|
||||
} L2_MSG_SVC_2M;
|
||||
|
||||
#pragma pack(pop) // Restore original packing
|
||||
|
||||
#endif //__L2_MSG_DEF_H_
|
||||
|
||||
/** @} LinkLayer_MSG_Constants*/
|
||||
|
||||
/** @} LinkLayer*/
|
||||
/** @} LinkLayer*/
|
||||
|
||||
@@ -140,7 +140,8 @@ void L2_NodeList_Destroy(NODE_LIST *list)
|
||||
NODE_ENTRY *L2_GetNodeById(NODE_LIST *list, uint8_t nodeId)
|
||||
{
|
||||
ASSERT(list != NULL);
|
||||
if (nodeId == L2_BROADCAST_ID || nodeId == L2_NONE_ID)
|
||||
if (nodeId == L2_BROADCAST_ID1 || nodeId == L2_BROADCAST_ID2 ||
|
||||
nodeId == L2_BROADCAST_ID3 || nodeId == L2_NONE_ID)
|
||||
{
|
||||
return NULL;
|
||||
}
|
||||
@@ -198,7 +199,7 @@ NODE_ENTRY *L2_AppendNode(NODE_LIST *list, uint8_t nodeId, L2_NODE_TYPE nodeType
|
||||
nodeEntry->nodeInfo.speed.x = 0;
|
||||
nodeEntry->nodeInfo.speed.y = 0;
|
||||
nodeEntry->nodeInfo.speed.z = 0;
|
||||
nodeEntry->nodeInfo.beamNo = 0;
|
||||
nodeEntry->nodeInfo.antIndex = 0;
|
||||
nodeEntry->ttlCnt = 0;
|
||||
clist_rpush(list, node);
|
||||
return nodeEntry;
|
||||
@@ -558,4 +559,4 @@ int32_t L2_IterDeleteNode(NODE_LIST *list, bool (*condition)(NODE_ENTRY *))
|
||||
|
||||
/** @} LinkLayer_NodeList*/
|
||||
|
||||
/** @} LinkLayer*/
|
||||
/** @} LinkLayer*/
|
||||
|
||||
@@ -25,238 +25,289 @@
|
||||
#include "link_layer.h"
|
||||
#include "link_layer_types.h"
|
||||
|
||||
L2_RTNE_TABLE_ENTRY intraScanSubT[L2_SLOTS_PER_FRAME] = {
|
||||
// SubFrame 0
|
||||
{L2_SLOT_SCAN, 0x00, 0x01, 0xFF},
|
||||
{L2_SLOT_SCAN, 0x01, 0x01, 0xFF},
|
||||
{L2_SLOT_SCAN, 0x00, 0x01, 0xFF},
|
||||
{L2_SLOT_SCAN, 0x01, 0x01, 0xFF},
|
||||
{L2_SLOT_SCAN, 0x00, 0x01, 0xFF},
|
||||
{L2_SLOT_SCAN, 0x01, 0x01, 0xFF},
|
||||
{L2_SLOT_SCAN, 0x00, 0x01, 0xFF},
|
||||
{L2_SLOT_SCAN, 0x01, 0x01, 0xFF},
|
||||
{L2_SLOT_SCAN, 0x00, 0x01, 0xFF},
|
||||
{L2_SLOT_SCAN, 0x01, 0x01, 0xFF},
|
||||
{L2_SLOT_SCAN, 0x00, 0x01, 0xFF},
|
||||
{L2_SLOT_SCAN, 0x01, 0x01, 0xFF},
|
||||
{L2_SLOT_SCAN, 0x00, 0x01, 0xFF},
|
||||
{L2_SLOT_SCAN, 0x01, 0x01, 0xFF},
|
||||
{L2_SLOT_SCAN, 0x00, 0x01, 0xFF},
|
||||
{L2_SLOT_SCAN, 0x01, 0x01, 0xFF},
|
||||
{L2_SLOT_SCAN, 0x00, 0x01, 0xFF},
|
||||
{L2_SLOT_SCAN, 0x01, 0x01, 0xFF},
|
||||
{L2_SLOT_SCAN, 0x00, 0x01, 0xFF},
|
||||
{L2_SLOT_SCAN, 0x01, 0x01, 0xFF},
|
||||
|
||||
// SubFrame 1
|
||||
{L2_SLOT_SCAN, 0x00, 0x01, 0xFF},
|
||||
{L2_SLOT_SCAN, 0x01, 0x01, 0xFF},
|
||||
{L2_SLOT_SCAN, 0x00, 0x01, 0xFF},
|
||||
{L2_SLOT_SCAN, 0x01, 0x01, 0xFF},
|
||||
{L2_SLOT_SCAN, 0x00, 0x01, 0xFF},
|
||||
{L2_SLOT_SCAN, 0x01, 0x01, 0xFF},
|
||||
{L2_SLOT_SCAN, 0x00, 0x01, 0xFF},
|
||||
{L2_SLOT_SCAN, 0x01, 0x01, 0xFF},
|
||||
{L2_SLOT_SCAN, 0x00, 0x01, 0xFF},
|
||||
{L2_SLOT_SCAN, 0x01, 0x01, 0xFF},
|
||||
{L2_SLOT_SCAN, 0x00, 0x01, 0xFF},
|
||||
{L2_SLOT_SCAN, 0x01, 0x01, 0xFF},
|
||||
{L2_SLOT_SCAN, 0x00, 0x01, 0xFF},
|
||||
{L2_SLOT_SCAN, 0x01, 0x01, 0xFF},
|
||||
{L2_SLOT_SCAN, 0x00, 0x01, 0xFF},
|
||||
{L2_SLOT_SCAN, 0x01, 0x01, 0xFF},
|
||||
{L2_SLOT_SCAN, 0x00, 0x01, 0xFF},
|
||||
{L2_SLOT_SCAN, 0x01, 0x01, 0xFF},
|
||||
{L2_SLOT_SCAN, 0x00, 0x01, 0xFF},
|
||||
{L2_SLOT_SCAN, 0x01, 0x01, 0xFF},
|
||||
|
||||
// SubFrame 2
|
||||
{L2_SLOT_SCAN, 0x00, 0x01, 0xFF},
|
||||
{L2_SLOT_SCAN, 0x01, 0x01, 0xFF},
|
||||
{L2_SLOT_SCAN, 0x00, 0x01, 0xFF},
|
||||
{L2_SLOT_SCAN, 0x01, 0x01, 0xFF},
|
||||
{L2_SLOT_SCAN, 0x00, 0x01, 0xFF},
|
||||
{L2_SLOT_SCAN, 0x01, 0x01, 0xFF},
|
||||
{L2_SLOT_SCAN, 0x00, 0x01, 0xFF},
|
||||
{L2_SLOT_SCAN, 0x01, 0x01, 0xFF},
|
||||
{L2_SLOT_SCAN, 0x00, 0x01, 0xFF},
|
||||
{L2_SLOT_SCAN, 0x01, 0x01, 0xFF},
|
||||
{L2_SLOT_SCAN, 0x00, 0x01, 0xFF},
|
||||
{L2_SLOT_SCAN, 0x01, 0x01, 0xFF},
|
||||
{L2_SLOT_SCAN, 0x00, 0x01, 0xFF},
|
||||
{L2_SLOT_SCAN, 0x01, 0x01, 0xFF},
|
||||
{L2_SLOT_SCAN, 0x00, 0x01, 0xFF},
|
||||
{L2_SLOT_SCAN, 0x01, 0x01, 0xFF},
|
||||
{L2_SLOT_SCAN, 0x00, 0x01, 0xFF},
|
||||
{L2_SLOT_SCAN, 0x01, 0x01, 0xFF},
|
||||
{L2_SLOT_SCAN, 0x00, 0x01, 0xFF},
|
||||
{L2_SLOT_SCAN, 0x01, 0x01, 0xFF},
|
||||
|
||||
// SubFrame 3
|
||||
{L2_SLOT_SCAN, 0x00, 0x01, 0xFF},
|
||||
{L2_SLOT_SCAN, 0x01, 0x01, 0xFF},
|
||||
{L2_SLOT_SCAN, 0x00, 0x01, 0xFF},
|
||||
{L2_SLOT_SCAN, 0x01, 0x01, 0xFF},
|
||||
{L2_SLOT_SCAN, 0x00, 0x01, 0xFF},
|
||||
{L2_SLOT_SCAN, 0x01, 0x01, 0xFF},
|
||||
{L2_SLOT_SCAN, 0x00, 0x01, 0xFF},
|
||||
{L2_SLOT_SCAN, 0x01, 0x01, 0xFF},
|
||||
{L2_SLOT_SCAN, 0x00, 0x01, 0xFF},
|
||||
{L2_SLOT_SCAN, 0x01, 0x01, 0xFF},
|
||||
{L2_SLOT_SCAN, 0x00, 0x01, 0xFF},
|
||||
{L2_SLOT_SCAN, 0x01, 0x01, 0xFF},
|
||||
{L2_SLOT_SCAN, 0x00, 0x01, 0xFF},
|
||||
{L2_SLOT_SCAN, 0x01, 0x01, 0xFF},
|
||||
{L2_SLOT_ADVERTISE, 0x00, 0x01, 0xFF},
|
||||
{L2_SLOT_ADVERTISE, 0x01, 0x01, 0xFF},
|
||||
{L2_SLOT_ADVERTISE, 0x02, 0x01, 0xFF},
|
||||
{L2_SLOT_ADVERTISE, 0x03, 0x01, 0xFF},
|
||||
L2_RTNE_TABLE_ENTRY innerScanSubT[L2_SLOTS_PER_FRAME] =
|
||||
{
|
||||
// 36 slots: advertise of antenna-1 ~ antenna-3
|
||||
// 12 slots: idle for no antenna-4
|
||||
// 2 slots: service slot, set to idle
|
||||
{L2_SLOT_ADVERTISE, 0x00, 0x01, L2_BROADCAST_ID1},
|
||||
{L2_SLOT_ADVERTISE, 0x01, 0x01, L2_BROADCAST_ID1},
|
||||
{L2_SLOT_ADVERTISE, 0x02, 0x01, L2_BROADCAST_ID1},
|
||||
{L2_SLOT_ADVERTISE, 0x03, 0x01, L2_BROADCAST_ID1},
|
||||
{L2_SLOT_ADVERTISE, 0x04, 0x01, L2_BROADCAST_ID1},
|
||||
{L2_SLOT_ADVERTISE, 0x05, 0x01, L2_BROADCAST_ID1},
|
||||
{L2_SLOT_ADVERTISE, 0x06, 0x01, L2_BROADCAST_ID1},
|
||||
{L2_SLOT_ADVERTISE, 0x07, 0x01, L2_BROADCAST_ID1},
|
||||
{L2_SLOT_ADVERTISE, 0x08, 0x01, L2_BROADCAST_ID1},
|
||||
{L2_SLOT_ADVERTISE, 0x09, 0x01, L2_BROADCAST_ID1},
|
||||
{L2_SLOT_ADVERTISE, 0x0A, 0x01, L2_BROADCAST_ID1},
|
||||
{L2_SLOT_ADVERTISE, 0x0B, 0x01, L2_BROADCAST_ID1},
|
||||
{L2_SLOT_ADVERTISE, 0x00, 0x01, L2_BROADCAST_ID2},
|
||||
{L2_SLOT_ADVERTISE, 0x01, 0x01, L2_BROADCAST_ID2},
|
||||
{L2_SLOT_ADVERTISE, 0x02, 0x01, L2_BROADCAST_ID2},
|
||||
{L2_SLOT_ADVERTISE, 0x03, 0x01, L2_BROADCAST_ID2},
|
||||
{L2_SLOT_ADVERTISE, 0x04, 0x01, L2_BROADCAST_ID2},
|
||||
{L2_SLOT_ADVERTISE, 0x05, 0x01, L2_BROADCAST_ID2},
|
||||
{L2_SLOT_ADVERTISE, 0x06, 0x01, L2_BROADCAST_ID2},
|
||||
{L2_SLOT_ADVERTISE, 0x07, 0x01, L2_BROADCAST_ID2},
|
||||
{L2_SLOT_ADVERTISE, 0x08, 0x01, L2_BROADCAST_ID2},
|
||||
{L2_SLOT_ADVERTISE, 0x09, 0x01, L2_BROADCAST_ID2},
|
||||
{L2_SLOT_ADVERTISE, 0x0A, 0x01, L2_BROADCAST_ID2},
|
||||
{L2_SLOT_ADVERTISE, 0x0B, 0x01, L2_BROADCAST_ID2},
|
||||
{L2_SLOT_ADVERTISE, 0x00, 0x01, L2_BROADCAST_ID3},
|
||||
{L2_SLOT_ADVERTISE, 0x01, 0x01, L2_BROADCAST_ID3},
|
||||
{L2_SLOT_ADVERTISE, 0x02, 0x01, L2_BROADCAST_ID3},
|
||||
{L2_SLOT_ADVERTISE, 0x03, 0x01, L2_BROADCAST_ID3},
|
||||
{L2_SLOT_ADVERTISE, 0x04, 0x01, L2_BROADCAST_ID3},
|
||||
{L2_SLOT_ADVERTISE, 0x05, 0x01, L2_BROADCAST_ID3},
|
||||
{L2_SLOT_ADVERTISE, 0x06, 0x01, L2_BROADCAST_ID3},
|
||||
{L2_SLOT_ADVERTISE, 0x07, 0x01, L2_BROADCAST_ID3},
|
||||
{L2_SLOT_ADVERTISE, 0x08, 0x01, L2_BROADCAST_ID3},
|
||||
{L2_SLOT_ADVERTISE, 0x09, 0x01, L2_BROADCAST_ID3},
|
||||
{L2_SLOT_ADVERTISE, 0x0A, 0x01, L2_BROADCAST_ID3},
|
||||
{L2_SLOT_ADVERTISE, 0x0B, 0x01, L2_BROADCAST_ID3},
|
||||
{L2_SLOT_IDLE, 0x00, 0x00, 0x00},
|
||||
{L2_SLOT_IDLE, 0x00, 0x00, 0x00},
|
||||
{L2_SLOT_IDLE, 0x00, 0x00, 0x00},
|
||||
{L2_SLOT_IDLE, 0x00, 0x00, 0x00},
|
||||
{L2_SLOT_IDLE, 0x00, 0x00, 0x00},
|
||||
{L2_SLOT_IDLE, 0x00, 0x00, 0x00},
|
||||
{L2_SLOT_IDLE, 0x00, 0x00, 0x00},
|
||||
{L2_SLOT_IDLE, 0x00, 0x00, 0x00},
|
||||
{L2_SLOT_IDLE, 0x00, 0x00, 0x00},
|
||||
{L2_SLOT_IDLE, 0x00, 0x00, 0x00},
|
||||
{L2_SLOT_IDLE, 0x00, 0x00, 0x00},
|
||||
{L2_SLOT_IDLE, 0x00, 0x00, 0x00},
|
||||
{L2_SLOT_IDLE, 0x00, 0x00, 0x00},
|
||||
{L2_SLOT_IDLE, 0x00, 0x00, 0x00},
|
||||
|
||||
// SubFrame 4
|
||||
{L2_SLOT_CONFIRM, 0x00, 0x01, 0xFF},
|
||||
{L2_SLOT_CONFIRM, 0x01, 0x01, 0xFF},
|
||||
{L2_SLOT_CONFIRM, 0x02, 0x01, 0xFF},
|
||||
{L2_SLOT_CONFIRM, 0x03, 0x01, 0xFF},
|
||||
{L2_SLOT_IDLE, 0x00, 0x00, 0x00},
|
||||
{L2_SLOT_CONFIRM, 0x00, 0x01, 0xFF},
|
||||
{L2_SLOT_CONFIRM, 0x01, 0x01, 0xFF},
|
||||
{L2_SLOT_CONFIRM, 0x02, 0x01, 0xFF},
|
||||
{L2_SLOT_CONFIRM, 0x03, 0x01, 0xFF},
|
||||
{L2_SLOT_IDLE, 0x00, 0x00, 0x00},
|
||||
{L2_SLOT_CONFIRM, 0x00, 0xFF, 0x01},
|
||||
{L2_SLOT_CONFIRM, 0x01, 0xFF, 0x01},
|
||||
{L2_SLOT_CONFIRM, 0x02, 0xFF, 0x01},
|
||||
{L2_SLOT_CONFIRM, 0x03, 0xFF, 0x01},
|
||||
{L2_SLOT_IDLE, 0x00, 0x00, 0x00},
|
||||
{L2_SLOT_CONFIRM, 0x00, 0xFF, 0x01},
|
||||
{L2_SLOT_CONFIRM, 0x01, 0xFF, 0x01},
|
||||
{L2_SLOT_CONFIRM, 0x02, 0xFF, 0x01},
|
||||
{L2_SLOT_CONFIRM, 0x03, 0xFF, 0x01},
|
||||
{L2_SLOT_IDLE, 0x00, 0x00, 0x00},
|
||||
};
|
||||
// 36 slots: acknowledge of member nodes
|
||||
// 14 slots: service
|
||||
{L2_SLOT_ACKNOWLEDGE, 0x00, 0x02, 0x01},
|
||||
{L2_SLOT_ACKNOWLEDGE, 0x01, 0x02, 0x01},
|
||||
{L2_SLOT_ACKNOWLEDGE, 0x02, 0x02, 0x01},
|
||||
{L2_SLOT_ACKNOWLEDGE, 0x03, 0x02, 0x01},
|
||||
{L2_SLOT_ACKNOWLEDGE, 0x00, 0x03, 0x01},
|
||||
{L2_SLOT_ACKNOWLEDGE, 0x01, 0x03, 0x01},
|
||||
{L2_SLOT_ACKNOWLEDGE, 0x02, 0x03, 0x01},
|
||||
{L2_SLOT_ACKNOWLEDGE, 0x03, 0x03, 0x01},
|
||||
{L2_SLOT_ACKNOWLEDGE, 0x00, 0x04, 0x01},
|
||||
{L2_SLOT_ACKNOWLEDGE, 0x01, 0x04, 0x01},
|
||||
{L2_SLOT_ACKNOWLEDGE, 0x02, 0x04, 0x01},
|
||||
{L2_SLOT_ACKNOWLEDGE, 0x03, 0x04, 0x01},
|
||||
{L2_SLOT_ACKNOWLEDGE, 0x00, 0x05, 0x01},
|
||||
{L2_SLOT_ACKNOWLEDGE, 0x01, 0x05, 0x01},
|
||||
{L2_SLOT_ACKNOWLEDGE, 0x02, 0x05, 0x01},
|
||||
{L2_SLOT_ACKNOWLEDGE, 0x03, 0x05, 0x01},
|
||||
{L2_SLOT_ACKNOWLEDGE, 0x00, 0x06, 0x01},
|
||||
{L2_SLOT_ACKNOWLEDGE, 0x01, 0x06, 0x01},
|
||||
{L2_SLOT_ACKNOWLEDGE, 0x02, 0x06, 0x01},
|
||||
{L2_SLOT_ACKNOWLEDGE, 0x03, 0x06, 0x01},
|
||||
{L2_SLOT_ACKNOWLEDGE, 0x00, 0x07, 0x01},
|
||||
{L2_SLOT_ACKNOWLEDGE, 0x01, 0x07, 0x01},
|
||||
{L2_SLOT_ACKNOWLEDGE, 0x02, 0x07, 0x01},
|
||||
{L2_SLOT_ACKNOWLEDGE, 0x03, 0x07, 0x01},
|
||||
{L2_SLOT_ACKNOWLEDGE, 0x00, 0x08, 0x01},
|
||||
{L2_SLOT_ACKNOWLEDGE, 0x01, 0x08, 0x01},
|
||||
{L2_SLOT_ACKNOWLEDGE, 0x02, 0x08, 0x01},
|
||||
{L2_SLOT_ACKNOWLEDGE, 0x03, 0x08, 0x01},
|
||||
{L2_SLOT_ACKNOWLEDGE, 0x00, 0x09, 0x01},
|
||||
{L2_SLOT_ACKNOWLEDGE, 0x01, 0x09, 0x01},
|
||||
{L2_SLOT_ACKNOWLEDGE, 0x02, 0x09, 0x01},
|
||||
{L2_SLOT_ACKNOWLEDGE, 0x03, 0x09, 0x01},
|
||||
{L2_SLOT_ACKNOWLEDGE, 0x00, 0x0A, 0x01},
|
||||
{L2_SLOT_ACKNOWLEDGE, 0x01, 0x0A, 0x01},
|
||||
{L2_SLOT_ACKNOWLEDGE, 0x02, 0x0A, 0x01},
|
||||
{L2_SLOT_ACKNOWLEDGE, 0x03, 0x0A, 0x01},
|
||||
{L2_SLOT_SERVICE, 0x00, 0x01, 0x02},
|
||||
{L2_SLOT_SERVICE, 0x01, 0x01, 0x02},
|
||||
{L2_SLOT_SERVICE, 0x00, 0x01, 0x03},
|
||||
{L2_SLOT_SERVICE, 0x01, 0x01, 0x03},
|
||||
{L2_SLOT_SERVICE, 0x00, 0x01, 0x04},
|
||||
{L2_SLOT_SERVICE, 0x01, 0x01, 0x04},
|
||||
{L2_SLOT_SERVICE, 0x00, 0x01, 0x05},
|
||||
{L2_SLOT_SERVICE, 0x01, 0x01, 0x05},
|
||||
{L2_SLOT_SERVICE, 0x00, 0x01, 0x06},
|
||||
{L2_SLOT_SERVICE, 0x01, 0x01, 0x06},
|
||||
{L2_SLOT_SERVICE, 0x00, 0x01, 0x07},
|
||||
{L2_SLOT_SERVICE, 0x01, 0x01, 0x07},
|
||||
{L2_SLOT_SERVICE, 0x00, 0x01, 0x08},
|
||||
{L2_SLOT_SERVICE, 0x01, 0x01, 0x08},
|
||||
|
||||
L2_RTNE_TABLE_ENTRY normalSub[L2_SLOTS_PER_FRAME] = {
|
||||
// SubFrame 0
|
||||
{L2_SLOT_SERVICE, 0x00, 0x01, 0x02},
|
||||
{L2_SLOT_SERVICE, 0x01, 0x01, 0x02},
|
||||
{L2_SLOT_SERVICE, 0x02, 0x01, 0x02},
|
||||
{L2_SLOT_SERVICE, 0x03, 0x01, 0x02},
|
||||
{L2_SLOT_IDLE, 0x00, 0x00, 0x00},
|
||||
// 12 slots: network management, head <--> node
|
||||
// 18 slots: message distribution, head ---> node
|
||||
// 12 slots: rtt, head <--> node
|
||||
// 8 slots: service
|
||||
{L2_SLOT_MANAGE, 0x00, 0x01, 0x02},
|
||||
{L2_SLOT_MANAGE, 0x01, 0x01, 0x02},
|
||||
{L2_SLOT_MANAGE, 0x00, 0x01, 0x03},
|
||||
{L2_SLOT_MANAGE, 0x01, 0x01, 0x03},
|
||||
{L2_SLOT_MANAGE, 0x00, 0x01, 0x04},
|
||||
{L2_SLOT_MANAGE, 0x01, 0x01, 0x04},
|
||||
{L2_SLOT_MANAGE, 0x00, 0x02, 0x01},
|
||||
{L2_SLOT_MANAGE, 0x01, 0x02, 0x01},
|
||||
{L2_SLOT_MANAGE, 0x00, 0x03, 0x01},
|
||||
{L2_SLOT_MANAGE, 0x01, 0x03, 0x01},
|
||||
{L2_SLOT_MANAGE, 0x00, 0x04, 0x01},
|
||||
{L2_SLOT_MANAGE, 0x01, 0x04, 0x01},
|
||||
{L2_SLOT_DISTRIBUTE, 0x00, 0x01, 0x02},
|
||||
{L2_SLOT_DISTRIBUTE, 0x01, 0x01, 0x02},
|
||||
{L2_SLOT_DISTRIBUTE, 0x00, 0x01, 0x03},
|
||||
{L2_SLOT_DISTRIBUTE, 0x01, 0x01, 0x03},
|
||||
{L2_SLOT_DISTRIBUTE, 0x00, 0x01, 0x04},
|
||||
{L2_SLOT_DISTRIBUTE, 0x01, 0x01, 0x04},
|
||||
{L2_SLOT_DISTRIBUTE, 0x00, 0x01, 0x05},
|
||||
{L2_SLOT_DISTRIBUTE, 0x01, 0x01, 0x05},
|
||||
{L2_SLOT_DISTRIBUTE, 0x00, 0x01, 0x06},
|
||||
{L2_SLOT_DISTRIBUTE, 0x01, 0x01, 0x06},
|
||||
{L2_SLOT_DISTRIBUTE, 0x00, 0x01, 0x07},
|
||||
{L2_SLOT_DISTRIBUTE, 0x01, 0x01, 0x07},
|
||||
{L2_SLOT_DISTRIBUTE, 0x00, 0x01, 0x08},
|
||||
{L2_SLOT_DISTRIBUTE, 0x01, 0x01, 0x08},
|
||||
{L2_SLOT_DISTRIBUTE, 0x00, 0x01, 0x09},
|
||||
{L2_SLOT_DISTRIBUTE, 0x01, 0x01, 0x09},
|
||||
{L2_SLOT_DISTRIBUTE, 0x00, 0x01, 0x0A},
|
||||
{L2_SLOT_DISTRIBUTE, 0x01, 0x01, 0x0A},
|
||||
{L2_SLOT_RTT, 0x00, 0x01, 0x02},
|
||||
{L2_SLOT_RTT, 0x01, 0x01, 0x02},
|
||||
{L2_SLOT_RTT, 0x00, 0x01, 0x03},
|
||||
{L2_SLOT_RTT, 0x01, 0x01, 0x03},
|
||||
{L2_SLOT_RTT, 0x00, 0x01, 0x04},
|
||||
{L2_SLOT_RTT, 0x01, 0x01, 0x04},
|
||||
{L2_SLOT_RTT, 0x00, 0x02, 0x01},
|
||||
{L2_SLOT_RTT, 0x01, 0x02, 0x01},
|
||||
{L2_SLOT_RTT, 0x00, 0x03, 0x01},
|
||||
{L2_SLOT_RTT, 0x01, 0x03, 0x01},
|
||||
{L2_SLOT_RTT, 0x00, 0x04, 0x01},
|
||||
{L2_SLOT_RTT, 0x01, 0x04, 0x01},
|
||||
{L2_SLOT_SERVICE, 0x00, 0x01, 0x09},
|
||||
{L2_SLOT_SERVICE, 0x01, 0x01, 0x09},
|
||||
{L2_SLOT_SERVICE, 0x00, 0x01, 0x0A},
|
||||
{L2_SLOT_SERVICE, 0x01, 0x01, 0x0A},
|
||||
{L2_SLOT_SERVICE, 0x00, 0x01, 0x0B},
|
||||
{L2_SLOT_SERVICE, 0x01, 0x01, 0x0B},
|
||||
{L2_SLOT_SERVICE, 0x00, 0x02, 0x01},
|
||||
{L2_SLOT_SERVICE, 0x01, 0x02, 0x01},
|
||||
{L2_SLOT_SERVICE, 0x02, 0x02, 0x01},
|
||||
{L2_SLOT_SERVICE, 0x03, 0x02, 0x01},
|
||||
{L2_SLOT_IDLE, 0x00, 0x00, 0x00},
|
||||
{L2_SLOT_SERVICE, 0x00, 0x01, 0x02},
|
||||
{L2_SLOT_SERVICE, 0x01, 0x01, 0x02},
|
||||
{L2_SLOT_SERVICE, 0x02, 0x01, 0x02},
|
||||
{L2_SLOT_SERVICE, 0x03, 0x01, 0x02},
|
||||
{L2_SLOT_IDLE, 0x00, 0x00, 0x00},
|
||||
{L2_SLOT_SERVICE, 0x00, 0x02, 0x01},
|
||||
{L2_SLOT_SERVICE, 0x01, 0x02, 0x01},
|
||||
{L2_SLOT_SERVICE, 0x02, 0x02, 0x01},
|
||||
{L2_SLOT_SERVICE, 0x03, 0x02, 0x01},
|
||||
{L2_SLOT_IDLE, 0x00, 0x00, 0x00},
|
||||
|
||||
// SubFrame 1
|
||||
{L2_SLOT_SERVICE, 0x00, 0x01, 0x02},
|
||||
{L2_SLOT_SERVICE, 0x01, 0x01, 0x02},
|
||||
{L2_SLOT_SERVICE, 0x02, 0x01, 0x02},
|
||||
{L2_SLOT_SERVICE, 0x03, 0x01, 0x02},
|
||||
{L2_SLOT_IDLE, 0x00, 0x00, 0x00},
|
||||
{L2_SLOT_SERVICE, 0x00, 0x02, 0x01},
|
||||
{L2_SLOT_SERVICE, 0x01, 0x02, 0x01},
|
||||
{L2_SLOT_SERVICE, 0x02, 0x02, 0x01},
|
||||
{L2_SLOT_SERVICE, 0x03, 0x02, 0x01},
|
||||
{L2_SLOT_IDLE, 0x00, 0x00, 0x00},
|
||||
{L2_SLOT_SERVICE, 0x00, 0x01, 0x02},
|
||||
{L2_SLOT_SERVICE, 0x01, 0x01, 0x02},
|
||||
{L2_SLOT_SERVICE, 0x02, 0x01, 0x02},
|
||||
{L2_SLOT_SERVICE, 0x03, 0x01, 0x02},
|
||||
{L2_SLOT_IDLE, 0x00, 0x00, 0x00},
|
||||
{L2_SLOT_SERVICE, 0x00, 0x02, 0x01},
|
||||
{L2_SLOT_SERVICE, 0x01, 0x02, 0x01},
|
||||
{L2_SLOT_SERVICE, 0x02, 0x02, 0x01},
|
||||
{L2_SLOT_SERVICE, 0x03, 0x02, 0x01},
|
||||
{L2_SLOT_IDLE, 0x00, 0x00, 0x00},
|
||||
// 12 slots: network management, head <--> node
|
||||
// 18 slots: message distribution, head ---> node
|
||||
// 12 slots: rtt, head <--> node
|
||||
// 8 slots: service
|
||||
{L2_SLOT_MANAGE, 0x00, 0x01, 0x05},
|
||||
{L2_SLOT_MANAGE, 0x01, 0x01, 0x05},
|
||||
{L2_SLOT_MANAGE, 0x00, 0x01, 0x06},
|
||||
{L2_SLOT_MANAGE, 0x01, 0x01, 0x06},
|
||||
{L2_SLOT_MANAGE, 0x00, 0x01, 0x07},
|
||||
{L2_SLOT_MANAGE, 0x01, 0x01, 0x07},
|
||||
{L2_SLOT_MANAGE, 0x00, 0x05, 0x01},
|
||||
{L2_SLOT_MANAGE, 0x01, 0x05, 0x01},
|
||||
{L2_SLOT_MANAGE, 0x00, 0x06, 0x01},
|
||||
{L2_SLOT_MANAGE, 0x01, 0x06, 0x01},
|
||||
{L2_SLOT_MANAGE, 0x00, 0x07, 0x01},
|
||||
{L2_SLOT_MANAGE, 0x01, 0x07, 0x01},
|
||||
{L2_SLOT_DISTRIBUTE, 0x00, 0x01, 0x02},
|
||||
{L2_SLOT_DISTRIBUTE, 0x01, 0x01, 0x02},
|
||||
{L2_SLOT_DISTRIBUTE, 0x00, 0x01, 0x03},
|
||||
{L2_SLOT_DISTRIBUTE, 0x01, 0x01, 0x03},
|
||||
{L2_SLOT_DISTRIBUTE, 0x00, 0x01, 0x04},
|
||||
{L2_SLOT_DISTRIBUTE, 0x01, 0x01, 0x04},
|
||||
{L2_SLOT_DISTRIBUTE, 0x00, 0x01, 0x05},
|
||||
{L2_SLOT_DISTRIBUTE, 0x01, 0x01, 0x05},
|
||||
{L2_SLOT_DISTRIBUTE, 0x00, 0x01, 0x06},
|
||||
{L2_SLOT_DISTRIBUTE, 0x01, 0x01, 0x06},
|
||||
{L2_SLOT_DISTRIBUTE, 0x00, 0x01, 0x07},
|
||||
{L2_SLOT_DISTRIBUTE, 0x01, 0x01, 0x07},
|
||||
{L2_SLOT_DISTRIBUTE, 0x00, 0x01, 0x08},
|
||||
{L2_SLOT_DISTRIBUTE, 0x01, 0x01, 0x08},
|
||||
{L2_SLOT_DISTRIBUTE, 0x00, 0x01, 0x09},
|
||||
{L2_SLOT_DISTRIBUTE, 0x01, 0x01, 0x09},
|
||||
{L2_SLOT_DISTRIBUTE, 0x00, 0x01, 0x0A},
|
||||
{L2_SLOT_DISTRIBUTE, 0x01, 0x01, 0x0A},
|
||||
{L2_SLOT_RTT, 0x00, 0x01, 0x05},
|
||||
{L2_SLOT_RTT, 0x01, 0x01, 0x05},
|
||||
{L2_SLOT_RTT, 0x00, 0x01, 0x06},
|
||||
{L2_SLOT_RTT, 0x01, 0x01, 0x06},
|
||||
{L2_SLOT_RTT, 0x00, 0x01, 0x07},
|
||||
{L2_SLOT_RTT, 0x01, 0x01, 0x07},
|
||||
{L2_SLOT_RTT, 0x00, 0x05, 0x01},
|
||||
{L2_SLOT_RTT, 0x01, 0x05, 0x01},
|
||||
{L2_SLOT_RTT, 0x00, 0x06, 0x01},
|
||||
{L2_SLOT_RTT, 0x01, 0x06, 0x01},
|
||||
{L2_SLOT_RTT, 0x00, 0x07, 0x01},
|
||||
{L2_SLOT_RTT, 0x01, 0x07, 0x01},
|
||||
{L2_SLOT_SERVICE, 0x00, 0x03, 0x01},
|
||||
{L2_SLOT_SERVICE, 0x01, 0x03, 0x01},
|
||||
{L2_SLOT_SERVICE, 0x00, 0x04, 0x01},
|
||||
{L2_SLOT_SERVICE, 0x01, 0x04, 0x01},
|
||||
{L2_SLOT_SERVICE, 0x00, 0x05, 0x01},
|
||||
{L2_SLOT_SERVICE, 0x01, 0x05, 0x01},
|
||||
{L2_SLOT_SERVICE, 0x00, 0x06, 0x01},
|
||||
{L2_SLOT_SERVICE, 0x01, 0x06, 0x01},
|
||||
|
||||
// SubFrame 2
|
||||
{L2_SLOT_SERVICE, 0x00, 0x01, 0x02},
|
||||
{L2_SLOT_SERVICE, 0x01, 0x01, 0x02},
|
||||
{L2_SLOT_SERVICE, 0x02, 0x01, 0x02},
|
||||
{L2_SLOT_SERVICE, 0x03, 0x01, 0x02},
|
||||
{L2_SLOT_IDLE, 0x00, 0x00, 0x00},
|
||||
{L2_SLOT_SERVICE, 0x00, 0x02, 0x01},
|
||||
{L2_SLOT_SERVICE, 0x01, 0x02, 0x01},
|
||||
{L2_SLOT_SERVICE, 0x02, 0x02, 0x01},
|
||||
{L2_SLOT_SERVICE, 0x03, 0x02, 0x01},
|
||||
{L2_SLOT_IDLE, 0x00, 0x00, 0x00},
|
||||
{L2_SLOT_SERVICE, 0x00, 0x01, 0x02},
|
||||
{L2_SLOT_SERVICE, 0x01, 0x01, 0x02},
|
||||
{L2_SLOT_SERVICE, 0x02, 0x01, 0x02},
|
||||
{L2_SLOT_SERVICE, 0x03, 0x01, 0x02},
|
||||
{L2_SLOT_IDLE, 0x00, 0x00, 0x00},
|
||||
{L2_SLOT_SERVICE, 0x00, 0x02, 0x01},
|
||||
{L2_SLOT_SERVICE, 0x01, 0x02, 0x01},
|
||||
{L2_SLOT_SERVICE, 0x02, 0x02, 0x01},
|
||||
{L2_SLOT_SERVICE, 0x03, 0x02, 0x01},
|
||||
{L2_SLOT_IDLE, 0x00, 0x00, 0x00},
|
||||
|
||||
// SubFrame 3
|
||||
{L2_SLOT_SERVICE, 0x00, 0x01, 0x02},
|
||||
{L2_SLOT_SERVICE, 0x01, 0x01, 0x02},
|
||||
{L2_SLOT_SERVICE, 0x02, 0x01, 0x02},
|
||||
{L2_SLOT_SERVICE, 0x03, 0x01, 0x02},
|
||||
{L2_SLOT_IDLE, 0x00, 0x00, 0x00},
|
||||
{L2_SLOT_SERVICE, 0x00, 0x02, 0x01},
|
||||
{L2_SLOT_SERVICE, 0x01, 0x02, 0x01},
|
||||
{L2_SLOT_SERVICE, 0x02, 0x02, 0x01},
|
||||
{L2_SLOT_SERVICE, 0x03, 0x02, 0x01},
|
||||
{L2_SLOT_IDLE, 0x00, 0x00, 0x00},
|
||||
{L2_SLOT_SERVICE, 0x00, 0x01, 0x02},
|
||||
{L2_SLOT_SERVICE, 0x01, 0x01, 0x02},
|
||||
{L2_SLOT_SERVICE, 0x02, 0x01, 0x02},
|
||||
{L2_SLOT_SERVICE, 0x03, 0x01, 0x02},
|
||||
{L2_SLOT_IDLE, 0x00, 0x00, 0x00},
|
||||
{L2_SLOT_SERVICE, 0x00, 0x02, 0x01},
|
||||
{L2_SLOT_SERVICE, 0x01, 0x02, 0x01},
|
||||
{L2_SLOT_SERVICE, 0x02, 0x02, 0x01},
|
||||
{L2_SLOT_SERVICE, 0x03, 0x02, 0x01},
|
||||
{L2_SLOT_IDLE, 0x00, 0x00, 0x00},
|
||||
|
||||
// SubFrame 4
|
||||
{L2_SLOT_SERVICE, 0x00, 0x01, 0x02},
|
||||
{L2_SLOT_SERVICE, 0x01, 0x01, 0x02},
|
||||
{L2_SLOT_SERVICE, 0x02, 0x01, 0x02},
|
||||
{L2_SLOT_SERVICE, 0x03, 0x01, 0x02},
|
||||
{L2_SLOT_IDLE, 0x00, 0x00, 0x00},
|
||||
{L2_SLOT_SERVICE, 0x00, 0x02, 0x01},
|
||||
{L2_SLOT_SERVICE, 0x01, 0x02, 0x01},
|
||||
{L2_SLOT_SERVICE, 0x02, 0x02, 0x01},
|
||||
{L2_SLOT_SERVICE, 0x03, 0x02, 0x01},
|
||||
{L2_SLOT_IDLE, 0x00, 0x00, 0x00},
|
||||
{L2_SLOT_SERVICE, 0x00, 0x01, 0x02},
|
||||
{L2_SLOT_SERVICE, 0x01, 0x01, 0x02},
|
||||
{L2_SLOT_SERVICE, 0x02, 0x01, 0x02},
|
||||
{L2_SLOT_SERVICE, 0x03, 0x01, 0x02},
|
||||
{L2_SLOT_IDLE, 0x00, 0x00, 0x00},
|
||||
{L2_SLOT_SERVICE, 0x00, 0x02, 0x01},
|
||||
{L2_SLOT_SERVICE, 0x01, 0x02, 0x01},
|
||||
{L2_SLOT_SERVICE, 0x02, 0x02, 0x01},
|
||||
{L2_SLOT_SERVICE, 0x03, 0x02, 0x01},
|
||||
// 12 slots: network management, head <--> node
|
||||
// 18 slots: message distribution, head ---> node
|
||||
// 12 slots: rtt, head <--> node
|
||||
// 8 slots: service, with one slot idle
|
||||
{L2_SLOT_MANAGE, 0x00, 0x01, 0x08},
|
||||
{L2_SLOT_MANAGE, 0x01, 0x01, 0x08},
|
||||
{L2_SLOT_MANAGE, 0x00, 0x01, 0x09},
|
||||
{L2_SLOT_MANAGE, 0x01, 0x01, 0x09},
|
||||
{L2_SLOT_MANAGE, 0x00, 0x01, 0x0A},
|
||||
{L2_SLOT_MANAGE, 0x01, 0x01, 0x0A},
|
||||
{L2_SLOT_MANAGE, 0x00, 0x08, 0x01},
|
||||
{L2_SLOT_MANAGE, 0x01, 0x08, 0x01},
|
||||
{L2_SLOT_MANAGE, 0x00, 0x09, 0x01},
|
||||
{L2_SLOT_MANAGE, 0x01, 0x09, 0x01},
|
||||
{L2_SLOT_MANAGE, 0x00, 0x0A, 0x01},
|
||||
{L2_SLOT_MANAGE, 0x01, 0x0A, 0x01},
|
||||
{L2_SLOT_DISTRIBUTE, 0x00, 0x01, 0x02},
|
||||
{L2_SLOT_DISTRIBUTE, 0x01, 0x01, 0x02},
|
||||
{L2_SLOT_DISTRIBUTE, 0x00, 0x01, 0x03},
|
||||
{L2_SLOT_DISTRIBUTE, 0x01, 0x01, 0x03},
|
||||
{L2_SLOT_DISTRIBUTE, 0x00, 0x01, 0x04},
|
||||
{L2_SLOT_DISTRIBUTE, 0x01, 0x01, 0x04},
|
||||
{L2_SLOT_DISTRIBUTE, 0x00, 0x01, 0x05},
|
||||
{L2_SLOT_DISTRIBUTE, 0x01, 0x01, 0x05},
|
||||
{L2_SLOT_DISTRIBUTE, 0x00, 0x01, 0x06},
|
||||
{L2_SLOT_DISTRIBUTE, 0x01, 0x01, 0x06},
|
||||
{L2_SLOT_DISTRIBUTE, 0x00, 0x01, 0x07},
|
||||
{L2_SLOT_DISTRIBUTE, 0x01, 0x01, 0x07},
|
||||
{L2_SLOT_DISTRIBUTE, 0x00, 0x01, 0x08},
|
||||
{L2_SLOT_DISTRIBUTE, 0x01, 0x01, 0x08},
|
||||
{L2_SLOT_DISTRIBUTE, 0x00, 0x01, 0x09},
|
||||
{L2_SLOT_DISTRIBUTE, 0x01, 0x01, 0x09},
|
||||
{L2_SLOT_DISTRIBUTE, 0x00, 0x01, 0x0A},
|
||||
{L2_SLOT_DISTRIBUTE, 0x01, 0x01, 0x0A},
|
||||
{L2_SLOT_RTT, 0x00, 0x01, 0x08},
|
||||
{L2_SLOT_RTT, 0x01, 0x01, 0x08},
|
||||
{L2_SLOT_RTT, 0x00, 0x01, 0x09},
|
||||
{L2_SLOT_RTT, 0x01, 0x01, 0x09},
|
||||
{L2_SLOT_RTT, 0x00, 0x01, 0x0A},
|
||||
{L2_SLOT_RTT, 0x01, 0x01, 0x0A},
|
||||
{L2_SLOT_RTT, 0x00, 0x08, 0x01},
|
||||
{L2_SLOT_RTT, 0x01, 0x08, 0x01},
|
||||
{L2_SLOT_RTT, 0x00, 0x09, 0x01},
|
||||
{L2_SLOT_RTT, 0x01, 0x09, 0x01},
|
||||
{L2_SLOT_RTT, 0x00, 0x0A, 0x01},
|
||||
{L2_SLOT_RTT, 0x01, 0x0A, 0x01},
|
||||
{L2_SLOT_SERVICE, 0x00, 0x08, 0x01},
|
||||
{L2_SLOT_SERVICE, 0x01, 0x08, 0x01},
|
||||
{L2_SLOT_SERVICE, 0x00, 0x09, 0x01},
|
||||
{L2_SLOT_SERVICE, 0x01, 0x09, 0x01},
|
||||
{L2_SLOT_SERVICE, 0x00, 0x0A, 0x01},
|
||||
{L2_SLOT_SERVICE, 0x01, 0x0A, 0x01},
|
||||
{L2_SLOT_IDLE, 0x00, 0x00, 0x00},
|
||||
{L2_SLOT_IDLE, 0x00, 0x00, 0x00}
|
||||
};
|
||||
|
||||
L2_RTNE_TABLE_ENTRY *initTable[L2_INIT_RTNE_PERIOD] =
|
||||
{
|
||||
intraScanSubT
|
||||
innerScanSubT
|
||||
};
|
||||
|
||||
L2_RTNE_TABLE_ENTRY *normalTable[L2_NORMAL_RTNE_PERIOD] =
|
||||
{
|
||||
normalSub
|
||||
innerScanSubT
|
||||
};
|
||||
|
||||
/** @} RoutineTable*/
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -36,6 +36,13 @@
|
||||
/**************************** Type Definitions *******************************/
|
||||
/************************** Function Prototypes ******************************/
|
||||
static int32_t Service_Packing(L2_INST *instPtr, L2_FRAME_TYPE type, uint8_t dstId);
|
||||
static void Service_PackingCommon(L2_INST *instPtr, L2_FRAME_TYPE type, uint8_t dstId);
|
||||
static int32_t Service_Packing128K(L2_INST *instPtr, L2_FRAME_TYPE type, uint8_t dstId);
|
||||
static int32_t Service_Packing512K(L2_INST *instPtr, L2_FRAME_TYPE type, uint8_t dstId);
|
||||
static int32_t Service_Packing2M(L2_INST *instPtr, L2_FRAME_TYPE type, uint8_t dstId);
|
||||
static int32_t Service_PktHandler128K(L2_INST *instPtr, uint8_t *msg);
|
||||
static int32_t Service_PktHandler512K(L2_INST *instPtr, uint8_t *msg);
|
||||
static int32_t Service_PktHandler2M(L2_INST *instPtr, uint8_t *msg);
|
||||
/************************** Variable Definitions *****************************/
|
||||
|
||||
static uint8_t testData[L2_PACK_LEN_MAX] =
|
||||
@@ -91,75 +98,242 @@ static int32_t Service_Packing(L2_INST *instPtr, L2_FRAME_TYPE type, uint8_t dst
|
||||
#ifndef DATALINK_ENABLE_BERTEST
|
||||
ASSERT(instPtr != NULL);
|
||||
int32_t Status;
|
||||
uint32_t dataChunk;
|
||||
uint8_t *buff = instPtr->sendPktData;
|
||||
|
||||
// Common section of link layer package
|
||||
dataChunk = L2_GetNextFrameNum(instPtr);
|
||||
L2_FrameInsertChunk(buff, L2_MSG_FRAME_NUM, L2_MSG_FRAME_NUM_LEN, &dataChunk);
|
||||
dataChunk = L2_GetNextSlotNum(instPtr);
|
||||
L2_FrameInsertChunk(buff, L2_MSG_SLOT_NUM, L2_MSG_SLOT_NUM_LEN, &dataChunk);
|
||||
dataChunk = L2_GetNodeId(instPtr);
|
||||
L2_FrameInsertChunk(buff, L2_MSG_SRC_ID, L2_MSG_SRC_ID_LEN, &dataChunk);
|
||||
dataChunk = dstId;
|
||||
L2_FrameInsertChunk(buff, L2_MSG_DST_ID, L2_MSG_DST_ID_LEN, &dataChunk);
|
||||
switch (type)
|
||||
{
|
||||
case L2_SVC_FRAME:
|
||||
case L2_FRAME_DIS:
|
||||
case L2_FRAME_MNG:
|
||||
case L2_FRAME_RTT:
|
||||
{
|
||||
dataChunk = L2_SVC_FRAME;
|
||||
L2_FrameInsertChunk(buff, L2_MSG_TYPE, L2_MSG_TYPE_LEN, &dataChunk);
|
||||
|
||||
SysMonitor_GetSysinfo(&(instPtr->sysInfo));
|
||||
// insert position and speed info
|
||||
L2_FrameInsertChunk(buff, L2_MSG_SVC_SRC_POSX, L2_MSG_SVC_SRC_POSX_LEN, &(instPtr->sysInfo.posX));
|
||||
L2_FrameInsertChunk(buff, L2_MSG_SVC_SRC_POSY, L2_MSG_SVC_SRC_POSY_LEN, &(instPtr->sysInfo.posY));
|
||||
L2_FrameInsertChunk(buff, L2_MSG_SVC_SRC_POSZ, L2_MSG_SVC_SRC_POSZ_LEN, &(instPtr->sysInfo.posZ));
|
||||
L2_FrameInsertChunk(buff, L2_MSG_SVC_SRC_SPEEDX, L2_MSG_SVC_SRC_SPEEDX_LEN, &(instPtr->sysInfo.vX));
|
||||
L2_FrameInsertChunk(buff, L2_MSG_SVC_SRC_SPEEDY, L2_MSG_SVC_SRC_SPEEDY_LEN, &(instPtr->sysInfo.vY));
|
||||
L2_FrameInsertChunk(buff, L2_MSG_SVC_SRC_SPEEDZ, L2_MSG_SVC_SRC_SPEEDZ_LEN, &(instPtr->sysInfo.vZ));
|
||||
|
||||
uint32_t dataId;
|
||||
if (L2_GetNodeType(instPtr) == L2_NODE_HEAD)
|
||||
Status = Service_Packing128K(instPtr, type, dstId);
|
||||
break;
|
||||
}
|
||||
case L2_FRAME_SVC:
|
||||
{
|
||||
switch (instPtr->config.serviceRate)
|
||||
{
|
||||
SysMonitor_GetSendPayload(buff + L2_MSG_SVC_PAYLOAD, &dataId, PAYLOAD_LEN_FLJ_TX);
|
||||
case L2_SVC_128K:
|
||||
Status = Service_Packing128K(instPtr, type, dstId);
|
||||
break;
|
||||
case L2_SVC_512K:
|
||||
Status = Service_Packing512K(instPtr, type, dstId);
|
||||
break;
|
||||
case L2_SVC_2M:
|
||||
Status = Service_Packing2M(instPtr, type, dstId);
|
||||
break;
|
||||
default:
|
||||
DBG_ERROR("Unexpected service rate: %" PRIu8 ".\n", instPtr->config.serviceRate);
|
||||
return EPARAM;
|
||||
}
|
||||
else
|
||||
{
|
||||
SysMonitor_GetSendPayload(buff + L2_MSG_SVC_PAYLOAD, &dataId, PAYLOAD_LEN_LJ_TX);
|
||||
}
|
||||
|
||||
L2_FrameInsertChunk(buff, L2_MSG_SVC_PAYLOAD_ID, L2_MSG_SVC_PAYLOAD_ID_LEN, &dataId);
|
||||
if (dataId == DATA_ID_NONE)
|
||||
{
|
||||
L2_FrameInsertChunk(buff, L2_MSG_SVC_PAYLOAD, L2_MSG_SVC_PAYLOAD_LEN, testData);
|
||||
}
|
||||
|
||||
Status = L2_CrcAppend(buff, L2_SVC_PACK_LEN - L2_MSG_SVC_CRC_LEN, L2_MSG_SVC_CRC, L2_CRC16_1021);
|
||||
if (Status != SUCCESS)
|
||||
{
|
||||
DBG_ERROR("Fail to append CRC...\n");
|
||||
return Status;
|
||||
}
|
||||
|
||||
memcpy(instPtr->log.txLog.data, buff, L2_SVC_PACK_LEN);
|
||||
instPtr->log.txLog.dataId = dataId;
|
||||
break;
|
||||
}
|
||||
default:
|
||||
{
|
||||
DBG_ERROR("Unexpected frame type: %" PRIu8 ".\n", type);
|
||||
return EPARAM;
|
||||
break;
|
||||
}
|
||||
}
|
||||
return SUCCESS;
|
||||
return Status;
|
||||
#else
|
||||
DBG_ERROR("Unexpected call of Service_Packing in BER test mode.\n");
|
||||
return EUNEXP;
|
||||
#endif
|
||||
}
|
||||
|
||||
/*****************************************************************************/
|
||||
/**
|
||||
* @brief Packing Service message (common part)
|
||||
*
|
||||
* @param instPtr pointer to linklayer instance
|
||||
* type message type.
|
||||
* dstId destination node address.
|
||||
*
|
||||
* @return EPARAM
|
||||
* SUCCESS
|
||||
*
|
||||
******************************************************************************/
|
||||
static void Service_PackingCommon(L2_INST *instPtr, L2_FRAME_TYPE type, uint8_t dstId)
|
||||
{
|
||||
ASSERT(instPtr != NULL);
|
||||
|
||||
L2_MSG_COMMON *message = (L2_MSG_COMMON *)(instPtr->sendPktData);
|
||||
|
||||
// Common section of link layer package
|
||||
message->frameNum = L2_GetNextFrameNum(instPtr);
|
||||
message->slotNum = L2_GetNextSlotNum(instPtr);
|
||||
message->src = L2_GetNodeId(instPtr);
|
||||
message->dst = dstId;
|
||||
message->msgType = type;
|
||||
}
|
||||
|
||||
/*****************************************************************************/
|
||||
/**
|
||||
* @brief Packing Service message (128 kbps)
|
||||
*
|
||||
* @param instPtr pointer to linklayer instance
|
||||
* type message type.
|
||||
* dstId destination node address.
|
||||
*
|
||||
* @return EPARAM
|
||||
* SUCCESS
|
||||
*
|
||||
******************************************************************************/
|
||||
static int32_t Service_Packing128K(L2_INST *instPtr, L2_FRAME_TYPE type, uint8_t dstId)
|
||||
{
|
||||
ASSERT(instPtr != NULL);
|
||||
int32_t Status;
|
||||
|
||||
Service_PackingCommon(instPtr, type, dstId);
|
||||
|
||||
L2_MSG_SVC_128K *message = (L2_MSG_SVC_128K *)(instPtr->sendPktData);
|
||||
size_t msgLen = sizeof(L2_MSG_SVC_128K);
|
||||
size_t dataLen = L2_PAYLOAD_LEN_SVC_128K;
|
||||
|
||||
// insert position and speed info
|
||||
SysMonitor_GetSysinfo(&(instPtr->sysInfo));
|
||||
message->srcPosX = instPtr->sysInfo.posX;
|
||||
message->srcPosY = instPtr->sysInfo.posY;
|
||||
message->srcPosZ = instPtr->sysInfo.posZ;
|
||||
message->srcSpeedX = instPtr->sysInfo.vX;
|
||||
message->srcSpeedY = instPtr->sysInfo.vY;
|
||||
message->srcSpeedZ = instPtr->sysInfo.vZ;
|
||||
|
||||
// Packing extra payload
|
||||
SysMonitor_GetSendPayload(message->svcData, &(message->svcDataId), dataLen);
|
||||
if (message->svcDataId == DATA_ID_NONE)
|
||||
{
|
||||
memset(message->svcData, 0xAA, dataLen);
|
||||
}
|
||||
|
||||
// Append CRC
|
||||
uint32_t crcVal;
|
||||
Status = L2_CrcGen((uint8_t *)message, msgLen - L2_MSG_CRC_LEN, L2_CRC8_31, &crcVal);
|
||||
if (Status != SUCCESS)
|
||||
{
|
||||
DBG_ERROR("Fail to generate CRC, error code: %" PRId32 ".\n", Status);
|
||||
return Status;
|
||||
}
|
||||
message->crc = crcVal;
|
||||
|
||||
// Logging...
|
||||
memcpy(instPtr->log.txLog.data, message, msgLen);
|
||||
instPtr->log.txLog.dataId = message->svcDataId;
|
||||
|
||||
return SUCCESS;
|
||||
}
|
||||
|
||||
/*****************************************************************************/
|
||||
/**
|
||||
* @brief Packing Service message (512 kbps)
|
||||
*
|
||||
* @param instPtr pointer to linklayer instance
|
||||
* type message type.
|
||||
* dstId destination node address.
|
||||
*
|
||||
* @return EPARAM
|
||||
* SUCCESS
|
||||
*
|
||||
******************************************************************************/
|
||||
static int32_t Service_Packing512K(L2_INST *instPtr, L2_FRAME_TYPE type, uint8_t dstId)
|
||||
{
|
||||
ASSERT(instPtr != NULL);
|
||||
int32_t Status;
|
||||
|
||||
Service_PackingCommon(instPtr, type, dstId);
|
||||
|
||||
L2_MSG_SVC_512K *message = (L2_MSG_SVC_512K *)(instPtr->sendPktData);
|
||||
size_t msgLen = sizeof(L2_MSG_SVC_512K);
|
||||
size_t dataLen = L2_PAYLOAD_LEN_SVC_512K;
|
||||
|
||||
// insert position and speed info
|
||||
SysMonitor_GetSysinfo(&(instPtr->sysInfo));
|
||||
message->srcPosX = instPtr->sysInfo.posX;
|
||||
message->srcPosY = instPtr->sysInfo.posY;
|
||||
message->srcPosZ = instPtr->sysInfo.posZ;
|
||||
message->srcSpeedX = instPtr->sysInfo.vX;
|
||||
message->srcSpeedY = instPtr->sysInfo.vY;
|
||||
message->srcSpeedZ = instPtr->sysInfo.vZ;
|
||||
|
||||
// Packing extra payload
|
||||
SysMonitor_GetSendPayload(message->svcData, &(message->svcDataId), dataLen);
|
||||
if (message->svcDataId == DATA_ID_NONE)
|
||||
{
|
||||
memset(message->svcData, 0xAA, dataLen);
|
||||
}
|
||||
|
||||
// Append CRC
|
||||
uint32_t crcVal;
|
||||
Status = L2_CrcGen((uint8_t *)message, msgLen - L2_MSG_CRC_LEN, L2_CRC8_31, &crcVal);
|
||||
if (Status != SUCCESS)
|
||||
{
|
||||
DBG_ERROR("Fail to generate CRC, error code: %" PRId32 ".\n", Status);
|
||||
return Status;
|
||||
}
|
||||
message->crc = crcVal;
|
||||
|
||||
// Logging...
|
||||
memcpy(instPtr->log.txLog.data, message, msgLen);
|
||||
instPtr->log.txLog.dataId = message->svcDataId;
|
||||
|
||||
|
||||
return SUCCESS;
|
||||
}
|
||||
|
||||
/*****************************************************************************/
|
||||
/**
|
||||
* @brief Packing Service message (2 Mbps)
|
||||
*
|
||||
* @param instPtr pointer to linklayer instance
|
||||
* type message type.
|
||||
* dstId destination node address.
|
||||
*
|
||||
* @return EPARAM
|
||||
* SUCCESS
|
||||
*
|
||||
******************************************************************************/
|
||||
static int32_t Service_Packing2M(L2_INST *instPtr, L2_FRAME_TYPE type, uint8_t dstId)
|
||||
{
|
||||
ASSERT(instPtr != NULL);
|
||||
int32_t Status;
|
||||
|
||||
Service_PackingCommon(instPtr, type, dstId);
|
||||
|
||||
L2_MSG_SVC_2M *message = (L2_MSG_SVC_2M *)(instPtr->sendPktData);
|
||||
size_t msgLen = sizeof(L2_MSG_SVC_2M);
|
||||
size_t dataLen = L2_PAYLOAD_LEN_SVC_2M;
|
||||
|
||||
// insert position and speed info
|
||||
SysMonitor_GetSysinfo(&(instPtr->sysInfo));
|
||||
message->srcPosX = instPtr->sysInfo.posX;
|
||||
message->srcPosY = instPtr->sysInfo.posY;
|
||||
message->srcPosZ = instPtr->sysInfo.posZ;
|
||||
message->srcSpeedX = instPtr->sysInfo.vX;
|
||||
message->srcSpeedY = instPtr->sysInfo.vY;
|
||||
message->srcSpeedZ = instPtr->sysInfo.vZ;
|
||||
|
||||
// Packing extra payload
|
||||
SysMonitor_GetSendPayload(message->svcData, &(message->svcDataId), dataLen);
|
||||
if (message->svcDataId == DATA_ID_NONE)
|
||||
{
|
||||
memset(message->svcData, 0xAA, dataLen);
|
||||
}
|
||||
|
||||
// Append CRC
|
||||
uint32_t crcVal;
|
||||
Status = L2_CrcGen((uint8_t *)message, msgLen - L2_MSG_CRC_LEN, L2_CRC8_31, &crcVal);
|
||||
if (Status != SUCCESS)
|
||||
{
|
||||
DBG_ERROR("Fail to generate CRC, error code: %" PRId32 ".\n", Status);
|
||||
return Status;
|
||||
}
|
||||
message->crc = crcVal;
|
||||
|
||||
// Logging...
|
||||
memcpy(instPtr->log.txLog.data, message, msgLen);
|
||||
instPtr->log.txLog.dataId = message->svcDataId;
|
||||
|
||||
|
||||
return SUCCESS;
|
||||
}
|
||||
|
||||
/*****************************************************************************/
|
||||
/**
|
||||
* @brief Handle service received packet. Send data up to MPC
|
||||
@@ -176,103 +350,60 @@ int32_t L2_Service_PktHandler(L2_INST *instPtr, uint8_t *msg)
|
||||
ASSERT(msg != NULL);
|
||||
int32_t Status;
|
||||
#ifndef DATALINK_ENABLE_BERTEST
|
||||
L2_FRAME_TYPE frameType = L2_NONE_FRAME;
|
||||
L2_FRAME_TYPE frameType = L2_FRAME_NONE;
|
||||
L2_FrameGetChunk(msg, L2_MSG_TYPE, L2_MSG_TYPE_LEN, &frameType);
|
||||
|
||||
// retrieve basic info
|
||||
switch (frameType)
|
||||
{
|
||||
case L2_SVC_FRAME:
|
||||
{
|
||||
uint8_t nodeId;
|
||||
L2_FrameGetChunk(msg, L2_MSG_SRC_ID, L2_MSG_SRC_ID_LEN, &nodeId);
|
||||
NODE_ENTRY *node;
|
||||
node = L2_GetNodeById(instPtr->nodeList, nodeId);
|
||||
if (node == NULL)
|
||||
{
|
||||
node = L2_AppendNode(instPtr->nodeList, nodeId, L2_NODE_MEMBER);
|
||||
if (node == NULL)
|
||||
{
|
||||
DBG_ERROR("Failed to append new node [id: %" PRIu8 "]", nodeId);
|
||||
Status = ENOMEM;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
// Update node info.
|
||||
float nodePos;
|
||||
L2_FrameGetChunk(msg, L2_MSG_SVC_SRC_POSX, L2_MSG_SVC_SRC_POSX_LEN, &nodePos);
|
||||
node->nodeInfo.pos.x = (double)nodePos;
|
||||
L2_FrameGetChunk(msg, L2_MSG_SVC_SRC_POSY, L2_MSG_SVC_SRC_POSY_LEN, &nodePos);
|
||||
node->nodeInfo.pos.y = (double)nodePos;
|
||||
L2_FrameGetChunk(msg, L2_MSG_SVC_SRC_POSZ, L2_MSG_SVC_SRC_POSZ_LEN, &nodePos);
|
||||
node->nodeInfo.pos.z = (double)nodePos;
|
||||
float nodeSpeed;
|
||||
L2_FrameGetChunk(msg, L2_MSG_SVC_SRC_SPEEDX, L2_MSG_SVC_SRC_SPEEDX_LEN, &nodeSpeed);
|
||||
node->nodeInfo.speed.x = (double)nodePos;
|
||||
L2_FrameGetChunk(msg, L2_MSG_SVC_SRC_SPEEDY, L2_MSG_SVC_SRC_SPEEDY_LEN, &nodeSpeed);
|
||||
node->nodeInfo.speed.y = (double)nodePos;
|
||||
L2_FrameGetChunk(msg, L2_MSG_SVC_SRC_SPEEDZ, L2_MSG_SVC_SRC_SPEEDZ_LEN, &nodeSpeed);
|
||||
node->nodeInfo.speed.z = (double)nodePos;
|
||||
|
||||
// Reset node ttl
|
||||
node->ttlCnt = 0;
|
||||
|
||||
// Calculate time deviation
|
||||
uint32_t frameNum, slotNum = 0;
|
||||
L2_FrameGetChunk(msg, L2_MSG_FRAME_NUM, L2_MSG_FRAME_NUM_LEN, &frameNum);
|
||||
L2_FrameGetChunk(msg, L2_MSG_SLOT_NUM, L2_MSG_SLOT_NUM_LEN, &slotNum);
|
||||
Status = L2_GetTimeDeviation(instPtr, frameNum, slotNum, true, &(instPtr->log.timeDev));
|
||||
if (Status != SUCCESS)
|
||||
{
|
||||
DBG_ERROR("Failed to compute time deviation.\n")
|
||||
break;
|
||||
}
|
||||
|
||||
uint32_t dataId;
|
||||
L2_FrameGetChunk(msg, L2_MSG_SVC_PAYLOAD_ID, L2_MSG_SVC_PAYLOAD_ID_LEN, &dataId);
|
||||
|
||||
case L2_FRAME_DIS:
|
||||
if (L2_GetNodeType(instPtr) == L2_NODE_HEAD)
|
||||
{
|
||||
SysMonitor_UpdateRecvPayload(msg + L2_MSG_SVC_PAYLOAD, dataId, PAYLOAD_LEN_FLJ_RX);
|
||||
DBG_ERROR("Unexpected call from head node, only member Node can handle L2_FRAME_DIS.\n");
|
||||
return EUNEXP;
|
||||
}
|
||||
case L2_FRAME_MNG:
|
||||
case L2_FRAME_RTT:
|
||||
Status = Service_PktHandler128K(instPtr, msg);
|
||||
break;
|
||||
case L2_FRAME_SVC:
|
||||
switch (instPtr->config.serviceRate)
|
||||
{
|
||||
case L2_SVC_128K:
|
||||
Status = Service_PktHandler128K(instPtr, msg);
|
||||
break;
|
||||
case L2_SVC_512K:
|
||||
Status = Service_PktHandler512K(instPtr, msg);
|
||||
break;
|
||||
case L2_SVC_2M:
|
||||
Status = Service_PktHandler2M(instPtr, msg);
|
||||
break;
|
||||
default:
|
||||
DBG_ERROR("Unexpected service rate: %" PRIu8 ".\n", instPtr->config.serviceRate);
|
||||
return EPARAM;
|
||||
}
|
||||
else
|
||||
{
|
||||
SysMonitor_UpdateRecvPayload(msg + L2_MSG_SVC_PAYLOAD, dataId, PAYLOAD_LEN_LJ_RX);
|
||||
}
|
||||
|
||||
// Logging
|
||||
memcpy(instPtr->log.rxLog.data, msg, L2_SVC_PACK_LEN);
|
||||
instPtr->log.rxLog.dataId = dataId;
|
||||
instPtr->serviceFSM->rxdCnt++;
|
||||
|
||||
#ifdef DATALINK_ENABLE_AUTOTIMESYNC
|
||||
// Implement a auto time sync.
|
||||
if (L2_GetNodeType(instPtr) != L2_NODE_HEAD)
|
||||
{
|
||||
// Time sync.
|
||||
L2_TimeAdjust(instPtr, &(instPtr->log.timeDev));
|
||||
}
|
||||
#endif
|
||||
break;
|
||||
}
|
||||
default:
|
||||
DBG_ERROR("Unsupported frame type: %" PRIu8 ".\n", frameType);
|
||||
break;
|
||||
return EPARAM;
|
||||
}
|
||||
return Status;
|
||||
|
||||
#else
|
||||
uint32_t errorBits = 0;
|
||||
for (int i = 0; i < L2_SVC_PACK_LEN; i++)
|
||||
uint32_t pktLen = L2_GetSvcPacketLen(instPtr->config.serviceRate);
|
||||
|
||||
for (int i = 0; i < pktLen; i++)
|
||||
{
|
||||
errorBits += count_ones(msg[i] ^ testData[i]);
|
||||
}
|
||||
|
||||
instPtr->serviceFSM->bitError += errorBits;
|
||||
instPtr->serviceFSM->bitTotal += L2_SVC_PACK_LEN * 8;
|
||||
instPtr->serviceFSM->bitTotal += pktLen * 8;
|
||||
|
||||
// Calculate time deviation
|
||||
uint32_t frameNum, slotNum = 0;
|
||||
L2_FrameGetChunk(msg, L2_MSG_FRAME_NUM, L2_MSG_FRAME_NUM_LEN, &frameNum);
|
||||
L2_FrameGetChunk(msg, L2_MSG_SLOT_NUM, L2_MSG_SLOT_NUM_LEN, &slotNum);
|
||||
uint32_t frameNum = message->common.frameNum;
|
||||
uint32_t slotNum = (uint32_t)message->common.slotNum;
|
||||
Status = L2_GetTimeDeviation(instPtr, frameNum, slotNum, true, &(instPtr->log.timeDev));
|
||||
if (Status != SUCCESS)
|
||||
{
|
||||
@@ -289,6 +420,231 @@ int32_t L2_Service_PktHandler(L2_INST *instPtr, uint8_t *msg)
|
||||
#endif
|
||||
}
|
||||
|
||||
/*****************************************************************************/
|
||||
/**
|
||||
* @brief Handle service received packet. Send data up to MPC. (128 kbps)
|
||||
*
|
||||
* @param msg A point32_ter the the message frame.
|
||||
*
|
||||
* @return SUCCESS message has been successfully handled.
|
||||
* other error occurred.
|
||||
*
|
||||
******************************************************************************/
|
||||
static int32_t Service_PktHandler128K(L2_INST *instPtr, uint8_t *msg)
|
||||
{
|
||||
ASSERT(instPtr != NULL);
|
||||
ASSERT(msg != NULL);
|
||||
int32_t Status;
|
||||
|
||||
L2_MSG_SVC_128K *message = (L2_MSG_SVC_128K *)msg;
|
||||
size_t msgLen = sizeof(L2_MSG_SVC_128K);
|
||||
size_t dataLen = L2_PAYLOAD_LEN_SVC_128K;
|
||||
|
||||
// Update node status.
|
||||
uint8_t nodeId = message->common.src;
|
||||
NODE_ENTRY *node;
|
||||
node = L2_GetNodeById(instPtr->nodeList, nodeId);
|
||||
if (node == NULL)
|
||||
{
|
||||
node = L2_AppendNode(instPtr->nodeList, nodeId, L2_NODE_MEMBER);
|
||||
if (node == NULL)
|
||||
{
|
||||
DBG_ERROR("Failed to append new node [id: %" PRId8 "]", nodeId);
|
||||
return ENOMEM;
|
||||
}
|
||||
}
|
||||
|
||||
// Update node info.
|
||||
node->nodeInfo.pos.x = message->srcPosX;
|
||||
node->nodeInfo.pos.y = message->srcPosY;
|
||||
node->nodeInfo.pos.z = message->srcPosZ;
|
||||
node->nodeInfo.speed.x = message->srcSpeedX;
|
||||
node->nodeInfo.speed.y = message->srcSpeedY;
|
||||
node->nodeInfo.speed.z = message->srcSpeedZ;
|
||||
node->nodeInfo.antIndex = Phy_ReceiveAntIndex(instPtr->config.phyInstPtr);
|
||||
|
||||
// Reset node ttl
|
||||
node->ttlCnt = 0;
|
||||
|
||||
// Calculate time deviation
|
||||
uint32_t frameNum = message->common.frameNum;
|
||||
uint32_t slotNum = (uint32_t)message->common.slotNum;
|
||||
Status = L2_GetTimeDeviation(instPtr, frameNum, slotNum, true, &(instPtr->log.timeDev));
|
||||
if (Status != SUCCESS)
|
||||
{
|
||||
DBG_ERROR("Failed to compute time deviation.\n")
|
||||
return Status;
|
||||
}
|
||||
|
||||
// Get data payload
|
||||
SysMonitor_UpdateRecvPayload(message->svcData, message->svcDataId, dataLen);
|
||||
|
||||
// Logging...
|
||||
memcpy(instPtr->log.rxLog.data, msg, msgLen);
|
||||
instPtr->log.rxLog.dataId = message->svcDataId;
|
||||
|
||||
#ifdef DATALINK_ENABLE_AUTOTIMESYNC
|
||||
// Implement a auto time sync.
|
||||
if (L2_GetNodeType(instPtr) != L2_NODE_HEAD)
|
||||
{
|
||||
// Time sync.
|
||||
L2_TimeAdjust(instPtr, &(instPtr->log.timeDev));
|
||||
}
|
||||
#endif
|
||||
|
||||
return Status;
|
||||
}
|
||||
|
||||
/*****************************************************************************/
|
||||
/**
|
||||
* @brief Handle service received packet. Send data up to MPC. (512 kbps)
|
||||
*
|
||||
* @param msg A point32_ter the the message frame.
|
||||
*
|
||||
* @return SUCCESS message has been successfully handled.
|
||||
* other error occurred.
|
||||
*
|
||||
******************************************************************************/
|
||||
static int32_t Service_PktHandler512K(L2_INST *instPtr, uint8_t *msg)
|
||||
{
|
||||
ASSERT(instPtr != NULL);
|
||||
ASSERT(msg != NULL);
|
||||
int32_t Status;
|
||||
|
||||
L2_MSG_SVC_512K *message = (L2_MSG_SVC_512K *)msg;
|
||||
size_t msgLen = sizeof(L2_MSG_SVC_512K);
|
||||
size_t dataLen = L2_PAYLOAD_LEN_SVC_512K;
|
||||
|
||||
// Update node status.
|
||||
uint8_t nodeId = message->common.src;
|
||||
NODE_ENTRY *node;
|
||||
node = L2_GetNodeById(instPtr->nodeList, nodeId);
|
||||
if (node == NULL)
|
||||
{
|
||||
node = L2_AppendNode(instPtr->nodeList, nodeId, L2_NODE_MEMBER);
|
||||
if (node == NULL)
|
||||
{
|
||||
DBG_ERROR("Failed to append new node [id: %" PRId8 "]", nodeId);
|
||||
return ENOMEM;
|
||||
}
|
||||
}
|
||||
|
||||
// Update node info.
|
||||
node->nodeInfo.pos.x = message->srcPosX;
|
||||
node->nodeInfo.pos.y = message->srcPosY;
|
||||
node->nodeInfo.pos.z = message->srcPosZ;
|
||||
node->nodeInfo.speed.x = message->srcSpeedX;
|
||||
node->nodeInfo.speed.y = message->srcSpeedY;
|
||||
node->nodeInfo.speed.z = message->srcSpeedZ;
|
||||
node->nodeInfo.antIndex = Phy_ReceiveAntIndex(instPtr->config.phyInstPtr);
|
||||
|
||||
// Reset node ttl
|
||||
node->ttlCnt = 0;
|
||||
|
||||
// Calculate time deviation
|
||||
uint32_t frameNum = message->common.frameNum;
|
||||
uint32_t slotNum = (uint32_t)message->common.slotNum;
|
||||
Status = L2_GetTimeDeviation(instPtr, frameNum, slotNum, true, &(instPtr->log.timeDev));
|
||||
if (Status != SUCCESS)
|
||||
{
|
||||
DBG_ERROR("Failed to compute time deviation.\n")
|
||||
return Status;
|
||||
}
|
||||
|
||||
// Get data payload
|
||||
SysMonitor_UpdateRecvPayload(message->svcData, message->svcDataId, dataLen);
|
||||
|
||||
// Logging...
|
||||
memcpy(instPtr->log.rxLog.data, msg, msgLen);
|
||||
instPtr->log.rxLog.dataId = message->svcDataId;
|
||||
|
||||
#ifdef DATALINK_ENABLE_AUTOTIMESYNC
|
||||
// Implement a auto time sync.
|
||||
if (L2_GetNodeType(instPtr) != L2_NODE_HEAD)
|
||||
{
|
||||
// Time sync.
|
||||
L2_TimeAdjust(instPtr, &(instPtr->log.timeDev));
|
||||
}
|
||||
#endif
|
||||
|
||||
return Status;
|
||||
}
|
||||
|
||||
/*****************************************************************************/
|
||||
/**
|
||||
* @brief Handle service received packet. Send data up to MPC. (2 Mbps)
|
||||
*
|
||||
* @param msg A point32_ter the the message frame.
|
||||
*
|
||||
* @return SUCCESS message has been successfully handled.
|
||||
* other error occurred.
|
||||
*
|
||||
******************************************************************************/
|
||||
static int32_t Service_PktHandler2M(L2_INST *instPtr, uint8_t *msg)
|
||||
{
|
||||
ASSERT(instPtr != NULL);
|
||||
ASSERT(msg != NULL);
|
||||
int32_t Status;
|
||||
|
||||
L2_MSG_SVC_2M *message = (L2_MSG_SVC_2M *)msg;
|
||||
size_t msgLen = sizeof(L2_MSG_SVC_2M);
|
||||
size_t dataLen = L2_PAYLOAD_LEN_SVC_2M;
|
||||
|
||||
// Update node status.
|
||||
uint8_t nodeId = message->common.src;
|
||||
NODE_ENTRY *node;
|
||||
node = L2_GetNodeById(instPtr->nodeList, nodeId);
|
||||
if (node == NULL)
|
||||
{
|
||||
node = L2_AppendNode(instPtr->nodeList, nodeId, L2_NODE_MEMBER);
|
||||
if (node == NULL)
|
||||
{
|
||||
DBG_ERROR("Failed to append new node [id: %" PRId8 "]", nodeId);
|
||||
return ENOMEM;
|
||||
}
|
||||
}
|
||||
|
||||
// Update node info.
|
||||
node->nodeInfo.pos.x = message->srcPosX;
|
||||
node->nodeInfo.pos.y = message->srcPosY;
|
||||
node->nodeInfo.pos.z = message->srcPosZ;
|
||||
node->nodeInfo.speed.x = message->srcSpeedX;
|
||||
node->nodeInfo.speed.y = message->srcSpeedY;
|
||||
node->nodeInfo.speed.z = message->srcSpeedZ;
|
||||
node->nodeInfo.antIndex = Phy_ReceiveAntIndex(instPtr->config.phyInstPtr);
|
||||
|
||||
// Reset node ttl
|
||||
node->ttlCnt = 0;
|
||||
|
||||
// Calculate time deviation
|
||||
uint32_t frameNum = message->common.frameNum;
|
||||
uint32_t slotNum = (uint32_t)message->common.slotNum;
|
||||
Status = L2_GetTimeDeviation(instPtr, frameNum, slotNum, true, &(instPtr->log.timeDev));
|
||||
if (Status != SUCCESS)
|
||||
{
|
||||
DBG_ERROR("Failed to compute time deviation.\n")
|
||||
return Status;
|
||||
}
|
||||
|
||||
// Get data payload
|
||||
SysMonitor_UpdateRecvPayload(message->svcData, message->svcDataId, dataLen);
|
||||
|
||||
// Logging...
|
||||
memcpy(instPtr->log.rxLog.data, msg, msgLen);
|
||||
instPtr->log.rxLog.dataId = message->svcDataId;
|
||||
|
||||
#ifdef DATALINK_ENABLE_AUTOTIMESYNC
|
||||
// Implement a auto time sync.
|
||||
if (L2_GetNodeType(instPtr) != L2_NODE_HEAD)
|
||||
{
|
||||
// Time sync.
|
||||
L2_TimeAdjust(instPtr, &(instPtr->log.timeDev));
|
||||
}
|
||||
#endif
|
||||
|
||||
return Status;
|
||||
}
|
||||
|
||||
/*****************************************************************************/
|
||||
/**
|
||||
* @brief Initialize service net FSM
|
||||
@@ -338,7 +694,7 @@ void L2_Service_Reset(L2_SVC_FSM *svcFSMPtr)
|
||||
/**
|
||||
* @brief Destroy ServiceNet FSM, free memory
|
||||
*
|
||||
* @param scanFsmPtr a pointer to service net finite state machine
|
||||
* @param serviceFSM a pointer to service net finite state machine
|
||||
*
|
||||
* @return NONE
|
||||
*
|
||||
@@ -369,55 +725,157 @@ int32_t L2_Service_Routine(L2_INST *instPtr, const L2_RTNE_TABLE_ENTRY *rtneEntr
|
||||
}
|
||||
|
||||
PHY_INST *phyRef = instPtr->config.phyInstPtr;
|
||||
PHY_ANT_INDEX antIndex;
|
||||
L2_SVC_FSM *svcFSMPtr = instPtr->serviceFSM;
|
||||
L2_TOR_TYPE torState;
|
||||
const NODE_ENTRY *commNode;
|
||||
if (rtneEntry->src == L2_GetNodeId(instPtr))
|
||||
{
|
||||
torState = L2_TOR_TX;
|
||||
commNode = L2_GetNodeById(instPtr->nodeList, rtneEntry->dst);
|
||||
}
|
||||
else if (rtneEntry->dst == L2_GetNodeId(instPtr))
|
||||
{
|
||||
torState = L2_TOR_RX;
|
||||
commNode = L2_GetNodeById(instPtr->nodeList, rtneEntry->src);
|
||||
}
|
||||
else
|
||||
{
|
||||
torState = L2_TOR_SUSPEND;
|
||||
}
|
||||
|
||||
// Setup antenna beam
|
||||
if (L2_GetNodeType(instPtr) != L2_NODE_HEAD && commNode != NULL)
|
||||
{
|
||||
Phy_SetBeamWidth(phyRef, PHY_ANT_BEAM_16);
|
||||
Phy_SetBeamNo(phyRef, commNode->nodeInfo.beamNo, PHY_ANT_BEAM_16);
|
||||
instPtr->log.lastBeamWidth = PHY_ANT_BEAM_16;
|
||||
}
|
||||
else
|
||||
{
|
||||
Phy_SetBeamWidth(phyRef, PHY_ANT_BEAM_120);
|
||||
instPtr->log.lastBeamWidth = PHY_ANT_BEAM_120;
|
||||
}
|
||||
|
||||
switch (rtneEntry->slotType)
|
||||
{
|
||||
case L2_SLOT_SERVICE:
|
||||
if (torState == L2_TOR_TX)
|
||||
case L2_SLOT_DISTRIBUTE:
|
||||
if (L2_GetNodeType(instPtr) == L2_NODE_HEAD && rtneEntry->src == L2_GetNodeId(instPtr))
|
||||
{
|
||||
svcFSMPtr->txCnt++;
|
||||
#ifndef DATALINK_ENABLE_BERTEST
|
||||
// Packing service data
|
||||
Service_Packing(instPtr, L2_SVC_FRAME, rtneEntry->dst);
|
||||
#else
|
||||
memcpy(instPtr->sendPktData, testData, L2_SVC_PACK_LEN);
|
||||
#endif
|
||||
commNode = L2_GetNodeById(instPtr->nodeList, rtneEntry->dst);
|
||||
// antenna selection based on destination id in routing table
|
||||
antIndex = commNode->nodeInfo.antIndex;
|
||||
// head node transmits messages in distribute slot
|
||||
torState = L2_TOR_TX;
|
||||
|
||||
// reset memory
|
||||
memset(instPtr->sendPktData, 0xAA, L2_PACK_LEN_MAX);
|
||||
// pack message
|
||||
if (Service_Packing(instPtr, L2_FRAME_DIS, rtneEntry->dst) != SUCCESS)
|
||||
{
|
||||
return FAILURE;
|
||||
}
|
||||
}
|
||||
else if (L2_GetNodeType(instPtr) == L2_NODE_MEMBER && rtneEntry->dst == L2_GetNodeId(instPtr))
|
||||
{
|
||||
commNode = L2_GetNodeById(instPtr->nodeList, rtneEntry->src);
|
||||
// antenna selection based on node list
|
||||
antIndex = commNode->nodeInfo.antIndex;
|
||||
// member node receives message in advertise slot
|
||||
torState = L2_TOR_RX;
|
||||
}
|
||||
else
|
||||
{
|
||||
// otherwise suspend
|
||||
antIndex = PHY_ANT_INDEX_NONE;
|
||||
torState = L2_TOR_SUSPEND;
|
||||
}
|
||||
(void)Phy_SetAntIndex(instPtr->config.phyInstPtr, antIndex);
|
||||
(void)L2_SetupNextSlot(instPtr, torState, L2_FRAME_DIS);
|
||||
break;
|
||||
case L2_SLOT_MANAGE:
|
||||
if (rtneEntry->src == L2_GetNodeId(instPtr))
|
||||
{
|
||||
commNode = L2_GetNodeById(instPtr->nodeList, rtneEntry->dst);
|
||||
// antenna selection based on destination id in routing table
|
||||
antIndex = commNode->nodeInfo.antIndex;
|
||||
// head node transmits messages in distribute slot
|
||||
torState = L2_TOR_TX;
|
||||
|
||||
// reset memory
|
||||
memset(instPtr->sendPktData, 0xAA, L2_PACK_LEN_MAX);
|
||||
// pack message
|
||||
if (Service_Packing(instPtr, L2_FRAME_MNG, rtneEntry->dst) != SUCCESS)
|
||||
{
|
||||
return FAILURE;
|
||||
}
|
||||
}
|
||||
else if (rtneEntry->dst == L2_GetNodeId(instPtr))
|
||||
{
|
||||
commNode = L2_GetNodeById(instPtr->nodeList, rtneEntry->src);
|
||||
// antenna selection based on node list
|
||||
antIndex = commNode->nodeInfo.antIndex;
|
||||
// member node receives message in advertise slot
|
||||
torState = L2_TOR_RX;
|
||||
}
|
||||
else
|
||||
{
|
||||
// otherwise suspend
|
||||
antIndex = PHY_ANT_INDEX_NONE;
|
||||
torState = L2_TOR_SUSPEND;
|
||||
}
|
||||
(void)Phy_SetAntIndex(instPtr->config.phyInstPtr, antIndex);
|
||||
(void)L2_SetupNextSlot(instPtr, torState, L2_FRAME_MNG);
|
||||
break;
|
||||
case L2_SLOT_RTT:
|
||||
if (rtneEntry->src == L2_GetNodeId(instPtr))
|
||||
{
|
||||
commNode = L2_GetNodeById(instPtr->nodeList, rtneEntry->dst);
|
||||
// antenna selection based on destination id in routing table
|
||||
antIndex = commNode->nodeInfo.antIndex;
|
||||
// head node transmits messages in distribute slot
|
||||
torState = L2_TOR_TX;
|
||||
|
||||
// reset memory
|
||||
memset(instPtr->sendPktData, 0xAA, L2_PACK_LEN_MAX);
|
||||
// pack message
|
||||
if (Service_Packing(instPtr, L2_FRAME_RTT, rtneEntry->dst) != SUCCESS)
|
||||
{
|
||||
return FAILURE;
|
||||
}
|
||||
}
|
||||
else if (rtneEntry->dst == L2_GetNodeId(instPtr))
|
||||
{
|
||||
commNode = L2_GetNodeById(instPtr->nodeList, rtneEntry->src);
|
||||
// antenna selection based on node list
|
||||
antIndex = commNode->nodeInfo.antIndex;
|
||||
// member node receives message in advertise slot
|
||||
torState = L2_TOR_RX;
|
||||
}
|
||||
else
|
||||
{
|
||||
// otherwise suspend
|
||||
antIndex = PHY_ANT_INDEX_NONE;
|
||||
torState = L2_TOR_SUSPEND;
|
||||
}
|
||||
(void)Phy_SetAntIndex(instPtr->config.phyInstPtr, antIndex);
|
||||
(void)L2_SetupNextSlot(instPtr, torState, L2_FRAME_RTT);
|
||||
break;
|
||||
case L2_SLOT_SERVICE:
|
||||
if (rtneEntry->src == L2_GetNodeId(instPtr))
|
||||
{
|
||||
commNode = L2_GetNodeById(instPtr->nodeList, rtneEntry->dst);
|
||||
// antenna selection based on destination id in routing table
|
||||
antIndex = commNode->nodeInfo.antIndex;
|
||||
// head node transmits messages in distribute slot
|
||||
torState = L2_TOR_TX;
|
||||
|
||||
svcFSMPtr->txCnt++;
|
||||
|
||||
// reset memory
|
||||
memset(instPtr->sendPktData, 0xAA, L2_PACK_LEN_MAX);
|
||||
#ifndef DATALINK_ENABLE_BERTEST
|
||||
// pack message
|
||||
if (Service_Packing(instPtr, L2_FRAME_SVC, rtneEntry->dst) != SUCCESS)
|
||||
{
|
||||
return FAILURE;
|
||||
}
|
||||
#else
|
||||
size_t msgLen = L2_GetSvcPacketLen(instPtr->config.serviceRate);
|
||||
memcpy(instPtr->sendPktData, testData, msgLen);
|
||||
#endif
|
||||
}
|
||||
else if (rtneEntry->dst == L2_GetNodeId(instPtr))
|
||||
{
|
||||
commNode = L2_GetNodeById(instPtr->nodeList, rtneEntry->src);
|
||||
// antenna selection based on node list
|
||||
antIndex = commNode->nodeInfo.antIndex;
|
||||
// member node receives message in advertise slot
|
||||
torState = L2_TOR_RX;
|
||||
|
||||
svcFSMPtr->rxCnt++;
|
||||
}
|
||||
L2_SetupNextSlot(instPtr, torState, L2_SVC_FRAME);
|
||||
else
|
||||
{
|
||||
// otherwise suspend
|
||||
antIndex = PHY_ANT_INDEX_NONE;
|
||||
torState = L2_TOR_SUSPEND;
|
||||
}
|
||||
(void)Phy_SetAntIndex(instPtr->config.phyInstPtr, antIndex);
|
||||
(void)L2_SetupNextSlot(instPtr, torState, L2_FRAME_SVC);
|
||||
break;
|
||||
default:
|
||||
DBG_ERROR("UNKNOWN slot type [%" PRIu8 "].\n", rtneEntry->slotType);
|
||||
@@ -435,4 +893,4 @@ int32_t L2_Service_Routine(L2_INST *instPtr, const L2_RTNE_TABLE_ENTRY *rtneEntr
|
||||
}
|
||||
|
||||
/** @} LinkLayer_Service*/
|
||||
/** @} LinkLayer*/
|
||||
/** @} LinkLayer*/
|
||||
|
||||
@@ -54,7 +54,7 @@ int32_t L2_GetTimeDeviation(L2_INST *instPtr, uint32_t frameNum, uint32_t slotNu
|
||||
L1_FRAME_TYPE lastRecvdFrame;
|
||||
PHY_INST *phyRef = instPtr->config.phyInstPtr;
|
||||
lastRecvdFrame = Phy_GetLastRecvFrameType(phyRef);
|
||||
if (lastRecvdFrame == L1_NONE_FRAME)
|
||||
if (lastRecvdFrame == L1_FRAME_NONE)
|
||||
{
|
||||
DBG_ERROR("Invalid TimeAlign operation, no frame was received.");
|
||||
return EIGNORE;
|
||||
|
||||
@@ -38,152 +38,204 @@
|
||||
|
||||
#define CTRL_WORD_DEFAULT 0x00
|
||||
|
||||
#define ANT_MODE_BEAM_MASK 0xF0
|
||||
#define ANT_BEAM_NARROR 0x00 // 8
|
||||
#define ANT_BEAM_SUBNARROR_0 0x10 // 25
|
||||
#define ANT_BEAM_SUBNARROR_1 0x20 // 60
|
||||
#define ANT_BEAM_WIDE 0x30 // 120
|
||||
#define ANT_ENABLE 0x01
|
||||
#define ANT_DISABLE 0x00
|
||||
#define ANT_MODE_RX_NORMAL 0x00
|
||||
#define ANT_MODE_RX_AJ 0x01
|
||||
|
||||
#define ANT_MODE_POWER_MASK 0x0F
|
||||
#define ANT_POWER_FULL 0x00
|
||||
#define ANT_POWER_LOW 0x04
|
||||
#define ANT_POWER_STANDBY 0x0F
|
||||
#define ATN_MODE_SILENT (ANT_BEAM_SUBNARROR_0 | ANT_POWER_STANDBY)
|
||||
#define ATN_MODE_LOWPOWER (ANT_BEAM_SUBNARROR_0 | ANT_POWER_LOW)
|
||||
#define ATN_MODE_FULLPOWER (ANT_BEAM_SUBNARROR_0 | ANT_POWER_FULL)
|
||||
#define ATN_MODE_DEFAULT ATN_MODE_SILENT
|
||||
|
||||
#define DEFAULT_CENTRTAL_FREQ 0x06D7 // 26.25GHz
|
||||
|
||||
#define RXTXMODE_RX 0x00
|
||||
#define RXTXMODE_TX 0x01
|
||||
|
||||
#define RXTXMODE_DEFAULT 0x00
|
||||
|
||||
#define CALIBRMODE_NORMAL 0x00
|
||||
#define CALIBRMODE_SINGLE_TR_CAL 0x01
|
||||
|
||||
#define RF_CTRL_DEFAULT 0x00
|
||||
#define DEFAULT_CENTRTAL_FREQ 300U // 4 GHz
|
||||
|
||||
// Pair by regex
|
||||
// Regex: (([0-9]+, ){8})
|
||||
const uint16_t freqTable[L1_FRAME_MAX_HOPS] =
|
||||
{
|
||||
1084U, 1097U, 1110U, 1123U, 1136U, 1149U, 1162U, 1175U,
|
||||
1188U, 1201U, 1214U, 1227U, 1240U, 1253U, 1266U, 1279U,
|
||||
1292U, 1305U, 1318U, 1331U, 1344U, 1357U, 1370U, 1383U,
|
||||
1396U, 1409U, 1422U, 1435U, 1448U, 1461U, 1474U, 1487U,
|
||||
1500U, 1513U, 1526U, 1539U, 1552U, 1565U, 1578U, 1591U,
|
||||
1604U, 1617U, 1630U, 1643U, 1656U, 1669U, 1682U, 1695U,
|
||||
1708U, 1721U, 1734U, 1747U, 1760U, 1773U, 1786U, 1799U,
|
||||
1812U, 1825U, 1838U, 1851U, 1864U, 1877U, 1890U, 1903U,
|
||||
1916U, 1929U, 1942U, 1955U, 1968U, 1981U, 1994U, 2007U,
|
||||
2020U, 2033U, 2046U, 2059U, 2072U, 2085U, 2098U, 2111U,
|
||||
2124U
|
||||
0U, 7U, 15U, 22U, 30U, 37U, 45U, 52U,
|
||||
60U, 67U, 75U, 82U, 90U, 97U, 105U, 112U,
|
||||
120U, 127U, 135U, 142U, 150U, 157U, 165U, 172U,
|
||||
180U, 187U, 195U, 202U, 210U, 217U, 225U, 232U,
|
||||
240U, 247U, 255U, 262U, 270U, 277U, 285U, 292U,
|
||||
300U, 307U, 315U, 322U, 330U, 337U, 345U, 352U,
|
||||
360U, 367U, 375U, 382U, 390U, 397U, 405U, 412U,
|
||||
420U, 427U, 435U, 442U, 450U, 457U, 465U, 472U,
|
||||
480U, 487U, 495U, 502U, 510U, 517U, 525U, 532U,
|
||||
540U, 547U, 555U, 562U, 570U, 577U, 585U, 592U,
|
||||
600U,
|
||||
};
|
||||
|
||||
const int16_t antCalTable[L1_FRAME_MAX_HOPS][L1_ANT_NUM_CH] =
|
||||
|
||||
const uint8_t antCalTable[L1_ANT_NUM][L1_FRAME_MAX_HOPS][L1_ANT_CH_NUM] =
|
||||
//Antenna-JG01
|
||||
{
|
||||
{ 0, 2525, -7533, -6846}, { 0, 12726, -7818, -6860},
|
||||
{ 0, 2490, -7836, -6907}, { 0, 4479, -7716, -6837},
|
||||
{ 0, 6409, -7770, -6776}, { 0, 14616, -7977, -6816},
|
||||
{ 0, -22557, -8002, -6911}, { 0, -22587, -8121, -6918},
|
||||
{ 0, -1124, -8123, -7030}, { 0, -152, -8219, -7042},
|
||||
{ 0, 1823, -8209, -7130}, { 0, 1790, -8290, -7214},
|
||||
{ 0, 1669, -8362, -7283}, { 0, 1634, -8459, -7276},
|
||||
{ 0, 1615, -8315, -7415}, { 0, 1698, -8168, -7366},
|
||||
{ 0, 1535, -8285, -7520}, { 0, 1619, -8285, -7532},
|
||||
{ 0, 1609, -8201, -7693}, { 0, 1671, -8145, -7769},
|
||||
{ 0, 1676, -8135, -7805}, { 0, 951, -10279, -8871},
|
||||
{ 0, 976, -10235, -8978}, { 0, 1118, -10127, -9019},
|
||||
{ 0, 1175, -10003, -9007}, { 0, 1386, -9847, -9039},
|
||||
{ 0, 1535, -9572, -9058}, { 0, 1729, -9493, -9006},
|
||||
{ 0, -1158, -9312, -9003}, { 0, 23771, -9147, -8928},
|
||||
{ 0, 20733, -9074, -8924}, { 0, 2455, -8841, -8886},
|
||||
{ 0, 2622, -8718, -8735}, { 0, 2791, -8615, -8705},
|
||||
{ 0, 2861, -8168, -8331}, { 0, 3076, -8091, -8218},
|
||||
{ 0, 3257, -8046, -8100}, { 0, 3331, -7923, -8073},
|
||||
{ 0, 3396, -7826, -7994}, { 0, 3478, -7842, -8016},
|
||||
{ 0, 3518, -7846, -7765}, { 0, 3585, -7753, -7715},
|
||||
{ 0, 150, -8145, -8591}, { 0, 192, -8090, -8570},
|
||||
{ 0, 207, -8150, -8597}, { 0, 178, -8142, -8656},
|
||||
{ 0, 89, -8557, -8688}, { 0, 107, -8614, -8733},
|
||||
{ 0, 194, -8605, -8782}, { 0, 153, -8655, -8881},
|
||||
{ 0, 70, -8615, -8952}, { 0, 35, -8596, -9148},
|
||||
{ 0, 49, -8636, -9286}, { 0, 6, -8587, -9435},
|
||||
{ 0, -51, -8540, -9549}, { 0, -65, -8588, -9700},
|
||||
{ 0, -55, -8503, -9820}, { 0, -20, -8414, -9907},
|
||||
{ 0, -112, -8481, -10031}, { 0, -69, -8535, -10185},
|
||||
{ 0, 2, -8550, -10052}, { 0, -1, -8493, -10291},
|
||||
{ 0, -73, -8441, -10380}, { 0, 1958, -6930, -8295},
|
||||
{ 0, -1148, -6939, -8396}, { 0, 1915, -6784, -8370},
|
||||
{ 0, 1871, -6970, -8514}, { 0, 1821, -6974, -8387},
|
||||
{ 0, 1781, -6906, -8431}, { 0, 1736, -6897, -8462},
|
||||
{ 0, 1664, -7024, -8377}, { 0, 1629, -7127, -8436},
|
||||
{ 0, 1603, -7148, -8528}, { 0, 1577, -7198, -8500},
|
||||
{ 0, 1528, -7311, -8512}, { 0, 1577, -7390, -8570},
|
||||
{ 0, 1616, -7436, -8572}, { 0, 1589, -7597, -8590},
|
||||
{ 0, 1722, -7550, -8568}, { 0, 1741, -7691, -8449},
|
||||
{ 0, 1767, -7775, -8328},
|
||||
// Antenna-1
|
||||
{
|
||||
{ 0, 2525, -7533, -6846}, { 0, 12726, -7818, -6860},
|
||||
{ 0, 2490, -7836, -6907}, { 0, 4479, -7716, -6837},
|
||||
{ 0, 6409, -7770, -6776}, { 0, 14616, -7977, -6816},
|
||||
{ 0, -22557, -8002, -6911}, { 0, -22587, -8121, -6918},
|
||||
{ 0, -1124, -8123, -7030}, { 0, -152, -8219, -7042},
|
||||
{ 0, 1823, -8209, -7130}, { 0, 1790, -8290, -7214},
|
||||
{ 0, 1669, -8362, -7283}, { 0, 1634, -8459, -7276},
|
||||
{ 0, 1615, -8315, -7415}, { 0, 1698, -8168, -7366},
|
||||
{ 0, 1535, -8285, -7520}, { 0, 1619, -8285, -7532},
|
||||
{ 0, 1609, -8201, -7693}, { 0, 1671, -8145, -7769},
|
||||
{ 0, 1676, -8135, -7805}, { 0, 951, -10279, -8871},
|
||||
{ 0, 976, -10235, -8978}, { 0, 1118, -10127, -9019},
|
||||
{ 0, 1175, -10003, -9007}, { 0, 1386, -9847, -9039},
|
||||
{ 0, 1535, -9572, -9058}, { 0, 1729, -9493, -9006},
|
||||
{ 0, -1158, -9312, -9003}, { 0, 23771, -9147, -8928},
|
||||
{ 0, 20733, -9074, -8924}, { 0, 2455, -8841, -8886},
|
||||
{ 0, 2622, -8718, -8735}, { 0, 2791, -8615, -8705},
|
||||
{ 0, 2861, -8168, -8331}, { 0, 3076, -8091, -8218},
|
||||
{ 0, 3257, -8046, -8100}, { 0, 3331, -7923, -8073},
|
||||
{ 0, 3396, -7826, -7994}, { 0, 3478, -7842, -8016},
|
||||
{ 0, 3518, -7846, -7765}, { 0, 3585, -7753, -7715},
|
||||
{ 0, 150, -8145, -8591}, { 0, 192, -8090, -8570},
|
||||
{ 0, 207, -8150, -8597}, { 0, 178, -8142, -8656},
|
||||
{ 0, 89, -8557, -8688}, { 0, 107, -8614, -8733},
|
||||
{ 0, 194, -8605, -8782}, { 0, 153, -8655, -8881},
|
||||
{ 0, 70, -8615, -8952}, { 0, 35, -8596, -9148},
|
||||
{ 0, 49, -8636, -9286}, { 0, 6, -8587, -9435},
|
||||
{ 0, -51, -8540, -9549}, { 0, -65, -8588, -9700},
|
||||
{ 0, -55, -8503, -9820}, { 0, -20, -8414, -9907},
|
||||
{ 0, -112, -8481, -10031}, { 0, -69, -8535, -10185},
|
||||
{ 0, 2, -8550, -10052}, { 0, -1, -8493, -10291},
|
||||
{ 0, -73, -8441, -10380}, { 0, 1958, -6930, -8295},
|
||||
{ 0, -1148, -6939, -8396}, { 0, 1915, -6784, -8370},
|
||||
{ 0, 1871, -6970, -8514}, { 0, 1821, -6974, -8387},
|
||||
{ 0, 1781, -6906, -8431}, { 0, 1736, -6897, -8462},
|
||||
{ 0, 1664, -7024, -8377}, { 0, 1629, -7127, -8436},
|
||||
{ 0, 1603, -7148, -8528}, { 0, 1577, -7198, -8500},
|
||||
{ 0, 1528, -7311, -8512}, { 0, 1577, -7390, -8570},
|
||||
{ 0, 1616, -7436, -8572}, { 0, 1589, -7597, -8590},
|
||||
{ 0, 1722, -7550, -8568}, { 0, 1741, -7691, -8449},
|
||||
{ 0, 1767, -7775, -8328},
|
||||
},
|
||||
// Antenna-2
|
||||
{
|
||||
{ 0, 2525, -7533, -6846}, { 0, 12726, -7818, -6860},
|
||||
{ 0, 2490, -7836, -6907}, { 0, 4479, -7716, -6837},
|
||||
{ 0, 6409, -7770, -6776}, { 0, 14616, -7977, -6816},
|
||||
{ 0, -22557, -8002, -6911}, { 0, -22587, -8121, -6918},
|
||||
{ 0, -1124, -8123, -7030}, { 0, -152, -8219, -7042},
|
||||
{ 0, 1823, -8209, -7130}, { 0, 1790, -8290, -7214},
|
||||
{ 0, 1669, -8362, -7283}, { 0, 1634, -8459, -7276},
|
||||
{ 0, 1615, -8315, -7415}, { 0, 1698, -8168, -7366},
|
||||
{ 0, 1535, -8285, -7520}, { 0, 1619, -8285, -7532},
|
||||
{ 0, 1609, -8201, -7693}, { 0, 1671, -8145, -7769},
|
||||
{ 0, 1676, -8135, -7805}, { 0, 951, -10279, -8871},
|
||||
{ 0, 976, -10235, -8978}, { 0, 1118, -10127, -9019},
|
||||
{ 0, 1175, -10003, -9007}, { 0, 1386, -9847, -9039},
|
||||
{ 0, 1535, -9572, -9058}, { 0, 1729, -9493, -9006},
|
||||
{ 0, -1158, -9312, -9003}, { 0, 23771, -9147, -8928},
|
||||
{ 0, 20733, -9074, -8924}, { 0, 2455, -8841, -8886},
|
||||
{ 0, 2622, -8718, -8735}, { 0, 2791, -8615, -8705},
|
||||
{ 0, 2861, -8168, -8331}, { 0, 3076, -8091, -8218},
|
||||
{ 0, 3257, -8046, -8100}, { 0, 3331, -7923, -8073},
|
||||
{ 0, 3396, -7826, -7994}, { 0, 3478, -7842, -8016},
|
||||
{ 0, 3518, -7846, -7765}, { 0, 3585, -7753, -7715},
|
||||
{ 0, 150, -8145, -8591}, { 0, 192, -8090, -8570},
|
||||
{ 0, 207, -8150, -8597}, { 0, 178, -8142, -8656},
|
||||
{ 0, 89, -8557, -8688}, { 0, 107, -8614, -8733},
|
||||
{ 0, 194, -8605, -8782}, { 0, 153, -8655, -8881},
|
||||
{ 0, 70, -8615, -8952}, { 0, 35, -8596, -9148},
|
||||
{ 0, 49, -8636, -9286}, { 0, 6, -8587, -9435},
|
||||
{ 0, -51, -8540, -9549}, { 0, -65, -8588, -9700},
|
||||
{ 0, -55, -8503, -9820}, { 0, -20, -8414, -9907},
|
||||
{ 0, -112, -8481, -10031}, { 0, -69, -8535, -10185},
|
||||
{ 0, 2, -8550, -10052}, { 0, -1, -8493, -10291},
|
||||
{ 0, -73, -8441, -10380}, { 0, 1958, -6930, -8295},
|
||||
{ 0, -1148, -6939, -8396}, { 0, 1915, -6784, -8370},
|
||||
{ 0, 1871, -6970, -8514}, { 0, 1821, -6974, -8387},
|
||||
{ 0, 1781, -6906, -8431}, { 0, 1736, -6897, -8462},
|
||||
{ 0, 1664, -7024, -8377}, { 0, 1629, -7127, -8436},
|
||||
{ 0, 1603, -7148, -8528}, { 0, 1577, -7198, -8500},
|
||||
{ 0, 1528, -7311, -8512}, { 0, 1577, -7390, -8570},
|
||||
{ 0, 1616, -7436, -8572}, { 0, 1589, -7597, -8590},
|
||||
{ 0, 1722, -7550, -8568}, { 0, 1741, -7691, -8449},
|
||||
{ 0, 1767, -7775, -8328},
|
||||
},
|
||||
// Antenna-3
|
||||
{
|
||||
{ 0, 2525, -7533, -6846}, { 0, 12726, -7818, -6860},
|
||||
{ 0, 2490, -7836, -6907}, { 0, 4479, -7716, -6837},
|
||||
{ 0, 6409, -7770, -6776}, { 0, 14616, -7977, -6816},
|
||||
{ 0, -22557, -8002, -6911}, { 0, -22587, -8121, -6918},
|
||||
{ 0, -1124, -8123, -7030}, { 0, -152, -8219, -7042},
|
||||
{ 0, 1823, -8209, -7130}, { 0, 1790, -8290, -7214},
|
||||
{ 0, 1669, -8362, -7283}, { 0, 1634, -8459, -7276},
|
||||
{ 0, 1615, -8315, -7415}, { 0, 1698, -8168, -7366},
|
||||
{ 0, 1535, -8285, -7520}, { 0, 1619, -8285, -7532},
|
||||
{ 0, 1609, -8201, -7693}, { 0, 1671, -8145, -7769},
|
||||
{ 0, 1676, -8135, -7805}, { 0, 951, -10279, -8871},
|
||||
{ 0, 976, -10235, -8978}, { 0, 1118, -10127, -9019},
|
||||
{ 0, 1175, -10003, -9007}, { 0, 1386, -9847, -9039},
|
||||
{ 0, 1535, -9572, -9058}, { 0, 1729, -9493, -9006},
|
||||
{ 0, -1158, -9312, -9003}, { 0, 23771, -9147, -8928},
|
||||
{ 0, 20733, -9074, -8924}, { 0, 2455, -8841, -8886},
|
||||
{ 0, 2622, -8718, -8735}, { 0, 2791, -8615, -8705},
|
||||
{ 0, 2861, -8168, -8331}, { 0, 3076, -8091, -8218},
|
||||
{ 0, 3257, -8046, -8100}, { 0, 3331, -7923, -8073},
|
||||
{ 0, 3396, -7826, -7994}, { 0, 3478, -7842, -8016},
|
||||
{ 0, 3518, -7846, -7765}, { 0, 3585, -7753, -7715},
|
||||
{ 0, 150, -8145, -8591}, { 0, 192, -8090, -8570},
|
||||
{ 0, 207, -8150, -8597}, { 0, 178, -8142, -8656},
|
||||
{ 0, 89, -8557, -8688}, { 0, 107, -8614, -8733},
|
||||
{ 0, 194, -8605, -8782}, { 0, 153, -8655, -8881},
|
||||
{ 0, 70, -8615, -8952}, { 0, 35, -8596, -9148},
|
||||
{ 0, 49, -8636, -9286}, { 0, 6, -8587, -9435},
|
||||
{ 0, -51, -8540, -9549}, { 0, -65, -8588, -9700},
|
||||
{ 0, -55, -8503, -9820}, { 0, -20, -8414, -9907},
|
||||
{ 0, -112, -8481, -10031}, { 0, -69, -8535, -10185},
|
||||
{ 0, 2, -8550, -10052}, { 0, -1, -8493, -10291},
|
||||
{ 0, -73, -8441, -10380}, { 0, 1958, -6930, -8295},
|
||||
{ 0, -1148, -6939, -8396}, { 0, 1915, -6784, -8370},
|
||||
{ 0, 1871, -6970, -8514}, { 0, 1821, -6974, -8387},
|
||||
{ 0, 1781, -6906, -8431}, { 0, 1736, -6897, -8462},
|
||||
{ 0, 1664, -7024, -8377}, { 0, 1629, -7127, -8436},
|
||||
{ 0, 1603, -7148, -8528}, { 0, 1577, -7198, -8500},
|
||||
{ 0, 1528, -7311, -8512}, { 0, 1577, -7390, -8570},
|
||||
{ 0, 1616, -7436, -8572}, { 0, 1589, -7597, -8590},
|
||||
{ 0, 1722, -7550, -8568}, { 0, 1741, -7691, -8449},
|
||||
{ 0, 1767, -7775, -8328},
|
||||
},
|
||||
};
|
||||
|
||||
const uint8_t hopPattern_2KBPS_20MS[L1_FRAME_2KBPS_20MS_HOPS] =
|
||||
const uint8_t hopPattern_ADV_24MS[L1_FRAME_ADV_24MS_HOPS] =
|
||||
{
|
||||
0
|
||||
0U, 35U, 66U, 47U, 40U, 16U, 30U, 65U,
|
||||
43U, 7U, 70U, 63U, 7U, 65U, 42U, 28U,
|
||||
};
|
||||
|
||||
const uint8_t hopPattern_2KBPS_100MS[L1_FRAME_2KBPS_100MS_HOPS] =
|
||||
const uint8_t hopPattern_ACK_8MS[L1_FRAME_ACK_8MS_HOPS] =
|
||||
{
|
||||
0U, 1U, 2U, 3U, 4U, 5U, 6U, 7U,
|
||||
8U, 9U, 10U, 11U, 12U, 13U, 14U, 15U,
|
||||
16U, 17U, 18U, 19U, 20U, 21U, 22U, 23U,
|
||||
24U, 25U, 26U, 27U, 28U, 29U, 30U, 31U,
|
||||
32U, 33U, 34U, 35U, 36U, 37U, 38U, 39U,
|
||||
40U, 41U, 42U, 43U, 44U, 45U, 46U, 47U,
|
||||
48U, 49U, 50U, 51U, 52U, 53U, 54U, 55U,
|
||||
56U, 57U, 58U, 59U, 60U, 61U, 62U, 63U,
|
||||
64U, 65U, 66U, 67U, 68U, 69U, 70U, 71U,
|
||||
72U, 73U, 74U, 75U, 76U, 77U, 78U, 79U,
|
||||
80U
|
||||
0U, 5U, 49U, 25U,
|
||||
};
|
||||
|
||||
const uint8_t hopPattern_10KBPS_10MS[L1_FRAME_10KBPS_10MS_HOPS] =
|
||||
const uint8_t hopPattern_128KBPS_4MS[L1_FRAME_128KBPS_4MS_HOPS] =
|
||||
{
|
||||
80U
|
||||
80U, 16U, 17U, 65U, 60U, 54U, 31U, 15U,
|
||||
6U, 19U, 79U, 52U, 29U, 42U, 23U, 59U,
|
||||
60U, 58U, 76U, 67U, 31U, 76U, 77U, 79U,
|
||||
79U, 14U, 61U, 5U, 71U, 50U, 32U, 77U,
|
||||
60U,
|
||||
};
|
||||
|
||||
const uint8_t hopPattern_10KBPS_20MS[L1_FRAME_10KBPS_20MS_HOPS] =
|
||||
const uint8_t hopPattern_512KBPS_4MS[L1_FRAME_512KBPS_4MS_HOPS] =
|
||||
{
|
||||
80U, 1U, 2U, 3U, 4U, 5U, 6U, 7U,
|
||||
8U, 9U, 10U
|
||||
80U, 62U, 40U, 66U, 65U, 33U, 55U, 33U,
|
||||
57U, 11U, 37U, 45U, 5U, 69U, 77U, 54U,
|
||||
37U, 63U, 14U, 64U, 76U, 31U, 45U, 52U,
|
||||
40U, 20U, 20U, 32U, 0U, 60U, 23U, 19U,
|
||||
15U, 38U, 62U, 18U,
|
||||
};
|
||||
|
||||
const uint8_t hopPattern_40KBPS_10MS[L1_FRAME_40KBPS_10MS_HOPS] =
|
||||
const uint8_t hopPattern_2MBPS_4MS[L1_FRAME_2MBPS_4MS_HOPS] =
|
||||
{
|
||||
0U, 1U, 2U, 3U, 4U, 5U, 6U, 7U,
|
||||
8U,
|
||||
};
|
||||
|
||||
const uint8_t hopPattern_40KBPS_20MS[L1_FRAME_40KBPS_20MS_HOPS] =
|
||||
{
|
||||
0U, 1U, 2U, 3U, 4U, 5U, 6U, 7U,
|
||||
8U, 9U, 10U, 11U, 12U, 13U, 14U, 15U,
|
||||
16U, 17U, 18U
|
||||
};
|
||||
|
||||
const uint8_t hopPattern_200KBPS_5MS[L1_FRAME_200KBPS_5MS_HOPS] =
|
||||
{
|
||||
0U, 1U, 2U, 3U, 4U, 5U, 6U, 7U,
|
||||
8U, 9U, 10U, 11U, 12U, 13U, 14U, 15U,
|
||||
16U, 17U, 18U, 19U
|
||||
};
|
||||
|
||||
const uint8_t hopPattern_1M2BPS_5MS[L1_FRAME_1M2BPS_5MS_HOPS] =
|
||||
{
|
||||
0U, 1U, 2U, 3U, 4U, 5U, 6U, 7U,
|
||||
8U, 9U, 10U, 11U, 12U, 13U, 14U, 15U,
|
||||
16U, 17U, 18U, 19U
|
||||
0U, 13U, 37U, 44U, 16U, 0U, 59U, 50U,
|
||||
69U, 70U, 58U, 14U, 9U, 72U, 27U, 25U,
|
||||
21U, 76U, 20U, 35U, 30U, 58U, 22U, 59U,
|
||||
48U, 33U, 8U, 7U, 41U, 12U, 44U, 79U,
|
||||
77U, 38U, 76U, 75U, 48U, 56U,
|
||||
};
|
||||
|
||||
/** @} PhysicalLayer_AntennaConfig_Constants*/
|
||||
@@ -201,226 +253,173 @@ void Phy_AntConfigInit(PHY_ANT_CONFIG *antConfig)
|
||||
{
|
||||
ASSERT(antConfig != NULL);
|
||||
|
||||
antConfig->ctrlWord = CTRL_WORD_DEFAULT;
|
||||
antConfig->antMode = ATN_MODE_DEFAULT;
|
||||
|
||||
// FIXME: Dummy default value.
|
||||
// off axis angle setting
|
||||
antConfig->oaxis[0] = 0;
|
||||
antConfig->oaxis[1] = 0;
|
||||
// round axis angle setting
|
||||
antConfig->raxis[0] = 0;
|
||||
antConfig->raxis[1] = 0;
|
||||
// ***********************
|
||||
for (uint8_t ii = 0; ii < L1_ANT_NUM; ii ++)
|
||||
{
|
||||
for (uint8_t jj = 0; jj < L1_ANT_CH_NUM; jj ++)
|
||||
{
|
||||
antConfig->rfNormComp[ii][jj] = 0;
|
||||
antConfig->rfNormIdpAttn[ii][jj] = 0;
|
||||
}
|
||||
antConfig->rfNormComAttn[ii] = 0;
|
||||
antConfig->rfFreq[ii][0] = (uint8_t)(DEFAULT_CENTRTAL_FREQ);
|
||||
antConfig->rfFreq[ii][1] = (uint8_t)(DEFAULT_CENTRTAL_FREQ >> 8);
|
||||
}
|
||||
|
||||
antConfig->antFreq[0] = (uint8_t)(DEFAULT_CENTRTAL_FREQ);
|
||||
antConfig->antFreq[1] = (uint8_t)(DEFAULT_CENTRTAL_FREQ >> 8);
|
||||
for (uint8_t ii = 0; ii < L1_ANT_CH_NUM; ii ++)
|
||||
{
|
||||
antConfig->rfAntiAttn[ii] = 0;
|
||||
}
|
||||
|
||||
// FIXME: Dummy default value.
|
||||
// trSelect
|
||||
antConfig->trSlect = 0;
|
||||
// Antenna attenuation setting
|
||||
antConfig->antAtt = 0;
|
||||
// phase setting
|
||||
antConfig->phase = 0;
|
||||
// ***********************
|
||||
|
||||
antConfig->rxtxMode = RXTXMODE_DEFAULT;
|
||||
antConfig->calibrMode = CALIBRMODE_NORMAL;
|
||||
antConfig->antReserved = 0x00;
|
||||
|
||||
// FIXME: Dummy default value.
|
||||
// RF mode control
|
||||
antConfig->rfCtrl = RF_CTRL_DEFAULT;
|
||||
// RF frequency
|
||||
antConfig->rfFreq[0] = (uint8_t)(DEFAULT_CENTRTAL_FREQ);
|
||||
antConfig->rfFreq[1] = (uint8_t)(DEFAULT_CENTRTAL_FREQ >> 8);
|
||||
// RF MGC control
|
||||
antConfig->rfTxMgc = 0;
|
||||
// RF channel 1&2 calibration mgc
|
||||
antConfig->rf12CalMgc = 0;
|
||||
// RF channel 2&3 calibration mgc
|
||||
antConfig->rf34CalMgc = 0;
|
||||
// Receive channel 1-4 MGC
|
||||
antConfig->rcvMgc = 0;
|
||||
antConfig->rfReserved0 = 0x00;
|
||||
antConfig->rfReserved1 = 0x00;
|
||||
// ***********************
|
||||
antConfig->antControl.antMode = ANT_MODE_RX_NORMAL;
|
||||
antConfig->antControl.antRx1En = ANT_DISABLE;
|
||||
antConfig->antControl.antRx2En = ANT_DISABLE;
|
||||
antConfig->antControl.antRx3En = ANT_DISABLE;
|
||||
antConfig->antControl.antTx1En = ANT_DISABLE;
|
||||
antConfig->antControl.antTx2En = ANT_DISABLE;
|
||||
antConfig->antControl.antTx3En = ANT_DISABLE;
|
||||
}
|
||||
|
||||
/*****************************************************************************/
|
||||
/**
|
||||
* @brief Update antenna power mode setting
|
||||
* @brief Set tx antenna index
|
||||
*
|
||||
* @param instPtr pointer to physical layer instance
|
||||
* @param mode new antenna mode
|
||||
* @param instPtr pointer to physical layer instance
|
||||
* @param antTxIndex target tx antenna index
|
||||
*
|
||||
* @return None.
|
||||
*
|
||||
******************************************************************************/
|
||||
void Phy_AntConfigMode(PHY_INST *instPtr, PHY_ANT_MODE mode)
|
||||
void Phy_SetTxAntIndex(PHY_INST *instPtr, PHY_ANT_INDEX antIndex)
|
||||
{
|
||||
ASSERT(instPtr != NULL);
|
||||
uint8_t config = instPtr->antConfig.antMode & ANT_MODE_BEAM_MASK;
|
||||
switch (mode)
|
||||
|
||||
switch (antIndex)
|
||||
{
|
||||
case PHY_ANT_MODE_STANDBY:
|
||||
config |= ANT_POWER_STANDBY;
|
||||
case PHY_ANT_INDEX_1:
|
||||
instPtr->antConfig.antControl.antTx1En = ANT_ENABLE;
|
||||
instPtr->antConfig.antControl.antTx2En = ANT_DISABLE;
|
||||
instPtr->antConfig.antControl.antTx3En = ANT_DISABLE;
|
||||
break;
|
||||
case PHY_ANT_MODE_POWER_LOW:
|
||||
config |= ANT_POWER_LOW;
|
||||
case PHY_ANT_INDEX_2:
|
||||
instPtr->antConfig.antControl.antTx1En = ANT_DISABLE;
|
||||
instPtr->antConfig.antControl.antTx2En = ANT_ENABLE;
|
||||
instPtr->antConfig.antControl.antTx3En = ANT_DISABLE;
|
||||
break;
|
||||
case PHY_ANT_MODE_POWER_FULL:
|
||||
config |= ANT_POWER_FULL;
|
||||
case PHY_ANT_INDEX_3:
|
||||
instPtr->antConfig.antControl.antTx1En = ANT_DISABLE;
|
||||
instPtr->antConfig.antControl.antTx2En = ANT_DISABLE;
|
||||
instPtr->antConfig.antControl.antTx3En = ANT_ENABLE;
|
||||
break;
|
||||
default:
|
||||
DBG_ERROR("Unknown antenna mode: %" PRIu8 ", remain previous mode.\n", mode);
|
||||
return;
|
||||
instPtr->antConfig.antControl.antTx1En = ANT_DISABLE;
|
||||
instPtr->antConfig.antControl.antTx2En = ANT_DISABLE;
|
||||
instPtr->antConfig.antControl.antTx3En = ANT_DISABLE;
|
||||
break;
|
||||
}
|
||||
instPtr->phyLog.antMode = mode;
|
||||
instPtr->antConfig.antMode = config;
|
||||
}
|
||||
|
||||
/*****************************************************************************/
|
||||
/**
|
||||
* @brief Set rx antenna index
|
||||
*
|
||||
* @param instPtr pointer to physical layer instance
|
||||
* @param antRxIndex target rx antenna index
|
||||
*
|
||||
* @return None.
|
||||
*
|
||||
******************************************************************************/
|
||||
void Phy_SetRxAntIndex(PHY_INST *instPtr, PHY_ANT_INDEX antRxIndex)
|
||||
{
|
||||
ASSERT(instPtr != NULL);
|
||||
|
||||
if (instPtr->antConfig.antControl.antMode == ANT_MODE_RX_AJ)
|
||||
{
|
||||
switch (antRxIndex)
|
||||
{
|
||||
case PHY_ANT_INDEX_1:
|
||||
instPtr->antConfig.antControl.antRx1En = ANT_ENABLE;
|
||||
instPtr->antConfig.antControl.antRx2En = ANT_DISABLE;
|
||||
instPtr->antConfig.antControl.antRx3En = ANT_DISABLE;
|
||||
break;
|
||||
case PHY_ANT_INDEX_2:
|
||||
instPtr->antConfig.antControl.antRx1En = ANT_DISABLE;
|
||||
instPtr->antConfig.antControl.antRx2En = ANT_ENABLE;
|
||||
instPtr->antConfig.antControl.antRx3En = ANT_DISABLE;
|
||||
break;
|
||||
case PHY_ANT_INDEX_3:
|
||||
instPtr->antConfig.antControl.antRx1En = ANT_DISABLE;
|
||||
instPtr->antConfig.antControl.antRx2En = ANT_DISABLE;
|
||||
instPtr->antConfig.antControl.antRx3En = ANT_ENABLE;
|
||||
break;
|
||||
default:
|
||||
instPtr->antConfig.antControl.antRx1En = ANT_DISABLE;
|
||||
instPtr->antConfig.antControl.antRx2En = ANT_DISABLE;
|
||||
instPtr->antConfig.antControl.antRx3En = ANT_DISABLE;
|
||||
break;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
instPtr->antConfig.antControl.antRx1En = ANT_DISABLE;
|
||||
instPtr->antConfig.antControl.antRx2En = ANT_DISABLE;
|
||||
instPtr->antConfig.antControl.antRx3En = ANT_DISABLE;
|
||||
}
|
||||
}
|
||||
|
||||
/*****************************************************************************/
|
||||
/**
|
||||
* @brief Set rx mode to normal or anti-jamming.
|
||||
*
|
||||
* @param instPtr pointer to physical layer instance
|
||||
* @param antRxMode target rx mode
|
||||
*
|
||||
* @return None.
|
||||
*
|
||||
******************************************************************************/
|
||||
void Phy_SetRxMode(PHY_INST *instPtr, PHY_ANT_RX_MODE antRxMode)
|
||||
{
|
||||
ASSERT(instPtr != NULL);
|
||||
|
||||
instPtr->antConfig.antControl.antMode = antRxMode;
|
||||
// Sync logs to system monitor
|
||||
SysMonitor_UpdatePhysicalLayerLog(&(instPtr->phyLog));
|
||||
}
|
||||
|
||||
/*****************************************************************************/
|
||||
/**
|
||||
* @brief Update antenna beam table
|
||||
*
|
||||
* @param instPtr pointer to physical layer instance
|
||||
* @param table new beam table
|
||||
* @param offset table offset
|
||||
*
|
||||
* @return None
|
||||
*
|
||||
******************************************************************************/
|
||||
void Phy_SetBeamTable(PHY_INST *instPtr, PHY_ANT_ANGLE *table, uint32_t offset)
|
||||
{
|
||||
ASSERT(instPtr != NULL);
|
||||
ASSERT(table != NULL);
|
||||
for (int i = 0; i < L1_NUM_ANT_NRRW_PATTERN; i++)
|
||||
{
|
||||
instPtr->antNrrwPattern[i] = table[(i + offset) % L1_NUM_ANT_NRRW_PATTERN];
|
||||
}
|
||||
memcpy((uint32_t *)instPtr->antInfoAddr, instPtr->antNrrwPattern,
|
||||
L1_NUM_ANT_NRRW_PATTERN * sizeof(PHY_ANT_ANGLE));
|
||||
}
|
||||
|
||||
/*****************************************************************************/
|
||||
/**
|
||||
* @brief Update antenna point direction using predefined beam table
|
||||
*
|
||||
* @param instPtr pointer to physical layer instance
|
||||
* @param beamNo new beam index
|
||||
*
|
||||
* @return SUCCESS.
|
||||
* FAILURE beamNo exceeds the table size
|
||||
*
|
||||
******************************************************************************/
|
||||
int32_t Phy_SetBeamNo(PHY_INST *instPtr, size_t beamNo, PHY_ANT_BEAM_WIDTH beamWidth)
|
||||
{
|
||||
ASSERT(instPtr != NULL);
|
||||
|
||||
if (beamWidth == PHY_ANT_BEAM_16)
|
||||
{
|
||||
if (beamNo >= L1_NUM_ANT_NRRW_PATTERN)
|
||||
{
|
||||
return FAILURE;
|
||||
}
|
||||
else
|
||||
{
|
||||
instPtr->beamNo.next = beamNo;
|
||||
instPtr->antConfig.oaxis[0] = (uint8_t)(instPtr->antNrrwPattern[beamNo].oaxis >> 8);
|
||||
instPtr->antConfig.oaxis[1] = (uint8_t)(instPtr->antNrrwPattern[beamNo].oaxis);
|
||||
instPtr->antConfig.raxis[0] = (uint8_t)(instPtr->antNrrwPattern[beamNo].raxis >> 8);
|
||||
instPtr->antConfig.raxis[1] = (uint8_t)(instPtr->antNrrwPattern[beamNo].raxis);
|
||||
return SUCCESS;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
// Beam number assign not support.
|
||||
// Assign default angle (0,0)
|
||||
instPtr->beamNo.next = 0;
|
||||
instPtr->antConfig.oaxis[0] = 0;
|
||||
instPtr->antConfig.oaxis[1] = 0;
|
||||
instPtr->antConfig.raxis[0] = 0;
|
||||
instPtr->antConfig.raxis[1] = 0;
|
||||
DBG_WARNING("Using default beam number...\n");
|
||||
return SUCCESS;
|
||||
}
|
||||
}
|
||||
|
||||
/*****************************************************************************/
|
||||
/**
|
||||
* @brief Update antenna beam width setting
|
||||
* @brief Update antenna index of the next slot.
|
||||
*
|
||||
* @param instPtr pointer to physical layer instance
|
||||
* @param beamWidth new beam width
|
||||
* @param AntIndex antenna index
|
||||
*
|
||||
* @return SUCCESS.
|
||||
* EPARAM
|
||||
* EPARAM - antenna index exceeds predefined range
|
||||
*
|
||||
******************************************************************************/
|
||||
int32_t Phy_SetBeamWidth(PHY_INST *instPtr, PHY_ANT_BEAM_WIDTH beamWidth)
|
||||
int32_t Phy_SetAntIndex(PHY_INST *instPtr, PHY_ANT_INDEX antIndex)
|
||||
{
|
||||
ASSERT(instPtr != NULL);
|
||||
uint8_t beamConfig = instPtr->antConfig.antMode & (~ANT_MODE_BEAM_MASK);
|
||||
switch (beamWidth)
|
||||
|
||||
if (antIndex < 0 || antIndex >= L1_ANT_NUM)
|
||||
{
|
||||
case PHY_ANT_BEAM_120:
|
||||
beamConfig |= ANT_BEAM_WIDE;
|
||||
break;
|
||||
case PHY_ANT_BEAM_60:
|
||||
beamConfig |= ANT_BEAM_SUBNARROR_1;
|
||||
break;
|
||||
case PHY_ANT_BEAM_25:
|
||||
beamConfig |= ANT_BEAM_SUBNARROR_0;
|
||||
break;
|
||||
case PHY_ANT_BEAM_16:
|
||||
beamConfig |= ANT_BEAM_NARROR;
|
||||
break;
|
||||
default:
|
||||
DBG_ERROR("Beam width code: 0x%08X is illegal.\n\r", beamWidth);
|
||||
DBG_ERROR("Antenna index out of range: %" PRIu8 ". \n", antIndex);
|
||||
return EPARAM;
|
||||
}
|
||||
instPtr->antConfig.antMode = beamConfig;
|
||||
instPtr->beamWd.next = beamWidth;
|
||||
DBG_INFO("Set new antenna index: %" PRId8 "\n", antIndex);
|
||||
instPtr->antIndex.next = antIndex;
|
||||
Phy_SetTxAntIndex(instPtr, antIndex);
|
||||
Phy_SetRxAntIndex(instPtr, antIndex);
|
||||
return SUCCESS;
|
||||
}
|
||||
|
||||
/*****************************************************************************/
|
||||
/**
|
||||
* @brief Set antenna to a specific direction
|
||||
*
|
||||
* @param instPtr pointer to physical layer instance
|
||||
* @param offAx elevation angle
|
||||
* @param rndAx azimuth angle
|
||||
*
|
||||
* @return SUCCESS.
|
||||
* EPARAM - the direction is exceeds predefined range
|
||||
*
|
||||
******************************************************************************/
|
||||
int32_t Phy_SetBeamAngle(PHY_INST *instPtr, double offAx, double rndAx)
|
||||
* @brief Get antenna index of the next slot.
|
||||
*/
|
||||
inline size_t Phy_GetNextAntIndex(PHY_INST *instPtr)
|
||||
{
|
||||
ASSERT(instPtr != NULL);
|
||||
uint16_t offAxDeg = 0;
|
||||
uint16_t rndAxDeg = 0;
|
||||
offAxDeg = (offAx >= 0) ? (((int32_t)(offAx * 180.0 / ANT_PI)) % 360) : (((int32_t)(offAx * 180.0 / ANT_PI)) % 360 + 360);
|
||||
rndAxDeg = (rndAx >= 0) ? (((int32_t)(rndAx * 180.0 / ANT_PI)) % 360) : (((int32_t)(rndAx * 180.0 / ANT_PI)) % 360 + 360);
|
||||
if (offAxDeg > 60)
|
||||
{
|
||||
DBG_ERROR("Angle out of range, off axis angle: %" PRIu16 " (should be 0~60), round axis angle: %" PRIu16 " (should be 0~360).\n",
|
||||
offAxDeg, rndAxDeg);
|
||||
return EPARAM;
|
||||
}
|
||||
offAxDeg = offAxDeg * 10;
|
||||
rndAxDeg = rndAxDeg * 10;
|
||||
instPtr->antConfig.oaxis[0] = (uint8_t)(offAxDeg >> 8);
|
||||
instPtr->antConfig.oaxis[1] = (uint8_t)offAxDeg;
|
||||
instPtr->antConfig.raxis[0] = (uint8_t)(rndAxDeg >> 8);
|
||||
instPtr->antConfig.raxis[1] = (uint8_t)rndAxDeg;
|
||||
return SUCCESS;
|
||||
return instPtr->antIndex.next;
|
||||
}
|
||||
|
||||
/** @} PhysicalLayer_AntennaControl*/
|
||||
|
||||
@@ -34,54 +34,42 @@
|
||||
* @{
|
||||
*/
|
||||
#define PHY_TIME_WORD_H_MAX UINT32_MAX
|
||||
#define PHY_TIME_WORD_L_MAX 0x0007A120 // 5ms/10ns
|
||||
#define PHY_TIME_WORD_L_MAX 200000U // 2 ms/10 ns
|
||||
|
||||
#define L1_FRAME_LEN_MAX (8192 / 8) // byte
|
||||
#define L1_FRAME_2KBPS_20MS_LEN 0 // byte
|
||||
#define L1_FRAME_2KBPS_100MS_LEN (312 / 8) // byte
|
||||
#define L1_FRAME_10KBPS_10MS_LEN 0 // byte
|
||||
#define L1_FRAME_10KBPS_20MS_LEN (232 / 8) // byte
|
||||
#define L1_FRAME_40KBPS_20MS_LEN (2152 / 8) // byte
|
||||
#define L1_FRAME_40KBPS_10MS_LEN (712 / 8) // byte
|
||||
#define L1_FRAME_200KBPS_5MS_LEN (2040 / 8) // byte
|
||||
#define L1_FRAME_1M2BPS_5MS_LEN (8176 / 8) // byte
|
||||
#define L1_FRAME_LEN_MAX (16384 / 8) // byte
|
||||
#define L1_FRAME_ADV_24MS_LEN (520 / 8) // byte
|
||||
#define L1_FRAME_ACK_8MS_LEN (520 / 8) // byte
|
||||
#define L1_FRAME_128KBPS_4MS_LEN (784 / 8) // byte
|
||||
#define L1_FRAME_512KBPS_4MS_LEN (2584 / 8) // byte
|
||||
#define L1_FRAME_2MBPS_4MS_LEN (10224 / 8) // byte
|
||||
|
||||
#define L1_FRAME_2KBPS_20MS_COMP 1841158 // *10ns(Timer_L)
|
||||
#define L1_FRAME_2KBPS_100MS_COMP 1841158 // *10ns(Timer_L)
|
||||
#define L1_FRAME_10KBPS_10MS_COMP 850950 // *10ns(Timer_L)
|
||||
#define L1_FRAME_10KBPS_20MS_COMP 850950 // *10ns(Timer_L)
|
||||
#define L1_FRAME_40KBPS_20MS_COMP 111485 // *10ns(Timer_L)
|
||||
#define L1_FRAME_40KBPS_10MS_COMP 111485 // *10ns(Timer_L)
|
||||
#define L1_FRAME_200KBPS_5MS_COMP 22493 // *10ns(Timer_L)
|
||||
#define L1_FRAME_1M2BPS_5MS_COMP 22493 // *10ns(Timer_L)
|
||||
#define L1_FRAME_ADV_24MS_COMP 1841158 // FIXME: need update, *10ns(Timer_L)
|
||||
#define L1_FRAME_ACK_8MS_COMP 1841158 // FIXME: need update, *10ns(Timer_L)
|
||||
#define L1_FRAME_128KBPS_4MS_COMP 850950 // FIXME: need update, *10ns(Timer_L)
|
||||
#define L1_FRAME_512KBPS_4MS_COMP 850950 // FIXME: need update, *10ns(Timer_L)
|
||||
#define L1_FRAME_2MBPS_4MS_COMP 111485 // FIXME: need update, *10ns(Timer_L)
|
||||
|
||||
#define L1_ANTCONFIG_MAX_LEN 8192
|
||||
#define L1_TXRXDATA_MAX_LEN 2048
|
||||
#define L1_TXRXDATA_MAX_LEN 16384
|
||||
|
||||
#define ANT_COINFO_LEN 32 // bytes
|
||||
#define ANT_COINFO_LEN 32 // bytes, antenna configuration length of each hop
|
||||
|
||||
#define ATTN_DEFAULT 0
|
||||
#define ATTN_2KBPS_100MS ATTN_DEFAULT
|
||||
#define ATTN_2KBPS_20MS ATTN_DEFAULT
|
||||
#define ATTN_10KBPS_10MS 12
|
||||
#define ATTN_10KBPS_20MS 12
|
||||
#define ATTN_40KBPS_10MS 0
|
||||
#define ATTN_40KBPS_20MS 0
|
||||
#define ATTN_200KBPS_5MS ATTN_DEFAULT
|
||||
#define ATTN_1M2BPS_5MS ATTN_DEFAULT
|
||||
#define ATTN_ADV_24MS ATTN_DEFAULT
|
||||
#define ATTN_ACK_8MS ATTN_DEFAULT
|
||||
#define ATTN_128KBPS_4MS ATTN_DEFAULT
|
||||
#define ATTN_512KBPS_4MS ATTN_DEFAULT
|
||||
#define ATTN_2MBPS_4MS ATTN_DEFAULT
|
||||
/** @} PhysicalLayer_Private_Constants*/
|
||||
|
||||
/************************** Variable Definitions *****************************/
|
||||
extern const uint16_t freqTable[L1_FRAME_MAX_HOPS];
|
||||
extern const int16_t antCalTable[L1_FRAME_MAX_HOPS][L1_ANT_NUM_CH];
|
||||
extern const uint8_t hopPattern_2KBPS_20MS[L1_FRAME_2KBPS_20MS_HOPS];
|
||||
extern const uint8_t hopPattern_2KBPS_100MS[L1_FRAME_2KBPS_100MS_HOPS];
|
||||
extern const uint8_t hopPattern_10KBPS_10MS[L1_FRAME_10KBPS_10MS_HOPS];
|
||||
extern const uint8_t hopPattern_10KBPS_20MS[L1_FRAME_10KBPS_20MS_HOPS];
|
||||
extern const uint8_t hopPattern_40KBPS_10MS[L1_FRAME_40KBPS_10MS_HOPS];
|
||||
extern const uint8_t hopPattern_40KBPS_20MS[L1_FRAME_40KBPS_20MS_HOPS];
|
||||
extern const uint8_t hopPattern_200KBPS_5MS[L1_FRAME_200KBPS_5MS_HOPS];
|
||||
extern const uint8_t hopPattern_1M2BPS_5MS[L1_FRAME_1M2BPS_5MS_HOPS];
|
||||
extern const int16_t antCalTable[L1_ANT_NUM][L1_FRAME_MAX_HOPS][L1_ANT_CH_NUM];
|
||||
extern const uint8_t hopPattern_ADV_24MS[L1_FRAME_ADV_24MS_HOPS];
|
||||
extern const uint8_t hopPattern_ACK_8MS[L1_FRAME_ACK_8MS_HOPS];
|
||||
extern const uint8_t hopPattern_128KBPS_4MS[L1_FRAME_128KBPS_4MS_HOPS];
|
||||
extern const uint8_t hopPattern_512KBPS_4MS[L1_FRAME_512KBPS_4MS_HOPS];
|
||||
extern const uint8_t hopPattern_2MBPS_4MS[L1_FRAME_2MBPS_4MS_HOPS];
|
||||
|
||||
/***************** Macros (Inline Functions) Definitions *********************/
|
||||
/************************** Function Prototypes ******************************/
|
||||
@@ -227,22 +215,16 @@ uint32_t Phy_GetFrameLen(L1_FRAME_TYPE frameType)
|
||||
{
|
||||
switch (frameType)
|
||||
{
|
||||
case L1_2KBPS_20MS_FRAME:
|
||||
return L1_FRAME_2KBPS_20MS_LEN;
|
||||
case L1_2KBPS_100MS_FRAME:
|
||||
return L1_FRAME_2KBPS_100MS_LEN;
|
||||
case L1_10KBPS_10MS_FRAME:
|
||||
return L1_FRAME_10KBPS_10MS_LEN;
|
||||
case L1_10KBPS_20MS_FRAME:
|
||||
return L1_FRAME_10KBPS_20MS_LEN;
|
||||
case L1_40KBPS_20MS_FRAME:
|
||||
return L1_FRAME_40KBPS_20MS_LEN;
|
||||
case L1_40KBPS_10MS_FRAME:
|
||||
return L1_FRAME_40KBPS_10MS_LEN;
|
||||
case L1_200KBPS_5MS_FRAME:
|
||||
return L1_FRAME_200KBPS_5MS_LEN;
|
||||
case L1_1M2BPS_5MS_FRAME:
|
||||
return L1_FRAME_1M2BPS_5MS_LEN;
|
||||
case L1_FRAME_ADV_24MS:
|
||||
return L1_FRAME_ADV_24MS_LEN;
|
||||
case L1_FRAME_ACK_8MS:
|
||||
return L1_FRAME_ACK_8MS_LEN;
|
||||
case L1_FRAME_128KBPS_4MS:
|
||||
return L1_FRAME_128KBPS_4MS_LEN;
|
||||
case L1_FRAME_512KBPS_4MS:
|
||||
return L1_FRAME_512KBPS_4MS_LEN;
|
||||
case L1_FRAME_2MBPS_4MS:
|
||||
return L1_FRAME_2MBPS_4MS_LEN;
|
||||
default:
|
||||
return L1_FRAME_NONE_LEN;
|
||||
}
|
||||
@@ -263,24 +245,18 @@ uint32_t Phy_GetHopLength(L1_FRAME_TYPE frameType)
|
||||
{
|
||||
switch (frameType)
|
||||
{
|
||||
case L1_2KBPS_20MS_FRAME:
|
||||
return L1_FRAME_2KBPS_20MS_HOPS;
|
||||
case L1_2KBPS_100MS_FRAME:
|
||||
return L1_FRAME_2KBPS_100MS_HOPS;
|
||||
case L1_10KBPS_10MS_FRAME:
|
||||
return L1_FRAME_10KBPS_10MS_HOPS;
|
||||
case L1_10KBPS_20MS_FRAME:
|
||||
return L1_FRAME_10KBPS_20MS_HOPS;
|
||||
case L1_40KBPS_20MS_FRAME:
|
||||
return L1_FRAME_40KBPS_20MS_HOPS;
|
||||
case L1_40KBPS_10MS_FRAME:
|
||||
return L1_FRAME_40KBPS_10MS_HOPS;
|
||||
case L1_200KBPS_5MS_FRAME:
|
||||
return L1_FRAME_200KBPS_5MS_HOPS;
|
||||
case L1_1M2BPS_5MS_FRAME:
|
||||
return L1_FRAME_1M2BPS_5MS_HOPS;
|
||||
case L1_FRAME_ADV_24MS:
|
||||
return L1_FRAME_ADV_24MS_HOPS;
|
||||
case L1_FRAME_ACK_8MS:
|
||||
return L1_FRAME_ACK_8MS_HOPS;
|
||||
case L1_FRAME_128KBPS_4MS:
|
||||
return L1_FRAME_128KBPS_4MS_HOPS;
|
||||
case L1_FRAME_512KBPS_4MS:
|
||||
return L1_FRAME_512KBPS_4MS_HOPS;
|
||||
case L1_FRAME_2MBPS_4MS:
|
||||
return L1_FRAME_2MBPS_4MS_HOPS;
|
||||
default:
|
||||
return L1_FRAME_NONE_LEN;
|
||||
return L1_FRAME_NONE_HOPS;
|
||||
}
|
||||
}
|
||||
|
||||
@@ -298,24 +274,18 @@ uint32_t Phy_GetTimeComp(L1_FRAME_TYPE frameType)
|
||||
{
|
||||
switch (frameType)
|
||||
{
|
||||
case L1_2KBPS_20MS_FRAME:
|
||||
return L1_FRAME_2KBPS_20MS_COMP;
|
||||
case L1_2KBPS_100MS_FRAME:
|
||||
return L1_FRAME_2KBPS_100MS_COMP;
|
||||
case L1_10KBPS_10MS_FRAME:
|
||||
return L1_FRAME_10KBPS_10MS_COMP;
|
||||
case L1_10KBPS_20MS_FRAME:
|
||||
return L1_FRAME_10KBPS_20MS_COMP;
|
||||
case L1_40KBPS_20MS_FRAME:
|
||||
return L1_FRAME_40KBPS_20MS_COMP;
|
||||
case L1_40KBPS_10MS_FRAME:
|
||||
return L1_FRAME_40KBPS_10MS_COMP;
|
||||
case L1_200KBPS_5MS_FRAME:
|
||||
return L1_FRAME_200KBPS_5MS_COMP;
|
||||
case L1_1M2BPS_5MS_FRAME:
|
||||
return L1_FRAME_1M2BPS_5MS_COMP;
|
||||
case L1_FRAME_ADV_24MS:
|
||||
return L1_FRAME_ADV_24MS_COMP;
|
||||
case L1_FRAME_ACK_8MS:
|
||||
return L1_FRAME_ACK_8MS_COMP;
|
||||
case L1_FRAME_128KBPS_4MS:
|
||||
return L1_FRAME_128KBPS_4MS_COMP;
|
||||
case L1_FRAME_512KBPS_4MS:
|
||||
return L1_FRAME_512KBPS_4MS_COMP;
|
||||
case L1_FRAME_2MBPS_4MS:
|
||||
return L1_FRAME_2MBPS_4MS_COMP;
|
||||
default:
|
||||
return L1_FRAME_NONE_LEN;
|
||||
return L1_FRAME_NONE_COMP;
|
||||
}
|
||||
}
|
||||
|
||||
@@ -325,7 +295,7 @@ uint32_t Phy_GetTimeComp(L1_FRAME_TYPE frameType)
|
||||
*
|
||||
* @param instPtr A pointer to physical layer control instance.
|
||||
*
|
||||
* @return Layer2 frame type. Refer "frame_def.h"
|
||||
* @return Layer1 frame type. Refer "frame_def.h"
|
||||
*
|
||||
******************************************************************************/
|
||||
inline L1_FRAME_TYPE Phy_GetLastRecvFrameType(PHY_INST *instPtr)
|
||||
@@ -333,29 +303,23 @@ inline L1_FRAME_TYPE Phy_GetLastRecvFrameType(PHY_INST *instPtr)
|
||||
ASSERT(instPtr != NULL);
|
||||
if (Phy_IsFrameReceived(instPtr) == false)
|
||||
{
|
||||
return L1_NONE_FRAME;
|
||||
return L1_FRAME_NONE;
|
||||
}
|
||||
uint32_t frame_type = (PhyRead(instPtr, COASE_FREQEST) & COASE_TYPE_MASK);
|
||||
switch (frame_type)
|
||||
{
|
||||
case COASE_TYPE_2KBPS_20MS:
|
||||
return L1_2KBPS_20MS_FRAME;
|
||||
case COASE_TYPE_2KBPS_100MS:
|
||||
return L1_2KBPS_100MS_FRAME;
|
||||
case COASE_TYPE_10KBPS_10MS:
|
||||
return L1_10KBPS_10MS_FRAME;
|
||||
case COASE_TYPE_10KBPS_20MS:
|
||||
return L1_10KBPS_20MS_FRAME;
|
||||
case COASE_TYPE_40KBPS_20MS:
|
||||
return L1_40KBPS_20MS_FRAME;
|
||||
case COASE_TYPE_40KBPS_10MS:
|
||||
return L1_40KBPS_10MS_FRAME;
|
||||
case COASE_TYPE_200KBPS_5MS:
|
||||
return L1_200KBPS_5MS_FRAME;
|
||||
case COASE_TYPE_1M2BPS_5MS:
|
||||
return L1_1M2BPS_5MS_FRAME;
|
||||
case COASE_TYPE_ADV_24MS:
|
||||
return L1_FRAME_ADV_24MS;
|
||||
case COASE_TYPE_ACK_8MS:
|
||||
return L1_FRAME_ACK_8MS;
|
||||
case COASE_TYPE_128KBPS_4MS:
|
||||
return L1_FRAME_128KBPS_4MS;
|
||||
case COASE_TYPE_512KBPS_4MS:
|
||||
return L1_FRAME_512KBPS_4MS;
|
||||
case COASE_TYPE_2MBPS_4MS:
|
||||
return L1_FRAME_2MBPS_4MS;
|
||||
default:
|
||||
return L1_NONE_FRAME;
|
||||
return L1_FRAME_NONE;
|
||||
}
|
||||
}
|
||||
|
||||
@@ -365,7 +329,7 @@ inline L1_FRAME_TYPE Phy_GetLastRecvFrameType(PHY_INST *instPtr)
|
||||
*
|
||||
* @param instPtr A pointer to physical layer control instance.
|
||||
*
|
||||
* @return Layer2 frame type. Refer "frame_def.h"
|
||||
* @return Layer1 frame type. Refer "frame_def.h"
|
||||
*
|
||||
******************************************************************************/
|
||||
inline L1_FRAME_TYPE Phy_GetLastSendFrameType(PHY_INST *instPtr)
|
||||
@@ -373,7 +337,7 @@ inline L1_FRAME_TYPE Phy_GetLastSendFrameType(PHY_INST *instPtr)
|
||||
ASSERT(instPtr != NULL);
|
||||
if (instPtr->tor.last != PHY_TOR_TX)
|
||||
{
|
||||
return L1_NONE_FRAME;
|
||||
return L1_FRAME_NONE;
|
||||
}
|
||||
return instPtr->frameType.last;
|
||||
}
|
||||
@@ -424,9 +388,8 @@ int32_t Phy_Init(PHY_INST **instPtr, PHY_CONFIG *phyConfig)
|
||||
Phy_AntConfigInit(&((*instPtr)->antConfig));
|
||||
|
||||
memset(&((*instPtr))->tor, PHY_TOR_SUSPEND, sizeof(PHY_RCD));
|
||||
memset(&((*instPtr)->frameType), L1_NONE_FRAME, sizeof(PHY_RCD));
|
||||
memset(&((*instPtr)->beamNo), (int32_t)L1_INIT_BEAM_NO, sizeof(PHY_RCD));
|
||||
memset(&((*instPtr)->beamWd), (int32_t)L1_INIT_ANT_WD, sizeof(PHY_RCD));
|
||||
memset(&((*instPtr)->frameType), L1_FRAME_NONE, sizeof(PHY_RCD));
|
||||
memset(&((*instPtr)->antIndex), (int32_t)L1_INIT_ANT_IDX, sizeof(PHY_RCD));
|
||||
memset(&((*instPtr)->hwSate), 0x00, sizeof(HWSTATE));
|
||||
memset(&((*instPtr)->phyLog), 0x00, sizeof(PHYLOG));
|
||||
|
||||
@@ -509,44 +472,6 @@ int32_t Phy_Init(PHY_INST **instPtr, PHY_CONFIG *phyConfig)
|
||||
(*instPtr)->recvDataAddr = rxDataBram.Config.MemBaseAddress;
|
||||
(*instPtr)->sendDataAddr = txDataBram.Config.MemBaseAddress;
|
||||
|
||||
// Setup antenna presets
|
||||
XBram antInfoBram;
|
||||
if (phyConfig->antInfoBramId != -1)
|
||||
{
|
||||
bramConfigPtr = XBram_LookupConfig(phyConfig->antInfoBramId);
|
||||
if (bramConfigPtr == NULL)
|
||||
{
|
||||
Phy_Destroy(*instPtr);
|
||||
return EDCONF;
|
||||
}
|
||||
Status = XBram_CfgInitialize(&antInfoBram, bramConfigPtr,
|
||||
bramConfigPtr->CtrlBaseAddress);
|
||||
if (Status != SUCCESS)
|
||||
{
|
||||
Phy_Destroy(*instPtr);
|
||||
return Status;
|
||||
}
|
||||
/*
|
||||
* Execute the BRAM driver self test.
|
||||
*/
|
||||
Status = XBram_SelfTest(&antInfoBram, 0);
|
||||
if (Status != SUCCESS)
|
||||
{
|
||||
Phy_Destroy(*instPtr);
|
||||
return Status;
|
||||
}
|
||||
(*instPtr)->antInfoAddr = antInfoBram.Config.MemBaseAddress;
|
||||
uint32_t phyMainCtrl = PhyRead(*instPtr, PHY_MAIN_CTRL);
|
||||
phyMainCtrl &= ~PHY_MAIN_CTRL_NSCAN_MASK;
|
||||
phyMainCtrl |= PHY_MAIN_CTRL_NSCAN_MASK &
|
||||
(L1_NUM_ANT_NRRW_PATTERN << PHY_MAIN_CTRL_NSCAN_SHIFT);
|
||||
PhyWrite(*instPtr, PHY_MAIN_CTRL, phyMainCtrl);
|
||||
}
|
||||
else
|
||||
{
|
||||
(*instPtr)->antInfoAddr = (uintptr_t)NULL;
|
||||
}
|
||||
|
||||
/* Initialize the XAdc driver. */
|
||||
XAdcPs_Config *xadcConfigPtr;
|
||||
|
||||
@@ -597,7 +522,7 @@ int32_t Phy_Init(PHY_INST **instPtr, PHY_CONFIG *phyConfig)
|
||||
|
||||
/*****************************************************************************/
|
||||
/**
|
||||
* @brief Destroy physical layer inctance, free allocated memory.
|
||||
* @brief Destroy physical layer instance, free allocated memory.
|
||||
*
|
||||
* @param instPtr a pointer to physical instance
|
||||
*
|
||||
@@ -685,11 +610,8 @@ int32_t Phy_SetMode(PHY_INST *instPtr, PHY_MODE modeCod)
|
||||
case PHY_MODE_LISTEN:
|
||||
phyMainCtrl |= PHY_MAIN_CTRL_MODE_LISTEN;
|
||||
break;
|
||||
case PHY_MODE_SCHEDULE:
|
||||
phyMainCtrl |= PHY_MAIN_CTRL_MODE_SCHEDULE;
|
||||
break;
|
||||
case PHY_MODE_PULL:
|
||||
phyMainCtrl |= PHY_MAIN_CTRL_MODE_PULL;
|
||||
case PHY_MODE_POLL:
|
||||
phyMainCtrl |= PHY_MAIN_CTRL_MODE_POLL;
|
||||
break;
|
||||
default:
|
||||
return FAILURE;
|
||||
@@ -773,53 +695,30 @@ int32_t Phy_SetupNextSlot(PHY_INST *instPtr, PHY_TOR_TYPE txrxMode,
|
||||
}
|
||||
switch (frameType)
|
||||
{
|
||||
case L1_2KBPS_20MS_FRAME:
|
||||
phyModeCtrl |= PHY_MODE_CTRL_FRAME_2KBPS_20MS;
|
||||
hopNum = L1_FRAME_2KBPS_20MS_HOPS;
|
||||
hopPattern = hopPattern_2KBPS_20MS;
|
||||
instPtr->antConfig.rfTxMgc = ATTN_2KBPS_20MS;
|
||||
case L1_FRAME_ADV_24MS:
|
||||
phyModeCtrl |= PHY_MODE_CTRL_FRAME_ADV_24MS;
|
||||
hopNum = L1_FRAME_ADV_24MS_HOPS;
|
||||
hopPattern = hopPattern_ADV_24MS;
|
||||
break;
|
||||
case L1_2KBPS_100MS_FRAME:
|
||||
phyModeCtrl |= PHY_MODE_CTRL_FRAME_2KBPS_100MS;
|
||||
hopNum = L1_FRAME_2KBPS_100MS_HOPS;
|
||||
hopPattern = hopPattern_2KBPS_100MS;
|
||||
instPtr->antConfig.rfTxMgc = ATTN_2KBPS_100MS;
|
||||
case L1_FRAME_ACK_8MS:
|
||||
phyModeCtrl |= PHY_MODE_CTRL_FRAME_ACK_8MS;
|
||||
hopNum = L1_FRAME_ACK_8MS_HOPS;
|
||||
hopPattern = hopPattern_ACK_8MS;
|
||||
break;
|
||||
case L1_10KBPS_10MS_FRAME:
|
||||
phyModeCtrl |= PHY_MODE_CTRL_FRAME_10KBPS_10MS;
|
||||
hopNum = L1_FRAME_10KBPS_20MS_HOPS;
|
||||
hopPattern = hopPattern_10KBPS_20MS;
|
||||
instPtr->antConfig.rfTxMgc = ATTN_10KBPS_10MS;
|
||||
case L1_FRAME_128KBPS_4MS:
|
||||
phyModeCtrl |= PHY_MODE_CTRL_FRAME_128KBPS_4MS;
|
||||
hopNum = L1_FRAME_128KBPS_4MS_HOPS;
|
||||
hopPattern = hopPattern_128KBPS_4MS;
|
||||
break;
|
||||
case L1_10KBPS_20MS_FRAME:
|
||||
phyModeCtrl |= PHY_MODE_CTRL_FRAME_10KBPS_20MS;
|
||||
hopNum = L1_FRAME_10KBPS_20MS_HOPS;
|
||||
hopPattern = hopPattern_10KBPS_20MS;
|
||||
instPtr->antConfig.rfTxMgc = ATTN_10KBPS_20MS;
|
||||
case L1_FRAME_512KBPS_4MS:
|
||||
phyModeCtrl |= PHY_MODE_CTRL_FRAME_512KBPS_4MS;
|
||||
hopNum = L1_FRAME_512KBPS_4MS_HOPS;
|
||||
hopPattern = hopPattern_512KBPS_4MS;
|
||||
break;
|
||||
case L1_40KBPS_20MS_FRAME:
|
||||
phyModeCtrl |= PHY_MODE_CTRL_FRAME_40KBPS_20MS;
|
||||
hopNum = L1_FRAME_40KBPS_20MS_HOPS;
|
||||
hopPattern = hopPattern_40KBPS_20MS;
|
||||
instPtr->antConfig.rfTxMgc = ATTN_40KBPS_20MS;
|
||||
break;
|
||||
case L1_40KBPS_10MS_FRAME:
|
||||
phyModeCtrl |= PHY_MODE_CTRL_FRAME_40KBPS_10MS;
|
||||
hopNum = L1_FRAME_40KBPS_10MS_HOPS;
|
||||
hopPattern = hopPattern_40KBPS_10MS;
|
||||
instPtr->antConfig.rfTxMgc = ATTN_40KBPS_10MS;
|
||||
break;
|
||||
case L1_200KBPS_5MS_FRAME:
|
||||
phyModeCtrl |= PHY_MODE_CTRL_FRAME_200KBPS_5MS;
|
||||
hopNum = L1_FRAME_200KBPS_5MS_HOPS;
|
||||
hopPattern = hopPattern_200KBPS_5MS;
|
||||
instPtr->antConfig.rfTxMgc = ATTN_200KBPS_5MS;
|
||||
break;
|
||||
case L1_1M2BPS_5MS_FRAME:
|
||||
phyModeCtrl |= PHY_MODE_CTRL_FRAME_1M2BPS_5MS;
|
||||
hopNum = L1_FRAME_1M2BPS_5MS_HOPS;
|
||||
hopPattern = hopPattern_1M2BPS_5MS;
|
||||
instPtr->antConfig.rfTxMgc = ATTN_1M2BPS_5MS;
|
||||
case L1_FRAME_2MBPS_4MS:
|
||||
phyModeCtrl |= PHY_MODE_CTRL_FRAME_2MBPS_4MS;
|
||||
hopNum = L1_FRAME_2MBPS_4MS_HOPS;
|
||||
hopPattern = hopPattern_2MBPS_4MS;
|
||||
break;
|
||||
default:
|
||||
return EPARAM;
|
||||
@@ -831,36 +730,24 @@ int32_t Phy_SetupNextSlot(PHY_INST *instPtr, PHY_TOR_TYPE txrxMode,
|
||||
|
||||
// TODO: Set antenna stand by, when suspend.
|
||||
const uint8_t *dataSrcPtr = (uint8_t *)(&(instPtr->antConfig));
|
||||
const size_t antIndexNext = Phy_GetNextAntIndex(instPtr);
|
||||
size_t hopIdx;
|
||||
uint16_t hopFreq;
|
||||
int16_t hopCal;
|
||||
uint8_t hopCal;
|
||||
for (int32_t i = 0; i < hopNum; i++)
|
||||
{
|
||||
hopIdx = hopPattern[i];
|
||||
|
||||
// Frequency setting
|
||||
hopFreq = freqTable[hopIdx];
|
||||
instPtr->antConfig.antFreq[0] = (uint8_t)(hopFreq >> 8);
|
||||
instPtr->antConfig.antFreq[1] = (uint8_t)hopFreq;
|
||||
instPtr->antConfig.rfFreq[0] = (uint8_t)(hopFreq >> 8);
|
||||
instPtr->antConfig.rfFreq[1] = (uint8_t)hopFreq;
|
||||
instPtr->antConfig.rfFreq[antIndexNext][0] = (uint8_t)(hopFreq >> 8);
|
||||
instPtr->antConfig.rfFreq[antIndexNext][1] = (uint8_t)hopFreq;
|
||||
// Calibration setting
|
||||
// -- CH0
|
||||
hopCal = antCalTable[hopIdx][0];
|
||||
instPtr->antConfig.ch0Cal[0] = (uint8_t)(hopCal >> 8);
|
||||
instPtr->antConfig.ch0Cal[1] = (uint8_t)hopCal;
|
||||
// -- CH1
|
||||
hopCal = antCalTable[hopIdx][1];
|
||||
instPtr->antConfig.ch1Cal[0] = (uint8_t)(hopCal >> 8);
|
||||
instPtr->antConfig.ch1Cal[1] = (uint8_t)hopCal;
|
||||
// -- CH2
|
||||
hopCal = antCalTable[hopIdx][2];
|
||||
instPtr->antConfig.ch2Cal[0] = (uint8_t)(hopCal >> 8);
|
||||
instPtr->antConfig.ch2Cal[1] = (uint8_t)hopCal;
|
||||
// -- CH3
|
||||
hopCal = antCalTable[hopIdx][3];
|
||||
instPtr->antConfig.ch3Cal[0] = (uint8_t)(hopCal >> 8);
|
||||
instPtr->antConfig.ch3Cal[1] = (uint8_t)hopCal;
|
||||
for (uint8_t ii = 0; ii < L1_ANT_CH_NUM; ii ++)
|
||||
{
|
||||
hopCal = antCalTable[antIndexNext][hopIdx][ii];
|
||||
instPtr->antConfig.rfNormComp[antIndexNext][ii] = hopCal;
|
||||
}
|
||||
|
||||
memcpy((uint8_t *)(antConfigAddr + i * ANT_COINFO_LEN),
|
||||
dataSrcPtr, sizeof(PHY_ANT_CONFIG));
|
||||
@@ -889,9 +776,7 @@ int32_t Phy_SetupNextSlot(PHY_INST *instPtr, PHY_TOR_TYPE txrxMode,
|
||||
|
||||
Phy_RcdShift(&(instPtr->tor), txrxMode);
|
||||
Phy_RcdShift(&(instPtr->frameType), frameType);
|
||||
// TODO:
|
||||
Phy_RcdShift(&(instPtr->beamNo), L1_INIT_BEAM_NO);
|
||||
Phy_RcdShift(&(instPtr->beamWd), L1_INIT_ANT_WD);
|
||||
|
||||
return SUCCESS;
|
||||
}
|
||||
|
||||
@@ -1121,45 +1006,42 @@ void Phy_RefreshHwSate(PHY_INST *instPtr)
|
||||
#else
|
||||
instPtr->hwSate.isSpOk = true;
|
||||
#endif
|
||||
/*** Voltage and Status ***/
|
||||
rawData = PhyRead(instPtr, ANT_STATUS);
|
||||
// -- Update Antenna Voltage Status: 1 - normal, 0 - error
|
||||
// [0] - ANT voltage status
|
||||
// [2] - RF voltage status
|
||||
// [4] - NIL voltage status
|
||||
// [6] - Antenna status
|
||||
instPtr->hwSate.antVolt = ((rawData & ANT_STATUS_ANT_VOLT_MASK) == ANT_STATUS_ANT_VOLT_OK) ? VOLT_ANT_PROC_OK : 0x00;
|
||||
instPtr->hwSate.antVolt |= ((rawData & ANT_STATUS_RF_VOLT_MASK) == ANT_STATUS_RF_VOLT_OK) ? VOLT_ANT_RF_OK : 0x00;
|
||||
instPtr->hwSate.antVolt |= ((rawData & ANT_STATUS_NIL_VOLT_MASK) == ANT_STATUS_NIL_VOLT_OK) ? VOLT_ANT_NIL_OK : 0x00;
|
||||
instPtr->hwSate.antVolt |= ((rawData & ANT_STATUS_CODE_MASK) == ANT_STATUS_CODE_OK) ? ANT_STATE_OK : 0x00;
|
||||
/*** Antenna Status Chunk 1 ***/
|
||||
rawData = PhyRead(instPtr, ANT_STATUS_1);
|
||||
// -- Update Antenna Frequency Status:
|
||||
// [15] - ANT1 PLL on-off status: 1 - PLL1 active, 0 - PLL2 active
|
||||
// [14:0] - ANT1 PLL frequency, base frequency is 3700 MHz
|
||||
// [31] - ANT2 PLL on-off status: 1 - PLL1 active, 0 - PLL2 active
|
||||
// [30:16] - ANT2 PLL frequency, base frequency is 3700 MHz
|
||||
instPtr->hwSate.ant1Freq = (rawData & ANT_STATUS_1_ANT1_STATUS_MASK) >> ANT_STATUS_1_ANT1_STATUS_SHIFT;
|
||||
instPtr->hwSate.ant2Freq = (rawData & ANT_STATUS_1_ANT2_STATUS_MASK) >> ANT_STATUS_1_ANT2_STATUS_SHIFT;
|
||||
|
||||
/*** Temperature and Lock Status ***/
|
||||
rawData = PhyRead(instPtr, ANT_RF_STATUS);
|
||||
/*** Antenna Status Chunk 2 ***/
|
||||
rawData = PhyRead(instPtr, ANT_STATUS_2);
|
||||
// -- Update Antenna Frequency Status:
|
||||
// [15] - ANT 3 PLL on-off status: 1 - PLL1 active, 0 - PLL2 active
|
||||
// [14:0] - ANT 3 PLL frequency, base frequency is 3700 MHz
|
||||
// [16] - PLL1 of ANT1 lock status: 1 - lock, 2 - unlock
|
||||
// [17] - PLL2 of ANT1 lock status: 1 - lock, 2 - unlock
|
||||
// [18] - PLL1 of ANT2 lock status: 1 - lock, 2 - unlock
|
||||
// [19] - PLL2 of ANT2 lock status: 1 - lock, 2 - unlock
|
||||
// [20] - PLL1 of ANT3 lock status: 1 - lock, 2 - unlock
|
||||
// [21] - PLL2 of ANT3 lock status: 1 - lock, 2 - unlock
|
||||
// [24] - Working mode of ANT1: 0 - normal mode, 1 - anti-jamming mode
|
||||
// [25] - Working mode of ANT2: 0 - normal mode, 1 - anti-jamming mode
|
||||
// [26] - Working mode of ANT3: 0 - normal mode, 1 - anti-jamming mode
|
||||
instPtr->hwSate.ant3Freq = (rawData & ANT_STATUS_2_ANT3_STATUS_MASK) >> ANT_STATUS_2_ANT3_STATUS_SHIFT;
|
||||
instPtr->hwSate.antPll = (rawData & ANT_STATUS_2_PLL_LK_MASK) >> ANT_STATUS_2_PLL_LK_SHIFT;
|
||||
instPtr->hwSate.antMode = (rawData & ANT_STATUS_2_MODE_MASK) >> ANT_STATUS_2_MODE_SHIFT;
|
||||
|
||||
/*** Temperature and Reserved Control ***/
|
||||
rawData = PhyRead(instPtr, ANT_STATUS_TEMP);
|
||||
//-- Update Antenna Temperature (signed 8bit integer, 1 centigrade per LSB)
|
||||
instPtr->hwSate.antTemp = (uint8_t)(rawData & ANT_RF_STATUS_TEMP_MASK);
|
||||
// -- Update Antenna PLL Lock Status: 1 - normal, 0 - error
|
||||
// [0] - BASEBAND lock status
|
||||
// [2] - PLLA lock status
|
||||
// [4] - PLLB lock status
|
||||
instPtr->hwSate.antPll = ((rawData & ANT_RF_STATUS_BBLOCK_MASK) == ANT_RF_STATUS_BBLOCK_OK) ? CLK_ANT_BBPLL_LOCK : 0x00;
|
||||
instPtr->hwSate.antPll |= ((rawData & ANT_RF_STATUS_PLLA_MASK) == ANT_RF_STATUS_PLLA_OK) ? CLK_ANT_RFPLL1_LOCK : 0x00;
|
||||
instPtr->hwSate.antPll |= ((rawData & ANT_RF_STATUS_PLLB_MASK) == ANT_RF_STATUS_PLLB_OK) ? CLK_ANT_RFPLL2_LOCK : 0x00;
|
||||
instPtr->hwSate.antTemp = (uint8_t)(rawData & ANT_STATUS_TEMP_MASK) >> ANT_STATUS_TEMP_SHIFT;
|
||||
instPtr->hwSate.antRsvd = (uint8_t)(rawData & ANT_STATUS_TEMP_RSVD_MASK) >> ANT_STATUS_TEMP_RSVD_SHIFT;
|
||||
|
||||
/*** MGCs ***/
|
||||
rawData = PhyRead(instPtr, ANT_RF_MGC);
|
||||
// -- Update Antenna MGC (0~15 dB)
|
||||
// [3:0] - Channel 1 MGC
|
||||
// [7:4] - Channel 2 MGC
|
||||
// [11:8] - Channel 3 MGC
|
||||
// [15:12] - Channel 4 MGC
|
||||
instPtr->hwSate.antMgc0 = (rawData & ANT_RF_MGC_CH1_MASK);
|
||||
instPtr->hwSate.antMgc0 |= (rawData & ANT_RF_MGC_CH2_MASK) >> 4;
|
||||
instPtr->hwSate.antMgc1 = (rawData & ANT_RF_MGC_CH3_MASK) >> 16;
|
||||
instPtr->hwSate.antMgc1 |= (rawData & ANT_RF_MGC_CH4_MASK) >> 24;
|
||||
|
||||
// Determin if antenna is ok.
|
||||
instPtr->hwSate.isAntOk = (instPtr->hwSate.antVolt == (VOLT_ANT_PROC_OK | VOLT_ANT_RF_OK | VOLT_ANT_NIL_OK | ANT_STATE_OK))
|
||||
&& (instPtr->hwSate.antPll == (CLK_ANT_BBPLL_LOCK | CLK_ANT_RFPLL1_LOCK | CLK_ANT_RFPLL2_LOCK));
|
||||
// Determine if antenna is ok.
|
||||
instPtr->hwSate.isAntOk = 1U; // FIXME: proper condition is required
|
||||
|
||||
instPtr->hwSate.phyId = instPtr->phyCofig.devId;
|
||||
|
||||
@@ -1176,17 +1058,17 @@ void Phy_RefreshHwSate(PHY_INST *instPtr)
|
||||
*/
|
||||
/*****************************************************************************/
|
||||
/**
|
||||
* @brief Get the last scan beam number after autoscan.
|
||||
* @brief Get the antenna number after physical receive.
|
||||
*
|
||||
* @param instPtr a pointer to physical instance
|
||||
*
|
||||
* @return beam number
|
||||
* @return antenna index
|
||||
*
|
||||
******************************************************************************/
|
||||
uint8_t Phy_LastScanBeamNo(PHY_INST *instPtr)
|
||||
uint8_t Phy_ReceiveAntIndex(PHY_INST *instPtr)
|
||||
{
|
||||
ASSERT(instPtr != NULL);
|
||||
return (uint8_t)PhyRead(instPtr, BEAM_SELECT_INDEX);
|
||||
return (uint8_t)PhyRead(instPtr, ANT_SELECT_INDEX);
|
||||
}
|
||||
|
||||
/*****************************************************************************/
|
||||
@@ -1208,7 +1090,7 @@ double Phy_GetFreqEst(PHY_INST *instPtr)
|
||||
double coarse, fine;
|
||||
|
||||
frameType = Phy_GetLastRecvFrameType(instPtr);
|
||||
if (frameType > L1_1M2BPS_5MS_FRAME || frameType <= L1_NONE_FRAME)
|
||||
if (frameType > L1_FRAME_2MBPS_4MS || frameType <= L1_FRAME_NONE)
|
||||
{
|
||||
return INFINITY; // FIXME
|
||||
}
|
||||
@@ -1218,7 +1100,7 @@ double Phy_GetFreqEst(PHY_INST *instPtr)
|
||||
syncFreqIdx = (coarseReg & COASE_FREQEST_SYNC_MASK) >> COASE_FREQEST_SYNC_SHIFT;
|
||||
fineReg = PhyRead(instPtr, FINE_FREQEST);
|
||||
estAbs = fineReg & FINE_FREQEST_VAL_MASK;
|
||||
if (frameType >= L1_200KBPS_5MS_FRAME)
|
||||
if (frameType >= L1_FRAME_128KBPS_4MS)
|
||||
{
|
||||
// 12M Rc
|
||||
coarse = (double)(8 - acqFreqIdx) * (250e3 / 4);
|
||||
@@ -1259,14 +1141,14 @@ double Phy_GetCoarseFreqEst(PHY_INST *instPtr)
|
||||
double freqEst;
|
||||
|
||||
frameType = Phy_GetLastRecvFrameType(instPtr);
|
||||
if ((frameType > L1_1M2BPS_5MS_FRAME) || (frameType <= L1_NONE_FRAME))
|
||||
if ((frameType > L1_FRAME_2MBPS_4MS) || (frameType <= L1_FRAME_NONE))
|
||||
{
|
||||
return INFINITY; // FIXME
|
||||
}
|
||||
regValue = PhyRead(instPtr, COASE_FREQEST);
|
||||
acqFreqIdx = (regValue & COASE_FREQEST_ACQ_MASK) >> COASE_FREQEST_ACQ_SHIFT;
|
||||
syncFreqIdx = (regValue & COASE_FREQEST_SYNC_MASK) >> COASE_FREQEST_SYNC_SHIFT;
|
||||
if (frameType >= L1_200KBPS_5MS_FRAME)
|
||||
if (frameType >= L1_FRAME_128KBPS_4MS)
|
||||
{
|
||||
// 12M Rc
|
||||
freqEst = (double)(8 - acqFreqIdx) * (250e3 / 4);
|
||||
@@ -1297,14 +1179,14 @@ double Phy_GetFineFreqEst(PHY_INST *instPtr)
|
||||
double freqEst;
|
||||
L1_FRAME_TYPE frameType;
|
||||
frameType = Phy_GetLastRecvFrameType(instPtr);
|
||||
if ((frameType > L1_1M2BPS_5MS_FRAME) || (frameType <= L1_NONE_FRAME))
|
||||
if ((frameType > L1_FRAME_2MBPS_4MS) || (frameType <= L1_FRAME_NONE))
|
||||
{
|
||||
return INFINITY; // FIXME
|
||||
}
|
||||
|
||||
regValue = PhyRead(instPtr, FINE_FREQEST);
|
||||
estAbs = regValue & FINE_FREQEST_VAL_MASK;
|
||||
if ((frameType >= L1_200KBPS_5MS_FRAME))
|
||||
if ((frameType >= L1_FRAME_128KBPS_4MS))
|
||||
{
|
||||
// 12M Rc
|
||||
freqEst = 48e6 / 2048 * ((double)estAbs) / 8192.0;
|
||||
|
||||
@@ -34,24 +34,20 @@
|
||||
* @name PhysicalLayer_Common_Constant
|
||||
* @{
|
||||
*/
|
||||
#define L1_NUM_ANT_NRRW_PATTERN 37U
|
||||
#define L1_INIT_BEAM_NO 0U
|
||||
#define L1_INIT_ANT_WD PHY_ANT_BEAM_120
|
||||
#define L1_ANT_NUM_CH 4U
|
||||
#define L1_ANT_NUM 3U // 1 beam per antenna, and 3 antennas in total
|
||||
#define L1_ANT_CH_NUM 4U // channel number per antenna
|
||||
#define L1_INIT_ANT_IDX 0U
|
||||
|
||||
#define L1_FRAME_NONE_LEN UINT32_MAX // byte
|
||||
#define L1_FRAME_NONE_COMP UINT32_MAX // *10ns(Timer_L)
|
||||
#define L1_FRAME_NONE_HOPS UINT32_MAX
|
||||
#define L1_FRAME_MAX_HOPS 81U
|
||||
#define L1_FRAME_2KBPS_20MS_HOPS 1U
|
||||
#define L1_FRAME_2KBPS_100MS_HOPS 81U
|
||||
#define L1_FRAME_10KBPS_10MS_HOPS 1U
|
||||
#define L1_FRAME_10KBPS_20MS_HOPS 11U
|
||||
#define L1_FRAME_40KBPS_20MS_HOPS 19U
|
||||
#define L1_FRAME_40KBPS_10MS_HOPS 9U
|
||||
#define L1_FRAME_200KBPS_5MS_HOPS 20U
|
||||
#define L1_FRAME_1M2BPS_5MS_HOPS 20U
|
||||
#define PHY_LOG_EXPIRE 40U // 50*5ms
|
||||
#define L1_FRAME_MAX_HOPS 81
|
||||
#define L1_FRAME_ADV_24MS_HOPS 16U // sync 16 ms + data 8 ms, 2000 hops/s
|
||||
#define L1_FRAME_ACK_8MS_HOPS 4U // sync 6 ms + data 2 ms, 2000 hops/s
|
||||
#define L1_FRAME_128KBPS_4MS_HOPS 33U
|
||||
#define L1_FRAME_512KBPS_4MS_HOPS 36U
|
||||
#define L1_FRAME_2MBPS_4MS_HOPS 38U
|
||||
#define PHY_LOG_EXPIRE 50U // number of 2 ms slot
|
||||
/** @} */
|
||||
/***************** Macros (Inline Functions) Definitions *********************/
|
||||
/**************************** Type Definitions *******************************/
|
||||
@@ -60,15 +56,12 @@
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
L1_NONE_FRAME = 0,
|
||||
L1_2KBPS_20MS_FRAME = 1,
|
||||
L1_2KBPS_100MS_FRAME = 2,
|
||||
L1_10KBPS_10MS_FRAME = 3,
|
||||
L1_10KBPS_20MS_FRAME = 4,
|
||||
L1_40KBPS_20MS_FRAME = 5,
|
||||
L1_40KBPS_10MS_FRAME = 6,
|
||||
L1_200KBPS_5MS_FRAME = 7,
|
||||
L1_1M2BPS_5MS_FRAME = 8
|
||||
L1_FRAME_NONE = 0,
|
||||
L1_FRAME_ADV_24MS = 1,
|
||||
L1_FRAME_ACK_8MS = 2,
|
||||
L1_FRAME_128KBPS_4MS = 3, // 128kbps
|
||||
L1_FRAME_512KBPS_4MS = 4, // 512kbps
|
||||
L1_FRAME_2MBPS_4MS = 5 // 2 Mbps
|
||||
} L1_FRAME_TYPE;
|
||||
|
||||
/**
|
||||
@@ -77,58 +70,39 @@ typedef enum
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
/*** Ant Control ***/
|
||||
uint8_t ctrlWord; ///< Antenna control frame head 0xAA\n
|
||||
/// default 0, reserved for further use
|
||||
uint8_t antMode; ///< high 4 bits specified beam mode.\n
|
||||
/// low 4 bits specified power control
|
||||
uint8_t oaxis[2]; ///< off-axis angle range is 0~60 \n
|
||||
/// 0.1 degree each LSB
|
||||
uint8_t raxis[2]; ///< round-axis angle range is 0~360, \n
|
||||
/// 0.1 degree each LSB
|
||||
uint8_t antFreq[2]; ///< 0~3500Mhz, step 1MHz
|
||||
uint8_t trSlect; ///< in single tr mode, 0~63 specified tr channel \n
|
||||
/// in single subarray mode, 0~3 specified the subarray
|
||||
/// ! Only in debug mode!
|
||||
uint8_t antAtt; ///< Antenna attenuation 0~31, 0.5dB each LSB, Only in debug mode
|
||||
uint8_t phase; ///< 0~63, 5.625 degree each LSB, Only in debug mode
|
||||
uint8_t rxtxMode; ///< Only for debug \n
|
||||
/// default 0x00
|
||||
uint8_t calibrMode; ///< 0x00 Normal, 0x01 single tr calibration
|
||||
uint8_t antReserved; ///< reserved for further use
|
||||
/*** Antenna & RF Control ***/
|
||||
uint8_t rfNormComp[L1_ANT_NUM][L1_ANT_CH_NUM];
|
||||
///< Normal mode RF phase compensation, 3 antennas
|
||||
/// and 4 channels each: 0~63, 5.625° step
|
||||
uint8_t rfNormIdpAttn[L1_ANT_NUM][L1_ANT_CH_NUM];
|
||||
///< Normal mode RF attenuation for independent channel:
|
||||
/// 0~30 dB, 1dB step
|
||||
uint8_t rfNormComAttn[L1_ANT_NUM];
|
||||
///< Normal mode RF attenuation for combined channel:
|
||||
/// 0~30 dB, 1dB step
|
||||
struct
|
||||
{
|
||||
uint8_t antMode : 1; /// [0]: Anti-jamming mode control, 1 - enable, 0 - disable
|
||||
/// only one antenna can be selected in anti-jamming mode
|
||||
uint8_t antRx1En : 1; /// [1]: Anti-jamming antenna 1 select, 1 - enable, 0 - disable
|
||||
uint8_t antRx2En : 1; /// [2]: Anti-jamming antenna 2 select, 1 - enable, 0 - disable
|
||||
uint8_t antRx3En : 1; /// [3]: Anti-jamming antenna 3 select, 1 - enable, 0 - disable
|
||||
uint8_t antTx1En : 1; /// [4]: Antenna 1 tx control, 1 - enable, 0 - disable
|
||||
uint8_t antTx2En : 1; /// [5]: Antenna 2 tx control, 1 - enable, 0 - disable
|
||||
uint8_t antTx3En : 1; /// [6]: Antenna 3 tx control, 1 - enable, 0 - disable
|
||||
uint8_t antRsvd : 1; /// [7]: reserved
|
||||
} antControl;
|
||||
|
||||
/*** RF Control ***/
|
||||
uint8_t rfCtrl; ///< [7:4]RF enable: 0-On, 1-Off(Default); [3:0]Work mode: 0(default)
|
||||
uint8_t rfFreq[2]; ///< 0~3500Mhz, step 1MHz
|
||||
uint8_t rfTxMgc; ///< RF MGC control: 0~31, 1dB each LSB
|
||||
uint8_t rf12CalMgc; ///< RF channel 1&2 calibration mgc\n
|
||||
/// [7:4] Channle1 - max 15db, 1dB each LSB \n
|
||||
/// [3:0] Channle2 - max 15db, 1dB each LSB
|
||||
uint8_t rf34CalMgc; ///< RF channel 3&4 calibration mgc\n
|
||||
/// [7:4] Channle3 - max 15db, 1dB each LSB
|
||||
/// [3:0] Channle4 - max 15db, 1dB each LSB
|
||||
uint8_t rcvMgc; ///< Receive channel 1-4 MGC: 0~31, 1dB each LSB
|
||||
uint8_t rfMonitor; ///< Receive monitor, 0-normal, 1-switch to monitor port
|
||||
uint8_t rfReserved0; ///< reserved for further use
|
||||
uint8_t rfReserved1; ///< reserved for further use
|
||||
uint8_t ch0Cal[2];
|
||||
uint8_t ch1Cal[2];
|
||||
uint8_t ch2Cal[2];
|
||||
uint8_t ch3Cal[2];
|
||||
uint8_t rfAntiAttn[L1_ANT_CH_NUM];
|
||||
///< Anti-jamming mode RF attenuation, 4 channels:
|
||||
/// 0~60 dB, 1dB step
|
||||
uint8_t rfFreq[L1_ANT_NUM][2];
|
||||
///< RF synthesizer ping-pong frequency, 3 antennas
|
||||
/// and 2 byte each: 0~600 MHz, step 1MHz, with base
|
||||
/// frequency of 3700 MHz
|
||||
uint8_t rfRsvd; ///< reserved for further use
|
||||
} PHY_ANT_CONFIG;
|
||||
|
||||
/**
|
||||
* @struct PHY_ANT_ANGLE
|
||||
* @brief Describe the PhysicalLayer antenna angle
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint16_t oaxis; ///< off-axis angle range is 0~60
|
||||
/// 0.1 degree each LSB
|
||||
uint16_t raxis; ///< round-axis angle range is 0~360
|
||||
/// 0.1 degree each LSB
|
||||
} PHY_ANT_ANGLE;
|
||||
|
||||
/**
|
||||
* @enum PHY_TIME_WORD_TYPE
|
||||
*/
|
||||
@@ -139,18 +113,6 @@ typedef enum
|
||||
PHY_TIME_WORD_LISTEN_TIMEOUT = 2
|
||||
} PHY_TIME_WORD_TYPE;
|
||||
|
||||
/**
|
||||
* @enum PHY_ANT_BEAM_WIDTH
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
PHY_ANT_BEAM_NONE = 0,
|
||||
PHY_ANT_BEAM_120 = 1,
|
||||
PHY_ANT_BEAM_60 = 2,
|
||||
PHY_ANT_BEAM_25 = 3,
|
||||
PHY_ANT_BEAM_16 = 4
|
||||
} PHY_ANT_BEAM_WIDTH;
|
||||
|
||||
/**
|
||||
* @enum PHY_TOR_TYPE
|
||||
*/
|
||||
@@ -168,8 +130,7 @@ typedef enum
|
||||
{
|
||||
PHY_MODE_NONE = 0,
|
||||
PHY_MODE_LISTEN = 1,
|
||||
PHY_MODE_SCHEDULE = 2,
|
||||
PHY_MODE_PULL = 3
|
||||
PHY_MODE_POLL = 2
|
||||
} PHY_MODE;
|
||||
|
||||
/**
|
||||
@@ -179,10 +140,30 @@ typedef enum
|
||||
{
|
||||
PHY_ANT_MODE_NONE = 0,
|
||||
PHY_ANT_MODE_STANDBY = 1,
|
||||
PHY_ANT_MODE_POWER_LOW = 2,
|
||||
PHY_ANT_MODE_POWER_FULL = 3,
|
||||
PHY_ANT_MODE_NORMAL = 2,
|
||||
PHY_ANT_MODE_ANTI_JAM = 3
|
||||
} PHY_ANT_MODE;
|
||||
|
||||
/**
|
||||
* @enum PHY_ANT_RX_MODE
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
PHY_ANT_RX_MODE_NORMAL = 0,
|
||||
PHY_ANT_RX_MODE_AJ = 1
|
||||
} PHY_ANT_RX_MODE;
|
||||
|
||||
/**
|
||||
* @enum PHY_ANT_INDEX
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
PHY_ANT_INDEX_NONE = 0,
|
||||
PHY_ANT_INDEX_1 = 1,
|
||||
PHY_ANT_INDEX_2 = 2,
|
||||
PHY_ANT_INDEX_3 = 3
|
||||
} PHY_ANT_INDEX;
|
||||
|
||||
/**
|
||||
* @struct PHY_RCD
|
||||
* @brief Physical Layer recode buffer
|
||||
@@ -204,7 +185,6 @@ typedef struct
|
||||
uint32_t txBramId; ///< tx bram ID
|
||||
uint32_t rxBramId; ///< rx bram ID
|
||||
uint32_t antBramId; ///< antenna config bram ID
|
||||
uint32_t antInfoBramId; ///< antenna beam info bram ID
|
||||
uint32_t hwXadcId; ///< hardware xadc device ID
|
||||
uintptr_t baseAddr; ///< Physical layer controller base address
|
||||
#ifndef EMULATION
|
||||
@@ -225,7 +205,6 @@ typedef struct
|
||||
uintptr_t recvDataAddr; ///< receive data bram address
|
||||
uintptr_t sendDataAddr; ///< send data bram address
|
||||
uintptr_t antConfigAddr; ///< antenna config data bram address
|
||||
uintptr_t antInfoAddr; ///< antenna beam info data bram address
|
||||
bool isPhyEn; ///< indicates if physical layer running
|
||||
bool isAcq; ///< indicates if last reception acquisition success
|
||||
bool isFrameSync; ///< indicates if last reception frame sync success
|
||||
@@ -233,8 +212,7 @@ typedef struct
|
||||
bool isValid; ///< indicates if last reception frame data valid (crc check pass)
|
||||
TIME_WORD recvSlotTime; ///< last slot start time stamp
|
||||
TIME_WORD recvFsTime; ///< last frame sync time stamp
|
||||
PHY_RCD beamNo; ///< beam number record
|
||||
PHY_RCD beamWd; ///< beam width record
|
||||
PHY_RCD antIndex; ///< antenna number record
|
||||
PHY_RCD tor; ///< tx rx state record
|
||||
PHY_RCD frameType; ///< frame type record
|
||||
uint32_t sendDataOffset; ///< antenna configuration bram offset (to implement ping-pong data flow)
|
||||
@@ -243,10 +221,9 @@ typedef struct
|
||||
#ifndef EMULATION
|
||||
XAdcPs hwXadc; ///< hardware Xadc instance
|
||||
#endif
|
||||
PHY_ANT_ANGLE antNrrwPattern[L1_NUM_ANT_NRRW_PATTERN]; ///< antenna beam scan pattern
|
||||
HWSTATE hwSate; ///< hardware state log
|
||||
PHYLOG phyLog; ///< physical state log
|
||||
uint32_t lastLogTime; /// physical state log time stamp
|
||||
HWSTATE hwSate; ///< hardware state log
|
||||
PHYLOG phyLog; ///< physical state log
|
||||
uint32_t lastLogTime; /// physical state log time stamp
|
||||
} PHY_INST;
|
||||
|
||||
/************************** Function Prototypes ******************************/
|
||||
@@ -288,7 +265,7 @@ L1_FRAME_TYPE Phy_GetLastSendFrameType(PHY_INST *instPtr);
|
||||
* @defgroup PhysicalLayer_Receive_Estimations
|
||||
* @{
|
||||
*/
|
||||
uint8_t Phy_LastScanBeamNo(PHY_INST *instPtr);
|
||||
uint8_t Phy_ReceiveAntIndex(PHY_INST *instPtr);
|
||||
double Phy_GetFreqEst(PHY_INST *instPtr);
|
||||
double Phy_GetCoarseFreqEst(PHY_INST *instPtr);
|
||||
double Phy_GetFineFreqEst(PHY_INST *instPtr);
|
||||
@@ -303,11 +280,11 @@ void Phy_GetLastReceivedSlotStartTimeStamp(PHY_INST *instPtr, TIME_WORD *slotSta
|
||||
* @{
|
||||
*/
|
||||
void Phy_AntConfigInit(PHY_ANT_CONFIG *antConfig);
|
||||
void Phy_AntConfigMode(PHY_INST *instPtr, PHY_ANT_MODE mode);
|
||||
void Phy_SetBeamTable(PHY_INST *instPtr, PHY_ANT_ANGLE *table, uint32_t offset);
|
||||
int32_t Phy_SetBeamWidth(PHY_INST *instPtr, PHY_ANT_BEAM_WIDTH beamWidth);
|
||||
int32_t Phy_SetBeamNo(PHY_INST *instPtr, size_t beamNo, PHY_ANT_BEAM_WIDTH beamWidth);
|
||||
int32_t Phy_SetBeamAngle(PHY_INST *phyInstPtr, double offAx, double rndAx);
|
||||
void Phy_SetTxAntIndex(PHY_INST *instPtr, PHY_ANT_INDEX antIndex);
|
||||
void Phy_SetRxAntIndex(PHY_INST *instPtr, PHY_ANT_INDEX antRxIndex);
|
||||
void Phy_SetRxMode(PHY_INST *instPtr, PHY_ANT_RX_MODE antRxMode);
|
||||
int32_t Phy_SetAntIndex(PHY_INST *instPtr, PHY_ANT_INDEX antIndex);
|
||||
size_t Phy_GetNextAntIndex(PHY_INST *instPtr);
|
||||
/** @} PhysicalLayer_AntennaControl*/
|
||||
|
||||
#endif // PHY_CTRL_H_
|
||||
|
||||
@@ -48,8 +48,7 @@
|
||||
#define PHY_MAIN_CTRL_EN_DSBL 0x00000000U
|
||||
#define PHY_MAIN_CTRL_MODE_NONE 0x00000000U
|
||||
#define PHY_MAIN_CTRL_MODE_LISTEN 0x00000100U
|
||||
#define PHY_MAIN_CTRL_MODE_SCHEDULE 0x00000200U
|
||||
#define PHY_MAIN_CTRL_MODE_PULL 0x00000300U
|
||||
#define PHY_MAIN_CTRL_MODE_POLL 0x00000200U
|
||||
|
||||
/**
|
||||
* Register: TXRX_CTRL
|
||||
@@ -70,14 +69,11 @@
|
||||
#define PHY_MODE_CTRL_TOR_RX 0x00000002U
|
||||
|
||||
#define PHY_MODE_CTRL_FRAME_NONE 0x00000000U
|
||||
#define PHY_MODE_CTRL_FRAME_2KBPS_20MS 0x00000100U
|
||||
#define PHY_MODE_CTRL_FRAME_2KBPS_100MS 0x00000200U
|
||||
#define PHY_MODE_CTRL_FRAME_10KBPS_10MS 0x00000300U // Initial Scan Frame
|
||||
#define PHY_MODE_CTRL_FRAME_10KBPS_20MS 0x00000400U // Benchmark Frame
|
||||
#define PHY_MODE_CTRL_FRAME_40KBPS_20MS 0x00000500U
|
||||
#define PHY_MODE_CTRL_FRAME_40KBPS_10MS 0x00000600U
|
||||
#define PHY_MODE_CTRL_FRAME_200KBPS_5MS 0x00000700U // 2-Way ACQ Frame, Management Frame, Service Frame
|
||||
#define PHY_MODE_CTRL_FRAME_1M2BPS_5MS 0x00000800U // Bistatic Synthetic Aperture Radar Frame
|
||||
#define PHY_MODE_CTRL_FRAME_ADV_24MS 0x00000100U
|
||||
#define PHY_MODE_CTRL_FRAME_ACK_8MS 0x00000200U
|
||||
#define PHY_MODE_CTRL_FRAME_128KBPS_4MS 0x00000300U
|
||||
#define PHY_MODE_CTRL_FRAME_512KBPS_4MS 0x00000400U
|
||||
#define PHY_MODE_CTRL_FRAME_2MBPS_4MS 0x00000500U
|
||||
|
||||
#define PHY_MODE_CTRL_CRC_EN 0x00010000U
|
||||
#define PHY_MODE_CTRL_CRC_DSBL 0x00000000U
|
||||
@@ -236,14 +232,11 @@
|
||||
#define COASE_TYPE_SHIFT 16
|
||||
#define COASE_TYPE_WIDTH 8
|
||||
#define COASE_TYPE_MASK 0x00FF0000U
|
||||
#define COASE_TYPE_2KBPS_20MS 0x00010000U
|
||||
#define COASE_TYPE_2KBPS_100MS 0x00020000U
|
||||
#define COASE_TYPE_10KBPS_10MS 0x00030000U
|
||||
#define COASE_TYPE_10KBPS_20MS 0x00040000U
|
||||
#define COASE_TYPE_40KBPS_20MS 0x00050000U
|
||||
#define COASE_TYPE_40KBPS_10MS 0x00060000U
|
||||
#define COASE_TYPE_200KBPS_5MS 0x00070000U
|
||||
#define COASE_TYPE_1M2BPS_5MS 0x00080000U
|
||||
#define COASE_TYPE_ADV_24MS 0x00010000U
|
||||
#define COASE_TYPE_ACK_8MS 0x00020000U
|
||||
#define COASE_TYPE_128KBPS_4MS 0x00030000U
|
||||
#define COASE_TYPE_512KBPS_4MS 0x00040000U
|
||||
#define COASE_TYPE_2MBPS_4MS 0x00050000U
|
||||
|
||||
/**
|
||||
* Register: FINE_FREQEST
|
||||
@@ -259,103 +252,115 @@
|
||||
#define FINE_FREQEST_SIGN_NEG 0x01000000U
|
||||
|
||||
/**
|
||||
* Register: BEAM_SELECT
|
||||
* Register: ANT_SELECT
|
||||
*/
|
||||
#define BEAM_SELECT_INDEX 0x00000044U
|
||||
#define BEAM_SELECT_INDEX_SHIFT 0
|
||||
#define BEAM_SELECT_INDEX_WIDTH 32
|
||||
#define BEAM_SELECT_INDEX_MASK 0xFFFFFFFFU
|
||||
#define ANT_SELECT_INDEX 0x00000044U
|
||||
#define ANT_SELECT_INDEX_SHIFT 0
|
||||
#define ANT_SELECT_INDEX_WIDTH 32
|
||||
#define ANT_SELECT_INDEX_MASK 0xFFFFFFFFU
|
||||
|
||||
/**
|
||||
* Register: BEAM_AXIS
|
||||
* Register: ANT_STATUS_1
|
||||
*/
|
||||
#define BEAM_AXIS 0x00000044U
|
||||
#define BEAM_AXIS_EL_SHIFT 0
|
||||
#define BEAM_AXIS_EL_WIDTH 16
|
||||
#define BEAM_AXIS_EL_MASK 0x0000FFFFU
|
||||
#define BEAM_AXIS_AZ_SHIFT 16
|
||||
#define BEAM_AXIS_AZ_WIDTH 16
|
||||
#define BEAM_AXIS_AZ_MASK 0xFFFF0000U
|
||||
#define ANT_STATUS_1 0x00000100U
|
||||
|
||||
#define ANT_STATUS_1_ANT1_STATUS_SHIFT 0
|
||||
#define ANT_STATUS_1_ANT1_STATUS_WIDTH 16
|
||||
#define ANT_STATUS_1_ANT1_STATUS_MASK 0x0000FFFFU
|
||||
|
||||
#define ANT_STATUS_1_ANT1_FREQ_SHIFT 0
|
||||
#define ANT_STATUS_1_ANT1_FREQ_WIDTH 15
|
||||
#define ANT_STATUS_1_ANT1_FREQ_MASK 0x00003FFFU
|
||||
|
||||
#define ANT_STATUS_1_ANT1_PLL_SHIFT 15
|
||||
#define ANT_STATUS_1_ANT1_PLL_WIDTH 1
|
||||
#define ANT_STATUS_1_ANT1_PLL_MASK 0x00008000U
|
||||
|
||||
#define ANT_STATUS_1_ANT2_STATUS_SHIFT 16
|
||||
#define ANT_STATUS_1_ANT2_STATUS_WIDTH 16
|
||||
#define ANT_STATUS_1_ANT2_STATUS_MASK 0x0000FFFFU
|
||||
|
||||
#define ANT_STATUS_1_ANT2_FREQ_SHIFT 16
|
||||
#define ANT_STATUS_1_ANT2_FREQ_WIDTH 15
|
||||
#define ANT_STATUS_1_ANT2_FREQ_MASK 0x3FFF0000U
|
||||
|
||||
#define ANT_STATUS_1_ANT2_PLL_SHIFT 31
|
||||
#define ANT_STATUS_1_ANT2_PLL_WIDTH 1
|
||||
#define ANT_STATUS_1_ANT2_PLL_MASK 0x80000000U
|
||||
|
||||
/**
|
||||
* Register: ANT_STATUS
|
||||
* Register: ANT_STATUS_2
|
||||
*/
|
||||
#define ANT_STATUS 0x00000100U
|
||||
#define ANT_STATUS_ANT_VOLT_SHIFT 0
|
||||
#define ANT_STATUS_ANT_VOLT_WIDTH 8
|
||||
#define ANT_STATUS_ANT_VOLT_MASK 0x000000FFU
|
||||
#define ANT_STATUS_ANT_VOLT_OK 0x00000001U
|
||||
#define ANT_STATUS_2 0x00000104U
|
||||
|
||||
#define ANT_STATUS_RF_VOLT_SHIFT 8
|
||||
#define ANT_STATUS_RF_VOLT_WIDTH 8
|
||||
#define ANT_STATUS_RF_VOLT_MASK 0x0000FF00U
|
||||
#define ANT_STATUS_RF_VOLT_OK 0x00000100U
|
||||
#define ANT_STATUS_2_ANT3_STATUS_SHIFT 0
|
||||
#define ANT_STATUS_2_ANT3_STATUS_WIDTH 16
|
||||
#define ANT_STATUS_2_ANT3_STATUS_MASK 0x0000FFFFU
|
||||
|
||||
#define ANT_STATUS_NIL_VOLT_SHIFT 16
|
||||
#define ANT_STATUS_NIL_VOLT_WIDTH 8
|
||||
#define ANT_STATUS_NIL_VOLT_MASK 0x00FF0000U
|
||||
#define ANT_STATUS_NIL_VOLT_OK 0x00010000U
|
||||
#define ANT_STATUS_2_ANT3_FREQ_SHIFT 0
|
||||
#define ANT_STATUS_2_ANT3_FREQ_WIDTH 15
|
||||
#define ANT_STATUS_2_ANT3_FREQ_MASK 0x00003FFFU
|
||||
|
||||
#define ANT_STATUS_CODE_SHIFT 24
|
||||
#define ANT_STATUS_CODE_WIDTH 8
|
||||
#define ANT_STATUS_CODE_MASK 0xFF000000U
|
||||
#define ANT_STATUS_CODE_OK 0x00000000U
|
||||
#define ANT_STATUS_2_ANT3_PLL_SHIFT 15
|
||||
#define ANT_STATUS_2_ANT3_PLL_WIDTH 1
|
||||
#define ANT_STATUS_2_ANT3_PLL_MASK 0x00008000U
|
||||
|
||||
#define ANT_STATUS_2_PLL_LK_SHIFT 16
|
||||
#define ANT_STATUS_2_PLL_LK_WIDTH 8
|
||||
#define ANT_STATUS_2_PLL_LK_MASK 0x00FF0000U
|
||||
|
||||
#define ANT_STATUS_2_ANT3_PLL2_LK_SHIFT 16
|
||||
#define ANT_STATUS_2_ANT3_PLL2_LK_WIDTH 1
|
||||
#define ANT_STATUS_2_ANT3_PLL2_LK_MASK 0x00010000U
|
||||
|
||||
#define ANT_STATUS_2_ANT3_PLL1_LK_SHIFT 17
|
||||
#define ANT_STATUS_2_ANT3_PLL1_LK_WIDTH 1
|
||||
#define ANT_STATUS_2_ANT3_PLL1_LK_MASK 0x00020000U
|
||||
|
||||
#define ANT_STATUS_2_ANT2_PLL2_LK_SHIFT 18
|
||||
#define ANT_STATUS_2_ANT2_PLL2_LK_WIDTH 1
|
||||
#define ANT_STATUS_2_ANT2_PLL2_LK_MASK 0x00040000U
|
||||
|
||||
#define ANT_STATUS_2_ANT2_PLL1_LK_SHIFT 19
|
||||
#define ANT_STATUS_2_ANT2_PLL1_LK_WIDTH 1
|
||||
#define ANT_STATUS_2_ANT2_PLL1_LK_MASK 0x00080000U
|
||||
|
||||
#define ANT_STATUS_2_ANT1_PLL2_LK_SHIFT 20
|
||||
#define ANT_STATUS_2_ANT1_PLL2_LK_WIDTH 1
|
||||
#define ANT_STATUS_2_ANT1_PLL2_LK_MASK 0x00100000U
|
||||
|
||||
#define ANT_STATUS_2_ANT1_PLL1_LK_SHIFT 21
|
||||
#define ANT_STATUS_2_ANT1_PLL1_LK_WIDTH 1
|
||||
#define ANT_STATUS_2_ANT1_PLL1_LK_MASK 0x00200000U
|
||||
|
||||
#define ANT_STATUS_2_MODE_SHIFT 24
|
||||
#define ANT_STATUS_2_MODE_WIDTH 8
|
||||
#define ANT_STATUS_2_MODE_MASK 0xFF000000U
|
||||
|
||||
#define ANT_STATUS_2_ANT1_MODE_SHIFT 24
|
||||
#define ANT_STATUS_2_ANT1_MODE_WIDTH 1
|
||||
#define ANT_STATUS_2_ANT1_MODE_MASK 0x01000000U
|
||||
|
||||
#define ANT_STATUS_2_ANT2_MODE_SHIFT 25
|
||||
#define ANT_STATUS_2_ANT2_MODE_WIDTH 1
|
||||
#define ANT_STATUS_2_ANT2_MODE_MASK 0x02000000U
|
||||
|
||||
#define ANT_STATUS_2_ANT3_MODE_SHIFT 26
|
||||
#define ANT_STATUS_2_ANT3_MODE_WIDTH 1
|
||||
#define ANT_STATUS_2_ANT3_MODE_MASK 0x04000000U
|
||||
|
||||
/**
|
||||
* Register: ANT_FRAME_CNT
|
||||
* Register: ANT_STATUS_TEMP
|
||||
*/
|
||||
#define ANT_FRAME_CNT 0x00000104U
|
||||
#define ANT_FRAME_CNT_SHIFT 0
|
||||
#define ANT_FRAME_CNT_WIDTH 32
|
||||
#define ANT_FRAME_CNT_MASK 0xFFFFFFFFU
|
||||
#define ANT_STATUS_TEMP 0x00000108U
|
||||
|
||||
/**
|
||||
* Register: ANT_RF_STATUS
|
||||
*/
|
||||
#define ANT_RF_STATUS 0x00000108U
|
||||
#define ANT_RF_STATUS_TEMP_SHIFT 0
|
||||
#define ANT_RF_STATUS_TEMP_WIDTH 8
|
||||
#define ANT_RF_STATUS_TEMP_MASK 0x000000FFU
|
||||
#define ANT_STATUS_TEMP_SHIFT 0
|
||||
#define ANT_STATUS_TEMP_WIDTH 8
|
||||
#define ANT_STATUS_TEMP_MASK 0x000000FFU
|
||||
|
||||
#define ANT_RF_STATUS_BBLOCK_SHIFT 8
|
||||
#define ANT_RF_STATUS_BBLOCK_WIDTH 8
|
||||
#define ANT_RF_STATUS_BBLOCK_MASK 0x0000FF00U
|
||||
#define ANT_RF_STATUS_BBLOCK_OK 0x00000100U
|
||||
|
||||
#define ANT_RF_STATUS_PLLA_SHIFT 16
|
||||
#define ANT_RF_STATUS_PLLA_WIDTH 8
|
||||
#define ANT_RF_STATUS_PLLA_MASK 0x00FF0000U
|
||||
#define ANT_RF_STATUS_PLLA_OK 0x00010000U
|
||||
|
||||
#define ANT_RF_STATUS_PLLB_SHIFT 24
|
||||
#define ANT_RF_STATUS_PLLB_WIDTH 8
|
||||
#define ANT_RF_STATUS_PLLB_MASK 0xFF000000U
|
||||
#define ANT_RF_STATUS_PLLB_OK 0x01000000U
|
||||
|
||||
/**
|
||||
* Register: ANT_RF_MGC
|
||||
*/
|
||||
#define ANT_RF_MGC 0x0000010CU
|
||||
#define ANT_RF_MGC_CH1_SHIFT 0
|
||||
#define ANT_RF_MGC_CH1_WIDTH 4
|
||||
#define ANT_RF_MGC_CH1_MASK 0x0000000FU
|
||||
#define ANT_RF_MGC_CH2_SHIFT 8
|
||||
#define ANT_RF_MGC_CH2_WIDTH 4
|
||||
#define ANT_RF_MGC_CH2_MASK 0x00000F00U
|
||||
#define ANT_RF_MGC_CH3_SHIFT 16
|
||||
#define ANT_RF_MGC_CH3_WIDTH 4
|
||||
#define ANT_RF_MGC_CH3_MASK 0x000F0000U
|
||||
#define ANT_RF_MGC_CH4_SHIFT 24
|
||||
#define ANT_RF_MGC_CH4_WIDTH 4
|
||||
#define ANT_RF_MGC_CH4_MASK 0x0F000000U
|
||||
|
||||
/**
|
||||
* Register: ANT_RF_FRAME_CNT
|
||||
*/
|
||||
#define ANT_RF_FRAME_CNT 0x00000110U
|
||||
#define ANT_RF_FRAME_CNT_SHIFT 0
|
||||
#define ANT_RF_FRAME_CNT_WIDTH 32
|
||||
#define ANT_RF_FRAME_CNT_MASK 0xFFFFFFFFU
|
||||
#define ANT_STATUS_TEMP_RSVD_SHIFT 8
|
||||
#define ANT_STATUS_TEMP_RSVD_WIDTH 8
|
||||
#define ANT_STATUS_TEMP_RSVD_MASK 0x0000FF00U
|
||||
|
||||
/**
|
||||
* Register: PHY_ACQ_CNT
|
||||
|
||||
@@ -141,16 +141,22 @@ typedef struct __attribute__((packed))
|
||||
uint8_t cxnStatus; ///< current connection status
|
||||
uint8_t linkStage; ///< current linklayer working stage
|
||||
uint32_t recxnCnt; ///< reconnect trial count
|
||||
uint8_t beamNo; ///< current working beam number
|
||||
uint8_t beamWidth; ///< current working beam width
|
||||
uint16_t beamAz; ///< current working beam angle Az
|
||||
uint16_t beamEl; ///< current working beam angle Ez
|
||||
uint8_t antIndex; ///< current working antenna index
|
||||
uint16_t advTxCnt; ///< adv frame send count
|
||||
uint16_t advRecvCnt; ///< adv frame received count
|
||||
uint16_t advCorrectCnt; ///< adv frame received correctly count
|
||||
uint32_t cfmTxCnt; ///< cfm frame send count
|
||||
uint32_t cfmRecvCnt; ///< cfm frame received count
|
||||
uint32_t cfmCorrectCnt; ///< adv frame received correctly count
|
||||
uint32_t ackTxCnt; ///< ack frame send count
|
||||
uint32_t ackRecvCnt; ///< ack frame received count
|
||||
uint32_t ackCorrectCnt; ///< ack frame received correctly count
|
||||
uint32_t disTxCnt; ///< dist frame send count
|
||||
uint32_t disRecvCnt; ///< dist frame received count
|
||||
uint32_t disCorrectCnt;///< dist frame received correctly count
|
||||
uint32_t mngTxCnt; ///< mng frame send count
|
||||
uint32_t mngRecvCnt; ///< mng frame received count
|
||||
uint32_t mngCorrectCnt; ///< mng frame received correctly count
|
||||
uint32_t rttTxCnt; ///< rtt frame send count
|
||||
uint32_t rttRecvCnt; ///< rtt frame received count
|
||||
uint32_t rttCorrectCnt; ///< rtt frame received correctly count
|
||||
uint32_t svcTxCnt; ///< svc frame send count
|
||||
uint32_t svcRecvCnt; ///< svc frame received count
|
||||
uint32_t svcCorrectCnt; ///< svc frame received correctly count
|
||||
@@ -178,7 +184,7 @@ typedef struct __attribute__((packed))
|
||||
double fsyncPAPR; ///< last frame sync peak-average ration
|
||||
uint8_t fsyncFreqCh; ///< last frame sync frequency estimation
|
||||
uint16_t deintlvAmpEst; ///< de-interleave amplitude estimation
|
||||
uint8_t antMode; ///< current antenna working mode
|
||||
uint8_t antControl; ///< current antenna rf mode
|
||||
uint8_t reserve[3]; ///< reserved data
|
||||
} PHYLOG;
|
||||
|
||||
@@ -198,11 +204,13 @@ typedef struct __attribute__((packed))
|
||||
int8_t spAdTemp_1; ///< Signal processor adc1 temperature
|
||||
int8_t spFpgaTemp; ///< Signal processor FPGA temperature
|
||||
// -- Antenna status
|
||||
uint8_t antVolt; ///< Antenna voltage state indicator
|
||||
int8_t antTemp; ///< Antenna rf temperature
|
||||
uint8_t antPll; ///< Antenna rf lock state indicator
|
||||
uint8_t antMgc0; ///< Antenna rf mgc0~1 indicator
|
||||
uint8_t antMgc1; ///< Antenna rf mgc2~3 indicator
|
||||
uint16_t ant1Freq; ///< Antenna 1 frequency
|
||||
uint16_t ant2Freq; ///< Antenna 2 frequency
|
||||
uint16_t ant3Freq; ///< Antenna 3 frequency
|
||||
uint8_t antPll; ///< Antenna pll lock state indicator
|
||||
uint8_t antMode; ///< Antenna mode indicator
|
||||
int8_t antTemp; ///< Antenna rf temperature
|
||||
uint8_t antRsvd; ///< Antenna reserved status register
|
||||
uint8_t phyId;
|
||||
uint8_t reserve[1];
|
||||
} HWSTATE;
|
||||
|
||||
@@ -310,40 +310,40 @@ static int32_t SystemBus_SystemConfig(SYSBUS *instPtr, uint8_t *msg)
|
||||
return EPARAM;
|
||||
}
|
||||
|
||||
if (msg[WD_EN_CMD] == EN_CMD_ON_HIGH_POWER)
|
||||
{
|
||||
// full power config
|
||||
Phy_AntConfigMode(phyRef, PHY_ANT_MODE_POWER_FULL);
|
||||
if (reconfig || !L2_isStarted(linkInstPtr))
|
||||
{
|
||||
Linklayer_Reconfig(linkInstPtr, &linkConfig);
|
||||
}
|
||||
Linklayer_Start(linkInstPtr);
|
||||
}
|
||||
else if (msg[WD_EN_CMD] == EN_CMD_ON_LOW_POWER)
|
||||
{
|
||||
// low power config
|
||||
Phy_AntConfigMode(phyRef, PHY_ANT_MODE_POWER_LOW);
|
||||
if (reconfig || !L2_isStarted(linkInstPtr))
|
||||
{
|
||||
Linklayer_Reconfig(linkInstPtr, &linkConfig);
|
||||
}
|
||||
Linklayer_Start(linkInstPtr);
|
||||
}
|
||||
else if (msg[WD_EN_CMD] == EN_CMD_SILENT)
|
||||
{
|
||||
// silence config
|
||||
// TODO: better approach?
|
||||
Linklayer_Halt(linkInstPtr);
|
||||
Phy_AntConfigMode(phyRef, PHY_ANT_MODE_STANDBY);
|
||||
TIME_WORD pullTime = {0, 0};
|
||||
pullTime.int_part = TimeCtrl_GetIntCnt(tmcRef) + 1;
|
||||
if (Phy_SetTimeWord(phyRef, &pullTime, PHY_TIME_WORD_POLL) != SUCCESS)
|
||||
{
|
||||
DBG_ERROR("Physical set pull time failed.\n");
|
||||
}
|
||||
Phy_SetupNextSlot(phyRef, PHY_TOR_RX, L1_10KBPS_10MS_FRAME, NULL);
|
||||
}
|
||||
// if (msg[WD_EN_CMD] == EN_CMD_ON_HIGH_POWER)
|
||||
// {
|
||||
// // full power config
|
||||
// Phy_AntConfigMode(phyRef, PHY_ANT_MODE_POWER_FULL);
|
||||
// if (reconfig || !L2_isStarted(linkInstPtr))
|
||||
// {
|
||||
// Linklayer_Reconfig(linkInstPtr, &linkConfig);
|
||||
// }
|
||||
// Linklayer_Start(linkInstPtr);
|
||||
// }
|
||||
// else if (msg[WD_EN_CMD] == EN_CMD_ON_LOW_POWER)
|
||||
// {
|
||||
// // low power config
|
||||
// Phy_AntConfigMode(phyRef, PHY_ANT_MODE_POWER_LOW);
|
||||
// if (reconfig || !L2_isStarted(linkInstPtr))
|
||||
// {
|
||||
// Linklayer_Reconfig(linkInstPtr, &linkConfig);
|
||||
// }
|
||||
// Linklayer_Start(linkInstPtr);
|
||||
// }
|
||||
// else if (msg[WD_EN_CMD] == EN_CMD_SILENT)
|
||||
// {
|
||||
// // silence config
|
||||
// // TODO: better approach?
|
||||
// Linklayer_Halt(linkInstPtr);
|
||||
// Phy_AntConfigMode(phyRef, PHY_ANT_MODE_STANDBY);
|
||||
// TIME_WORD pullTime = {0, 0};
|
||||
// pullTime.int_part = TimeCtrl_GetIntCnt(tmcRef) + 1;
|
||||
// if (Phy_SetTimeWord(phyRef, &pullTime, PHY_TIME_WORD_POLL) != SUCCESS)
|
||||
// {
|
||||
// DBG_ERROR("Physical set pull time failed.\n");
|
||||
// }
|
||||
// Phy_SetupNextSlot(phyRef, PHY_TOR_RX, L1_10KBPS_10MS_FRAME, NULL);
|
||||
// }
|
||||
else
|
||||
{
|
||||
// Ignore current command
|
||||
@@ -777,4 +777,4 @@ int32_t SystemBus_RxIntrHandler(SYSBUS *instPtr)
|
||||
return SUCCESS;
|
||||
}
|
||||
|
||||
/** @} SystemBus*/
|
||||
/** @} SystemBus*/
|
||||
|
||||
@@ -146,7 +146,7 @@ void TimeCtrl_ResetLow(TMC_INST *instPtr)
|
||||
|
||||
/*****************************************************************************/
|
||||
/**
|
||||
* @brief Get current time integer value.
|
||||
* @brief Get current time integer value (2 ms counter).
|
||||
*
|
||||
* @param instPtr a pointer to time controller instance
|
||||
*
|
||||
|
||||
@@ -21,7 +21,7 @@
|
||||
/***************************** Include Files *********************************/
|
||||
#include <stdint.h>
|
||||
/************************** Constant Definitions *****************************/
|
||||
#define TIME_FRAC_MAX 500000 // how many 10ns in a 5ms
|
||||
#define TIME_FRAC_MAX 200000 // how many 10ns in a 2 ms
|
||||
/***************** Macros (Inline Functions) Definitions *********************/
|
||||
/**************************** Type Definitions *******************************/
|
||||
/**
|
||||
@@ -44,8 +44,8 @@ typedef uint32_t TIME_INT;
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
TIME_INT int_part; ///< 5ms each LSB
|
||||
TIME_FRAC frac_part; ///< 10ns each LSB
|
||||
TIME_INT int_part; ///< 2 ms each LSB
|
||||
TIME_FRAC frac_part; ///< 10 ns each LSB
|
||||
} TIME_WORD;
|
||||
|
||||
/**
|
||||
|
||||
@@ -228,7 +228,7 @@ TEST(linklayer_master_routine)
|
||||
|
||||
if (L2_isDataAvail(linkInstPtr))
|
||||
{
|
||||
if (L2_GetLastOptFrameType(linkInstPtr) == L2_CFM_FRAME)
|
||||
if (L2_GetLastFrameType(linkInstPtr) == L2_CFM_FRAME)
|
||||
{
|
||||
ASSERT_EQUAL(1, L2_GetNodeListLen(linkInstPtr->nodeList));
|
||||
ASSERT_TRUE(L2_isNodeInList(linkInstPtr->nodeList, 2));
|
||||
|
||||
Reference in New Issue
Block a user