add noise data; modify duifei hmc7044 config

after days of ad9361 noise analysis with multiple borad, it turns out that the ad9361 RxFir can significantly reduce max noise level, with which the interference-to-noise ratio can be greatlt improved, and the nulling algotirhm can finally work properly; another experiment is about duifei multi rx channel phase-amplitude consistence, for which the rx external lo of ad9361 is enabled, but extra phase compensation is needed because the trace length of external lo is not matched

projects/duifei/duifei_cal_coarse/project/project.sdk/duifei_cmos_48m/src/dev_profile/hmc7044_profile.c

@@ -13,7 +13,7 @@ static spi_init_param hmc7044_spi_init_param = {
 };
 
 // hmc7044 channel specifications
-struct hmc7044_chan_spec hmc7044_chan_spec[3] = {
+struct hmc7044_chan_spec hmc7044_chan_spec[4] = {
 	/* AD9361_XTAL */
 	{
 		.disable = 0,
@@ -62,6 +62,22 @@ struct hmc7044_chan_spec hmc7044_chan_spec[3] = {
 		.driver_impedance = INTERNAL_100OHM_PER_PIN,
 		.out_mux_mode = CHANNEL_DIV
 	},
+	/* FPGA_DAC_LOGIC_CLK */
+	{
+		.disable = 0,
+		.num = 4,
+		.divider = 10,
+		.coarse_delay = 0,
+		.fine_delay = 0,
+		.high_performance_mode_dis = true,
+		.start_up_mode_dynamic_enable = false,
+		.dynamic_driver_enable = false,
+		.output_control0_rb4_enable = true,
+		.force_mute_enable = false,
+		.driver_mode = CML,
+		.driver_impedance = INTERNAL_100OHM_PER_PIN,
+		.out_mux_mode = CHANNEL_DIV
+	},
 };
 
 // hmc7044 default configurations
@@ -91,7 +107,7 @@ struct hmc7044_init_param hmc7044_default_init_param = {
 			GPO_DISABLE,
 			GPO_DISABLE
 	},
-	.num_channels = 3,
+	.num_channels = 4,
 	.pll1_ref_prio_ctrl = 0xE4,
 	.sync_pin_mode = SYNC_MULTICHIP,
 	.high_performance_mode_clock_dist_en = false,