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correct dl814_k7 top port spelling; dj & k7 tested

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josh
2023-03-19 21:05:35 +08:00
parent a8292e95be
commit 2aea08b0a9
5 changed files with 6 additions and 8 deletions
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projects/datalink_814/dl814_dj/project/dl814_dj/dl814_dj.tcl
+3 -4
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@@ -3,7 +3,7 @@
#
# dl814_dj.tcl: Tcl script for re-creating project 'dl814_dj'
#
# Generated by Vivado on Sun Mar 19 19:18:37 +0800 2023
# Generated by Vivado on Sun Mar 19 20:10:54 +0800 2023
# IP Build 2633630 on Wed Sep 4 12:30:14 MDT 2019
#
# This file contains the Vivado Tcl commands for re-creating the project to the state*
@@ -41,8 +41,8 @@
# "D:/vivado-git/projects/datalink_814/dl814_dj/ipi-bds/system_bd/hdl/system_bd_wrapper.v"
# "D:/vivado-git/projects/datalink_814/dl814_dj/rtl/tx_qpsk.v"
# "D:/vivado-git/projects/datalink_814/dl814_dj/rtl/system_top.v"
# "d:/vivado-git/projects/datalink_814/dl814_dj/ip/coe/hrc_64_12_025.coe"
# "d:/vivado-git/projects/datalink_814/dl814_dj/ip/coe/sweep_freq.coe"
# "D:/vivado-git/projects/datalink_814/dl814_dj/ip/coe/hrc_64_12_025.coe"
# "D:/vivado-git/projects/datalink_814/dl814_dj/ip/coe/sweep_freq.coe"
# "D:/vivado-git/projects/datalink_814/dl814_dj/constraints/z7100_ad9528_ad9371.xdc"
#
#*****************************************************************************************
@@ -154,7 +154,6 @@ set_property -name "webtalk.modelsim_export_sim" -value "19" -objects $obj
set_property -name "webtalk.questa_export_sim" -value "19" -objects $obj
set_property -name "webtalk.riviera_export_sim" -value "19" -objects $obj
set_property -name "webtalk.vcs_export_sim" -value "19" -objects $obj
set_property -name "webtalk.xcelium_export_sim" -value "10" -objects $obj
set_property -name "webtalk.xsim_export_sim" -value "19" -objects $obj
set_property -name "xpm_libraries" -value "XPM_CDC XPM_FIFO XPM_MEMORY" -objects $obj