Archived
modify project dir structure
all three modules are modified, dl814_k7 projects are modified, .gitignore is modified, README needs to update
This commit is contained in:
+10
-9
@@ -3,35 +3,36 @@ version:1
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70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:626173656469616c6f675f6f6b:3137:00:00
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||||
70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:636d646d73676469616c6f675f6f6b:31:00:00
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||||
70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:636d646d73676469616c6f675f6f70656e5f6d657373616765735f76696577:31:00:00
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||||
70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:636f6d6d616e6473696e7075745f747970655f74636c5f636f6d6d616e645f68657265:31:00:00
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||||
70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:636f6d6d616e6473696e7075745f747970655f74636c5f636f6d6d616e645f68657265:32:00:00
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||||
70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:636f7265747265657461626c6570616e656c5f636f72655f747265655f7461626c65:37:00:00
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||||
70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:65787072756e6d656e755f72657365745f616e645f67656e65726174655f6f75747075745f70726f6475637473:32:00:00
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||||
70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:65787072756e7472656570616e656c5f6578705f72756e5f747265655f7461626c65:3139:00:00
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||||
70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:66696c6573657470616e656c5f66696c655f7365745f70616e656c5f74726565:3934:00:00
|
||||
70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:67657474696e6773746172746564766965775f6d616e6167655f6970:33:00:00
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||||
70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:66696c6573657470616e656c5f66696c655f7365745f70616e656c5f74726565:3938:00:00
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||||
70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:67657474696e6773746172746564766965775f6d616e6167655f6970:34:00:00
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||||
70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:67657474696e6773746172746564766965775f6f70656e5f70726f6a656374:32:00:00
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||||
70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:67657474696e6773746172746564766965775f73746172745f7573696e675f76697661646f5f776974685f69705f636174616c6f67:31:00:00
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||||
70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:6861636763636f6566696c657769646765745f62726f777365:33:00:00
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||||
70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:68706f7075707469746c655f636c6f7365:31:00:00
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70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:6d61696e6d656e756d67725f65646974:32:00:00
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70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:6d61696e6d656e756d67725f6578706f7274:32:00:00
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70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:6d61696e6d656e756d67725f66696c65:34:00:00
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70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:6d61696e6d656e756d67725f6970:32:00:00
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70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:6d61696e6d656e756d67725f66696c65:36:00:00
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70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:6d61696e6d656e756d67725f6970:33:00:00
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70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:6d61696e6d656e756d67725f70726f6a656374:31:00:00
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70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:6d61696e6d656e756d67725f7265706f727473:32:00:00
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70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:6d61696e6d656e756d67725f746578745f656469746f72:31:00:00
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70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:6d61696e6d656e756d67725f746f6f6c73:32:00:00
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70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:6d61696e6d656e756d67725f77696e646f77:3134:00:00
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70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:6d61696e77696e6d656e756d67725f6c61796f7574:34:00:00
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70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:6d73677472656570616e656c5f6d6573736167655f766965775f74726565:3131:00:00
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70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:6d7367766965775f696e666f726d6174696f6e5f6d65737361676573:31:00:00
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70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:6d73677472656570616e656c5f6d6573736167655f766965775f74726565:3137:00:00
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||||
70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:6d7367766965775f636c6561725f6d657373616765735f726573756c74696e675f66726f6d5f757365725f6578656375746564:31:00:00
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70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:6d7367766965775f696e666f726d6174696f6e5f6d65737361676573:32:00:00
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70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:6d7367766965775f7761726e696e675f6d65737361676573:31:00:00
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||||
70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:6e6577697070726f6a65637477697a6172645f69705f6c6f636174696f6e:31:00:00
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70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:7061636f6d6d616e646e616d65735f6164645f6578697374696e675f6970:32:00:00
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70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:7061636f6d6d616e646e616d65735f636c6f73655f70726f6a656374:31:00:00
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70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:7061636f6d6d616e646e616d65735f66696c657365745f77696e646f77:31:00:00
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70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:7061636f6d6d616e646e616d65735f67656e65726174655f636f6d706f736974655f66696c65:33:00:00
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70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:7061636f6d6d616e646e616d65735f6f70656e5f69705f6c6f636174696f6e:32:00:00
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||||
70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:7061636f6d6d616e646e616d65735f6f70656e5f69705f6c6f636174696f6e:33:00:00
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||||
70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:7061636f6d6d616e646e616d65735f70726f706572746965735f77696e646f77:33:00:00
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||||
70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:7061636f6d6d616e646e616d65735f7265706f72745f69705f737461747573:31:00:00
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||||
70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:7061636f6d6d616e646e616d65735f72657365745f636f6d706f736974655f66696c65:32:00:00
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@@ -44,4 +45,4 @@ version:1
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||||
70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:73726363686f6f73657270616e656c5f6164645f636f6e666967757261626c655f69705f66696c6573:34:00:00
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70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:73796e7468657469636167657474696e6773746172746564766965775f726563656e745f69705f6c6f636174696f6e73:39:00:00
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70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:7870675f636f6566696c65776964676465745f62726f777365:32:00:00
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eof:918840250
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eof:3364401519
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+2
-2
@@ -5,10 +5,10 @@ version:1
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70726f6a656374:76697661646f5f75736167655c6a6176615f636f6d6d616e645f68616e646c657273:6564697464656c657465:35:00:00
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70726f6a656374:76697661646f5f75736167655c6a6176615f636f6d6d616e645f68616e646c657273:6d616e616765636f6d706f7369746574617267657473:35:00:00
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70726f6a656374:76697661646f5f75736167655c6a6176615f636f6d6d616e645f68616e646c657273:6e657769706c6f636174696f6e68616e646c6572:31:00:00
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||||
70726f6a656374:76697661646f5f75736167655c6a6176615f636f6d6d616e645f68616e646c657273:6f70656e69706c6f636174696f6e68616e646c6572:32:00:00
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70726f6a656374:76697661646f5f75736167655c6a6176615f636f6d6d616e645f68616e646c657273:6f70656e69706c6f636174696f6e68616e646c6572:33:00:00
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||||
70726f6a656374:76697661646f5f75736167655c6a6176615f636f6d6d616e645f68616e646c657273:6f70656e70726576696f7573697068616e646c6572:39:00:00
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||||
70726f6a656374:76697661646f5f75736167655c6a6176615f636f6d6d616e645f68616e646c657273:6f70656e70726f6a656374:32:00:00
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70726f6a656374:76697661646f5f75736167655c6a6176615f636f6d6d616e645f68616e646c657273:7265637573746f6d697a65636f7265:3133:00:00
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70726f6a656374:76697661646f5f75736167655c6a6176615f636f6d6d616e645f68616e646c657273:7265706f72746970737461747573:31:00:00
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70726f6a656374:76697661646f5f75736167655c6a6176615f636f6d6d616e645f68616e646c657273:73686f7776696577:35:00:00
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eof:1443477536
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eof:3241559215
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+1
-1
@@ -1,3 +1,3 @@
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version:1
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6d6f64655f636f756e7465727c4755494d6f6465:12
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6d6f64655f636f756e7465727c4755494d6f6465:13
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eof:
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+13
-12
@@ -3,7 +3,7 @@
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<!--The data in this file is primarily intended for consumption by Xilinx tools.
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||||
The structure and the elements are likely to change over the next few releases.
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||||
This means code written to parse this file will need to be revisited each subsequent release.-->
|
||||
<application name="pa" timeStamp="Tue Mar 21 23:04:34 2023">
|
||||
<application name="pa" timeStamp="Sun Mar 26 00:10:18 2023">
|
||||
<section name="Project Information" visible="false">
|
||||
<property name="ProjectID" value="dd2c041edc1245f6938f6800e430db6c" type="ProjectID"/>
|
||||
<property name="ProjectIteration" value="1" type="ProjectIteration"/>
|
||||
@@ -23,7 +23,7 @@ This means code written to parse this file will need to be revisited each subseq
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||||
<property name="EditDelete" value="5" type="JavaHandler"/>
|
||||
<property name="ManageCompositeTargets" value="5" type="JavaHandler"/>
|
||||
<property name="NewIPLocationHandler" value="1" type="JavaHandler"/>
|
||||
<property name="OpenIPLocationHandler" value="2" type="JavaHandler"/>
|
||||
<property name="OpenIPLocationHandler" value="3" type="JavaHandler"/>
|
||||
<property name="OpenPreviousIPHandler" value="9" type="JavaHandler"/>
|
||||
<property name="OpenProject" value="2" type="JavaHandler"/>
|
||||
<property name="RecustomizeCore" value="13" type="JavaHandler"/>
|
||||
@@ -35,35 +35,36 @@ This means code written to parse this file will need to be revisited each subseq
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||||
<property name="BaseDialog_OK" value="17" type="GuiHandlerData"/>
|
||||
<property name="CmdMsgDialog_OK" value="1" type="GuiHandlerData"/>
|
||||
<property name="CmdMsgDialog_OPEN_MESSAGES_VIEW" value="1" type="GuiHandlerData"/>
|
||||
<property name="CommandsInput_TYPE_TCL_COMMAND_HERE" value="1" type="GuiHandlerData"/>
|
||||
<property name="CommandsInput_TYPE_TCL_COMMAND_HERE" value="2" type="GuiHandlerData"/>
|
||||
<property name="CoreTreeTablePanel_CORE_TREE_TABLE" value="7" type="GuiHandlerData"/>
|
||||
<property name="ExpRunMenu_RESET_AND_GENERATE_OUTPUT_PRODUCTS" value="2" type="GuiHandlerData"/>
|
||||
<property name="ExpRunTreePanel_EXP_RUN_TREE_TABLE" value="19" type="GuiHandlerData"/>
|
||||
<property name="FileSetPanel_FILE_SET_PANEL_TREE" value="94" type="GuiHandlerData"/>
|
||||
<property name="GettingStartedView_MANAGE_IP" value="3" type="GuiHandlerData"/>
|
||||
<property name="FileSetPanel_FILE_SET_PANEL_TREE" value="98" type="GuiHandlerData"/>
|
||||
<property name="GettingStartedView_MANAGE_IP" value="4" type="GuiHandlerData"/>
|
||||
<property name="GettingStartedView_OPEN_PROJECT" value="2" type="GuiHandlerData"/>
|
||||
<property name="GettingStartedView_START_USING_VIVADO_WITH_IP_CATALOG" value="1" type="GuiHandlerData"/>
|
||||
<property name="HACGCCoeFileWidget_BROWSE" value="3" type="GuiHandlerData"/>
|
||||
<property name="HPopupTitle_CLOSE" value="1" type="GuiHandlerData"/>
|
||||
<property name="MainMenuMgr_EDIT" value="2" type="GuiHandlerData"/>
|
||||
<property name="MainMenuMgr_EXPORT" value="2" type="GuiHandlerData"/>
|
||||
<property name="MainMenuMgr_FILE" value="4" type="GuiHandlerData"/>
|
||||
<property name="MainMenuMgr_IP" value="2" type="GuiHandlerData"/>
|
||||
<property name="MainMenuMgr_FILE" value="6" type="GuiHandlerData"/>
|
||||
<property name="MainMenuMgr_IP" value="3" type="GuiHandlerData"/>
|
||||
<property name="MainMenuMgr_PROJECT" value="1" type="GuiHandlerData"/>
|
||||
<property name="MainMenuMgr_REPORTS" value="2" type="GuiHandlerData"/>
|
||||
<property name="MainMenuMgr_TEXT_EDITOR" value="1" type="GuiHandlerData"/>
|
||||
<property name="MainMenuMgr_TOOLS" value="2" type="GuiHandlerData"/>
|
||||
<property name="MainMenuMgr_WINDOW" value="14" type="GuiHandlerData"/>
|
||||
<property name="MainWinMenuMgr_LAYOUT" value="4" type="GuiHandlerData"/>
|
||||
<property name="MsgTreePanel_MESSAGE_VIEW_TREE" value="11" type="GuiHandlerData"/>
|
||||
<property name="MsgView_INFORMATION_MESSAGES" value="1" type="GuiHandlerData"/>
|
||||
<property name="MsgTreePanel_MESSAGE_VIEW_TREE" value="17" type="GuiHandlerData"/>
|
||||
<property name="MsgView_CLEAR_MESSAGES_RESULTING_FROM_USER_EXECUTED" value="1" type="GuiHandlerData"/>
|
||||
<property name="MsgView_INFORMATION_MESSAGES" value="2" type="GuiHandlerData"/>
|
||||
<property name="MsgView_WARNING_MESSAGES" value="1" type="GuiHandlerData"/>
|
||||
<property name="NewIPProjectWizard_IP_LOCATION" value="1" type="GuiHandlerData"/>
|
||||
<property name="PACommandNames_ADD_EXISTING_IP" value="2" type="GuiHandlerData"/>
|
||||
<property name="PACommandNames_CLOSE_PROJECT" value="1" type="GuiHandlerData"/>
|
||||
<property name="PACommandNames_FILESET_WINDOW" value="1" type="GuiHandlerData"/>
|
||||
<property name="PACommandNames_GENERATE_COMPOSITE_FILE" value="3" type="GuiHandlerData"/>
|
||||
<property name="PACommandNames_OPEN_IP_LOCATION" value="2" type="GuiHandlerData"/>
|
||||
<property name="PACommandNames_OPEN_IP_LOCATION" value="3" type="GuiHandlerData"/>
|
||||
<property name="PACommandNames_PROPERTIES_WINDOW" value="3" type="GuiHandlerData"/>
|
||||
<property name="PACommandNames_REPORT_IP_STATUS" value="1" type="GuiHandlerData"/>
|
||||
<property name="PACommandNames_RESET_COMPOSITE_FILE" value="2" type="GuiHandlerData"/>
|
||||
@@ -78,9 +79,9 @@ This means code written to parse this file will need to be revisited each subseq
|
||||
<property name="XPG_CoeFileWidgdet_BROWSE" value="2" type="GuiHandlerData"/>
|
||||
</item>
|
||||
<item name="Other">
|
||||
<property name="GuiMode" value="91" type="GuiMode"/>
|
||||
<property name="GuiMode" value="30" type="GuiMode"/>
|
||||
<property name="BatchMode" value="0" type="BatchMode"/>
|
||||
<property name="TclMode" value="64" type="TclMode"/>
|
||||
<property name="TclMode" value="20" type="TclMode"/>
|
||||
</item>
|
||||
</section>
|
||||
</application>
|
||||
|
||||
+187
-188
@@ -1,9 +1,9 @@
|
||||
#*****************************************************************************************
|
||||
# Vivado (TM) v2019.1.3 (64-bit)
|
||||
#
|
||||
# dl814_k7.tcl: Tcl script for re-creating project 'dl814_k7'
|
||||
# project.tcl: Tcl script for re-creating project 'dl814_k7'
|
||||
#
|
||||
# Generated by Vivado on Tue Mar 21 23:15:14 +0800 2023
|
||||
# Generated by Vivado on Sun Mar 26 00:06:08 CST 2023
|
||||
# IP Build 2633630 on Wed Sep 4 12:30:14 MDT 2019
|
||||
#
|
||||
# This file contains the Vivado Tcl commands for re-creating the project to the state*
|
||||
@@ -18,7 +18,7 @@
|
||||
# NOTE: In order to use this script for source control purposes, please make sure that the
|
||||
# following files are added to the source control system:-
|
||||
#
|
||||
# 1. This project restoration tcl script (dl814_k7.tcl) that was generated.
|
||||
# 1. This project restoration tcl script (project.tcl) that was generated.
|
||||
#
|
||||
# 2. The following source(s) files that were local or imported into the original project.
|
||||
# (Please see the '$orig_proj_dir' and '$origin_dir' variable setting below at the start of the script)
|
||||
@@ -27,79 +27,79 @@
|
||||
#
|
||||
# 3. The following remote source files that were added to the original project:-
|
||||
#
|
||||
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/vio_manual_ctrl/vio_manual_ctrl.xci"
|
||||
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/ila_rx/ila_rx.xci"
|
||||
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/ila_tx/ila_tx.xci"
|
||||
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/vio_ant_rd/vio_ant_rd.xci"
|
||||
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/vio_rf_rd/vio_rf_rd.xci"
|
||||
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/ila_AntCtrl/ila_AntCtrl.xci"
|
||||
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/ila_rfcontrl/ila_rfcontrl.xci"
|
||||
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/vio_ant_test/vio_ant_test.xci"
|
||||
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/vio_rfcontrl/vio_rfcontrl.xci"
|
||||
# "D:/vivado-git/modules/xc7k410tffg900-2/ad9361_mapping/ip/ad9361_fifo/ad9361_fifo.xci"
|
||||
# "D:/vivado-git/modules/xc7k410tffg900-2/tx_qpsk/ip/cmpy_18x8/cmpy_18x8.xci"
|
||||
# "D:/vivado-git/modules/xc7k410tffg900-2/tx_qpsk/ip/dds_32b_8b/dds_32b_8b.xci"
|
||||
# "D:/vivado-git/modules/xc7k410tffg900-2/tx_qpsk/ip/hop_rom/hop_rom.xci"
|
||||
# "D:/vivado-git/modules/xc7k410tffg900-2/tx_qpsk/ip/hrc_64_12_025/hrc_64_12_025.xci"
|
||||
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/ant_rf_interface/fifo_AntCtrl/fifo_AntCtrl.xci"
|
||||
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ipi-bds/system_bd/system_bd.bd"
|
||||
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/ant_clk_gen_stg2/ant_clk_gen_stg2.xci"
|
||||
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/ant_clk_gen_stg1/ant_clk_gen_stg1.xci"
|
||||
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/ad9361_clk_gen/ad9361_clk_gen.xci"
|
||||
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/Sisyif_src/ADF4351_2.v"
|
||||
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/Sisyif_src/FRAC1.v"
|
||||
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/Sisyif_src/INT_ROMb.v"
|
||||
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/Sisyif_src/R_CAL_1.v"
|
||||
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/Sisyif_src/R_CAL_2.v"
|
||||
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/Sisyif_src/R_CAL_3.v"
|
||||
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/Sisyif_src/R_CAL_4.v"
|
||||
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/Sisyif_src/Sisyif.v"
|
||||
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/Sisyif_src/T_CAL.v"
|
||||
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/rx_pre_process/ad9361_phase_cal_coarse.v"
|
||||
# "D:/vivado-git/modules/xc7k410tffg900-2/ad9361_mapping/rtl/ad9361_rx_map_cmos_dual.v"
|
||||
# "D:/vivado-git/modules/xc7k410tffg900-2/ad9361_mapping/rtl/ad9361_tx_map_cmos_dual.v"
|
||||
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/Sisyif_src/adf4371_a.v"
|
||||
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/Sisyif_src/adf4371_b.v"
|
||||
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/ant_rf_ctrl.v"
|
||||
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/Sisyif_src/band_rom_a.v"
|
||||
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/Sisyif_src/band_rom_b.v"
|
||||
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/clk_dist.v"
|
||||
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/Sisyif_src/ds18b20_temp.v"
|
||||
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/Sisyif_src/frac2_rom.v"
|
||||
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/Sisyif_src/fre_caliatt.v"
|
||||
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/Sisyif_src/mgc_ctrl.v"
|
||||
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/Sisyif_src/mod2_rom.v"
|
||||
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/Sisyif_src/spi_master.v"
|
||||
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/Sisyif_src/spi_salve.v"
|
||||
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/Sisyif_src/spi_tx.v"
|
||||
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ipi-bds/system_bd/hdl/system_bd_wrapper.v"
|
||||
# "D:/vivado-git/modules/xc7k410tffg900-2/tx_qpsk/rtl/tx_qpsk.v"
|
||||
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/system_top.v"
|
||||
# "d:/vivado-git/modules/xc7k410tffg900-2/tx_qpsk/ip/coe/sweep_freq.coe"
|
||||
# "d:/vivado-git/modules/xc7k410tffg900-2/tx_qpsk/ip/coe/hrc_64_12_025.coe"
|
||||
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/vio_cal/vio_cal.xci"
|
||||
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/ila_rx_pre/ila_rx_pre.xci"
|
||||
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/ila_cal/ila_cal.xci"
|
||||
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/vio_clk_ld_rd/vio_clk_ld_rd.xci"
|
||||
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/rx_pre_process/cmpy_16x12/cmpy_16x12.xci"
|
||||
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/rx_pre_process/ram_hop_data/ram_hop_data.xci"
|
||||
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/rx_pre_process/fifo_weight_cdc/fifo_weight_cdc.xci"
|
||||
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/rx_pre_process/fifo_accor_cdc/fifo_accor_cdc.xci"
|
||||
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/rx_pre_process/add_s24_s32_s32/add_s24_s32_s32.xci"
|
||||
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/rx_pre_process/cmpy_12x12/cmpy_12x12.xci"
|
||||
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/rx_pre_process/atan2_16b/atan2_16b.xci"
|
||||
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/rx_pre_process/rotate_16b/rotate_16b.xci"
|
||||
# "D:/vivado-git/common/ApproxModuli_26bit.v"
|
||||
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/rx_pre_process/accor_mat_formatting.v"
|
||||
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/rx_pre_process/accum_cmplx_mat.v"
|
||||
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/rx_pre_process/acorr_cmplx_col_vec.v"
|
||||
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/rx_pre_process/ad9361_phase_cal_fine.v"
|
||||
# "D:/vivado-git/common/adder_tree_ppl.v"
|
||||
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/rx_pre_process/rx_pre_process.v"
|
||||
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/rx_pre_process/spatial_filter.v"
|
||||
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/rx_pre_process/weight_vec_formatting.v"
|
||||
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/constraints/k7401t_ad9516_2ad9361_physical.xdc"
|
||||
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/constraints/k7410t_ad9516_2ad9361_timing.xdc"
|
||||
# "/home/josh/Workspace/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/vio_manual_ctrl/vio_manual_ctrl.xci"
|
||||
# "/home/josh/Workspace/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/ila_rx/ila_rx.xci"
|
||||
# "/home/josh/Workspace/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/ila_tx/ila_tx.xci"
|
||||
# "/home/josh/Workspace/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/vio_ant_rd/vio_ant_rd.xci"
|
||||
# "/home/josh/Workspace/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/vio_rf_rd/vio_rf_rd.xci"
|
||||
# "/home/josh/Workspace/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/ila_AntCtrl/ila_AntCtrl.xci"
|
||||
# "/home/josh/Workspace/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/ila_rfcontrl/ila_rfcontrl.xci"
|
||||
# "/home/josh/Workspace/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/vio_ant_test/vio_ant_test.xci"
|
||||
# "/home/josh/Workspace/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/vio_rfcontrl/vio_rfcontrl.xci"
|
||||
# "/home/josh/Workspace/vivado-git/modules/xc7k410tffg900-2/ad9361_mapping/ip/ad9361_fifo/ad9361_fifo.xci"
|
||||
# "/home/josh/Workspace/vivado-git/modules/xc7k410tffg900-2/tx_qpsk/ip/cmpy_18x8/cmpy_18x8.xci"
|
||||
# "/home/josh/Workspace/vivado-git/modules/xc7k410tffg900-2/tx_qpsk/ip/dds_32b_8b/dds_32b_8b.xci"
|
||||
# "/home/josh/Workspace/vivado-git/modules/xc7k410tffg900-2/tx_qpsk/ip/hop_rom/hop_rom.xci"
|
||||
# "/home/josh/Workspace/vivado-git/modules/xc7k410tffg900-2/tx_qpsk/ip/hrc_64_12_025/hrc_64_12_025.xci"
|
||||
# "/home/josh/Workspace/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/ant_rf_interface/fifo_AntCtrl/fifo_AntCtrl.xci"
|
||||
# "/home/josh/Workspace/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ipi-bds/system_bd/system_bd.bd"
|
||||
# "/home/josh/Workspace/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/ant_clk_gen_stg2/ant_clk_gen_stg2.xci"
|
||||
# "/home/josh/Workspace/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/ant_clk_gen_stg1/ant_clk_gen_stg1.xci"
|
||||
# "/home/josh/Workspace/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/ad9361_clk_gen/ad9361_clk_gen.xci"
|
||||
# "/home/josh/Workspace/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/Sisyif_src/ADF4351_2.v"
|
||||
# "/home/josh/Workspace/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/Sisyif_src/FRAC1.v"
|
||||
# "/home/josh/Workspace/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/Sisyif_src/INT_ROMb.v"
|
||||
# "/home/josh/Workspace/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/Sisyif_src/R_CAL_1.v"
|
||||
# "/home/josh/Workspace/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/Sisyif_src/R_CAL_2.v"
|
||||
# "/home/josh/Workspace/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/Sisyif_src/R_CAL_3.v"
|
||||
# "/home/josh/Workspace/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/Sisyif_src/R_CAL_4.v"
|
||||
# "/home/josh/Workspace/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/Sisyif_src/Sisyif.v"
|
||||
# "/home/josh/Workspace/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/Sisyif_src/T_CAL.v"
|
||||
# "/home/josh/Workspace/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/rx_pre_process/ad9361_phase_cal_coarse.v"
|
||||
# "/home/josh/Workspace/vivado-git/modules/xc7k410tffg900-2/ad9361_mapping/rtl/ad9361_rx_map_cmos_dual.v"
|
||||
# "/home/josh/Workspace/vivado-git/modules/xc7k410tffg900-2/ad9361_mapping/rtl/ad9361_tx_map_cmos_dual.v"
|
||||
# "/home/josh/Workspace/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/Sisyif_src/adf4371_a.v"
|
||||
# "/home/josh/Workspace/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/Sisyif_src/adf4371_b.v"
|
||||
# "/home/josh/Workspace/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/ant_rf_ctrl.v"
|
||||
# "/home/josh/Workspace/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/Sisyif_src/band_rom_a.v"
|
||||
# "/home/josh/Workspace/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/Sisyif_src/band_rom_b.v"
|
||||
# "/home/josh/Workspace/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/clk_dist.v"
|
||||
# "/home/josh/Workspace/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/Sisyif_src/ds18b20_temp.v"
|
||||
# "/home/josh/Workspace/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/Sisyif_src/frac2_rom.v"
|
||||
# "/home/josh/Workspace/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/Sisyif_src/fre_caliatt.v"
|
||||
# "/home/josh/Workspace/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/Sisyif_src/mgc_ctrl.v"
|
||||
# "/home/josh/Workspace/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/Sisyif_src/mod2_rom.v"
|
||||
# "/home/josh/Workspace/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/Sisyif_src/spi_master.v"
|
||||
# "/home/josh/Workspace/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/Sisyif_src/spi_salve.v"
|
||||
# "/home/josh/Workspace/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/Sisyif_src/spi_tx.v"
|
||||
# "/home/josh/Workspace/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ipi-bds/system_bd/hdl/system_bd_wrapper.v"
|
||||
# "/home/josh/Workspace/vivado-git/modules/xc7k410tffg900-2/tx_qpsk/rtl/tx_qpsk.v"
|
||||
# "/home/josh/Workspace/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/system_top.v"
|
||||
# "/home/josh/Workspace/vivado-git/modules/xc7k410tffg900-2/tx_qpsk/ip/coe/sweep_freq.coe"
|
||||
# "/home/josh/Workspace/vivado-git/modules/xc7k410tffg900-2/tx_qpsk/ip/coe/hrc_64_12_025.coe"
|
||||
# "/home/josh/Workspace/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/vio_cal/vio_cal.xci"
|
||||
# "/home/josh/Workspace/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/ila_rx_pre/ila_rx_pre.xci"
|
||||
# "/home/josh/Workspace/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/ila_cal/ila_cal.xci"
|
||||
# "/home/josh/Workspace/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/vio_clk_ld_rd/vio_clk_ld_rd.xci"
|
||||
# "/home/josh/Workspace/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/rx_pre_process/cmpy_16x12/cmpy_16x12.xci"
|
||||
# "/home/josh/Workspace/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/rx_pre_process/ram_hop_data/ram_hop_data.xci"
|
||||
# "/home/josh/Workspace/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/rx_pre_process/fifo_weight_cdc/fifo_weight_cdc.xci"
|
||||
# "/home/josh/Workspace/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/rx_pre_process/fifo_accor_cdc/fifo_accor_cdc.xci"
|
||||
# "/home/josh/Workspace/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/rx_pre_process/add_s24_s32_s32/add_s24_s32_s32.xci"
|
||||
# "/home/josh/Workspace/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/rx_pre_process/cmpy_12x12/cmpy_12x12.xci"
|
||||
# "/home/josh/Workspace/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/rx_pre_process/atan2_16b/atan2_16b.xci"
|
||||
# "/home/josh/Workspace/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/rx_pre_process/rotate_16b/rotate_16b.xci"
|
||||
# "/home/josh/Workspace/vivado-git/common/ApproxModuli_26bit.v"
|
||||
# "/home/josh/Workspace/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/rx_pre_process/accor_mat_formatting.v"
|
||||
# "/home/josh/Workspace/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/rx_pre_process/accum_cmplx_mat.v"
|
||||
# "/home/josh/Workspace/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/rx_pre_process/acorr_cmplx_col_vec.v"
|
||||
# "/home/josh/Workspace/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/rx_pre_process/ad9361_phase_cal_fine.v"
|
||||
# "/home/josh/Workspace/vivado-git/common/adder_tree_ppl.v"
|
||||
# "/home/josh/Workspace/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/rx_pre_process/rx_pre_process.v"
|
||||
# "/home/josh/Workspace/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/rx_pre_process/spatial_filter.v"
|
||||
# "/home/josh/Workspace/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/rx_pre_process/weight_vec_formatting.v"
|
||||
# "/home/josh/Workspace/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/constraints/k7401t_ad9516_2ad9361_physical.xdc"
|
||||
# "/home/josh/Workspace/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/constraints/k7410t_ad9516_2ad9361_timing.xdc"
|
||||
#
|
||||
#*****************************************************************************************
|
||||
|
||||
@@ -112,7 +112,7 @@ if { [info exists ::origin_dir_loc] } {
|
||||
}
|
||||
|
||||
# Set the project name
|
||||
set _xil_proj_name_ "dl814_k7"
|
||||
set _xil_proj_name_ "project"
|
||||
|
||||
# Use project name variable, if specified in the tcl shell
|
||||
if { [info exists ::user_project_name] } {
|
||||
@@ -120,7 +120,7 @@ if { [info exists ::user_project_name] } {
|
||||
}
|
||||
|
||||
variable script_file
|
||||
set script_file "dl814_k7.tcl"
|
||||
set script_file "project.tcl"
|
||||
|
||||
# Help information for this script
|
||||
proc print_help {} {
|
||||
@@ -168,7 +168,7 @@ if { $::argc > 0 } {
|
||||
}
|
||||
|
||||
# Set the directory path for the original project from where this script was exported
|
||||
set orig_proj_dir "[file normalize "$origin_dir/dl814_k7"]"
|
||||
set orig_proj_dir "[file normalize "$origin_dir/project/dl814_k7"]"
|
||||
|
||||
# Create project
|
||||
create_project ${_xil_proj_name_} ./${_xil_proj_name_} -part xc7k410tffg900-2
|
||||
@@ -178,7 +178,7 @@ set proj_dir [get_property directory [current_project]]
|
||||
|
||||
# Set project properties
|
||||
set obj [current_project]
|
||||
set_property -name "compxlib.modelsim_compiled_library_dir" -value "C:/Mentor/CompLib/2019.1.3" -objects $obj
|
||||
set_property -name "compxlib.modelsim_compiled_library_dir" -value "/home/josh/Mentor/CompLib/2019.1.3" -objects $obj
|
||||
set_property -name "corecontainer.enable" -value "1" -objects $obj
|
||||
set_property -name "default_lib" -value "xil_defaultlib" -objects $obj
|
||||
set_property -name "dsa.accelerator_binary_content" -value "bitstream" -objects $obj
|
||||
@@ -210,7 +210,6 @@ set_property -name "webtalk.modelsim_export_sim" -value "47" -objects $obj
|
||||
set_property -name "webtalk.questa_export_sim" -value "47" -objects $obj
|
||||
set_property -name "webtalk.riviera_export_sim" -value "47" -objects $obj
|
||||
set_property -name "webtalk.vcs_export_sim" -value "47" -objects $obj
|
||||
set_property -name "webtalk.xcelium_export_sim" -value "2" -objects $obj
|
||||
set_property -name "webtalk.xsim_export_sim" -value "47" -objects $obj
|
||||
set_property -name "xpm_libraries" -value "XPM_CDC XPM_MEMORY" -objects $obj
|
||||
|
||||
@@ -221,7 +220,7 @@ if {[string equal [get_filesets -quiet sources_1] ""]} {
|
||||
|
||||
# Set IP repository paths
|
||||
set obj [get_filesets sources_1]
|
||||
set_property "ip_repo_paths" "[file normalize "$origin_dir/../../../../adi_library"]" $obj
|
||||
set_property "ip_repo_paths" "[file normalize "$origin_dir/../../../adi_library"]" $obj
|
||||
|
||||
# Rebuild user ip_repo's index before adding any source files
|
||||
update_ip_catalog -rebuild
|
||||
@@ -229,82 +228,82 @@ update_ip_catalog -rebuild
|
||||
# Set 'sources_1' fileset object
|
||||
set obj [get_filesets sources_1]
|
||||
set files [list \
|
||||
[file normalize "${origin_dir}/../ip/vio_manual_ctrl/vio_manual_ctrl.xci"] \
|
||||
[file normalize "${origin_dir}/../ip/ila_rx/ila_rx.xci"] \
|
||||
[file normalize "${origin_dir}/../ip/ila_tx/ila_tx.xci"] \
|
||||
[file normalize "${origin_dir}/../ip/vio_ant_rd/vio_ant_rd.xci"] \
|
||||
[file normalize "${origin_dir}/../ip/vio_rf_rd/vio_rf_rd.xci"] \
|
||||
[file normalize "${origin_dir}/../ip/ila_AntCtrl/ila_AntCtrl.xci"] \
|
||||
[file normalize "${origin_dir}/../ip/ila_rfcontrl/ila_rfcontrl.xci"] \
|
||||
[file normalize "${origin_dir}/../ip/vio_ant_test/vio_ant_test.xci"] \
|
||||
[file normalize "${origin_dir}/../ip/vio_rfcontrl/vio_rfcontrl.xci"] \
|
||||
[file normalize "${origin_dir}/../../../../modules/xc7k410tffg900-2/ad9361_mapping/ip/ad9361_fifo/ad9361_fifo.xci"] \
|
||||
[file normalize "${origin_dir}/../../../../modules/xc7k410tffg900-2/tx_qpsk/ip/cmpy_18x8/cmpy_18x8.xci"] \
|
||||
[file normalize "${origin_dir}/../../../../modules/xc7k410tffg900-2/tx_qpsk/ip/dds_32b_8b/dds_32b_8b.xci"] \
|
||||
[file normalize "${origin_dir}/../../../../modules/xc7k410tffg900-2/tx_qpsk/ip/hop_rom/hop_rom.xci"] \
|
||||
[file normalize "${origin_dir}/../../../../modules/xc7k410tffg900-2/tx_qpsk/ip/hrc_64_12_025/hrc_64_12_025.xci"] \
|
||||
[file normalize "${origin_dir}/../ip/ant_rf_interface/fifo_AntCtrl/fifo_AntCtrl.xci"] \
|
||||
[file normalize "${origin_dir}/../ipi-bds/system_bd/system_bd.bd"] \
|
||||
[file normalize "${origin_dir}/../ip/ant_clk_gen_stg2/ant_clk_gen_stg2.xci"] \
|
||||
[file normalize "${origin_dir}/../ip/ant_clk_gen_stg1/ant_clk_gen_stg1.xci"] \
|
||||
[file normalize "${origin_dir}/../ip/ad9361_clk_gen/ad9361_clk_gen.xci"] \
|
||||
[file normalize "${origin_dir}/../rtl/Sisyif_src/ADF4351_2.v"] \
|
||||
[file normalize "${origin_dir}/../rtl/Sisyif_src/FRAC1.v"] \
|
||||
[file normalize "${origin_dir}/../rtl/Sisyif_src/INT_ROMb.v"] \
|
||||
[file normalize "${origin_dir}/../rtl/Sisyif_src/R_CAL_1.v"] \
|
||||
[file normalize "${origin_dir}/../rtl/Sisyif_src/R_CAL_2.v"] \
|
||||
[file normalize "${origin_dir}/../rtl/Sisyif_src/R_CAL_3.v"] \
|
||||
[file normalize "${origin_dir}/../rtl/Sisyif_src/R_CAL_4.v"] \
|
||||
[file normalize "${origin_dir}/../rtl/Sisyif_src/Sisyif.v"] \
|
||||
[file normalize "${origin_dir}/../rtl/Sisyif_src/T_CAL.v"] \
|
||||
[file normalize "${origin_dir}/../rtl/rx_pre_process/ad9361_phase_cal_coarse.v"] \
|
||||
[file normalize "${origin_dir}/../../../../modules/xc7k410tffg900-2/ad9361_mapping/rtl/ad9361_rx_map_cmos_dual.v"] \
|
||||
[file normalize "${origin_dir}/../../../../modules/xc7k410tffg900-2/ad9361_mapping/rtl/ad9361_tx_map_cmos_dual.v"] \
|
||||
[file normalize "${origin_dir}/../rtl/Sisyif_src/adf4371_a.v"] \
|
||||
[file normalize "${origin_dir}/../rtl/Sisyif_src/adf4371_b.v"] \
|
||||
[file normalize "${origin_dir}/../rtl/ant_rf_ctrl.v"] \
|
||||
[file normalize "${origin_dir}/../rtl/Sisyif_src/band_rom_a.v"] \
|
||||
[file normalize "${origin_dir}/../rtl/Sisyif_src/band_rom_b.v"] \
|
||||
[file normalize "${origin_dir}/../rtl/clk_dist.v"] \
|
||||
[file normalize "${origin_dir}/../rtl/Sisyif_src/ds18b20_temp.v"] \
|
||||
[file normalize "${origin_dir}/../rtl/Sisyif_src/frac2_rom.v"] \
|
||||
[file normalize "${origin_dir}/../rtl/Sisyif_src/fre_caliatt.v"] \
|
||||
[file normalize "${origin_dir}/../rtl/Sisyif_src/mgc_ctrl.v"] \
|
||||
[file normalize "${origin_dir}/../rtl/Sisyif_src/mod2_rom.v"] \
|
||||
[file normalize "${origin_dir}/../rtl/Sisyif_src/spi_master.v"] \
|
||||
[file normalize "${origin_dir}/../rtl/Sisyif_src/spi_salve.v"] \
|
||||
[file normalize "${origin_dir}/../rtl/Sisyif_src/spi_tx.v"] \
|
||||
[file normalize "${origin_dir}/../ipi-bds/system_bd/hdl/system_bd_wrapper.v"] \
|
||||
[file normalize "${origin_dir}/../../../../modules/xc7k410tffg900-2/tx_qpsk/rtl/tx_qpsk.v"] \
|
||||
[file normalize "${origin_dir}/../rtl/system_top.v"] \
|
||||
[file normalize "${origin_dir}/../../../../modules/xc7k410tffg900-2/tx_qpsk/ip/coe/sweep_freq.coe"] \
|
||||
[file normalize "${origin_dir}/../../../../modules/xc7k410tffg900-2/tx_qpsk/ip/coe/hrc_64_12_025.coe"] \
|
||||
[file normalize "${origin_dir}/../ip/vio_cal/vio_cal.xci"] \
|
||||
[file normalize "${origin_dir}/../ip/ila_rx_pre/ila_rx_pre.xci"] \
|
||||
[file normalize "${origin_dir}/../ip/ila_cal/ila_cal.xci"] \
|
||||
[file normalize "${origin_dir}/../ip/vio_clk_ld_rd/vio_clk_ld_rd.xci"] \
|
||||
[file normalize "${origin_dir}/../ip/rx_pre_process/cmpy_16x12/cmpy_16x12.xci"] \
|
||||
[file normalize "${origin_dir}/../ip/rx_pre_process/ram_hop_data/ram_hop_data.xci"] \
|
||||
[file normalize "${origin_dir}/../ip/rx_pre_process/fifo_weight_cdc/fifo_weight_cdc.xci"] \
|
||||
[file normalize "${origin_dir}/../ip/rx_pre_process/fifo_accor_cdc/fifo_accor_cdc.xci"] \
|
||||
[file normalize "${origin_dir}/../ip/rx_pre_process/add_s24_s32_s32/add_s24_s32_s32.xci"] \
|
||||
[file normalize "${origin_dir}/../ip/rx_pre_process/cmpy_12x12/cmpy_12x12.xci"] \
|
||||
[file normalize "${origin_dir}/../ip/rx_pre_process/atan2_16b/atan2_16b.xci"] \
|
||||
[file normalize "${origin_dir}/../ip/rx_pre_process/rotate_16b/rotate_16b.xci"] \
|
||||
[file normalize "${origin_dir}/../../../../common/ApproxModuli_26bit.v"] \
|
||||
[file normalize "${origin_dir}/../rtl/rx_pre_process/accor_mat_formatting.v"] \
|
||||
[file normalize "${origin_dir}/../rtl/rx_pre_process/accum_cmplx_mat.v"] \
|
||||
[file normalize "${origin_dir}/../rtl/rx_pre_process/acorr_cmplx_col_vec.v"] \
|
||||
[file normalize "${origin_dir}/../rtl/rx_pre_process/ad9361_phase_cal_fine.v"] \
|
||||
[file normalize "${origin_dir}/../../../../common/adder_tree_ppl.v"] \
|
||||
[file normalize "${origin_dir}/../rtl/rx_pre_process/rx_pre_process.v"] \
|
||||
[file normalize "${origin_dir}/../rtl/rx_pre_process/spatial_filter.v"] \
|
||||
[file normalize "${origin_dir}/../rtl/rx_pre_process/weight_vec_formatting.v"] \
|
||||
[file normalize "${origin_dir}/ip/vio_manual_ctrl/vio_manual_ctrl.xci"] \
|
||||
[file normalize "${origin_dir}/ip/ila_rx/ila_rx.xci"] \
|
||||
[file normalize "${origin_dir}/ip/ila_tx/ila_tx.xci"] \
|
||||
[file normalize "${origin_dir}/ip/vio_ant_rd/vio_ant_rd.xci"] \
|
||||
[file normalize "${origin_dir}/ip/vio_rf_rd/vio_rf_rd.xci"] \
|
||||
[file normalize "${origin_dir}/ip/ila_AntCtrl/ila_AntCtrl.xci"] \
|
||||
[file normalize "${origin_dir}/ip/ila_rfcontrl/ila_rfcontrl.xci"] \
|
||||
[file normalize "${origin_dir}/ip/vio_ant_test/vio_ant_test.xci"] \
|
||||
[file normalize "${origin_dir}/ip/vio_rfcontrl/vio_rfcontrl.xci"] \
|
||||
[file normalize "${origin_dir}/../../../modules/xc7k410tffg900-2/ad9361_mapping/ip/ad9361_fifo/ad9361_fifo.xci"] \
|
||||
[file normalize "${origin_dir}/../../../modules/xc7k410tffg900-2/tx_qpsk/ip/cmpy_18x8/cmpy_18x8.xci"] \
|
||||
[file normalize "${origin_dir}/../../../modules/xc7k410tffg900-2/tx_qpsk/ip/dds_32b_8b/dds_32b_8b.xci"] \
|
||||
[file normalize "${origin_dir}/../../../modules/xc7k410tffg900-2/tx_qpsk/ip/hop_rom/hop_rom.xci"] \
|
||||
[file normalize "${origin_dir}/../../../modules/xc7k410tffg900-2/tx_qpsk/ip/hrc_64_12_025/hrc_64_12_025.xci"] \
|
||||
[file normalize "${origin_dir}/ip/ant_rf_interface/fifo_AntCtrl/fifo_AntCtrl.xci"] \
|
||||
[file normalize "${origin_dir}/ipi-bds/system_bd/system_bd.bd"] \
|
||||
[file normalize "${origin_dir}/ip/ant_clk_gen_stg2/ant_clk_gen_stg2.xci"] \
|
||||
[file normalize "${origin_dir}/ip/ant_clk_gen_stg1/ant_clk_gen_stg1.xci"] \
|
||||
[file normalize "${origin_dir}/ip/ad9361_clk_gen/ad9361_clk_gen.xci"] \
|
||||
[file normalize "${origin_dir}/rtl/Sisyif_src/ADF4351_2.v"] \
|
||||
[file normalize "${origin_dir}/rtl/Sisyif_src/FRAC1.v"] \
|
||||
[file normalize "${origin_dir}/rtl/Sisyif_src/INT_ROMb.v"] \
|
||||
[file normalize "${origin_dir}/rtl/Sisyif_src/R_CAL_1.v"] \
|
||||
[file normalize "${origin_dir}/rtl/Sisyif_src/R_CAL_2.v"] \
|
||||
[file normalize "${origin_dir}/rtl/Sisyif_src/R_CAL_3.v"] \
|
||||
[file normalize "${origin_dir}/rtl/Sisyif_src/R_CAL_4.v"] \
|
||||
[file normalize "${origin_dir}/rtl/Sisyif_src/Sisyif.v"] \
|
||||
[file normalize "${origin_dir}/rtl/Sisyif_src/T_CAL.v"] \
|
||||
[file normalize "${origin_dir}/rtl/rx_pre_process/ad9361_phase_cal_coarse.v"] \
|
||||
[file normalize "${origin_dir}/../../../modules/xc7k410tffg900-2/ad9361_mapping/rtl/ad9361_rx_map_cmos_dual.v"] \
|
||||
[file normalize "${origin_dir}/../../../modules/xc7k410tffg900-2/ad9361_mapping/rtl/ad9361_tx_map_cmos_dual.v"] \
|
||||
[file normalize "${origin_dir}/rtl/Sisyif_src/adf4371_a.v"] \
|
||||
[file normalize "${origin_dir}/rtl/Sisyif_src/adf4371_b.v"] \
|
||||
[file normalize "${origin_dir}/rtl/ant_rf_ctrl.v"] \
|
||||
[file normalize "${origin_dir}/rtl/Sisyif_src/band_rom_a.v"] \
|
||||
[file normalize "${origin_dir}/rtl/Sisyif_src/band_rom_b.v"] \
|
||||
[file normalize "${origin_dir}/rtl/clk_dist.v"] \
|
||||
[file normalize "${origin_dir}/rtl/Sisyif_src/ds18b20_temp.v"] \
|
||||
[file normalize "${origin_dir}/rtl/Sisyif_src/frac2_rom.v"] \
|
||||
[file normalize "${origin_dir}/rtl/Sisyif_src/fre_caliatt.v"] \
|
||||
[file normalize "${origin_dir}/rtl/Sisyif_src/mgc_ctrl.v"] \
|
||||
[file normalize "${origin_dir}/rtl/Sisyif_src/mod2_rom.v"] \
|
||||
[file normalize "${origin_dir}/rtl/Sisyif_src/spi_master.v"] \
|
||||
[file normalize "${origin_dir}/rtl/Sisyif_src/spi_salve.v"] \
|
||||
[file normalize "${origin_dir}/rtl/Sisyif_src/spi_tx.v"] \
|
||||
[file normalize "${origin_dir}/ipi-bds/system_bd/hdl/system_bd_wrapper.v"] \
|
||||
[file normalize "${origin_dir}/../../../modules/xc7k410tffg900-2/tx_qpsk/rtl/tx_qpsk.v"] \
|
||||
[file normalize "${origin_dir}/rtl/system_top.v"] \
|
||||
[file normalize "${origin_dir}/../../../modules/xc7k410tffg900-2/tx_qpsk/ip/coe/sweep_freq.coe"] \
|
||||
[file normalize "${origin_dir}/../../../modules/xc7k410tffg900-2/tx_qpsk/ip/coe/hrc_64_12_025.coe"] \
|
||||
[file normalize "${origin_dir}/ip/vio_cal/vio_cal.xci"] \
|
||||
[file normalize "${origin_dir}/ip/ila_rx_pre/ila_rx_pre.xci"] \
|
||||
[file normalize "${origin_dir}/ip/ila_cal/ila_cal.xci"] \
|
||||
[file normalize "${origin_dir}/ip/vio_clk_ld_rd/vio_clk_ld_rd.xci"] \
|
||||
[file normalize "${origin_dir}/ip/rx_pre_process/cmpy_16x12/cmpy_16x12.xci"] \
|
||||
[file normalize "${origin_dir}/ip/rx_pre_process/ram_hop_data/ram_hop_data.xci"] \
|
||||
[file normalize "${origin_dir}/ip/rx_pre_process/fifo_weight_cdc/fifo_weight_cdc.xci"] \
|
||||
[file normalize "${origin_dir}/ip/rx_pre_process/fifo_accor_cdc/fifo_accor_cdc.xci"] \
|
||||
[file normalize "${origin_dir}/ip/rx_pre_process/add_s24_s32_s32/add_s24_s32_s32.xci"] \
|
||||
[file normalize "${origin_dir}/ip/rx_pre_process/cmpy_12x12/cmpy_12x12.xci"] \
|
||||
[file normalize "${origin_dir}/ip/rx_pre_process/atan2_16b/atan2_16b.xci"] \
|
||||
[file normalize "${origin_dir}/ip/rx_pre_process/rotate_16b/rotate_16b.xci"] \
|
||||
[file normalize "${origin_dir}/../../../common/ApproxModuli_26bit.v"] \
|
||||
[file normalize "${origin_dir}/rtl/rx_pre_process/accor_mat_formatting.v"] \
|
||||
[file normalize "${origin_dir}/rtl/rx_pre_process/accum_cmplx_mat.v"] \
|
||||
[file normalize "${origin_dir}/rtl/rx_pre_process/acorr_cmplx_col_vec.v"] \
|
||||
[file normalize "${origin_dir}/rtl/rx_pre_process/ad9361_phase_cal_fine.v"] \
|
||||
[file normalize "${origin_dir}/../../../common/adder_tree_ppl.v"] \
|
||||
[file normalize "${origin_dir}/rtl/rx_pre_process/rx_pre_process.v"] \
|
||||
[file normalize "${origin_dir}/rtl/rx_pre_process/spatial_filter.v"] \
|
||||
[file normalize "${origin_dir}/rtl/rx_pre_process/weight_vec_formatting.v"] \
|
||||
]
|
||||
add_files -norecurse -fileset $obj $files
|
||||
|
||||
# Set 'sources_1' fileset file properties for remote files
|
||||
set file "$origin_dir/../ip/vio_manual_ctrl/vio_manual_ctrl.xci"
|
||||
set file "$origin_dir/ip/vio_manual_ctrl/vio_manual_ctrl.xci"
|
||||
set file [file normalize $file]
|
||||
set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]]
|
||||
set_property -name "generate_files_for_reference" -value "0" -objects $file_obj
|
||||
@@ -313,7 +312,7 @@ if { ![get_property "is_locked" $file_obj] } {
|
||||
set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj
|
||||
}
|
||||
|
||||
set file "$origin_dir/../ip/ila_rx/ila_rx.xci"
|
||||
set file "$origin_dir/ip/ila_rx/ila_rx.xci"
|
||||
set file [file normalize $file]
|
||||
set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]]
|
||||
set_property -name "generate_files_for_reference" -value "0" -objects $file_obj
|
||||
@@ -322,7 +321,7 @@ if { ![get_property "is_locked" $file_obj] } {
|
||||
set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj
|
||||
}
|
||||
|
||||
set file "$origin_dir/../ip/ila_tx/ila_tx.xci"
|
||||
set file "$origin_dir/ip/ila_tx/ila_tx.xci"
|
||||
set file [file normalize $file]
|
||||
set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]]
|
||||
set_property -name "generate_files_for_reference" -value "0" -objects $file_obj
|
||||
@@ -331,7 +330,7 @@ if { ![get_property "is_locked" $file_obj] } {
|
||||
set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj
|
||||
}
|
||||
|
||||
set file "$origin_dir/../ip/vio_ant_rd/vio_ant_rd.xci"
|
||||
set file "$origin_dir/ip/vio_ant_rd/vio_ant_rd.xci"
|
||||
set file [file normalize $file]
|
||||
set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]]
|
||||
set_property -name "generate_files_for_reference" -value "0" -objects $file_obj
|
||||
@@ -340,7 +339,7 @@ if { ![get_property "is_locked" $file_obj] } {
|
||||
set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj
|
||||
}
|
||||
|
||||
set file "$origin_dir/../ip/vio_rf_rd/vio_rf_rd.xci"
|
||||
set file "$origin_dir/ip/vio_rf_rd/vio_rf_rd.xci"
|
||||
set file [file normalize $file]
|
||||
set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]]
|
||||
set_property -name "generate_files_for_reference" -value "0" -objects $file_obj
|
||||
@@ -349,7 +348,7 @@ if { ![get_property "is_locked" $file_obj] } {
|
||||
set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj
|
||||
}
|
||||
|
||||
set file "$origin_dir/../ip/ila_AntCtrl/ila_AntCtrl.xci"
|
||||
set file "$origin_dir/ip/ila_AntCtrl/ila_AntCtrl.xci"
|
||||
set file [file normalize $file]
|
||||
set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]]
|
||||
set_property -name "generate_files_for_reference" -value "0" -objects $file_obj
|
||||
@@ -358,7 +357,7 @@ if { ![get_property "is_locked" $file_obj] } {
|
||||
set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj
|
||||
}
|
||||
|
||||
set file "$origin_dir/../ip/ila_rfcontrl/ila_rfcontrl.xci"
|
||||
set file "$origin_dir/ip/ila_rfcontrl/ila_rfcontrl.xci"
|
||||
set file [file normalize $file]
|
||||
set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]]
|
||||
set_property -name "generate_files_for_reference" -value "0" -objects $file_obj
|
||||
@@ -367,7 +366,7 @@ if { ![get_property "is_locked" $file_obj] } {
|
||||
set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj
|
||||
}
|
||||
|
||||
set file "$origin_dir/../ip/vio_ant_test/vio_ant_test.xci"
|
||||
set file "$origin_dir/ip/vio_ant_test/vio_ant_test.xci"
|
||||
set file [file normalize $file]
|
||||
set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]]
|
||||
set_property -name "generate_files_for_reference" -value "0" -objects $file_obj
|
||||
@@ -376,7 +375,7 @@ if { ![get_property "is_locked" $file_obj] } {
|
||||
set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj
|
||||
}
|
||||
|
||||
set file "$origin_dir/../ip/vio_rfcontrl/vio_rfcontrl.xci"
|
||||
set file "$origin_dir/ip/vio_rfcontrl/vio_rfcontrl.xci"
|
||||
set file [file normalize $file]
|
||||
set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]]
|
||||
set_property -name "generate_files_for_reference" -value "0" -objects $file_obj
|
||||
@@ -385,7 +384,7 @@ if { ![get_property "is_locked" $file_obj] } {
|
||||
set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj
|
||||
}
|
||||
|
||||
set file "$origin_dir/../../../../modules/xc7k410tffg900-2/ad9361_mapping/ip/ad9361_fifo/ad9361_fifo.xci"
|
||||
set file "$origin_dir/../../../modules/xc7k410tffg900-2/ad9361_mapping/ip/ad9361_fifo/ad9361_fifo.xci"
|
||||
set file [file normalize $file]
|
||||
set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]]
|
||||
set_property -name "generate_files_for_reference" -value "0" -objects $file_obj
|
||||
@@ -394,7 +393,7 @@ if { ![get_property "is_locked" $file_obj] } {
|
||||
set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj
|
||||
}
|
||||
|
||||
set file "$origin_dir/../../../../modules/xc7k410tffg900-2/tx_qpsk/ip/cmpy_18x8/cmpy_18x8.xci"
|
||||
set file "$origin_dir/../../../modules/xc7k410tffg900-2/tx_qpsk/ip/cmpy_18x8/cmpy_18x8.xci"
|
||||
set file [file normalize $file]
|
||||
set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]]
|
||||
set_property -name "generate_files_for_reference" -value "0" -objects $file_obj
|
||||
@@ -403,7 +402,7 @@ if { ![get_property "is_locked" $file_obj] } {
|
||||
set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj
|
||||
}
|
||||
|
||||
set file "$origin_dir/../../../../modules/xc7k410tffg900-2/tx_qpsk/ip/dds_32b_8b/dds_32b_8b.xci"
|
||||
set file "$origin_dir/../../../modules/xc7k410tffg900-2/tx_qpsk/ip/dds_32b_8b/dds_32b_8b.xci"
|
||||
set file [file normalize $file]
|
||||
set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]]
|
||||
set_property -name "generate_files_for_reference" -value "0" -objects $file_obj
|
||||
@@ -412,7 +411,7 @@ if { ![get_property "is_locked" $file_obj] } {
|
||||
set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj
|
||||
}
|
||||
|
||||
set file "$origin_dir/../../../../modules/xc7k410tffg900-2/tx_qpsk/ip/hop_rom/hop_rom.xci"
|
||||
set file "$origin_dir/../../../modules/xc7k410tffg900-2/tx_qpsk/ip/hop_rom/hop_rom.xci"
|
||||
set file [file normalize $file]
|
||||
set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]]
|
||||
set_property -name "generate_files_for_reference" -value "0" -objects $file_obj
|
||||
@@ -421,7 +420,7 @@ if { ![get_property "is_locked" $file_obj] } {
|
||||
set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj
|
||||
}
|
||||
|
||||
set file "$origin_dir/../../../../modules/xc7k410tffg900-2/tx_qpsk/ip/hrc_64_12_025/hrc_64_12_025.xci"
|
||||
set file "$origin_dir/../../../modules/xc7k410tffg900-2/tx_qpsk/ip/hrc_64_12_025/hrc_64_12_025.xci"
|
||||
set file [file normalize $file]
|
||||
set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]]
|
||||
set_property -name "generate_files_for_reference" -value "0" -objects $file_obj
|
||||
@@ -430,7 +429,7 @@ if { ![get_property "is_locked" $file_obj] } {
|
||||
set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj
|
||||
}
|
||||
|
||||
set file "$origin_dir/../ip/ant_rf_interface/fifo_AntCtrl/fifo_AntCtrl.xci"
|
||||
set file "$origin_dir/ip/ant_rf_interface/fifo_AntCtrl/fifo_AntCtrl.xci"
|
||||
set file [file normalize $file]
|
||||
set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]]
|
||||
set_property -name "generate_files_for_reference" -value "0" -objects $file_obj
|
||||
@@ -439,12 +438,12 @@ if { ![get_property "is_locked" $file_obj] } {
|
||||
set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj
|
||||
}
|
||||
|
||||
set file "$origin_dir/../ipi-bds/system_bd/system_bd.bd"
|
||||
set file "$origin_dir/ipi-bds/system_bd/system_bd.bd"
|
||||
set file [file normalize $file]
|
||||
set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]]
|
||||
set_property -name "registered_with_manager" -value "1" -objects $file_obj
|
||||
|
||||
set file "$origin_dir/../ip/ant_clk_gen_stg2/ant_clk_gen_stg2.xci"
|
||||
set file "$origin_dir/ip/ant_clk_gen_stg2/ant_clk_gen_stg2.xci"
|
||||
set file [file normalize $file]
|
||||
set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]]
|
||||
set_property -name "generate_files_for_reference" -value "0" -objects $file_obj
|
||||
@@ -453,7 +452,7 @@ if { ![get_property "is_locked" $file_obj] } {
|
||||
set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj
|
||||
}
|
||||
|
||||
set file "$origin_dir/../ip/ant_clk_gen_stg1/ant_clk_gen_stg1.xci"
|
||||
set file "$origin_dir/ip/ant_clk_gen_stg1/ant_clk_gen_stg1.xci"
|
||||
set file [file normalize $file]
|
||||
set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]]
|
||||
set_property -name "generate_files_for_reference" -value "0" -objects $file_obj
|
||||
@@ -462,7 +461,7 @@ if { ![get_property "is_locked" $file_obj] } {
|
||||
set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj
|
||||
}
|
||||
|
||||
set file "$origin_dir/../ip/ad9361_clk_gen/ad9361_clk_gen.xci"
|
||||
set file "$origin_dir/ip/ad9361_clk_gen/ad9361_clk_gen.xci"
|
||||
set file [file normalize $file]
|
||||
set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]]
|
||||
set_property -name "generate_files_for_reference" -value "0" -objects $file_obj
|
||||
@@ -471,7 +470,7 @@ if { ![get_property "is_locked" $file_obj] } {
|
||||
set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj
|
||||
}
|
||||
|
||||
set file "$origin_dir/../ip/vio_cal/vio_cal.xci"
|
||||
set file "$origin_dir/ip/vio_cal/vio_cal.xci"
|
||||
set file [file normalize $file]
|
||||
set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]]
|
||||
set_property -name "generate_files_for_reference" -value "0" -objects $file_obj
|
||||
@@ -480,7 +479,7 @@ if { ![get_property "is_locked" $file_obj] } {
|
||||
set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj
|
||||
}
|
||||
|
||||
set file "$origin_dir/../ip/ila_rx_pre/ila_rx_pre.xci"
|
||||
set file "$origin_dir/ip/ila_rx_pre/ila_rx_pre.xci"
|
||||
set file [file normalize $file]
|
||||
set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]]
|
||||
set_property -name "generate_files_for_reference" -value "0" -objects $file_obj
|
||||
@@ -489,7 +488,7 @@ if { ![get_property "is_locked" $file_obj] } {
|
||||
set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj
|
||||
}
|
||||
|
||||
set file "$origin_dir/../ip/ila_cal/ila_cal.xci"
|
||||
set file "$origin_dir/ip/ila_cal/ila_cal.xci"
|
||||
set file [file normalize $file]
|
||||
set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]]
|
||||
set_property -name "generate_files_for_reference" -value "0" -objects $file_obj
|
||||
@@ -498,7 +497,7 @@ if { ![get_property "is_locked" $file_obj] } {
|
||||
set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj
|
||||
}
|
||||
|
||||
set file "$origin_dir/../ip/vio_clk_ld_rd/vio_clk_ld_rd.xci"
|
||||
set file "$origin_dir/ip/vio_clk_ld_rd/vio_clk_ld_rd.xci"
|
||||
set file [file normalize $file]
|
||||
set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]]
|
||||
set_property -name "generate_files_for_reference" -value "0" -objects $file_obj
|
||||
@@ -507,7 +506,7 @@ if { ![get_property "is_locked" $file_obj] } {
|
||||
set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj
|
||||
}
|
||||
|
||||
set file "$origin_dir/../ip/rx_pre_process/cmpy_16x12/cmpy_16x12.xci"
|
||||
set file "$origin_dir/ip/rx_pre_process/cmpy_16x12/cmpy_16x12.xci"
|
||||
set file [file normalize $file]
|
||||
set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]]
|
||||
set_property -name "generate_files_for_reference" -value "0" -objects $file_obj
|
||||
@@ -516,7 +515,7 @@ if { ![get_property "is_locked" $file_obj] } {
|
||||
set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj
|
||||
}
|
||||
|
||||
set file "$origin_dir/../ip/rx_pre_process/ram_hop_data/ram_hop_data.xci"
|
||||
set file "$origin_dir/ip/rx_pre_process/ram_hop_data/ram_hop_data.xci"
|
||||
set file [file normalize $file]
|
||||
set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]]
|
||||
set_property -name "generate_files_for_reference" -value "0" -objects $file_obj
|
||||
@@ -525,7 +524,7 @@ if { ![get_property "is_locked" $file_obj] } {
|
||||
set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj
|
||||
}
|
||||
|
||||
set file "$origin_dir/../ip/rx_pre_process/fifo_weight_cdc/fifo_weight_cdc.xci"
|
||||
set file "$origin_dir/ip/rx_pre_process/fifo_weight_cdc/fifo_weight_cdc.xci"
|
||||
set file [file normalize $file]
|
||||
set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]]
|
||||
set_property -name "generate_files_for_reference" -value "0" -objects $file_obj
|
||||
@@ -534,7 +533,7 @@ if { ![get_property "is_locked" $file_obj] } {
|
||||
set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj
|
||||
}
|
||||
|
||||
set file "$origin_dir/../ip/rx_pre_process/fifo_accor_cdc/fifo_accor_cdc.xci"
|
||||
set file "$origin_dir/ip/rx_pre_process/fifo_accor_cdc/fifo_accor_cdc.xci"
|
||||
set file [file normalize $file]
|
||||
set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]]
|
||||
set_property -name "generate_files_for_reference" -value "0" -objects $file_obj
|
||||
@@ -543,7 +542,7 @@ if { ![get_property "is_locked" $file_obj] } {
|
||||
set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj
|
||||
}
|
||||
|
||||
set file "$origin_dir/../ip/rx_pre_process/add_s24_s32_s32/add_s24_s32_s32.xci"
|
||||
set file "$origin_dir/ip/rx_pre_process/add_s24_s32_s32/add_s24_s32_s32.xci"
|
||||
set file [file normalize $file]
|
||||
set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]]
|
||||
set_property -name "generate_files_for_reference" -value "0" -objects $file_obj
|
||||
@@ -552,7 +551,7 @@ if { ![get_property "is_locked" $file_obj] } {
|
||||
set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj
|
||||
}
|
||||
|
||||
set file "$origin_dir/../ip/rx_pre_process/cmpy_12x12/cmpy_12x12.xci"
|
||||
set file "$origin_dir/ip/rx_pre_process/cmpy_12x12/cmpy_12x12.xci"
|
||||
set file [file normalize $file]
|
||||
set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]]
|
||||
set_property -name "generate_files_for_reference" -value "0" -objects $file_obj
|
||||
@@ -561,7 +560,7 @@ if { ![get_property "is_locked" $file_obj] } {
|
||||
set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj
|
||||
}
|
||||
|
||||
set file "$origin_dir/../ip/rx_pre_process/atan2_16b/atan2_16b.xci"
|
||||
set file "$origin_dir/ip/rx_pre_process/atan2_16b/atan2_16b.xci"
|
||||
set file [file normalize $file]
|
||||
set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]]
|
||||
set_property -name "generate_files_for_reference" -value "0" -objects $file_obj
|
||||
@@ -570,7 +569,7 @@ if { ![get_property "is_locked" $file_obj] } {
|
||||
set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj
|
||||
}
|
||||
|
||||
set file "$origin_dir/../ip/rx_pre_process/rotate_16b/rotate_16b.xci"
|
||||
set file "$origin_dir/ip/rx_pre_process/rotate_16b/rotate_16b.xci"
|
||||
set file [file normalize $file]
|
||||
set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]]
|
||||
set_property -name "generate_files_for_reference" -value "0" -objects $file_obj
|
||||
@@ -597,17 +596,17 @@ if {[string equal [get_filesets -quiet constrs_1] ""]} {
|
||||
set obj [get_filesets constrs_1]
|
||||
|
||||
# Add/Import constrs file and set constrs file properties
|
||||
set file "[file normalize "$origin_dir/../constraints/k7401t_ad9516_2ad9361_physical.xdc"]"
|
||||
set file "[file normalize "$origin_dir/constraints/k7401t_ad9516_2ad9361_physical.xdc"]"
|
||||
set file_added [add_files -norecurse -fileset $obj [list $file]]
|
||||
set file "$origin_dir/../constraints/k7401t_ad9516_2ad9361_physical.xdc"
|
||||
set file "$origin_dir/constraints/k7401t_ad9516_2ad9361_physical.xdc"
|
||||
set file [file normalize $file]
|
||||
set file_obj [get_files -of_objects [get_filesets constrs_1] [list "*$file"]]
|
||||
set_property -name "file_type" -value "XDC" -objects $file_obj
|
||||
|
||||
# Add/Import constrs file and set constrs file properties
|
||||
set file "[file normalize "$origin_dir/../constraints/k7410t_ad9516_2ad9361_timing.xdc"]"
|
||||
set file "[file normalize "$origin_dir/constraints/k7410t_ad9516_2ad9361_timing.xdc"]"
|
||||
set file_added [add_files -norecurse -fileset $obj [list $file]]
|
||||
set file "$origin_dir/../constraints/k7410t_ad9516_2ad9361_timing.xdc"
|
||||
set file "$origin_dir/constraints/k7410t_ad9516_2ad9361_timing.xdc"
|
||||
set file [file normalize $file]
|
||||
set file_obj [get_files -of_objects [get_filesets constrs_1] [list "*$file"]]
|
||||
set_property -name "file_type" -value "XDC" -objects $file_obj
|
||||
@@ -1,17 +0,0 @@
|
||||
22:47:25 INFO : Registering command handlers for SDK TCF services
|
||||
22:47:25 INFO : Launching XSCT server: xsct.bat -interactive D:\vivado-git\projects\datalink_814\dl814_k7_cal_coarse\project\dl814_k7\dl814_k7.sdk\temp_xsdb_launch_script.tcl
|
||||
22:47:27 INFO : XSCT server has started successfully.
|
||||
22:47:27 INFO : Successfully done setting XSCT server connection channel
|
||||
22:47:27 INFO : Successfully done setting SDK workspace
|
||||
22:47:27 INFO : Processing command line option -hwspec d:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/project/dl814_k7/dl814_k7.sdk/system_top.hdf.
|
||||
23:18:10 INFO : SDK has detected change in the last modified timestamps for source hardware specification file Source:1679411536342, Project:1679409039288
|
||||
23:18:10 INFO : Project system_top_hw_platform_0's source hardware specification located at d:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/project/dl814_k7/dl814_k7.sdk/system_top.hdf is now different from the local copy.
|
||||
The local copy will be replaced with the source specification and your workspace will be updated.
|
||||
23:18:11 INFO : Copied contents of d:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/project/dl814_k7/dl814_k7.sdk/system_top.hdf into \system_top_hw_platform_0\system.hdf.
|
||||
23:18:11 INFO : Synchronizing projects in the workspace with the hardware platform specification changes.
|
||||
23:18:13 INFO :
|
||||
23:18:14 INFO : Updating hardware inferred compiler options for dl814_k7_48M.
|
||||
23:18:14 INFO : Clearing existing target manager status.
|
||||
23:18:14 INFO : Closing and re-opening the MSS file of ther project dl814_k7_48M_bsp
|
||||
23:18:14 INFO : Workspace synchronized with the new hardware specification file. Cleaning dependent projects...
|
||||
23:18:15 WARN : Linker script will not be updated automatically. Users need to update it manually.
|
||||
-192
@@ -1,192 +0,0 @@
|
||||
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
|
||||
<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
|
||||
<storageModule moduleId="org.eclipse.cdt.core.settings">
|
||||
<cconfiguration id="xilinx.gnu.mb.exe.debug.1823463104">
|
||||
<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="xilinx.gnu.mb.exe.debug.1823463104" moduleId="org.eclipse.cdt.core.settings" name="Debug">
|
||||
<externalSettings/>
|
||||
<extensions>
|
||||
<extension id="com.xilinx.sdk.managedbuilder.XELF.mb" point="org.eclipse.cdt.core.BinaryParser"/>
|
||||
<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
|
||||
<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
|
||||
<extension id="org.eclipse.cdt.core.GLDErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
|
||||
<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
|
||||
<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
|
||||
</extensions>
|
||||
</storageModule>
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</scannerConfigBuildInfo>
|
||||
<scannerConfigBuildInfo instanceId="xilinx.gnu.mb.exe.debug.794227929;xilinx.gnu.mb.exe.debug.794227929.;xilinx.gnu.mb.c.toolchain.compiler.debug.89054907;xilinx.gnu.compiler.input.14176098">
|
||||
<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.xilinx.managedbuilder.ui.MBGCCManagedMakePerProjectProfileC"/>
|
||||
</scannerConfigBuildInfo>
|
||||
<scannerConfigBuildInfo instanceId="xilinx.gnu.mb.exe.debug.794227929;xilinx.gnu.mb.exe.debug.794227929.">
|
||||
<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.xilinx.managedbuilder.ui.MBGCCManagedMakePerProjectProfileC"/>
|
||||
</scannerConfigBuildInfo>
|
||||
<scannerConfigBuildInfo instanceId="xilinx.gnu.mb.exe.release.81244448;xilinx.gnu.mb.exe.release.81244448.;xilinx.gnu.mb.c.toolchain.compiler.release.1533285443;xilinx.gnu.compiler.input.1424288500">
|
||||
<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.xilinx.managedbuilder.ui.MBGCCManagedMakePerProjectProfileC"/>
|
||||
</scannerConfigBuildInfo>
|
||||
</storageModule>
|
||||
</cproject>
|
||||
+3
-3
@@ -1,9 +1,9 @@
|
||||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<projectDescription>
|
||||
<name>dl814_k7_48M</name>
|
||||
<comment>Created by SDK v2019.1. dl814_k7_48M_bsp - microblaze_ps</comment>
|
||||
<name>dl814_k7_48m</name>
|
||||
<comment>Created by SDK v2019.1. dl814_k7_48m_bsp - microblaze_ps</comment>
|
||||
<projects>
|
||||
<project>dl814_k7_48M_bsp</project>
|
||||
<project>dl814_k7_48m_bsp</project>
|
||||
</projects>
|
||||
<buildSpec>
|
||||
<buildCommand>
|
||||
+2
-2
@@ -1,8 +1,8 @@
|
||||
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
|
||||
<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
|
||||
<storageModule moduleId="org.eclipse.cdt.core.settings">
|
||||
<cconfiguration id="org.eclipse.cdt.core.default.config.181066374">
|
||||
<storageModule buildSystemId="org.eclipse.cdt.core.defaultConfigDataProvider" id="org.eclipse.cdt.core.default.config.181066374" moduleId="org.eclipse.cdt.core.settings" name="Configuration">
|
||||
<cconfiguration id="org.eclipse.cdt.core.default.config.916377108">
|
||||
<storageModule buildSystemId="org.eclipse.cdt.core.defaultConfigDataProvider" id="org.eclipse.cdt.core.default.config.916377108" moduleId="org.eclipse.cdt.core.settings" name="Configuration">
|
||||
<externalSettings/>
|
||||
<extensions/>
|
||||
</storageModule>
|
||||
+1
-1
@@ -1,6 +1,6 @@
|
||||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<projectDescription>
|
||||
<name>dl814_k7_48M_bsp</name>
|
||||
<name>dl814_k7_48m_bsp</name>
|
||||
<comment>Created by SDK v2019.1</comment>
|
||||
<projects>
|
||||
</projects>
|
||||
Binary file not shown.
Reference in New Issue
Block a user