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modify dl814_dj_48m tx_control

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josh
2023-03-23 21:23:15 +08:00
parent d69ca67c60
commit ade867ab22
90 changed files with 30711 additions and 30957 deletions
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projects/datalink_814/dl814_dj_48m/ip/hop_rom.xcix
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projects/datalink_814/dl814_dj_48m/ip/hrc_64_12_025.xcix
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projects/datalink_814/dl814_dj_48m/ip/lpf_125k.xcix
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projects/datalink_814/dl814_dj_48m/project/dl814_dj_48m.tcl
+88 -53
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@@ -1,9 +1,9 @@
#*****************************************************************************************
# Vivado (TM) v2019.1.3 (64-bit)
#
# dl814_dj_48m.tcl: Tcl script for re-creating project 'dl814_dj'
# dl814_dj_48m.tcl: Tcl script for re-creating project 'dl814_dj_48m'
#
# Generated by Vivado on Tue Mar 21 16:58:49 +0800 2023
# Generated by Vivado on Thu Mar 23 19:03:26 CST 2023
# IP Build 2633630 on Wed Sep 4 12:30:14 MDT 2019
#
# This file contains the Vivado Tcl commands for re-creating the project to the state*
@@ -27,28 +27,29 @@
#
# 3. The following remote source files that were added to the original project:-
#
# "D:/vivado-git/projects/datalink_814/dl814_dj_48m/ip/vio_rf_control/vio_rf_control.xci"
# "D:/vivado-git/projects/datalink_814/dl814_dj_48m/ip/vio_manual_ctrl/vio_manual_ctrl.xci"
# "D:/vivado-git/projects/datalink_814/dl814_dj_48m/ip/ila_ctrl_signal/ila_ctrl_signal.xci"
# "D:/vivado-git/projects/datalink_814/dl814_dj_48m/ip/ila_tx_rx/ila_tx_rx.xci"
# "D:/vivado-git/projects/datalink_814/dl814_dj_48m/ip/cmpy_18x8/cmpy_18x8.xci"
# "D:/vivado-git/projects/datalink_814/dl814_dj_48m/ip/dds_32b_8b/dds_32b_8b.xci"
# "D:/vivado-git/projects/datalink_814/dl814_dj_48m/ip/hop_rom/hop_rom.xci"
# "D:/vivado-git/projects/datalink_814/dl814_dj_48m/ip/hrc_64_12_025/hrc_64_12_025.xci"
# "D:/vivado-git/projects/datalink_814/dl814_dj_48m/ipi-bds/system_bd/system_bd.bd"
# "D:/vivado-git/projects/datalink_814/dl814_dj_48m/ip/sig_clk_gen/sig_clk_gen.xci"
# "D:/vivado-git/projects/datalink_814/dl814_dj_48m/rtl/rf_control.v"
# "D:/vivado-git/projects/datalink_814/dl814_dj_48m/ipi-bds/system_bd/hdl/system_bd_wrapper.v"
# "D:/vivado-git/projects/datalink_814/dl814_dj_48m/rtl/tx_qpsk.v"
# "D:/vivado-git/projects/datalink_814/dl814_dj_48m/rtl/system_top.v"
# "d:/vivado-git/projects/datalink_814/dl814_dj_48m/ip/coe/sweep_freq.coe"
# "d:/vivado-git/projects/datalink_814/dl814_dj_48m/ip/coe/hrc_64_12_025.coe"
# "D:/vivado-git/projects/datalink_814/dl814_dj_48m/rtl/tx_pn_seq_6mcps.v"
# "D:/vivado-git/projects/datalink_814/dl814_dj_48m/ip/fifo_48m_to_122p88m/fifo_48m_to_122p88m.xci"
# "D:/vivado-git/projects/datalink_814/dl814_dj_48m/ip/lpf_125k/lpf_125k.xci"
# "d:/vivado-git/projects/datalink_814/dl814_dj_48m/ip/coe/lpf_125k.coe"
# "D:/vivado-git/projects/datalink_814/dl814_dj_48m/constraints/z7100_ad9528_ad9371.xdc"
# "D:/vivado-git/projects/datalink_814/dl814_dj_48m/testbenches/tb_tx_pn_seq.v"
# "/home/josh/Workspace/vivado-git/projects/datalink_814/dl814_dj_48m/ip/vio_rf_control/vio_rf_control.xci"
# "/home/josh/Workspace/vivado-git/projects/datalink_814/dl814_dj_48m/ip/vio_manual_ctrl/vio_manual_ctrl.xci"
# "/home/josh/Workspace/vivado-git/projects/datalink_814/dl814_dj_48m/ip/ila_ctrl_signal/ila_ctrl_signal.xci"
# "/home/josh/Workspace/vivado-git/projects/datalink_814/dl814_dj_48m/ip/ila_tx_rx/ila_tx_rx.xci"
# "/home/josh/Workspace/vivado-git/projects/datalink_814/dl814_dj_48m/ip/cmpy_18x8/cmpy_18x8.xci"
# "/home/josh/Workspace/vivado-git/projects/datalink_814/dl814_dj_48m/ip/dds_32b_8b/dds_32b_8b.xci"
# "/home/josh/Workspace/vivado-git/projects/datalink_814/dl814_dj_48m/ip/fifo_48m_to_122p88m/fifo_48m_to_122p88m.xci"
# "/home/josh/Workspace/vivado-git/projects/datalink_814/dl814_dj_48m/ipi-bds/system_bd/system_bd.bd"
# "/home/josh/Workspace/vivado-git/projects/datalink_814/dl814_dj_48m/ip/sig_clk_gen/sig_clk_gen.xci"
# "/home/josh/Workspace/vivado-git/projects/datalink_814/dl814_dj_48m/rtl/rf_control.v"
# "/home/josh/Workspace/vivado-git/projects/datalink_814/dl814_dj_48m/ipi-bds/system_bd/hdl/system_bd_wrapper.v"
# "/home/josh/Workspace/vivado-git/projects/datalink_814/dl814_dj_48m/rtl/tx_control.v"
# "/home/josh/Workspace/vivado-git/projects/datalink_814/dl814_dj_48m/rtl/tx_pn_seq_6mcps.v"
# "/home/josh/Workspace/vivado-git/projects/datalink_814/dl814_dj_48m/rtl/tx_qpsk.v"
# "/home/josh/Workspace/vivado-git/projects/datalink_814/dl814_dj_48m/rtl/system_top.v"
# "/home/josh/Workspace/vivado-git/projects/datalink_814/dl814_dj_48m/ip/coe/sweep_freq.coe"
# "/home/josh/Workspace/vivado-git/projects/datalink_814/dl814_dj_48m/ip/coe/hrc_64_12_025.coe"
# "/home/josh/Workspace/vivado-git/projects/datalink_814/dl814_dj_48m/ip/coe/lpf_125k.coe"
# "/home/josh/Workspace/vivado-git/projects/datalink_814/dl814_dj_48m/ip/hop_rom/hop_rom.xci"
# "/home/josh/Workspace/vivado-git/projects/datalink_814/dl814_dj_48m/ip/hrc_64_12_025/hrc_64_12_025.xci"
# "/home/josh/Workspace/vivado-git/projects/datalink_814/dl814_dj_48m/ip/lpf_125k/lpf_125k.xci"
# "/home/josh/Workspace/vivado-git/projects/datalink_814/dl814_dj_48m/constraints/z7100_ad9528_ad9371.xdc"
# "/home/josh/Workspace/vivado-git/projects/datalink_814/dl814_dj_48m/testbenches/tb_tx_pn_seq.v"
#
#*****************************************************************************************
@@ -117,7 +118,7 @@ if { $::argc > 0 } {
}
# Set the directory path for the original project from where this script was exported
set orig_proj_dir "[file normalize "$origin_dir/dl814_dj"]"
set orig_proj_dir "[file normalize "$origin_dir/dl814_dj_48m"]"
# Create project
create_project ${_xil_proj_name_} ./${_xil_proj_name_} -part xc7z100ffg900-2
@@ -127,7 +128,7 @@ set proj_dir [get_property directory [current_project]]
# Set project properties
set obj [current_project]
set_property -name "compxlib.modelsim_compiled_library_dir" -value "C:/Mentor/CompLib/2019.1.3" -objects $obj
set_property -name "compxlib.modelsim_compiled_library_dir" -value "/home/josh/Workspace/vivado-git/projects/datalink_814/dl814_dj_48m/project/Mentor/CompLib/2019.1.3" -objects $obj
set_property -name "corecontainer.enable" -value "1" -objects $obj
set_property -name "default_lib" -value "xil_defaultlib" -objects $obj
set_property -name "dsa.accelerator_binary_content" -value "bitstream" -objects $obj
@@ -177,19 +178,17 @@ set files [list \
[file normalize "${origin_dir}/../ip/ila_tx_rx/ila_tx_rx.xci"] \
[file normalize "${origin_dir}/../ip/cmpy_18x8/cmpy_18x8.xci"] \
[file normalize "${origin_dir}/../ip/dds_32b_8b/dds_32b_8b.xci"] \
[file normalize "${origin_dir}/../ip/hop_rom/hop_rom.xci"] \
[file normalize "${origin_dir}/../ip/hrc_64_12_025/hrc_64_12_025.xci"] \
[file normalize "${origin_dir}/../ip/fifo_48m_to_122p88m/fifo_48m_to_122p88m.xci"] \
[file normalize "${origin_dir}/../ipi-bds/system_bd/system_bd.bd"] \
[file normalize "${origin_dir}/../ip/sig_clk_gen/sig_clk_gen.xci"] \
[file normalize "${origin_dir}/../rtl/rf_control.v"] \
[file normalize "${origin_dir}/../ipi-bds/system_bd/hdl/system_bd_wrapper.v"] \
[file normalize "${origin_dir}/../rtl/tx_control.v"] \
[file normalize "${origin_dir}/../rtl/tx_pn_seq_6mcps.v"] \
[file normalize "${origin_dir}/../rtl/tx_qpsk.v"] \
[file normalize "${origin_dir}/../rtl/system_top.v"] \
[file normalize "${origin_dir}/../ip/coe/sweep_freq.coe"] \
[file normalize "${origin_dir}/../ip/coe/hrc_64_12_025.coe"] \
[file normalize "${origin_dir}/../rtl/tx_pn_seq_6mcps.v"] \
[file normalize "${origin_dir}/../ip/fifo_48m_to_122p88m/fifo_48m_to_122p88m.xci"] \
[file normalize "${origin_dir}/../ip/lpf_125k/lpf_125k.xci"] \
[file normalize "${origin_dir}/../ip/coe/lpf_125k.coe"] \
]
add_files -norecurse -fileset $obj $files
@@ -249,16 +248,7 @@ if { ![get_property "is_locked" $file_obj] } {
set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj
}
set file "$origin_dir/../ip/hop_rom/hop_rom.xci"
set file [file normalize $file]
set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]]
set_property -name "generate_files_for_reference" -value "0" -objects $file_obj
set_property -name "registered_with_manager" -value "1" -objects $file_obj
if { ![get_property "is_locked" $file_obj] } {
set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj
}
set file "$origin_dir/../ip/hrc_64_12_025/hrc_64_12_025.xci"
set file "$origin_dir/../ip/fifo_48m_to_122p88m/fifo_48m_to_122p88m.xci"
set file [file normalize $file]
set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]]
set_property -name "generate_files_for_reference" -value "0" -objects $file_obj
@@ -281,16 +271,24 @@ if { ![get_property "is_locked" $file_obj] } {
set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj
}
set file "$origin_dir/../ip/fifo_48m_to_122p88m/fifo_48m_to_122p88m.xci"
set file [file normalize $file]
set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]]
set_property -name "generate_files_for_reference" -value "0" -objects $file_obj
set_property -name "registered_with_manager" -value "1" -objects $file_obj
if { ![get_property "is_locked" $file_obj] } {
set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj
}
set file "$origin_dir/../ip/lpf_125k/lpf_125k.xci"
# Set 'sources_1' fileset file properties for local files
# None
# Set 'sources_1' fileset properties
set obj [get_filesets sources_1]
set_property -name "top" -value "system_top" -objects $obj
set_property -name "top_auto_set" -value "0" -objects $obj
# Set 'sources_1' fileset object
set obj [get_filesets sources_1]
set files [list \
[file normalize "${origin_dir}/../ip/hop_rom/hop_rom.xci"] \
]
add_files -norecurse -fileset $obj $files
# Set 'sources_1' fileset file properties for remote files
set file "$origin_dir/../ip/hop_rom/hop_rom.xci"
set file [file normalize $file]
set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]]
set_property -name "generate_files_for_reference" -value "0" -objects $file_obj
@@ -303,10 +301,47 @@ if { ![get_property "is_locked" $file_obj] } {
# Set 'sources_1' fileset file properties for local files
# None
# Set 'sources_1' fileset properties
# Set 'sources_1' fileset object
set obj [get_filesets sources_1]
set_property -name "top" -value "system_top" -objects $obj
set_property -name "top_auto_set" -value "0" -objects $obj
set files [list \
[file normalize "${origin_dir}/../ip/hrc_64_12_025/hrc_64_12_025.xci"] \
]
add_files -norecurse -fileset $obj $files
# Set 'sources_1' fileset file properties for remote files
set file "$origin_dir/../ip/hrc_64_12_025/hrc_64_12_025.xci"
set file [file normalize $file]
set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]]
set_property -name "generate_files_for_reference" -value "0" -objects $file_obj
set_property -name "registered_with_manager" -value "1" -objects $file_obj
if { ![get_property "is_locked" $file_obj] } {
set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj
}
# Set 'sources_1' fileset file properties for local files
# None
# Set 'sources_1' fileset object
set obj [get_filesets sources_1]
set files [list \
[file normalize "${origin_dir}/../ip/lpf_125k/lpf_125k.xci"] \
]
add_files -norecurse -fileset $obj $files
# Set 'sources_1' fileset file properties for remote files
set file "$origin_dir/../ip/lpf_125k/lpf_125k.xci"
set file [file normalize $file]
set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]]
set_property -name "generate_files_for_reference" -value "0" -objects $file_obj
set_property -name "registered_with_manager" -value "1" -objects $file_obj
if { ![get_property "is_locked" $file_obj] } {
set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj
}
# Set 'sources_1' fileset file properties for local files
# None
# Create 'constrs_1' fileset (if not found)
if {[string equal [get_filesets -quiet constrs_1] ""]} {
projects/datalink_814/dl814_dj_48m/project/dl814_dj_48m/dl814_dj_48m.runs/impl_1/system_top.bit
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projects/datalink_814/dl814_dj_48m/project/dl814_dj_48m/dl814_dj_48m.sdk/SDK.log
+6 -6
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@@ -1,6 +1,6 @@
19:50:44 INFO : Registering command handlers for SDK TCF services
19:50:45 INFO : Launching XSCT server: xsct.bat -interactive D:\vivado-git\projects\datalink_814\dl814_dj_48m\project\dl814_dj_48m\dl814_dj_48m.sdk\temp_xsdb_launch_script.tcl
19:50:47 INFO : XSCT server has started successfully.
19:50:47 INFO : Successfully done setting XSCT server connection channel
19:50:47 INFO : Successfully done setting SDK workspace
19:50:47 INFO : Processing command line option -hwspec D:/vivado-git/projects/datalink_814/dl814_dj_48m/project/dl814_dj_48m/dl814_dj_48m.sdk/system_top.hdf.
19:02:21 INFO : Registering command handlers for SDK TCF services
19:02:22 INFO : Launching XSCT server: xsct -n -interactive /home/josh/Workspace/vivado-git/projects/datalink_814/dl814_dj_48m/project/dl814_dj_48m/dl814_dj_48m.sdk/temp_xsdb_launch_script.tcl
19:02:24 INFO : XSCT server has started successfully.
19:02:24 INFO : Successfully done setting XSCT server connection channel
19:02:24 INFO : Successfully done setting SDK workspace
19:02:24 INFO : Processing command line option -hwspec /home/josh/Workspace/vivado-git/projects/datalink_814/dl814_dj_48m/project/dl814_dj_48m/dl814_dj_48m.sdk/system_top.hdf.
projects/datalink_814/dl814_dj_48m/project/dl814_dj_48m/dl814_dj_48m.sdk/dl814_dj/.cproject
+69 -69
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@@ -1,8 +1,8 @@
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
<storageModule moduleId="org.eclipse.cdt.core.settings">
<cconfiguration id="xilinx.gnu.armv7.exe.debug.456866805">
<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="xilinx.gnu.armv7.exe.debug.456866805" moduleId="org.eclipse.cdt.core.settings" name="Debug">
<cconfiguration id="xilinx.gnu.armv7.exe.debug.1756187496">
<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="xilinx.gnu.armv7.exe.debug.1756187496" moduleId="org.eclipse.cdt.core.settings" name="Debug">
<externalSettings/>
<extensions>
<extension id="com.xilinx.sdk.managedbuilder.XELF.arm.a53.x32" point="org.eclipse.cdt.core.BinaryParser"/>
@@ -14,64 +14,64 @@
</extensions>
</storageModule>
<storageModule moduleId="cdtBuildSystem" version="4.0.0">
<configuration artifactExtension="elf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" cleanCommand="rm -rf" description="" id="xilinx.gnu.armv7.exe.debug.456866805" name="Debug" parent="xilinx.gnu.armv7.exe.debug" prebuildStep="a9-linaro-pre-build-step">
<folderInfo id="xilinx.gnu.armv7.exe.debug.456866805." name="/" resourcePath="">
<toolChain id="xilinx.gnu.armv7.exe.debug.toolchain.1586845971" name="Xilinx ARM v7 GNU Toolchain" superClass="xilinx.gnu.armv7.exe.debug.toolchain">
<targetPlatform binaryParser="com.xilinx.sdk.managedbuilder.XELF.arm.a53.x32" id="xilinx.armv7.target.gnu.base.debug.1938071845" isAbstract="false" name="Debug Platform" superClass="xilinx.armv7.target.gnu.base.debug"/>
<builder buildPath="${workspace_loc:/dl814_dj}/Debug" enableAutoBuild="true" id="xilinx.gnu.armv7.toolchain.builder.debug.617630868" managedBuildOn="true" name="GNU make.Debug" superClass="xilinx.gnu.armv7.toolchain.builder.debug"/>
<tool id="xilinx.gnu.armv7.c.toolchain.assembler.debug.1047573726" name="ARM v7 gcc assembler" superClass="xilinx.gnu.armv7.c.toolchain.assembler.debug">
<inputType id="xilinx.gnu.assembler.input.555402685" superClass="xilinx.gnu.assembler.input"/>
<configuration artifactExtension="elf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" cleanCommand="rm -rf" description="" id="xilinx.gnu.armv7.exe.debug.1756187496" name="Debug" parent="xilinx.gnu.armv7.exe.debug" prebuildStep="a9-linaro-pre-build-step">
<folderInfo id="xilinx.gnu.armv7.exe.debug.1756187496." name="/" resourcePath="">
<toolChain id="xilinx.gnu.armv7.exe.debug.toolchain.625277635" name="Xilinx ARM v7 GNU Toolchain" superClass="xilinx.gnu.armv7.exe.debug.toolchain">
<targetPlatform binaryParser="com.xilinx.sdk.managedbuilder.XELF.arm.a53.x32" id="xilinx.armv7.target.gnu.base.debug.2031354305" isAbstract="false" name="Debug Platform" superClass="xilinx.armv7.target.gnu.base.debug"/>
<builder buildPath="${workspace_loc:/dl814_dj}/Debug" enableAutoBuild="true" id="xilinx.gnu.armv7.toolchain.builder.debug.1118033327" managedBuildOn="true" name="GNU make.Debug" superClass="xilinx.gnu.armv7.toolchain.builder.debug"/>
<tool id="xilinx.gnu.armv7.c.toolchain.assembler.debug.38172580" name="ARM v7 gcc assembler" superClass="xilinx.gnu.armv7.c.toolchain.assembler.debug">
<inputType id="xilinx.gnu.assembler.input.1180917892" superClass="xilinx.gnu.assembler.input"/>
</tool>
<tool id="xilinx.gnu.armv7.c.toolchain.compiler.debug.1774665460" name="ARM v7 gcc compiler" superClass="xilinx.gnu.armv7.c.toolchain.compiler.debug">
<option defaultValue="gnu.c.optimization.level.none" id="xilinx.gnu.compiler.option.optimization.level.1889061760" superClass="xilinx.gnu.compiler.option.optimization.level" valueType="enumerated"/>
<option id="xilinx.gnu.compiler.option.debugging.level.1005499451" superClass="xilinx.gnu.compiler.option.debugging.level" value="gnu.c.debugging.level.max" valueType="enumerated"/>
<option id="xilinx.gnu.compiler.inferred.swplatform.includes.76473003" superClass="xilinx.gnu.compiler.inferred.swplatform.includes" valueType="includePath">
<tool id="xilinx.gnu.armv7.c.toolchain.compiler.debug.1063747524" name="ARM v7 gcc compiler" superClass="xilinx.gnu.armv7.c.toolchain.compiler.debug">
<option defaultValue="gnu.c.optimization.level.none" id="xilinx.gnu.compiler.option.optimization.level.1388234162" superClass="xilinx.gnu.compiler.option.optimization.level" valueType="enumerated"/>
<option id="xilinx.gnu.compiler.option.debugging.level.1805521145" superClass="xilinx.gnu.compiler.option.debugging.level" value="gnu.c.debugging.level.max" valueType="enumerated"/>
<option id="xilinx.gnu.compiler.inferred.swplatform.includes.135110474" superClass="xilinx.gnu.compiler.inferred.swplatform.includes" valueType="includePath">
<listOptionValue builtIn="false" value="../../dl814_dj_bsp/ps7_cortexa9_0/include"/>
</option>
<option id="xilinx.gnu.compiler.misc.other.625569201" superClass="xilinx.gnu.compiler.misc.other" value="-c -fmessage-length=0 -MT&quot;$@&quot; -mcpu=cortex-a9 -mfpu=vfpv3 -mfloat-abi=hard" valueType="string"/>
<inputType id="xilinx.gnu.armv7.c.compiler.input.1183684244" name="C source files" superClass="xilinx.gnu.armv7.c.compiler.input"/>
<option id="xilinx.gnu.compiler.misc.other.2028278432" superClass="xilinx.gnu.compiler.misc.other" value="-c -fmessage-length=0 -MT&quot;$@&quot; -mcpu=cortex-a9 -mfpu=vfpv3 -mfloat-abi=hard" valueType="string"/>
<inputType id="xilinx.gnu.armv7.c.compiler.input.1862984401" name="C source files" superClass="xilinx.gnu.armv7.c.compiler.input"/>
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projects/datalink_814/dl814_dj_48m/project/dl814_dj_48m/dl814_dj_48m.sdk/dl814_dj/src/hardware/common.c
+275 -275
View File
@@ -1,275 +1,275 @@
/**
* \file common.c
* \brief Contains Mykonos API common wrapper functions for user hardware platform drivers
*/
/**
* \page Disclaimer Legal Disclaimer
* Copyright 2015-2017 Analog Devices Inc.
* Released under the AD9371 API license, for more information see the "LICENSE.txt" file in this zip file.
*
*/
#include <stdio.h>
#include <time.h>
#include <errno.h>
#include <stdint.h>
#include <stdlib.h>
#include "common.h"
#include "platform_drivers.h"
#include "parameters.h"
ADI_LOGLEVEL CMB_LOGLEVEL = ADIHAL_LOG_NONE;
static uint32_t _desired_time_to_elapse_us = 0;
struct spi_desc *spi_ad_desc;
struct gpio_desc *gpio_ad9371_resetb;
struct gpio_desc *gpio_ad9528_resetb;
struct gpio_desc *gpio_ad9528_sysref_req;
commonErr_t CMB_initPlatform(void)
{
struct spi_init_param spi_param;
int32_t status = COMMONERR_OK;
status |= gpio_get(&gpio_ad9371_resetb, AD9371_RESET_B);
status |= gpio_get(&gpio_ad9528_resetb, AD9528_RESET_B);
status |= gpio_get(&gpio_ad9528_sysref_req, AD9528_SYSREF_REQ);
spi_param.id = 0;
spi_param.mode = SPI_MODE_0;
spi_param.chip_select = AD9371_CS;
spi_param.max_speed_hz = 25000000u;
status |= spi_init(&spi_ad_desc, &spi_param);
if (status != SUCCESS) {
return COMMONERR_FAILED;
}
return COMMONERR_OK;
}
commonErr_t CMB_closeHardware(void)
{
return(COMMONERR_OK);
}
commonErr_t CMB_setGPIO(uint32_t GPIO)
{
return(COMMONERR_OK);
}
commonErr_t CMB_hardReset(uint8_t spiChipSelectIndex)
{
struct gpio_desc *reset_gpio;
switch (spiChipSelectIndex) {
case AD9371_CS:
reset_gpio = gpio_ad9371_resetb;
break;
case AD9528_CS:
reset_gpio = gpio_ad9528_resetb;
break;
default:
return(COMMONERR_FAILED);
}
gpio_direction_output(reset_gpio, 1);
CMB_wait_ms(1);
gpio_direction_output(reset_gpio, 0);
CMB_wait_ms(1);
gpio_direction_output(reset_gpio, 1);
CMB_wait_ms(1);
return(COMMONERR_OK);
}
commonErr_t CMB_setSPIOptions(spiSettings_t *spiSettings)
{
return(COMMONERR_OK);
}
commonErr_t CMB_setSPIChannel(uint16_t chipSelectIndex )
{
return(COMMONERR_OK);
}
commonErr_t CMB_SPIWriteByte(spiSettings_t *spiSettings, uint16_t addr,
uint8_t data)
{
uint8_t buf[3];
spi_ad_desc->chip_select = spiSettings->chipSelectIndex - 1;
buf[0] = (uint8_t) ((addr >> 8) & 0x7f);
buf[1] = (uint8_t) (addr & 0xff);
buf[2] = (uint8_t) data;
spi_write_and_read(spi_ad_desc, buf, 3);
return(COMMONERR_OK);
}
commonErr_t CMB_SPIWriteBytes(spiSettings_t *spiSettings, uint16_t *addr,
uint8_t *data, uint32_t count)
{
uint32_t index;
for (index = 0; index < count; index++)
if (CMB_SPIWriteByte(spiSettings, *(addr + index),
*(data + index)) != COMMONERR_OK)
return(COMMONERR_FAILED);
return(COMMONERR_OK);
}
commonErr_t CMB_SPIReadByte(spiSettings_t *spiSettings, uint16_t addr,
uint8_t *readdata)
{
uint8_t buf[3];
spi_ad_desc->chip_select = spiSettings->chipSelectIndex - 1;
buf[0] = (uint8_t) ((addr >> 8) | 0x80);
buf[1] = (uint8_t) (addr & 0xff);
buf[2] = (uint8_t) 0x00;
spi_write_and_read(spi_ad_desc, buf, 3);
*readdata = buf[2];
return(COMMONERR_OK);
}
commonErr_t CMB_SPIWriteField(spiSettings_t *spiSettings, uint16_t addr,
uint8_t field_val, uint8_t mask, uint8_t start_bit)
{
uint8_t data;
if (CMB_SPIReadByte(spiSettings, addr, &data) != COMMONERR_OK)
return(COMMONERR_FAILED);
data = (data & ~mask) | ((field_val << start_bit) & mask);
if (CMB_SPIWriteByte(spiSettings, addr, data) != COMMONERR_OK)
return(COMMONERR_FAILED);
return(COMMONERR_OK);
}
/* read a field in a single register space (not multibyte fields) */
commonErr_t CMB_SPIReadField(spiSettings_t *spiSettings, uint16_t addr,
uint8_t *field_val, uint8_t mask, uint8_t start_bit)
{
uint8_t data;
if (CMB_SPIReadByte(spiSettings, addr, &data) != COMMONERR_OK)
return(COMMONERR_FAILED);
data = (data & mask) >> start_bit;
*field_val = data;
return(COMMONERR_OK);
}
commonErr_t CMB_writeToLog(ADI_LOGLEVEL level, uint8_t deviceIndex,
uint32_t errorCode, const char *comment)
{
if((CMB_LOGLEVEL & ADIHAL_LOG_ERROR) && (level == ADIHAL_LOG_ERROR)) {
printf("ERROR: %d: %s", (int)errorCode, comment);
} else if((CMB_LOGLEVEL & ADIHAL_LOG_WARNING)
&& (level == ADIHAL_LOG_WARNING)) {
printf("WARNING: %d: %s",(int)errorCode, comment);
} else if((CMB_LOGLEVEL & ADIHAL_LOG_MESSAGE)
&& (level == ADIHAL_LOG_MESSAGE)) {
printf("MESSAGE: %d: %s",(int)errorCode, comment);
} else if(CMB_LOGLEVEL == ADIHAL_LOG_NONE ) {
//printf("MESSAGE: %d: %s",(int)errorCode, comment);
} else {
printf("Undefined Log Level: 0x%X", level);
}
return(COMMONERR_OK);
}
/* if filename null, a default path will be used in logging.c */
commonErr_t CMB_openLog(const char *filename)
{
return(COMMONERR_OK);
}
commonErr_t CMB_closeLog(void)
{
return(COMMONERR_OK);
}
commonErr_t CMB_flushLog(void)
{
return(COMMONERR_OK);
}
commonErr_t CMB_wait_ms(uint32_t time_ms)
{
mdelay(time_ms);
return(COMMONERR_OK);
}
commonErr_t CMB_wait_us(uint32_t time_us)
{
udelay(time_us);
return(COMMONERR_OK);
}
commonErr_t CMB_setTimeout_ms(uint32_t timeOut_ms)
{
#ifdef _XPARAMETERS_PS_H_
_desired_time_to_elapse_us = timeOut_ms * 1000;
#else
_desired_time_to_elapse_us = timeOut_ms * 50; // FIXME
#endif
return(COMMONERR_OK);
}
commonErr_t CMB_setTimeout_us(uint32_t timeOut_us)
{
_desired_time_to_elapse_us = timeOut_us;
return(COMMONERR_OK);
}
commonErr_t CMB_hasTimeoutExpired()
{
udelay(1);
_desired_time_to_elapse_us--;
if (_desired_time_to_elapse_us > 0)
return(COMMONERR_OK);
return(COMMONERR_FAILED);
}
commonErr_t CMB_regRead(uint32_t offset, uint32_t *data)
{
return(COMMONERR_OK);
}
commonErr_t CMB_regWrite(uint32_t offset, uint32_t data)
{
return(COMMONERR_OK);
}
commonErr_t CMB_memRead(uint32_t offset, uint32_t *data, uint32_t len)
{
return(COMMONERR_OK);
}
commonErr_t CMB_memWrite(uint32_t offset, uint32_t *data, uint32_t len)
{
return(COMMONERR_OK);
}
/**
* \file common.c
* \brief Contains Mykonos API common wrapper functions for user hardware platform drivers
*/
/**
* \page Disclaimer Legal Disclaimer
* Copyright 2015-2017 Analog Devices Inc.
* Released under the AD9371 API license, for more information see the "LICENSE.txt" file in this zip file.
*
*/
#include <stdio.h>
#include <time.h>
#include <errno.h>
#include <stdint.h>
#include <stdlib.h>
#include "common.h"
#include "platform_drivers.h"
#include "parameters.h"
ADI_LOGLEVEL CMB_LOGLEVEL = ADIHAL_LOG_NONE;
static uint32_t _desired_time_to_elapse_us = 0;
struct spi_desc *spi_ad_desc;
struct gpio_desc *gpio_ad9371_resetb;
struct gpio_desc *gpio_ad9528_resetb;
struct gpio_desc *gpio_ad9528_sysref_req;
commonErr_t CMB_initPlatform(void)
{
struct spi_init_param spi_param;
int32_t status = COMMONERR_OK;
status |= gpio_get(&gpio_ad9371_resetb, AD9371_RESET_B);
status |= gpio_get(&gpio_ad9528_resetb, AD9528_RESET_B);
status |= gpio_get(&gpio_ad9528_sysref_req, AD9528_SYSREF_REQ);
spi_param.id = 0;
spi_param.mode = SPI_MODE_0;
spi_param.chip_select = AD9371_CS;
spi_param.max_speed_hz = 25000000u;
status |= spi_init(&spi_ad_desc, &spi_param);
if (status != SUCCESS) {
return COMMONERR_FAILED;
}
return COMMONERR_OK;
}
commonErr_t CMB_closeHardware(void)
{
return(COMMONERR_OK);
}
commonErr_t CMB_setGPIO(uint32_t GPIO)
{
return(COMMONERR_OK);
}
commonErr_t CMB_hardReset(uint8_t spiChipSelectIndex)
{
struct gpio_desc *reset_gpio;
switch (spiChipSelectIndex) {
case AD9371_CS:
reset_gpio = gpio_ad9371_resetb;
break;
case AD9528_CS:
reset_gpio = gpio_ad9528_resetb;
break;
default:
return(COMMONERR_FAILED);
}
gpio_direction_output(reset_gpio, 1);
CMB_wait_ms(1);
gpio_direction_output(reset_gpio, 0);
CMB_wait_ms(1);
gpio_direction_output(reset_gpio, 1);
CMB_wait_ms(1);
return(COMMONERR_OK);
}
commonErr_t CMB_setSPIOptions(spiSettings_t *spiSettings)
{
return(COMMONERR_OK);
}
commonErr_t CMB_setSPIChannel(uint16_t chipSelectIndex )
{
return(COMMONERR_OK);
}
commonErr_t CMB_SPIWriteByte(spiSettings_t *spiSettings, uint16_t addr,
uint8_t data)
{
uint8_t buf[3];
spi_ad_desc->chip_select = spiSettings->chipSelectIndex - 1;
buf[0] = (uint8_t) ((addr >> 8) & 0x7f);
buf[1] = (uint8_t) (addr & 0xff);
buf[2] = (uint8_t) data;
spi_write_and_read(spi_ad_desc, buf, 3);
return(COMMONERR_OK);
}
commonErr_t CMB_SPIWriteBytes(spiSettings_t *spiSettings, uint16_t *addr,
uint8_t *data, uint32_t count)
{
uint32_t index;
for (index = 0; index < count; index++)
if (CMB_SPIWriteByte(spiSettings, *(addr + index),
*(data + index)) != COMMONERR_OK)
return(COMMONERR_FAILED);
return(COMMONERR_OK);
}
commonErr_t CMB_SPIReadByte(spiSettings_t *spiSettings, uint16_t addr,
uint8_t *readdata)
{
uint8_t buf[3];
spi_ad_desc->chip_select = spiSettings->chipSelectIndex - 1;
buf[0] = (uint8_t) ((addr >> 8) | 0x80);
buf[1] = (uint8_t) (addr & 0xff);
buf[2] = (uint8_t) 0x00;
spi_write_and_read(spi_ad_desc, buf, 3);
*readdata = buf[2];
return(COMMONERR_OK);
}
commonErr_t CMB_SPIWriteField(spiSettings_t *spiSettings, uint16_t addr,
uint8_t field_val, uint8_t mask, uint8_t start_bit)
{
uint8_t data;
if (CMB_SPIReadByte(spiSettings, addr, &data) != COMMONERR_OK)
return(COMMONERR_FAILED);
data = (data & ~mask) | ((field_val << start_bit) & mask);
if (CMB_SPIWriteByte(spiSettings, addr, data) != COMMONERR_OK)
return(COMMONERR_FAILED);
return(COMMONERR_OK);
}
/* read a field in a single register space (not multibyte fields) */
commonErr_t CMB_SPIReadField(spiSettings_t *spiSettings, uint16_t addr,
uint8_t *field_val, uint8_t mask, uint8_t start_bit)
{
uint8_t data;
if (CMB_SPIReadByte(spiSettings, addr, &data) != COMMONERR_OK)
return(COMMONERR_FAILED);
data = (data & mask) >> start_bit;
*field_val = data;
return(COMMONERR_OK);
}
commonErr_t CMB_writeToLog(ADI_LOGLEVEL level, uint8_t deviceIndex,
uint32_t errorCode, const char *comment)
{
if((CMB_LOGLEVEL & ADIHAL_LOG_ERROR) && (level == ADIHAL_LOG_ERROR)) {
printf("ERROR: %d: %s", (int)errorCode, comment);
} else if((CMB_LOGLEVEL & ADIHAL_LOG_WARNING)
&& (level == ADIHAL_LOG_WARNING)) {
printf("WARNING: %d: %s",(int)errorCode, comment);
} else if((CMB_LOGLEVEL & ADIHAL_LOG_MESSAGE)
&& (level == ADIHAL_LOG_MESSAGE)) {
printf("MESSAGE: %d: %s",(int)errorCode, comment);
} else if(CMB_LOGLEVEL == ADIHAL_LOG_NONE ) {
//printf("MESSAGE: %d: %s",(int)errorCode, comment);
} else {
printf("Undefined Log Level: 0x%X", level);
}
return(COMMONERR_OK);
}
/* if filename null, a default path will be used in logging.c */
commonErr_t CMB_openLog(const char *filename)
{
return(COMMONERR_OK);
}
commonErr_t CMB_closeLog(void)
{
return(COMMONERR_OK);
}
commonErr_t CMB_flushLog(void)
{
return(COMMONERR_OK);
}
commonErr_t CMB_wait_ms(uint32_t time_ms)
{
mdelay(time_ms);
return(COMMONERR_OK);
}
commonErr_t CMB_wait_us(uint32_t time_us)
{
udelay(time_us);
return(COMMONERR_OK);
}
commonErr_t CMB_setTimeout_ms(uint32_t timeOut_ms)
{
#ifdef _XPARAMETERS_PS_H_
_desired_time_to_elapse_us = timeOut_ms * 1000;
#else
_desired_time_to_elapse_us = timeOut_ms * 50; // FIXME
#endif
return(COMMONERR_OK);
}
commonErr_t CMB_setTimeout_us(uint32_t timeOut_us)
{
_desired_time_to_elapse_us = timeOut_us;
return(COMMONERR_OK);
}
commonErr_t CMB_hasTimeoutExpired()
{
udelay(1);
_desired_time_to_elapse_us--;
if (_desired_time_to_elapse_us > 0)
return(COMMONERR_OK);
return(COMMONERR_FAILED);
}
commonErr_t CMB_regRead(uint32_t offset, uint32_t *data)
{
return(COMMONERR_OK);
}
commonErr_t CMB_regWrite(uint32_t offset, uint32_t data)
{
return(COMMONERR_OK);
}
commonErr_t CMB_memRead(uint32_t offset, uint32_t *data, uint32_t len)
{
return(COMMONERR_OK);
}
commonErr_t CMB_memWrite(uint32_t offset, uint32_t *data, uint32_t len)
{
return(COMMONERR_OK);
}
projects/datalink_814/dl814_dj_48m/project/dl814_dj_48m/dl814_dj_48m.sdk/dl814_dj/src/hardware/common.h
+131 -131
View File
@@ -1,131 +1,131 @@
/**
* \file common.h
* \brief Contains type definitions and prototype declarations for common.c
*/
/**
* \page Disclaimer Legal Disclaimer
* Copyright 2015-2017 Analog Devices Inc.
* Released under the AD9371 API license, for more information see the "LICENSE.txt" file in this zip file.
*
*/
#ifndef _COMMON_H_
#define _COMMON_H_
#ifdef __cplusplus
extern "C" {
#endif
/* build project settings include the path to the desired platform folder for correct includes */
#include "stdint.h"
#define THROW_ERROR()
#define SPIARRAYSIZE 1024
/* assuming 3 byte SPI message - integer math enforces floor() */
#define SPIARRAYTRIPSIZE ((SPIARRAYSIZE / 3) * 3)
/*========================================
* Enums and structures
*=======================================*/
/* proposed to increase number of error return values to make unique for each return */
typedef enum
{
ADIERR_OK=0,
ADIERR_INV_PARM,
ADIERR_FAILED
} ADI_ERR;
/*!< \brief COMMON layer error reporting enumerated types */
typedef enum
{
COMMONERR_OK=0,
COMMONERR_FAILED
} commonErr_t;
/* bit 0 is MESSAGE, bit 1 is WARNING, bit 2 is ERROR */
typedef enum
{
ADIHAL_LOG_NONE = 0x0,
ADIHAL_LOG_MESSAGE = 0x1,
ADIHAL_LOG_WARNING = 0x2,
ADIHAL_LOG_ERROR = 0x4,
ADIHAL_LOG_SPI = 0x8,
ADIHAL_LOG_AXI_REG = 0x10,
ADIHAL_LOG_AXI_MEM = 0x20,
ADIHAL_LOG_ALL = 0x3F
} ADI_LOGLEVEL;
/**
* \brief Data structure to hold SPI settings for all system device types
*/
typedef struct
{
uint8_t chipSelectIndex; ///< valid 1~8
uint8_t writeBitPolarity; ///< the level of the write bit of a SPI write instruction word, value is inverted for SPI read operation
uint8_t longInstructionWord; ///< 1 = 16bit instruction word, 0 = 8bit instruction word
uint8_t MSBFirst; ///< 1 = MSBFirst, 0 = LSBFirst
uint8_t CPHA; ///< clock phase, sets which clock edge the data updates (valid 0 or 1)
uint8_t CPOL; ///< clock polarity 0 = clock starts low, 1 = clock starts high
uint8_t enSpiStreaming; ///< Not implemented. SW feature to improve SPI throughput.
uint8_t autoIncAddrUp; ///< Not implemented. For SPI Streaming, set address increment direction. 1= next addr = addr+1, 0:addr = addr-1
uint8_t fourWireMode; ///< 1: Use 4-wire SPI, 0: 3-wire SPI (SDIO pin is bidirectional). NOTE: ADI's FPGA platform always uses 4-wire mode.
uint32_t spiClkFreq_Hz; ///< SPI Clk frequency in Hz (default 25000000), platform will use next lowest frequency that it's baud rate generator can create */
} spiSettings_t;
/* global variable so application layer can set the log level */
extern ADI_LOGLEVEL CMB_LOGLEVEL;
extern struct spi_desc *spi_ad_desc;
extern struct gpio_desc *gpio_ad9371_resetb;
extern struct gpio_desc *gpio_ad9528_resetb;
extern struct gpio_desc *gpio_ad9528_sysref_req;
/* initialize hardware platform */
commonErr_t CMB_initPlatform(void);
/* close hardware pointers */
commonErr_t CMB_closeHardware(void);
/* GPIO function */
commonErr_t CMB_setGPIO(uint32_t GPIO);
/* hardware reset function */
commonErr_t CMB_hardReset(uint8_t spiChipSelectIndex);
/* SPI read/write functions */
commonErr_t CMB_setSPIOptions(spiSettings_t *spiSettings); /* allows the platform HAL to work with devices with various SPI settings */
commonErr_t CMB_setSPIChannel(uint16_t chipSelectIndex ); /* value of 0 deasserts all chip selects */
commonErr_t CMB_SPIWriteByte(spiSettings_t *spiSettings, uint16_t addr, uint8_t data); /* single SPI byte write function */
commonErr_t CMB_SPIWriteBytes(spiSettings_t *spiSettings, uint16_t *addr, uint8_t *data, uint32_t count);
commonErr_t CMB_SPIReadByte (spiSettings_t *spiSettings, uint16_t addr, uint8_t *readdata); /* single SPI byte read function */
commonErr_t CMB_SPIWriteField(spiSettings_t *spiSettings, uint16_t addr, uint8_t field_val, uint8_t mask, uint8_t start_bit); /* write a field in a single register */
commonErr_t CMB_SPIReadField (spiSettings_t *spiSettings, uint16_t addr, uint8_t *field_val, uint8_t mask, uint8_t start_bit); /* read a field in a single register */
/* platform timer functions */
commonErr_t CMB_wait_ms(uint32_t time_ms);
commonErr_t CMB_wait_us(uint32_t time_us);
commonErr_t CMB_setTimeout_ms(uint32_t timeOut_ms);
commonErr_t CMB_setTimeout_us(uint32_t timeOut_us);
commonErr_t CMB_hasTimeoutExpired();
/* platform logging functions */
commonErr_t CMB_openLog(const char *filename);
commonErr_t CMB_closeLog(void);
commonErr_t CMB_writeToLog(ADI_LOGLEVEL level, uint8_t deviceIndex, uint32_t errorCode, const char *comment);
commonErr_t CMB_flushLog(void);
/* platform FPGA AXI register read/write functions */
commonErr_t CMB_regRead(uint32_t offset, uint32_t *data);
commonErr_t CMB_regWrite(uint32_t offset, uint32_t data);
/* platform DDR3 memory read/write functions */
commonErr_t CMB_memRead(uint32_t offset, uint32_t *data, uint32_t len);
commonErr_t CMB_memWrite(uint32_t offset, uint32_t *data, uint32_t len);
#ifdef __cplusplus
}
#endif
#endif
/**
* \file common.h
* \brief Contains type definitions and prototype declarations for common.c
*/
/**
* \page Disclaimer Legal Disclaimer
* Copyright 2015-2017 Analog Devices Inc.
* Released under the AD9371 API license, for more information see the "LICENSE.txt" file in this zip file.
*
*/
#ifndef _COMMON_H_
#define _COMMON_H_
#ifdef __cplusplus
extern "C" {
#endif
/* build project settings include the path to the desired platform folder for correct includes */
#include "stdint.h"
#define THROW_ERROR()
#define SPIARRAYSIZE 1024
/* assuming 3 byte SPI message - integer math enforces floor() */
#define SPIARRAYTRIPSIZE ((SPIARRAYSIZE / 3) * 3)
/*========================================
* Enums and structures
*=======================================*/
/* proposed to increase number of error return values to make unique for each return */
typedef enum
{
ADIERR_OK=0,
ADIERR_INV_PARM,
ADIERR_FAILED
} ADI_ERR;
/*!< \brief COMMON layer error reporting enumerated types */
typedef enum
{
COMMONERR_OK=0,
COMMONERR_FAILED
} commonErr_t;
/* bit 0 is MESSAGE, bit 1 is WARNING, bit 2 is ERROR */
typedef enum
{
ADIHAL_LOG_NONE = 0x0,
ADIHAL_LOG_MESSAGE = 0x1,
ADIHAL_LOG_WARNING = 0x2,
ADIHAL_LOG_ERROR = 0x4,
ADIHAL_LOG_SPI = 0x8,
ADIHAL_LOG_AXI_REG = 0x10,
ADIHAL_LOG_AXI_MEM = 0x20,
ADIHAL_LOG_ALL = 0x3F
} ADI_LOGLEVEL;
/**
* \brief Data structure to hold SPI settings for all system device types
*/
typedef struct
{
uint8_t chipSelectIndex; ///< valid 1~8
uint8_t writeBitPolarity; ///< the level of the write bit of a SPI write instruction word, value is inverted for SPI read operation
uint8_t longInstructionWord; ///< 1 = 16bit instruction word, 0 = 8bit instruction word
uint8_t MSBFirst; ///< 1 = MSBFirst, 0 = LSBFirst
uint8_t CPHA; ///< clock phase, sets which clock edge the data updates (valid 0 or 1)
uint8_t CPOL; ///< clock polarity 0 = clock starts low, 1 = clock starts high
uint8_t enSpiStreaming; ///< Not implemented. SW feature to improve SPI throughput.
uint8_t autoIncAddrUp; ///< Not implemented. For SPI Streaming, set address increment direction. 1= next addr = addr+1, 0:addr = addr-1
uint8_t fourWireMode; ///< 1: Use 4-wire SPI, 0: 3-wire SPI (SDIO pin is bidirectional). NOTE: ADI's FPGA platform always uses 4-wire mode.
uint32_t spiClkFreq_Hz; ///< SPI Clk frequency in Hz (default 25000000), platform will use next lowest frequency that it's baud rate generator can create */
} spiSettings_t;
/* global variable so application layer can set the log level */
extern ADI_LOGLEVEL CMB_LOGLEVEL;
extern struct spi_desc *spi_ad_desc;
extern struct gpio_desc *gpio_ad9371_resetb;
extern struct gpio_desc *gpio_ad9528_resetb;
extern struct gpio_desc *gpio_ad9528_sysref_req;
/* initialize hardware platform */
commonErr_t CMB_initPlatform(void);
/* close hardware pointers */
commonErr_t CMB_closeHardware(void);
/* GPIO function */
commonErr_t CMB_setGPIO(uint32_t GPIO);
/* hardware reset function */
commonErr_t CMB_hardReset(uint8_t spiChipSelectIndex);
/* SPI read/write functions */
commonErr_t CMB_setSPIOptions(spiSettings_t *spiSettings); /* allows the platform HAL to work with devices with various SPI settings */
commonErr_t CMB_setSPIChannel(uint16_t chipSelectIndex ); /* value of 0 deasserts all chip selects */
commonErr_t CMB_SPIWriteByte(spiSettings_t *spiSettings, uint16_t addr, uint8_t data); /* single SPI byte write function */
commonErr_t CMB_SPIWriteBytes(spiSettings_t *spiSettings, uint16_t *addr, uint8_t *data, uint32_t count);
commonErr_t CMB_SPIReadByte (spiSettings_t *spiSettings, uint16_t addr, uint8_t *readdata); /* single SPI byte read function */
commonErr_t CMB_SPIWriteField(spiSettings_t *spiSettings, uint16_t addr, uint8_t field_val, uint8_t mask, uint8_t start_bit); /* write a field in a single register */
commonErr_t CMB_SPIReadField (spiSettings_t *spiSettings, uint16_t addr, uint8_t *field_val, uint8_t mask, uint8_t start_bit); /* read a field in a single register */
/* platform timer functions */
commonErr_t CMB_wait_ms(uint32_t time_ms);
commonErr_t CMB_wait_us(uint32_t time_us);
commonErr_t CMB_setTimeout_ms(uint32_t timeOut_ms);
commonErr_t CMB_setTimeout_us(uint32_t timeOut_us);
commonErr_t CMB_hasTimeoutExpired();
/* platform logging functions */
commonErr_t CMB_openLog(const char *filename);
commonErr_t CMB_closeLog(void);
commonErr_t CMB_writeToLog(ADI_LOGLEVEL level, uint8_t deviceIndex, uint32_t errorCode, const char *comment);
commonErr_t CMB_flushLog(void);
/* platform FPGA AXI register read/write functions */
commonErr_t CMB_regRead(uint32_t offset, uint32_t *data);
commonErr_t CMB_regWrite(uint32_t offset, uint32_t data);
/* platform DDR3 memory read/write functions */
commonErr_t CMB_memRead(uint32_t offset, uint32_t *data, uint32_t len);
commonErr_t CMB_memWrite(uint32_t offset, uint32_t *data, uint32_t len);
#ifdef __cplusplus
}
#endif
#endif
projects/datalink_814/dl814_dj_48m/project/dl814_dj_48m/dl814_dj_48m.sdk/dl814_dj/src/hardware/headless.h
+348 -348
View File
@@ -1,348 +1,348 @@
/*
* headless.h
*
* Created on: 2021Äê6ÔÂ8ÈÕ
* Author: Josh
*/
#ifndef SRC_HEADLESS_H_
#define SRC_HEADLESS_H_
/***************************** Include Files ********************************/
#include <stdlib.h>
#include <stdio.h>
#include "xil_cache.h"
#include "xscugic.h"
//#include "xgpio.h"
#include "common.h"
#include "./mykonos/ad9528.h"
#include "./mykonos/mykonos.h"
#include "./mykonos/Mykonos_M3.h"
#include "./mykonos/mykonos_gpio.h"
#include "myk_ad9528init.h"
#include "myk_init.h"
#include "parameters.h"
/************************** Constant Definitions *****************************/
/**************************** Type Definitions *******************************/
/***************** Macros (Inline Functions) Definitions *********************/
/************************** Variable Definitions *****************************/
/************************** Function Prototypes ******************************/
/*****************************************************************************/
/*
*
* This function setups ad9528 and ad9371 via spi.
*
* @param None.
*
* @return
* - ADIERR_FAILED if successful,
* - ADIERR_OK if not succesful
*
* @note None.
*
******************************************************************************/
int HARDWARE_initialize();
int HARDWARE_ad9371Config(void);
/*****************************************************************************/
/*
*
* Setup up Axi Gpio, through which ad9371 can be reconfigured. Axi Gpio
* instance and interrupt system initialization are included.
*
* @param None.
*
* @return
* - ADIERR_FAILED if successful,
* - ADIERR_OK if not succesful
*
* @note None.
*
******************************************************************************/
int HW_ad9371DynamicCfgInit(void);
/*****************************************************************************/
/*
*
* Setup up interrupt system, initialize exception handlers.
*
* @param DeviceId is the unique identifier for a device.
* @param GicPtr is a pointer to the XScuGic instance.
*
* @return
* - XST_SUCCESS if successful,
* - XST_FAILURE if not succesful
*
* @note None.
*
******************************************************************************/
int HW_setupIntrSystem(u16 DeviceId, XScuGic * GicPtr);
/*****************************************************************************/
/*
*
* Make the connection between the Int_Id of the interrupt source and the
* associated handler. Set the interrupt priority and trigger type for the
* specified IRQ source..
*
* @param GicPtr is a pointer to the XScuGic instance.
* @param Int_Id contains the ID of the interrupt source and should be
* in the range of 0 to XSCUGIC_MAX_NUM_INTR_INPUTS - 1
* @param Handler to the handler for that interrupt.
* @param CallBackRef is the callback reference, usually the instance
* pointer of the connecting driver.
* @param Priority is the new priority for the IRQ source. 0 is highest
* priority, 0xF8(248) is lowest. There are 32 priority levels
* supported with a step of 8. Hence the supported priorities are
* 0, 8, 16, 32, 40 ..., 248.
* @param Trigger is the new trigger type for the IRQ source.
* Each bit pair describes the configuration for an INT_ID.
* SFI Read Only b10 always
* PPI Read Only depending on how the PPIs are configured.
* b01 Active HIGH level sensitive
* b11 Rising edge sensitive
* SPI LSB is read only.
* b01 Active HIGH level sensitive
* b11 Rising edge sensitive/
*
* @return
* - XST_SUCCESS if successful,
* - XST_FAILURE if not succesful
*
* @note None.
*
******************************************************************************/
int HW_connectIntr(XScuGic *GicPtr,u32 IntrId,Xil_InterruptHandler Handler,
void *CallBackRef, u8 Priority, u8 Trigger);
/*****************************************************************************/
/*
*
* Initialize Analog Device related configuration profile. This is a HARDWARE-
* ASSOTIATED function, which may differ between different board.
*
* @param None.
*
* @return
* - ADIERR_OK if configuration profile exists,
* - ADIERR_FAILED if onfiguration profile does not exist
*
* @note None.
*
******************************************************************************/
int HW_adiCfgProfileInit(void);
/******************************************************************************/
/**
*
* This function conducts AD9528 device configuration initializing procedure.
*
* @param clockAD9528_device is a pointer to the data structure holding
* AD9528 settings, which contains basic AD9528 settings such as
* spi and gpio.
*
* @return
* - ADIERR_OK if successful.
* - ADIERR_FAILED if not successful.
*
* @note None.
*
*******************************************************************************/
int HW_9528Config(ad9528Device_t *clockAD9528_device);
/******************************************************************************/
/**
*
* This function read AD9528 reg508 status, to check whether ad9528 is locked or
* not.
*
* @param clockAD9528_device is a pointer to the data structure holding
* AD9528 settings, which contains basic AD9528 settings.
*
* @return
* - ADIERR_OK if successful.
* - ADIERR_FAILED if not successful.
*
* @note None.
*
*******************************************************************************/
int HW_9528GetLockStatus(ad9528Device_t *device, uint8_t *reg508);
/******************************************************************************/
/**
*
* Conduct AD9371 device configuration initializing procedure.
*
* @param clockAD9528_device is a pointer to the data structure holding
* AD9528 settings, which contains basic AD9528 settings.
* @param mykDevice is ADI hardware layer settings pointer specific to
* a Mykonos instance which contains basic settings such as spi,
* gpio, tx/rx and jesd configurations.
*
* @return
* - ADIERR_OK if successful.
* - ADIERR_FAILED if not successful.
*
* @note None.
*
*******************************************************************************/
int HW_9371Config(ad9528Device_t *clockAD9528_device, mykonosDevice_t *mykDevice);
/******************************************************************************/
/**
*
* Read AD9371's RX framer, ORX framer and TX deframer status, to check jesd204b
* sync status.
*
* @param mykDevice is ADI hardware layer settings pointer specific to
* a Mykonos instance which contains basic settings such as spi,
* gpio, tx/rx and jesd configurations.
* @param framerStatus is the RX framer status byte read
* framerStatus | Description
* -------------|-----------------------------------------------------------------------------
* [7] | SYSREF phase error ? a new SYSREF had different timing than the first that set the LMFC timing.
* [6] | Framer lane FIFO read/write pointer delta has changed. Can help debug issues with deterministic latency.
* [5] | Framer has received the SYSREF and has retimed its LMFC
* [4:2] | Framer ILAS state: 0=CGS, 1= 1st Multframe, 2= 2nd Multiframe, 3= 3rd Multiframe, 4= 4th multiframe, 5= Last multiframe, 6=invalid, 7= ILAS complete
* [1:0] | Framer Tx state: 0=CGS, 1= ILAS, 2 = ADC Data
* @param obsFramerStatus is the ORX framer status byte read
* obsFramerStatus | Description
* ----------------|-----------------------------------------------------------------------------
* [7] | SYSREF phase error ? a new SYSREF had different timing than the first that set the LMFC timing.
* [6] | Framer lane FIFO read/write pointer delta has changed. Can help debug issues with deterministic latency.
* [5] | Framer has received the SYSREF and has retimed its LMFC
* [4:2] | Framer ILAS state: 0=CGS, 1= 1st Multframe, 2= 2nd Multiframe, 3= 3rd Multiframe, 4= 4th multiframe, 5= Last multiframe, 6=invalid, 7= ILAS complete
* [1:0] | Framer Tx state: 0=CGS, 1= ILAS, 2 = ADC Data
* @param deframerStatus is the TX deframer status byte read
* deframerStatus | Bit Name | Description
* ----------------|--------------------------|---------------------------------------------
* [7] | Unused | Unused
* [6] | Deframer IRQ | This bit indicates that the IRQ interrupt was asserted.
* [5] | Deframer SYSREF Received | When this bit is set, it indicates that the SYSREF pulse was received by the deframer IP
* [4] | Deframer Receiver Error | This bit is set when PRBS has received an error.
* [3] | Valid Checksum | This bit is set when the received ILAS checksum is valid.
* [2] | EOF Event | This bit captures the internal status of the framer End of Frame event. Value =1 if framing error during ILAS
* [1] | EOMF Event | This bit captures the internal status of the framer End of Multi-Frame event. Value =1 if framing error during ILAS
* [0] | FS Lost | This bit captures the internal status of the framer Frame Symbol event. Value =1 if framing error during ILAS or user data (invalid replacement characters)
*
* @return
* - ADIERR_OK if successful.
* - ADIERR_FAILED if not successful.
*
* @note None.
*
*******************************************************************************/
int HW_9371CheckJesdStatus(mykonosDevice_t *mykDevice, uint8_t *framerStatus,
uint8_t *obsFramerStatus, uint8_t *deframerStatus);
/******************************************************************************/
/**
*
* This function conducts AD9371/9375 samll RF PLL frequcny change procedure. The
* procedure is performed as follows:
* 1. Move the device into the radio off state.
* 2. Program the new local oscillator (LO) frequency.
* 3. Reset the external channel.(ignored)
* 4. Move the device back into the radio on state.
* 5. Reenable tracking calibrations.(ignored)
*
* @param mykDevice is ADI hardware layer settings pointer specific to
* a Mykonos instance which contains basic settings such as spi,
* gpio, tx/rx and jesd configurations.
* @param freq_Hz is the target frequancy in Hz.
*
* @return None.
*
* @note The procedure is used when a radio frequency (RF) phased-lock loop
* (PLL) change is required with the following conditions:
* - A desire to change the Rx, Tx, and ORx frequencies.
* - The frequency step change is less than 100 MHz.
* - The frequency step does not cross the divide by 2 boundaries outlined
* in AD9371/9375-UG-992-Rev.B-Table 96.
*
*******************************************************************************/
int HW_9371SmallFrequencyChange(mykonosDevice_t *mykDevice, uint64_t freq_Hz);
/******************************************************************************/
/**
*
* This function conducts AD9371/9375 large RF PLL frequcny change procedure. The
* procedure is performed as follows:
* 1. Move the device into the radio off state.
* 2. Program the new local oscillator (LO) frequency.
* 3. Rerun the initialization calibrations.
* 4. Move the device back into the radio on state.
* 5. Reenable tracking calibrations.(ignored)
*
* @param mykDevice is ADI hardware layer settings pointer specific to
* a Mykonos instance which contains basic settings such as spi,
* gpio, tx/rx and jesd configurations.
* @param freq_Hz is the target frequancy in Hz.
*
* @return None.
*
* @note The procedure is used when a radio frequency (RF) phased-lock loop
* (PLL) change is required with the following conditions:
* - A desire to change the Rx, Tx, and ORx frequencies.
* - The frequency step change is more than 100 MHz.
* - The frequency step does cross the divide by 2 boundaries outlined
* in AD9371/9375-UG-992-Rev.B-Table 96.
*
*******************************************************************************/
int HW_9371LargeFrequencyChange(mykonosDevice_t *mykDevice, uint64_t freq_Hz);
/******************************************************************************/
/**
*
* Handles AD9371 TX & RX frequency change axi gpio interruput.
*
* @param CallBackRef is the callback reference, usually the instance
* pointer of the connecting driver.
*
* @return None.
*
* @note None.
*
*******************************************************************************/
void FreqIntrHandler(void *CallbackRef);
/******************************************************************************/
/**
*
* Handles AD9371 Rx gain index change axi gpio interruput.
*
* @param CallBackRef is the callback reference, usually the instance
* pointer of the connecting driver.
*
* @return None.
*
* @note None.
*
*******************************************************************************/
void GainIntrHandler(void *CallbackRef);
/******************************************************************************/
/**
*
* Handles AD9371 Tx attenuation change axi gpio interruput.
*
* @param CallBackRef is the callback reference, usually the instance
* pointer of the connecting driver.
*
* @return None.
*
* @note None.
*
*******************************************************************************/
void AttnIntrHandler(void *CallbackRef);
#endif /* SRC_HEADLESS_H_ */
/*
* headless.h
*
* Created on: 2021Äê6ÔÂ8ÈÕ
* Author: Josh
*/
#ifndef SRC_HEADLESS_H_
#define SRC_HEADLESS_H_
/***************************** Include Files ********************************/
#include <stdlib.h>
#include <stdio.h>
#include "xil_cache.h"
#include "xscugic.h"
//#include "xgpio.h"
#include "common.h"
#include "./mykonos/ad9528.h"
#include "./mykonos/mykonos.h"
#include "./mykonos/Mykonos_M3.h"
#include "./mykonos/mykonos_gpio.h"
#include "myk_ad9528init.h"
#include "myk_init.h"
#include "parameters.h"
/************************** Constant Definitions *****************************/
/**************************** Type Definitions *******************************/
/***************** Macros (Inline Functions) Definitions *********************/
/************************** Variable Definitions *****************************/
/************************** Function Prototypes ******************************/
/*****************************************************************************/
/*
*
* This function setups ad9528 and ad9371 via spi.
*
* @param None.
*
* @return
* - ADIERR_FAILED if successful,
* - ADIERR_OK if not succesful
*
* @note None.
*
******************************************************************************/
int HARDWARE_initialize();
int HARDWARE_ad9371Config(void);
/*****************************************************************************/
/*
*
* Setup up Axi Gpio, through which ad9371 can be reconfigured. Axi Gpio
* instance and interrupt system initialization are included.
*
* @param None.
*
* @return
* - ADIERR_FAILED if successful,
* - ADIERR_OK if not succesful
*
* @note None.
*
******************************************************************************/
int HW_ad9371DynamicCfgInit(void);
/*****************************************************************************/
/*
*
* Setup up interrupt system, initialize exception handlers.
*
* @param DeviceId is the unique identifier for a device.
* @param GicPtr is a pointer to the XScuGic instance.
*
* @return
* - XST_SUCCESS if successful,
* - XST_FAILURE if not succesful
*
* @note None.
*
******************************************************************************/
int HW_setupIntrSystem(u16 DeviceId, XScuGic * GicPtr);
/*****************************************************************************/
/*
*
* Make the connection between the Int_Id of the interrupt source and the
* associated handler. Set the interrupt priority and trigger type for the
* specified IRQ source..
*
* @param GicPtr is a pointer to the XScuGic instance.
* @param Int_Id contains the ID of the interrupt source and should be
* in the range of 0 to XSCUGIC_MAX_NUM_INTR_INPUTS - 1
* @param Handler to the handler for that interrupt.
* @param CallBackRef is the callback reference, usually the instance
* pointer of the connecting driver.
* @param Priority is the new priority for the IRQ source. 0 is highest
* priority, 0xF8(248) is lowest. There are 32 priority levels
* supported with a step of 8. Hence the supported priorities are
* 0, 8, 16, 32, 40 ..., 248.
* @param Trigger is the new trigger type for the IRQ source.
* Each bit pair describes the configuration for an INT_ID.
* SFI Read Only b10 always
* PPI Read Only depending on how the PPIs are configured.
* b01 Active HIGH level sensitive
* b11 Rising edge sensitive
* SPI LSB is read only.
* b01 Active HIGH level sensitive
* b11 Rising edge sensitive/
*
* @return
* - XST_SUCCESS if successful,
* - XST_FAILURE if not succesful
*
* @note None.
*
******************************************************************************/
int HW_connectIntr(XScuGic *GicPtr,u32 IntrId,Xil_InterruptHandler Handler,
void *CallBackRef, u8 Priority, u8 Trigger);
/*****************************************************************************/
/*
*
* Initialize Analog Device related configuration profile. This is a HARDWARE-
* ASSOTIATED function, which may differ between different board.
*
* @param None.
*
* @return
* - ADIERR_OK if configuration profile exists,
* - ADIERR_FAILED if onfiguration profile does not exist
*
* @note None.
*
******************************************************************************/
int HW_adiCfgProfileInit(void);
/******************************************************************************/
/**
*
* This function conducts AD9528 device configuration initializing procedure.
*
* @param clockAD9528_device is a pointer to the data structure holding
* AD9528 settings, which contains basic AD9528 settings such as
* spi and gpio.
*
* @return
* - ADIERR_OK if successful.
* - ADIERR_FAILED if not successful.
*
* @note None.
*
*******************************************************************************/
int HW_9528Config(ad9528Device_t *clockAD9528_device);
/******************************************************************************/
/**
*
* This function read AD9528 reg508 status, to check whether ad9528 is locked or
* not.
*
* @param clockAD9528_device is a pointer to the data structure holding
* AD9528 settings, which contains basic AD9528 settings.
*
* @return
* - ADIERR_OK if successful.
* - ADIERR_FAILED if not successful.
*
* @note None.
*
*******************************************************************************/
int HW_9528GetLockStatus(ad9528Device_t *device, uint8_t *reg508);
/******************************************************************************/
/**
*
* Conduct AD9371 device configuration initializing procedure.
*
* @param clockAD9528_device is a pointer to the data structure holding
* AD9528 settings, which contains basic AD9528 settings.
* @param mykDevice is ADI hardware layer settings pointer specific to
* a Mykonos instance which contains basic settings such as spi,
* gpio, tx/rx and jesd configurations.
*
* @return
* - ADIERR_OK if successful.
* - ADIERR_FAILED if not successful.
*
* @note None.
*
*******************************************************************************/
int HW_9371Config(ad9528Device_t *clockAD9528_device, mykonosDevice_t *mykDevice);
/******************************************************************************/
/**
*
* Read AD9371's RX framer, ORX framer and TX deframer status, to check jesd204b
* sync status.
*
* @param mykDevice is ADI hardware layer settings pointer specific to
* a Mykonos instance which contains basic settings such as spi,
* gpio, tx/rx and jesd configurations.
* @param framerStatus is the RX framer status byte read
* framerStatus | Description
* -------------|-----------------------------------------------------------------------------
* [7] | SYSREF phase error ? a new SYSREF had different timing than the first that set the LMFC timing.
* [6] | Framer lane FIFO read/write pointer delta has changed. Can help debug issues with deterministic latency.
* [5] | Framer has received the SYSREF and has retimed its LMFC
* [4:2] | Framer ILAS state: 0=CGS, 1= 1st Multframe, 2= 2nd Multiframe, 3= 3rd Multiframe, 4= 4th multiframe, 5= Last multiframe, 6=invalid, 7= ILAS complete
* [1:0] | Framer Tx state: 0=CGS, 1= ILAS, 2 = ADC Data
* @param obsFramerStatus is the ORX framer status byte read
* obsFramerStatus | Description
* ----------------|-----------------------------------------------------------------------------
* [7] | SYSREF phase error ? a new SYSREF had different timing than the first that set the LMFC timing.
* [6] | Framer lane FIFO read/write pointer delta has changed. Can help debug issues with deterministic latency.
* [5] | Framer has received the SYSREF and has retimed its LMFC
* [4:2] | Framer ILAS state: 0=CGS, 1= 1st Multframe, 2= 2nd Multiframe, 3= 3rd Multiframe, 4= 4th multiframe, 5= Last multiframe, 6=invalid, 7= ILAS complete
* [1:0] | Framer Tx state: 0=CGS, 1= ILAS, 2 = ADC Data
* @param deframerStatus is the TX deframer status byte read
* deframerStatus | Bit Name | Description
* ----------------|--------------------------|---------------------------------------------
* [7] | Unused | Unused
* [6] | Deframer IRQ | This bit indicates that the IRQ interrupt was asserted.
* [5] | Deframer SYSREF Received | When this bit is set, it indicates that the SYSREF pulse was received by the deframer IP
* [4] | Deframer Receiver Error | This bit is set when PRBS has received an error.
* [3] | Valid Checksum | This bit is set when the received ILAS checksum is valid.
* [2] | EOF Event | This bit captures the internal status of the framer End of Frame event. Value =1 if framing error during ILAS
* [1] | EOMF Event | This bit captures the internal status of the framer End of Multi-Frame event. Value =1 if framing error during ILAS
* [0] | FS Lost | This bit captures the internal status of the framer Frame Symbol event. Value =1 if framing error during ILAS or user data (invalid replacement characters)
*
* @return
* - ADIERR_OK if successful.
* - ADIERR_FAILED if not successful.
*
* @note None.
*
*******************************************************************************/
int HW_9371CheckJesdStatus(mykonosDevice_t *mykDevice, uint8_t *framerStatus,
uint8_t *obsFramerStatus, uint8_t *deframerStatus);
/******************************************************************************/
/**
*
* This function conducts AD9371/9375 samll RF PLL frequcny change procedure. The
* procedure is performed as follows:
* 1. Move the device into the radio off state.
* 2. Program the new local oscillator (LO) frequency.
* 3. Reset the external channel.(ignored)
* 4. Move the device back into the radio on state.
* 5. Reenable tracking calibrations.(ignored)
*
* @param mykDevice is ADI hardware layer settings pointer specific to
* a Mykonos instance which contains basic settings such as spi,
* gpio, tx/rx and jesd configurations.
* @param freq_Hz is the target frequancy in Hz.
*
* @return None.
*
* @note The procedure is used when a radio frequency (RF) phased-lock loop
* (PLL) change is required with the following conditions:
* - A desire to change the Rx, Tx, and ORx frequencies.
* - The frequency step change is less than 100 MHz.
* - The frequency step does not cross the divide by 2 boundaries outlined
* in AD9371/9375-UG-992-Rev.B-Table 96.
*
*******************************************************************************/
int HW_9371SmallFrequencyChange(mykonosDevice_t *mykDevice, uint64_t freq_Hz);
/******************************************************************************/
/**
*
* This function conducts AD9371/9375 large RF PLL frequcny change procedure. The
* procedure is performed as follows:
* 1. Move the device into the radio off state.
* 2. Program the new local oscillator (LO) frequency.
* 3. Rerun the initialization calibrations.
* 4. Move the device back into the radio on state.
* 5. Reenable tracking calibrations.(ignored)
*
* @param mykDevice is ADI hardware layer settings pointer specific to
* a Mykonos instance which contains basic settings such as spi,
* gpio, tx/rx and jesd configurations.
* @param freq_Hz is the target frequancy in Hz.
*
* @return None.
*
* @note The procedure is used when a radio frequency (RF) phased-lock loop
* (PLL) change is required with the following conditions:
* - A desire to change the Rx, Tx, and ORx frequencies.
* - The frequency step change is more than 100 MHz.
* - The frequency step does cross the divide by 2 boundaries outlined
* in AD9371/9375-UG-992-Rev.B-Table 96.
*
*******************************************************************************/
int HW_9371LargeFrequencyChange(mykonosDevice_t *mykDevice, uint64_t freq_Hz);
/******************************************************************************/
/**
*
* Handles AD9371 TX & RX frequency change axi gpio interruput.
*
* @param CallBackRef is the callback reference, usually the instance
* pointer of the connecting driver.
*
* @return None.
*
* @note None.
*
*******************************************************************************/
void FreqIntrHandler(void *CallbackRef);
/******************************************************************************/
/**
*
* Handles AD9371 Rx gain index change axi gpio interruput.
*
* @param CallBackRef is the callback reference, usually the instance
* pointer of the connecting driver.
*
* @return None.
*
* @note None.
*
*******************************************************************************/
void GainIntrHandler(void *CallbackRef);
/******************************************************************************/
/**
*
* Handles AD9371 Tx attenuation change axi gpio interruput.
*
* @param CallBackRef is the callback reference, usually the instance
* pointer of the connecting driver.
*
* @return None.
*
* @note None.
*
*******************************************************************************/
void AttnIntrHandler(void *CallbackRef);
#endif /* SRC_HEADLESS_H_ */
projects/datalink_814/dl814_dj_48m/project/dl814_dj_48m/dl814_dj_48m.sdk/dl814_dj/src/hardware/myk_ad9528init.c
+189 -189
View File
@@ -1,189 +1,189 @@
///*
// * myk_clock_init.c
// *
// */
//
///**
//* \page Disclaimer Legal Disclaimer
//* Copyright 2015-2017 Analog Devices Inc.
//* Released under the AD9371 API license, for more information see the "LICENSE.txt" file in this zip file.
//*
//*/
//
//#ifndef MYK_CLOCK_INIT_C_
//#define MYK_CLOCK_INIT_C_
//#include <stdint.h>
//#include <stdlib.h>
//#include <stddef.h>
//#include "common.h"
//
//#include "ad9528.h"
//#include "t_ad9528.h"
//#include "myk_ad9528init.h"
//#include "parameters.h"
//
//static ad9528pll1Settings_t clockPll1Settings =
//{
// .refA_Frequency_Hz = 30720000,
// .refA_Divider = 1,
// .refA_bufferCtrl = DISABLED,
// .refB_Frequency_Hz = 0,
// .refB_Divider = 1,
// .refB_bufferCtrl = DISABLED,
// .vcxo_Frequency_Hz = 122880000,
// .vcxoBufferCtrl = NEG_SINGLE_ENDED,
// .nDivider = 4,
// .bypassPll1 = 0
//};
//
//static ad9528pll2Settings_t clockPll2Settings =
//{
// .rfDivider = 4,
// .n2Divider = 10,
// .totalNdiv = 30
//};
//
//static ad9528outputSettings_t clockOutputSettings =
//{
// .outPowerDown = 53237, // 0xCFF5
// .outSource = {
// CHANNEL_DIV, CHANNEL_DIV, CHANNEL_DIV, SYSREF,
// CHANNEL_DIV, CHANNEL_DIV, CHANNEL_DIV, CHANNEL_DIV,
// CHANNEL_DIV, CHANNEL_DIV, CHANNEL_DIV, CHANNEL_DIV,
// SYSREF, CHANNEL_DIV},
// .outBufferCtrl = {0,0,0,0,0,0,0,0,0,0,0,0,0,0},
// .outAnalogDelay = {0,0,0,0,0,0,0,0,0,0,0,0,0,0},
// .outDigitalDelay = {0,0,0,0,0,0,0,0,0,0,0,0,0,0},
// .outChannelDiv = {10,10,10,10,10,10,10,10,10,10,10,10,10,10},
// .outFrequency_Hz = {122880000, 122880000, 122880000, 122880000, 122880000, 122880000, 122880000, 122880000, 122880000, 122880000, 122880000, 122880000, 122880000, 122880000}
//};
//
//static ad9528sysrefSettings_t clockSysrefSettings =
//{
// .sysrefRequestMethod = PIN,
// .sysrefSource = INTERNAL,
// .sysrefPinEdgeMode = LEVEL_ACTIVE_HIGH,
// .sysrefPinBufferMode = DISABLED,
// .sysrefPatternMode = NSHOT,
// .sysrefNshotMode = ONE_PULSE,
// .sysrefDivide = 512
//};
//
//static spiSettings_t clockSpiSettings =
//{
// .chipSelectIndex = AD9528_CS, //chip select Index
// .writeBitPolarity = 0, //Write bit polarity
// .longInstructionWord = 1, //16bit instruction word
// .MSBFirst = 1, //MSB first
// .CPHA = 0, //Clock phase
// .CPOL = 0, //Clock polarity
// .enSpiStreaming = 0, //uint8_t enSpiStreaming;
// .autoIncAddrUp = 1, //uint8_t autoIncAddrUp;
// .fourWireMode = 1 //uint8_t fourWireMode;
//};
//
//ad9528Device_t clockAD9528_ =
//{
// &clockSpiSettings,
// &clockPll1Settings,
// &clockPll2Settings,
// &clockOutputSettings,
// &clockSysrefSettings
//};
//
//ad9528Device_t *ad9528Init = &clockAD9528_;
//
//#endif /* MYK_CLOCK_INIT_C_ */
/* AD9528 data structure initialization file */
#include <stdint.h>
#include <stdlib.h>
#include <stddef.h>
#include "common.h"
#include "./mykonos/ad9528.h"
#include "./mykonos/t_ad9528.h"
#include "myk_ad9528init.h"
#include "parameters.h"
static ad9528pll1Settings_t clockPll1Settings = {
.refA_Frequency_Hz = 122880000,
.refA_Divider = 1,
.refA_bufferCtrl = SINGLE_ENDED,
.refB_Frequency_Hz = 0,
.refB_Divider = 1,
.refB_bufferCtrl = DISABLED,
.vcxo_Frequency_Hz = 122880000,
.vcxoBufferCtrl = DIFFERENTIAL,
.nDivider = 1,
.bypassPll1 = 0
};
static ad9528pll2Settings_t clockPll2Settings = {
.rfDivider = 3,
.n2Divider = 10,
.totalNdiv = 30
};
/*******************************************************************
* Output Distribution Settings
* 9369CE02A uses the following clock outputs
* OUT 1: FPGA_REF_CLK
* OUT 2: FPGA_AUX_CLK
* OUT 3: FPGA_SYSREF
* OUT 12: SYSREF_IN
* OUT 13: DEV_CLK_IN
*******************************************************************
*/
static ad9528outputSettings_t clockOutputSettings = {
.outPowerDown = 0x0,
.outSource = {
SYSREF, SYSREF, CHANNEL_DIV, SYSREF,
CHANNEL_DIV, CHANNEL_DIV, SYSREF, SYSREF,
CHANNEL_DIV, CHANNEL_DIV, CHANNEL_DIV, CHANNEL_DIV,
SYSREF , CHANNEL_DIV
},
.outBufferCtrl = {0,0,0,0,0,0,0,0,0,0,0,0,0,0},
.outAnalogDelay = {0,0,0,0,0,0,0,0,0,0,0,0,0,0},
.outDigitalDelay = {0,0,0,0,0,0,0,0,0,0,0,0,0,0},
.outChannelDiv = {10,10,10,10,10,10,10,10,10,10,10,10,10,10},
.outFrequency_Hz = {
122880000, 122880000, 122880000, 122880000,
122880000, 122880000, 122880000, 122880000,
122880000, 122880000, 122880000, 122880000,
122880000, 122880000
}
};
static ad9528sysrefSettings_t clockSysrefSettings = {
.sysrefRequestMethod = SPI,
.sysrefSource = INTERNAL,
.sysrefPinEdgeMode = LEVEL_ACTIVE_HIGH,
.sysrefPinBufferMode = DISABLED,
.sysrefPatternMode = CONTINUOUS,
.sysrefNshotMode = FOUR_PULSES,
.sysrefDivide = 512
};
static spiSettings_t clockSpiSettings = {
.chipSelectIndex = 2, //chip select Index
.writeBitPolarity = 0, //Write bit polarity
.longInstructionWord = 1, //16bit instruction word
.MSBFirst = 1, //MSB first
.CPHA = 0, //Clock phase
.CPOL = 0, //Clock polarity
.enSpiStreaming = 0, //uint8_t enSpiStreaming;
.autoIncAddrUp = 1, //uint8_t autoIncAddrUp;
.fourWireMode = 1 //uint8_t fourWireMode;
};
ad9528Device_t clockAD9528_ = {
&clockSpiSettings,
&clockPll1Settings,
&clockPll2Settings,
&clockOutputSettings,
&clockSysrefSettings
};
ad9528Device_t *ad9528Init = &clockAD9528_;
///*
// * myk_clock_init.c
// *
// */
//
///**
//* \page Disclaimer Legal Disclaimer
//* Copyright 2015-2017 Analog Devices Inc.
//* Released under the AD9371 API license, for more information see the "LICENSE.txt" file in this zip file.
//*
//*/
//
//#ifndef MYK_CLOCK_INIT_C_
//#define MYK_CLOCK_INIT_C_
//#include <stdint.h>
//#include <stdlib.h>
//#include <stddef.h>
//#include "common.h"
//
//#include "ad9528.h"
//#include "t_ad9528.h"
//#include "myk_ad9528init.h"
//#include "parameters.h"
//
//static ad9528pll1Settings_t clockPll1Settings =
//{
// .refA_Frequency_Hz = 30720000,
// .refA_Divider = 1,
// .refA_bufferCtrl = DISABLED,
// .refB_Frequency_Hz = 0,
// .refB_Divider = 1,
// .refB_bufferCtrl = DISABLED,
// .vcxo_Frequency_Hz = 122880000,
// .vcxoBufferCtrl = NEG_SINGLE_ENDED,
// .nDivider = 4,
// .bypassPll1 = 0
//};
//
//static ad9528pll2Settings_t clockPll2Settings =
//{
// .rfDivider = 4,
// .n2Divider = 10,
// .totalNdiv = 30
//};
//
//static ad9528outputSettings_t clockOutputSettings =
//{
// .outPowerDown = 53237, // 0xCFF5
// .outSource = {
// CHANNEL_DIV, CHANNEL_DIV, CHANNEL_DIV, SYSREF,
// CHANNEL_DIV, CHANNEL_DIV, CHANNEL_DIV, CHANNEL_DIV,
// CHANNEL_DIV, CHANNEL_DIV, CHANNEL_DIV, CHANNEL_DIV,
// SYSREF, CHANNEL_DIV},
// .outBufferCtrl = {0,0,0,0,0,0,0,0,0,0,0,0,0,0},
// .outAnalogDelay = {0,0,0,0,0,0,0,0,0,0,0,0,0,0},
// .outDigitalDelay = {0,0,0,0,0,0,0,0,0,0,0,0,0,0},
// .outChannelDiv = {10,10,10,10,10,10,10,10,10,10,10,10,10,10},
// .outFrequency_Hz = {122880000, 122880000, 122880000, 122880000, 122880000, 122880000, 122880000, 122880000, 122880000, 122880000, 122880000, 122880000, 122880000, 122880000}
//};
//
//static ad9528sysrefSettings_t clockSysrefSettings =
//{
// .sysrefRequestMethod = PIN,
// .sysrefSource = INTERNAL,
// .sysrefPinEdgeMode = LEVEL_ACTIVE_HIGH,
// .sysrefPinBufferMode = DISABLED,
// .sysrefPatternMode = NSHOT,
// .sysrefNshotMode = ONE_PULSE,
// .sysrefDivide = 512
//};
//
//static spiSettings_t clockSpiSettings =
//{
// .chipSelectIndex = AD9528_CS, //chip select Index
// .writeBitPolarity = 0, //Write bit polarity
// .longInstructionWord = 1, //16bit instruction word
// .MSBFirst = 1, //MSB first
// .CPHA = 0, //Clock phase
// .CPOL = 0, //Clock polarity
// .enSpiStreaming = 0, //uint8_t enSpiStreaming;
// .autoIncAddrUp = 1, //uint8_t autoIncAddrUp;
// .fourWireMode = 1 //uint8_t fourWireMode;
//};
//
//ad9528Device_t clockAD9528_ =
//{
// &clockSpiSettings,
// &clockPll1Settings,
// &clockPll2Settings,
// &clockOutputSettings,
// &clockSysrefSettings
//};
//
//ad9528Device_t *ad9528Init = &clockAD9528_;
//
//#endif /* MYK_CLOCK_INIT_C_ */
/* AD9528 data structure initialization file */
#include <stdint.h>
#include <stdlib.h>
#include <stddef.h>
#include "common.h"
#include "./mykonos/ad9528.h"
#include "./mykonos/t_ad9528.h"
#include "myk_ad9528init.h"
#include "parameters.h"
static ad9528pll1Settings_t clockPll1Settings = {
.refA_Frequency_Hz = 122880000,
.refA_Divider = 1,
.refA_bufferCtrl = SINGLE_ENDED,
.refB_Frequency_Hz = 0,
.refB_Divider = 1,
.refB_bufferCtrl = DISABLED,
.vcxo_Frequency_Hz = 122880000,
.vcxoBufferCtrl = DIFFERENTIAL,
.nDivider = 1,
.bypassPll1 = 0
};
static ad9528pll2Settings_t clockPll2Settings = {
.rfDivider = 3,
.n2Divider = 10,
.totalNdiv = 30
};
/*******************************************************************
* Output Distribution Settings
* 9369CE02A uses the following clock outputs
* OUT 1: FPGA_REF_CLK
* OUT 2: FPGA_AUX_CLK
* OUT 3: FPGA_SYSREF
* OUT 12: SYSREF_IN
* OUT 13: DEV_CLK_IN
*******************************************************************
*/
static ad9528outputSettings_t clockOutputSettings = {
.outPowerDown = 0x0,
.outSource = {
SYSREF, SYSREF, CHANNEL_DIV, SYSREF,
CHANNEL_DIV, CHANNEL_DIV, SYSREF, SYSREF,
CHANNEL_DIV, CHANNEL_DIV, CHANNEL_DIV, CHANNEL_DIV,
SYSREF , CHANNEL_DIV
},
.outBufferCtrl = {0,0,0,0,0,0,0,0,0,0,0,0,0,0},
.outAnalogDelay = {0,0,0,0,0,0,0,0,0,0,0,0,0,0},
.outDigitalDelay = {0,0,0,0,0,0,0,0,0,0,0,0,0,0},
.outChannelDiv = {10,10,10,10,10,10,10,10,10,10,10,10,10,10},
.outFrequency_Hz = {
122880000, 122880000, 122880000, 122880000,
122880000, 122880000, 122880000, 122880000,
122880000, 122880000, 122880000, 122880000,
122880000, 122880000
}
};
static ad9528sysrefSettings_t clockSysrefSettings = {
.sysrefRequestMethod = SPI,
.sysrefSource = INTERNAL,
.sysrefPinEdgeMode = LEVEL_ACTIVE_HIGH,
.sysrefPinBufferMode = DISABLED,
.sysrefPatternMode = CONTINUOUS,
.sysrefNshotMode = FOUR_PULSES,
.sysrefDivide = 512
};
static spiSettings_t clockSpiSettings = {
.chipSelectIndex = 2, //chip select Index
.writeBitPolarity = 0, //Write bit polarity
.longInstructionWord = 1, //16bit instruction word
.MSBFirst = 1, //MSB first
.CPHA = 0, //Clock phase
.CPOL = 0, //Clock polarity
.enSpiStreaming = 0, //uint8_t enSpiStreaming;
.autoIncAddrUp = 1, //uint8_t autoIncAddrUp;
.fourWireMode = 1 //uint8_t fourWireMode;
};
ad9528Device_t clockAD9528_ = {
&clockSpiSettings,
&clockPll1Settings,
&clockPll2Settings,
&clockOutputSettings,
&clockSysrefSettings
};
ad9528Device_t *ad9528Init = &clockAD9528_;
projects/datalink_814/dl814_dj_48m/project/dl814_dj_48m/dl814_dj_48m.sdk/dl814_dj/src/hardware/myk_ad9528init.h
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/*
* myk_clock_init.h
*
*/
/**
* \page Disclaimer Legal Disclaimer
* Copyright 2015-2017 Analog Devices Inc.
* Released under the AD9371 API license, for more information see the "LICENSE.txt" file in this zip file.
*
*/
#ifndef MYK_CLOCK_INIT_H_
#define MYK_CLOCK_INIT_H_
#include "./mykonos/ad9528.h"
extern ad9528Device_t *ad9528Init;
#endif /* MYK_CLOCK_INIT_H_ */
/*
* myk_clock_init.h
*
*/
/**
* \page Disclaimer Legal Disclaimer
* Copyright 2015-2017 Analog Devices Inc.
* Released under the AD9371 API license, for more information see the "LICENSE.txt" file in this zip file.
*
*/
#ifndef MYK_CLOCK_INIT_H_
#define MYK_CLOCK_INIT_H_
#include "./mykonos/ad9528.h"
extern ad9528Device_t *ad9528Init;
#endif /* MYK_CLOCK_INIT_H_ */
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/**
* \file myk_init.h
*
* \brief Contains structure definitions for myk_init.c
*
* The top level structure mykonosDevice_t mykDevice uses keyword
* extern to allow the application layer main() to have visibility
* to these settings.
*/
/**
* \page Disclaimer Legal Disclaimer
* Copyright 2015-2017 Analog Devices Inc.
* Released under the AD9371 API license, for more information see the "LICENSE.txt" file in this zip file.
*
*/
#ifndef MYK_INIT_H_
#define MYK_INIT_H_
extern mykonosDevice_t mykDevice;
#endif
/**
* \file myk_init.h
*
* \brief Contains structure definitions for myk_init.c
*
* The top level structure mykonosDevice_t mykDevice uses keyword
* extern to allow the application layer main() to have visibility
* to these settings.
*/
/**
* \page Disclaimer Legal Disclaimer
* Copyright 2015-2017 Analog Devices Inc.
* Released under the AD9371 API license, for more information see the "LICENSE.txt" file in this zip file.
*
*/
#ifndef MYK_INIT_H_
#define MYK_INIT_H_
extern mykonosDevice_t mykDevice;
#endif
projects/datalink_814/dl814_dj_48m/project/dl814_dj_48m/dl814_dj_48m.sdk/dl814_dj/src/hardware/mykonos/ad9528.c
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/**
* \file ad9528.h
* \brief Contains function declarations and ad9528Device_t structure typedef for ad9528.c
*/
/**
* \page Disclaimer Legal Disclaimer
* Copyright 2015-2017 Analog Devices Inc.
* Released under the AD9371 API license, for more information see the "LICENSE.txt" file in this zip file.
*
*/
#ifndef _AD9528_LIB_H_
#define _AD9528_LIB_H_
#include <stdint.h>
#include "../common.h"
#include "t_ad9528.h"
#ifdef __cplusplus
extern "C" {
#endif
#define CLEMENTE_TDD_AD9528_CLKOUT_INDEX 13
//Helper function to setup the 9528 device data structure specifically for the ADI transceiver evaluation cards
ADI_ERR AD9528_initDeviceDataStruct(ad9528Device_t *device, uint32_t vcxoFrequency_Hz, uint32_t refAFrequency_Hz, uint32_t outputDeviceClock_Hz);
ADI_ERR AD9528_reportClockRates(ad9528Device_t *device); //debug function to help verify data structure is setup correctly.
//AD9528 API functions
ADI_ERR AD9528_resetDevice(ad9528Device_t *device);
ADI_ERR AD9528_setSpiSettings(ad9528Device_t *device);
ADI_ERR AD9528_initialize(ad9528Device_t *device); //writes all registers to desired values, leaves clock outputs off.
ADI_ERR AD9528_waitForPllLock(ad9528Device_t *device);
ADI_ERR AD9528_readPllStatus(ad9528Device_t *device, uint8_t *status);
ADI_ERR AD9528_enableClockOutputs(ad9528Device_t *device, uint16_t clkEnable); //clkEnable: bit per clock output
ADI_ERR AD9528_setupSYSREF(ad9528Device_t *device, uint16_t divideFromPll1Out, sysrefPatternMode_t sysrefPatternMode, sysrefNshotMode_t nShotPulses);
ADI_ERR AD9528_requestSysref(ad9528Device_t *device, uint8_t enableSYSREF);
#ifdef __cplusplus
}
#endif
#endif
/**
* \file ad9528.h
* \brief Contains function declarations and ad9528Device_t structure typedef for ad9528.c
*/
/**
* \page Disclaimer Legal Disclaimer
* Copyright 2015-2017 Analog Devices Inc.
* Released under the AD9371 API license, for more information see the "LICENSE.txt" file in this zip file.
*
*/
#ifndef _AD9528_LIB_H_
#define _AD9528_LIB_H_
#include <stdint.h>
#include "../common.h"
#include "t_ad9528.h"
#ifdef __cplusplus
extern "C" {
#endif
#define CLEMENTE_TDD_AD9528_CLKOUT_INDEX 13
//Helper function to setup the 9528 device data structure specifically for the ADI transceiver evaluation cards
ADI_ERR AD9528_initDeviceDataStruct(ad9528Device_t *device, uint32_t vcxoFrequency_Hz, uint32_t refAFrequency_Hz, uint32_t outputDeviceClock_Hz);
ADI_ERR AD9528_reportClockRates(ad9528Device_t *device); //debug function to help verify data structure is setup correctly.
//AD9528 API functions
ADI_ERR AD9528_resetDevice(ad9528Device_t *device);
ADI_ERR AD9528_setSpiSettings(ad9528Device_t *device);
ADI_ERR AD9528_initialize(ad9528Device_t *device); //writes all registers to desired values, leaves clock outputs off.
ADI_ERR AD9528_waitForPllLock(ad9528Device_t *device);
ADI_ERR AD9528_readPllStatus(ad9528Device_t *device, uint8_t *status);
ADI_ERR AD9528_enableClockOutputs(ad9528Device_t *device, uint16_t clkEnable); //clkEnable: bit per clock output
ADI_ERR AD9528_setupSYSREF(ad9528Device_t *device, uint16_t divideFromPll1Out, sysrefPatternMode_t sysrefPatternMode, sysrefNshotMode_t nShotPulses);
ADI_ERR AD9528_requestSysref(ad9528Device_t *device, uint8_t enableSYSREF);
#ifdef __cplusplus
}
#endif
#endif
projects/datalink_814/dl814_dj_48m/project/dl814_dj_48m/dl814_dj_48m.sdk/dl814_dj/src/hardware/mykonos/mykonos.c
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/*!
* \file mykonos.h
* \brief Contains macro definitions and function prototypes for mykonos.c
*
* Mykonos API version: 1.5.2.3566
*/
/**
* \page Disclaimer Legal Disclaimer
* Copyright 2015-2017 Analog Devices Inc.
* Released under the AD9371 API license, for more information see the "LICENSE.txt" file in this zip file.
*
*/
#ifndef _MYKONOS_LIB_H_
#define _MYKONOS_LIB_H_
#ifdef __cplusplus
extern "C" {
#endif
#include "t_mykonos.h"
#include "mykonos_version.h"
#define TX_PROFILE_VALID 0x01
#define RX_PROFILE_VALID 0x02
#define ORX_PROFILE_VALID 0x04
#define SNIFF_PROFILE_VALID 0x08
/*
****************************************************************************
* General Initialization functions
****************************************************************************
*/
mykonosErr_t MYKONOS_resetDevice(mykonosDevice_t *device);
mykonosErr_t MYKONOS_getDeviceRev(mykonosDevice_t *device, uint8_t *revision);
mykonosErr_t MYKONOS_getProductId(mykonosDevice_t *device, uint8_t *productId);
mykonosErr_t MYKONOS_setSpiSettings(mykonosDevice_t *device);
mykonosErr_t MYKONOS_verifyDeviceDataStructure(mykonosDevice_t *device);
mykonosErr_t MYKONOS_verifyProfiles(mykonosDevice_t *device);
mykonosErr_t MYKONOS_initialize(mykonosDevice_t *device);
mykonosErr_t MYKONOS_waitForEvent(mykonosDevice_t *device, waitEvent_t waitEvent, uint32_t timeout_us);
mykonosErr_t MYKONOS_readEventStatus(mykonosDevice_t *device, waitEvent_t waitEvent, uint8_t *eventDone);
mykonosErr_t MYKONOS_getApiVersion (mykonosDevice_t *device, uint32_t *siVer, uint32_t *majorVer, uint32_t *minorVer, uint32_t *buildVer);
/*
*****************************************************************************
* PLL / Synthesizer functions
*****************************************************************************
*/
mykonosErr_t MYKONOS_initDigitalClocks(mykonosDevice_t *device);
mykonosErr_t MYKONOS_setRfPllFrequency(mykonosDevice_t *device, mykonosRfPllName_t pllName, uint64_t rfPllLoFrequency_Hz);
mykonosErr_t MYKONOS_getRfPllFrequency(mykonosDevice_t *device, mykonosRfPllName_t pllName, uint64_t *rfPllLoFrequency_Hz);
mykonosErr_t MYKONOS_checkPllsLockStatus(mykonosDevice_t *device, uint8_t *pllLockStatus);
mykonosErr_t MYKONOS_setRfPllLoopFilter(mykonosDevice_t *device, mykonosRfPllName_t pllName, uint16_t loopBandwidth_kHz, uint8_t stability);
mykonosErr_t MYKONOS_getRfPllLoopFilter(mykonosDevice_t *device, mykonosRfPllName_t pllName, uint16_t *loopBandwidth_kHz, uint8_t *stability);
/*
*****************************************************************************
* ARM Processor Control Functions
*****************************************************************************
*/
mykonosErr_t MYKONOS_initArm(mykonosDevice_t *device);
mykonosErr_t MYKONOS_loadArmFromBinary(mykonosDevice_t *device, uint8_t *binary, uint32_t count);
mykonosErr_t MYKONOS_loadArmConcurrent(mykonosDevice_t *device, uint8_t *binary, uint32_t count);
mykonosErr_t MYKONOS_verifyArmChecksum(mykonosDevice_t *device);
mykonosErr_t MYKONOS_checkArmState(mykonosDevice_t *device, mykonosArmState_t armStateCheck);
mykonosErr_t MYKONOS_getArmVersion(mykonosDevice_t *device, uint8_t *majorVer, uint8_t *minorVer, uint8_t *rcVer, mykonosBuild_t *buildType);
mykonosErr_t MYKONOS_configDpd(mykonosDevice_t *device);
mykonosErr_t MYKONOS_getDpdConfig(mykonosDevice_t *device);
mykonosErr_t MYKONOS_getDpdStatus(mykonosDevice_t *device, mykonosTxChannels_t txChannel, mykonosDpdStatus_t *dpdStatus);
mykonosErr_t MYKONOS_restoreDpdModel(mykonosDevice_t *device, mykonosTxChannels_t txChannel, uint8_t *modelDataBuffer, uint32_t modelNumberBytes);
mykonosErr_t MYKONOS_saveDpdModel(mykonosDevice_t *device, mykonosTxChannels_t txChannel, uint8_t *modelDataBuffer, uint32_t modelNumberBytes);
mykonosErr_t MYKONOS_setDpdActState(mykonosDevice_t *device, mykonosTxChannels_t txChannel, uint8_t actState);
mykonosErr_t MYKONOS_resetDpd(mykonosDevice_t *device, mykonosTxChannels_t txChannel, mykonosDpdResetMode_t reset);
mykonosErr_t MYKONOS_setDpdBypassConfig(mykonosDevice_t *device, mykonosDpdBypassConfig_t *actConfig);
mykonosErr_t MYKONOS_getDpdBypassConfig(mykonosDevice_t *device, mykonosDpdBypassConfig_t *actConfig);
mykonosErr_t MYKONOS_setDpdActuatorCheck(mykonosDevice_t *device, mykonosDpdActuatorCheck_t *actCheck);
mykonosErr_t MYKONOS_getDpdActuatorCheck(mykonosDevice_t *device, mykonosDpdActuatorCheck_t *actCheck);
mykonosErr_t MYKONOS_setClgcAttenTuningConfig(mykonosDevice_t *device, mykonosClgcAttenTuningConfig_t *attRangeCfg);
mykonosErr_t MYKONOS_getClgcAttenTuningConfig(mykonosDevice_t *device, mykonosClgcAttenTuningConfig_t *attRangeCfg);
mykonosErr_t MYKONOS_configClgc(mykonosDevice_t *device);
mykonosErr_t MYKONOS_getClgcConfig(mykonosDevice_t *device);
mykonosErr_t MYKONOS_getClgcStatus(mykonosDevice_t *device, mykonosTxChannels_t txChannel, mykonosClgcStatus_t *clgcStatus);
mykonosErr_t MYKONOS_setClgcGain(mykonosDevice_t *device, mykonosTxChannels_t txChannel, int16_t gain);
mykonosErr_t MYKONOS_configVswr(mykonosDevice_t *device);
mykonosErr_t MYKONOS_getVswrConfig(mykonosDevice_t *device);
mykonosErr_t MYKONOS_getVswrStatus(mykonosDevice_t *device, mykonosTxChannels_t txChannel, mykonosVswrStatus_t *vswrStatus);
mykonosErr_t MYKONOS_runInitCals(mykonosDevice_t *device, uint32_t calMask);
mykonosErr_t MYKONOS_waitInitCals(mykonosDevice_t *device, uint32_t timeoutMs, uint8_t *errorFlag, uint8_t *errorCode);
mykonosErr_t MYKONOS_abortInitCals(mykonosDevice_t *device, uint32_t *calsCompleted);
mykonosErr_t MYKONOS_getInitCalStatus(mykonosDevice_t *device, mykonosInitCalStatus_t *initCalStatus);
mykonosErr_t MYKONOS_resetExtTxLolChannel(mykonosDevice_t *device, mykonosTxChannels_t channelSel);
mykonosErr_t MYKONOS_radioOn(mykonosDevice_t *device);
mykonosErr_t MYKONOS_radioOff(mykonosDevice_t *device);
mykonosErr_t MYKONOS_getRadioState(mykonosDevice_t *device, uint32_t *radioStatus);
mykonosErr_t MYKONOS_enableTrackingCals(mykonosDevice_t *device, uint32_t enableMask);
mykonosErr_t MYKONOS_rescheduleTrackingCal(mykonosDevice_t *device, mykonosTrackingCalibrations_t trackingCal);
mykonosErr_t MYKONOS_setAllTrackCalState(mykonosDevice_t *device, uint32_t trackingCalMask);
mykonosErr_t MYKONOS_getAllTrackCalState(mykonosDevice_t *device, uint32_t *trackCals);
mykonosErr_t MYKONOS_setTrackingCalState(mykonosDevice_t *device, mykonosTrackingCalibrations_t trackingCal, uint8_t trackCalState);
mykonosErr_t MYKONOS_getTrackingCalState(mykonosDevice_t *device, mykonosTrackingCalibrations_t trackingCal, uint8_t *trackCalState);
mykonosErr_t MYKONOS_getEnabledTrackingCals(mykonosDevice_t *device, uint32_t *enableMask);
mykonosErr_t MYKONOS_getPendingTrackingCals(mykonosDevice_t *device, uint32_t *pendingCalMask);
mykonosErr_t MYKONOS_getTxLolStatus(mykonosDevice_t *device, mykonosTxChannels_t txChannel, mykonosTxLolStatus_t *txLolStatus);
mykonosErr_t MYKONOS_getTxQecStatus(mykonosDevice_t *device, mykonosTxChannels_t txChannel, mykonosTxQecStatus_t *txQecStatus);
mykonosErr_t MYKONOS_getRxQecStatus(mykonosDevice_t *device, mykonosRxChannels_t rxChannel, mykonosRxQecStatus_t *rxQecStatus);
mykonosErr_t MYKONOS_getOrxQecStatus(mykonosDevice_t *device, mykonosObsRxChannels_t orxChannel, mykonosOrxQecStatus_t *orxQecStatus);
mykonosErr_t MYKONOS_setSnifferChannel(mykonosDevice_t *device, mykonosSnifferChannel_t snifferChannel);
mykonosErr_t MYKONOS_setRadioControlPinMode(mykonosDevice_t *device);
mykonosErr_t MYKONOS_setPathDelay(mykonosDevice_t *device, mykonosPathdelay_t *pathDelay);
mykonosErr_t MYKONOS_getPathDelay(mykonosDevice_t *device, mykonosPathDelaySel_t select, mykonosPathdelay_t *pathDelay);
mykonosErr_t MYKONOS_getDpdErrorCounters(mykonosDevice_t *device, mykonosTxChannels_t txChannel, mykonosDpdErrorCounters_t *dpdErrCnt);
/* Low level ARM functions */
mykonosErr_t MYKONOS_readArmMem(mykonosDevice_t *device, uint32_t address, uint8_t *returnData, uint32_t bytesToRead, uint8_t autoIncrement);
mykonosErr_t MYKONOS_writeArmMem(mykonosDevice_t *device, uint32_t address, uint8_t *data, uint32_t byteCount);
mykonosErr_t MYKONOS_writeArmConfig(mykonosDevice_t *device, uint8_t objectId, uint16_t offset, uint8_t *data, uint8_t byteCount);
mykonosErr_t MYKONOS_readArmConfig(mykonosDevice_t *device, uint8_t objectId, uint16_t offset, uint8_t *data, uint8_t byteCount);
mykonosErr_t MYKONOS_sendArmCommand(mykonosDevice_t *device, uint8_t opCode, uint8_t *extendedData, uint8_t extendedDataNumBytes);
mykonosErr_t MYKONOS_readArmCmdStatus(mykonosDevice_t *device, uint16_t *errorWord, uint16_t *statusWord);
mykonosErr_t MYKONOS_readArmCmdStatusByte(mykonosDevice_t *device, uint8_t opCode, uint8_t *cmdStatByte);
mykonosErr_t MYKONOS_waitArmCmdStatus(mykonosDevice_t *device, uint8_t opCode, uint32_t timeoutMs, uint8_t *cmdStatByte);
mykonosErr_t MYKONOS_writeArmProfile(mykonosDevice_t *device);
mykonosErr_t MYKONOS_loadAdcProfiles(mykonosDevice_t *device);
/*
*****************************************************************************
* JESD204B Datapath Functions
*****************************************************************************
*/
/* Functions to setup the JESD204B IP */
mykonosErr_t MYKONOS_resetDeframer(mykonosDevice_t *device);
mykonosErr_t MYKONOS_setupSerializers(mykonosDevice_t *device);
mykonosErr_t MYKONOS_setupDeserializers(mykonosDevice_t *device);
mykonosErr_t MYKONOS_setupJesd204bFramer(mykonosDevice_t *device);
mykonosErr_t MYKONOS_setupJesd204bObsRxFramer(mykonosDevice_t *device);
mykonosErr_t MYKONOS_setupJesd204bDeframer(mykonosDevice_t *device);
mykonosErr_t MYKONOS_enableRxFramerLink(mykonosDevice_t *device, uint8_t enable);
mykonosErr_t MYKONOS_enableObsRxFramerLink(mykonosDevice_t *device, uint8_t enable);
/* Functions to initialize the JESD204B link */
mykonosErr_t MYKONOS_enableMultichipSync(mykonosDevice_t *device, uint8_t enableMcs, uint8_t *mcsStatus);
mykonosErr_t MYKONOS_enableSysrefToRxFramer(mykonosDevice_t *device, uint8_t enable);
mykonosErr_t MYKONOS_enableSysrefToObsRxFramer(mykonosDevice_t *device, uint8_t enable);
mykonosErr_t MYKONOS_enableSysrefToDeframer(mykonosDevice_t *device, uint8_t enable);
/* Functions to help debug the JESD204B link */
mykonosErr_t MYKONOS_readRxFramerStatus(mykonosDevice_t *device, uint8_t *framerStatus);
mykonosErr_t MYKONOS_readOrxFramerStatus(mykonosDevice_t *device, uint8_t *obsFramerStatus);
mykonosErr_t MYKONOS_readDeframerStatus(mykonosDevice_t *device, uint8_t *deframerStatus);
mykonosErr_t MYKONOS_getDeframerFifoDepth(mykonosDevice_t *device, uint8_t *fifoDepth, uint8_t *readEnLmfcCount);
/* PRBS debug functions */
mykonosErr_t MYKONOS_enableRxFramerPrbs(mykonosDevice_t *device, mykonosPrbsOrder_t polyOrder, uint8_t enable);
mykonosErr_t MYKONOS_enableObsRxFramerPrbs(mykonosDevice_t *device, mykonosPrbsOrder_t polyOrder, uint8_t enable);
mykonosErr_t MYKONOS_rxInjectPrbsError(mykonosDevice_t *device);
mykonosErr_t MYKONOS_obsRxInjectPrbsError(mykonosDevice_t *device);
mykonosErr_t MYKONOS_enableDeframerPrbsChecker(mykonosDevice_t *device, uint8_t lanes, mykonosPrbsOrder_t polyOrder, uint8_t enable);
mykonosErr_t MYKONOS_clearDeframerPrbsCounters(mykonosDevice_t *device);
mykonosErr_t MYKONOS_readDeframerPrbsCounters(mykonosDevice_t *device, uint8_t counterSelect, uint32_t *prbsErrorCount);
/* Miscellaneous debug functions */
mykonosErr_t MYKONOS_jesd204bIlasCheck(mykonosDevice_t *device, uint16_t *mismatch);
mykonosErr_t MYKONOS_setRxFramerDataSource(mykonosDevice_t *device, uint8_t dataSource);
mykonosErr_t MYKONOS_setObsRxFramerDataSource(mykonosDevice_t *device, uint8_t dataSource);
/*
*****************************************************************************
* Shared Data path functions
*****************************************************************************
*/
mykonosErr_t MYKONOS_programFir(mykonosDevice_t *device, mykonosfirName_t filterToProgram, mykonosFir_t *firFilter);
mykonosErr_t MYKONOS_readFir(mykonosDevice_t *device, mykonosfirName_t filterToRead, mykonosFir_t *firFilter);
/*
*****************************************************************************
* Rx Data path functions
*****************************************************************************
*/
mykonosErr_t MYKONOS_programRxGainTable(mykonosDevice_t *device, uint8_t *gainTablePtr, uint8_t numGainIndexesInTable, mykonosGainTable_t rxChannel);
mykonosErr_t MYKONOS_setRx1ManualGain(mykonosDevice_t *device, uint8_t gainIndex);
mykonosErr_t MYKONOS_setRx2ManualGain(mykonosDevice_t *device, uint8_t gainIndex);
mykonosErr_t MYKONOS_getRx1Gain(mykonosDevice_t *device, uint8_t *rx1GainIndex);
mykonosErr_t MYKONOS_getRx2Gain(mykonosDevice_t *device, uint8_t *rx2GainIndex);
mykonosErr_t MYKONOS_setupRxAgc(mykonosDevice_t *device);
mykonosErr_t MYKONOS_resetRxAgc(mykonosDevice_t *device);
mykonosErr_t MYKONOS_setRxAgcMinMaxGainIndex(mykonosDevice_t *device, mykonosRxChannels_t rxChannelSelect, uint8_t maxGainIndex, uint8_t minGainIndex);
mykonosErr_t MYKONOS_setObsRxAgcMinMaxGainIndex(mykonosDevice_t *device, mykonosObsRxChannels_t obsRxChannelSelect, uint8_t maxGainIndex, uint8_t minGainIndex);
mykonosErr_t MYKONOS_setRx1TempGainComp(mykonosDevice_t *device, int16_t rx1TempCompGain_mdB);
mykonosErr_t MYKONOS_getRx1TempGainComp(mykonosDevice_t *device, int16_t *rx1TempCompGain_mdB);
mykonosErr_t MYKONOS_setRx2TempGainComp(mykonosDevice_t *device, int16_t rx2TempCompGain_mdB);
mykonosErr_t MYKONOS_getRx2TempGainComp(mykonosDevice_t *device, int16_t *rx2TempCompGain_mdB);
mykonosErr_t MYKONOS_setObsRxTempGainComp(mykonosDevice_t *device, int16_t obsRxTempCompGain_mdB);
mykonosErr_t MYKONOS_getObsRxTempGainComp(mykonosDevice_t *device, int16_t *obsRxTempCompGain_mdB);
mykonosErr_t MYKONOS_enableRxGainCtrSyncPulse(mykonosDevice_t *device, uint8_t enable);
mykonosErr_t MYKONOS_setRxGainControlMode(mykonosDevice_t *device, mykonosGainMode_t mode);
mykonosErr_t MYKONOS_getRx1DecPower(mykonosDevice_t *device, uint16_t *rx1DecPower_mdBFS);
mykonosErr_t MYKONOS_getRx2DecPower(mykonosDevice_t *device, uint16_t *rx2DecPower_mdBFS);
/*
*****************************************************************************
* Observation Rx Data path functions
*****************************************************************************
*/
mykonosErr_t MYKONOS_setDefaultObsRxPath(mykonosDevice_t *device, mykonosObsRxChannels_t defaultObsRxCh);
mykonosErr_t MYKONOS_setObsRxPathSource(mykonosDevice_t *device, mykonosObsRxChannels_t obsRxCh);
mykonosErr_t MYKONOS_getObsRxPathSource(mykonosDevice_t *device, mykonosObsRxChannels_t *obsRxCh);
mykonosErr_t MYKONOS_setObsRxManualGain(mykonosDevice_t *device, mykonosObsRxChannels_t obsRxCh, uint8_t gainIndex);
mykonosErr_t MYKONOS_getObsRxGain(mykonosDevice_t *device, uint8_t *gainIndex);
mykonosErr_t MYKONOS_setupObsRxAgc(mykonosDevice_t *device);
mykonosErr_t MYKONOS_enableObsRxGainCtrSyncPulse(mykonosDevice_t *device, uint8_t enable);
mykonosErr_t MYKONOS_setObsRxGainControlMode(mykonosDevice_t *device, mykonosGainMode_t mode);
mykonosErr_t MYKONOS_getObsRxDecPower(mykonosDevice_t *device, uint16_t *obsRxDecPower_mdBFS);
/*
*****************************************************************************
* Tx Data path functions
*****************************************************************************
*/
mykonosErr_t MYKONOS_setTx1Attenuation(mykonosDevice_t *device, uint16_t tx1Attenuation_mdB);
mykonosErr_t MYKONOS_setTx2Attenuation(mykonosDevice_t *device, uint16_t tx2Attenuation_mdB);
mykonosErr_t MYKONOS_getTx1Attenuation(mykonosDevice_t *device, uint16_t *tx1Attenuation_mdB);
mykonosErr_t MYKONOS_getTx2Attenuation(mykonosDevice_t *device, uint16_t *tx2Attenuation_mdB);
mykonosErr_t MYKONOS_getTxFilterOverRangeStatus(mykonosDevice_t *device, uint8_t *txFilterStatus);
mykonosErr_t MYKONOS_enableTxNco(mykonosDevice_t *device, uint8_t enable, int32_t tx1ToneFreq_kHz, int32_t tx2ToneFreq_kHz);
/*
*****************************************************************************
* PA Protection Functions
*****************************************************************************
*/
mykonosErr_t MYKONOS_setupPaProtection(mykonosDevice_t *device, uint16_t powerThreshold, uint8_t attenStepSize, uint8_t avgDuration, uint8_t stickyFlagEnable, uint8_t txAttenControlEnable);
mykonosErr_t MYKONOS_enablePaProtection(mykonosDevice_t *device, uint8_t enable);
mykonosErr_t MYKONOS_getDacPower(mykonosDevice_t *device, mykonosTxChannels_t channel, uint16_t *channelPower);
mykonosErr_t MYKONOS_getPaProtectErrorFlagStatus(mykonosDevice_t *device, uint8_t *errorFlagStatus);
mykonosErr_t MYKONOS_clearPaErrorFlag(mykonosDevice_t *device);
/*
*****************************************************************************
* Low level functions and helper functions. BBP should not need to call
*****************************************************************************
*/
const char* getMykonosErrorMessage(mykonosErr_t errorCode);
mykonosErr_t MYKONOS_initSubRegisterTables(mykonosDevice_t *device);
mykonosErr_t MYKONOS_setTxPfirSyncClk(mykonosDevice_t *device); /* Helper function */
mykonosErr_t MYKONOS_setRxPfirSyncClk(mykonosDevice_t *device); /* Helper function */
/*
*****************************************************************************
* Functions to configure DC offsets
*****************************************************************************
*/
mykonosErr_t MYKONOS_setRfDcOffsetCnt(mykonosDevice_t *device, mykonosDcOffsetChannels_t channel, uint16_t measureCount);
mykonosErr_t MYKONOS_getRfDcOffsetCnt(mykonosDevice_t *device, mykonosDcOffsetChannels_t channel, uint16_t *measureCount);
mykonosErr_t MYKONOS_setDigDcOffsetMShift(mykonosDevice_t *device, mykonosDcOffsetChannels_t channel, uint8_t mShift);
mykonosErr_t MYKONOS_getDigDcOffsetMShift(mykonosDevice_t *device, mykonosDcOffsetChannels_t channel, uint8_t *mShift);
mykonosErr_t MYKONOS_setDigDcOffsetEn(mykonosDevice_t *device, uint8_t enableMask);
mykonosErr_t MYKONOS_getDigDcOffsetEn(mykonosDevice_t *device, uint8_t *enableMask);
#ifdef __cplusplus
}
#endif
#endif
/*!
* \file mykonos.h
* \brief Contains macro definitions and function prototypes for mykonos.c
*
* Mykonos API version: 1.5.2.3566
*/
/**
* \page Disclaimer Legal Disclaimer
* Copyright 2015-2017 Analog Devices Inc.
* Released under the AD9371 API license, for more information see the "LICENSE.txt" file in this zip file.
*
*/
#ifndef _MYKONOS_LIB_H_
#define _MYKONOS_LIB_H_
#ifdef __cplusplus
extern "C" {
#endif
#include "t_mykonos.h"
#include "mykonos_version.h"
#define TX_PROFILE_VALID 0x01
#define RX_PROFILE_VALID 0x02
#define ORX_PROFILE_VALID 0x04
#define SNIFF_PROFILE_VALID 0x08
/*
****************************************************************************
* General Initialization functions
****************************************************************************
*/
mykonosErr_t MYKONOS_resetDevice(mykonosDevice_t *device);
mykonosErr_t MYKONOS_getDeviceRev(mykonosDevice_t *device, uint8_t *revision);
mykonosErr_t MYKONOS_getProductId(mykonosDevice_t *device, uint8_t *productId);
mykonosErr_t MYKONOS_setSpiSettings(mykonosDevice_t *device);
mykonosErr_t MYKONOS_verifyDeviceDataStructure(mykonosDevice_t *device);
mykonosErr_t MYKONOS_verifyProfiles(mykonosDevice_t *device);
mykonosErr_t MYKONOS_initialize(mykonosDevice_t *device);
mykonosErr_t MYKONOS_waitForEvent(mykonosDevice_t *device, waitEvent_t waitEvent, uint32_t timeout_us);
mykonosErr_t MYKONOS_readEventStatus(mykonosDevice_t *device, waitEvent_t waitEvent, uint8_t *eventDone);
mykonosErr_t MYKONOS_getApiVersion (mykonosDevice_t *device, uint32_t *siVer, uint32_t *majorVer, uint32_t *minorVer, uint32_t *buildVer);
/*
*****************************************************************************
* PLL / Synthesizer functions
*****************************************************************************
*/
mykonosErr_t MYKONOS_initDigitalClocks(mykonosDevice_t *device);
mykonosErr_t MYKONOS_setRfPllFrequency(mykonosDevice_t *device, mykonosRfPllName_t pllName, uint64_t rfPllLoFrequency_Hz);
mykonosErr_t MYKONOS_getRfPllFrequency(mykonosDevice_t *device, mykonosRfPllName_t pllName, uint64_t *rfPllLoFrequency_Hz);
mykonosErr_t MYKONOS_checkPllsLockStatus(mykonosDevice_t *device, uint8_t *pllLockStatus);
mykonosErr_t MYKONOS_setRfPllLoopFilter(mykonosDevice_t *device, mykonosRfPllName_t pllName, uint16_t loopBandwidth_kHz, uint8_t stability);
mykonosErr_t MYKONOS_getRfPllLoopFilter(mykonosDevice_t *device, mykonosRfPllName_t pllName, uint16_t *loopBandwidth_kHz, uint8_t *stability);
/*
*****************************************************************************
* ARM Processor Control Functions
*****************************************************************************
*/
mykonosErr_t MYKONOS_initArm(mykonosDevice_t *device);
mykonosErr_t MYKONOS_loadArmFromBinary(mykonosDevice_t *device, uint8_t *binary, uint32_t count);
mykonosErr_t MYKONOS_loadArmConcurrent(mykonosDevice_t *device, uint8_t *binary, uint32_t count);
mykonosErr_t MYKONOS_verifyArmChecksum(mykonosDevice_t *device);
mykonosErr_t MYKONOS_checkArmState(mykonosDevice_t *device, mykonosArmState_t armStateCheck);
mykonosErr_t MYKONOS_getArmVersion(mykonosDevice_t *device, uint8_t *majorVer, uint8_t *minorVer, uint8_t *rcVer, mykonosBuild_t *buildType);
mykonosErr_t MYKONOS_configDpd(mykonosDevice_t *device);
mykonosErr_t MYKONOS_getDpdConfig(mykonosDevice_t *device);
mykonosErr_t MYKONOS_getDpdStatus(mykonosDevice_t *device, mykonosTxChannels_t txChannel, mykonosDpdStatus_t *dpdStatus);
mykonosErr_t MYKONOS_restoreDpdModel(mykonosDevice_t *device, mykonosTxChannels_t txChannel, uint8_t *modelDataBuffer, uint32_t modelNumberBytes);
mykonosErr_t MYKONOS_saveDpdModel(mykonosDevice_t *device, mykonosTxChannels_t txChannel, uint8_t *modelDataBuffer, uint32_t modelNumberBytes);
mykonosErr_t MYKONOS_setDpdActState(mykonosDevice_t *device, mykonosTxChannels_t txChannel, uint8_t actState);
mykonosErr_t MYKONOS_resetDpd(mykonosDevice_t *device, mykonosTxChannels_t txChannel, mykonosDpdResetMode_t reset);
mykonosErr_t MYKONOS_setDpdBypassConfig(mykonosDevice_t *device, mykonosDpdBypassConfig_t *actConfig);
mykonosErr_t MYKONOS_getDpdBypassConfig(mykonosDevice_t *device, mykonosDpdBypassConfig_t *actConfig);
mykonosErr_t MYKONOS_setDpdActuatorCheck(mykonosDevice_t *device, mykonosDpdActuatorCheck_t *actCheck);
mykonosErr_t MYKONOS_getDpdActuatorCheck(mykonosDevice_t *device, mykonosDpdActuatorCheck_t *actCheck);
mykonosErr_t MYKONOS_setClgcAttenTuningConfig(mykonosDevice_t *device, mykonosClgcAttenTuningConfig_t *attRangeCfg);
mykonosErr_t MYKONOS_getClgcAttenTuningConfig(mykonosDevice_t *device, mykonosClgcAttenTuningConfig_t *attRangeCfg);
mykonosErr_t MYKONOS_configClgc(mykonosDevice_t *device);
mykonosErr_t MYKONOS_getClgcConfig(mykonosDevice_t *device);
mykonosErr_t MYKONOS_getClgcStatus(mykonosDevice_t *device, mykonosTxChannels_t txChannel, mykonosClgcStatus_t *clgcStatus);
mykonosErr_t MYKONOS_setClgcGain(mykonosDevice_t *device, mykonosTxChannels_t txChannel, int16_t gain);
mykonosErr_t MYKONOS_configVswr(mykonosDevice_t *device);
mykonosErr_t MYKONOS_getVswrConfig(mykonosDevice_t *device);
mykonosErr_t MYKONOS_getVswrStatus(mykonosDevice_t *device, mykonosTxChannels_t txChannel, mykonosVswrStatus_t *vswrStatus);
mykonosErr_t MYKONOS_runInitCals(mykonosDevice_t *device, uint32_t calMask);
mykonosErr_t MYKONOS_waitInitCals(mykonosDevice_t *device, uint32_t timeoutMs, uint8_t *errorFlag, uint8_t *errorCode);
mykonosErr_t MYKONOS_abortInitCals(mykonosDevice_t *device, uint32_t *calsCompleted);
mykonosErr_t MYKONOS_getInitCalStatus(mykonosDevice_t *device, mykonosInitCalStatus_t *initCalStatus);
mykonosErr_t MYKONOS_resetExtTxLolChannel(mykonosDevice_t *device, mykonosTxChannels_t channelSel);
mykonosErr_t MYKONOS_radioOn(mykonosDevice_t *device);
mykonosErr_t MYKONOS_radioOff(mykonosDevice_t *device);
mykonosErr_t MYKONOS_getRadioState(mykonosDevice_t *device, uint32_t *radioStatus);
mykonosErr_t MYKONOS_enableTrackingCals(mykonosDevice_t *device, uint32_t enableMask);
mykonosErr_t MYKONOS_rescheduleTrackingCal(mykonosDevice_t *device, mykonosTrackingCalibrations_t trackingCal);
mykonosErr_t MYKONOS_setAllTrackCalState(mykonosDevice_t *device, uint32_t trackingCalMask);
mykonosErr_t MYKONOS_getAllTrackCalState(mykonosDevice_t *device, uint32_t *trackCals);
mykonosErr_t MYKONOS_setTrackingCalState(mykonosDevice_t *device, mykonosTrackingCalibrations_t trackingCal, uint8_t trackCalState);
mykonosErr_t MYKONOS_getTrackingCalState(mykonosDevice_t *device, mykonosTrackingCalibrations_t trackingCal, uint8_t *trackCalState);
mykonosErr_t MYKONOS_getEnabledTrackingCals(mykonosDevice_t *device, uint32_t *enableMask);
mykonosErr_t MYKONOS_getPendingTrackingCals(mykonosDevice_t *device, uint32_t *pendingCalMask);
mykonosErr_t MYKONOS_getTxLolStatus(mykonosDevice_t *device, mykonosTxChannels_t txChannel, mykonosTxLolStatus_t *txLolStatus);
mykonosErr_t MYKONOS_getTxQecStatus(mykonosDevice_t *device, mykonosTxChannels_t txChannel, mykonosTxQecStatus_t *txQecStatus);
mykonosErr_t MYKONOS_getRxQecStatus(mykonosDevice_t *device, mykonosRxChannels_t rxChannel, mykonosRxQecStatus_t *rxQecStatus);
mykonosErr_t MYKONOS_getOrxQecStatus(mykonosDevice_t *device, mykonosObsRxChannels_t orxChannel, mykonosOrxQecStatus_t *orxQecStatus);
mykonosErr_t MYKONOS_setSnifferChannel(mykonosDevice_t *device, mykonosSnifferChannel_t snifferChannel);
mykonosErr_t MYKONOS_setRadioControlPinMode(mykonosDevice_t *device);
mykonosErr_t MYKONOS_setPathDelay(mykonosDevice_t *device, mykonosPathdelay_t *pathDelay);
mykonosErr_t MYKONOS_getPathDelay(mykonosDevice_t *device, mykonosPathDelaySel_t select, mykonosPathdelay_t *pathDelay);
mykonosErr_t MYKONOS_getDpdErrorCounters(mykonosDevice_t *device, mykonosTxChannels_t txChannel, mykonosDpdErrorCounters_t *dpdErrCnt);
/* Low level ARM functions */
mykonosErr_t MYKONOS_readArmMem(mykonosDevice_t *device, uint32_t address, uint8_t *returnData, uint32_t bytesToRead, uint8_t autoIncrement);
mykonosErr_t MYKONOS_writeArmMem(mykonosDevice_t *device, uint32_t address, uint8_t *data, uint32_t byteCount);
mykonosErr_t MYKONOS_writeArmConfig(mykonosDevice_t *device, uint8_t objectId, uint16_t offset, uint8_t *data, uint8_t byteCount);
mykonosErr_t MYKONOS_readArmConfig(mykonosDevice_t *device, uint8_t objectId, uint16_t offset, uint8_t *data, uint8_t byteCount);
mykonosErr_t MYKONOS_sendArmCommand(mykonosDevice_t *device, uint8_t opCode, uint8_t *extendedData, uint8_t extendedDataNumBytes);
mykonosErr_t MYKONOS_readArmCmdStatus(mykonosDevice_t *device, uint16_t *errorWord, uint16_t *statusWord);
mykonosErr_t MYKONOS_readArmCmdStatusByte(mykonosDevice_t *device, uint8_t opCode, uint8_t *cmdStatByte);
mykonosErr_t MYKONOS_waitArmCmdStatus(mykonosDevice_t *device, uint8_t opCode, uint32_t timeoutMs, uint8_t *cmdStatByte);
mykonosErr_t MYKONOS_writeArmProfile(mykonosDevice_t *device);
mykonosErr_t MYKONOS_loadAdcProfiles(mykonosDevice_t *device);
/*
*****************************************************************************
* JESD204B Datapath Functions
*****************************************************************************
*/
/* Functions to setup the JESD204B IP */
mykonosErr_t MYKONOS_resetDeframer(mykonosDevice_t *device);
mykonosErr_t MYKONOS_setupSerializers(mykonosDevice_t *device);
mykonosErr_t MYKONOS_setupDeserializers(mykonosDevice_t *device);
mykonosErr_t MYKONOS_setupJesd204bFramer(mykonosDevice_t *device);
mykonosErr_t MYKONOS_setupJesd204bObsRxFramer(mykonosDevice_t *device);
mykonosErr_t MYKONOS_setupJesd204bDeframer(mykonosDevice_t *device);
mykonosErr_t MYKONOS_enableRxFramerLink(mykonosDevice_t *device, uint8_t enable);
mykonosErr_t MYKONOS_enableObsRxFramerLink(mykonosDevice_t *device, uint8_t enable);
/* Functions to initialize the JESD204B link */
mykonosErr_t MYKONOS_enableMultichipSync(mykonosDevice_t *device, uint8_t enableMcs, uint8_t *mcsStatus);
mykonosErr_t MYKONOS_enableSysrefToRxFramer(mykonosDevice_t *device, uint8_t enable);
mykonosErr_t MYKONOS_enableSysrefToObsRxFramer(mykonosDevice_t *device, uint8_t enable);
mykonosErr_t MYKONOS_enableSysrefToDeframer(mykonosDevice_t *device, uint8_t enable);
/* Functions to help debug the JESD204B link */
mykonosErr_t MYKONOS_readRxFramerStatus(mykonosDevice_t *device, uint8_t *framerStatus);
mykonosErr_t MYKONOS_readOrxFramerStatus(mykonosDevice_t *device, uint8_t *obsFramerStatus);
mykonosErr_t MYKONOS_readDeframerStatus(mykonosDevice_t *device, uint8_t *deframerStatus);
mykonosErr_t MYKONOS_getDeframerFifoDepth(mykonosDevice_t *device, uint8_t *fifoDepth, uint8_t *readEnLmfcCount);
/* PRBS debug functions */
mykonosErr_t MYKONOS_enableRxFramerPrbs(mykonosDevice_t *device, mykonosPrbsOrder_t polyOrder, uint8_t enable);
mykonosErr_t MYKONOS_enableObsRxFramerPrbs(mykonosDevice_t *device, mykonosPrbsOrder_t polyOrder, uint8_t enable);
mykonosErr_t MYKONOS_rxInjectPrbsError(mykonosDevice_t *device);
mykonosErr_t MYKONOS_obsRxInjectPrbsError(mykonosDevice_t *device);
mykonosErr_t MYKONOS_enableDeframerPrbsChecker(mykonosDevice_t *device, uint8_t lanes, mykonosPrbsOrder_t polyOrder, uint8_t enable);
mykonosErr_t MYKONOS_clearDeframerPrbsCounters(mykonosDevice_t *device);
mykonosErr_t MYKONOS_readDeframerPrbsCounters(mykonosDevice_t *device, uint8_t counterSelect, uint32_t *prbsErrorCount);
/* Miscellaneous debug functions */
mykonosErr_t MYKONOS_jesd204bIlasCheck(mykonosDevice_t *device, uint16_t *mismatch);
mykonosErr_t MYKONOS_setRxFramerDataSource(mykonosDevice_t *device, uint8_t dataSource);
mykonosErr_t MYKONOS_setObsRxFramerDataSource(mykonosDevice_t *device, uint8_t dataSource);
/*
*****************************************************************************
* Shared Data path functions
*****************************************************************************
*/
mykonosErr_t MYKONOS_programFir(mykonosDevice_t *device, mykonosfirName_t filterToProgram, mykonosFir_t *firFilter);
mykonosErr_t MYKONOS_readFir(mykonosDevice_t *device, mykonosfirName_t filterToRead, mykonosFir_t *firFilter);
/*
*****************************************************************************
* Rx Data path functions
*****************************************************************************
*/
mykonosErr_t MYKONOS_programRxGainTable(mykonosDevice_t *device, uint8_t *gainTablePtr, uint8_t numGainIndexesInTable, mykonosGainTable_t rxChannel);
mykonosErr_t MYKONOS_setRx1ManualGain(mykonosDevice_t *device, uint8_t gainIndex);
mykonosErr_t MYKONOS_setRx2ManualGain(mykonosDevice_t *device, uint8_t gainIndex);
mykonosErr_t MYKONOS_getRx1Gain(mykonosDevice_t *device, uint8_t *rx1GainIndex);
mykonosErr_t MYKONOS_getRx2Gain(mykonosDevice_t *device, uint8_t *rx2GainIndex);
mykonosErr_t MYKONOS_setupRxAgc(mykonosDevice_t *device);
mykonosErr_t MYKONOS_resetRxAgc(mykonosDevice_t *device);
mykonosErr_t MYKONOS_setRxAgcMinMaxGainIndex(mykonosDevice_t *device, mykonosRxChannels_t rxChannelSelect, uint8_t maxGainIndex, uint8_t minGainIndex);
mykonosErr_t MYKONOS_setObsRxAgcMinMaxGainIndex(mykonosDevice_t *device, mykonosObsRxChannels_t obsRxChannelSelect, uint8_t maxGainIndex, uint8_t minGainIndex);
mykonosErr_t MYKONOS_setRx1TempGainComp(mykonosDevice_t *device, int16_t rx1TempCompGain_mdB);
mykonosErr_t MYKONOS_getRx1TempGainComp(mykonosDevice_t *device, int16_t *rx1TempCompGain_mdB);
mykonosErr_t MYKONOS_setRx2TempGainComp(mykonosDevice_t *device, int16_t rx2TempCompGain_mdB);
mykonosErr_t MYKONOS_getRx2TempGainComp(mykonosDevice_t *device, int16_t *rx2TempCompGain_mdB);
mykonosErr_t MYKONOS_setObsRxTempGainComp(mykonosDevice_t *device, int16_t obsRxTempCompGain_mdB);
mykonosErr_t MYKONOS_getObsRxTempGainComp(mykonosDevice_t *device, int16_t *obsRxTempCompGain_mdB);
mykonosErr_t MYKONOS_enableRxGainCtrSyncPulse(mykonosDevice_t *device, uint8_t enable);
mykonosErr_t MYKONOS_setRxGainControlMode(mykonosDevice_t *device, mykonosGainMode_t mode);
mykonosErr_t MYKONOS_getRx1DecPower(mykonosDevice_t *device, uint16_t *rx1DecPower_mdBFS);
mykonosErr_t MYKONOS_getRx2DecPower(mykonosDevice_t *device, uint16_t *rx2DecPower_mdBFS);
/*
*****************************************************************************
* Observation Rx Data path functions
*****************************************************************************
*/
mykonosErr_t MYKONOS_setDefaultObsRxPath(mykonosDevice_t *device, mykonosObsRxChannels_t defaultObsRxCh);
mykonosErr_t MYKONOS_setObsRxPathSource(mykonosDevice_t *device, mykonosObsRxChannels_t obsRxCh);
mykonosErr_t MYKONOS_getObsRxPathSource(mykonosDevice_t *device, mykonosObsRxChannels_t *obsRxCh);
mykonosErr_t MYKONOS_setObsRxManualGain(mykonosDevice_t *device, mykonosObsRxChannels_t obsRxCh, uint8_t gainIndex);
mykonosErr_t MYKONOS_getObsRxGain(mykonosDevice_t *device, uint8_t *gainIndex);
mykonosErr_t MYKONOS_setupObsRxAgc(mykonosDevice_t *device);
mykonosErr_t MYKONOS_enableObsRxGainCtrSyncPulse(mykonosDevice_t *device, uint8_t enable);
mykonosErr_t MYKONOS_setObsRxGainControlMode(mykonosDevice_t *device, mykonosGainMode_t mode);
mykonosErr_t MYKONOS_getObsRxDecPower(mykonosDevice_t *device, uint16_t *obsRxDecPower_mdBFS);
/*
*****************************************************************************
* Tx Data path functions
*****************************************************************************
*/
mykonosErr_t MYKONOS_setTx1Attenuation(mykonosDevice_t *device, uint16_t tx1Attenuation_mdB);
mykonosErr_t MYKONOS_setTx2Attenuation(mykonosDevice_t *device, uint16_t tx2Attenuation_mdB);
mykonosErr_t MYKONOS_getTx1Attenuation(mykonosDevice_t *device, uint16_t *tx1Attenuation_mdB);
mykonosErr_t MYKONOS_getTx2Attenuation(mykonosDevice_t *device, uint16_t *tx2Attenuation_mdB);
mykonosErr_t MYKONOS_getTxFilterOverRangeStatus(mykonosDevice_t *device, uint8_t *txFilterStatus);
mykonosErr_t MYKONOS_enableTxNco(mykonosDevice_t *device, uint8_t enable, int32_t tx1ToneFreq_kHz, int32_t tx2ToneFreq_kHz);
/*
*****************************************************************************
* PA Protection Functions
*****************************************************************************
*/
mykonosErr_t MYKONOS_setupPaProtection(mykonosDevice_t *device, uint16_t powerThreshold, uint8_t attenStepSize, uint8_t avgDuration, uint8_t stickyFlagEnable, uint8_t txAttenControlEnable);
mykonosErr_t MYKONOS_enablePaProtection(mykonosDevice_t *device, uint8_t enable);
mykonosErr_t MYKONOS_getDacPower(mykonosDevice_t *device, mykonosTxChannels_t channel, uint16_t *channelPower);
mykonosErr_t MYKONOS_getPaProtectErrorFlagStatus(mykonosDevice_t *device, uint8_t *errorFlagStatus);
mykonosErr_t MYKONOS_clearPaErrorFlag(mykonosDevice_t *device);
/*
*****************************************************************************
* Low level functions and helper functions. BBP should not need to call
*****************************************************************************
*/
const char* getMykonosErrorMessage(mykonosErr_t errorCode);
mykonosErr_t MYKONOS_initSubRegisterTables(mykonosDevice_t *device);
mykonosErr_t MYKONOS_setTxPfirSyncClk(mykonosDevice_t *device); /* Helper function */
mykonosErr_t MYKONOS_setRxPfirSyncClk(mykonosDevice_t *device); /* Helper function */
/*
*****************************************************************************
* Functions to configure DC offsets
*****************************************************************************
*/
mykonosErr_t MYKONOS_setRfDcOffsetCnt(mykonosDevice_t *device, mykonosDcOffsetChannels_t channel, uint16_t measureCount);
mykonosErr_t MYKONOS_getRfDcOffsetCnt(mykonosDevice_t *device, mykonosDcOffsetChannels_t channel, uint16_t *measureCount);
mykonosErr_t MYKONOS_setDigDcOffsetMShift(mykonosDevice_t *device, mykonosDcOffsetChannels_t channel, uint8_t mShift);
mykonosErr_t MYKONOS_getDigDcOffsetMShift(mykonosDevice_t *device, mykonosDcOffsetChannels_t channel, uint8_t *mShift);
mykonosErr_t MYKONOS_setDigDcOffsetEn(mykonosDevice_t *device, uint8_t enableMask);
mykonosErr_t MYKONOS_getDigDcOffsetEn(mykonosDevice_t *device, uint8_t *enableMask);
#ifdef __cplusplus
}
#endif
#endif
projects/datalink_814/dl814_dj_48m/project/dl814_dj_48m/dl814_dj_48m.sdk/dl814_dj/src/hardware/mykonos/mykonosMmap.c
+136 -136
View File
@@ -1,136 +1,136 @@
/**
* \file mykonosMmap.c
* \brief Contains the Mykonos memory mapping
*
* Mykonos API version: 1.5.2.3566
*/
/**
* \page Disclaimer Legal Disclaimer
* Copyright 2015-2017 Analog Devices Inc.
* Released under the AD9371 API license, for more information see the "LICENSE.txt" file in this zip file.
*
*/
#include <stdint.h>
uint8_t mykonosMmap [] = {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x13,0x03,0x03,0x13,0x13,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,
0x00,0xE4,0xE4,0x00,0x04,0x00,0x00,0x00,0x00,0x00,0x00,0x02,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xA5,0xA5,0x05,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x01,0x00,0xE4,0xE4,0x00,0x00,0x00,0x1F,0x00,0x14,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x02,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x9F,0xE0,0x20,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0xF5,0x8F,0x0F,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
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0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00};
/*!< Mykonos memory map */
/**
* \file mykonosMmap.c
* \brief Contains the Mykonos memory mapping
*
* Mykonos API version: 1.5.2.3566
*/
/**
* \page Disclaimer Legal Disclaimer
* Copyright 2015-2017 Analog Devices Inc.
* Released under the AD9371 API license, for more information see the "LICENSE.txt" file in this zip file.
*
*/
#include <stdint.h>
uint8_t mykonosMmap [] = {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x13,0x03,0x03,0x13,0x13,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,
0x00,0xE4,0xE4,0x00,0x04,0x00,0x00,0x00,0x00,0x00,0x00,0x02,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xA5,0xA5,0x05,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x01,0x00,0xE4,0xE4,0x00,0x00,0x00,0x1F,0x00,0x14,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x02,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x9F,0xE0,0x20,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0xF5,0x8F,0x0F,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
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/*!< Mykonos memory map */
projects/datalink_814/dl814_dj_48m/project/dl814_dj_48m/dl814_dj_48m.sdk/dl814_dj/src/hardware/mykonos/mykonos_gpio.c
+5357 -5357
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projects/datalink_814/dl814_dj_48m/project/dl814_dj_48m/dl814_dj_48m.sdk/dl814_dj/src/hardware/mykonos/mykonos_gpio.h
+172 -172
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@@ -1,172 +1,172 @@
/*!
* \file mykonos_gpio.h
* \brief Contains macro definitions and function prototypes for mykonos_gpio.c
*
* Mykonos API version: 1.5.2.3566
*/
/**
* \page Disclaimer Legal Disclaimer
* Copyright 2015-2017 Analog Devices Inc.
* Released under the AD9371 API license, for more information see the "LICENSE.txt" file in this zip file.
*
*/
#ifndef MYKONOSGPIO_H_
#define MYKONOSGPIO_H_
#ifdef __cplusplus
extern "C" {
#endif
#include "t_mykonos.h"
#include "t_mykonos_gpio.h"
/*
*****************************************************************************
* GPIO functions
*****************************************************************************
*/
/* GPIO CMOS and SPI setting Functions */
mykonosGpioErr_t MYKONOS_setGpioDrv(mykonosDevice_t *device, uint32_t gpioDrv);
mykonosGpioErr_t MYKONOS_getGpioDrv(mykonosDevice_t *device, uint32_t *gpioDrv);
mykonosGpioErr_t MYKONOS_setGpioSlewRate(mykonosDevice_t *device, mykonosGpioSelect_t gpioSelect, mykonosGpioSlewRate_t slewRate);
mykonosGpioErr_t MYKONOS_getGpioSlewRate(mykonosDevice_t *device, mykonosGpioSelect_t gpioSelect, mykonosGpioSlewRate_t *slewRate);
mykonosGpioErr_t MYKONOS_setCmosDrv(mykonosDevice_t *device, mykonosCmosPadDrvStr_t spiDrv);
mykonosGpioErr_t MYKONOS_getCmosDrv(mykonosDevice_t *device, mykonosCmosPadDrvStr_t *spiDrv);
/* Monitor output Functions */
mykonosGpioErr_t MYKONOS_setGpioMonitorOut(mykonosDevice_t *device, uint8_t monitorIndex, uint8_t monitorMask);
mykonosGpioErr_t MYKONOS_getGpioMonitorOut(mykonosDevice_t *device, uint8_t *monitorIndex, uint8_t *monitorMask);
/* RX GPIO Functions */
mykonosGpioErr_t MYKONOS_setRx1GainCtrlPin(mykonosDevice_t *device, uint8_t incStep, uint8_t decStep, mykonosGpioSelect_t rx1GainIncPin, mykonosGpioSelect_t rx1GainDecPin, uint8_t enable);
mykonosGpioErr_t MYKONOS_setRx2GainCtrlPin(mykonosDevice_t *device, uint8_t incStep, uint8_t decStep, mykonosGpioSelect_t rx2GainIncPin, mykonosGpioSelect_t rx2GainDecPin, uint8_t enable);
mykonosGpioErr_t MYKONOS_getRx1GainCtrlPin(mykonosDevice_t *device, uint8_t *incStep, uint8_t *decStep, mykonosGpioSelect_t *rx1GainIncPin, mykonosGpioSelect_t *rx1GainDecPin, uint8_t *enable);
mykonosGpioErr_t MYKONOS_getRx2GainCtrlPin(mykonosDevice_t *device, uint8_t *incStep, uint8_t *decStep, mykonosGpioSelect_t *rx2GainIncPin, mykonosGpioSelect_t *rx2GainDecPin, uint8_t *enable);
mykonosGpioErr_t MYKONOS_setRxHybridGainChangePin(mykonosDevice_t *device, mykonosGpioSelect_t rx1GainChangePin, mykonosGpioSelect_t rx2GainChangePin);
mykonosGpioErr_t MYKONOS_getRxHybridGainChangePin(mykonosDevice_t *device, mykonosGpioSelect_t *rx1GainChangePin, mykonosGpioSelect_t *rx2GainChangePin);
mykonosGpioErr_t MYKONOS_setObsRxHybridGainChangePin(mykonosDevice_t *device, mykonosGpioSelect_t obsRxGainChangePin);
mykonosGpioErr_t MYKONOS_getObsRxHybridGainChangePin(mykonosDevice_t *device, mykonosGpioSelect_t *obsRxGainChangePin);
mykonosGpioErr_t MYKONOS_setRxAgcEnSyncPin(mykonosDevice_t *device, mykonosGpioSelect_t rx1AgcSyncPin, mykonosGpioSelect_t rx2AgcSyncPin);
mykonosGpioErr_t MYKONOS_getRxAgcEnSyncPin(mykonosDevice_t *device, mykonosGpioSelect_t *rx1AgcSyncPin, mykonosGpioSelect_t *rx2AgcSyncPin);
mykonosGpioErr_t MYKONOS_setObsRxAgcEnSyncPin(mykonosDevice_t *device, mykonosGpioSelect_t obsRxAgcSyncPin);
mykonosGpioErr_t MYKONOS_getObsRxAgcEnSyncPin(mykonosDevice_t *device, mykonosGpioSelect_t *obsRxAgcSyncPin);
/* TX GPIO Functions */
mykonosGpioErr_t MYKONOS_setTx1AttenCtrlPin(mykonosDevice_t *device, uint8_t stepSize, mykonosGpioSelect_t tx1AttenIncPin, mykonosGpioSelect_t tx1AttenDecPin, uint8_t enable, uint8_t useTx1ForTx2);
mykonosGpioErr_t MYKONOS_setTx2AttenCtrlPin(mykonosDevice_t *device, uint8_t stepSize, mykonosGpioSelect_t tx2AttenIncPin, mykonosGpioSelect_t tx2AttenDecPin, uint8_t enable);
mykonosGpioErr_t MYKONOS_getTx1AttenCtrlPin(mykonosDevice_t *device, uint8_t *stepSize, mykonosGpioSelect_t *tx1AttenIncPin, mykonosGpioSelect_t *tx1AttenDecPin, uint8_t *enable, uint8_t *useTx1ForTx2);
mykonosGpioErr_t MYKONOS_getTx2AttenCtrlPin(mykonosDevice_t *device, uint8_t *stepSize, mykonosGpioSelect_t *tx2AttenIncPin, mykonosGpioSelect_t *tx2AttenDecPin, uint8_t *enable, uint8_t *useTx1ForTx2);
mykonosGpioErr_t MYKONOS_spi2GpioSetup(mykonosDevice_t *device, uint8_t enable, uint8_t updateTxAttenPinSelect);
/* GPIO memory source Functions */
mykonosGpioErr_t MYKONOS_setGpioPinLevel(mykonosDevice_t *device, uint32_t gpioPinLevel);
mykonosGpioErr_t MYKONOS_getGpioPinLevel(mykonosDevice_t *device, uint32_t *gpioPinLevel);
mykonosGpioErr_t MYKONOS_getGpioSetLevel(mykonosDevice_t *device, uint32_t *gpioPinSetLevel);
/* Gain Compensation Functions */
mykonosGpioErr_t MYKONOS_setRxGainCompensation (mykonosDevice_t *device, mykonosGainComp_t *gainComp, uint8_t enable);
mykonosGpioErr_t MYKONOS_getRxGainCompensation (mykonosDevice_t *device, mykonosGainComp_t *gainComp, uint8_t *enabled);
mykonosGpioErr_t MYKONOS_setObsRxGainCompensation (mykonosDevice_t *device, mykonosObsRxGainComp_t *gainComp, uint8_t enable);
mykonosGpioErr_t MYKONOS_getObsRxGainCompensation (mykonosDevice_t *device, mykonosObsRxGainComp_t *gainComp, uint8_t *enabled);
/* SLICER Functions */
mykonosGpioErr_t MYKONOS_setRxSlicerCtrl(mykonosDevice_t *device, uint8_t slicerStep, mykonosRxSlicer_t rx1Pins, mykonosRxSlicer_t rx2Pins, uint8_t enable);
mykonosGpioErr_t MYKONOS_getRxSlicerCtrl(mykonosDevice_t *device, uint8_t *slicerStep, mykonosRxSlicer_t *rx1Pins, mykonosRxSlicer_t *rx2Pins, uint8_t *enable);
mykonosGpioErr_t MYKONOS_setObsRxSlicerCtrl(mykonosDevice_t *device, uint8_t slicerStep, mykonosObsRxSlicer_t obsRxPins, uint8_t enable);
mykonosGpioErr_t MYKONOS_getObsRxSlicerCtrl(mykonosDevice_t *device, uint8_t *slicerStep, mykonosObsRxSlicer_t *obsRxPins, uint8_t *enable);
/* Floating Point Formatter Functions */
mykonosGpioErr_t MYKONOS_setFloatPointFrmt (mykonosDevice_t *device, mykonosFloatPntFrmt_t *floatFrmt);
mykonosGpioErr_t MYKONOS_getFloatPointFrmt (mykonosDevice_t *device, mykonosFloatPntFrmt_t *floatFrmt);
mykonosGpioErr_t MYKONOS_setRxEnFloatPntFrmt (mykonosDevice_t *device, uint8_t rx1Att, uint8_t rx2Att, uint8_t enable);
mykonosGpioErr_t MYKONOS_getRxEnFloatPntFrmt (mykonosDevice_t *device, uint8_t *rx1Att, uint8_t *rx2Att, uint8_t *enable);
mykonosGpioErr_t MYKONOS_setOrxEnFloatPntFrmt (mykonosDevice_t *device, uint8_t orxAtt, uint8_t enable);
mykonosGpioErr_t MYKONOS_getOrxEnFloatPntFrmt (mykonosDevice_t *device, uint8_t *orxAtt, uint8_t *enable);
/*
*****************************************************************************
* General Purpose Interrupt functions
*****************************************************************************
*/
mykonosGpioErr_t MYKONOS_configGpInterrupt(mykonosDevice_t *device, uint16_t gpMask);
mykonosGpioErr_t MYKONOS_readGpInterruptStatus(mykonosDevice_t *device, uint16_t *status);
/*
*****************************************************************************
* ARM GPIO usage functions
*****************************************************************************
*/
mykonosGpioErr_t MYKONOS_setArmGpioPins(mykonosDevice_t *device);
/*
*****************************************************************************
* AuxADC/AuxDAC functions
*****************************************************************************
*/
mykonosGpioErr_t MYKONOS_setupAuxAdcs(mykonosDevice_t *device, uint8_t adcDecimation, uint8_t enable);
mykonosGpioErr_t MYKONOS_setAuxAdcChannel(mykonosDevice_t *device, mykonosAuxAdcChannels_t auxAdcChannel);
mykonosGpioErr_t MYKONOS_readAuxAdc(mykonosDevice_t *device, uint16_t *adcCode);
mykonosGpioErr_t MYKONOS_setupAuxDacs(mykonosDevice_t *device);
mykonosGpioErr_t MYKONOS_writeAuxDac(mykonosDevice_t *device, uint8_t auxDacIndex, uint16_t auxDacCode);
/*
*****************************************************************************
* GPIO3v3 functions
*****************************************************************************
*/
mykonosGpioErr_t MYKONOS_setupGpio3v3(mykonosDevice_t *device);
mykonosGpioErr_t MYKONOS_setGpio3v3PinLevel(mykonosDevice_t *device, uint16_t gpio3v3PinLevel);
mykonosGpioErr_t MYKONOS_getGpio3v3SetLevel(mykonosDevice_t *device, uint16_t *gpio3v3SetLevel);
mykonosGpioErr_t MYKONOS_getGpio3v3PinLevel(mykonosDevice_t *device, uint16_t *gpio3v3PinLevel);
mykonosGpioErr_t MYKONOS_setGpio3v3Oe(mykonosDevice_t *device, uint16_t gpio3v3OutEn);
mykonosGpioErr_t MYKONOS_getGpio3v3Oe(mykonosDevice_t *device, uint16_t *gpio3v3OutEn);
mykonosGpioErr_t MYKONOS_setGpio3v3SourceCtrl(mykonosDevice_t *device, uint16_t gpio3v3SrcCtrl);
mykonosGpioErr_t MYKONOS_getGpio3v3SourceCtrl(mykonosDevice_t *device, uint16_t *gpio3v3SrcCtrl);
/*
*****************************************************************************
* GPIO helper functions
*****************************************************************************
*/
mykonosGpioErr_t MYKONOS_setupGpio(mykonosDevice_t *device);
mykonosGpioErr_t MYKONOS_setGpioOe(mykonosDevice_t *device, uint32_t gpioOutEn, uint32_t gpioUsedMask);
mykonosGpioErr_t MYKONOS_getGpioOe(mykonosDevice_t *device, uint32_t *gpioOutEn);
mykonosGpioErr_t MYKONOS_setGpioSourceCtrl(mykonosDevice_t *device, uint32_t gpioSrcCtrl);
mykonosGpioErr_t MYKONOS_getGpioSourceCtrl(mykonosDevice_t *device, uint32_t *gpioSrcCtrl);
/*
*****************************************************************************
* Temperature Sensor functions
*****************************************************************************
*/
mykonosGpioErr_t MYKONOS_setupTempSensor(mykonosDevice_t *device, mykonosTempSensorConfig_t *tempSensor);
mykonosGpioErr_t MYKONOS_getTempSensorConfig(mykonosDevice_t *device, mykonosTempSensorConfig_t *tempSensor);
mykonosGpioErr_t MYKONOS_startTempMeasurement(mykonosDevice_t *device);
mykonosGpioErr_t MYKONOS_readTempSensor(mykonosDevice_t *device, mykonosTempSensorStatus_t *tempStatus);
const char* getGpioMykonosErrorMessage(mykonosGpioErr_t errorCode);
#ifdef __cplusplus
}
#endif
#endif /* MYKONOSGPIO_H_ */
/*!
* \file mykonos_gpio.h
* \brief Contains macro definitions and function prototypes for mykonos_gpio.c
*
* Mykonos API version: 1.5.2.3566
*/
/**
* \page Disclaimer Legal Disclaimer
* Copyright 2015-2017 Analog Devices Inc.
* Released under the AD9371 API license, for more information see the "LICENSE.txt" file in this zip file.
*
*/
#ifndef MYKONOSGPIO_H_
#define MYKONOSGPIO_H_
#ifdef __cplusplus
extern "C" {
#endif
#include "t_mykonos.h"
#include "t_mykonos_gpio.h"
/*
*****************************************************************************
* GPIO functions
*****************************************************************************
*/
/* GPIO CMOS and SPI setting Functions */
mykonosGpioErr_t MYKONOS_setGpioDrv(mykonosDevice_t *device, uint32_t gpioDrv);
mykonosGpioErr_t MYKONOS_getGpioDrv(mykonosDevice_t *device, uint32_t *gpioDrv);
mykonosGpioErr_t MYKONOS_setGpioSlewRate(mykonosDevice_t *device, mykonosGpioSelect_t gpioSelect, mykonosGpioSlewRate_t slewRate);
mykonosGpioErr_t MYKONOS_getGpioSlewRate(mykonosDevice_t *device, mykonosGpioSelect_t gpioSelect, mykonosGpioSlewRate_t *slewRate);
mykonosGpioErr_t MYKONOS_setCmosDrv(mykonosDevice_t *device, mykonosCmosPadDrvStr_t spiDrv);
mykonosGpioErr_t MYKONOS_getCmosDrv(mykonosDevice_t *device, mykonosCmosPadDrvStr_t *spiDrv);
/* Monitor output Functions */
mykonosGpioErr_t MYKONOS_setGpioMonitorOut(mykonosDevice_t *device, uint8_t monitorIndex, uint8_t monitorMask);
mykonosGpioErr_t MYKONOS_getGpioMonitorOut(mykonosDevice_t *device, uint8_t *monitorIndex, uint8_t *monitorMask);
/* RX GPIO Functions */
mykonosGpioErr_t MYKONOS_setRx1GainCtrlPin(mykonosDevice_t *device, uint8_t incStep, uint8_t decStep, mykonosGpioSelect_t rx1GainIncPin, mykonosGpioSelect_t rx1GainDecPin, uint8_t enable);
mykonosGpioErr_t MYKONOS_setRx2GainCtrlPin(mykonosDevice_t *device, uint8_t incStep, uint8_t decStep, mykonosGpioSelect_t rx2GainIncPin, mykonosGpioSelect_t rx2GainDecPin, uint8_t enable);
mykonosGpioErr_t MYKONOS_getRx1GainCtrlPin(mykonosDevice_t *device, uint8_t *incStep, uint8_t *decStep, mykonosGpioSelect_t *rx1GainIncPin, mykonosGpioSelect_t *rx1GainDecPin, uint8_t *enable);
mykonosGpioErr_t MYKONOS_getRx2GainCtrlPin(mykonosDevice_t *device, uint8_t *incStep, uint8_t *decStep, mykonosGpioSelect_t *rx2GainIncPin, mykonosGpioSelect_t *rx2GainDecPin, uint8_t *enable);
mykonosGpioErr_t MYKONOS_setRxHybridGainChangePin(mykonosDevice_t *device, mykonosGpioSelect_t rx1GainChangePin, mykonosGpioSelect_t rx2GainChangePin);
mykonosGpioErr_t MYKONOS_getRxHybridGainChangePin(mykonosDevice_t *device, mykonosGpioSelect_t *rx1GainChangePin, mykonosGpioSelect_t *rx2GainChangePin);
mykonosGpioErr_t MYKONOS_setObsRxHybridGainChangePin(mykonosDevice_t *device, mykonosGpioSelect_t obsRxGainChangePin);
mykonosGpioErr_t MYKONOS_getObsRxHybridGainChangePin(mykonosDevice_t *device, mykonosGpioSelect_t *obsRxGainChangePin);
mykonosGpioErr_t MYKONOS_setRxAgcEnSyncPin(mykonosDevice_t *device, mykonosGpioSelect_t rx1AgcSyncPin, mykonosGpioSelect_t rx2AgcSyncPin);
mykonosGpioErr_t MYKONOS_getRxAgcEnSyncPin(mykonosDevice_t *device, mykonosGpioSelect_t *rx1AgcSyncPin, mykonosGpioSelect_t *rx2AgcSyncPin);
mykonosGpioErr_t MYKONOS_setObsRxAgcEnSyncPin(mykonosDevice_t *device, mykonosGpioSelect_t obsRxAgcSyncPin);
mykonosGpioErr_t MYKONOS_getObsRxAgcEnSyncPin(mykonosDevice_t *device, mykonosGpioSelect_t *obsRxAgcSyncPin);
/* TX GPIO Functions */
mykonosGpioErr_t MYKONOS_setTx1AttenCtrlPin(mykonosDevice_t *device, uint8_t stepSize, mykonosGpioSelect_t tx1AttenIncPin, mykonosGpioSelect_t tx1AttenDecPin, uint8_t enable, uint8_t useTx1ForTx2);
mykonosGpioErr_t MYKONOS_setTx2AttenCtrlPin(mykonosDevice_t *device, uint8_t stepSize, mykonosGpioSelect_t tx2AttenIncPin, mykonosGpioSelect_t tx2AttenDecPin, uint8_t enable);
mykonosGpioErr_t MYKONOS_getTx1AttenCtrlPin(mykonosDevice_t *device, uint8_t *stepSize, mykonosGpioSelect_t *tx1AttenIncPin, mykonosGpioSelect_t *tx1AttenDecPin, uint8_t *enable, uint8_t *useTx1ForTx2);
mykonosGpioErr_t MYKONOS_getTx2AttenCtrlPin(mykonosDevice_t *device, uint8_t *stepSize, mykonosGpioSelect_t *tx2AttenIncPin, mykonosGpioSelect_t *tx2AttenDecPin, uint8_t *enable, uint8_t *useTx1ForTx2);
mykonosGpioErr_t MYKONOS_spi2GpioSetup(mykonosDevice_t *device, uint8_t enable, uint8_t updateTxAttenPinSelect);
/* GPIO memory source Functions */
mykonosGpioErr_t MYKONOS_setGpioPinLevel(mykonosDevice_t *device, uint32_t gpioPinLevel);
mykonosGpioErr_t MYKONOS_getGpioPinLevel(mykonosDevice_t *device, uint32_t *gpioPinLevel);
mykonosGpioErr_t MYKONOS_getGpioSetLevel(mykonosDevice_t *device, uint32_t *gpioPinSetLevel);
/* Gain Compensation Functions */
mykonosGpioErr_t MYKONOS_setRxGainCompensation (mykonosDevice_t *device, mykonosGainComp_t *gainComp, uint8_t enable);
mykonosGpioErr_t MYKONOS_getRxGainCompensation (mykonosDevice_t *device, mykonosGainComp_t *gainComp, uint8_t *enabled);
mykonosGpioErr_t MYKONOS_setObsRxGainCompensation (mykonosDevice_t *device, mykonosObsRxGainComp_t *gainComp, uint8_t enable);
mykonosGpioErr_t MYKONOS_getObsRxGainCompensation (mykonosDevice_t *device, mykonosObsRxGainComp_t *gainComp, uint8_t *enabled);
/* SLICER Functions */
mykonosGpioErr_t MYKONOS_setRxSlicerCtrl(mykonosDevice_t *device, uint8_t slicerStep, mykonosRxSlicer_t rx1Pins, mykonosRxSlicer_t rx2Pins, uint8_t enable);
mykonosGpioErr_t MYKONOS_getRxSlicerCtrl(mykonosDevice_t *device, uint8_t *slicerStep, mykonosRxSlicer_t *rx1Pins, mykonosRxSlicer_t *rx2Pins, uint8_t *enable);
mykonosGpioErr_t MYKONOS_setObsRxSlicerCtrl(mykonosDevice_t *device, uint8_t slicerStep, mykonosObsRxSlicer_t obsRxPins, uint8_t enable);
mykonosGpioErr_t MYKONOS_getObsRxSlicerCtrl(mykonosDevice_t *device, uint8_t *slicerStep, mykonosObsRxSlicer_t *obsRxPins, uint8_t *enable);
/* Floating Point Formatter Functions */
mykonosGpioErr_t MYKONOS_setFloatPointFrmt (mykonosDevice_t *device, mykonosFloatPntFrmt_t *floatFrmt);
mykonosGpioErr_t MYKONOS_getFloatPointFrmt (mykonosDevice_t *device, mykonosFloatPntFrmt_t *floatFrmt);
mykonosGpioErr_t MYKONOS_setRxEnFloatPntFrmt (mykonosDevice_t *device, uint8_t rx1Att, uint8_t rx2Att, uint8_t enable);
mykonosGpioErr_t MYKONOS_getRxEnFloatPntFrmt (mykonosDevice_t *device, uint8_t *rx1Att, uint8_t *rx2Att, uint8_t *enable);
mykonosGpioErr_t MYKONOS_setOrxEnFloatPntFrmt (mykonosDevice_t *device, uint8_t orxAtt, uint8_t enable);
mykonosGpioErr_t MYKONOS_getOrxEnFloatPntFrmt (mykonosDevice_t *device, uint8_t *orxAtt, uint8_t *enable);
/*
*****************************************************************************
* General Purpose Interrupt functions
*****************************************************************************
*/
mykonosGpioErr_t MYKONOS_configGpInterrupt(mykonosDevice_t *device, uint16_t gpMask);
mykonosGpioErr_t MYKONOS_readGpInterruptStatus(mykonosDevice_t *device, uint16_t *status);
/*
*****************************************************************************
* ARM GPIO usage functions
*****************************************************************************
*/
mykonosGpioErr_t MYKONOS_setArmGpioPins(mykonosDevice_t *device);
/*
*****************************************************************************
* AuxADC/AuxDAC functions
*****************************************************************************
*/
mykonosGpioErr_t MYKONOS_setupAuxAdcs(mykonosDevice_t *device, uint8_t adcDecimation, uint8_t enable);
mykonosGpioErr_t MYKONOS_setAuxAdcChannel(mykonosDevice_t *device, mykonosAuxAdcChannels_t auxAdcChannel);
mykonosGpioErr_t MYKONOS_readAuxAdc(mykonosDevice_t *device, uint16_t *adcCode);
mykonosGpioErr_t MYKONOS_setupAuxDacs(mykonosDevice_t *device);
mykonosGpioErr_t MYKONOS_writeAuxDac(mykonosDevice_t *device, uint8_t auxDacIndex, uint16_t auxDacCode);
/*
*****************************************************************************
* GPIO3v3 functions
*****************************************************************************
*/
mykonosGpioErr_t MYKONOS_setupGpio3v3(mykonosDevice_t *device);
mykonosGpioErr_t MYKONOS_setGpio3v3PinLevel(mykonosDevice_t *device, uint16_t gpio3v3PinLevel);
mykonosGpioErr_t MYKONOS_getGpio3v3SetLevel(mykonosDevice_t *device, uint16_t *gpio3v3SetLevel);
mykonosGpioErr_t MYKONOS_getGpio3v3PinLevel(mykonosDevice_t *device, uint16_t *gpio3v3PinLevel);
mykonosGpioErr_t MYKONOS_setGpio3v3Oe(mykonosDevice_t *device, uint16_t gpio3v3OutEn);
mykonosGpioErr_t MYKONOS_getGpio3v3Oe(mykonosDevice_t *device, uint16_t *gpio3v3OutEn);
mykonosGpioErr_t MYKONOS_setGpio3v3SourceCtrl(mykonosDevice_t *device, uint16_t gpio3v3SrcCtrl);
mykonosGpioErr_t MYKONOS_getGpio3v3SourceCtrl(mykonosDevice_t *device, uint16_t *gpio3v3SrcCtrl);
/*
*****************************************************************************
* GPIO helper functions
*****************************************************************************
*/
mykonosGpioErr_t MYKONOS_setupGpio(mykonosDevice_t *device);
mykonosGpioErr_t MYKONOS_setGpioOe(mykonosDevice_t *device, uint32_t gpioOutEn, uint32_t gpioUsedMask);
mykonosGpioErr_t MYKONOS_getGpioOe(mykonosDevice_t *device, uint32_t *gpioOutEn);
mykonosGpioErr_t MYKONOS_setGpioSourceCtrl(mykonosDevice_t *device, uint32_t gpioSrcCtrl);
mykonosGpioErr_t MYKONOS_getGpioSourceCtrl(mykonosDevice_t *device, uint32_t *gpioSrcCtrl);
/*
*****************************************************************************
* Temperature Sensor functions
*****************************************************************************
*/
mykonosGpioErr_t MYKONOS_setupTempSensor(mykonosDevice_t *device, mykonosTempSensorConfig_t *tempSensor);
mykonosGpioErr_t MYKONOS_getTempSensorConfig(mykonosDevice_t *device, mykonosTempSensorConfig_t *tempSensor);
mykonosGpioErr_t MYKONOS_startTempMeasurement(mykonosDevice_t *device);
mykonosGpioErr_t MYKONOS_readTempSensor(mykonosDevice_t *device, mykonosTempSensorStatus_t *tempStatus);
const char* getGpioMykonosErrorMessage(mykonosGpioErr_t errorCode);
#ifdef __cplusplus
}
#endif
#endif /* MYKONOSGPIO_H_ */
projects/datalink_814/dl814_dj_48m/project/dl814_dj_48m/dl814_dj_48m.sdk/dl814_dj/src/hardware/mykonos/mykonos_macros.h
+707 -707
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File diff suppressed because it is too large Load Diff
projects/datalink_814/dl814_dj_48m/project/dl814_dj_48m/dl814_dj_48m.sdk/dl814_dj/src/hardware/mykonos/mykonos_user.c
+176 -176
View File
@@ -1,176 +1,176 @@
/**
* \file mykonos_user.c
* \brief Contains Mykonos default gain table values for Rx, ObsRx, and SnRx
*
* Mykonos API version: 1.5.2.3566
*/
/**
* \page Disclaimer Legal Disclaimer
* Copyright 2015-2017 Analog Devices Inc.
* Released under the AD9371 API license, for more information see the "LICENSE.txt" file in this zip file.
*
*/
#include <stdint.h>
#include "t_mykonos.h"
#include "mykonos_user.h"
/**
* \brief Default Rx gain table settings
*/
uint8_t RxGainTable [61][4] =
{
/* Order: {FE table, External Ctl, Digital Gain/Atten, Enable Atten} */
{0, 0, 0, 0}, /* Gain index 255 */
{3, 0, 2, 1}, /* Gain index 254 */
{6, 0, 3, 1}, /* Gain index 253 */
{10, 0, 0, 0}, /* Gain index 252 */
{13, 0, 1, 1}, /* Gain index 251 */
{16, 0, 0, 0}, /* Gain index 250 */
{18, 0, 3, 1}, /* Gain index 249 */
{21, 0, 1, 1}, /* Gain index 248 */
{23, 0, 3, 1}, /* Gain index 247 */
{25, 0, 4, 1}, /* Gain index 246 */
{28, 0, 0, 0}, /* Gain index 245 */
{30, 0, 0, 0}, /* Gain index 244 */
{31, 0, 5, 1}, /* Gain index 243 */
{33, 0, 4, 1}, /* Gain index 242 */
{35, 0, 2, 1}, /* Gain index 241 */
{37, 0, 0, 0}, /* Gain index 240 */
{38, 0, 4, 1}, /* Gain index 239 */
{39, 0, 7, 1}, /* Gain index 238 */
{41, 0, 2, 1}, /* Gain index 237 */
{42, 0, 4, 1}, /* Gain index 236 */
{43, 0, 6, 1}, /* Gain index 235 */
{44, 0, 8, 1}, /* Gain index 234 */
{45, 0, 9, 1}, /* Gain index 233 */
{46, 0, 10, 1}, /* Gain index 232 */
{47, 0, 10, 1}, /* Gain index 231 */
{48, 0, 9, 1}, /* Gain index 230 */
{49, 0, 8, 1}, /* Gain index 229 */
{50, 0, 6, 1}, /* Gain index 228 */
{51, 0, 3, 1}, /* Gain index 227 */
{51, 0, 13, 1}, /* Gain index 226 */
{52, 0, 9, 1}, /* Gain index 225 */
{53, 0, 5, 1}, /* Gain index 224 */
{53, 0, 15, 1}, /* Gain index 223 */
{54, 0, 9, 1}, /* Gain index 222 */
{54, 0, 19, 1}, /* Gain index 221 */
{55, 0, 11, 1}, /* Gain index 220 */
{55, 0, 21, 1}, /* Gain index 219 */
{56, 0, 11, 1}, /* Gain index 218 */
{56, 0, 21, 1}, /* Gain index 217 */
{57, 0, 9, 1}, /* Gain index 216 */
{57, 0, 19, 1}, /* Gain index 215 */
{57, 0, 29, 1}, /* Gain index 214 */
{58, 0, 12, 1}, /* Gain index 213 */
{58, 0, 22, 1}, /* Gain index 212 */
{58, 0, 32, 1}, /* Gain index 211 */
{59, 0, 11, 1}, /* Gain index 210 */
{59, 0, 21, 1}, /* Gain index 209 */
{59, 0, 31, 1}, /* Gain index 208 */
{59, 0, 41, 1}, /* Gain index 207 */
{60, 0, 13, 1}, /* Gain index 206 */
{60, 0, 23, 1}, /* Gain index 205 */
{60, 0, 33, 1}, /* Gain index 204 */
{60, 0, 43, 1}, /* Gain index 203 */
{60, 0, 53, 1}, /* Gain index 202 */
{61, 0, 14, 1}, /* Gain index 201 */
{61, 0, 24, 1}, /* Gain index 200 */
{61, 0, 34, 1}, /* Gain index 199 */
{61, 0, 44, 1}, /* Gain index 198 */
{61, 0, 54, 1}, /* Gain index 197 */
{61, 0, 64, 1}, /* Gain index 196 */
{61, 0, 74, 1}, /* Gain index 195 */
};
/**
* \brief Default ORx gain table settings
*/
uint8_t ORxGainTable [19][4] =
{
/* Order: {FE table, External Ctl, Digital Gain/Atten, Enable Atten} */
{0, 0, 0, 0}, /* Gain index 255 */
{7, 0, 0, 0}, /* Gain index 254 */
{13, 0, 1, 1}, /* Gain index 253 */
{18, 0, 3, 1}, /* Gain index 252 */
{23, 0, 3, 1}, /* Gain index 251 */
{28, 0, 0, 0}, /* Gain index 250 */
{32, 0, 0, 0}, /* Gain index 249 */
{35, 0, 2, 1}, /* Gain index 248 */
{38, 0, 4, 1}, /* Gain index 247 */
{41, 0, 2, 1}, /* Gain index 246 */
{43, 0, 6, 1}, /* Gain index 245 */
{46, 0, 0, 0}, /* Gain index 244 */
{47, 0, 10, 1}, /* Gain index 243 */
{49, 0, 8, 1}, /* Gain index 242 */
{51, 0, 3, 1}, /* Gain index 241 */
{52, 0, 9, 1}, /* Gain index 240 */
{53, 0, 14, 1}, /* Gain index 239 */
{54, 0, 18, 1}, /* Gain index 238 */
{56, 0, 0, 0} /* Gain index 237 */
};
/**
* \brief Default SnRx gain table settings
*/
uint8_t SnRxGainTable [53][4] =
{
/* Order: {FE table, LNA Bypass, Digital Gain/Atten, Enable Atten} */
{0, 0, 0, 0}, /* Gain index 255 */
{1, 0, 7, 1}, /* Gain index 254 */
{3, 0, 1, 0}, /* Gain index 253 */
{3, 0, 15, 1}, /* Gain index 252 */
{5, 0, 0, 0}, /* Gain index 251 */
{6, 0, 2, 1}, /* Gain index 250 */
{7, 0, 2, 1}, /* Gain index 249 */
{8, 0, 12, 1}, /* Gain index 248 */
{9, 0, 7, 1}, /* Gain index 247 */
{11, 0, 1, 0}, /* Gain index 246 */
{11, 0, 15, 1},/* Gain index 245 */
{13, 0, 1, 0}, /* Gain index 244 */
{14, 0, 2, 0}, /* Gain index 243 */
{14, 0, 10, 1},/* Gain index 242 */
{15, 0, 0, 0}, /* Gain index 241 */
{15, 0, 20, 1},/* Gain index 240 */
{16, 0, 2, 1}, /* Gain index 239 */
{16, 0, 22, 1},/* Gain index 238 */
{17, 0, 1, 0}, /* Gain index 237 */
{17, 0, 15, 1},/* Gain index 236 */
{17, 0, 35, 1},/* Gain index 235 */
{17, 0, 55, 1},/* Gain index 234 */
{18, 0, 7, 1}, /* Gain index 233 */
{18, 0, 27, 1},/* Gain index 232 */
{ 6, 1, 7, 1}, /* Gain index 231 */
{ 7, 1, 7, 1}, /* Gain index 230 */
{ 8, 1, 17, 1}, /* Gain index 229 */
{ 9, 1, 12, 1}, /* Gain index 228 */
{11, 1, 0, 0}, /* Gain index 227 */
{12, 1, 3, 1}, /* Gain index 226 */
{13, 1, 0, 0}, /* Gain index 225 */
{14, 1, 1, 0}, /* Gain index 224 */
{14, 1, 15, 1},/* Gain index 223 */
{15, 1, 5, 1}, /* Gain index 222 */
{15, 1, 25, 1},/* Gain index 221 */
{16, 1, 7, 1}, /* Gain index 220 */
{16, 1, 27, 1},/* Gain index 219 */
{17, 1, 0, 0}, /* Gain index 218 */
{17, 1, 20, 1},/* Gain index 217 */
{17, 1, 40, 1},/* Gain index 216 */
{17, 1, 60, 1},/* Gain index 215 */
{18, 1, 12, 1},/* Gain index 214 */
{18, 1, 32, 1},/* Gain index 213 */
{18, 1, 52, 1},/* Gain index 212 */
{18, 1, 72, 1},/* Gain index 211 */
{18, 1, 92, 1},/* Gain index 210 */
{19, 1, 1, 0}, /* Gain index 209 */
{19, 1, 15, 1},/* Gain index 208 */
{19, 1, 35, 1},/* Gain index 207 */
{19, 1, 55, 1},/* Gain index 206 */
{19, 1, 75, 1},/* Gain index 205 */
{19, 1, 95, 1},/* Gain index 204 */
{19, 1, 115, 1}/* Gain index 203 */
};
/**
* \file mykonos_user.c
* \brief Contains Mykonos default gain table values for Rx, ObsRx, and SnRx
*
* Mykonos API version: 1.5.2.3566
*/
/**
* \page Disclaimer Legal Disclaimer
* Copyright 2015-2017 Analog Devices Inc.
* Released under the AD9371 API license, for more information see the "LICENSE.txt" file in this zip file.
*
*/
#include <stdint.h>
#include "t_mykonos.h"
#include "mykonos_user.h"
/**
* \brief Default Rx gain table settings
*/
uint8_t RxGainTable [61][4] =
{
/* Order: {FE table, External Ctl, Digital Gain/Atten, Enable Atten} */
{0, 0, 0, 0}, /* Gain index 255 */
{3, 0, 2, 1}, /* Gain index 254 */
{6, 0, 3, 1}, /* Gain index 253 */
{10, 0, 0, 0}, /* Gain index 252 */
{13, 0, 1, 1}, /* Gain index 251 */
{16, 0, 0, 0}, /* Gain index 250 */
{18, 0, 3, 1}, /* Gain index 249 */
{21, 0, 1, 1}, /* Gain index 248 */
{23, 0, 3, 1}, /* Gain index 247 */
{25, 0, 4, 1}, /* Gain index 246 */
{28, 0, 0, 0}, /* Gain index 245 */
{30, 0, 0, 0}, /* Gain index 244 */
{31, 0, 5, 1}, /* Gain index 243 */
{33, 0, 4, 1}, /* Gain index 242 */
{35, 0, 2, 1}, /* Gain index 241 */
{37, 0, 0, 0}, /* Gain index 240 */
{38, 0, 4, 1}, /* Gain index 239 */
{39, 0, 7, 1}, /* Gain index 238 */
{41, 0, 2, 1}, /* Gain index 237 */
{42, 0, 4, 1}, /* Gain index 236 */
{43, 0, 6, 1}, /* Gain index 235 */
{44, 0, 8, 1}, /* Gain index 234 */
{45, 0, 9, 1}, /* Gain index 233 */
{46, 0, 10, 1}, /* Gain index 232 */
{47, 0, 10, 1}, /* Gain index 231 */
{48, 0, 9, 1}, /* Gain index 230 */
{49, 0, 8, 1}, /* Gain index 229 */
{50, 0, 6, 1}, /* Gain index 228 */
{51, 0, 3, 1}, /* Gain index 227 */
{51, 0, 13, 1}, /* Gain index 226 */
{52, 0, 9, 1}, /* Gain index 225 */
{53, 0, 5, 1}, /* Gain index 224 */
{53, 0, 15, 1}, /* Gain index 223 */
{54, 0, 9, 1}, /* Gain index 222 */
{54, 0, 19, 1}, /* Gain index 221 */
{55, 0, 11, 1}, /* Gain index 220 */
{55, 0, 21, 1}, /* Gain index 219 */
{56, 0, 11, 1}, /* Gain index 218 */
{56, 0, 21, 1}, /* Gain index 217 */
{57, 0, 9, 1}, /* Gain index 216 */
{57, 0, 19, 1}, /* Gain index 215 */
{57, 0, 29, 1}, /* Gain index 214 */
{58, 0, 12, 1}, /* Gain index 213 */
{58, 0, 22, 1}, /* Gain index 212 */
{58, 0, 32, 1}, /* Gain index 211 */
{59, 0, 11, 1}, /* Gain index 210 */
{59, 0, 21, 1}, /* Gain index 209 */
{59, 0, 31, 1}, /* Gain index 208 */
{59, 0, 41, 1}, /* Gain index 207 */
{60, 0, 13, 1}, /* Gain index 206 */
{60, 0, 23, 1}, /* Gain index 205 */
{60, 0, 33, 1}, /* Gain index 204 */
{60, 0, 43, 1}, /* Gain index 203 */
{60, 0, 53, 1}, /* Gain index 202 */
{61, 0, 14, 1}, /* Gain index 201 */
{61, 0, 24, 1}, /* Gain index 200 */
{61, 0, 34, 1}, /* Gain index 199 */
{61, 0, 44, 1}, /* Gain index 198 */
{61, 0, 54, 1}, /* Gain index 197 */
{61, 0, 64, 1}, /* Gain index 196 */
{61, 0, 74, 1}, /* Gain index 195 */
};
/**
* \brief Default ORx gain table settings
*/
uint8_t ORxGainTable [19][4] =
{
/* Order: {FE table, External Ctl, Digital Gain/Atten, Enable Atten} */
{0, 0, 0, 0}, /* Gain index 255 */
{7, 0, 0, 0}, /* Gain index 254 */
{13, 0, 1, 1}, /* Gain index 253 */
{18, 0, 3, 1}, /* Gain index 252 */
{23, 0, 3, 1}, /* Gain index 251 */
{28, 0, 0, 0}, /* Gain index 250 */
{32, 0, 0, 0}, /* Gain index 249 */
{35, 0, 2, 1}, /* Gain index 248 */
{38, 0, 4, 1}, /* Gain index 247 */
{41, 0, 2, 1}, /* Gain index 246 */
{43, 0, 6, 1}, /* Gain index 245 */
{46, 0, 0, 0}, /* Gain index 244 */
{47, 0, 10, 1}, /* Gain index 243 */
{49, 0, 8, 1}, /* Gain index 242 */
{51, 0, 3, 1}, /* Gain index 241 */
{52, 0, 9, 1}, /* Gain index 240 */
{53, 0, 14, 1}, /* Gain index 239 */
{54, 0, 18, 1}, /* Gain index 238 */
{56, 0, 0, 0} /* Gain index 237 */
};
/**
* \brief Default SnRx gain table settings
*/
uint8_t SnRxGainTable [53][4] =
{
/* Order: {FE table, LNA Bypass, Digital Gain/Atten, Enable Atten} */
{0, 0, 0, 0}, /* Gain index 255 */
{1, 0, 7, 1}, /* Gain index 254 */
{3, 0, 1, 0}, /* Gain index 253 */
{3, 0, 15, 1}, /* Gain index 252 */
{5, 0, 0, 0}, /* Gain index 251 */
{6, 0, 2, 1}, /* Gain index 250 */
{7, 0, 2, 1}, /* Gain index 249 */
{8, 0, 12, 1}, /* Gain index 248 */
{9, 0, 7, 1}, /* Gain index 247 */
{11, 0, 1, 0}, /* Gain index 246 */
{11, 0, 15, 1},/* Gain index 245 */
{13, 0, 1, 0}, /* Gain index 244 */
{14, 0, 2, 0}, /* Gain index 243 */
{14, 0, 10, 1},/* Gain index 242 */
{15, 0, 0, 0}, /* Gain index 241 */
{15, 0, 20, 1},/* Gain index 240 */
{16, 0, 2, 1}, /* Gain index 239 */
{16, 0, 22, 1},/* Gain index 238 */
{17, 0, 1, 0}, /* Gain index 237 */
{17, 0, 15, 1},/* Gain index 236 */
{17, 0, 35, 1},/* Gain index 235 */
{17, 0, 55, 1},/* Gain index 234 */
{18, 0, 7, 1}, /* Gain index 233 */
{18, 0, 27, 1},/* Gain index 232 */
{ 6, 1, 7, 1}, /* Gain index 231 */
{ 7, 1, 7, 1}, /* Gain index 230 */
{ 8, 1, 17, 1}, /* Gain index 229 */
{ 9, 1, 12, 1}, /* Gain index 228 */
{11, 1, 0, 0}, /* Gain index 227 */
{12, 1, 3, 1}, /* Gain index 226 */
{13, 1, 0, 0}, /* Gain index 225 */
{14, 1, 1, 0}, /* Gain index 224 */
{14, 1, 15, 1},/* Gain index 223 */
{15, 1, 5, 1}, /* Gain index 222 */
{15, 1, 25, 1},/* Gain index 221 */
{16, 1, 7, 1}, /* Gain index 220 */
{16, 1, 27, 1},/* Gain index 219 */
{17, 1, 0, 0}, /* Gain index 218 */
{17, 1, 20, 1},/* Gain index 217 */
{17, 1, 40, 1},/* Gain index 216 */
{17, 1, 60, 1},/* Gain index 215 */
{18, 1, 12, 1},/* Gain index 214 */
{18, 1, 32, 1},/* Gain index 213 */
{18, 1, 52, 1},/* Gain index 212 */
{18, 1, 72, 1},/* Gain index 211 */
{18, 1, 92, 1},/* Gain index 210 */
{19, 1, 1, 0}, /* Gain index 209 */
{19, 1, 15, 1},/* Gain index 208 */
{19, 1, 35, 1},/* Gain index 207 */
{19, 1, 55, 1},/* Gain index 206 */
{19, 1, 75, 1},/* Gain index 205 */
{19, 1, 95, 1},/* Gain index 204 */
{19, 1, 115, 1}/* Gain index 203 */
};
projects/datalink_814/dl814_dj_48m/project/dl814_dj_48m/dl814_dj_48m.sdk/dl814_dj/src/hardware/mykonos/mykonos_user.h
+85 -85
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@@ -1,85 +1,85 @@
/**
* \file mykonos_user.h
*
* \brief Contains macro definitions and global structure declarations for mykonos_user.c
*
* Mykonos API version: 1.5.2.3566
*/
/**
* \page Disclaimer Legal Disclaimer
* Copyright 2015-2017 Analog Devices Inc.
* Released under the AD9371 API license, for more information see the "LICENSE.txt" file in this zip file.
*
*/
#ifndef _MYKONOSPROFILES_H_
#define _MYKONOSPROFILES_H_
#ifdef __cplusplus
extern "C" {
#endif
/* turns verbose messaging on */
#define MYKONOS_VERBOSE 1
#define MYK_ENABLE_SPIWRITEARRAY 1
/* 3 Bytes per SPI transaction * 341 transactions = ~1024 byte buffer size */
/* Minimum MYK_SPIWRITEARRAY_BUFFERSIZE = 27 */
#define MYK_SPIWRITEARRAY_BUFFERSIZE 341
/*
*****************************************
* Rx, ObsRx, and Sniffer gain tables
******************************************
*/
#define MAX_GAIN_TABLE_INDEX 255
#define START_RX_GAIN_INDEX 255
#define MAX_RX_GAIN_TABLE_NUMINDEXES (START_RX_GAIN_INDEX + 1)
#define MIN_RX_GAIN_TABLE_INDEX 0
#define START_ORX_GAIN_INDEX 47
#define MAX_ORX_GAIN_TABLE_NUMINDEXES (START_ORX_GAIN_INDEX + 1)
#define MIN_ORX_GAIN_TABLE_INDEX (MAX_GAIN_TABLE_INDEX - START_ORX_GAIN_INDEX)
#define START_SNRX_GAIN_INDEX 127
#define MAX_SNRX_GAIN_TABLE_NUMINDEXES (START_SNRX_GAIN_INDEX + 1)
#define MIN_SNRX_GAIN_TABLE_INDEX (MAX_GAIN_TABLE_INDEX - START_SNRX_GAIN_INDEX)
#define START_LOOPBACK_GAIN_INDEX 47
#define MAX_LOOPBACK_GAIN_TABLE_NUMINDEXES (START_LOOPBACK_GAIN_INDEX + 1)
#define MIN_LOOPBACK_GAIN_TABLE_INDEX (MAX_GAIN_TABLE_INDEX - START_SNRX_GAIN_INDEX)
extern uint8_t RxGainTable [61][4];
extern uint8_t ORxGainTable [19][4];
extern uint8_t SnRxGainTable [53][4];
/*
********************************************
* Rx, Sniffer, ObsRx and Tx Profiles limits
********************************************
*/
#define MIN_RX_IQRATE_KHZ 15000 /*!< Mykonos minimum IQ rate for the Rx channel, expressed in KHz */
#define MAX_RX_IQRATE_KHZ 320000 /*!< Mykonos maximum IQ rate for the Rx channel, expressed in KHz */
#define MIN_TX_IQRATE_KHZ 15000 /*!< Mykonos minimum IQ rate for the Tx channel, expressed in KHz */
#define MAX_TX_IQRATE_KHZ 492000 /*!< Mykonos maximum IQ rate for the Tx channel, expressed in KHz */
#define MIN_SNIFFER_RFBW_HZ 5000000 /*!< Mykonos minimum Sniffer channel bandwidth expressed in Hz */
#define MAX_SNIFFER_RFBW_HZ 20000000 /*!< Mykonos maximum Sniffer channel bandwidth expressed in Hz */
#define MIN_ORX_RFBW_HZ 5000000 /*!< Mykonos minimum Observation channel bandwidth expressed in Hz */
#define MAX_ORX_RFBW_HZ 250000000 /*!< Mykonos maximum Observation channel bandwidth expressed in Hz */
#define MIN_RX_RFBW_HZ 5000000 /*!< Mykonos minimum Rx channel bandwidth expressed in Hz */
#define MAX_RX_RFBW_HZ 100000000 /*!< Mykonos maximum Rx channel bandwidth expressed in Hz */
#define MIN_TX_RFBW_HZ 20000000 /*!< Mykonos minimum Tx channel bandwidth expressed in Hz */
#define MAX_TX_RFBW_HZ 250000000 /*!< Mykonos maximum Tx channel bandwidth expressed in Hz */
#ifdef __cplusplus
}
#endif
#endif
/**
* \file mykonos_user.h
*
* \brief Contains macro definitions and global structure declarations for mykonos_user.c
*
* Mykonos API version: 1.5.2.3566
*/
/**
* \page Disclaimer Legal Disclaimer
* Copyright 2015-2017 Analog Devices Inc.
* Released under the AD9371 API license, for more information see the "LICENSE.txt" file in this zip file.
*
*/
#ifndef _MYKONOSPROFILES_H_
#define _MYKONOSPROFILES_H_
#ifdef __cplusplus
extern "C" {
#endif
/* turns verbose messaging on */
#define MYKONOS_VERBOSE 1
#define MYK_ENABLE_SPIWRITEARRAY 1
/* 3 Bytes per SPI transaction * 341 transactions = ~1024 byte buffer size */
/* Minimum MYK_SPIWRITEARRAY_BUFFERSIZE = 27 */
#define MYK_SPIWRITEARRAY_BUFFERSIZE 341
/*
*****************************************
* Rx, ObsRx, and Sniffer gain tables
******************************************
*/
#define MAX_GAIN_TABLE_INDEX 255
#define START_RX_GAIN_INDEX 255
#define MAX_RX_GAIN_TABLE_NUMINDEXES (START_RX_GAIN_INDEX + 1)
#define MIN_RX_GAIN_TABLE_INDEX 0
#define START_ORX_GAIN_INDEX 47
#define MAX_ORX_GAIN_TABLE_NUMINDEXES (START_ORX_GAIN_INDEX + 1)
#define MIN_ORX_GAIN_TABLE_INDEX (MAX_GAIN_TABLE_INDEX - START_ORX_GAIN_INDEX)
#define START_SNRX_GAIN_INDEX 127
#define MAX_SNRX_GAIN_TABLE_NUMINDEXES (START_SNRX_GAIN_INDEX + 1)
#define MIN_SNRX_GAIN_TABLE_INDEX (MAX_GAIN_TABLE_INDEX - START_SNRX_GAIN_INDEX)
#define START_LOOPBACK_GAIN_INDEX 47
#define MAX_LOOPBACK_GAIN_TABLE_NUMINDEXES (START_LOOPBACK_GAIN_INDEX + 1)
#define MIN_LOOPBACK_GAIN_TABLE_INDEX (MAX_GAIN_TABLE_INDEX - START_SNRX_GAIN_INDEX)
extern uint8_t RxGainTable [61][4];
extern uint8_t ORxGainTable [19][4];
extern uint8_t SnRxGainTable [53][4];
/*
********************************************
* Rx, Sniffer, ObsRx and Tx Profiles limits
********************************************
*/
#define MIN_RX_IQRATE_KHZ 15000 /*!< Mykonos minimum IQ rate for the Rx channel, expressed in KHz */
#define MAX_RX_IQRATE_KHZ 320000 /*!< Mykonos maximum IQ rate for the Rx channel, expressed in KHz */
#define MIN_TX_IQRATE_KHZ 15000 /*!< Mykonos minimum IQ rate for the Tx channel, expressed in KHz */
#define MAX_TX_IQRATE_KHZ 492000 /*!< Mykonos maximum IQ rate for the Tx channel, expressed in KHz */
#define MIN_SNIFFER_RFBW_HZ 5000000 /*!< Mykonos minimum Sniffer channel bandwidth expressed in Hz */
#define MAX_SNIFFER_RFBW_HZ 20000000 /*!< Mykonos maximum Sniffer channel bandwidth expressed in Hz */
#define MIN_ORX_RFBW_HZ 5000000 /*!< Mykonos minimum Observation channel bandwidth expressed in Hz */
#define MAX_ORX_RFBW_HZ 250000000 /*!< Mykonos maximum Observation channel bandwidth expressed in Hz */
#define MIN_RX_RFBW_HZ 5000000 /*!< Mykonos minimum Rx channel bandwidth expressed in Hz */
#define MAX_RX_RFBW_HZ 100000000 /*!< Mykonos maximum Rx channel bandwidth expressed in Hz */
#define MIN_TX_RFBW_HZ 20000000 /*!< Mykonos minimum Tx channel bandwidth expressed in Hz */
#define MAX_TX_RFBW_HZ 250000000 /*!< Mykonos maximum Tx channel bandwidth expressed in Hz */
#ifdef __cplusplus
}
#endif
#endif
projects/datalink_814/dl814_dj_48m/project/dl814_dj_48m/dl814_dj_48m.sdk/dl814_dj/src/hardware/mykonos/mykonos_version.h
+31 -31
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@@ -1,31 +1,31 @@
/**
* \file mykonos_version.h
* \brief Contains the version number for the Mykonos API
*
* Mykonos API version: 1.5.2.3566
*/
/**
* \page Disclaimer Legal Disclaimer
* Copyright 2015-2017 Analog Devices Inc.
* Released under the AD9371 API license, for more information see the "LICENSE.txt" file in * this zip file.
*
*/
#ifndef MYKONOS_VERSION_H_
#define MYKONOS_VERSION_H_
#ifdef __cplusplus
extern "C" {
#endif
#define MYKONOS_CURRENT_SI_VERSION 1 /*!< Mykonos current silicon version */
#define MYKONOS_CURRENT_MAJOR_VERSION 5 /*!< Mykonos current ARM major version */
#define MYKONOS_CURRENT_MINOR_VERSION 2 /*!< Mykonos current ARM minor version */
#define MYKONOS_CURRENT_BUILD_VERSION 3566 /*!< Mykonos current API build version */
#ifdef __cplusplus
}
#endif
#endif /* MYKONOS_VERSION_H_ */
/**
* \file mykonos_version.h
* \brief Contains the version number for the Mykonos API
*
* Mykonos API version: 1.5.2.3566
*/
/**
* \page Disclaimer Legal Disclaimer
* Copyright 2015-2017 Analog Devices Inc.
* Released under the AD9371 API license, for more information see the "LICENSE.txt" file in * this zip file.
*
*/
#ifndef MYKONOS_VERSION_H_
#define MYKONOS_VERSION_H_
#ifdef __cplusplus
extern "C" {
#endif
#define MYKONOS_CURRENT_SI_VERSION 1 /*!< Mykonos current silicon version */
#define MYKONOS_CURRENT_MAJOR_VERSION 5 /*!< Mykonos current ARM major version */
#define MYKONOS_CURRENT_MINOR_VERSION 2 /*!< Mykonos current ARM minor version */
#define MYKONOS_CURRENT_BUILD_VERSION 3566 /*!< Mykonos current API build version */
#ifdef __cplusplus
}
#endif
#endif /* MYKONOS_VERSION_H_ */
projects/datalink_814/dl814_dj_48m/project/dl814_dj_48m/dl814_dj_48m.sdk/dl814_dj/src/hardware/mykonos/t_ad9528.h
+194 -194
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@@ -1,194 +1,194 @@
/**
* \file t_ad9528.h
* \brief Contains enum and structure data types for all AD9528 function calls
*/
/**
* \page Disclaimer Legal Disclaimer
* Copyright 2015-2017 Analog Devices Inc.
* Released under the AD9371 API license, for more information see the "LICENSE.txt" file in this zip file.
*
*/
#ifndef _AD9528_TYPES_H_
#define _AD9528_TYPES_H_
#ifdef __cplusplus
extern "C" {
#endif
#include "../common.h"
/* AD9528 SPI Address defines */
#define AD9528_ADDR_ADI_SPI_CONFIG_A 0x000
#define AD9528_ADDR_ADI_SPI_CONFIG_B 0x001
#define AD9528_ADDR_IO_UPDATE 0x00F
#define AD9528_ADDR_REF_A_DIVIDER_LSB 0x100
#define AD9528_ADDR_REF_A_DIVIDER_MSB 0x101
#define AD9528_ADDR_REF_B_DIVIDER_LSB 0x102
#define AD9528_ADDR_REF_B_DIVIDER_MSB 0x103
#define AD9528_ADDR_PLL1_N_DIV_LSB 0x104
#define AD9528_ADDR_PLL1_N_DIV_MSB 0x105
#define AD9528_ADDR_PLL1_CHARGEPUMP 0x106
#define AD9528_ADDR_PLL1_CP_CTRL2 0x107
#define AD9528_ADDR_INPUT_RECEIVERS1 0x108
#define AD9528_ADDR_INPUT_RECEIVERS2 0x109
#define AD9528_ADDR_INPUT_RECEIVERS3 0x10A
#define AD9528_ADDR_PLL1_FASTLOCK 0x10B
#define AD9528_ADDR_PLL2_CHARGEPUMP 0x200
#define AD9528_ADDR_PLL2_N_DIV 0x201
#define AD9528_ADDR_PLL2_CTRL 0x202
#define AD9528_ADDR_PLL2_VCO_CTRL 0x203
#define AD9528_ADDR_PLL2_VCO_DIV 0x204
#define AD9528_ADDR_PLL2_LF_CTRL1 0x205
#define AD9528_ADDR_PLL2_LF_CTRL2 0x206
#define AD9528_ADDR_PLL2_RDIV 0x207
#define AD9528_ADDR_PLL2_REPLICA_CHDIV 0x208
#define AD9528_ADDR_PLL2_REPLICA_DIV_PHASE 0x209
#define AD9528_ADDR_CH_OUT0_CTRL1 0x300
#define AD9528_ADDR_CH_OUT0_CTRL2 0x301
#define AD9528_ADDR_CH_OUT0_CHDIV 0x302
#define AD9528_ADDR_OUTPUT_SYNC 0x32A
#define AD9528_ADDR_MASK_SYNC1 0x32B
#define AD9528_ADDR_MASK_SYNC2 0x32C
#define AD9528_ADDR_EN_OUTPUT_PATH_SEL1 0x32D
#define AD9528_ADDR_EN_OUTPUT_PATH_SEL2 0x32E
#define AD9528_ADDR_SYSERF_DIV_LSB 0x400
#define AD9528_ADDR_SYSERF_DIV_MSB 0x401
#define AD9528_ADDR_SYSREF_CTRL3 0x402
#define AD9528_ADDR_SYSREF_CTRL4 0x403
#define AD9528_ADDR_SYSREF_CTRL5 0x404
#define AD9528_ADDR_POWERDOWN_CTRL 0x500
#define AD9528_ADDR_CH_POWERDOWN1 0x501
#define AD9528_ADDR_CH_POWERDOWN2 0x502
#define AD9528_ADDR_LDO_ENABLES1 0x503
#define AD9528_ADDR_LDO_ENABLES2 0x504
#define AD9528_ADDR_STATUS0_CTRL 0x505
#define AD9528_ADDR_STATUS1_CTRL 0x506
#define AD9528_ADDR_STATUS_OE 0x507
#define AD9528_ADDR_STATUS_READBACK0 0x508
#define AD9528_ADDR_STATUS_READBACK1 0x509
///Enum to select what source outputs from each AD9528 output channel
typedef enum
{
CHANNEL_DIV = 0, PLL1_OUTPUT = 1, //VCXO frequency
SYSREF = 2,
INV_PLL1_OUTPUT = 5 //VCXO inverted
} ad9528outSourceSel_t;
///Enum to select what output buffer standard is used for the clock outputs
typedef enum
{
LVDS = 0, LVDS_BOOST = 1, HSTL = 2
} ad9528outBufferControl_t;
///Enum to select the clock input buffer mode.
typedef enum
{
DISABLED = 0, SINGLE_ENDED, NEG_SINGLE_ENDED, DIFFERENTIAL
} ad9528RefBuffer_t;
/// Structure to hold AD9528 PLL1 settings
typedef struct
{
uint32_t refA_Frequency_Hz;
uint16_t refA_Divider;
ad9528RefBuffer_t refA_bufferCtrl;
uint32_t refB_Frequency_Hz;
uint16_t refB_Divider;
ad9528RefBuffer_t refB_bufferCtrl;
uint32_t vcxo_Frequency_Hz;
ad9528RefBuffer_t vcxoBufferCtrl;
uint16_t nDivider;
uint8_t bypassPll1;
} ad9528pll1Settings_t;
/// Structure to hold AD9528 PLL2 settings
typedef struct
{
uint8_t rfDivider; //VCO divider: Valid range (3,4,5)
uint8_t n2Divider; //PLL2 N2 Divider
uint8_t totalNdiv; //NDiv = 4*Bdiv + Adiv //Bdiv valid range (3 to 63), Adiv valid range (0-3)
} ad9528pll2Settings_t;
/// Structure to hold AD9528 Output Clock settings
typedef struct
{
uint16_t outPowerDown; //bit per output, if 1 power down that output.
ad9528outSourceSel_t outSource[14]; //CHANNEL_DIV, PLL1_OUTPUT, SYSREF, INV_PLL1_OUTPUT
ad9528outBufferControl_t outBufferCtrl[14]; //LVDS, LVDS_BOOST, HSTL
uint8_t outAnalogDelay[14]; //5 bits
uint8_t outDigitalDelay[14]; //6 bits, 1/2 clock resolution @ channel div input frequency
uint8_t outChannelDiv[14]; //8 bit channel divider
uint32_t outFrequency_Hz[14]; //output clock frequency per clock output
} ad9528outputSettings_t;
///Enum to select the SYSREF output source
typedef enum
{
EXTERNAL = 0, EXT_RESAMPLED = 1, INTERNAL = 2
} sysrefSourceSelection_t;
///Enum to choose the SYSREF pattern mode.
typedef enum
{
NSHOT = 0, CONTINUOUS = 1, PRBS = 2, STOP = 3
} sysrefPatternMode_t;
///Enum to select the SYSREF input pin mode.
typedef enum
{
LEVEL_ACTIVE_HIGH = 0, LEVEL_ACTIVE_LOW = 1, RISING_EDGE = 2, FALLING_EDGE = 3
} sysrefPinEdgeMode_t;
///Enum to select the SYSREF output # of pulses for NSHOT mode.
typedef enum
{
ONE_PULSE = 0, TWO_PULSES = 2, FOUR_PULSES = 3, SIX_PULSES = 4, EIGHT_PULSES = 5
} sysrefNshotMode_t;
//Enum to select how a SYSREF is requested.
typedef enum
{
SPI = 0, PIN = 1
} sysrefRequestMethod_t;
/// Structure to hold AD9528 SYSREF output settings
typedef struct
{
sysrefRequestMethod_t sysrefRequestMethod;
sysrefSourceSelection_t sysrefSource;
sysrefPinEdgeMode_t sysrefPinEdgeMode;
ad9528RefBuffer_t sysrefPinBufferMode;
sysrefPatternMode_t sysrefPatternMode;
sysrefNshotMode_t sysrefNshotMode;
uint16_t sysrefDivide;
} ad9528sysrefSettings_t;
/// Structure to hold AD9528 settings
typedef struct
{
spiSettings_t *spiSettings;
ad9528pll1Settings_t *pll1Settings;
ad9528pll2Settings_t *pll2Settings;
ad9528outputSettings_t *outputSettings;
ad9528sysrefSettings_t *sysrefSettings;
} ad9528Device_t;
#ifdef __cplusplus
}
#endif
#endif
/**
* \file t_ad9528.h
* \brief Contains enum and structure data types for all AD9528 function calls
*/
/**
* \page Disclaimer Legal Disclaimer
* Copyright 2015-2017 Analog Devices Inc.
* Released under the AD9371 API license, for more information see the "LICENSE.txt" file in this zip file.
*
*/
#ifndef _AD9528_TYPES_H_
#define _AD9528_TYPES_H_
#ifdef __cplusplus
extern "C" {
#endif
#include "../common.h"
/* AD9528 SPI Address defines */
#define AD9528_ADDR_ADI_SPI_CONFIG_A 0x000
#define AD9528_ADDR_ADI_SPI_CONFIG_B 0x001
#define AD9528_ADDR_IO_UPDATE 0x00F
#define AD9528_ADDR_REF_A_DIVIDER_LSB 0x100
#define AD9528_ADDR_REF_A_DIVIDER_MSB 0x101
#define AD9528_ADDR_REF_B_DIVIDER_LSB 0x102
#define AD9528_ADDR_REF_B_DIVIDER_MSB 0x103
#define AD9528_ADDR_PLL1_N_DIV_LSB 0x104
#define AD9528_ADDR_PLL1_N_DIV_MSB 0x105
#define AD9528_ADDR_PLL1_CHARGEPUMP 0x106
#define AD9528_ADDR_PLL1_CP_CTRL2 0x107
#define AD9528_ADDR_INPUT_RECEIVERS1 0x108
#define AD9528_ADDR_INPUT_RECEIVERS2 0x109
#define AD9528_ADDR_INPUT_RECEIVERS3 0x10A
#define AD9528_ADDR_PLL1_FASTLOCK 0x10B
#define AD9528_ADDR_PLL2_CHARGEPUMP 0x200
#define AD9528_ADDR_PLL2_N_DIV 0x201
#define AD9528_ADDR_PLL2_CTRL 0x202
#define AD9528_ADDR_PLL2_VCO_CTRL 0x203
#define AD9528_ADDR_PLL2_VCO_DIV 0x204
#define AD9528_ADDR_PLL2_LF_CTRL1 0x205
#define AD9528_ADDR_PLL2_LF_CTRL2 0x206
#define AD9528_ADDR_PLL2_RDIV 0x207
#define AD9528_ADDR_PLL2_REPLICA_CHDIV 0x208
#define AD9528_ADDR_PLL2_REPLICA_DIV_PHASE 0x209
#define AD9528_ADDR_CH_OUT0_CTRL1 0x300
#define AD9528_ADDR_CH_OUT0_CTRL2 0x301
#define AD9528_ADDR_CH_OUT0_CHDIV 0x302
#define AD9528_ADDR_OUTPUT_SYNC 0x32A
#define AD9528_ADDR_MASK_SYNC1 0x32B
#define AD9528_ADDR_MASK_SYNC2 0x32C
#define AD9528_ADDR_EN_OUTPUT_PATH_SEL1 0x32D
#define AD9528_ADDR_EN_OUTPUT_PATH_SEL2 0x32E
#define AD9528_ADDR_SYSERF_DIV_LSB 0x400
#define AD9528_ADDR_SYSERF_DIV_MSB 0x401
#define AD9528_ADDR_SYSREF_CTRL3 0x402
#define AD9528_ADDR_SYSREF_CTRL4 0x403
#define AD9528_ADDR_SYSREF_CTRL5 0x404
#define AD9528_ADDR_POWERDOWN_CTRL 0x500
#define AD9528_ADDR_CH_POWERDOWN1 0x501
#define AD9528_ADDR_CH_POWERDOWN2 0x502
#define AD9528_ADDR_LDO_ENABLES1 0x503
#define AD9528_ADDR_LDO_ENABLES2 0x504
#define AD9528_ADDR_STATUS0_CTRL 0x505
#define AD9528_ADDR_STATUS1_CTRL 0x506
#define AD9528_ADDR_STATUS_OE 0x507
#define AD9528_ADDR_STATUS_READBACK0 0x508
#define AD9528_ADDR_STATUS_READBACK1 0x509
///Enum to select what source outputs from each AD9528 output channel
typedef enum
{
CHANNEL_DIV = 0, PLL1_OUTPUT = 1, //VCXO frequency
SYSREF = 2,
INV_PLL1_OUTPUT = 5 //VCXO inverted
} ad9528outSourceSel_t;
///Enum to select what output buffer standard is used for the clock outputs
typedef enum
{
LVDS = 0, LVDS_BOOST = 1, HSTL = 2
} ad9528outBufferControl_t;
///Enum to select the clock input buffer mode.
typedef enum
{
DISABLED = 0, SINGLE_ENDED, NEG_SINGLE_ENDED, DIFFERENTIAL
} ad9528RefBuffer_t;
/// Structure to hold AD9528 PLL1 settings
typedef struct
{
uint32_t refA_Frequency_Hz;
uint16_t refA_Divider;
ad9528RefBuffer_t refA_bufferCtrl;
uint32_t refB_Frequency_Hz;
uint16_t refB_Divider;
ad9528RefBuffer_t refB_bufferCtrl;
uint32_t vcxo_Frequency_Hz;
ad9528RefBuffer_t vcxoBufferCtrl;
uint16_t nDivider;
uint8_t bypassPll1;
} ad9528pll1Settings_t;
/// Structure to hold AD9528 PLL2 settings
typedef struct
{
uint8_t rfDivider; //VCO divider: Valid range (3,4,5)
uint8_t n2Divider; //PLL2 N2 Divider
uint8_t totalNdiv; //NDiv = 4*Bdiv + Adiv //Bdiv valid range (3 to 63), Adiv valid range (0-3)
} ad9528pll2Settings_t;
/// Structure to hold AD9528 Output Clock settings
typedef struct
{
uint16_t outPowerDown; //bit per output, if 1 power down that output.
ad9528outSourceSel_t outSource[14]; //CHANNEL_DIV, PLL1_OUTPUT, SYSREF, INV_PLL1_OUTPUT
ad9528outBufferControl_t outBufferCtrl[14]; //LVDS, LVDS_BOOST, HSTL
uint8_t outAnalogDelay[14]; //5 bits
uint8_t outDigitalDelay[14]; //6 bits, 1/2 clock resolution @ channel div input frequency
uint8_t outChannelDiv[14]; //8 bit channel divider
uint32_t outFrequency_Hz[14]; //output clock frequency per clock output
} ad9528outputSettings_t;
///Enum to select the SYSREF output source
typedef enum
{
EXTERNAL = 0, EXT_RESAMPLED = 1, INTERNAL = 2
} sysrefSourceSelection_t;
///Enum to choose the SYSREF pattern mode.
typedef enum
{
NSHOT = 0, CONTINUOUS = 1, PRBS = 2, STOP = 3
} sysrefPatternMode_t;
///Enum to select the SYSREF input pin mode.
typedef enum
{
LEVEL_ACTIVE_HIGH = 0, LEVEL_ACTIVE_LOW = 1, RISING_EDGE = 2, FALLING_EDGE = 3
} sysrefPinEdgeMode_t;
///Enum to select the SYSREF output # of pulses for NSHOT mode.
typedef enum
{
ONE_PULSE = 0, TWO_PULSES = 2, FOUR_PULSES = 3, SIX_PULSES = 4, EIGHT_PULSES = 5
} sysrefNshotMode_t;
//Enum to select how a SYSREF is requested.
typedef enum
{
SPI = 0, PIN = 1
} sysrefRequestMethod_t;
/// Structure to hold AD9528 SYSREF output settings
typedef struct
{
sysrefRequestMethod_t sysrefRequestMethod;
sysrefSourceSelection_t sysrefSource;
sysrefPinEdgeMode_t sysrefPinEdgeMode;
ad9528RefBuffer_t sysrefPinBufferMode;
sysrefPatternMode_t sysrefPatternMode;
sysrefNshotMode_t sysrefNshotMode;
uint16_t sysrefDivide;
} ad9528sysrefSettings_t;
/// Structure to hold AD9528 settings
typedef struct
{
spiSettings_t *spiSettings;
ad9528pll1Settings_t *pll1Settings;
ad9528pll2Settings_t *pll2Settings;
ad9528outputSettings_t *outputSettings;
ad9528sysrefSettings_t *sysrefSettings;
} ad9528Device_t;
#ifdef __cplusplus
}
#endif
#endif
projects/datalink_814/dl814_dj_48m/project/dl814_dj_48m/dl814_dj_48m.sdk/dl814_dj/src/hardware/mykonos/t_mykonos.h
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projects/datalink_814/dl814_dj_48m/project/dl814_dj_48m/dl814_dj_48m.sdk/dl814_dj/src/hardware/mykonos/t_mykonos_gpio.h
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/*!
* \file t_mykonos_gpio.h
* \brief Mykonos GPIO error handling and type defines
*
* Mykonos API version: 1.5.2.3566
*/
/**
* \page Disclaimer Legal Disclaimer
* Copyright 2015-2017 Analog Devices Inc.
* Released under the AD9371 API license, for more information see the "LICENSE.txt" file in this zip file.
*
*/
#ifndef T_MYKONOSGPIO_H_
#define T_MYKONOSGPIO_H_
#ifdef __cplusplus
extern "C" {
#endif
#include "../common.h"
/**
* \brief Enum of unique error codes from the Mykonos GPIO API functions.
* Each error condition in the library should get its own enum value to allow
* easy debug of errors.
*/
typedef enum
{
MYKONOS_ERR_GPIO_OK = 0,
MYKONOS_ERR_EN_MONITOR_OUT_NOT_ENABLED,
MYKONOS_ERR_EN_MONITOR_OUT_SRC_CTRL,
MYKONOS_ERR_MONITOR_OUT_INDEX_RANGE,
MYKONOS_ERR_GETGPIOMON_INDEX_NULL_PARM,
MYKONOS_ERR_GETGPIOMON_MONITORMASK_NULL_PARM,
MYKONOS_ERR_MGCRX2_GPIO_DECPIN_INV_PARAM,
MYKONOS_ERR_MGCRX2_GPIO_INCPIN_INV_PARAM,
MYKONOS_ERR_MGCRX2_SOURCE_CONFIG,
MYKONOS_ERR_MGCRX2_STEP_INV_PARAM,
MYKONOS_ERR_MGCRX1_GPIO_DECPIN_INV_PARAM,
MYKONOS_ERR_MGCRX1_GPIO_INCPIN_INV_PARAM,
MYKONOS_ERR_MGCRX1_STEP_INV_PARAM,
MYKONOS_ERR_GETRX2PIN_INCSTEP_NULL_PARM,
MYKONOS_ERR_GETRX2PIN_DECSTEP_NULL_PARM,
MYKONOS_ERR_GETRX2PIN_INCPIN_NULL_PARM,
MYKONOS_ERR_GETRX2PIN_DECPIN_NULL_PARM,
MYKONOS_ERR_GETRX2PIN_EN_NULL_PARM,
MYKONOS_ERR_GETRX1PIN_INCSTEP_NULL_PARM,
MYKONOS_ERR_GETRX1PIN_DECSTEP_NULL_PARM,
MYKONOS_ERR_GETRX1PIN_INCPIN_NULL_PARM,
MYKONOS_ERR_GETRX1PIN_DECPIN_NULL_PARM,
MYKONOS_ERR_GETRX1PIN_EN_NULL_PARM,
MYKONOS_ERR_TPCTX2_GPIO_DECPIN_INV_PARAM,
MYKONOS_ERR_TPCTX2_GPIO_INCPIN_INV_PARAM,
MYKONOS_ERR_TPCTX2_GPIO_STEP_INV_PARAM,
MYKONOS_ERR_TPCTX1_GPIO_DECPIN_INV_PARAM,
MYKONOS_ERR_TPCTX1_GPIO_INCPIN_INV_PARAM,
MYKONOS_ERR_TPCTX1_GPIO_STEP_INV_PARAM,
MYKONOS_ERR_GETTX2PIN_STEP_NULL_PARM,
MYKONOS_ERR_GETTX2PIN_INC_NULL_PARM,
MYKONOS_ERR_GETTX2PIN_DEC_NULL_PARM,
MYKONOS_ERR_GETTX2PIN_EN_NULL_PARM,
MYKONOS_ERR_GETTX2PIN_TX1TX2_NULL_PARM,
MYKONOS_ERR_GETTX1PIN_STEP_NULL_PARM,
MYKONOS_ERR_GETTX1PIN_INC_NULL_PARM,
MYKONOS_ERR_GETTX1PIN_DEC_NULL_PARM,
MYKONOS_ERR_GETTX1PIN_EN_NULL_PARM,
MYKONOS_ERR_GETTX1PIN_TX1TX2_NULL_PARM,
MYKONOS_ERR_SPI2_INV_GPIO,
MYKONOS_ERR_SPI2_INV_SETUP,
MYKONOS_ERR_SET_GPIO_1V8_INV_POINTER,
MYKONOS_ERR_GETGPIOSETLEVEL_NULL_PARM,
MYKONOS_ERR_READGPIOSPI_NULL_PARM,
MYKONOS_ERR_SET_GPIO_1V8_INV_MODE,
MYKONOS_ERR_GETGPIO_OE_NULL_PARM,
MYKONOS_ERR_GPIO_OE_INV_PARAM,
MYKONOS_ERR_GPIO_SRC_PARAM_INV,
MYKONOS_ERR_GET_GPIO_SOURCE_CONTROL_NULL_PARM,
MYKONOS_ERR_INV_GP_INT_MASK_PARM,
MYKONOS_ERR_GP_INT_STATUS_NULL_PARAM,
MYKONOS_ERR_GETGPIO3V3OUT_NULL_PARM,
MYKONOS_ERR_SET_GPIO_3V3_INV_POINTER,
MYKONOS_ERR_GETGPIO3V3SPI_NULL_PARM,
MYKONOS_ERR_GPIO3V3OUTEN_NULL_PARM,
MYKONOS_ERR_SET_GPIO_3V3_INV_MODE,
MYKONOS_ERR_SET_GPIO_3V3_INV_SRC_CTRL,
MYKONOS_ERR_SET_ARMGPIO_INV_POINTER,
MYKONOS_ERR_SET_ARMGPIO_PINS_ARMERROR,
MYKONOS_ERR_SET_ARMGPIO_PINS_INV_SIGNALID,
MYKONOS_ERR_SET_ARMGPIO_PINS_INV_GPIOPIN,
MYKONOS_ERR_SETUPAUXDAC_NULL_PARAM,
MYKONOS_ERR_WRITEAUXDAC_NULL_AUXIO,
MYKONOS_ERR_READAUXADC_NULL_PARAM,
MYKONOS_ERR_SETUPAUXDAC_INV_AUXDACCODE,
MYKONOS_ERR_WRITEAUXDAC_INV_AUXDACCODE,
MYKONOS_ERR_WRITEAUXDAC_INV_AUXDACINDEX,
MYKONOS_ERR_INV_AUX_ADC_CHAN_PARM,
MYKONOS_ERR_SETUPAUXADC_INV_VCODIV,
MYKONOS_ERR_INV_AUX_ADC_DEC_PARM,
MYKONOS_ERR_GAINCOMP_NULL_STRUCT,
MYKONOS_ERR_GAINCOMP_EN_NULL_PARM,
MYKONOS_ERR_GAINCOMP_SET_NULL_STRUCT,
MYKONOS_ERR_GAINCOMP_INV_RX1_OFFSET,
MYKONOS_ERR_GAINCOMP_INV_RX2_OFFSET,
MYKONOS_ERR_GAINCOMP_INV_STEP,
MYKONOS_ERR_GAINCOMP_INV_EN,
MYKONOS_ERR_OBS_RX_GAINCOMP_SET_NULL_STRUCT,
MYKONOS_ERR_OBS_RX_GAINCOMP_EN_NULL_PARAM,
MYKONOS_ERR_OBS_RX_GAINCOMP_INV_EN,
MYKONOS_ERR_OBS_RX_GAINCOMP_INV_OFFSET,
MYKONOS_ERR_OBS_RX_GAINCOMP_INV_STEP,
MYKONOS_ERR_OBS_RX_GAINCOMP_NULL_STRUCT,
MYKONOS_ERR_SLICER_STEP_OUT_OF_RANGE,
MYKONOS_ERR_SLICER_INV_RX1_SEL,
MYKONOS_ERR_SLICER_INV_RX2_SEL,
MYKONOS_ERR_SLICER_EN_INV,
MYKONOS_ERR_SLICER_RX1PIN_NULL_PARM,
MYKONOS_ERR_SLICER_RX2PIN_NULL_PARM,
MYKONOS_ERR_SLICER_STEP_NULL_PARM,
MYKONOS_ERR_SLICER_EN_NULL_PARM,
MYKONOS_ERR_SLICER_INV_OBS_RX_SEL,
MYKONOS_ERR_SLICER_OBS_RX_STEP_OUT_OF_RANGE,
MYKONOS_ERR_SLICER_OBS_RX_EN_INV,
MYKONOS_ERR_SLICER_OBS_RX_EN_NULL_PARM,
MYKONOS_ERR_SLICER_OBS_RX_STEP_NULL_PARM,
MYKONOS_ERR_SLICER_OBS_RXPIN_NULL_PARM,
MYKONOS_ERR_FLOATFRMT_NULL_STRUCT,
MYKONOS_ERR_FLOATFRMT_SET_NULL_STRUCT,
MYKONOS_ERR_FLOATFRMT_INV_ROUND_MODE,
MYKONOS_ERR_FLOATFRMT_INV_DATA_FORMAT,
MYKONOS_ERR_FLOATFRMT_INV_ENC_NAN,
MYKONOS_ERR_FLOATFRMT_INV_EXP_BITS,
MYKONOS_ERR_FLOATFRMT_INV_LEADING,
MYKONOS_ERR_FLOATFRMT_INV_RX1ATT,
MYKONOS_ERR_FLOATFRMT_INV_RX2ATT,
MYKONOS_ERR_FLOATFRMT_INV_EN,
MYKONOS_ERR_FLOATFRMT_NULL_RX1ATT,
MYKONOS_ERR_FLOATFRMT_NULL_RX2ATT,
MYKONOS_ERR_FLOATFRMT_NULL_ENABLE,
MYKONOS_ERR_FLOATFRMT_SET_INV_EN,
MYKONOS_ERR_FLOATFRMT_SET_INV_RX1ATT,
MYKONOS_ERR_FLOATFRMT_SET_INV_RX2ATT,
MYKONOS_ERR_FLOATFRMT_INV_ORXATT,
MYKONOS_ERR_FLOATFRMT_INV_ORXEN,
MYKONOS_ERR_FLOATFRMT_NULL_ORXATT,
MYKONOS_ERR_FLOATFRMT_NULL_ORXENABLE,
MYKONOS_ERR_SETUPTEMPSENSOR_NULL_PARAM,
MYKONOS_ERR_SETUPTEMPSENSOR_INV_TEMPDECIMATION,
MYKONOS_ERR_SETUPTEMPSENSOR_INV_OFFSET,
MYKONOS_ERR_SETUPTEMPSENSOR_INV_TEMPWINDOW,
MYKONOS_ERR_GETTEMPSENSORCFG_NULL_PARAM,
MYKONOS_ERR_READTEMPSENSOR_NULL_PARAM,
MYKONOS_ERR_READTEMPSENSOR_NOT_LOCKED,
MYKONOS_ERR_GAIN_CONTROL_NOT_HYBRID,
MYKONOS_ERR_GPIO_HYBRID_RX1_PIN,
MYKONOS_ERR_GPIO_HYBRID_RX2_PIN,
MYKONOS_ERR_GPIO_HYBRID_RX1_PIN_NULL_PARM,
MYKONOS_ERR_GPIO_HYBRID_RX2_PIN_NULL_PARM,
MYKONOS_ERR_GPIO_HYBRID_RX1_PIN_READ,
MYKONOS_ERR_GPIO_HYBRID_RX2_PIN_READ,
MYKONOS_ERR_AGC_OBS_NOT_IN_HYBRID,
MYKONOS_ERR_GPIO_HYBRID_ORX_PIN,
MYKONOS_ERR_GPIO_HYBRID_ORX_PIN_NULL_PARM,
MYKONOS_ERR_GAIN_CONTROL_NOT_AGC,
MYKONOS_ERR_GPIO_AGC_SYNC_RX1_PIN,
MYKONOS_ERR_GPIO_AGC_SYNC_RX2_PIN,
MYKONOS_ERR_GPIO_AGC_SYNC_RX1_PIN_NULL_PARM,
MYKONOS_ERR_GPIO_AGC_SYNC_RX2_PIN_NULL_PARM,
MYKONOS_ERR_OBS_GAIN_CONTROL_NOT_AGC,
MYKONOS_ERR_GPIO_AGC_SYNC_ORX_PIN,
MYKONOS_ERR_GPIO_AGC_SYNC_ORX_PIN_NULL_PARM,
MYKONOS_ERR_GETGPIODRV_NULL_PARAM,
MYKONOS_ERR_GPIO_DRV_INV_PARAM,
MYKONOS_ERR_GPIO_SLEW_RATE_INV_PARAM,
MYKONOS_ERR_GPIO_GETSLEW_NULL_PARAM,
MYKONOS_ERR_CMOS_DRV_INV_PARAM,
MYKONOS_ERR_CMOS_DRV_NULL_PARAM
} mykonosGpioErr_t;
/**
* \brief Enum of possible Rx Slicer pin combinations
*/
typedef enum
{
GPIO_0_1_2 = 0, /*!< GPIO combination for RX1 */
GPIO_5_6_7 = 1, /*!< GPIO combination for RX1 or RX2 */
GPIO_8_9_10 = 2, /*!< GPIO combination for RX1 */
GPIO_11_12_13 = 3 /*!< GPIO combination for RX2 */
} mykonosRxSlicer_t;
/**
* \brief Enum of possible observation channel Slicer pin combinations
*/
typedef enum
{
GPIO_18_17_16 = 0, /*!< GPIO combination for observation channel */
GPIO_16_15_14 = 1 /*!< GPIO combination for observation channel */
} mykonosObsRxSlicer_t;
/**
* \brief Enum of possible GPIO slew rate settings
*/
typedef enum
{
MYK_SLEWRATE_NONE = 0, /*!< Lower slew rate for the GPIO */
MYK_SLEWRATE_LOW = 1, /*!< Low slew rate for the GPIO */
MYK_SLEWRATE_MEDIUM = 2, /*!< Medium slew rate for the GPIO */
MYK_SLEWRATE_HIGH = 3 /*!< High slew rate for the GPIO */
} mykonosGpioSlewRate_t;
/**
* \brief Enumerated list of CMOS pads drive strength options
*/
typedef enum
{
MYK_CMOSPAD_DRV_1X = 0x00, /*!< 2.5pF load @ 65MHz */
MYK_CMOSPAD_DRV_2X = 0x01, /*!< 5pF load @ 65MHz */
MYK_CMOSPAD_DRV_3X = 0x03, /*!< 7.5pF load @ 65MHz */
MYK_CMOSPAD_DRV_4X = 0x07, /*!< 10pF load @ 65MHz */
MYK_CMOSPAD_DRV_5X = 0x0F /*!< 12.5pF load @ 65MHz */
} mykonosCmosPadDrvStr_t;
/**
* \brief Enumerated list for Aux ADCs
*/
typedef enum
{
MYK_AUXADC_0 = 0x00, /*!< Aux ADC channel 0 */
MYK_AUXADC_1 = 0x01, /*!< Aux ADC channel 1 */
MYK_AUXADC_2 = 0x02, /*!< Aux ADC channel 2 */
MYK_AUXADC_3 = 0x03, /*!< Aux ADC channel 3 */
MYK_AUXADC_0_DIV2 = 0x04, /*!< Aux ADC channel 0 with the divider by 2 set */
MYK_TEMPSENSOR = 0x10 /*!< Temperature sensor channel */
} mykonosAuxAdcChannels_t;
/**
* \brief Data structure to hold Gain compensation settings for the main receive channels
**/
typedef struct
{
uint8_t rx1Offset; /*!< These parameter contains the Rx1 offset word used for the gain compensation
when the gain index is at its maximum setting.
It has a range of 0 to 0x1F with a resolution is 0.5dB per LSB. */
uint8_t rx2Offset; /*!< These parameter contains the Rx2 offset word used for the gain compensation
when the gain index is at its maximum setting.
It has a range of 0 to 0x1F with a resolution is 0.5dB per LSB. */
uint8_t compStep; /*!< These bits contains the value in dB that the total Rx gain changes
when there is an LSB change in the gain index according to the following settings:
compStep | dB ramp
---------|------------
0 | 0.25dB
1 | 0.5dB
2 | 1.0dB
3 | 2.0dB
4 | 3.0dB
5 | 4.0dB
6 | 6.0dB
7 | Not valid defaulted to 0.25dB */
} mykonosGainComp_t;
/**
* \brief Data structure to hold Gain compensation settings for the observation channel
**/
typedef struct
{
uint8_t obsRxOffset; /*!< These parameter contains the Rx1 offset word used for the gain compensation
when the gain index is at its maximum setting.
It has a range of 0 to 0x1F with a resolution is 0.5dB per LSB. */
uint8_t compStep; /*!< These bits contains the value in dB that the total Rx gain changes
when there is an LSB change in the gain index according to the following settings:
compStep | dB ramp
---------|------------
0 | 0.25dB
1 | 0.5dB
2 | 1.0dB
3 | 2.0dB
4 | 3.0dB
5 | 4.0dB
6 | 6.0dB
7 | Not valid defaulted to 0.25dB */
} mykonosObsRxGainComp_t;
/**
* \brief Data structure to hold floating point formatter settings for the floating point
* number generation
**/
typedef struct
{
uint8_t roundMode; /*!<These parameter set the round modes for the significand.
The following settings are defined in the IEEE754 specification:
roundMode | Round type
----------|-----------------
0 | RoundTiesToEven
1 | RoundTowardsPositive
2 | RoundTowardsNegative
3 | RoundTowardsZero
4 | RoundTiesToAway*/
uint8_t dataFormat; /*!< These parameter sets the format of the 16-bit output on the JESD interface:
Setting this to 1 then the format is from MSB to LSB to {sign, significand, exponent}.
Clearing this bit sets the format to {sign, exponent, significand}.*/
uint8_t encNan; /*!< if this parameter is set to 1 then the floating point formatter reserves the highest value
of exponent for NaN to be compatible to the IEEE754 specification.
Clearing this parameter increases the range of the exponent by one.*/
uint8_t expBits; /*!<These parameter is used to indicate the number of exponent bits in the floating point number
according to the following settings:
expBits| Round type
--------|------------------------------------------------
0 | 2 bit exponent, 13 bit significand, 1 bit sign
1 | 3 bit exponent, 12 bit significand, 1 bit sign
2 | 4 bit exponent, 11 bit significand, 1 bit sign
3 | 5 bit exponent, 10 bit significand, 1 bit sign */
uint8_t leading; /*!< Setting this parameter hides the leading one in the the significand to be compatible to the IEEE754 specification.
Clearing this parameter causes the leading one to be at the MSB of the significand.*/
}mykonosFloatPntFrmt_t;
/**
* \brief Data structure used to configure the on-die Temperature Sensor
*/
typedef struct
{
uint8_t tempDecimation; /*!<3-bit value that controls the AuxADC decimation factor when used for temp sensor calculations;
AuxADC_decimation = 256 * 2^tempDecimation */
uint8_t offset; /*!< 8-bit offset that gets added to temp sensor code internally */
uint8_t overrideFusedOffset; /*!< This bit overrides the factory-calibrated fuse offset
and uses the value stored in the offset member */
uint8_t tempWindow; /*!< 4-bit code with a resolution of 1?C/LSB, each time a temperature measurement is performed,
the device compares the current temperature against the previous value.*/
}mykonosTempSensorConfig_t;
/**
* \brief Data structure used to store Temperature Sensor related values
*/
typedef struct
{
int16_t tempCode; /*!< 16-bit signed temperature value (in deg C) that is read back */
uint8_t windowExceeded; /*!< If the absolute value of the difference is greater than the value in temperature configuration
tempWindow, the windowExceeded flag is set.*/
uint8_t windowHiLo; /*!<when windowExceeded member gets set,
this bit is set to 1 if current value is greater than previous value, else reset */
uint8_t tempValid; /*!< When the reading is complete and a valid temperature value stored in tempCode*/
}mykonosTempSensorStatus_t;
#ifdef __cplusplus
}
#endif
#endif /* T_MYKONOSGPIO_H_ */
/*!
* \file t_mykonos_gpio.h
* \brief Mykonos GPIO error handling and type defines
*
* Mykonos API version: 1.5.2.3566
*/
/**
* \page Disclaimer Legal Disclaimer
* Copyright 2015-2017 Analog Devices Inc.
* Released under the AD9371 API license, for more information see the "LICENSE.txt" file in this zip file.
*
*/
#ifndef T_MYKONOSGPIO_H_
#define T_MYKONOSGPIO_H_
#ifdef __cplusplus
extern "C" {
#endif
#include "../common.h"
/**
* \brief Enum of unique error codes from the Mykonos GPIO API functions.
* Each error condition in the library should get its own enum value to allow
* easy debug of errors.
*/
typedef enum
{
MYKONOS_ERR_GPIO_OK = 0,
MYKONOS_ERR_EN_MONITOR_OUT_NOT_ENABLED,
MYKONOS_ERR_EN_MONITOR_OUT_SRC_CTRL,
MYKONOS_ERR_MONITOR_OUT_INDEX_RANGE,
MYKONOS_ERR_GETGPIOMON_INDEX_NULL_PARM,
MYKONOS_ERR_GETGPIOMON_MONITORMASK_NULL_PARM,
MYKONOS_ERR_MGCRX2_GPIO_DECPIN_INV_PARAM,
MYKONOS_ERR_MGCRX2_GPIO_INCPIN_INV_PARAM,
MYKONOS_ERR_MGCRX2_SOURCE_CONFIG,
MYKONOS_ERR_MGCRX2_STEP_INV_PARAM,
MYKONOS_ERR_MGCRX1_GPIO_DECPIN_INV_PARAM,
MYKONOS_ERR_MGCRX1_GPIO_INCPIN_INV_PARAM,
MYKONOS_ERR_MGCRX1_STEP_INV_PARAM,
MYKONOS_ERR_GETRX2PIN_INCSTEP_NULL_PARM,
MYKONOS_ERR_GETRX2PIN_DECSTEP_NULL_PARM,
MYKONOS_ERR_GETRX2PIN_INCPIN_NULL_PARM,
MYKONOS_ERR_GETRX2PIN_DECPIN_NULL_PARM,
MYKONOS_ERR_GETRX2PIN_EN_NULL_PARM,
MYKONOS_ERR_GETRX1PIN_INCSTEP_NULL_PARM,
MYKONOS_ERR_GETRX1PIN_DECSTEP_NULL_PARM,
MYKONOS_ERR_GETRX1PIN_INCPIN_NULL_PARM,
MYKONOS_ERR_GETRX1PIN_DECPIN_NULL_PARM,
MYKONOS_ERR_GETRX1PIN_EN_NULL_PARM,
MYKONOS_ERR_TPCTX2_GPIO_DECPIN_INV_PARAM,
MYKONOS_ERR_TPCTX2_GPIO_INCPIN_INV_PARAM,
MYKONOS_ERR_TPCTX2_GPIO_STEP_INV_PARAM,
MYKONOS_ERR_TPCTX1_GPIO_DECPIN_INV_PARAM,
MYKONOS_ERR_TPCTX1_GPIO_INCPIN_INV_PARAM,
MYKONOS_ERR_TPCTX1_GPIO_STEP_INV_PARAM,
MYKONOS_ERR_GETTX2PIN_STEP_NULL_PARM,
MYKONOS_ERR_GETTX2PIN_INC_NULL_PARM,
MYKONOS_ERR_GETTX2PIN_DEC_NULL_PARM,
MYKONOS_ERR_GETTX2PIN_EN_NULL_PARM,
MYKONOS_ERR_GETTX2PIN_TX1TX2_NULL_PARM,
MYKONOS_ERR_GETTX1PIN_STEP_NULL_PARM,
MYKONOS_ERR_GETTX1PIN_INC_NULL_PARM,
MYKONOS_ERR_GETTX1PIN_DEC_NULL_PARM,
MYKONOS_ERR_GETTX1PIN_EN_NULL_PARM,
MYKONOS_ERR_GETTX1PIN_TX1TX2_NULL_PARM,
MYKONOS_ERR_SPI2_INV_GPIO,
MYKONOS_ERR_SPI2_INV_SETUP,
MYKONOS_ERR_SET_GPIO_1V8_INV_POINTER,
MYKONOS_ERR_GETGPIOSETLEVEL_NULL_PARM,
MYKONOS_ERR_READGPIOSPI_NULL_PARM,
MYKONOS_ERR_SET_GPIO_1V8_INV_MODE,
MYKONOS_ERR_GETGPIO_OE_NULL_PARM,
MYKONOS_ERR_GPIO_OE_INV_PARAM,
MYKONOS_ERR_GPIO_SRC_PARAM_INV,
MYKONOS_ERR_GET_GPIO_SOURCE_CONTROL_NULL_PARM,
MYKONOS_ERR_INV_GP_INT_MASK_PARM,
MYKONOS_ERR_GP_INT_STATUS_NULL_PARAM,
MYKONOS_ERR_GETGPIO3V3OUT_NULL_PARM,
MYKONOS_ERR_SET_GPIO_3V3_INV_POINTER,
MYKONOS_ERR_GETGPIO3V3SPI_NULL_PARM,
MYKONOS_ERR_GPIO3V3OUTEN_NULL_PARM,
MYKONOS_ERR_SET_GPIO_3V3_INV_MODE,
MYKONOS_ERR_SET_GPIO_3V3_INV_SRC_CTRL,
MYKONOS_ERR_SET_ARMGPIO_INV_POINTER,
MYKONOS_ERR_SET_ARMGPIO_PINS_ARMERROR,
MYKONOS_ERR_SET_ARMGPIO_PINS_INV_SIGNALID,
MYKONOS_ERR_SET_ARMGPIO_PINS_INV_GPIOPIN,
MYKONOS_ERR_SETUPAUXDAC_NULL_PARAM,
MYKONOS_ERR_WRITEAUXDAC_NULL_AUXIO,
MYKONOS_ERR_READAUXADC_NULL_PARAM,
MYKONOS_ERR_SETUPAUXDAC_INV_AUXDACCODE,
MYKONOS_ERR_WRITEAUXDAC_INV_AUXDACCODE,
MYKONOS_ERR_WRITEAUXDAC_INV_AUXDACINDEX,
MYKONOS_ERR_INV_AUX_ADC_CHAN_PARM,
MYKONOS_ERR_SETUPAUXADC_INV_VCODIV,
MYKONOS_ERR_INV_AUX_ADC_DEC_PARM,
MYKONOS_ERR_GAINCOMP_NULL_STRUCT,
MYKONOS_ERR_GAINCOMP_EN_NULL_PARM,
MYKONOS_ERR_GAINCOMP_SET_NULL_STRUCT,
MYKONOS_ERR_GAINCOMP_INV_RX1_OFFSET,
MYKONOS_ERR_GAINCOMP_INV_RX2_OFFSET,
MYKONOS_ERR_GAINCOMP_INV_STEP,
MYKONOS_ERR_GAINCOMP_INV_EN,
MYKONOS_ERR_OBS_RX_GAINCOMP_SET_NULL_STRUCT,
MYKONOS_ERR_OBS_RX_GAINCOMP_EN_NULL_PARAM,
MYKONOS_ERR_OBS_RX_GAINCOMP_INV_EN,
MYKONOS_ERR_OBS_RX_GAINCOMP_INV_OFFSET,
MYKONOS_ERR_OBS_RX_GAINCOMP_INV_STEP,
MYKONOS_ERR_OBS_RX_GAINCOMP_NULL_STRUCT,
MYKONOS_ERR_SLICER_STEP_OUT_OF_RANGE,
MYKONOS_ERR_SLICER_INV_RX1_SEL,
MYKONOS_ERR_SLICER_INV_RX2_SEL,
MYKONOS_ERR_SLICER_EN_INV,
MYKONOS_ERR_SLICER_RX1PIN_NULL_PARM,
MYKONOS_ERR_SLICER_RX2PIN_NULL_PARM,
MYKONOS_ERR_SLICER_STEP_NULL_PARM,
MYKONOS_ERR_SLICER_EN_NULL_PARM,
MYKONOS_ERR_SLICER_INV_OBS_RX_SEL,
MYKONOS_ERR_SLICER_OBS_RX_STEP_OUT_OF_RANGE,
MYKONOS_ERR_SLICER_OBS_RX_EN_INV,
MYKONOS_ERR_SLICER_OBS_RX_EN_NULL_PARM,
MYKONOS_ERR_SLICER_OBS_RX_STEP_NULL_PARM,
MYKONOS_ERR_SLICER_OBS_RXPIN_NULL_PARM,
MYKONOS_ERR_FLOATFRMT_NULL_STRUCT,
MYKONOS_ERR_FLOATFRMT_SET_NULL_STRUCT,
MYKONOS_ERR_FLOATFRMT_INV_ROUND_MODE,
MYKONOS_ERR_FLOATFRMT_INV_DATA_FORMAT,
MYKONOS_ERR_FLOATFRMT_INV_ENC_NAN,
MYKONOS_ERR_FLOATFRMT_INV_EXP_BITS,
MYKONOS_ERR_FLOATFRMT_INV_LEADING,
MYKONOS_ERR_FLOATFRMT_INV_RX1ATT,
MYKONOS_ERR_FLOATFRMT_INV_RX2ATT,
MYKONOS_ERR_FLOATFRMT_INV_EN,
MYKONOS_ERR_FLOATFRMT_NULL_RX1ATT,
MYKONOS_ERR_FLOATFRMT_NULL_RX2ATT,
MYKONOS_ERR_FLOATFRMT_NULL_ENABLE,
MYKONOS_ERR_FLOATFRMT_SET_INV_EN,
MYKONOS_ERR_FLOATFRMT_SET_INV_RX1ATT,
MYKONOS_ERR_FLOATFRMT_SET_INV_RX2ATT,
MYKONOS_ERR_FLOATFRMT_INV_ORXATT,
MYKONOS_ERR_FLOATFRMT_INV_ORXEN,
MYKONOS_ERR_FLOATFRMT_NULL_ORXATT,
MYKONOS_ERR_FLOATFRMT_NULL_ORXENABLE,
MYKONOS_ERR_SETUPTEMPSENSOR_NULL_PARAM,
MYKONOS_ERR_SETUPTEMPSENSOR_INV_TEMPDECIMATION,
MYKONOS_ERR_SETUPTEMPSENSOR_INV_OFFSET,
MYKONOS_ERR_SETUPTEMPSENSOR_INV_TEMPWINDOW,
MYKONOS_ERR_GETTEMPSENSORCFG_NULL_PARAM,
MYKONOS_ERR_READTEMPSENSOR_NULL_PARAM,
MYKONOS_ERR_READTEMPSENSOR_NOT_LOCKED,
MYKONOS_ERR_GAIN_CONTROL_NOT_HYBRID,
MYKONOS_ERR_GPIO_HYBRID_RX1_PIN,
MYKONOS_ERR_GPIO_HYBRID_RX2_PIN,
MYKONOS_ERR_GPIO_HYBRID_RX1_PIN_NULL_PARM,
MYKONOS_ERR_GPIO_HYBRID_RX2_PIN_NULL_PARM,
MYKONOS_ERR_GPIO_HYBRID_RX1_PIN_READ,
MYKONOS_ERR_GPIO_HYBRID_RX2_PIN_READ,
MYKONOS_ERR_AGC_OBS_NOT_IN_HYBRID,
MYKONOS_ERR_GPIO_HYBRID_ORX_PIN,
MYKONOS_ERR_GPIO_HYBRID_ORX_PIN_NULL_PARM,
MYKONOS_ERR_GAIN_CONTROL_NOT_AGC,
MYKONOS_ERR_GPIO_AGC_SYNC_RX1_PIN,
MYKONOS_ERR_GPIO_AGC_SYNC_RX2_PIN,
MYKONOS_ERR_GPIO_AGC_SYNC_RX1_PIN_NULL_PARM,
MYKONOS_ERR_GPIO_AGC_SYNC_RX2_PIN_NULL_PARM,
MYKONOS_ERR_OBS_GAIN_CONTROL_NOT_AGC,
MYKONOS_ERR_GPIO_AGC_SYNC_ORX_PIN,
MYKONOS_ERR_GPIO_AGC_SYNC_ORX_PIN_NULL_PARM,
MYKONOS_ERR_GETGPIODRV_NULL_PARAM,
MYKONOS_ERR_GPIO_DRV_INV_PARAM,
MYKONOS_ERR_GPIO_SLEW_RATE_INV_PARAM,
MYKONOS_ERR_GPIO_GETSLEW_NULL_PARAM,
MYKONOS_ERR_CMOS_DRV_INV_PARAM,
MYKONOS_ERR_CMOS_DRV_NULL_PARAM
} mykonosGpioErr_t;
/**
* \brief Enum of possible Rx Slicer pin combinations
*/
typedef enum
{
GPIO_0_1_2 = 0, /*!< GPIO combination for RX1 */
GPIO_5_6_7 = 1, /*!< GPIO combination for RX1 or RX2 */
GPIO_8_9_10 = 2, /*!< GPIO combination for RX1 */
GPIO_11_12_13 = 3 /*!< GPIO combination for RX2 */
} mykonosRxSlicer_t;
/**
* \brief Enum of possible observation channel Slicer pin combinations
*/
typedef enum
{
GPIO_18_17_16 = 0, /*!< GPIO combination for observation channel */
GPIO_16_15_14 = 1 /*!< GPIO combination for observation channel */
} mykonosObsRxSlicer_t;
/**
* \brief Enum of possible GPIO slew rate settings
*/
typedef enum
{
MYK_SLEWRATE_NONE = 0, /*!< Lower slew rate for the GPIO */
MYK_SLEWRATE_LOW = 1, /*!< Low slew rate for the GPIO */
MYK_SLEWRATE_MEDIUM = 2, /*!< Medium slew rate for the GPIO */
MYK_SLEWRATE_HIGH = 3 /*!< High slew rate for the GPIO */
} mykonosGpioSlewRate_t;
/**
* \brief Enumerated list of CMOS pads drive strength options
*/
typedef enum
{
MYK_CMOSPAD_DRV_1X = 0x00, /*!< 2.5pF load @ 65MHz */
MYK_CMOSPAD_DRV_2X = 0x01, /*!< 5pF load @ 65MHz */
MYK_CMOSPAD_DRV_3X = 0x03, /*!< 7.5pF load @ 65MHz */
MYK_CMOSPAD_DRV_4X = 0x07, /*!< 10pF load @ 65MHz */
MYK_CMOSPAD_DRV_5X = 0x0F /*!< 12.5pF load @ 65MHz */
} mykonosCmosPadDrvStr_t;
/**
* \brief Enumerated list for Aux ADCs
*/
typedef enum
{
MYK_AUXADC_0 = 0x00, /*!< Aux ADC channel 0 */
MYK_AUXADC_1 = 0x01, /*!< Aux ADC channel 1 */
MYK_AUXADC_2 = 0x02, /*!< Aux ADC channel 2 */
MYK_AUXADC_3 = 0x03, /*!< Aux ADC channel 3 */
MYK_AUXADC_0_DIV2 = 0x04, /*!< Aux ADC channel 0 with the divider by 2 set */
MYK_TEMPSENSOR = 0x10 /*!< Temperature sensor channel */
} mykonosAuxAdcChannels_t;
/**
* \brief Data structure to hold Gain compensation settings for the main receive channels
**/
typedef struct
{
uint8_t rx1Offset; /*!< These parameter contains the Rx1 offset word used for the gain compensation
when the gain index is at its maximum setting.
It has a range of 0 to 0x1F with a resolution is 0.5dB per LSB. */
uint8_t rx2Offset; /*!< These parameter contains the Rx2 offset word used for the gain compensation
when the gain index is at its maximum setting.
It has a range of 0 to 0x1F with a resolution is 0.5dB per LSB. */
uint8_t compStep; /*!< These bits contains the value in dB that the total Rx gain changes
when there is an LSB change in the gain index according to the following settings:
compStep | dB ramp
---------|------------
0 | 0.25dB
1 | 0.5dB
2 | 1.0dB
3 | 2.0dB
4 | 3.0dB
5 | 4.0dB
6 | 6.0dB
7 | Not valid defaulted to 0.25dB */
} mykonosGainComp_t;
/**
* \brief Data structure to hold Gain compensation settings for the observation channel
**/
typedef struct
{
uint8_t obsRxOffset; /*!< These parameter contains the Rx1 offset word used for the gain compensation
when the gain index is at its maximum setting.
It has a range of 0 to 0x1F with a resolution is 0.5dB per LSB. */
uint8_t compStep; /*!< These bits contains the value in dB that the total Rx gain changes
when there is an LSB change in the gain index according to the following settings:
compStep | dB ramp
---------|------------
0 | 0.25dB
1 | 0.5dB
2 | 1.0dB
3 | 2.0dB
4 | 3.0dB
5 | 4.0dB
6 | 6.0dB
7 | Not valid defaulted to 0.25dB */
} mykonosObsRxGainComp_t;
/**
* \brief Data structure to hold floating point formatter settings for the floating point
* number generation
**/
typedef struct
{
uint8_t roundMode; /*!<These parameter set the round modes for the significand.
The following settings are defined in the IEEE754 specification:
roundMode | Round type
----------|-----------------
0 | RoundTiesToEven
1 | RoundTowardsPositive
2 | RoundTowardsNegative
3 | RoundTowardsZero
4 | RoundTiesToAway*/
uint8_t dataFormat; /*!< These parameter sets the format of the 16-bit output on the JESD interface:
Setting this to 1 then the format is from MSB to LSB to {sign, significand, exponent}.
Clearing this bit sets the format to {sign, exponent, significand}.*/
uint8_t encNan; /*!< if this parameter is set to 1 then the floating point formatter reserves the highest value
of exponent for NaN to be compatible to the IEEE754 specification.
Clearing this parameter increases the range of the exponent by one.*/
uint8_t expBits; /*!<These parameter is used to indicate the number of exponent bits in the floating point number
according to the following settings:
expBits| Round type
--------|------------------------------------------------
0 | 2 bit exponent, 13 bit significand, 1 bit sign
1 | 3 bit exponent, 12 bit significand, 1 bit sign
2 | 4 bit exponent, 11 bit significand, 1 bit sign
3 | 5 bit exponent, 10 bit significand, 1 bit sign */
uint8_t leading; /*!< Setting this parameter hides the leading one in the the significand to be compatible to the IEEE754 specification.
Clearing this parameter causes the leading one to be at the MSB of the significand.*/
}mykonosFloatPntFrmt_t;
/**
* \brief Data structure used to configure the on-die Temperature Sensor
*/
typedef struct
{
uint8_t tempDecimation; /*!<3-bit value that controls the AuxADC decimation factor when used for temp sensor calculations;
AuxADC_decimation = 256 * 2^tempDecimation */
uint8_t offset; /*!< 8-bit offset that gets added to temp sensor code internally */
uint8_t overrideFusedOffset; /*!< This bit overrides the factory-calibrated fuse offset
and uses the value stored in the offset member */
uint8_t tempWindow; /*!< 4-bit code with a resolution of 1?C/LSB, each time a temperature measurement is performed,
the device compares the current temperature against the previous value.*/
}mykonosTempSensorConfig_t;
/**
* \brief Data structure used to store Temperature Sensor related values
*/
typedef struct
{
int16_t tempCode; /*!< 16-bit signed temperature value (in deg C) that is read back */
uint8_t windowExceeded; /*!< If the absolute value of the difference is greater than the value in temperature configuration
tempWindow, the windowExceeded flag is set.*/
uint8_t windowHiLo; /*!<when windowExceeded member gets set,
this bit is set to 1 if current value is greater than previous value, else reset */
uint8_t tempValid; /*!< When the reading is complete and a valid temperature value stored in tempCode*/
}mykonosTempSensorStatus_t;
#ifdef __cplusplus
}
#endif
#endif /* T_MYKONOSGPIO_H_ */
projects/datalink_814/dl814_dj_48m/project/dl814_dj_48m/dl814_dj_48m.sdk/dl814_dj_bsp/.cproject
+2 -2
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@@ -1,8 +1,8 @@
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
<storageModule moduleId="org.eclipse.cdt.core.settings">
<cconfiguration id="org.eclipse.cdt.core.default.config.764086390">
<storageModule buildSystemId="org.eclipse.cdt.core.defaultConfigDataProvider" id="org.eclipse.cdt.core.default.config.764086390" moduleId="org.eclipse.cdt.core.settings" name="Configuration">
<cconfiguration id="org.eclipse.cdt.core.default.config.147753678">
<storageModule buildSystemId="org.eclipse.cdt.core.defaultConfigDataProvider" id="org.eclipse.cdt.core.default.config.147753678" moduleId="org.eclipse.cdt.core.settings" name="Configuration">
<externalSettings/>
<extensions/>
</storageModule>
projects/datalink_814/dl814_dj_48m/project/dl814_dj_48m/dl814_dj_48m.sdk/system_top.hdf
BIN
View File
Binary file not shown.
projects/datalink_814/dl814_dj_48m/rtl/tx_control.v
+1 -1
View File
@@ -88,7 +88,7 @@ always @(posedge sys_clk) begin
tx_data_buf_i <= 'b0;
tx_data_buf_q <= 'b0;
end
else if (waveform_sel) begin
else if (waveform_sel[2]) begin
tx_data_buf_i <= tx_pn_seq_i;
tx_data_buf_q <= tx_pn_seq_q;
end
projects/datalink_814/dl814_dj_48m/rtl/tx_wave.v
+26
View File
@@ -0,0 +1,26 @@
`timescale 1ns / 1ps
//////////////////////////////////////////////////////////////////////////////////
// Company:
// Engineer:
//
// Create Date: 03/23/2023 06:52:21 PM
// Design Name:
// Module Name: tx_wave
// Project Name:
// Target Devices:
// Tool Versions:
// Description:
//
// Dependencies:
//
// Revision:
// Revision 0.01 - File Created
// Additional Comments:
//
//////////////////////////////////////////////////////////////////////////////////
module tx_wave(
);
endmodule