Update gitignore, add dl814_z7 project

gitignore structure is updated to work with single and multi project situation under a single project directory
This commit is contained in:
2023-03-29 10:42:01 +08:00
parent b000e2702e
commit cd256a8cd6
2246 changed files with 7838223 additions and 86 deletions
@@ -0,0 +1,70 @@
{
"ExpandedHierarchyInLayout":"",
"guistr":"# # String gsaved with Nlview 7.0.19 2019-03-26 bk=1.5019 VDI=41 GEI=35 GUI=JA:9.0 non-TLS
# -string -flagsOSRD
preplace port DDR -pg 1 -lvl 4 -x 1210 -y 330 -defaultsOSRD
preplace port FIXED_IO -pg 1 -lvl 4 -x 1210 -y 350 -defaultsOSRD
preplace port s_axis_fifo_glink_in -pg 1 -lvl 4 -x 1210 -y 900 -defaultsOSRD -right
preplace port m_axis_fifo_glink_out -pg 1 -lvl 4 -x 1210 -y 650 -defaultsOSRD
preplace port s_axis_fifo_c2c_in -pg 1 -lvl 4 -x 1210 -y 40 -defaultsOSRD -right
preplace port m_axis_fifo_c2c_out -pg 1 -lvl 4 -x 1210 -y 150 -defaultsOSRD
preplace port glink_ip_rst_n -pg 1 -lvl 4 -x 1210 -y 880 -defaultsOSRD -right
preplace port glink_ip_clk -pg 1 -lvl 4 -x 1210 -y 920 -defaultsOSRD -right
preplace port ps_clk -pg 1 -lvl 4 -x 1210 -y 630 -defaultsOSRD
preplace port c2c_rst_n -pg 1 -lvl 4 -x 1210 -y 270 -defaultsOSRD -right
preplace port c2c_rx_clk -pg 1 -lvl 4 -x 1210 -y 310 -defaultsOSRD -right
preplace port c2c_tx_clk -pg 1 -lvl 4 -x 1210 -y 290 -defaultsOSRD -right
preplace portBus glink_gpio_i_0 -pg 1 -lvl 4 -x 1210 -y 430 -defaultsOSRD -right
preplace portBus glink_gpio_o_0 -pg 1 -lvl 4 -x 1210 -y 450 -defaultsOSRD
preplace portBus glink_gpio_i_1 -pg 1 -lvl 4 -x 1210 -y 490 -defaultsOSRD -right
preplace portBus glink_gpio_o_1 -pg 1 -lvl 4 -x 1210 -y 510 -defaultsOSRD
preplace portBus pwdown_gpio_o -pg 1 -lvl 4 -x 1210 -y 830 -defaultsOSRD
preplace inst processing_system7 -pg 1 -lvl 2 -x 500 -y 370 -defaultsOSRD
preplace inst glink_ctrl -pg 1 -lvl 3 -x 980 -y 460 -defaultsOSRD
preplace inst ps7_axi_periph -pg 1 -lvl 2 -x 500 -y 680 -defaultsOSRD
preplace inst rst_ps7_100M -pg 1 -lvl 2 -x 500 -y 160 -defaultsOSRD
preplace inst xlconcat_intr -pg 1 -lvl 1 -x 140 -y 440 -defaultsOSRD
preplace inst glink_dma -pg 1 -lvl 3 -x 980 -y 660 -defaultsOSRD
preplace inst pwdown_ctrl -pg 1 -lvl 3 -x 980 -y 820 -defaultsOSRD
preplace inst c2c_dma -pg 1 -lvl 3 -x 980 -y 160 -defaultsOSRD
preplace netloc processing_system7_0_FCLK_CLK0 1 1 3 250 860 790 910 1180
preplace netloc gpio_io_i_0_1 1 3 1 N 430
preplace netloc glink_ctrl_gpio_io_o 1 3 1 N 450
preplace netloc gpio2_io_i_0_1 1 3 1 N 490
preplace netloc glink_ctrl_gpio2_io_o 1 3 1 N 510
preplace netloc processing_system7_FCLK_RESET0_N 1 1 2 270 50 740
preplace netloc rst_ps7_100M_peripheral_aresetn 1 1 2 270 500 770
preplace netloc axi_dma_glink_mm2s_introut 1 0 4 40 40 NJ 40 780J 280 1130
preplace netloc axi_dma_glink_s2mm_introut 1 0 4 10 -10 NJ -10 NJ -10 1170
preplace netloc s_axis_aresetn_0_1 1 2 2 800 930 1190
preplace netloc s_axis_aclk_0_1 1 2 2 820 920 N
preplace netloc irq_xlconcat_dout 1 1 1 N 440
preplace netloc pwdown_ctrl_gpio_io_o 1 3 1 N 830
preplace netloc s_axis_aresetn_0_2 1 2 2 810 270 NJ
preplace netloc s_axis_aclk_0_2 1 2 2 800 310 NJ
preplace netloc m_axis_aclk_0_1 1 2 2 820 290 NJ
preplace netloc c2c_dma_mm2s_introut 1 0 4 20 20 NJ 20 NJ 20 1140
preplace netloc c2c_dma_s2mm_introut 1 0 4 30 30 NJ 30 NJ 30 1130
preplace netloc c2c_dma_M_AXIS_0 1 3 1 N 150
preplace netloc ps7_axi_periph_M02_AXI 1 2 1 750 120n
preplace netloc ps7_axi_periph_M01_AXI 1 2 1 730 610n
preplace netloc c2c_dma_M00_AXI 1 1 3 240 10 NJ 10 1150J
preplace netloc S_AXIS_0_2 1 2 2 820 40 NJ
preplace netloc processing_system7_0_DDR 1 2 2 NJ 330 N
preplace netloc processing_system7_0_FIXED_IO 1 2 2 NJ 350 N
preplace netloc axis_data_fifo_out_M_AXIS 1 3 1 N 650
preplace netloc ps7_axi_periph_M00_AXI 1 2 1 760 440n
preplace netloc ps7_axi_periph_M03_AXI 1 2 1 740 710n
preplace netloc processing_system7_M_AXI_GP0 1 1 2 260 60 730J
preplace netloc axi_smc_M00_AXI 1 1 3 230 0 NJ 0 1160J
preplace netloc S_AXIS_0_1 1 2 2 810 900 N
levelinfo -pg 1 -10 140 500 980 1210
pagesize -pg 1 -db -bbox -sgen -10 -20 1400 940
"
}
{
"da_axi4_cnt":"7",
"da_board_cnt":"2",
"da_clkrst_cnt":"3",
"da_ps7_cnt":"1"
}