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add dl814_k7_basic; update dl814_z7 ps project

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dl814_k7_basic is the driver instance of board smq7k410t_b9361, along with basic clock, adc and dac configurations; include nulling algorithm into dl814_z7 project
This commit is contained in:
josh
2023-03-29 17:34:49 +08:00
parent cd256a8cd6
commit e8a34c95e0
2060 changed files with 4678610 additions and 198681 deletions
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projects/datalink_814/dl814_z7/ipi-bds/system_bd/ui/bd_c6d0cb12.ui
+76 -61
View File
@@ -1,70 +1,85 @@
{
"ExpandedHierarchyInLayout":"",
"guistr":"# # String gsaved with Nlview 7.0.19 2019-03-26 bk=1.5019 VDI=41 GEI=35 GUI=JA:9.0 non-TLS
"guistr":"# # String gsaved with Nlview 7.0.19 2019-03-26 bk=1.5019 VDI=41 GEI=35 GUI=JA:9.0 TLS
# -string -flagsOSRD
preplace port DDR -pg 1 -lvl 4 -x 1210 -y 330 -defaultsOSRD
preplace port FIXED_IO -pg 1 -lvl 4 -x 1210 -y 350 -defaultsOSRD
preplace port s_axis_fifo_glink_in -pg 1 -lvl 4 -x 1210 -y 900 -defaultsOSRD -right
preplace port m_axis_fifo_glink_out -pg 1 -lvl 4 -x 1210 -y 650 -defaultsOSRD
preplace port s_axis_fifo_c2c_in -pg 1 -lvl 4 -x 1210 -y 40 -defaultsOSRD -right
preplace port m_axis_fifo_c2c_out -pg 1 -lvl 4 -x 1210 -y 150 -defaultsOSRD
preplace port glink_ip_rst_n -pg 1 -lvl 4 -x 1210 -y 880 -defaultsOSRD -right
preplace port glink_ip_clk -pg 1 -lvl 4 -x 1210 -y 920 -defaultsOSRD -right
preplace port ps_clk -pg 1 -lvl 4 -x 1210 -y 630 -defaultsOSRD
preplace port c2c_rst_n -pg 1 -lvl 4 -x 1210 -y 270 -defaultsOSRD -right
preplace port c2c_rx_clk -pg 1 -lvl 4 -x 1210 -y 310 -defaultsOSRD -right
preplace port c2c_tx_clk -pg 1 -lvl 4 -x 1210 -y 290 -defaultsOSRD -right
preplace portBus glink_gpio_i_0 -pg 1 -lvl 4 -x 1210 -y 430 -defaultsOSRD -right
preplace portBus glink_gpio_o_0 -pg 1 -lvl 4 -x 1210 -y 450 -defaultsOSRD
preplace portBus glink_gpio_i_1 -pg 1 -lvl 4 -x 1210 -y 490 -defaultsOSRD -right
preplace portBus glink_gpio_o_1 -pg 1 -lvl 4 -x 1210 -y 510 -defaultsOSRD
preplace portBus pwdown_gpio_o -pg 1 -lvl 4 -x 1210 -y 830 -defaultsOSRD
preplace inst processing_system7 -pg 1 -lvl 2 -x 500 -y 370 -defaultsOSRD
preplace inst glink_ctrl -pg 1 -lvl 3 -x 980 -y 460 -defaultsOSRD
preplace inst ps7_axi_periph -pg 1 -lvl 2 -x 500 -y 680 -defaultsOSRD
preplace inst rst_ps7_100M -pg 1 -lvl 2 -x 500 -y 160 -defaultsOSRD
preplace inst xlconcat_intr -pg 1 -lvl 1 -x 140 -y 440 -defaultsOSRD
preplace inst glink_dma -pg 1 -lvl 3 -x 980 -y 660 -defaultsOSRD
preplace inst pwdown_ctrl -pg 1 -lvl 3 -x 980 -y 820 -defaultsOSRD
preplace inst c2c_dma -pg 1 -lvl 3 -x 980 -y 160 -defaultsOSRD
preplace netloc processing_system7_0_FCLK_CLK0 1 1 3 250 860 790 910 1180
preplace netloc gpio_io_i_0_1 1 3 1 N 430
preplace netloc glink_ctrl_gpio_io_o 1 3 1 N 450
preplace netloc gpio2_io_i_0_1 1 3 1 N 490
preplace netloc glink_ctrl_gpio2_io_o 1 3 1 N 510
preplace netloc processing_system7_FCLK_RESET0_N 1 1 2 270 50 740
preplace netloc rst_ps7_100M_peripheral_aresetn 1 1 2 270 500 770
preplace netloc axi_dma_glink_mm2s_introut 1 0 4 40 40 NJ 40 780J 280 1130
preplace netloc axi_dma_glink_s2mm_introut 1 0 4 10 -10 NJ -10 NJ -10 1170
preplace netloc s_axis_aresetn_0_1 1 2 2 800 930 1190
preplace netloc s_axis_aclk_0_1 1 2 2 820 920 N
preplace netloc irq_xlconcat_dout 1 1 1 N 440
preplace netloc pwdown_ctrl_gpio_io_o 1 3 1 N 830
preplace netloc s_axis_aresetn_0_2 1 2 2 810 270 NJ
preplace netloc s_axis_aclk_0_2 1 2 2 800 310 NJ
preplace netloc m_axis_aclk_0_1 1 2 2 820 290 NJ
preplace netloc c2c_dma_mm2s_introut 1 0 4 20 20 NJ 20 NJ 20 1140
preplace netloc c2c_dma_s2mm_introut 1 0 4 30 30 NJ 30 NJ 30 1130
preplace netloc c2c_dma_M_AXIS_0 1 3 1 N 150
preplace netloc ps7_axi_periph_M02_AXI 1 2 1 750 120n
preplace netloc ps7_axi_periph_M01_AXI 1 2 1 730 610n
preplace netloc c2c_dma_M00_AXI 1 1 3 240 10 NJ 10 1150J
preplace netloc S_AXIS_0_2 1 2 2 820 40 NJ
preplace netloc processing_system7_0_DDR 1 2 2 NJ 330 N
preplace netloc processing_system7_0_FIXED_IO 1 2 2 NJ 350 N
preplace netloc axis_data_fifo_out_M_AXIS 1 3 1 N 650
preplace netloc ps7_axi_periph_M00_AXI 1 2 1 760 440n
preplace netloc ps7_axi_periph_M03_AXI 1 2 1 740 710n
preplace netloc processing_system7_M_AXI_GP0 1 1 2 260 60 730J
preplace netloc axi_smc_M00_AXI 1 1 3 230 0 NJ 0 1160J
preplace netloc S_AXIS_0_1 1 2 2 810 900 N
levelinfo -pg 1 -10 140 500 980 1210
pagesize -pg 1 -db -bbox -sgen -10 -20 1400 940
preplace port DDR -pg 1 -lvl 5 -x 1710 -y 500 -defaultsOSRD
preplace port FIXED_IO -pg 1 -lvl 5 -x 1710 -y 520 -defaultsOSRD
preplace port s_axis_fifo_glink_in -pg 1 -lvl 5 -x 1710 -y 690 -defaultsOSRD -right
preplace port m_axis_fifo_glink_out -pg 1 -lvl 5 -x 1710 -y 710 -defaultsOSRD
preplace port s_axis_fifo_c2c_in -pg 1 -lvl 5 -x 1710 -y 1230 -defaultsOSRD -right
preplace port m_axis_fifo_c2c_out -pg 1 -lvl 5 -x 1710 -y 130 -defaultsOSRD
preplace port s_axis_fifo_null_in -pg 1 -lvl 5 -x 1710 -y 1250 -defaultsOSRD -right
preplace port m_axis_fifo_null_out -pg 1 -lvl 5 -x 1710 -y 970 -defaultsOSRD
preplace port glink_ip_rst_n -pg 1 -lvl 5 -x 1710 -y 810 -defaultsOSRD -right
preplace port glink_ip_clk -pg 1 -lvl 5 -x 1710 -y 830 -defaultsOSRD -right
preplace port ps_clk -pg 1 -lvl 5 -x 1710 -y 540 -defaultsOSRD
preplace port c2c_rst_n -pg 1 -lvl 5 -x 1710 -y 20 -defaultsOSRD -right
preplace port c2c_rx_clk -pg 1 -lvl 5 -x 1710 -y 340 -defaultsOSRD -right
preplace port c2c_tx_clk -pg 1 -lvl 5 -x 1710 -y 360 -defaultsOSRD -right
preplace port null_tx_clk -pg 1 -lvl 5 -x 1710 -y 1210 -defaultsOSRD -right
preplace port null_rx_clk -pg 1 -lvl 5 -x 1710 -y 1050 -defaultsOSRD -right
preplace port null_rst_n -pg 1 -lvl 5 -x 1710 -y 1190 -defaultsOSRD -right
preplace portBus glink_gpio_i_0 -pg 1 -lvl 5 -x 1710 -y 210 -defaultsOSRD -right
preplace portBus glink_gpio_o_0 -pg 1 -lvl 5 -x 1710 -y 230 -defaultsOSRD
preplace portBus glink_gpio_i_1 -pg 1 -lvl 5 -x 1710 -y 270 -defaultsOSRD -right
preplace portBus glink_gpio_o_1 -pg 1 -lvl 5 -x 1710 -y 290 -defaultsOSRD
preplace portBus pwdown_gpio_o -pg 1 -lvl 5 -x 1710 -y 1140 -defaultsOSRD
preplace inst processing_system7 -pg 1 -lvl 4 -x 1460 -y 540 -defaultsOSRD
preplace inst glink_ctrl -pg 1 -lvl 4 -x 1460 -y 240 -defaultsOSRD
preplace inst ps7_axi_periph -pg 1 -lvl 2 -x 560 -y 630 -defaultsOSRD
preplace inst rst_ps7_100M -pg 1 -lvl 1 -x 210 -y 940 -defaultsOSRD
preplace inst xlconcat_intr -pg 1 -lvl 3 -x 990 -y 500 -defaultsOSRD
preplace inst glink_dma -pg 1 -lvl 3 -x 990 -y 720 -defaultsOSRD
preplace inst pwdown_ctrl -pg 1 -lvl 4 -x 1460 -y 1130 -defaultsOSRD
preplace inst c2c_dma -pg 1 -lvl 3 -x 990 -y 140 -defaultsOSRD
preplace inst null_dma -pg 1 -lvl 3 -x 990 -y 980 -defaultsOSRD
preplace netloc processing_system7_0_FCLK_CLK0 1 0 5 20 750 390 420 740 260 1210 370 1690
preplace netloc gpio_io_i_0_1 1 4 1 NJ 210
preplace netloc glink_ctrl_gpio_io_o 1 4 1 NJ 230
preplace netloc gpio2_io_i_0_1 1 4 1 NJ 270
preplace netloc glink_ctrl_gpio2_io_o 1 4 1 NJ 290
preplace netloc processing_system7_FCLK_RESET0_N 1 0 5 30 840 NJ 840 720J 850 NJ 850 1680
preplace netloc rst_ps7_100M_peripheral_aresetn 1 1 3 400 430 750 270 1220
preplace netloc axi_dma_glink_mm2s_introut 1 2 2 820 360 1170
preplace netloc axi_dma_glink_s2mm_introut 1 2 2 830 370 1160
preplace netloc s_axis_aresetn_0_1 1 2 3 810 840 1240J 810 NJ
preplace netloc s_axis_aclk_0_1 1 2 3 830 830 NJ 830 NJ
preplace netloc irq_xlconcat_dout 1 3 1 1190 500n
preplace netloc pwdown_ctrl_gpio_io_o 1 4 1 NJ 1140
preplace netloc s_axis_aresetn_0_2 1 2 3 800 20 NJ 20 NJ
preplace netloc s_axis_aclk_0_2 1 2 3 790 350 NJ 350 1690J
preplace netloc m_axis_aclk_0_1 1 2 3 830 290 1230J 360 NJ
preplace netloc c2c_dma_mm2s_introut 1 2 2 800 280 1170
preplace netloc c2c_dma_s2mm_introut 1 2 2 780 250 1160
preplace netloc null_dma_mm2s_introut 1 2 2 830 610 1150
preplace netloc null_dma_s2mm_introut 1 2 2 810 390 1180
preplace netloc m_axis_aclk_0_0_1 1 2 3 830 1210 NJ 1210 NJ
preplace netloc s_axis_aclk_0_0_1 1 2 3 820 1090 1240J 1050 NJ
preplace netloc s_axis_aresetn_0_0_1 1 2 3 810 1220 NJ 1220 1690J
preplace netloc c2c_dma_M_AXIS_0 1 3 2 NJ 130 NJ
preplace netloc ps7_axi_periph_M02_AXI 1 2 1 710 100n
preplace netloc ps7_axi_periph_M01_AXI 1 2 1 760 610n
preplace netloc c2c_dma_M00_AXI 1 3 1 1240 110n
preplace netloc processing_system7_0_DDR 1 4 1 NJ 500
preplace netloc S_AXIS_0_2 1 2 3 770 1230 NJ 1230 NJ
preplace netloc S_AXIS_0_1 1 2 3 820 820 1190J 700 1690J
preplace netloc ps7_axi_periph_M03_AXI 1 2 2 730 860 1190J
preplace netloc processing_system7_M_AXI_GP0 1 1 4 410 380 NJ 380 NJ 380 1680
preplace netloc axi_smc_M00_AXI 1 3 1 1200 500n
preplace netloc axis_data_fifo_out_M_AXIS 1 3 2 NJ 710 NJ
preplace netloc ps7_axi_periph_M00_AXI 1 2 2 730 300 1180J
preplace netloc processing_system7_0_FIXED_IO 1 4 1 NJ 520
preplace netloc S_AXIS_0_0_1 1 2 3 800 1250 NJ 1250 NJ
preplace netloc ps7_axi_periph_M04_AXI 1 2 1 710 670n
preplace netloc null_dma_M00_AXI 1 3 1 1230 540n
preplace netloc null_dma_M_AXIS_0 1 3 2 NJ 970 NJ
levelinfo -pg 1 0 210 560 990 1460 1710
pagesize -pg 1 -db -bbox -sgen 0 0 1920 1270
"
}
{
"da_axi4_cnt":"7",
"da_axi4_cnt":"8",
"da_board_cnt":"2",
"da_clkrst_cnt":"3",
"da_clkrst_cnt":"4",
"da_ps7_cnt":"1"
}
projects/datalink_814/dl814_z7/ipi-bds/system_bd/ui/bd_d3a74392.ui
+39
View File
@@ -0,0 +1,39 @@
{
"ExpandedHierarchyInLayout":"",
"guistr":"# # String gsaved with Nlview 7.0.19 2019-03-26 bk=1.5019 VDI=41 GEI=35 GUI=JA:9.0 TLS
# -string -flagsOSRD
preplace port S_AXIS_0 -pg 1 -lvl 0 -x 0 -y 150 -defaultsOSRD
preplace port S_AXI_LITE -pg 1 -lvl 0 -x 0 -y 60 -defaultsOSRD
preplace port M00_AXI -pg 1 -lvl 4 -x 980 -y 80 -defaultsOSRD
preplace port M_AXIS_0 -pg 1 -lvl 4 -x 980 -y 270 -defaultsOSRD
preplace port s_axis_aresetn_0 -pg 1 -lvl 0 -x 0 -y 170 -defaultsOSRD
preplace port s_axis_aclk_0 -pg 1 -lvl 0 -x 0 -y 190 -defaultsOSRD
preplace port m_axis_aclk -pg 1 -lvl 0 -x 0 -y 210 -defaultsOSRD
preplace port axi_resetn -pg 1 -lvl 0 -x 0 -y 80 -defaultsOSRD
preplace port m_axis_aclk_0 -pg 1 -lvl 0 -x 0 -y 300 -defaultsOSRD
preplace port mm2s_introut -pg 1 -lvl 4 -x 980 -y 160 -defaultsOSRD
preplace port s2mm_introut -pg 1 -lvl 4 -x 980 -y 180 -defaultsOSRD
preplace inst axi_smc -pg 1 -lvl 3 -x 820 -y 80 -defaultsOSRD
preplace inst axi_dma_c2c -pg 1 -lvl 2 -x 460 -y 110 -defaultsOSRD
preplace inst axis_data_fifo_c2c_in -pg 1 -lvl 1 -x 140 -y 180 -defaultsOSRD
preplace inst axis_data_fifo_c2c_out -pg 1 -lvl 3 -x 820 -y 270 -defaultsOSRD
preplace netloc s_axis_aresetn_0_1 1 0 1 NJ 170
preplace netloc s_axis_aclk_0_1 1 0 1 NJ 190
preplace netloc m_axis_aclk_1 1 0 3 20 270 280 240 660
preplace netloc axi_resetn_1 1 0 3 NJ 80 260 230 680
preplace netloc m_axis_aclk_0_1 1 0 3 NJ 300 NJ 300 NJ
preplace netloc axi_dma_c2c_mm2s_introut 1 2 2 670J 170 960J
preplace netloc axi_dma_c2c_s2mm_introut 1 2 2 640J 180 NJ
preplace netloc axi_dma_c2c_M_AXI_MM2S 1 2 1 N 50
preplace netloc axis_data_fifo_c2c_in_M_AXIS 1 1 1 270 80n
preplace netloc Conn3 1 3 1 NJ 80
preplace netloc axi_dma_c2c_M_AXIS_MM2S 1 2 1 650 90n
preplace netloc Conn4 1 3 1 NJ 270
preplace netloc axi_dma_c2c_M_AXI_S2MM 1 2 1 N 70
preplace netloc Conn1 1 0 1 NJ 150
preplace netloc Conn2 1 0 2 NJ 60 NJ
levelinfo -pg 1 0 140 460 820 980
pagesize -pg 1 -db -bbox -sgen -170 -10 1130 360
"
}