Commit Graph
4 Commits
Author SHA1 Message Date
josh e1399346b7 update duifei_basic_v1.0 and module ad9361_mapping
in duifei_basic_v1.0, ila of tx and rx signal is seperated into two ilas; in module ad9361_mapping, the DDR_CLK_MODE of rx mapping iddr is changed to SAME_EDGE, and the output iq of iddr is swappedto satisfy ad9361 data interface
2023-04-06 11:16:56 +08:00
josh 79b4a08568 archive duifei_basic, add duifei_cal_coarse
delete redundant file in dl814_k7_basic; simply duifei_cmos to duifei_basic and archive the project; rename duifei_cmos to duifei_cal_coarse and add ad9361 multichip calibration function, but not tested
2023-04-03 14:31:29 +08:00
josh 1ca0bbc06e release duifei_cmos_v1.0
the function of duifei_cmos is tested, add vio_rfcontrol initial value
2023-04-01 15:40:28 +08:00
josh 2e92604bfb add xc7z100 modules; add duifei_cmos;
the modification to dl84_k7_cal_coarse is not complete
2023-03-30 17:18:05 +08:00