analog.com user util_gmii_to_rgmii 1.0 gmii TXD gmii_txd TX_EN gmii_tx_en TX_ER gmii_tx_er RXD gmii_rxd RX_DV gmii_rx_dv RX_ER gmii_rx_er CRS gmii_crs COL gmii_col TX_CLK gmii_tx_clk RX_CLK gmii_rx_clk rgmii TD rgmii_td TX_CTL rgmii_tx_ctl TXC rgmii_txc RD rgmii_rd RX_CTL rgmii_rx_ctl RXC rgmii_rxc clk_20m CLK clk_20m clk_25m CLK clk_25m clk_125m CLK clk_125m idelayctrl_clk CLK idelayctrl_clk reset RST reset xilinx_anylanguagesynthesis Synthesis :vivado.xilinx.com:synthesis Verilog util_gmii_to_rgmii xilinx_anylanguagesynthesis_view_fileset viewChecksum ee9bfde2 xilinx_anylanguagebehavioralsimulation Simulation :vivado.xilinx.com:simulation Verilog util_gmii_to_rgmii xilinx_anylanguagebehavioralsimulation_view_fileset viewChecksum 3f7a4f70 xilinx_xpgui UI Layout :vivado.xilinx.com:xgui.ui xilinx_xpgui_view_fileset viewChecksum d6c4c122 clk_20m in std_logic xilinx_anylanguagesynthesis xilinx_anylanguagebehavioralsimulation clk_25m in std_logic xilinx_anylanguagesynthesis xilinx_anylanguagebehavioralsimulation clk_125m in std_logic xilinx_anylanguagesynthesis xilinx_anylanguagebehavioralsimulation idelayctrl_clk in std_logic xilinx_anylanguagesynthesis xilinx_anylanguagebehavioralsimulation false reset in std_logic xilinx_anylanguagesynthesis xilinx_anylanguagebehavioralsimulation rgmii_td out 3 0 std_logic_vector xilinx_anylanguagesynthesis xilinx_anylanguagebehavioralsimulation rgmii_tx_ctl out std_logic xilinx_anylanguagesynthesis xilinx_anylanguagebehavioralsimulation rgmii_txc out std_logic xilinx_anylanguagesynthesis xilinx_anylanguagebehavioralsimulation rgmii_rd in 3 0 std_logic_vector xilinx_anylanguagesynthesis xilinx_anylanguagebehavioralsimulation 0 rgmii_rx_ctl in std_logic xilinx_anylanguagesynthesis xilinx_anylanguagebehavioralsimulation 0 rgmii_rxc in std_logic xilinx_anylanguagesynthesis xilinx_anylanguagebehavioralsimulation 0 mdio_mdc in std_logic xilinx_anylanguagesynthesis xilinx_anylanguagebehavioralsimulation mdio_in_w in std_logic xilinx_anylanguagesynthesis xilinx_anylanguagebehavioralsimulation mdio_in_r in std_logic xilinx_anylanguagesynthesis xilinx_anylanguagebehavioralsimulation gmii_txd in 7 0 std_logic_vector xilinx_anylanguagesynthesis xilinx_anylanguagebehavioralsimulation 0 gmii_tx_en in std_logic xilinx_anylanguagesynthesis xilinx_anylanguagebehavioralsimulation 0 gmii_tx_er in std_logic xilinx_anylanguagesynthesis xilinx_anylanguagebehavioralsimulation 0 gmii_tx_clk out std_logic xilinx_anylanguagesynthesis xilinx_anylanguagebehavioralsimulation gmii_crs out reg xilinx_anylanguagesynthesis xilinx_anylanguagebehavioralsimulation gmii_col out reg xilinx_anylanguagesynthesis xilinx_anylanguagebehavioralsimulation gmii_rxd out 7 0 reg xilinx_anylanguagesynthesis xilinx_anylanguagebehavioralsimulation gmii_rx_dv out reg xilinx_anylanguagesynthesis xilinx_anylanguagebehavioralsimulation gmii_rx_er out reg xilinx_anylanguagesynthesis xilinx_anylanguagebehavioralsimulation gmii_rx_clk out std_logic xilinx_anylanguagesynthesis xilinx_anylanguagebehavioralsimulation PHY_AD Phy Ad "10000" IODELAY_CTRL Iodelay Ctrl "0" IDELAY_VALUE Idelay Value 18 IODELAY_GROUP Iodelay Group if_delay_group REFCLK_FREQUENCY Refclk Frequency 200 xilinx_anylanguagesynthesis_view_fileset util_gmii_to_rgmii_constr.xdc xdc mdc_mdio.v verilogSource util_gmii_to_rgmii.v verilogSource CHECKSUM_bae1227a xilinx_anylanguagebehavioralsimulation_view_fileset mdc_mdio.v verilogSource util_gmii_to_rgmii.v verilogSource xilinx_xpgui_view_fileset xgui/util_gmii_to_rgmii_v1_0.tcl tclSource CHECKSUM_d6c4c122 XGUI_VERSION_2 util_gmii_to_rgmii_v1_0 PHY_AD Phy Ad "10000" IODELAY_CTRL Iodelay Ctrl "0" IDELAY_VALUE Idelay Value 18 IODELAY_GROUP Iodelay Group if_delay_group REFCLK_FREQUENCY Refclk Frequency 200 Component_Name util_gmii_to_rgmii_v1_0 virtex7 qvirtex7 kintex7 kintex7l qkintex7 qkintex7l akintex7 artix7 artix7l aartix7 qartix7 zynq qzynq azynq spartan7 aspartan7 virtexu zynquplus virtexuplus virtexuplusHBM virtexuplus58g kintexuplus kintexu azynquplus qkintexu qkintexuplus qrkintexu qvirtexuplus qzynquplus qzynquplusRFSOC zynquplusRFSOC /Analog_Devices util_gmii_to_rgmii_v1_0 package_project Analog Devices http://www.analog.com 1 2021-12-09T07:19:16Z 2019.1.3