# 2zynq0745_3ad9371 (xc7z100 version) ## Timing Assertions Section create_clock -period 8.000 [get_ports refclk_p] ## Physical Constraints Section # Clocks and Resets set_property -dict {PACKAGE_PIN AE22 IOSTANDARD LVDS_25 } [get_ports sysclk_p ] ;# FPGA_LOGIC_CLK_IN_1P set_property -dict {PACKAGE_PIN AD10 } [get_ports refclk_p ] ;# FPGA_JESD204B_CLK_IN_1P set_property -dict {PACKAGE_PIN AJ20 IOSTANDARD LVDS_25 } [get_ports sysref_p ] ;# FPGA_SYSREF_IN_1P # AD9528 Interface set_property -dict {PACKAGE_PIN AE16 IOSTANDARD LVCMOS33} [get_ports spi_csn_ad9528 ] ;# SPI_CS_9528 set_property -dict {PACKAGE_PIN AE17 IOSTANDARD LVCMOS33} [get_ports spi_clk_ad9528 ] ;# SPI_SCK_9528 set_property -dict {PACKAGE_PIN AE18 IOSTANDARD LVCMOS33} [get_ports spi_mosi_ad9528 ] ;# SPI_SDI_9528 set_property -dict {PACKAGE_PIN AE15 IOSTANDARD LVCMOS33} [get_ports spi_miso_ad9528 ] ;# SPI_SDO_9528 set_property -dict {PACKAGE_PIN AH13 IOSTANDARD LVCMOS33} [get_ports ad9528_reset_b ] ;# AD9528_CLK_RESETB set_property -dict {PACKAGE_PIN AA17 IOSTANDARD LVCMOS33} [get_ports ad9528_sysref_req ] ;# AD9528_CLK_SYSREF_REQUEST # AD9371 Interface set_property -dict {PACKAGE_PIN AH23 IOSTANDARD LVDS_25 } [get_ports rx_sync_p ] ;# AD9371_1_SYNCINB0+ set_property -dict {PACKAGE_PIN AJ25 IOSTANDARD LVDS_25 } [get_ports tx_sync_p ] ;# AD9371_1_SYNCOUTB0+ set_property -dict {PACKAGE_PIN AH10 } [get_ports {rx_data_p[0]} ] ;# AD9371_1_SERDOUT0+ set_property -dict {PACKAGE_PIN AJ8 } [get_ports {rx_data_p[1]} ] ;# AD9371_1_SERDOUT1+ set_property -dict {PACKAGE_PIN AK10 } [get_ports {tx_data_p[0]} ] ;# AD9371_1_SERDIN0+ set_property -dict {PACKAGE_PIN AK6 } [get_ports {tx_data_p[1]} ] ;# AD9371_1_SERDIN1+ set_property -dict {PACKAGE_PIN AD24 IOSTANDARD LVCMOS25} [get_ports spi_csn_ad9371 ] ;# AD9371_1_SPI_CS set_property -dict {PACKAGE_PIN AF23 IOSTANDARD LVCMOS25} [get_ports spi_clk_ad9371 ] ;# AD9371_1_SPI_CLK set_property -dict {PACKAGE_PIN AG24 IOSTANDARD LVCMOS25} [get_ports spi_mosi_ad9371 ] ;# AD9371_1_SPI_SDIN set_property -dict {PACKAGE_PIN AG25 IOSTANDARD LVCMOS25} [get_ports spi_miso_ad9371 ] ;# AD9371_1_SPI_SDO set_property -dict {PACKAGE_PIN AK18 IOSTANDARD LVCMOS25} [get_ports ad9371_test ] ;# AD9371_1_TEST set_property -dict {PACKAGE_PIN AH19 IOSTANDARD LVCMOS25} [get_ports ad9371_reset_b ] ;# AD9371_1_RESETB set_property -dict {PACKAGE_PIN AK17 IOSTANDARD LVCMOS25} [get_ports ad9371_gpint ] ;# AD9371_1_GP_INTERRUPT # RF Control set_property -dict {PACKAGE_PIN T23 IOSTANDARD LVCMOS25} [get_ports {freq_hop_words[10]} ] set_property -dict {PACKAGE_PIN R22 IOSTANDARD LVCMOS25} [get_ports {freq_hop_words[9] } ] set_property -dict {PACKAGE_PIN R23 IOSTANDARD LVCMOS25} [get_ports {freq_hop_words[8] } ] set_property -dict {PACKAGE_PIN U22 IOSTANDARD LVCMOS25} [get_ports {freq_hop_words[7] } ] set_property -dict {PACKAGE_PIN V22 IOSTANDARD LVCMOS25} [get_ports {freq_hop_words[6] } ] set_property -dict {PACKAGE_PIN U24 IOSTANDARD LVCMOS25} [get_ports {freq_hop_words[5] } ] set_property -dict {PACKAGE_PIN V24 IOSTANDARD LVCMOS25} [get_ports {freq_hop_words[4] } ] set_property -dict {PACKAGE_PIN V23 IOSTANDARD LVCMOS25} [get_ports {freq_hop_words[3] } ] set_property -dict {PACKAGE_PIN W24 IOSTANDARD LVCMOS25} [get_ports {freq_hop_words[2] } ] set_property -dict {PACKAGE_PIN V21 IOSTANDARD LVCMOS25} [get_ports {freq_hop_words[1] } ] set_property -dict {PACKAGE_PIN AF20 IOSTANDARD LVCMOS25} [get_ports {freq_hop_words[0] } ] set_property -dict {PACKAGE_PIN AH21 IOSTANDARD LVCMOS25} [get_ports hop_words_valid ] set_property -dict {PACKAGE_PIN AG21 IOSTANDARD LVCMOS25} [get_ports freq_hop_switch ] set_property -dict {PACKAGE_PIN V29 IOSTANDARD LVCMOS25} [get_ports tx_gain_on ] set_property -dict {PACKAGE_PIN V28 IOSTANDARD LVCMOS25} [get_ports rx_gain_on ] set_property -dict {PACKAGE_PIN V27 IOSTANDARD LVCMOS25} [get_ports rx_gain_5bit ] set_property -dict {PACKAGE_PIN W28 IOSTANDARD LVCMOS25} [get_ports rx_gain_4bit ] set_property -dict {PACKAGE_PIN T22 IOSTANDARD LVCMOS25} [get_ports rx_gain_3bit ] set_property -dict {PACKAGE_PIN W29 IOSTANDARD LVCMOS25} [get_ports tx_gain_6bit ] set_property -dict {PACKAGE_PIN W30 IOSTANDARD LVCMOS25} [get_ports tx_gain_5bit ]