Archived
4699 lines
626 KiB
Plaintext
4699 lines
626 KiB
Plaintext
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****** Vivado v2019.1.3 (64-bit)
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**** SW Build 2644227 on Wed Sep 4 09:44:18 MDT 2019
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**** IP Build 2633630 on Wed Sep 4 12:30:14 MDT 2019
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** Copyright 1986-2019 Xilinx, Inc. All Rights Reserved.
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source util_adxcvr_ip.tcl
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# source ../../scripts/adi_env.tcl
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## set ad_hdl_dir [file normalize [file join [file dirname [info script]] "../.."]]
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## set ad_ghdl_dir [file normalize [file join [file dirname [info script]] "../../../ghdl"]]
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## if [info exists ::env(ADI_HDL_DIR)] {
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## set ad_hdl_dir [file normalize $::env(ADI_HDL_DIR)]
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## }
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## if [info exists ::env(ADI_GHDL_DIR)] {
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## set ad_ghdl_dir [file normalize $::env(ADI_GHDL_DIR)]
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## }
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# source $ad_hdl_dir/library/scripts/adi_ip_xilinx.tcl
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## source $ad_hdl_dir/library/scripts/adi_xilinx_device_info_enc.tcl
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### variable auto_set_param_list
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### variable auto_set_param_list_overwritable
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### variable fpga_series_list
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### variable fpga_family_list
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### variable speed_grade_list
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### variable dev_package_list
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### variable xcvr_type_list
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### variable fpga_voltage_list
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### set auto_set_param_list { \
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### DEV_PACKAGE \
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### SPEED_GRADE \
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### FPGA_FAMILY \
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### FPGA_TECHNOLOGY }
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### set auto_set_param_list_overwritable { \
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### FPGA_VOLTAGE \
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### XCVR_TYPE }
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### set fpga_technology_list { \
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### { Unknown 0 } \
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### { 7series 1 } \
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### { ultrascale 2 } \
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### { ultrascale+ 3 }}
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### set fpga_family_list { \
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### { Unknown 0 } \
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### { artix 1 } \
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### { kintex 2 } \
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### { virtex 3 } \
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### { zynq 4 }}
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### set speed_grade_list { \
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### { Unknown 0 } \
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### { -1 10 } \
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### { -1L 11 } \
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### { -1H 12 } \
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### { -1HV 13 } \
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### { -1LV 14 } \
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### { -2 20 } \
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### { -2L 21 } \
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### { -2LV 22 } \
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### { -3 30 }}
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### set dev_package_list { \
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### { Unknown 0 } \
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### { rf 1 } \
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### { fl 2 } \
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### { ff 3 } \
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### { fb 4 } \
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### { hc 5 } \
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### { fh 6 } \
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### { cs 7 } \
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### { cp 8 } \
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### { ft 9 } \
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### { fg 10 } \
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### { sb 11 } \
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### { rb 12 } \
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### { rs 13 } \
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### { cl 14 } \
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### { sf 15 } \
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### { ba 16 } \
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### { fa 17 } \
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### { fs 18 } \
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### { fi 19 }}
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### set xcvr_type_list { \
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### { Unknown 0 } \
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### { GTPE2_NOT_SUPPORTED 1 } \
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### { GTXE2 2 } \
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### { GTHE2_NOT_SUPPORTED 3 } \
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### { GTZE2_NOT_SUPPORTED 4 } \
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### { GTHE3 5 } \
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### { GTYE3_NOT_SUPPORTED 6 } \
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### { GTRE4_NOT_SUPPORTED 7 } \
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### { GTHE4 8 } \
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### { GTYE4 9 } \
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### { GTME4_NOT_SUPPORTED 10}}
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### set fpga_voltage_list {0 5000} ;
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### proc adi_device_spec {cellpath param} {
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###
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### set list_pointer [string tolower $param]
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### set list_pointer [append list_pointer "_list"]
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###
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### upvar 1 $list_pointer $list_pointer
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###
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### set ip [get_bd_cells $cellpath]
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### set part [get_property PART [current_project]]
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###
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### switch -regexp -- $param {
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### FPGA_TECHNOLOGY {
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### switch -regexp -- $part {
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### ^xc7 {set series_name 7series}
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### ^xczu {set series_name ultrascale+}
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### ^xc.u.p {set series_name ultrascale+}
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### ^xc.u {set series_name ultrascale }
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### default {
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### puts "Undefined fpga technology for \"$part\"!"
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### exit -1
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### }
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### }
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### return "$series_name"
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### }
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### FPGA_FAMILY {
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### set fpga_family [get_property FAMILY $part]
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### foreach i $fpga_family_list {
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### regexp ^[lindex $i 0] $fpga_family matched
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### }
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### return "$matched"
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### }
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### SPEED_GRADE {
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### set speed_grade [get_property SPEED $part]
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### return "$speed_grade"
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### }
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### DEV_PACKAGE {
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### set dev_package [get_property PACKAGE $part]
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### foreach i $dev_package_list {
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### regexp ^[lindex $i 0] $dev_package matched
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### }
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### return "$matched"
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### }
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### XCVR_TYPE {
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### set matched ""
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### set dev_transcivers "none"
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### foreach x [list_property $part] {
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### regexp ^GT..._TRANSCEIVERS $x dev_transcivers
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### }
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### foreach i $xcvr_type_list {
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### regexp ^[lindex $i 0] $dev_transcivers matched
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### }
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### if { $matched eq "" } {
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### puts "CRITICAL WARNING: \"$dev_transcivers\" TYPE IS NOT SUPPORTED BY ADI!"
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### }
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### return "$matched"
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### }
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### FPGA_VOLTAGE {
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### set fpga_voltage [get_property REF_OPERATING_VOLTAGE $part]
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### set fpga_voltage [expr int([expr $fpga_voltage * 1000])] ;# // V to mV conversion(integer val)
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###
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### return "$fpga_voltage"
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### }
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### default {
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### puts "WARNING: UNDEFINED PARAMETER \"$param\" (adi_device_spec)!"
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### }
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### }
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### }
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## if {![info exists REQUIRED_VIVADO_VERSION]} {
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## set REQUIRED_VIVADO_VERSION "2019.1"
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## }
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## if {[info exists ::env(ADI_IGNORE_VERSION_CHECK)]} {
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## set IGNORE_VERSION_CHECK 1
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## } elseif {![info exists IGNORE_VERSION_CHECK]} {
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## set IGNORE_VERSION_CHECK 0
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## }
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## proc adi_ip_ttcl {ip_name ip_constr_files} {
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##
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## set proj_filegroup [ipx::get_file_groups -of_objects [ipx::current_core] -filter {NAME =~ *synthesis*}]
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## set f [ipx::add_file $ip_constr_files $proj_filegroup]
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## set_property -dict [list \
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## type ttcl \
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## ] $f
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## ipx::reorder_files -front $ip_constr_files $proj_filegroup
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## }
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## proc adi_ip_sim_ttcl {ip_name ip_files} {
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##
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## set proj_filegroup [ipx::get_file_groups -of_objects [ipx::current_core] -filter {NAME =~ *simulation*}]
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## set f [ipx::add_file $ip_files $proj_filegroup]
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## set_property -dict [list \
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## type ttcl \
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## ] $f
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## ipx::reorder_files -front $ip_files $proj_filegroup
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## }
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## proc adi_ip_bd {ip_name ip_bd_files} {
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## set proj_filegroup [ipx::get_file_groups xilinx_blockdiagram -of_objects [ipx::current_core]]
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## if {$proj_filegroup == {}} {
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## set proj_filegroup [ipx::add_file_group -type xilinx_blockdiagram "" [ipx::current_core]]
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## }
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##
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## foreach file $ip_bd_files {
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## set f [ipx::add_file $file $proj_filegroup]
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## set_property -dict [list \
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## type tclSource \
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## ] $f
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## }
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## }
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## proc adi_ip_infer_streaming_interfaces {ip_name} {
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##
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## ipx::infer_bus_interfaces xilinx.com:interface:axis_rtl:1.0 [ipx::current_core]
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##
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## }
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## proc adi_ip_infer_mm_interfaces {ip_name} {
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##
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## ipx::infer_bus_interfaces xilinx.com:interface:aximm_rtl:1.0 [ipx::current_core]
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##
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## }
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## proc adi_set_ports_dependency {port_prefix dependency {driver_value {}}} {
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## foreach port [ipx::get_ports [format "%s%s" $port_prefix "*"]] {
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## set_property ENABLEMENT_DEPENDENCY $dependency $port
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## if {$driver_value != {}} {
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## set_property DRIVER_VALUE $driver_value $port
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## }
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## }
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## }
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## proc adi_set_bus_dependency {bus prefix dependency} {
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## set_property ENABLEMENT_DEPENDENCY $dependency [ipx::get_bus_interfaces $bus -of_objects [ipx::current_core]]
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## adi_set_ports_dependency $prefix $dependency 0
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## }
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## proc adi_add_port_map {bus phys logic} {
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## set map [ipx::add_port_map $phys $bus]
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## set_property "PHYSICAL_NAME" $phys $map
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## set_property "LOGICAL_NAME" $logic $map
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## }
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## proc adi_add_bus {bus_name mode abs_type bus_type port_maps} {
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## set bus [ipx::add_bus_interface $bus_name [ipx::current_core]]
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##
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## set_property "ABSTRACTION_TYPE_VLNV" $abs_type $bus
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## set_property "BUS_TYPE_VLNV" $bus_type $bus
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## set_property "INTERFACE_MODE" $mode $bus
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##
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## foreach port_map $port_maps {
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## adi_add_port_map $bus {*}$port_map
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## }
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## }
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## proc adi_add_multi_bus {num bus_name_prefix mode abs_type bus_type port_maps dependency} {
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## for {set i 0} {$i < $num} {incr i} {
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## set bus_name [format "%s%d" $bus_name_prefix $i]
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## set bus [ipx::add_bus_interface $bus_name [ipx::current_core]]
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##
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## set_property "ABSTRACTION_TYPE_VLNV" $abs_type $bus
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## set_property "BUS_TYPE_VLNV" $bus_type $bus
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## set_property "INTERFACE_MODE" $mode $bus
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##
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## if {$dependency ne ""} {
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## set bus_dependency [string map [list "{i}" $i] $dependency]
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## set_property ENABLEMENT_DEPENDENCY $bus_dependency $bus
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## }
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##
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## foreach port_map $port_maps {
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## lassign $port_map phys logic width width_dep
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## set map [ipx::add_port_map $phys $bus]
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## set_property "PHYSICAL_NAME" $phys $map
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## set_property "LOGICAL_NAME" $logic $map
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## set_property "PHYSICAL_RIGHT" [expr $i*$width] $map
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## set_property "PHYSICAL_LEFT" [expr ($i+1)*$width-1] $map
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## if {$width_dep ne ""} {
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## set_property "PHYSICAL_RIGHT_RESOLVE_TYPE" "dependent" $map
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## set_property "PHYSICAL_LEFT_RESOLVE_TYPE" "dependent" $map
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## set width_dep_r "(($width_dep) * $i)"
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## set width_dep_l "(($width_dep) * ($i + 1)-1)"
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## set_property "PHYSICAL_RIGHT_DEPENDENCY" $width_dep_r $map
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## set_property "PHYSICAL_LEFT_DEPENDENCY" $width_dep_l $map
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## }
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## }
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## }
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## }
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## proc adi_add_bus_clock {clock_signal_name bus_inf_name {reset_signal_name ""} {reset_signal_mode "slave"}} {
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## set bus_inf_name_clean [string map {":" "_"} $bus_inf_name]
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## set clock_inf_name [format "%s%s" $bus_inf_name_clean "_signal_clock"]
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## set clock_inf [ipx::add_bus_interface $clock_inf_name [ipx::current_core]]
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## set_property abstraction_type_vlnv "xilinx.com:signal:clock_rtl:1.0" $clock_inf
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## set_property bus_type_vlnv "xilinx.com:signal:clock:1.0" $clock_inf
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## set_property display_name $clock_inf_name $clock_inf
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## set clock_map [ipx::add_port_map "CLK" $clock_inf]
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## set_property physical_name $clock_signal_name $clock_map
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##
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## set assoc_busif [ipx::add_bus_parameter "ASSOCIATED_BUSIF" $clock_inf]
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## set_property value $bus_inf_name $assoc_busif
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##
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## if { $reset_signal_name != "" } {
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## set assoc_reset [ipx::add_bus_parameter "ASSOCIATED_RESET" $clock_inf]
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## set_property value $reset_signal_name $assoc_reset
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##
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## set reset_inf_name [format "%s%s" $bus_inf_name_clean "_signal_reset"]
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## set reset_inf [ipx::add_bus_interface $reset_inf_name [ipx::current_core]]
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## set_property abstraction_type_vlnv "xilinx.com:signal:reset_rtl:1.0" $reset_inf
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## set_property bus_type_vlnv "xilinx.com:signal:reset:1.0" $reset_inf
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## set_property display_name $reset_inf_name $reset_inf
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## set_property interface_mode $reset_signal_mode $reset_inf
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## set reset_map [ipx::add_port_map "RST" $reset_inf]
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## set_property physical_name $reset_signal_name $reset_map
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##
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## set reset_polarity [ipx::add_bus_parameter "POLARITY" $reset_inf]
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## if {[string match {*[Nn]} $reset_signal_name] == 1} {
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## set_property value "ACTIVE_LOW" $reset_polarity
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## } else {
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## set_property value "ACTIVE_HIGH" $reset_polarity
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## }
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## }
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## }
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## proc adi_ip_add_core_dependencies {vlnvs} {
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## foreach file_group [ipx::get_file_groups * -of_objects [ipx::current_core]] {
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## foreach vlnv $vlnvs {
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## ipx::add_subcore $vlnv $file_group
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## }
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## }
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## }
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## proc adi_ip_create {ip_name} {
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##
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## global ad_hdl_dir
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## global ad_ghdl_dir
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## global REQUIRED_VIVADO_VERSION
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## global IGNORE_VERSION_CHECK
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##
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## set VIVADO_VERSION [version -short]
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## if {$IGNORE_VERSION_CHECK} {
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## if {[string compare $VIVADO_VERSION $REQUIRED_VIVADO_VERSION] != 0} {
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## puts -nonewline "CRITICAL WARNING: vivado version mismatch; "
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## puts -nonewline "expected $REQUIRED_VIVADO_VERSION, "
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## puts -nonewline "got $VIVADO_VERSION.\n"
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## }
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## } else {
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## if {[string compare $VIVADO_VERSION $REQUIRED_VIVADO_VERSION] != 0} {
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## puts -nonewline "ERROR: vivado version mismatch; "
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## puts -nonewline "expected $REQUIRED_VIVADO_VERSION, "
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## puts -nonewline "got $VIVADO_VERSION.\n"
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## puts -nonewline "This ERROR message can be down-graded to CRITICAL WARNING by setting ADI_IGNORE_VERSION_CHECK environment variable to 1. Be aware that ADI will not support you, if you are using a different tool version.\n"
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## exit 2
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## }
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## }
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##
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## create_project $ip_name . -force
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##
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## ## Load custom message severity definitions
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## source $ad_hdl_dir/projects/scripts/adi_xilinx_msg.tcl
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##
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## set lib_dirs $ad_hdl_dir/library
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## if {$ad_hdl_dir ne $ad_ghdl_dir} {
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## lappend lib_dirs $ad_ghdl_dir/library
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## }
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##
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## set_property ip_repo_paths $lib_dirs [current_fileset]
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## update_ip_catalog
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## }
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## proc adi_ip_files {ip_name ip_files} {
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## set proj_fileset [get_filesets sources_1]
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## foreach m_file $ip_files {
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## if {[file extension $m_file] eq ".xdc"} {
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## add_files -norecurse -fileset constrs_1 $m_file
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## } else {
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## add_files -norecurse -scan_for_includes -fileset $proj_fileset $m_file
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## }
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## }
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## set_property "top" "$ip_name" $proj_fileset
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## }
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## proc adi_ip_properties_lite {ip_name} {
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##
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## global ad_hdl_dir
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##
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## ipx::package_project -root_dir . -vendor analog.com -library user -taxonomy /Analog_Devices
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##
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## set_property name $ip_name [ipx::current_core]
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##
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## set_property vendor_display_name {Analog Devices} [ipx::current_core]
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## set_property company_url {http://www.analog.com} [ipx::current_core]
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##
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## set i_families ""
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## foreach i_part [get_parts] {
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## lappend i_families [get_property FAMILY $i_part]
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## }
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## set i_families [lsort -unique $i_families]
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## set s_families [get_property supported_families [ipx::current_core]]
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## foreach i_family $i_families {
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## set s_families "$s_families $i_family Production"
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## set s_families "$s_families $i_family Beta"
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## }
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## set_property supported_families $s_families [ipx::current_core]
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##
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## ipx::save_core [ipx::current_core]
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##
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## ipx::remove_all_bus_interface [ipx::current_core]
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## set memory_maps [ipx::get_memory_maps * -of_objects [ipx::current_core]]
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## foreach map $memory_maps {
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## ipx::remove_memory_map [lindex $map 2] [ipx::current_core]
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## }
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##
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## ipx::update_checksums [ipx::current_core]
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## ipx::save_core [ipx::current_core]
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## }
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## proc adi_ip_properties {ip_name} {
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##
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## adi_ip_properties_lite $ip_name
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##
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## ipx::infer_bus_interface {\
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## s_axi_awvalid \
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## s_axi_awaddr \
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## s_axi_awprot \
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## s_axi_awready \
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## s_axi_wvalid \
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## s_axi_wdata \
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## s_axi_wstrb \
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## s_axi_wready \
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## s_axi_bvalid \
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## s_axi_bresp \
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##
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## s_axi_bready \
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## s_axi_arvalid \
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## s_axi_araddr \
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## s_axi_arprot \
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## s_axi_arready \
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## s_axi_rvalid \
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## s_axi_rdata \
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## s_axi_rresp \
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## s_axi_rready} \
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## xilinx.com:interface:aximm_rtl:1.0 [ipx::current_core]
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##
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## ipx::infer_bus_interface s_axi_aclk xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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## ipx::infer_bus_interface s_axi_aresetn xilinx.com:signal:reset_rtl:1.0 [ipx::current_core]
|
|
##
|
|
## set raddr_width [expr [get_property SIZE_LEFT [ipx::get_ports -nocase true s_axi_araddr -of_objects [ipx::current_core]]] + 1]
|
|
## set waddr_width [expr [get_property SIZE_LEFT [ipx::get_ports -nocase true s_axi_awaddr -of_objects [ipx::current_core]]] + 1]
|
|
##
|
|
## if {$raddr_width != $waddr_width} {
|
|
## puts [format "WARNING: AXI address width mismatch for %s (r=%d, w=%d)" $ip_name $raddr_width, $waddr_width]
|
|
## set range 65536
|
|
## } else {
|
|
## if {$raddr_width >= 16} {
|
|
## set range 65536
|
|
## } else {
|
|
## set range [expr 1 << $raddr_width]
|
|
## }
|
|
## }
|
|
##
|
|
## ipx::add_memory_map {s_axi} [ipx::current_core]
|
|
## set_property slave_memory_map_ref {s_axi} [ipx::get_bus_interfaces s_axi -of_objects [ipx::current_core]]
|
|
## ipx::add_address_block {axi_lite} [ipx::get_memory_maps s_axi -of_objects [ipx::current_core]]
|
|
## set_property range $range [ipx::get_address_blocks axi_lite \
|
|
## -of_objects [ipx::get_memory_maps s_axi -of_objects [ipx::current_core]]]
|
|
## ipx::associate_bus_interfaces -clock s_axi_aclk -reset s_axi_aresetn [ipx::current_core]
|
|
## ipx::save_core
|
|
## }
|
|
## proc adi_init_bd_tcl {} {
|
|
##
|
|
## global auto_set_param_list
|
|
## global auto_set_param_list_overwritable
|
|
## set cc [ipx::current_core]
|
|
##
|
|
## if { [file exists bd] } {
|
|
## file delete -force bd
|
|
## }
|
|
## file mkdir bd
|
|
##
|
|
## set bd_tcl [open "bd/bd.tcl" w]
|
|
##
|
|
## puts $bd_tcl "# SCRIPT AUTO-GENERATED AT BUILD, DO NOT MODIFY!"
|
|
## puts $bd_tcl "proc init {cellpath otherInfo} {"
|
|
## puts $bd_tcl " set ip \[get_bd_cells \$cellpath\]"
|
|
## puts $bd_tcl ""
|
|
## set auto_set_param ""
|
|
## foreach i $auto_set_param_list {
|
|
## if { [ipx::get_user_parameters $i -of_objects $cc -quiet] ne "" } {
|
|
## append auto_set_param " $i \\\n"
|
|
## }
|
|
## }
|
|
## if { $auto_set_param ne "" } {
|
|
## puts $bd_tcl " bd::mark_propagate_only \$ip \" \\"
|
|
## regsub "${i} \\\\" $auto_set_param "$i\"" auto_set_param
|
|
## puts $bd_tcl $auto_set_param
|
|
## }
|
|
##
|
|
## set auto_set_overwritable_param ""
|
|
## foreach i $auto_set_param_list_overwritable {
|
|
## if { [ipx::get_user_parameters $i -of_objects $cc -quiet] ne "" } {
|
|
## append auto_set_overwritable_param " $i \\\n"
|
|
## }
|
|
## }
|
|
## if { $auto_set_overwritable_param ne "" } {
|
|
## puts $bd_tcl " bd::mark_propagate_override \$ip \" \\"
|
|
## regsub "${i} \\\\" $auto_set_overwritable_param "$i\"" auto_set_overwritable_param
|
|
## puts $bd_tcl $auto_set_overwritable_param
|
|
## }
|
|
## puts $bd_tcl " adi_auto_assign_device_spec \$cellpath"
|
|
## puts $bd_tcl "}"
|
|
## puts $bd_tcl ""
|
|
## puts $bd_tcl "# auto set parameters defined in auto_set_param_list (adi_xilinx_device_info_enc.tcl)"
|
|
## puts $bd_tcl "proc adi_auto_assign_device_spec {cellpath} {"
|
|
## puts $bd_tcl ""
|
|
## puts $bd_tcl " set ip \[get_bd_cells \$cellpath\]"
|
|
## puts $bd_tcl " set ip_param_list \[list_property \$ip\]"
|
|
## puts $bd_tcl " set ip_path \[bd::get_vlnv_dir \[get_property VLNV \$ip\]\]"
|
|
## puts $bd_tcl ""
|
|
## puts $bd_tcl " set parent_dir \"../\""
|
|
## puts $bd_tcl " for {set x 1} {\$x<=4} {incr x} {"
|
|
## puts $bd_tcl " set linkname \${ip_path}\${parent_dir}scripts/adi_xilinx_device_info_enc.tcl"
|
|
## puts $bd_tcl " if { \[file exists \$linkname\] } {"
|
|
## puts $bd_tcl " source \${ip_path}\${parent_dir}/scripts/adi_xilinx_device_info_enc.tcl"
|
|
## puts $bd_tcl " break"
|
|
## puts $bd_tcl " }"
|
|
## puts $bd_tcl " append parent_dir \"../\""
|
|
## puts $bd_tcl " }"
|
|
## puts $bd_tcl ""
|
|
## puts $bd_tcl " # Find predefindes auto assignable parameters"
|
|
## puts $bd_tcl " foreach i \$auto_set_param_list {"
|
|
## puts $bd_tcl " if { \[lsearch \$ip_param_list \"CONFIG.\$i\"\] > 0 } {"
|
|
## puts $bd_tcl " set val \[adi_device_spec \$cellpath \$i\]"
|
|
## puts $bd_tcl " set_property CONFIG.\$i \$val \$ip"
|
|
## puts $bd_tcl " }"
|
|
## puts $bd_tcl " }"
|
|
## puts $bd_tcl ""
|
|
## puts $bd_tcl " # Find predefindes auto assignable/overwritable parameters"
|
|
## puts $bd_tcl " foreach i \$auto_set_param_list_overwritable {"
|
|
## puts $bd_tcl " if { \[lsearch \$ip_param_list \"CONFIG.\$i\"\] > 0 } {"
|
|
## puts $bd_tcl " set val \[adi_device_spec \$cellpath \$i\]"
|
|
## puts $bd_tcl " set_property CONFIG.\$i \$val \$ip"
|
|
## puts $bd_tcl " }"
|
|
## puts $bd_tcl " }"
|
|
## puts $bd_tcl "}"
|
|
## puts $bd_tcl ""
|
|
## close $bd_tcl
|
|
##
|
|
## set proj_fileset [get_filesets sources_1]
|
|
## add_files -norecurse -scan_for_includes -fileset $proj_fileset "bd/bd.tcl"
|
|
##
|
|
## set local_mk [open "temporary_case_dependencies.mk" w]
|
|
## seek $local_mk 0 start
|
|
## puts $local_mk "CLEAN_TARGET += bd"
|
|
## puts $local_mk "CLEAN_TARGET += temporary_case_dependencies.mk"
|
|
## close $local_mk
|
|
## }
|
|
## proc adi_add_auto_fpga_spec_params {} {
|
|
##
|
|
## global auto_set_param_list
|
|
## global auto_set_param_list_overwritable
|
|
## set cc [ipx::current_core]
|
|
##
|
|
## foreach i $auto_set_param_list {
|
|
## if { [ipx::get_user_parameters $i -of_objects $cc -quiet] ne ""} {
|
|
## adi_add_device_spec_param $i
|
|
## }
|
|
## }
|
|
## foreach i $auto_set_param_list_overwritable {
|
|
## if { [ipx::get_user_parameters $i -of_objects $cc -quiet] ne ""} {
|
|
## adi_add_device_spec_param $i
|
|
## }
|
|
## }
|
|
## }
|
|
## proc adi_add_device_spec_param {ip_param} {
|
|
##
|
|
## set cc [ipx::current_core]
|
|
##
|
|
## set list_pointer [string tolower $ip_param]
|
|
## set list_pointer [append list_pointer "_list"]
|
|
##
|
|
## global $list_pointer
|
|
##
|
|
## # set j 1D list from the original list
|
|
## foreach i [subst $$list_pointer] {lappend j [lindex $i 0] [lindex $i 1]}
|
|
##
|
|
## # set ranges or validation pairs (show x in GUI assign the corresponding y to HDL)
|
|
## if { [llength [subst $$list_pointer]] == 2 && [llength $j] == 4} {
|
|
## set_property -dict [list \
|
|
## "value_validation_type" "range_long" \
|
|
## "value_validation_range_minimum" [lindex [subst $$list_pointer] 0] \
|
|
## "value_validation_range_maximum" [lindex [subst $$list_pointer] 1] ] \
|
|
## [ipx::get_user_parameters $ip_param -of_objects $cc]
|
|
## } else {
|
|
## set_property -dict [list \
|
|
## "value_validation_type" "pairs" \
|
|
## "value_validation_pairs" $j ] \
|
|
## [ipx::get_user_parameters $ip_param -of_objects $cc]
|
|
## }
|
|
##
|
|
## # FPGA info grup
|
|
## set info_group_name "FPGA info"
|
|
## set info_group [ipgui::get_groupspec -name $info_group_name -component $cc -quiet]
|
|
## if { [string trim $info_group] eq "" } {
|
|
## set page0 [ipgui::get_pagespec -name "Page 0" -component $cc]
|
|
## set info_group [ipgui::add_group -name $info_group_name -component $cc \
|
|
## -parent $page0 -display_name $info_group_name]
|
|
## }
|
|
##
|
|
## set p [ipgui::get_guiparamspec -name $ip_param -component $cc]
|
|
## set_property -dict [list "widget" "comboBox" ] $p
|
|
## ipgui::move_param -component $cc -order 0 $p -parent $info_group
|
|
## }
|
|
## proc adi_if_define {name} {
|
|
##
|
|
## ipx::create_abstraction_definition analog.com interface ${name}_rtl 1.0
|
|
## ipx::create_bus_definition analog.com interface $name 1.0
|
|
##
|
|
## set_property xml_file_name ${name}_rtl.xml [ipx::current_busabs]
|
|
## set_property xml_file_name ${name}.xml [ipx::current_busdef]
|
|
## set_property bus_type_vlnv analog.com:interface:${name}:1.0 [ipx::current_busabs]
|
|
##
|
|
## ipx::save_abstraction_definition [ipx::current_busabs]
|
|
## ipx::save_bus_definition [ipx::current_busdef]
|
|
## }
|
|
## proc adi_if_ports {dir width name {type none}} {
|
|
##
|
|
## ipx::add_bus_abstraction_port $name [ipx::current_busabs]
|
|
## set m_intf [ipx::get_bus_abstraction_ports $name -of_objects [ipx::current_busabs]]
|
|
## set_property master_presence required $m_intf
|
|
## set_property slave_presence required $m_intf
|
|
## set_property master_width $width $m_intf
|
|
## set_property slave_width $width $m_intf
|
|
##
|
|
## set m_dir "in"
|
|
## set s_dir "out"
|
|
## if {$dir eq "output"} {
|
|
## set m_dir "out"
|
|
## set s_dir "in"
|
|
## }
|
|
##
|
|
## set_property master_direction $m_dir $m_intf
|
|
## set_property slave_direction $s_dir $m_intf
|
|
##
|
|
## if {$type ne "none"} {
|
|
## set_property is_${type} true $m_intf
|
|
## }
|
|
##
|
|
## ipx::save_bus_definition [ipx::current_busdef]
|
|
## ipx::save_abstraction_definition [ipx::current_busabs]
|
|
## }
|
|
## proc adi_if_infer_bus {if_name mode name maps} {
|
|
##
|
|
## ipx::add_bus_interface $name [ipx::current_core]
|
|
## set m_bus_if [ipx::get_bus_interfaces $name -of_objects [ipx::current_core]]
|
|
## set_property abstraction_type_vlnv ${if_name}_rtl:1.0 $m_bus_if
|
|
## set_property bus_type_vlnv ${if_name}:1.0 $m_bus_if
|
|
## set_property interface_mode $mode $m_bus_if
|
|
##
|
|
## foreach map $maps {
|
|
## set m_maps [regexp -all -inline {\S+} $map]
|
|
## lassign $m_maps p_name p_map
|
|
## ipx::add_port_map $p_name $m_bus_if
|
|
## set_property physical_name $p_map [ipx::get_port_maps $p_name -of_objects $m_bus_if]
|
|
## }
|
|
## }
|
|
# adi_ip_create util_adxcvr
|
|
CRITICAL WARNING: vivado version mismatch; expected 2019.1, got 2019.1.3.
|
|
## set_msg_config -id {Vivado 12-1790} -string "Evaluation features should NOT be used in production systems." -new_severity WARNING
|
|
## set_msg_config -id {BD 41-1343} -new_severity WARNING
|
|
## set_msg_config -id {BD 41-1306} -new_severity WARNING
|
|
## set_msg_config -severity {CRITICAL WARNING} -quiet -id {BD 41-1276} -new_severity ERROR
|
|
## set_msg_config -id {IP_Flow 19-3656} -new_severity INFO
|
|
## set_msg_config -id {IP_Flow 19-4623} -new_severity INFO
|
|
## set_msg_config -id {IP_Flow 19-459} -new_severity INFO
|
|
## set_msg_config -id {Synth 8-3331} -new_severity INFO
|
|
## set_msg_config -id {Designutils 20-3303} -string "HDPYFinalizeIO" -new_severity INFO
|
|
## set_msg_config -id {Place 30-73} -string "axi_spi" -new_severity WARNING
|
|
## set_msg_config -string "PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY" -new_severity WARNING
|
|
INFO: [IP_Flow 19-234] Refreshing IP repositories
|
|
INFO: [IP_Flow 19-1700] Loaded user IP repository '/home/gatsby/Workspace/Vivado2019.1/ADI/hdl/library'.
|
|
INFO: [IP_Flow 19-3656] If you move the project, the path for repository '/home/gatsby/Workspace/Vivado2019.1/ADI/hdl/library' may become invalid. A better location for the repository would be in a path adjacent to the project. (Current project location is '/home/gatsby/Workspace/Vivado2019.1/ADI/hdl/library/xilinx/util_adxcvr'.)
|
|
WARNING: [IP_Flow 19-2248] Failed to load user IP repository '/home/gatsby/Workspace/Vivado2019.1/ADI/ghdl/library'; Can't find the specified path.
|
|
If this directory should no longer be in your list of user repositories, go to the IP Settings dialog and remove it.
|
|
INFO: [IP_Flow 19-2313] Loaded Vivado IP repository '/tools/Xilinx/Vivado/2019.1/data/ip'.
|
|
# adi_ip_files util_adxcvr [list \
|
|
# "$ad_hdl_dir/library/scripts/adi_xilinx_device_info_enc.tcl" \
|
|
# "util_adxcvr_constr.xdc" \
|
|
# "util_adxcvr_xcm.v" \
|
|
# "util_adxcvr_xch.v" \
|
|
# "util_adxcvr.v" \
|
|
# "bd/bd.tcl" ]
|
|
# adi_ip_properties_lite util_adxcvr
|
|
INFO: [IP_Flow 19-459] IP file '/home/gatsby/Workspace/Vivado2019.1/ADI/hdl/library/scripts/adi_xilinx_device_info_enc.tcl' appears to be outside of the project area '/home/gatsby/Workspace/Vivado2019.1/ADI/hdl/library/xilinx/util_adxcvr'. You can use the ipx::package_project -import_files option to copy remote files into the IP directory.
|
|
INFO: [IP_Flow 19-459] IP file '/home/gatsby/Workspace/Vivado2019.1/ADI/hdl/library/scripts/adi_xilinx_device_info_enc.tcl' appears to be outside of the project area '/home/gatsby/Workspace/Vivado2019.1/ADI/hdl/library/xilinx/util_adxcvr'. You can use the ipx::package_project -import_files option to copy remote files into the IP directory.
|
|
INFO: [IP_Flow 19-4821] For module 'util_adxcvr', parameter 'RX_XMODE_SEL' is inferred to be bitString format.
|
|
INFO: [IP_Flow 19-5151] The Range '31:0' is present in all ports of the interface 'rx_0'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '31:0' is present in all ports of the interface 'rx_1'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '31:0' is present in all ports of the interface 'rx_10'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '31:0' is present in all ports of the interface 'rx_11'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '31:0' is present in all ports of the interface 'rx_12'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '31:0' is present in all ports of the interface 'rx_13'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '31:0' is present in all ports of the interface 'rx_14'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '31:0' is present in all ports of the interface 'rx_15'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '31:0' is present in all ports of the interface 'rx_2'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '31:0' is present in all ports of the interface 'rx_3'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '31:0' is present in all ports of the interface 'rx_4'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '31:0' is present in all ports of the interface 'rx_5'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '31:0' is present in all ports of the interface 'rx_6'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '31:0' is present in all ports of the interface 'rx_7'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '31:0' is present in all ports of the interface 'rx_8'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '31:0' is present in all ports of the interface 'rx_9'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '31:0' is present in all ports of the interface 'tx_0'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '31:0' is present in all ports of the interface 'tx_1'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '31:0' is present in all ports of the interface 'tx_10'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '31:0' is present in all ports of the interface 'tx_11'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '31:0' is present in all ports of the interface 'tx_12'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '31:0' is present in all ports of the interface 'tx_13'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '31:0' is present in all ports of the interface 'tx_14'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '31:0' is present in all ports of the interface 'tx_15'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '31:0' is present in all ports of the interface 'tx_2'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '31:0' is present in all ports of the interface 'tx_3'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '31:0' is present in all ports of the interface 'tx_4'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '31:0' is present in all ports of the interface 'tx_5'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '31:0' is present in all ports of the interface 'tx_6'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '31:0' is present in all ports of the interface 'tx_7'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '31:0' is present in all ports of the interface 'tx_8'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '31:0' is present in all ports of the interface 'tx_9'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_0_0' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_0_1' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_0_10' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_0_11' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_0_12' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_0_13' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_0_14' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_0_15' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_0_16' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_0_17' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_0_18' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_0_19' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_0_2' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_0_20' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_0_21' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_0_22' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_0_23' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_0_24' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_0_25' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_0_26' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_0_27' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_0_28' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_0_29' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_0_3' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_0_30' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_0_31' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_0_4' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_0_5' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_0_6' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_0_7' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_0_8' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_0_9' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_10_0' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_10_1' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_10_10' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_10_11' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_10_12' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_10_13' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_10_14' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_10_15' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_10_16' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_10_17' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_10_18' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_10_19' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_10_2' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_10_20' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_10_21' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_10_22' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_10_23' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_10_24' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_10_25' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_10_26' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_10_27' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_10_28' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_10_29' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_10_3' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_10_30' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_10_31' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_10_4' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_10_5' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_10_6' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_10_7' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_10_8' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_10_9' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_11_0' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_11_1' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_11_10' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_11_11' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_11_12' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_11_13' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_11_14' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_11_15' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_11_16' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_11_17' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_11_18' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_11_19' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_11_2' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_11_20' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_11_21' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_11_22' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_11_23' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_11_24' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_11_25' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_11_26' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_11_27' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_11_28' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_11_29' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_11_3' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_11_30' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_11_31' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_11_4' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_11_5' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_11_6' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_11_7' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_11_8' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_11_9' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_12_0' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_12_1' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_12_10' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
WARNING: [IP_Flow 19-5463] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type master.
|
|
INFO: [Common 17-14] Message 'IP_Flow 19-5463' appears 100 times and further instances of the messages will be disabled. Use the Tcl command set_msg_config to change the current settings.
|
|
WARNING: [IP_Flow 19-5462] Defaulting to slave bus interface due to conflicts in bus interface inference.
|
|
INFO: [Common 17-14] Message 'IP_Flow 19-5462' appears 100 times and further instances of the messages will be disabled. Use the Tcl command set_msg_config to change the current settings.
|
|
INFO: [IP_Flow 19-5107] Inferred bus interface 'rx_12_11' of definition 'analog.com:interface:fifo_wr:1.0' (from User Repositories).
|
|
INFO: [Common 17-14] Message 'IP_Flow 19-5107' appears 100 times and further instances of the messages will be disabled. Use the Tcl command set_msg_config to change the current settings.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
WARNING: [IP_Flow 19-5464] No port map found for required logical port EN on bus interface abstraction fifo_wr_rtl for interface type slave.
|
|
INFO: [Common 17-14] Message 'IP_Flow 19-5464' appears 100 times and further instances of the messages will be disabled. Use the Tcl command set_msg_config to change the current settings.
|
|
INFO: [IP_Flow 19-5151] The Range '2:0' is present in all ports of the interface 'up_sel_0'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '2:0' is present in all ports of the interface 'up_sel_1'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '2:0' is present in all ports of the interface 'up_sel_10'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '2:0' is present in all ports of the interface 'up_sel_11'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '2:0' is present in all ports of the interface 'up_sel_12'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '2:0' is present in all ports of the interface 'up_sel_13'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '2:0' is present in all ports of the interface 'up_sel_14'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '2:0' is present in all ports of the interface 'up_sel_15'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '2:0' is present in all ports of the interface 'up_sel_2'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '2:0' is present in all ports of the interface 'up_sel_3'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '2:0' is present in all ports of the interface 'up_sel_4'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '2:0' is present in all ports of the interface 'up_sel_5'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '2:0' is present in all ports of the interface 'up_sel_6'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '2:0' is present in all ports of the interface 'up_sel_7'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '2:0' is present in all ports of the interface 'up_sel_8'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '2:0' is present in all ports of the interface 'up_sel_9'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '31:0' is present in all ports of the interface 'rx_0'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '31:0' is present in all ports of the interface 'rx_1'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '31:0' is present in all ports of the interface 'rx_10'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '31:0' is present in all ports of the interface 'rx_11'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '31:0' is present in all ports of the interface 'rx_12'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '31:0' is present in all ports of the interface 'rx_13'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '31:0' is present in all ports of the interface 'rx_14'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '31:0' is present in all ports of the interface 'rx_15'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '31:0' is present in all ports of the interface 'rx_2'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '31:0' is present in all ports of the interface 'rx_3'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '31:0' is present in all ports of the interface 'rx_4'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '31:0' is present in all ports of the interface 'rx_5'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '31:0' is present in all ports of the interface 'rx_6'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '31:0' is present in all ports of the interface 'rx_7'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '31:0' is present in all ports of the interface 'rx_8'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '31:0' is present in all ports of the interface 'rx_9'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '31:0' is present in all ports of the interface 'tx_0'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '31:0' is present in all ports of the interface 'tx_1'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '31:0' is present in all ports of the interface 'tx_10'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '31:0' is present in all ports of the interface 'tx_11'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '31:0' is present in all ports of the interface 'tx_12'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '31:0' is present in all ports of the interface 'tx_13'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '31:0' is present in all ports of the interface 'tx_14'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '31:0' is present in all ports of the interface 'tx_15'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '31:0' is present in all ports of the interface 'tx_2'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '31:0' is present in all ports of the interface 'tx_3'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '31:0' is present in all ports of the interface 'tx_4'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '31:0' is present in all ports of the interface 'tx_5'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '31:0' is present in all ports of the interface 'tx_6'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '31:0' is present in all ports of the interface 'tx_7'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '31:0' is present in all ports of the interface 'tx_8'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '31:0' is present in all ports of the interface 'tx_9'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '4:0' is present in all ports of the interface 'up_0'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '4:0' is present in all ports of the interface 'up_1'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '4:0' is present in all ports of the interface 'up_10'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '4:0' is present in all ports of the interface 'up_11'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '4:0' is present in all ports of the interface 'up_12'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '4:0' is present in all ports of the interface 'up_13'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '4:0' is present in all ports of the interface 'up_14'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '4:0' is present in all ports of the interface 'up_15'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '4:0' is present in all ports of the interface 'up_2'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '4:0' is present in all ports of the interface 'up_3'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '4:0' is present in all ports of the interface 'up_4'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '4:0' is present in all ports of the interface 'up_5'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '4:0' is present in all ports of the interface 'up_6'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '4:0' is present in all ports of the interface 'up_7'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '4:0' is present in all ports of the interface 'up_8'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '4:0' is present in all ports of the interface 'up_9'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '2:0' is present in all ports of the interface 'up_sel_0'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '2:0' is present in all ports of the interface 'up_sel_1'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '2:0' is present in all ports of the interface 'up_sel_10'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [IP_Flow 19-5151] The Range '2:0' is present in all ports of the interface 'up_sel_11'. It is assumed that this is meant to declare an array of interface. If this is not the desired behaviour, switch of this feature by disabling the parameter 'ips.enableInterfaceArrayInference'.
|
|
INFO: [Common 17-14] Message 'IP_Flow 19-5151' appears 100 times and further instances of the messages will be disabled. Use the Tcl command set_msg_config to change the current settings.
|
|
INFO: [IP_Flow 19-4728] Bus Interface 'up_rstn': Added interface parameter 'POLARITY' with value 'ACTIVE_LOW'.
|
|
INFO: [IP_Flow 19-4728] Bus Interface 'up_clk': Added interface parameter 'ASSOCIATED_RESET' with value 'up_rstn'.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_0' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_0_0': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_0' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_0_1': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_0' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_0_10': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_0' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_0_11': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_0' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_0_12': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_0' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_0_13': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_0' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_0_14': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_0' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_0_15': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_0' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_0_16': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_0' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_0_17': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_0' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_0_18': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_0' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_0_19': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_0' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_0_2': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_0' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_0_20': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_0' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_0_21': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_0' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_0_22': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_0' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_0_23': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_0' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_0_24': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_0' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_0_25': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_0' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_0_26': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_0' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_0_27': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_0' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_0_28': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_0' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_0_29': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_0' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_0_3': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_0' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_0_30': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_0' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_0_31': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_0' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_0_4': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_0' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_0_5': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_0' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_0_6': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_0' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_0_7': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_0' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_0_8': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_0' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_0_9': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_10' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_10_0': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_10' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_10_1': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_10' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_10_10': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_10' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_10_11': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_10' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_10_12': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_10' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_10_13': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_10' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_10_14': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_10' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_10_15': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_10' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_10_16': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_10' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_10_17': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_10' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_10_18': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_10' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_10_19': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_10' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_10_2': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_10' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_10_20': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_10' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_10_21': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_10' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_10_22': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_10' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_10_23': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_10' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_10_24': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_10' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_10_25': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_10' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_10_26': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_10' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_10_27': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_10' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_10_28': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_10' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_10_29': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_10' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_10_3': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_10' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_10_30': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_10' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_10_31': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_10' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_10_4': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_10' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_10_5': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_10' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_10_6': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_10' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_10_7': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_10' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_10_8': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_10' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_10_9': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_11' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_11_0': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_11' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_11_1': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_11' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_11_10': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_11' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_11_11': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_11' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_11_12': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_11' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_11_13': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_11' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_11_14': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_11' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_11_15': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_11' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_11_16': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_11' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_11_17': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_11' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_11_18': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_11' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_11_19': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_11' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_11_2': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_11' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_11_20': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_11' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_11_21': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_11' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_11_22': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_11' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_11_23': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_11' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_11_24': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_11' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_11_25': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_11' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_11_26': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_11' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_11_27': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_11' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_11_28': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_11' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_11_29': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_11' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_11_3': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_11' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_11_30': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_11' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_11_31': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_11' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_11_4': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_11' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_11_5': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_11' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_11_6': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_11' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_11_7': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_11' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_11_8': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_11' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_11_9': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_12' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_12_0': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_12' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_12_1': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_12' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_12_10': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_12' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_12_11': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_12' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_12_12': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_12' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_12_13': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_12' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_12_14': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_12' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_12_15': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_12' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_12_16': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_12' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_12_17': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_12' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_12_18': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_12' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_12_19': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_12' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_12_2': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_12' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_12_20': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_12' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_12_21': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_12' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_12_22': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_12' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_12_23': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_12' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_12_24': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_12' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_12_25': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_12' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_12_26': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_12' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_12_27': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_12' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_12_28': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_12' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_12_29': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_12' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_12_3': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_12' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_12_30': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_12' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_12_31': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_12' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_12_4': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_12' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_12_5': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_12' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_12_6': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_12' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_12_7': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_12' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_12_8': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_12' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_12_9': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_13' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_13_0': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_13' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_13_1': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_13' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_13_10': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_13' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_13_11': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_13' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_13_12': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_13' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_13_13': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_13' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_13_14': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_13' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_13_15': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_13' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_13_16': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_13' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_13_17': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_13' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_13_18': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_13' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_13_19': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_13' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_13_2': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_13' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_13_20': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_13' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_13_21': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_13' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_13_22': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_13' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_13_23': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_13' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_13_24': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_13' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_13_25': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_13' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_13_26': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_13' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_13_27': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_13' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_13_28': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_13' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_13_29': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_13' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_13_3': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_13' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_13_30': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_13' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_13_31': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_13' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_13_4': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_13' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_13_5': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_13' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_13_6': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_13' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_13_7': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_13' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_13_8': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_13' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_13_9': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_14' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_14_0': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_14' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_14_1': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_14' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_14_10': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_14' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_14_11': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_14' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_14_12': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_14' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_14_13': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_14' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_14_14': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_14' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_14_15': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_14' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_14_16': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_14' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_14_17': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_14' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_14_18': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_14' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_14_19': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_14' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_14_2': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_14' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_14_20': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_14' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_14_21': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_14' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_14_22': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_14' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_14_23': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_14' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_14_24': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_14' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_14_25': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_14' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_14_26': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_14' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_14_27': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_14' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_14_28': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_14' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_14_29': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_14' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_14_3': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_14' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_14_30': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_14' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_14_31': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_14' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_14_4': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_14' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_14_5': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_14' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_14_6': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_14' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_14_7': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_14' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_14_8': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_14' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_14_9': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_15' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_15_0': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_15' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_15_1': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_15' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_15_10': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_15' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_15_11': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_15' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_15_12': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_15' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_15_13': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_15' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_15_14': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_15' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_15_15': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_15' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_15_16': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_15' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_15_17': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_15' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_15_18': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_15' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_15_19': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_15' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_15_2': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_15' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_15_20': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_15' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_15_21': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_15' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_15_22': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_15' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_15_23': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_15' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_15_24': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_15' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_15_25': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_15' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_15_26': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_15' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_15_27': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_15' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_15_28': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_15' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_15_29': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_15' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_15_3': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_15' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_15_30': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_15' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_15_31': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_15' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_15_4': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_15' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_15_5': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_15' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_15_6': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_15' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_15_7': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_15' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_15_8': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_15' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_15_9': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_1' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_1_0': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_1' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_1_1': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_1' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_1_10': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_1' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_1_11': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_1' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_1_12': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_1' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_1_13': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_1' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_1_14': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_1' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_1_15': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_1' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_1_16': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_1' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_1_17': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_1' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_1_18': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_1' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_1_19': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_1' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_1_2': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_1' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_1_20': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_1' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_1_21': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_1' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_1_22': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_1' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_1_23': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_1' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_1_24': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_1' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_1_25': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_1' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_1_26': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_1' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_1_27': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_1' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_1_28': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_1' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_1_29': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_1' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_1_3': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_1' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_1_30': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_1' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_1_31': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_1' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_1_4': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_1' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_1_5': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_1' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_1_6': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_1' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_1_7': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_1' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_1_8': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_1' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_1_9': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_2' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_2_0': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_2' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_2_1': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_2' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_2_10': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_2' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_2_11': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_2' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_2_12': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_2' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_2_13': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_2' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_2_14': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_2' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_2_15': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_2' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_2_16': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_2' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_2_17': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_2' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_2_18': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_2' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_2_19': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_2' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_2_2': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_2' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_2_20': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_2' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_2_21': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_2' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_2_22': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_2' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_2_23': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_2' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_2_24': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_2' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_2_25': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_2' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_2_26': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_2' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_2_27': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_2' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_2_28': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_2' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_2_29': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_2' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_2_3': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_2' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_2_30': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_2' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_2_31': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_2' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_2_4': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_2' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_2_5': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_2' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_2_6': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_2' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_2_7': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_2' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_2_8': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_2' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_2_9': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_3' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_3_0': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_3' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_3_1': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_3' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_3_10': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_3' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_3_11': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_3' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_3_12': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_3' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_3_13': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_3' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_3_14': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_3' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_3_15': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_3' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_3_16': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_3' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_3_17': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_3' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_3_18': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_3' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_3_19': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_3' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_3_2': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_3' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_3_20': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_3' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_3_21': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_3' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_3_22': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_3' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_3_23': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_3' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_3_24': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_3' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_3_25': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_3' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_3_26': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_3' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_3_27': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_3' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_3_28': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_3' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_3_29': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_3' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_3_3': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_3' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_3_30': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_3' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_3_31': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_3' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_3_4': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_3' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_3_5': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_3' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_3_6': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_3' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_3_7': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_3' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_3_8': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_3' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_3_9': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_4' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_4_0': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_4' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_4_1': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_4' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_4_10': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_4' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_4_11': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_4' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_4_12': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_4' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_4_13': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_4' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_4_14': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_4' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_4_15': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_4' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_4_16': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_4' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_4_17': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_4' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_4_18': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_4' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_4_19': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_4' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_4_2': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_4' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_4_20': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_4' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_4_21': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_4' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_4_22': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_4' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_4_23': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_4' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_4_24': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_4' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_4_25': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_4' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_4_26': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_4' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_4_27': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_4' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_4_28': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_4' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_4_29': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_4' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_4_3': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_4' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_4_30': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_4' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_4_31': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_4' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_4_4': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_4' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_4_5': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_4' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_4_6': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_4' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_4_7': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_4' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_4_8': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_4' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_4_9': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_5' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_5_0': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_5' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_5_1': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_5' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_5_10': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_5' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_5_11': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_5' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_5_12': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_5' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_5_13': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_5' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_5_14': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_5' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_5_15': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_5' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_5_16': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_5' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_5_17': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_5' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_5_18': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_5' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_5_19': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_5' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_5_2': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_5' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_5_20': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_5' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_5_21': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_5' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_5_22': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_5' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_5_23': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_5' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_5_24': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_5' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_5_25': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_5' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_5_26': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_5' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_5_27': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_5' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_5_28': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_5' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_5_29': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_5' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_5_3': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_5' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_5_30': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_5' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_5_31': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_5' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_5_4': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_5' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_5_5': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_5' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_5_6': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_5' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_5_7': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_5' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_5_8': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_5' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_5_9': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_6' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_6_0': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_6' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_6_1': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_6' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_6_10': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_6' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_6_11': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_6' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_6_12': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_6' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_6_13': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_6' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_6_14': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_6' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_6_15': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_6' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_6_16': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_6' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_6_17': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_6' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_6_18': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_6' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_6_19': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_6' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_6_2': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_6' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_6_20': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_6' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_6_21': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_6' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_6_22': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_6' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_6_23': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_6' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_6_24': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_6' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_6_25': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_6' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_6_26': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_6' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_6_27': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_6' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_6_28': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_6' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_6_29': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_6' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_6_3': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_6' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_6_30': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_6' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_6_31': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_6' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_6_4': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_6' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_6_5': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_6' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_6_6': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_6' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_6_7': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_6' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_6_8': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_6' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_6_9': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_7' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_7_0': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_7' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_7_1': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_7' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_7_10': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_7' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_7_11': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_7' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_7_12': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_7' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_7_13': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_7' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_7_14': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_7' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_7_15': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_7' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_7_16': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_7' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_7_17': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_7' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_7_18': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_7' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_7_19': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_7' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_7_2': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_7' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_7_20': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_7' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_7_21': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_7' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_7_22': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_7' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_7_23': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_7' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_7_24': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_7' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_7_25': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_7' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_7_26': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_7' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_7_27': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_7' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_7_28': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_7' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_7_29': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_7' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_7_3': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_7' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_7_30': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_7' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_7_31': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_7' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_7_4': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_7' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_7_5': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_7' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_7_6': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_7' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_7_7': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_7' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_7_8': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_7' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_7_9': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_8' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_8_0': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_8' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_8_1': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_8' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_8_10': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_8' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_8_11': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_8' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_8_12': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_8' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_8_13': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_8' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_8_14': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_8' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_8_15': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_8' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_8_16': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_8' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_8_17': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_8' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_8_18': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_8' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_8_19': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_8' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_8_2': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_8' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_8_20': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_8' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_8_21': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_8' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_8_22': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_8' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_8_23': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_8' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_8_24': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_8' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_8_25': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_8' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_8_26': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_8' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_8_27': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_8' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_8_28': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_8' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_8_29': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_8' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_8_3': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_8' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_8_30': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_8' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_8_31': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_8' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_8_4': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_8' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_8_5': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_8' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_8_6': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_8' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_8_7': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_8' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_8_8': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_8' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_8_9': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_9' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_9_0': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_9' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_9_1': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_9' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_9_10': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_9' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_9_11': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_9' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_9_12': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_9' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_9_13': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_9' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_9_14': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_9' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_9_15': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_9' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_9_16': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_9' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_9_17': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_9' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_9_18': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_9' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_9_19': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_9' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_9_2': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_9' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_9_20': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_9' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_9_21': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_9' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_9_22': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_9' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_9_23': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_9' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_9_24': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_9' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_9_25': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_9' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_9_26': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_9' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_9_27': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_9' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_9_28': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_9' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_9_29': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_9' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_9_3': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_9' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_9_30': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_9' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_9_31': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_9' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_9_4': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_9' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_9_5': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_9' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_9_6': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_9' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_9_7': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_9' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_9_8': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3480] slave: Portmap direction mismatched between component port 'rx_data_9' and definition port 'DATA'.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'rx_9_9': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_0_0': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_0_1': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_0_10': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_0_11': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_0_12': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_0_13': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_0_14': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_0_15': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_0_16': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_0_17': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_0_18': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_0_19': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_0_2': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_0_20': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_0_21': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_0_22': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_0_23': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_0_24': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_0_25': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_0_26': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_0_27': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_0_28': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_0_29': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_0_3': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_0_30': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_0_31': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_0_4': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_0_5': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_0_6': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_0_7': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_0_8': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_0_9': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_10_0': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_10_1': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_10_10': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_10_11': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_10_12': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_10_13': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_10_14': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_10_15': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_10_16': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_10_17': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_10_18': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_10_19': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_10_2': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_10_20': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_10_21': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_10_22': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_10_23': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_10_24': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_10_25': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_10_26': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_10_27': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_10_28': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_10_29': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_10_3': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_10_30': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_10_31': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_10_4': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_10_5': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_10_6': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_10_7': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_10_8': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_10_9': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_11_0': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_11_1': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_11_10': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_11_11': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_11_12': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_11_13': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_11_14': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_11_15': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_11_16': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_11_17': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_11_18': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_11_19': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_11_2': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_11_20': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_11_21': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_11_22': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_11_23': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_11_24': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_11_25': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_11_26': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_11_27': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_11_28': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_11_29': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_11_3': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_11_30': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_11_31': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_11_4': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_11_5': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_11_6': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_11_7': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_11_8': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_11_9': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_12_0': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_12_1': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_12_10': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_12_11': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_12_12': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_12_13': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_12_14': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_12_15': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_12_16': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_12_17': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_12_18': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_12_19': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_12_2': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_12_20': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_12_21': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_12_22': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_12_23': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_12_24': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_12_25': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_12_26': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_12_27': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_12_28': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_12_29': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_12_3': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_12_30': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_12_31': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_12_4': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_12_5': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_12_6': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_12_7': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_12_8': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_12_9': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_13_0': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_13_1': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_13_10': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_13_11': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_13_12': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_13_13': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_13_14': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_13_15': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_13_16': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_13_17': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_13_18': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_13_19': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_13_2': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_13_20': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_13_21': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_13_22': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_13_23': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_13_24': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_13_25': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_13_26': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_13_27': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_13_28': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_13_29': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_13_3': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_13_30': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_13_31': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_13_4': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_13_5': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_13_6': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_13_7': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_13_8': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_13_9': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_14_0': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_14_1': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_14_10': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_14_11': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_14_12': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_14_13': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_14_14': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_14_15': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_14_16': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_14_17': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_14_18': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_14_19': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_14_2': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_14_20': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_14_21': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_14_22': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_14_23': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_14_24': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_14_25': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_14_26': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_14_27': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_14_28': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_14_29': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_14_3': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_14_30': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_14_31': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_14_4': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_14_5': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_14_6': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_14_7': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_14_8': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_14_9': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_15_0': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_15_1': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_15_10': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_15_11': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_15_12': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_15_13': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_15_14': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_15_15': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_15_16': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_15_17': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_15_18': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_15_19': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_15_2': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_15_20': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_15_21': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_15_22': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_15_23': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_15_24': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_15_25': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_15_26': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_15_27': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_15_28': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_15_29': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_15_3': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_15_30': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_15_31': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_15_4': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_15_5': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_15_6': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_15_7': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_15_8': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_15_9': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_1_0': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_1_1': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_1_10': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_1_11': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_1_12': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_1_13': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_1_14': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_1_15': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_1_16': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_1_17': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_1_18': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_1_19': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_1_2': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_1_20': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_1_21': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_1_22': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_1_23': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_1_24': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_1_25': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_1_26': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_1_27': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_1_28': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_1_29': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_1_3': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_1_30': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_1_31': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_1_4': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_1_5': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_1_6': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_1_7': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_1_8': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_1_9': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_2_0': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_2_1': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_2_10': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_2_11': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_2_12': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_2_13': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_2_14': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_2_15': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_2_16': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_2_17': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_2_18': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_2_19': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_2_2': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_2_20': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_2_21': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_2_22': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_2_23': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_2_24': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_2_25': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_2_26': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_2_27': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_2_28': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_2_29': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_2_3': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_2_30': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_2_31': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_2_4': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_2_5': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_2_6': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_2_7': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_2_8': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_2_9': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_3_0': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_3_1': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_3_10': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_3_11': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_3_12': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_3_13': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_3_14': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_3_15': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_3_16': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_3_17': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_3_18': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_3_19': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_3_2': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_3_20': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_3_21': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_3_22': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_3_23': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_3_24': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_3_25': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_3_26': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_3_27': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_3_28': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_3_29': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_3_3': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_3_30': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_3_31': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_3_4': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_3_5': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_3_6': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_3_7': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_3_8': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_3_9': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_4_0': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_4_1': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_4_10': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_4_11': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_4_12': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_4_13': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_4_14': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_4_15': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_4_16': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_4_17': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_4_18': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_4_19': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_4_2': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_4_20': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_4_21': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_4_22': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_4_23': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_4_24': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_4_25': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_4_26': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_4_27': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_4_28': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_4_29': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_4_3': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_4_30': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_4_31': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_4_4': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_4_5': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_4_6': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_4_7': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_4_8': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_4_9': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_5_0': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_5_1': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_5_10': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_5_11': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_5_12': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_5_13': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_5_14': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_5_15': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_5_16': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_5_17': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_5_18': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_5_19': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_5_2': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_5_20': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_5_21': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_5_22': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_5_23': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_5_24': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_5_25': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_5_26': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_5_27': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_5_28': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_5_29': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_5_3': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_5_30': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_5_31': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_5_4': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_5_5': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_5_6': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_5_7': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_5_8': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_5_9': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_6_0': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_6_1': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_6_10': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_6_11': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_6_12': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_6_13': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_6_14': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_6_15': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_6_16': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_6_17': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_6_18': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_6_19': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_6_2': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_6_20': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_6_21': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_6_22': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_6_23': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_6_24': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_6_25': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_6_26': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_6_27': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_6_28': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_6_29': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_6_3': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_6_30': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_6_31': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_6_4': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_6_5': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_6_6': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_6_7': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_6_8': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_6_9': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_7_0': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_7_1': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_7_10': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_7_11': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_7_12': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_7_13': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_7_14': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_7_15': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_7_16': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_7_17': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_7_18': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_7_19': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_7_2': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_7_20': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_7_21': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_7_22': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_7_23': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_7_24': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_7_25': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_7_26': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_7_27': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_7_28': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_7_29': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_7_3': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_7_30': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_7_31': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_7_4': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_7_5': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_7_6': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_7_7': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_7_8': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_7_9': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_8_0': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_8_1': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_8_10': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_8_11': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_8_12': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_8_13': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_8_14': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_8_15': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_8_16': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_8_17': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_8_18': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_8_19': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_8_2': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_8_20': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_8_21': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_8_22': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_8_23': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_8_24': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_8_25': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_8_26': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_8_27': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_8_28': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_8_29': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_8_3': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_8_30': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_8_31': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_8_4': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_8_5': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_8_6': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_8_7': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_8_8': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_8_9': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_9_0': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_9_1': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_9_10': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_9_11': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_9_12': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_9_13': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_9_14': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_9_15': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_9_16': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_9_17': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_9_18': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_9_19': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_9_2': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_9_20': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_9_21': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_9_22': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_9_23': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_9_24': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_9_25': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_9_26': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_9_27': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_9_28': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_9_29': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_9_3': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_9_30': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_9_31': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_9_4': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_9_5': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_9_6': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_9_7': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_9_8': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'tx_9_9': A port map to the required logical port "EN" of the bus abstraction "analog.com:interface:fifo_wr_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_0': A port map to the required logical port "qpll_ref_clk" of the bus abstraction "analog.com:interface:if_gt_qpll_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_12': A port map to the required logical port "qpll_ref_clk" of the bus abstraction "analog.com:interface:if_gt_qpll_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_4': A port map to the required logical port "qpll_ref_clk" of the bus abstraction "analog.com:interface:if_gt_qpll_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_8': A port map to the required logical port "qpll_ref_clk" of the bus abstraction "analog.com:interface:if_gt_qpll_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_cm_0_0': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_cm_0_0': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_cm_0_1': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_cm_0_1': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_cm_0_10': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_cm_0_10': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_cm_0_11': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_cm_0_11': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_cm_0_2': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_cm_0_2': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_cm_0_3': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_cm_0_3': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_cm_0_4': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_cm_0_4': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_cm_0_5': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_cm_0_5': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_cm_0_6': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_cm_0_6': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_cm_0_7': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_cm_0_7': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_cm_0_8': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_cm_0_8': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_cm_0_9': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_cm_0_9': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_cm_12_0': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_cm_12_0': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_cm_12_1': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_cm_12_1': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_cm_12_10': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_cm_12_10': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_cm_12_11': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_cm_12_11': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_cm_12_2': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_cm_12_2': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_cm_12_3': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_cm_12_3': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_cm_12_4': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_cm_12_4': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_cm_12_5': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_cm_12_5': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_cm_12_6': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_cm_12_6': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_cm_12_7': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_cm_12_7': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_cm_12_8': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_cm_12_8': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_cm_12_9': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_cm_12_9': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_cm_4_0': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_cm_4_0': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_cm_4_1': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_cm_4_1': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_cm_4_10': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_cm_4_10': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_cm_4_11': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_cm_4_11': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_cm_4_2': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_cm_4_2': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_cm_4_3': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_cm_4_3': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_cm_4_4': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_cm_4_4': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_cm_4_5': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_cm_4_5': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_cm_4_6': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_cm_4_6': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_cm_4_7': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_cm_4_7': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_cm_4_8': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_cm_4_8': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_cm_4_9': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_cm_4_9': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_cm_8_0': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_cm_8_0': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_cm_8_1': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_cm_8_1': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_cm_8_10': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_cm_8_10': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_cm_8_11': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_cm_8_11': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_cm_8_2': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_cm_8_2': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_cm_8_3': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_cm_8_3': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_cm_8_4': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_cm_8_4': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_cm_8_5': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_cm_8_5': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_cm_8_6': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_cm_8_6': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_cm_8_7': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_cm_8_7': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_cm_8_8': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_cm_8_8': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_cm_8_9': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_cm_8_9': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_0_0': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_0_0': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_0_1': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_0_1': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_0_10': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_0_10': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_0_11': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_0_11': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_0_2': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_0_2': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_0_3': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_0_3': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_0_4': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_0_4': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_0_5': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_0_5': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_0_6': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_0_6': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_0_7': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_0_7': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_0_8': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_0_8': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_0_9': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_0_9': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_10_0': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_10_0': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_10_1': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_10_1': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_10_10': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_10_10': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_10_11': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_10_11': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_10_2': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_10_2': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_10_3': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_10_3': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_10_4': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_10_4': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_10_5': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_10_5': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_10_6': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_10_6': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_10_7': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_10_7': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_10_8': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_10_8': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_10_9': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_10_9': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_11_0': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_11_0': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_11_1': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_11_1': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_11_10': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_11_10': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_11_11': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_11_11': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_11_2': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_11_2': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_11_3': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_11_3': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_11_4': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_11_4': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_11_5': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_11_5': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_11_6': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_11_6': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_11_7': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_11_7': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_11_8': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_11_8': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_11_9': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_11_9': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_12_0': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_12_0': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_12_1': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_12_1': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_12_10': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_12_10': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_12_11': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_12_11': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_12_2': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_12_2': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_12_3': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_12_3': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_12_4': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_12_4': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_12_5': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_12_5': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_12_6': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_12_6': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_12_7': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_12_7': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_12_8': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_12_8': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_12_9': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_12_9': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_13_0': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_13_0': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_13_1': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_13_1': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_13_10': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_13_10': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_13_11': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_13_11': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_13_2': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_13_2': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_13_3': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_13_3': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_13_4': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_13_4': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_13_5': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_13_5': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_13_6': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_13_6': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_13_7': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_13_7': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_13_8': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_13_8': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_13_9': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_13_9': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_14_0': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_14_0': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_14_1': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_14_1': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_14_10': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_14_10': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_14_11': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_14_11': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_14_2': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_14_2': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_14_3': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_14_3': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_14_4': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_14_4': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_14_5': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_14_5': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_14_6': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_14_6': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_14_7': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_14_7': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_14_8': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_14_8': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_14_9': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_14_9': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_15_0': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_15_0': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_15_1': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_15_1': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_15_10': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_15_10': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_15_11': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_15_11': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_15_2': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_15_2': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_15_3': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_15_3': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_15_4': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_15_4': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_15_5': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_15_5': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_15_6': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_15_6': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_15_7': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_15_7': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_15_8': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_15_8': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_15_9': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_15_9': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_1_0': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_1_0': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_1_1': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_1_1': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_1_10': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_1_10': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_1_11': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_1_11': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_1_2': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_1_2': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_1_3': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_1_3': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_1_4': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_1_4': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_1_5': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_1_5': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_1_6': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_1_6': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_1_7': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_1_7': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_1_8': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_1_8': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_1_9': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_1_9': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_2_0': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_2_0': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_2_1': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_2_1': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_2_10': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_2_10': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_2_11': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_2_11': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_2_2': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_2_2': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_2_3': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_2_3': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_2_4': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_2_4': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_2_5': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_2_5': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_2_6': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_2_6': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_2_7': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_2_7': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_2_8': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_2_8': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_2_9': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_2_9': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_3_0': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_3_0': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_3_1': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_3_1': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_3_10': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_3_10': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_3_11': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_3_11': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_3_2': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_3_2': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_3_3': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_3_3': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_3_4': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_3_4': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_3_5': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_3_5': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_3_6': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_3_6': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_3_7': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_3_7': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_3_8': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_3_8': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_3_9': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_3_9': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_4_0': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_4_0': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_4_1': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_4_1': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_4_10': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_4_10': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_4_11': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_4_11': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_4_2': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_4_2': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_4_3': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_4_3': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_4_4': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_4_4': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_4_5': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_4_5': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_4_6': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_4_6': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_4_7': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_4_7': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_4_8': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_4_8': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_4_9': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_4_9': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_5_0': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_5_0': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_5_1': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_5_1': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_5_10': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_5_10': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_5_11': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_5_11': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_5_2': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_5_2': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_5_3': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_5_3': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_5_4': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_5_4': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_5_5': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_5_5': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_5_6': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_5_6': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_5_7': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_5_7': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_5_8': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_5_8': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_5_9': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_5_9': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_6_0': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_6_0': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_6_1': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_6_1': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_6_10': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_6_10': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_6_11': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_6_11': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_6_2': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_6_2': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_6_3': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_6_3': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_6_4': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_6_4': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_6_5': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_6_5': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_6_6': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_6_6': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_6_7': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_6_7': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_6_8': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_6_8': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_6_9': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_6_9': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_7_0': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_7_0': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_7_1': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_7_1': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_7_10': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_7_10': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_7_11': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_7_11': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_7_2': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_7_2': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_7_3': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_7_3': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_7_4': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_7_4': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_7_5': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_7_5': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_7_6': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_7_6': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_7_7': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_7_7': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_7_8': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_7_8': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_7_9': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_7_9': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_8_0': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_8_0': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_8_1': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_8_1': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_8_10': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_8_10': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_8_11': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_8_11': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_8_2': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_8_2': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_8_3': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_8_3': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_8_4': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_8_4': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_8_5': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_8_5': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_8_6': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_8_6': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_8_7': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_8_7': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_8_8': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_8_8': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_8_9': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_8_9': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_9_0': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_9_0': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_9_1': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_9_1': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_9_10': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_9_10': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_9_11': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_9_11': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_9_2': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_9_2': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_9_3': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_9_3': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_9_4': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_9_4': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_9_5': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_9_5': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_9_6': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_9_6': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_9_7': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_9_7': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_9_8': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_9_8': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_9_9': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_es_9_9': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_0_0': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_0_0': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_0_1': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_0_1': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_0_10': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_0_10': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_0_11': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_0_11': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_0_2': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_0_2': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_0_3': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_0_3': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_0_4': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_0_4': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_0_5': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_0_5': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_0_6': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_0_6': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_0_7': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_0_7': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_0_8': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_0_8': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_0_9': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_0_9': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_10_0': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_10_0': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_10_1': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_10_1': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_10_10': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_10_10': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_10_11': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_10_11': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_10_2': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_10_2': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_10_3': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_10_3': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_10_4': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_10_4': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_10_5': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_10_5': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_10_6': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_10_6': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_10_7': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_10_7': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_10_8': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_10_8': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_10_9': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_10_9': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_11_0': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_11_0': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_11_1': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_11_1': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_11_10': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_11_10': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_11_11': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_11_11': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_11_2': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_11_2': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_11_3': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_11_3': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_11_4': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_11_4': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_11_5': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_11_5': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_11_6': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_11_6': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_11_7': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_11_7': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_11_8': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_11_8': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_11_9': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_11_9': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_12_0': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_12_0': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_12_1': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_12_1': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_12_10': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_12_10': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_12_11': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_12_11': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_12_2': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_12_2': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_12_3': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_12_3': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_12_4': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_12_4': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_12_5': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_12_5': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_12_6': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_12_6': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_12_7': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_12_7': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_12_8': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_12_8': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_12_9': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_12_9': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_13_0': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_13_0': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_13_1': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_13_1': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_13_10': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_13_10': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_13_11': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_13_11': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_13_2': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_13_2': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_13_3': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_13_3': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_13_4': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_13_4': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_13_5': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_13_5': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_13_6': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_13_6': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_13_7': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_13_7': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_13_8': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_13_8': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_13_9': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_13_9': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_14_0': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_14_0': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_14_1': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_14_1': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_14_10': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_14_10': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_14_11': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_14_11': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_14_2': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_14_2': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_14_3': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_14_3': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_14_4': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_14_4': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_14_5': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_14_5': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_14_6': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_14_6': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_14_7': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_14_7': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_14_8': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_14_8': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_14_9': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_14_9': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_15_0': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_15_0': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_15_1': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_15_1': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_15_10': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_15_10': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_15_11': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_15_11': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_15_2': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_15_2': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_15_3': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_15_3': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_15_4': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_15_4': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_15_5': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_15_5': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_15_6': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_15_6': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_15_7': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_15_7': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_15_8': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_15_8': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_15_9': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_15_9': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_1_0': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_1_0': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_1_1': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_1_1': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_1_10': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_1_10': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_1_11': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_1_11': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_1_2': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_1_2': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_1_3': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_1_3': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_1_4': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_1_4': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_1_5': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_1_5': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_1_6': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_1_6': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_1_7': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_1_7': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_1_8': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_1_8': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_1_9': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_1_9': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_2_0': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_2_0': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_2_1': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_2_1': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_2_10': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_2_10': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_2_11': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_2_11': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_2_2': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_2_2': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_2_3': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_2_3': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_2_4': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_2_4': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_2_5': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_2_5': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_2_6': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_2_6': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_2_7': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_2_7': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_2_8': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_2_8': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_2_9': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_2_9': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_3_0': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_3_0': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_3_1': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_3_1': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_3_10': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_3_10': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_3_11': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_3_11': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_3_2': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_3_2': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_3_3': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_3_3': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_3_4': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_3_4': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_3_5': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_3_5': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_3_6': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_3_6': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_3_7': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_3_7': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_3_8': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_3_8': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_3_9': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_3_9': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_4_0': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_4_0': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_4_1': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_4_1': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_4_10': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_4_10': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_4_11': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_4_11': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_4_2': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_4_2': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_4_3': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_4_3': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_4_4': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_4_4': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_4_5': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_4_5': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_4_6': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_4_6': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_4_7': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_4_7': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_4_8': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_4_8': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_4_9': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_4_9': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_5_0': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_5_0': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_5_1': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_5_1': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_5_10': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_5_10': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_5_11': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_5_11': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_5_2': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_5_2': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_5_3': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_5_3': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_5_4': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_5_4': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_5_5': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_5_5': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_5_6': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_5_6': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_5_7': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_5_7': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_5_8': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_5_8': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_5_9': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_5_9': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_6_0': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_6_0': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_6_1': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_6_1': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_6_10': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_6_10': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_6_11': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_6_11': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_6_2': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_6_2': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_6_3': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_6_3': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_6_4': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_6_4': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_6_5': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_6_5': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_6_6': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_6_6': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_6_7': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_6_7': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_6_8': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_6_8': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_6_9': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_6_9': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_7_0': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_7_0': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_7_1': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_7_1': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_7_10': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_7_10': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_7_11': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_7_11': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_7_2': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_7_2': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_7_3': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_7_3': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_7_4': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_7_4': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_7_5': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_7_5': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_7_6': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_7_6': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_7_7': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_7_7': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_7_8': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_7_8': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_7_9': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_7_9': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_8_0': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_8_0': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_8_1': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_8_1': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_8_10': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_8_10': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_8_11': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_8_11': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_8_2': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_8_2': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_8_3': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_8_3': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_8_4': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_8_4': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_8_5': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_8_5': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_8_6': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_8_6': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_8_7': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_8_7': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_8_8': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_8_8': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_8_9': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_8_9': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_9_0': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_9_0': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_9_1': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_9_1': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_9_10': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_9_10': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_9_11': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_9_11': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_9_2': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_9_2': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_9_3': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_9_3': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_9_4': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_9_4': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_9_5': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_9_5': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_9_6': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_9_6': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_9_7': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_9_7': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_9_8': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_9_8': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_9_9': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_rx_9_9': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_0_0': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_0_0': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_0_1': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_0_1': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_0_10': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_0_10': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_0_11': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_0_11': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_0_2': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_0_2': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_0_3': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_0_3': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_0_4': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_0_4': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_0_5': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_0_5': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_0_6': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_0_6': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_0_7': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_0_7': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_0_8': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_0_8': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_0_9': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_0_9': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_10_0': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_10_0': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_10_1': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_10_1': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_10_10': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_10_10': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_10_11': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_10_11': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_10_2': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_10_2': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_10_3': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_10_3': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_10_4': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_10_4': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_10_5': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_10_5': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_10_6': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_10_6': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_10_7': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_10_7': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_10_8': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_10_8': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_10_9': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_10_9': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_11_0': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_11_0': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_11_1': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_11_1': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_11_10': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_11_10': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_11_11': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_11_11': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_11_2': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_11_2': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_11_3': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_11_3': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_11_4': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_11_4': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_11_5': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_11_5': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_11_6': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_11_6': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_11_7': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_11_7': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_11_8': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_11_8': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_11_9': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_11_9': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_12_0': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_12_0': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_12_1': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_12_1': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_12_10': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_12_10': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_12_11': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_12_11': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_12_2': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_12_2': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_12_3': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_12_3': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_12_4': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_12_4': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_12_5': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_12_5': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_12_6': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_12_6': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_12_7': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_12_7': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_12_8': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_12_8': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_12_9': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_12_9': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_13_0': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_13_0': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_13_1': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_13_1': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_13_10': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_13_10': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_13_11': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_13_11': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_13_2': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_13_2': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_13_3': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_13_3': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_13_4': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_13_4': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_13_5': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_13_5': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_13_6': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_13_6': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_13_7': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_13_7': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_13_8': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_13_8': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_13_9': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_13_9': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_14_0': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_14_0': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_14_1': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_14_1': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_14_10': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_14_10': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_14_11': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_14_11': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_14_2': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_14_2': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_14_3': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_14_3': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_14_4': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_14_4': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_14_5': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_14_5': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_14_6': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_14_6': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_14_7': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_14_7': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_14_8': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_14_8': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_14_9': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_14_9': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_15_0': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_15_0': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_15_1': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_15_1': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_15_10': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_15_10': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_15_11': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_15_11': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_15_2': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_15_2': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_15_3': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_15_3': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_15_4': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_15_4': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_15_5': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_15_5': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_15_6': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_15_6': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_15_7': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_15_7': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_15_8': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_15_8': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_15_9': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_15_9': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_1_0': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_1_0': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_1_1': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_1_1': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_1_10': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_1_10': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_1_11': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_1_11': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_1_2': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_1_2': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_1_3': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_1_3': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_1_4': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_1_4': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_1_5': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_1_5': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_1_6': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_1_6': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_1_7': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_1_7': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_1_8': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_1_8': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_1_9': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_1_9': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_2_0': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_2_0': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_2_1': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_2_1': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_2_10': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_2_10': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_2_11': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_2_11': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_2_2': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_2_2': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_2_3': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_2_3': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_2_4': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_2_4': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_2_5': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_2_5': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_2_6': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_2_6': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_2_7': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_2_7': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_2_8': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_2_8': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_2_9': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_2_9': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_3_0': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_3_0': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_3_1': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_3_1': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_3_10': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_3_10': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_3_11': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_3_11': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_3_2': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_3_2': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_3_3': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_3_3': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_3_4': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_3_4': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_3_5': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_3_5': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_3_6': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_3_6': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_3_7': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_3_7': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_3_8': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_3_8': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_3_9': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_3_9': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_4_0': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_4_0': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_4_1': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_4_1': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_4_10': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_4_10': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_4_11': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_4_11': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_4_2': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_4_2': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_4_3': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_4_3': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_4_4': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_4_4': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_4_5': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_4_5': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_4_6': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_4_6': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_4_7': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_4_7': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_4_8': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_4_8': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_4_9': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_4_9': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_5_0': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_5_0': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_5_1': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_5_1': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_5_10': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_5_10': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_5_11': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_5_11': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_5_2': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_5_2': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_5_3': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_5_3': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_5_4': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_5_4': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_5_5': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_5_5': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_5_6': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_5_6': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_5_7': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_5_7': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_5_8': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_5_8': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_5_9': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_5_9': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_6_0': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_6_0': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_6_1': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_6_1': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_6_10': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_6_10': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_6_11': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_6_11': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_6_2': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_6_2': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_6_3': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_6_3': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_6_4': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_6_4': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_6_5': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_6_5': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_6_6': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_6_6': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_6_7': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_6_7': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
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WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_6_8': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_6_8': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_6_9': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_6_9': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_7_0': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_7_0': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_7_1': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_7_1': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_7_10': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_7_10': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_7_11': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_7_11': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_7_2': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_7_2': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_7_3': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_7_3': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_7_4': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_7_4': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_7_5': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_7_5': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_7_6': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_7_6': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_7_7': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_7_7': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_7_8': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_7_8': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_7_9': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_7_9': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_8_0': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_8_0': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_8_1': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_8_1': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_8_10': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_8_10': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_8_11': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_8_11': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_8_2': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_8_2': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_8_3': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_8_3': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_8_4': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_8_4': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_8_5': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_8_5': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_8_6': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_8_6': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_8_7': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_8_7': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_8_8': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_8_8': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_8_9': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_8_9': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_9_0': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_9_0': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_9_1': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_9_1': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_9_10': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_9_10': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_9_11': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_9_11': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_9_2': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_9_2': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_9_3': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_9_3': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_9_4': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_9_4': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_9_5': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_9_5': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_9_6': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_9_6': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_9_7': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_9_7': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_9_8': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_9_8': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_9_9': A port map to the required logical port "rd" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-1965] Bus Interface 'up_tx_9_9': A port map to the required logical port "data" of the bus abstraction "analog.com:interface:jesd204_tx_ilas_config_rtl:1.0" is missing.
|
|
WARNING: [IP_Flow 19-3157] Bus Interface 'up_rstn': Bus parameter POLARITY is ACTIVE_LOW but port 'up_rstn' is not *resetn - please double check the POLARITY setting.
|
|
WARNING: [IP_Flow 19-3153] Bus Interface 'up_clk': ASSOCIATED_BUSIF bus parameter is missing.
|
|
WARNING: [IP_Flow 19-991] Unrecognized or unsupported file '../../scripts/adi_xilinx_device_info_enc.tcl' found in file group 'Synthesis'.
|
|
Resolution: Remove the file from the specified file group.
|
|
WARNING: [IP_Flow 19-991] Unrecognized or unsupported file 'bd/bd.tcl' found in file group 'Synthesis'.
|
|
Resolution: Remove the file from the specified file group.
|
|
WARNING: [IP_Flow 19-991] Unrecognized or unsupported file '../../scripts/adi_xilinx_device_info_enc.tcl' found in file group 'Simulation'.
|
|
Resolution: Remove the file from the specified file group.
|
|
WARNING: [IP_Flow 19-991] Unrecognized or unsupported file 'bd/bd.tcl' found in file group 'Simulation'.
|
|
Resolution: Remove the file from the specified file group.
|
|
INFO: [IP_Flow 19-2181] Payment Required is not set for this core.
|
|
INFO: [IP_Flow 19-2187] The Product Guide file is missing.
|
|
INFO: [IP_Flow 19-4623] Unrecognized family azynquplus. Please verify spelling and reissue command to set the supported files.
|
|
INFO: [IP_Flow 19-4623] Unrecognized family azynquplus. Please verify spelling and reissue command to set the supported files.
|
|
INFO: [IP_Flow 19-4623] Unrecognized family qkintexu. Please verify spelling and reissue command to set the supported files.
|
|
INFO: [IP_Flow 19-4623] Unrecognized family qkintexu. Please verify spelling and reissue command to set the supported files.
|
|
INFO: [IP_Flow 19-4623] Unrecognized family qkintexuplus. Please verify spelling and reissue command to set the supported files.
|
|
INFO: [IP_Flow 19-4623] Unrecognized family qkintexuplus. Please verify spelling and reissue command to set the supported files.
|
|
INFO: [IP_Flow 19-4623] Unrecognized family qrkintexu. Please verify spelling and reissue command to set the supported files.
|
|
INFO: [IP_Flow 19-4623] Unrecognized family qrkintexu. Please verify spelling and reissue command to set the supported files.
|
|
INFO: [IP_Flow 19-4623] Unrecognized family qvirtexuplus. Please verify spelling and reissue command to set the supported files.
|
|
INFO: [IP_Flow 19-4623] Unrecognized family qvirtexuplus. Please verify spelling and reissue command to set the supported files.
|
|
INFO: [IP_Flow 19-4623] Unrecognized family qzynquplus. Please verify spelling and reissue command to set the supported files.
|
|
INFO: [IP_Flow 19-4623] Unrecognized family qzynquplus. Please verify spelling and reissue command to set the supported files.
|
|
INFO: [IP_Flow 19-4623] Unrecognized family qzynquplusRFSOC. Please verify spelling and reissue command to set the supported files.
|
|
INFO: [IP_Flow 19-4623] Unrecognized family qzynquplusRFSOC. Please verify spelling and reissue command to set the supported files.
|
|
INFO: [IP_Flow 19-4623] Unrecognized family zynquplusRFSOC. Please verify spelling and reissue command to set the supported files.
|
|
INFO: [IP_Flow 19-4623] Unrecognized family zynquplusRFSOC. Please verify spelling and reissue command to set the supported files.
|
|
# adi_ip_bd util_adxcvr "bd/bd.tcl"
|
|
# ipx::remove_all_bus_interface [ipx::current_core]
|
|
# ipx::infer_bus_interface up_clk xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface cpll_ref_clk_0 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface cpll_ref_clk_1 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface cpll_ref_clk_2 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface cpll_ref_clk_3 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface cpll_ref_clk_4 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface cpll_ref_clk_5 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface cpll_ref_clk_6 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface cpll_ref_clk_7 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface cpll_ref_clk_8 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface cpll_ref_clk_9 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface cpll_ref_clk_10 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface cpll_ref_clk_11 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface cpll_ref_clk_12 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface cpll_ref_clk_13 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface cpll_ref_clk_14 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface cpll_ref_clk_15 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface qpll_ref_clk_0 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface qpll_ref_clk_4 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface qpll_ref_clk_8 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface qpll_ref_clk_12 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface rx_out_clk_0 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface rx_out_clk_1 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface rx_out_clk_2 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface rx_out_clk_3 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface rx_out_clk_4 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface rx_out_clk_5 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface rx_out_clk_6 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface rx_out_clk_7 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface rx_out_clk_8 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface rx_out_clk_9 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface rx_out_clk_10 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface rx_out_clk_11 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface rx_out_clk_12 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface rx_out_clk_13 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface rx_out_clk_14 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface rx_out_clk_15 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface tx_out_clk_0 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface tx_out_clk_1 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface tx_out_clk_2 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface tx_out_clk_3 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface tx_out_clk_4 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface tx_out_clk_5 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface tx_out_clk_6 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface tx_out_clk_7 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface tx_out_clk_8 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface tx_out_clk_9 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface tx_out_clk_10 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface tx_out_clk_11 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface tx_out_clk_12 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface tx_out_clk_13 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface tx_out_clk_14 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface tx_out_clk_15 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface rx_clk_0 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface rx_clk_1 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface rx_clk_2 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface rx_clk_3 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface rx_clk_4 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface rx_clk_5 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface rx_clk_6 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface rx_clk_7 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface rx_clk_8 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface rx_clk_9 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface rx_clk_10 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface rx_clk_11 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface rx_clk_12 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface rx_clk_13 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface rx_clk_14 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface rx_clk_15 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface tx_clk_0 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface tx_clk_1 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface tx_clk_2 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface tx_clk_3 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface tx_clk_4 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface tx_clk_5 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface tx_clk_6 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface tx_clk_7 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface tx_clk_8 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface tx_clk_9 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface tx_clk_10 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface tx_clk_11 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface tx_clk_12 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface tx_clk_13 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface tx_clk_14 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface tx_clk_15 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface up_rstn xilinx.com:signal:reset_rtl:1.0 [ipx::current_core]
|
|
INFO: [IP_Flow 19-4728] Bus Interface 'up_rstn': Added interface parameter 'POLARITY' with value 'ACTIVE_LOW'.
|
|
INFO: [IP_Flow 19-4728] Bus Interface 'up_clk': Added interface parameter 'ASSOCIATED_RESET' with value 'up_rstn'.
|
|
# ipx::infer_bus_interface up_rx_rst_0 xilinx.com:signal:reset_rtl:1.0 [ipx::current_core]
|
|
INFO: [IP_Flow 19-4728] Bus Interface 'cpll_ref_clk_0': Added interface parameter 'ASSOCIATED_RESET' with value 'up_rx_rst_0'.
|
|
# ipx::infer_bus_interface up_rx_rst_1 xilinx.com:signal:reset_rtl:1.0 [ipx::current_core]
|
|
INFO: [IP_Flow 19-4728] Bus Interface 'cpll_ref_clk_1': Added interface parameter 'ASSOCIATED_RESET' with value 'up_rx_rst_1'.
|
|
# ipx::infer_bus_interface up_rx_rst_2 xilinx.com:signal:reset_rtl:1.0 [ipx::current_core]
|
|
INFO: [IP_Flow 19-4728] Bus Interface 'cpll_ref_clk_2': Added interface parameter 'ASSOCIATED_RESET' with value 'up_rx_rst_2'.
|
|
# ipx::infer_bus_interface up_rx_rst_3 xilinx.com:signal:reset_rtl:1.0 [ipx::current_core]
|
|
INFO: [IP_Flow 19-4728] Bus Interface 'cpll_ref_clk_3': Added interface parameter 'ASSOCIATED_RESET' with value 'up_rx_rst_3'.
|
|
# ipx::infer_bus_interface up_rx_rst_4 xilinx.com:signal:reset_rtl:1.0 [ipx::current_core]
|
|
INFO: [IP_Flow 19-4728] Bus Interface 'cpll_ref_clk_4': Added interface parameter 'ASSOCIATED_RESET' with value 'up_rx_rst_4'.
|
|
# ipx::infer_bus_interface up_rx_rst_5 xilinx.com:signal:reset_rtl:1.0 [ipx::current_core]
|
|
INFO: [IP_Flow 19-4728] Bus Interface 'cpll_ref_clk_5': Added interface parameter 'ASSOCIATED_RESET' with value 'up_rx_rst_5'.
|
|
# ipx::infer_bus_interface up_rx_rst_6 xilinx.com:signal:reset_rtl:1.0 [ipx::current_core]
|
|
INFO: [IP_Flow 19-4728] Bus Interface 'cpll_ref_clk_6': Added interface parameter 'ASSOCIATED_RESET' with value 'up_rx_rst_6'.
|
|
# ipx::infer_bus_interface up_rx_rst_7 xilinx.com:signal:reset_rtl:1.0 [ipx::current_core]
|
|
INFO: [IP_Flow 19-4728] Bus Interface 'cpll_ref_clk_7': Added interface parameter 'ASSOCIATED_RESET' with value 'up_rx_rst_7'.
|
|
# ipx::infer_bus_interface up_rx_rst_8 xilinx.com:signal:reset_rtl:1.0 [ipx::current_core]
|
|
INFO: [IP_Flow 19-4728] Bus Interface 'cpll_ref_clk_8': Added interface parameter 'ASSOCIATED_RESET' with value 'up_rx_rst_8'.
|
|
# ipx::infer_bus_interface up_rx_rst_9 xilinx.com:signal:reset_rtl:1.0 [ipx::current_core]
|
|
INFO: [IP_Flow 19-4728] Bus Interface 'cpll_ref_clk_9': Added interface parameter 'ASSOCIATED_RESET' with value 'up_rx_rst_9'.
|
|
# ipx::infer_bus_interface up_rx_rst_10 xilinx.com:signal:reset_rtl:1.0 [ipx::current_core]
|
|
INFO: [IP_Flow 19-4728] Bus Interface 'cpll_ref_clk_10': Added interface parameter 'ASSOCIATED_RESET' with value 'up_rx_rst_10'.
|
|
# ipx::infer_bus_interface up_rx_rst_11 xilinx.com:signal:reset_rtl:1.0 [ipx::current_core]
|
|
INFO: [IP_Flow 19-4728] Bus Interface 'cpll_ref_clk_11': Added interface parameter 'ASSOCIATED_RESET' with value 'up_rx_rst_11'.
|
|
# ipx::infer_bus_interface up_rx_rst_12 xilinx.com:signal:reset_rtl:1.0 [ipx::current_core]
|
|
INFO: [IP_Flow 19-4728] Bus Interface 'cpll_ref_clk_12': Added interface parameter 'ASSOCIATED_RESET' with value 'up_rx_rst_12'.
|
|
# ipx::infer_bus_interface up_rx_rst_13 xilinx.com:signal:reset_rtl:1.0 [ipx::current_core]
|
|
INFO: [IP_Flow 19-4728] Bus Interface 'cpll_ref_clk_13': Added interface parameter 'ASSOCIATED_RESET' with value 'up_rx_rst_13'.
|
|
# ipx::infer_bus_interface up_rx_rst_14 xilinx.com:signal:reset_rtl:1.0 [ipx::current_core]
|
|
INFO: [IP_Flow 19-4728] Bus Interface 'cpll_ref_clk_14': Added interface parameter 'ASSOCIATED_RESET' with value 'up_rx_rst_14'.
|
|
# ipx::infer_bus_interface up_rx_rst_15 xilinx.com:signal:reset_rtl:1.0 [ipx::current_core]
|
|
INFO: [IP_Flow 19-4728] Bus Interface 'cpll_ref_clk_15': Added interface parameter 'ASSOCIATED_RESET' with value 'up_rx_rst_15'.
|
|
# ipx::infer_bus_interface up_tx_rst_0 xilinx.com:signal:reset_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface up_tx_rst_1 xilinx.com:signal:reset_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface up_tx_rst_2 xilinx.com:signal:reset_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface up_tx_rst_3 xilinx.com:signal:reset_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface up_tx_rst_4 xilinx.com:signal:reset_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface up_tx_rst_5 xilinx.com:signal:reset_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface up_tx_rst_6 xilinx.com:signal:reset_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface up_tx_rst_7 xilinx.com:signal:reset_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface up_tx_rst_8 xilinx.com:signal:reset_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface up_tx_rst_9 xilinx.com:signal:reset_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface up_tx_rst_10 xilinx.com:signal:reset_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface up_tx_rst_11 xilinx.com:signal:reset_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface up_tx_rst_12 xilinx.com:signal:reset_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface up_tx_rst_13 xilinx.com:signal:reset_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface up_tx_rst_14 xilinx.com:signal:reset_rtl:1.0 [ipx::current_core]
|
|
# ipx::infer_bus_interface up_tx_rst_15 xilinx.com:signal:reset_rtl:1.0 [ipx::current_core]
|
|
# set_property driver_value 0 [ipx::get_ports -filter "direction==in" -of_objects [ipx::current_core]]
|
|
# for {set n 0} {$n < 16} {incr n} {
|
|
#
|
|
# if {($n%4) == 0} {
|
|
# adi_if_infer_bus analog.com:interface:if_xcvr_cm slave up_cm_${n} [list \
|
|
# "enb up_cm_enb_${n} "\
|
|
# "addr up_cm_addr_${n} "\
|
|
# "wr up_cm_wr_${n} "\
|
|
# "wdata up_cm_wdata_${n} "\
|
|
# "rdata up_cm_rdata_${n} "\
|
|
# "ready up_cm_ready_${n} "]
|
|
# }
|
|
#
|
|
# adi_if_infer_bus analog.com:interface:if_xcvr_cm slave up_es_${n} [list \
|
|
# "enb up_es_enb_${n} "\
|
|
# "addr up_es_addr_${n} "\
|
|
# "wr up_es_wr_${n} "\
|
|
# "wdata up_es_wdata_${n} "\
|
|
# "rdata up_es_rdata_${n} "\
|
|
# "reset up_es_reset_${n} "\
|
|
# "ready up_es_ready_${n} "]
|
|
#
|
|
# adi_if_infer_bus analog.com:interface:if_xcvr_ch slave up_rx_${n} [list \
|
|
# "pll_locked up_rx_pll_locked_${n} "\
|
|
# "rst up_rx_rst_${n} "\
|
|
# "user_ready up_rx_user_ready_${n} "\
|
|
# "rst_done up_rx_rst_done_${n} "\
|
|
# "lpm_dfe_n up_rx_lpm_dfe_n_${n} "\
|
|
# "rate up_rx_rate_${n} "\
|
|
# "sys_clk_sel up_rx_sys_clk_sel_${n} "\
|
|
# "out_clk_sel up_rx_out_clk_sel_${n} "\
|
|
# "enb up_rx_enb_${n} "\
|
|
# "addr up_rx_addr_${n} "\
|
|
# "wr up_rx_wr_${n} "\
|
|
# "wdata up_rx_wdata_${n} "\
|
|
# "rdata up_rx_rdata_${n} "\
|
|
# "ready up_rx_ready_${n} "]
|
|
#
|
|
# adi_if_infer_bus analog.com:interface:if_xcvr_ch slave up_tx_${n} [list \
|
|
# "pll_locked up_tx_pll_locked_${n} "\
|
|
# "rst up_tx_rst_${n} "\
|
|
# "user_ready up_tx_user_ready_${n} "\
|
|
# "rst_done up_tx_rst_done_${n} "\
|
|
# "lpm_dfe_n up_tx_lpm_dfe_n_${n} "\
|
|
# "rate up_tx_rate_${n} "\
|
|
# "sys_clk_sel up_tx_sys_clk_sel_${n} "\
|
|
# "out_clk_sel up_tx_out_clk_sel_${n} "\
|
|
# "tx_diffctrl up_tx_diffctrl_${n} "\
|
|
# "tx_postcursor up_tx_postcursor_${n} "\
|
|
# "tx_precursor up_tx_precursor_${n} "\
|
|
# "enb up_tx_enb_${n} "\
|
|
# "addr up_tx_addr_${n} "\
|
|
# "wr up_tx_wr_${n} "\
|
|
# "wdata up_tx_wdata_${n} "\
|
|
# "rdata up_tx_rdata_${n} "\
|
|
# "ready up_tx_ready_${n} "]
|
|
#
|
|
# ipx::add_bus_interface rx_${n} [ipx::current_core]
|
|
# set_property abstraction_type_vlnv xilinx.com:display_jesd204:jesd204_rx_bus_rtl:1.0 \
|
|
# [ipx::get_bus_interfaces rx_${n} -of_objects [ipx::current_core]]
|
|
# set_property bus_type_vlnv xilinx.com:display_jesd204:jesd204_rx_bus:1.0 \
|
|
# [ipx::get_bus_interfaces rx_${n} -of_objects [ipx::current_core]]
|
|
# set_property interface_mode master [ipx::get_bus_interfaces rx_${n} -of_objects [ipx::current_core]]
|
|
# ipx::add_port_map rxcharisk [ipx::get_bus_interfaces rx_${n} -of_objects [ipx::current_core]]
|
|
# set_property physical_name rx_charisk_${n} [ipx::get_port_maps rxcharisk -of_objects \
|
|
# [ipx::get_bus_interfaces rx_${n} -of_objects [ipx::current_core]]]
|
|
# ipx::add_port_map rxnotintable [ipx::get_bus_interfaces rx_${n} -of_objects [ipx::current_core]]
|
|
# set_property physical_name rx_notintable_${n} [ipx::get_port_maps rxnotintable -of_objects \
|
|
# [ipx::get_bus_interfaces rx_${n} -of_objects [ipx::current_core]]]
|
|
# ipx::add_port_map rxdisperr [ipx::get_bus_interfaces rx_${n} -of_objects [ipx::current_core]]
|
|
# set_property physical_name rx_disperr_${n} [ipx::get_port_maps rxdisperr -of_objects \
|
|
# [ipx::get_bus_interfaces rx_${n} -of_objects [ipx::current_core]]]
|
|
# ipx::add_port_map rxdata [ipx::get_bus_interfaces rx_${n} -of_objects [ipx::current_core]]
|
|
# set_property physical_name rx_data_${n} [ipx::get_port_maps rxdata -of_objects \
|
|
# [ipx::get_bus_interfaces rx_${n} -of_objects [ipx::current_core]]]
|
|
#
|
|
# ipx::add_bus_interface tx_${n} [ipx::current_core]
|
|
# set_property abstraction_type_vlnv xilinx.com:display_jesd204:jesd204_tx_bus_rtl:1.0 \
|
|
# [ipx::get_bus_interfaces tx_${n} -of_objects [ipx::current_core]]
|
|
# set_property bus_type_vlnv xilinx.com:display_jesd204:jesd204_tx_bus:1.0 \
|
|
# [ipx::get_bus_interfaces tx_${n} -of_objects [ipx::current_core]]
|
|
# set_property interface_mode slave [ipx::get_bus_interfaces tx_${n} -of_objects [ipx::current_core]]
|
|
# ipx::add_port_map txcharisk [ipx::get_bus_interfaces tx_${n} -of_objects [ipx::current_core]]
|
|
# set_property physical_name tx_charisk_${n} [ipx::get_port_maps txcharisk -of_objects \
|
|
# [ipx::get_bus_interfaces tx_${n} -of_objects [ipx::current_core]]]
|
|
# ipx::add_port_map txdata [ipx::get_bus_interfaces tx_${n} -of_objects [ipx::current_core]]
|
|
# set_property physical_name tx_data_${n} [ipx::get_port_maps txdata -of_objects \
|
|
# [ipx::get_bus_interfaces tx_${n} -of_objects [ipx::current_core]]]
|
|
#
|
|
# }
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 0} \
|
|
# [ipx::get_bus_interfaces up_es_0 -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 0} \
|
|
# [ipx::get_bus_interfaces up_rx_0 -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 0} \
|
|
# [ipx::get_bus_interfaces rx_0 -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 0} \
|
|
# [ipx::get_ports rx_*0* -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 0} \
|
|
# [ipx::get_ports up_rx_rst_0 -of_objects [ipx::current_core]] \
|
|
#
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 0} \
|
|
# [ipx::get_bus_interfaces up_tx_0 -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 0} \
|
|
# [ipx::get_bus_interfaces tx_0 -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 0} \
|
|
# [ipx::get_ports tx_*0* -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 0} \
|
|
# [ipx::get_ports up_tx_rst_0 -of_objects [ipx::current_core]] \
|
|
#
|
|
# set_property enablement_dependency \
|
|
# {(spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 0) or \
|
|
# (spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 0)} \
|
|
# [ipx::get_ports cpll_ref_clk_0 -of_objects [ipx::current_core]] \
|
|
# [ipx::get_ports up_cpll_rst_0 -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency \
|
|
# {(spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 0) or \
|
|
# (spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 0)} \
|
|
# [ipx::get_ports qpll_ref_clk_0 -of_objects [ipx::current_core]] \
|
|
# [ipx::get_ports up_qpll_rst_0 -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency \
|
|
# {(spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 0) or \
|
|
# (spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 0)} \
|
|
# [ipx::get_bus_interfaces up_cm_0 -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 1} \
|
|
# [ipx::get_bus_interfaces up_es_1 -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 1} \
|
|
# [ipx::get_bus_interfaces up_rx_1 -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 1} \
|
|
# [ipx::get_bus_interfaces rx_1 -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 1} \
|
|
# [ipx::get_ports rx_*1* -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 1} \
|
|
# [ipx::get_ports up_rx_rst_1 -of_objects [ipx::current_core]] \
|
|
#
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 1} \
|
|
# [ipx::get_bus_interfaces up_tx_1 -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 1} \
|
|
# [ipx::get_bus_interfaces tx_1 -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 1} \
|
|
# [ipx::get_ports tx_*1* -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 1} \
|
|
# [ipx::get_ports up_tx_rst_1 -of_objects [ipx::current_core]] \
|
|
#
|
|
# set_property enablement_dependency \
|
|
# {(spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 1) or \
|
|
# (spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 1)} \
|
|
# [ipx::get_ports cpll_ref_clk_1 -of_objects [ipx::current_core]] \
|
|
# [ipx::get_ports up_cpll_rst_1 -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 2} \
|
|
# [ipx::get_bus_interfaces up_es_2 -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 2} \
|
|
# [ipx::get_bus_interfaces up_rx_2 -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 2} \
|
|
# [ipx::get_bus_interfaces rx_2 -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 2} \
|
|
# [ipx::get_ports rx_*2* -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 2} \
|
|
# [ipx::get_ports up_rx_rst_2 -of_objects [ipx::current_core]] \
|
|
#
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 2} \
|
|
# [ipx::get_bus_interfaces up_tx_2 -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 2} \
|
|
# [ipx::get_bus_interfaces tx_2 -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 2} \
|
|
# [ipx::get_ports tx_*2* -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 2} \
|
|
# [ipx::get_ports up_tx_rst_2 -of_objects [ipx::current_core]] \
|
|
#
|
|
# set_property enablement_dependency \
|
|
# {(spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 2) or \
|
|
# (spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 2)} \
|
|
# [ipx::get_ports cpll_ref_clk_2 -of_objects [ipx::current_core]] \
|
|
# [ipx::get_ports up_cpll_rst_2 -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 3} \
|
|
# [ipx::get_bus_interfaces up_es_3 -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 3} \
|
|
# [ipx::get_bus_interfaces up_rx_3 -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 3} \
|
|
# [ipx::get_bus_interfaces rx_3 -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 3} \
|
|
# [ipx::get_ports rx_*3* -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 3} \
|
|
# [ipx::get_ports up_rx_rst_3 -of_objects [ipx::current_core]] \
|
|
#
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 3} \
|
|
# [ipx::get_bus_interfaces up_tx_3 -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 3} \
|
|
# [ipx::get_bus_interfaces tx_3 -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 3} \
|
|
# [ipx::get_ports tx_*3* -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 3} \
|
|
# [ipx::get_ports up_tx_rst_3 -of_objects [ipx::current_core]] \
|
|
#
|
|
# set_property enablement_dependency \
|
|
# {(spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 3) or \
|
|
# (spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 3)} \
|
|
# [ipx::get_ports cpll_ref_clk_3 -of_objects [ipx::current_core]] \
|
|
# [ipx::get_ports up_cpll_rst_3 -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 4} \
|
|
# [ipx::get_bus_interfaces up_es_4 -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 4} \
|
|
# [ipx::get_bus_interfaces up_rx_4 -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 4} \
|
|
# [ipx::get_bus_interfaces rx_4 -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 4} \
|
|
# [ipx::get_ports rx_*4* -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 4} \
|
|
# [ipx::get_ports up_rx_rst_4 -of_objects [ipx::current_core]] \
|
|
#
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 4} \
|
|
# [ipx::get_bus_interfaces up_tx_4 -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 4} \
|
|
# [ipx::get_bus_interfaces tx_4 -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 4} \
|
|
# [ipx::get_ports tx_*4* -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 4} \
|
|
# [ipx::get_ports up_tx_rst_4 -of_objects [ipx::current_core]] \
|
|
#
|
|
# set_property enablement_dependency \
|
|
# {(spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 4) or \
|
|
# (spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 4)} \
|
|
# [ipx::get_ports cpll_ref_clk_4 -of_objects [ipx::current_core]] \
|
|
# [ipx::get_ports up_cpll_rst_4 -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency \
|
|
# {(spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 4) or \
|
|
# (spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 4)} \
|
|
# [ipx::get_ports qpll_ref_clk_4 -of_objects [ipx::current_core]] \
|
|
# [ipx::get_ports up_qpll_rst_4 -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency \
|
|
# {(spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 4) or \
|
|
# (spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 4)} \
|
|
# [ipx::get_bus_interfaces up_cm_4 -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 5} \
|
|
# [ipx::get_bus_interfaces up_es_5 -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 5} \
|
|
# [ipx::get_bus_interfaces up_rx_5 -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 5} \
|
|
# [ipx::get_bus_interfaces rx_5 -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 5} \
|
|
# [ipx::get_ports rx_*5* -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 5} \
|
|
# [ipx::get_ports up_rx_rst_5 -of_objects [ipx::current_core]] \
|
|
#
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 5} \
|
|
# [ipx::get_bus_interfaces up_tx_5 -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 5} \
|
|
# [ipx::get_bus_interfaces tx_5 -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 5} \
|
|
# [ipx::get_ports tx_*5* -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 5} \
|
|
# [ipx::get_ports up_tx_rst_5 -of_objects [ipx::current_core]] \
|
|
#
|
|
# set_property enablement_dependency \
|
|
# {(spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 5) or \
|
|
# (spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 5)} \
|
|
# [ipx::get_ports cpll_ref_clk_5 -of_objects [ipx::current_core]] \
|
|
# [ipx::get_ports up_cpll_rst_5 -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 6} \
|
|
# [ipx::get_bus_interfaces up_es_6 -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 6} \
|
|
# [ipx::get_bus_interfaces up_rx_6 -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 6} \
|
|
# [ipx::get_bus_interfaces rx_6 -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 6} \
|
|
# [ipx::get_ports rx_*6* -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 6} \
|
|
# [ipx::get_ports up_rx_rst_6 -of_objects [ipx::current_core]] \
|
|
#
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 6} \
|
|
# [ipx::get_bus_interfaces up_tx_6 -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 6} \
|
|
# [ipx::get_bus_interfaces tx_6 -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 6} \
|
|
# [ipx::get_ports tx_*6* -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 6} \
|
|
# [ipx::get_ports up_tx_rst_6 -of_objects [ipx::current_core]] \
|
|
#
|
|
# set_property enablement_dependency \
|
|
# {(spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 6) or \
|
|
# (spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 6)} \
|
|
# [ipx::get_ports cpll_ref_clk_6 -of_objects [ipx::current_core]] \
|
|
# [ipx::get_ports up_cpll_rst_6 -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 7} \
|
|
# [ipx::get_bus_interfaces up_es_7 -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 7} \
|
|
# [ipx::get_bus_interfaces up_rx_7 -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 7} \
|
|
# [ipx::get_bus_interfaces rx_7 -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 7} \
|
|
# [ipx::get_ports rx_*7* -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 7} \
|
|
# [ipx::get_ports up_rx_rst_7 -of_objects [ipx::current_core]] \
|
|
#
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 7} \
|
|
# [ipx::get_bus_interfaces up_tx_7 -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 7} \
|
|
# [ipx::get_bus_interfaces tx_7 -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 7} \
|
|
# [ipx::get_ports tx_*7* -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 7} \
|
|
# [ipx::get_ports up_tx_rst_7 -of_objects [ipx::current_core]] \
|
|
#
|
|
# set_property enablement_dependency \
|
|
# {(spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 7) or \
|
|
# (spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 7)} \
|
|
# [ipx::get_ports cpll_ref_clk_7 -of_objects [ipx::current_core]] \
|
|
# [ipx::get_ports up_cpll_rst_7 -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 8} \
|
|
# [ipx::get_bus_interfaces up_es_8 -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 8} \
|
|
# [ipx::get_bus_interfaces up_rx_8 -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 8} \
|
|
# [ipx::get_bus_interfaces rx_8 -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 8} \
|
|
# [ipx::get_ports rx_*8* -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 8} \
|
|
# [ipx::get_ports up_rx_rst_8 -of_objects [ipx::current_core]] \
|
|
#
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 8} \
|
|
# [ipx::get_bus_interfaces up_tx_8 -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 8} \
|
|
# [ipx::get_bus_interfaces tx_8 -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 8} \
|
|
# [ipx::get_ports tx_*8* -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 8} \
|
|
# [ipx::get_ports up_tx_rst_8 -of_objects [ipx::current_core]] \
|
|
#
|
|
# set_property enablement_dependency \
|
|
# {(spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 8) or \
|
|
# (spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 8)} \
|
|
# [ipx::get_ports cpll_ref_clk_8 -of_objects [ipx::current_core]] \
|
|
# [ipx::get_ports up_cpll_rst_8 -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency \
|
|
# {(spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 8) or \
|
|
# (spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 8)} \
|
|
# [ipx::get_ports qpll_ref_clk_8 -of_objects [ipx::current_core]] \
|
|
# [ipx::get_ports up_qpll_rst_8 -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency \
|
|
# {(spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 8) or \
|
|
# (spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 8)} \
|
|
# [ipx::get_bus_interfaces up_cm_8 -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 9} \
|
|
# [ipx::get_bus_interfaces up_es_9 -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 9} \
|
|
# [ipx::get_bus_interfaces up_rx_9 -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 9} \
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# [ipx::get_bus_interfaces rx_9 -of_objects [ipx::current_core]]
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# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 9} \
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# [ipx::get_ports rx_*9* -of_objects [ipx::current_core]]
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# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 9} \
|
|
# [ipx::get_ports up_rx_rst_9 -of_objects [ipx::current_core]] \
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#
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# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 9} \
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# [ipx::get_bus_interfaces up_tx_9 -of_objects [ipx::current_core]]
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# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 9} \
|
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# [ipx::get_bus_interfaces tx_9 -of_objects [ipx::current_core]]
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# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 9} \
|
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# [ipx::get_ports tx_*9* -of_objects [ipx::current_core]]
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# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 9} \
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# [ipx::get_ports up_tx_rst_9 -of_objects [ipx::current_core]] \
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#
|
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# set_property enablement_dependency \
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# {(spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 9) or \
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# (spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 9)} \
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# [ipx::get_ports cpll_ref_clk_9 -of_objects [ipx::current_core]] \
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# [ipx::get_ports up_cpll_rst_9 -of_objects [ipx::current_core]]
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# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 10} \
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# [ipx::get_bus_interfaces up_es_10 -of_objects [ipx::current_core]]
|
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# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 10} \
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# [ipx::get_bus_interfaces up_rx_10 -of_objects [ipx::current_core]]
|
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# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 10} \
|
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# [ipx::get_bus_interfaces rx_10 -of_objects [ipx::current_core]]
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# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 10} \
|
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# [ipx::get_ports rx_*10* -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 10} \
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# [ipx::get_ports up_rx_rst_10 -of_objects [ipx::current_core]] \
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|
#
|
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# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 10} \
|
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# [ipx::get_bus_interfaces up_tx_10 -of_objects [ipx::current_core]]
|
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# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 10} \
|
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# [ipx::get_bus_interfaces tx_10 -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 10} \
|
|
# [ipx::get_ports tx_*10* -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 10} \
|
|
# [ipx::get_ports up_tx_rst_10 -of_objects [ipx::current_core]] \
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|
#
|
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# set_property enablement_dependency \
|
|
# {(spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 10) or \
|
|
# (spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 10)} \
|
|
# [ipx::get_ports cpll_ref_clk_10 -of_objects [ipx::current_core]] \
|
|
# [ipx::get_ports up_cpll_rst_10 -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 11} \
|
|
# [ipx::get_bus_interfaces up_es_11 -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 11} \
|
|
# [ipx::get_bus_interfaces up_rx_11 -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 11} \
|
|
# [ipx::get_bus_interfaces rx_11 -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 11} \
|
|
# [ipx::get_ports rx_*11* -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 11} \
|
|
# [ipx::get_ports up_rx_rst_11 -of_objects [ipx::current_core]] \
|
|
#
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 11} \
|
|
# [ipx::get_bus_interfaces up_tx_11 -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 11} \
|
|
# [ipx::get_bus_interfaces tx_11 -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 11} \
|
|
# [ipx::get_ports tx_*11* -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 11} \
|
|
# [ipx::get_ports up_tx_rst_11 -of_objects [ipx::current_core]] \
|
|
#
|
|
# set_property enablement_dependency \
|
|
# {(spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 11) or \
|
|
# (spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 11)} \
|
|
# [ipx::get_ports cpll_ref_clk_11 -of_objects [ipx::current_core]] \
|
|
# [ipx::get_ports up_cpll_rst_11 -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 12} \
|
|
# [ipx::get_bus_interfaces up_es_12 -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 12} \
|
|
# [ipx::get_bus_interfaces up_rx_12 -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 12} \
|
|
# [ipx::get_bus_interfaces rx_12 -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 12} \
|
|
# [ipx::get_ports rx_*12* -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 12} \
|
|
# [ipx::get_ports up_rx_rst_12 -of_objects [ipx::current_core]] \
|
|
#
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 12} \
|
|
# [ipx::get_bus_interfaces up_tx_12 -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 12} \
|
|
# [ipx::get_bus_interfaces tx_12 -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 12} \
|
|
# [ipx::get_ports tx_*12* -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 12} \
|
|
# [ipx::get_ports up_tx_rst_12 -of_objects [ipx::current_core]] \
|
|
#
|
|
# set_property enablement_dependency \
|
|
# {(spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 12) or \
|
|
# (spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 12)} \
|
|
# [ipx::get_ports cpll_ref_clk_12 -of_objects [ipx::current_core]] \
|
|
# [ipx::get_ports up_cpll_rst_12 -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency \
|
|
# {(spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 12) or \
|
|
# (spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 12)} \
|
|
# [ipx::get_ports qpll_ref_clk_12 -of_objects [ipx::current_core]] \
|
|
# [ipx::get_ports up_qpll_rst_12 -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency \
|
|
# {(spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 12) or \
|
|
# (spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 12)} \
|
|
# [ipx::get_bus_interfaces up_cm_12 -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 13} \
|
|
# [ipx::get_bus_interfaces up_es_13 -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 13} \
|
|
# [ipx::get_bus_interfaces up_rx_13 -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 13} \
|
|
# [ipx::get_bus_interfaces rx_13 -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 13} \
|
|
# [ipx::get_ports rx_*13* -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 13} \
|
|
# [ipx::get_ports up_rx_rst_13 -of_objects [ipx::current_core]] \
|
|
#
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 13} \
|
|
# [ipx::get_bus_interfaces up_tx_13 -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 13} \
|
|
# [ipx::get_bus_interfaces tx_13 -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 13} \
|
|
# [ipx::get_ports tx_*13* -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 13} \
|
|
# [ipx::get_ports up_tx_rst_13 -of_objects [ipx::current_core]] \
|
|
#
|
|
# set_property enablement_dependency \
|
|
# {(spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 13) or \
|
|
# (spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 13)} \
|
|
# [ipx::get_ports cpll_ref_clk_13 -of_objects [ipx::current_core]] \
|
|
# [ipx::get_ports up_cpll_rst_13 -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 14} \
|
|
# [ipx::get_bus_interfaces up_es_14 -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 14} \
|
|
# [ipx::get_bus_interfaces up_rx_14 -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 14} \
|
|
# [ipx::get_bus_interfaces rx_14 -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 14} \
|
|
# [ipx::get_ports rx_*14* -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 14} \
|
|
# [ipx::get_ports up_rx_rst_14 -of_objects [ipx::current_core]] \
|
|
#
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 14} \
|
|
# [ipx::get_bus_interfaces up_tx_14 -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 14} \
|
|
# [ipx::get_bus_interfaces tx_14 -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 14} \
|
|
# [ipx::get_ports tx_*14* -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 14} \
|
|
# [ipx::get_ports up_tx_rst_14 -of_objects [ipx::current_core]] \
|
|
#
|
|
# set_property enablement_dependency \
|
|
# {(spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 14) or \
|
|
# (spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 14)} \
|
|
# [ipx::get_ports cpll_ref_clk_14 -of_objects [ipx::current_core]] \
|
|
# [ipx::get_ports up_cpll_rst_14 -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 15} \
|
|
# [ipx::get_bus_interfaces up_es_15 -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 15} \
|
|
# [ipx::get_bus_interfaces up_rx_15 -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 15} \
|
|
# [ipx::get_bus_interfaces rx_15 -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 15} \
|
|
# [ipx::get_ports rx_*15* -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 15} \
|
|
# [ipx::get_ports up_rx_rst_15 -of_objects [ipx::current_core]] \
|
|
#
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 15} \
|
|
# [ipx::get_bus_interfaces up_tx_15 -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 15} \
|
|
# [ipx::get_bus_interfaces tx_15 -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 15} \
|
|
# [ipx::get_ports tx_*15* -of_objects [ipx::current_core]]
|
|
# set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 15} \
|
|
# [ipx::get_ports up_tx_rst_15 -of_objects [ipx::current_core]] \
|
|
#
|
|
# set_property enablement_dependency \
|
|
# {(spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 15) or \
|
|
# (spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 15)} \
|
|
# [ipx::get_ports cpll_ref_clk_15 -of_objects [ipx::current_core]] \
|
|
# [ipx::get_ports up_cpll_rst_15 -of_objects [ipx::current_core]]
|
|
# adi_add_auto_fpga_spec_params
|
|
# set cc [ipx::current_core]
|
|
# set param [ipx::get_user_parameters CH_HSPMUX -of_objects $cc]
|
|
# set_property -dict [list \
|
|
# value_tcl_expr {[format "0x%x" [expr {$XCVR_TYPE == 8} ? 0x2424 : \
|
|
# {$XCVR_TYPE == 9} ? 0x2020 : 0x0]]} \
|
|
# ] $param
|
|
# set param [ipx::get_user_parameters PPF0_CFG -of_objects $cc]
|
|
# set_property -dict [list \
|
|
# value_tcl_expr {[format "0x%x" [expr {$XCVR_TYPE == 9} ? 0x800 : 0x600]]} \
|
|
# ] $param
|
|
# set param [ipx::get_user_parameters RXPI_CFG0 -of_objects $cc]
|
|
# set_property -dict [list \
|
|
# value_tcl_expr {[format "0x%x" [expr {$XCVR_TYPE == 8} ? 0x2 : \
|
|
# {$XCVR_TYPE == 9} ? 0x100 : 0x0]]} \
|
|
# ] $param
|
|
# set param [ipx::get_user_parameters RXPI_CFG1 -of_objects $cc]
|
|
# set_property -dict [list \
|
|
# value_tcl_expr {[format "0x%x" [expr {$XCVR_TYPE == 8} ? 0x15 : 0x0]]} \
|
|
# ] $param
|
|
# set param [ipx::get_user_parameters RTX_BUF_CML_CTRL -of_objects $cc]
|
|
# set_property -dict [list \
|
|
# value_tcl_expr {[format "0x%x" [expr {$XCVR_TYPE == 9} ? 0x3 : 0x0]]} \
|
|
# ] $param
|
|
# set param [ipx::get_user_parameters QPLL_LPF -of_objects $cc]
|
|
# set_property -dict [list \
|
|
# value_tcl_expr {[format "0x%x" [expr {$XCVR_TYPE == 9} ? 0x37f : 0x137]]} \
|
|
# ] $param
|
|
# set param [ipx::get_user_parameters RXCDR_CFG3_GEN2 -of_objects $cc]
|
|
# set_property -dict [list \
|
|
# value_tcl_expr {[format "0x%x" [expr {$XCVR_TYPE == 9} ? 0x12 : 0x1a ]]} \
|
|
# ] $param
|
|
# set param [ipx::get_user_parameters RXCDR_CFG3_GEN4 -of_objects $cc]
|
|
# set_property -dict [list \
|
|
# value_tcl_expr {[format "0x%x" [expr {$XCVR_TYPE == 9} ? 0x12 : 0x24 ]]} \
|
|
# ] $param
|
|
# set param [ipx::get_user_parameters TX_PI_BIASSET -of_objects $cc]
|
|
# set_property -dict [list \
|
|
# value_tcl_expr {expr {$XCVR_TYPE == 9} ? 0 : 1} \
|
|
# ] $param
|
|
# ipx::create_xgui_files [ipx::current_core]
|
|
# ipx::save_core [ipx::current_core]
|
|
INFO: [Common 17-206] Exiting Vivado at Wed Dec 8 20:25:46 2021...
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