Archived
1465 lines
64 KiB
XML
1465 lines
64 KiB
XML
<?xml version="1.0" encoding="UTF-8"?>
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<spirit:component xmlns:xilinx="http://www.xilinx.com" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
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<spirit:vendor>analog.com</spirit:vendor>
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<spirit:library>user</spirit:library>
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<spirit:name>axi_spdif_rx</spirit:name>
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<spirit:version>1.0</spirit:version>
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<spirit:busInterfaces>
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<spirit:busInterface>
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<spirit:name>s_axi</spirit:name>
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<spirit:busType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="aximm" spirit:version="1.0"/>
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<spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="aximm_rtl" spirit:version="1.0"/>
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<spirit:slave>
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<spirit:memoryMapRef spirit:memoryMapRef="s_axi"/>
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</spirit:slave>
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<spirit:portMaps>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>AWADDR</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>s_axi_awaddr</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>AWPROT</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>s_axi_awprot</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>AWVALID</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>s_axi_awvalid</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>AWREADY</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>s_axi_awready</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>WDATA</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>s_axi_wdata</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>WSTRB</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>s_axi_wstrb</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>WVALID</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>s_axi_wvalid</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>WREADY</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>s_axi_wready</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>BRESP</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>s_axi_bresp</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>BVALID</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>s_axi_bvalid</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>BREADY</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>s_axi_bready</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>ARADDR</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>s_axi_araddr</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>ARPROT</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>s_axi_arprot</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>ARVALID</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>s_axi_arvalid</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>ARREADY</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>s_axi_arready</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>RDATA</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>s_axi_rdata</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>RRESP</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>s_axi_rresp</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>RVALID</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>s_axi_rvalid</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>RREADY</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>s_axi_rready</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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</spirit:portMaps>
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</spirit:busInterface>
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<spirit:busInterface>
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<spirit:name>s_axi_aclk</spirit:name>
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<spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock" spirit:version="1.0"/>
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<spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock_rtl" spirit:version="1.0"/>
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<spirit:slave/>
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<spirit:portMaps>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>CLK</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>s_axi_aclk</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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</spirit:portMaps>
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<spirit:parameters>
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<spirit:parameter>
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<spirit:name>ASSOCIATED_BUSIF</spirit:name>
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<spirit:value spirit:id="BUSIFPARAM_VALUE.S_AXI_ACLK.ASSOCIATED_BUSIF">s_axi</spirit:value>
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</spirit:parameter>
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<spirit:parameter>
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<spirit:name>ASSOCIATED_RESET</spirit:name>
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<spirit:value spirit:id="BUSIFPARAM_VALUE.S_AXI_ACLK.ASSOCIATED_RESET">s_axi_aresetn</spirit:value>
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</spirit:parameter>
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</spirit:parameters>
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</spirit:busInterface>
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<spirit:busInterface>
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<spirit:name>s_axi_aresetn</spirit:name>
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<spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="reset" spirit:version="1.0"/>
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<spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="reset_rtl" spirit:version="1.0"/>
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<spirit:slave/>
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<spirit:portMaps>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>RST</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>s_axi_aresetn</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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</spirit:portMaps>
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<spirit:parameters>
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<spirit:parameter>
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<spirit:name>POLARITY</spirit:name>
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<spirit:value spirit:id="BUSIFPARAM_VALUE.S_AXI_ARESETN.POLARITY" spirit:choiceRef="choice_list_74b5137e">ACTIVE_LOW</spirit:value>
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</spirit:parameter>
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</spirit:parameters>
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</spirit:busInterface>
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<spirit:busInterface>
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<spirit:name>m_axis</spirit:name>
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<spirit:busType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="axis" spirit:version="1.0"/>
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<spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="axis_rtl" spirit:version="1.0"/>
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<spirit:master/>
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<spirit:portMaps>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>TDATA</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>m_axis_tdata</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>TKEEP</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>m_axis_tkeep</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>TLAST</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>m_axis_tlast</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>TVALID</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>m_axis_tvalid</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>TREADY</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>m_axis_tready</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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</spirit:portMaps>
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<spirit:vendorExtensions>
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<xilinx:busInterfaceInfo>
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<xilinx:enablement>
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<xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.m_axis" xilinx:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_DMA_TYPE')) = 0)">true</xilinx:isEnabled>
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</xilinx:enablement>
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</xilinx:busInterfaceInfo>
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</spirit:vendorExtensions>
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</spirit:busInterface>
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<spirit:busInterface>
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<spirit:name>dma_req_aclk</spirit:name>
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<spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock" spirit:version="1.0"/>
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<spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock_rtl" spirit:version="1.0"/>
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<spirit:slave/>
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<spirit:portMaps>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>CLK</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>dma_req_aclk</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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</spirit:portMaps>
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<spirit:parameters>
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<spirit:parameter>
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<spirit:name>ASSOCIATED_RESET</spirit:name>
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<spirit:value spirit:id="BUSIFPARAM_VALUE.DMA_REQ_ACLK.ASSOCIATED_RESET">dma_req_rstn</spirit:value>
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</spirit:parameter>
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</spirit:parameters>
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</spirit:busInterface>
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<spirit:busInterface>
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<spirit:name>m_axis_aclk</spirit:name>
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<spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock" spirit:version="1.0"/>
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<spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock_rtl" spirit:version="1.0"/>
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<spirit:slave/>
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<spirit:portMaps>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>CLK</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>m_axis_aclk</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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</spirit:portMaps>
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<spirit:parameters>
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<spirit:parameter>
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<spirit:name>ASSOCIATED_BUSIF</spirit:name>
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<spirit:value spirit:id="BUSIFPARAM_VALUE.M_AXIS_ACLK.ASSOCIATED_BUSIF">m_axis</spirit:value>
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</spirit:parameter>
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</spirit:parameters>
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</spirit:busInterface>
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<spirit:busInterface>
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<spirit:name>dma_req_rstn</spirit:name>
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<spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="reset" spirit:version="1.0"/>
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<spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="reset_rtl" spirit:version="1.0"/>
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<spirit:slave/>
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<spirit:portMaps>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>RST</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>dma_req_rstn</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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</spirit:portMaps>
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<spirit:parameters>
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<spirit:parameter>
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<spirit:name>POLARITY</spirit:name>
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<spirit:value spirit:id="BUSIFPARAM_VALUE.DMA_REQ_RSTN.POLARITY" spirit:choiceRef="choice_list_74b5137e">ACTIVE_LOW</spirit:value>
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</spirit:parameter>
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</spirit:parameters>
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</spirit:busInterface>
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<spirit:busInterface>
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<spirit:name>dma_ack</spirit:name>
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<spirit:busType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="axis" spirit:version="1.0"/>
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<spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="axis_rtl" spirit:version="1.0"/>
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<spirit:slave/>
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<spirit:portMaps>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>TVALID</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>dma_req_davalid</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>TREADY</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>dma_req_daready</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>TUSER</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>dma_req_datype</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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</spirit:portMaps>
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<spirit:vendorExtensions>
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<xilinx:busInterfaceInfo>
|
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<xilinx:enablement>
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<xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.dma_ack" xilinx:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_DMA_TYPE')) = 1)">false</xilinx:isEnabled>
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</xilinx:enablement>
|
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</xilinx:busInterfaceInfo>
|
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</spirit:vendorExtensions>
|
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</spirit:busInterface>
|
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<spirit:busInterface>
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<spirit:name>dma_req</spirit:name>
|
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<spirit:busType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="axis" spirit:version="1.0"/>
|
|
<spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="axis_rtl" spirit:version="1.0"/>
|
|
<spirit:master/>
|
|
<spirit:portMaps>
|
|
<spirit:portMap>
|
|
<spirit:logicalPort>
|
|
<spirit:name>TVALID</spirit:name>
|
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</spirit:logicalPort>
|
|
<spirit:physicalPort>
|
|
<spirit:name>dma_req_drvalid</spirit:name>
|
|
</spirit:physicalPort>
|
|
</spirit:portMap>
|
|
<spirit:portMap>
|
|
<spirit:logicalPort>
|
|
<spirit:name>TREADY</spirit:name>
|
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</spirit:logicalPort>
|
|
<spirit:physicalPort>
|
|
<spirit:name>dma_req_drready</spirit:name>
|
|
</spirit:physicalPort>
|
|
</spirit:portMap>
|
|
<spirit:portMap>
|
|
<spirit:logicalPort>
|
|
<spirit:name>TUSER</spirit:name>
|
|
</spirit:logicalPort>
|
|
<spirit:physicalPort>
|
|
<spirit:name>dma_req_drtype</spirit:name>
|
|
</spirit:physicalPort>
|
|
</spirit:portMap>
|
|
<spirit:portMap>
|
|
<spirit:logicalPort>
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<spirit:name>TLAST</spirit:name>
|
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</spirit:logicalPort>
|
|
<spirit:physicalPort>
|
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<spirit:name>dma_req_drlast</spirit:name>
|
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</spirit:physicalPort>
|
|
</spirit:portMap>
|
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</spirit:portMaps>
|
|
<spirit:vendorExtensions>
|
|
<xilinx:busInterfaceInfo>
|
|
<xilinx:enablement>
|
|
<xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.dma_req" xilinx:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_DMA_TYPE')) = 1)">false</xilinx:isEnabled>
|
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</xilinx:enablement>
|
|
</xilinx:busInterfaceInfo>
|
|
</spirit:vendorExtensions>
|
|
</spirit:busInterface>
|
|
<spirit:busInterface>
|
|
<spirit:name>dma_req_dma_ack_signal_clock</spirit:name>
|
|
<spirit:displayName>dma_req_dma_ack_signal_clock</spirit:displayName>
|
|
<spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock" spirit:version="1.0"/>
|
|
<spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock_rtl" spirit:version="1.0"/>
|
|
<spirit:slave/>
|
|
<spirit:portMaps>
|
|
<spirit:portMap>
|
|
<spirit:logicalPort>
|
|
<spirit:name>CLK</spirit:name>
|
|
</spirit:logicalPort>
|
|
<spirit:physicalPort>
|
|
<spirit:name>dma_req_aclk</spirit:name>
|
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</spirit:physicalPort>
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<spirit:modelParameter spirit:dataType="integer">
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|
<spirit:name>C_S_AXI_ADDR_WIDTH</spirit:name>
|
|
<spirit:displayName>C S Axi Addr Width</spirit:displayName>
|
|
<spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.C_S_AXI_ADDR_WIDTH">32</spirit:value>
|
|
</spirit:modelParameter>
|
|
<spirit:modelParameter spirit:dataType="integer">
|
|
<spirit:name>C_DMA_TYPE</spirit:name>
|
|
<spirit:displayName>C Dma Type</spirit:displayName>
|
|
<spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.C_DMA_TYPE">0</spirit:value>
|
|
</spirit:modelParameter>
|
|
</spirit:modelParameters>
|
|
</spirit:model>
|
|
<spirit:choices>
|
|
<spirit:choice>
|
|
<spirit:name>choice_list_74b5137e</spirit:name>
|
|
<spirit:enumeration>ACTIVE_HIGH</spirit:enumeration>
|
|
<spirit:enumeration>ACTIVE_LOW</spirit:enumeration>
|
|
</spirit:choice>
|
|
</spirit:choices>
|
|
<spirit:fileSets>
|
|
<spirit:fileSet>
|
|
<spirit:name>xilinx_anylanguagesynthesis_view_fileset</spirit:name>
|
|
<spirit:file>
|
|
<spirit:name>../common/axi_ctrlif.vhd</spirit:name>
|
|
<spirit:fileType>vhdlSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>rx_package.vhd</spirit:name>
|
|
<spirit:fileType>vhdlSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>../common/dma_fifo.vhd</spirit:name>
|
|
<spirit:fileType>vhdlSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>../common/axi_streaming_dma_rx_fifo.vhd</spirit:name>
|
|
<spirit:fileType>vhdlSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>../common/pl330_dma_fifo.vhd</spirit:name>
|
|
<spirit:fileType>vhdlSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>rx_decode.vhd</spirit:name>
|
|
<spirit:fileType>vhdlSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>rx_phase_det.vhd</spirit:name>
|
|
<spirit:fileType>vhdlSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>rx_status_reg.vhd</spirit:name>
|
|
<spirit:fileType>vhdlSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>axi_spdif_rx.vhd</spirit:name>
|
|
<spirit:fileType>vhdlSource</spirit:fileType>
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|
<spirit:userFileType>CHECKSUM_9b31708f</spirit:userFileType>
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|
</spirit:file>
|
|
</spirit:fileSet>
|
|
<spirit:fileSet>
|
|
<spirit:name>xilinx_anylanguagebehavioralsimulation_view_fileset</spirit:name>
|
|
<spirit:file>
|
|
<spirit:name>../common/axi_ctrlif.vhd</spirit:name>
|
|
<spirit:fileType>vhdlSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>rx_package.vhd</spirit:name>
|
|
<spirit:fileType>vhdlSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>../common/dma_fifo.vhd</spirit:name>
|
|
<spirit:fileType>vhdlSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>../common/axi_streaming_dma_rx_fifo.vhd</spirit:name>
|
|
<spirit:fileType>vhdlSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>../common/pl330_dma_fifo.vhd</spirit:name>
|
|
<spirit:fileType>vhdlSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>rx_decode.vhd</spirit:name>
|
|
<spirit:fileType>vhdlSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>rx_phase_det.vhd</spirit:name>
|
|
<spirit:fileType>vhdlSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>rx_status_reg.vhd</spirit:name>
|
|
<spirit:fileType>vhdlSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>axi_spdif_rx.vhd</spirit:name>
|
|
<spirit:fileType>vhdlSource</spirit:fileType>
|
|
</spirit:file>
|
|
</spirit:fileSet>
|
|
<spirit:fileSet>
|
|
<spirit:name>xilinx_xpgui_view_fileset</spirit:name>
|
|
<spirit:file>
|
|
<spirit:name>xgui/axi_spdif_rx_v1_0.tcl</spirit:name>
|
|
<spirit:fileType>tclSource</spirit:fileType>
|
|
<spirit:userFileType>CHECKSUM_8815501a</spirit:userFileType>
|
|
<spirit:userFileType>XGUI_VERSION_2</spirit:userFileType>
|
|
</spirit:file>
|
|
</spirit:fileSet>
|
|
</spirit:fileSets>
|
|
<spirit:description>axi_spdif_rx_v1_0</spirit:description>
|
|
<spirit:parameters>
|
|
<spirit:parameter>
|
|
<spirit:name>C_S_AXI_DATA_WIDTH</spirit:name>
|
|
<spirit:displayName>C S Axi Data Width</spirit:displayName>
|
|
<spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_S_AXI_DATA_WIDTH">32</spirit:value>
|
|
</spirit:parameter>
|
|
<spirit:parameter>
|
|
<spirit:name>C_S_AXI_ADDR_WIDTH</spirit:name>
|
|
<spirit:displayName>C S Axi Addr Width</spirit:displayName>
|
|
<spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_S_AXI_ADDR_WIDTH">32</spirit:value>
|
|
</spirit:parameter>
|
|
<spirit:parameter>
|
|
<spirit:name>C_DMA_TYPE</spirit:name>
|
|
<spirit:displayName>C Dma Type</spirit:displayName>
|
|
<spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_DMA_TYPE">0</spirit:value>
|
|
</spirit:parameter>
|
|
<spirit:parameter>
|
|
<spirit:name>Component_Name</spirit:name>
|
|
<spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.Component_Name" spirit:order="1">axi_spdif_rx_v1_0</spirit:value>
|
|
</spirit:parameter>
|
|
</spirit:parameters>
|
|
<spirit:vendorExtensions>
|
|
<xilinx:coreExtensions>
|
|
<xilinx:supportedFamilies>
|
|
<xilinx:family xilinx:lifeCycle="Production">virtex7</xilinx:family>
|
|
<xilinx:family xilinx:lifeCycle="Production">qvirtex7</xilinx:family>
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|
<xilinx:family xilinx:lifeCycle="Production">kintex7</xilinx:family>
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|
<xilinx:family xilinx:lifeCycle="Production">kintex7l</xilinx:family>
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|
<xilinx:family xilinx:lifeCycle="Production">qkintex7</xilinx:family>
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|
<xilinx:family xilinx:lifeCycle="Production">qkintex7l</xilinx:family>
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|
<xilinx:family xilinx:lifeCycle="Production">akintex7</xilinx:family>
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|
<xilinx:family xilinx:lifeCycle="Production">artix7</xilinx:family>
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|
<xilinx:family xilinx:lifeCycle="Production">artix7l</xilinx:family>
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|
<xilinx:family xilinx:lifeCycle="Production">aartix7</xilinx:family>
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|
<xilinx:family xilinx:lifeCycle="Production">qartix7</xilinx:family>
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|
<xilinx:family xilinx:lifeCycle="Production">zynq</xilinx:family>
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|
<xilinx:family xilinx:lifeCycle="Production">qzynq</xilinx:family>
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|
<xilinx:family xilinx:lifeCycle="Production">azynq</xilinx:family>
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<xilinx:family xilinx:lifeCycle="Production">spartan7</xilinx:family>
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<xilinx:family xilinx:lifeCycle="Production">aspartan7</xilinx:family>
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<xilinx:family xilinx:lifeCycle="Production">virtexu</xilinx:family>
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<xilinx:family xilinx:lifeCycle="Production">zynquplus</xilinx:family>
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<xilinx:family xilinx:lifeCycle="Production">virtexuplus</xilinx:family>
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<xilinx:family xilinx:lifeCycle="Production">virtexuplusHBM</xilinx:family>
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<xilinx:family xilinx:lifeCycle="Production">virtexuplus58g</xilinx:family>
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<xilinx:family xilinx:lifeCycle="Production">kintexuplus</xilinx:family>
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<xilinx:family xilinx:lifeCycle="Production">kintexu</xilinx:family>
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<xilinx:family xilinx:lifeCycle="Production">azynquplus</xilinx:family>
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<xilinx:family xilinx:lifeCycle="Production">qkintexu</xilinx:family>
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<xilinx:family xilinx:lifeCycle="Production">qkintexuplus</xilinx:family>
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|
<xilinx:family xilinx:lifeCycle="Production">qrkintexu</xilinx:family>
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|
<xilinx:family xilinx:lifeCycle="Production">qvirtexuplus</xilinx:family>
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|
<xilinx:family xilinx:lifeCycle="Production">qzynquplus</xilinx:family>
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|
<xilinx:family xilinx:lifeCycle="Production">qzynquplusRFSOC</xilinx:family>
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|
<xilinx:family xilinx:lifeCycle="Production">zynquplusRFSOC</xilinx:family>
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|
</xilinx:supportedFamilies>
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|
<xilinx:taxonomies>
|
|
<xilinx:taxonomy>/Analog_Devices</xilinx:taxonomy>
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|
</xilinx:taxonomies>
|
|
<xilinx:displayName>axi_spdif_rx_v1_0</xilinx:displayName>
|
|
<xilinx:definitionSource>package_project</xilinx:definitionSource>
|
|
<xilinx:vendorDisplayName>Analog Devices</xilinx:vendorDisplayName>
|
|
<xilinx:vendorURL>http://www.analog.com</xilinx:vendorURL>
|
|
<xilinx:coreRevision>1</xilinx:coreRevision>
|
|
<xilinx:coreCreationDateTime>2021-12-09T07:16:38Z</xilinx:coreCreationDateTime>
|
|
</xilinx:coreExtensions>
|
|
<xilinx:packagingInfo>
|
|
<xilinx:xilinxVersion>2019.1.3</xilinx:xilinxVersion>
|
|
<xilinx:checksum xilinx:scope="fileGroups" xilinx:value="a5abba93"/>
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|
<xilinx:checksum xilinx:scope="ports" xilinx:value="bea03ad2"/>
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|
<xilinx:checksum xilinx:scope="hdlParameters" xilinx:value="48c4d1b8"/>
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<xilinx:checksum xilinx:scope="parameters" xilinx:value="f0039951"/>
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|
</xilinx:packagingInfo>
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|
</spirit:vendorExtensions>
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|
</spirit:component>
|