Archived
1565 lines
66 KiB
XML
1565 lines
66 KiB
XML
<?xml version="1.0" encoding="UTF-8"?>
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<spirit:component xmlns:xilinx="http://www.xilinx.com" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
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<spirit:vendor>analog.com</spirit:vendor>
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<spirit:library>user</spirit:library>
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<spirit:name>axi_dacfifo</spirit:name>
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<spirit:version>1.0</spirit:version>
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<spirit:busInterfaces>
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<spirit:busInterface>
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<spirit:name>axi</spirit:name>
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<spirit:busType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="aximm" spirit:version="1.0"/>
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<spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="aximm_rtl" spirit:version="1.0"/>
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<spirit:master>
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<spirit:addressSpaceRef spirit:addressSpaceRef="axi"/>
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</spirit:master>
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<spirit:portMaps>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>AWID</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>axi_awid</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>AWADDR</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>axi_awaddr</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>AWLEN</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>axi_awlen</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>AWSIZE</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>axi_awsize</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>AWBURST</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>axi_awburst</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>AWLOCK</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>axi_awlock</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>AWCACHE</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>axi_awcache</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>AWPROT</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>axi_awprot</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>AWQOS</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>axi_awqos</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>AWVALID</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>axi_awvalid</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>AWREADY</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>axi_awready</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>WDATA</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>axi_wdata</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>WSTRB</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>axi_wstrb</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>WLAST</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>axi_wlast</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>WVALID</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>axi_wvalid</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>WREADY</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>axi_wready</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>BID</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>axi_bid</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>BRESP</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>axi_bresp</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>BVALID</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>axi_bvalid</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>BREADY</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>axi_bready</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>ARID</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>axi_arid</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>ARADDR</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>axi_araddr</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>ARLEN</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>axi_arlen</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>ARSIZE</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>axi_arsize</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>ARBURST</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>axi_arburst</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>ARLOCK</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>axi_arlock</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>ARCACHE</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>axi_arcache</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>ARPROT</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>axi_arprot</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>ARQOS</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>axi_arqos</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>ARVALID</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>axi_arvalid</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>ARREADY</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>axi_arready</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>RID</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>axi_rid</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>RDATA</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>axi_rdata</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>RRESP</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>axi_rresp</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>RLAST</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>axi_rlast</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>RVALID</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>axi_rvalid</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>RREADY</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>axi_rready</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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</spirit:portMaps>
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</spirit:busInterface>
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<spirit:busInterface>
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<spirit:name>axi_clk</spirit:name>
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<spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock" spirit:version="1.0"/>
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<spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock_rtl" spirit:version="1.0"/>
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<spirit:slave/>
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<spirit:portMaps>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>CLK</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>axi_clk</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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</spirit:portMaps>
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<spirit:parameters>
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<spirit:parameter>
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<spirit:name>ASSOCIATED_BUSIF</spirit:name>
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<spirit:value spirit:id="BUSIFPARAM_VALUE.AXI_CLK.ASSOCIATED_BUSIF">axi</spirit:value>
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</spirit:parameter>
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<spirit:parameter>
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<spirit:name>ASSOCIATED_RESET</spirit:name>
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<spirit:value spirit:id="BUSIFPARAM_VALUE.AXI_CLK.ASSOCIATED_RESET">axi_resetn</spirit:value>
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</spirit:parameter>
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</spirit:parameters>
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</spirit:busInterface>
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<spirit:busInterface>
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<spirit:name>axi_resetn</spirit:name>
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<spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="reset" spirit:version="1.0"/>
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<spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="reset_rtl" spirit:version="1.0"/>
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<spirit:slave/>
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<spirit:portMaps>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>RST</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>axi_resetn</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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</spirit:portMaps>
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<spirit:parameters>
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<spirit:parameter>
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<spirit:name>POLARITY</spirit:name>
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<spirit:value spirit:id="BUSIFPARAM_VALUE.AXI_RESETN.POLARITY" spirit:choiceRef="choice_list_74b5137e">ACTIVE_LOW</spirit:value>
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</spirit:parameter>
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</spirit:parameters>
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</spirit:busInterface>
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<spirit:busInterface>
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<spirit:name>dma_clk</spirit:name>
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<spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock" spirit:version="1.0"/>
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<spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock_rtl" spirit:version="1.0"/>
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<spirit:slave/>
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<spirit:portMaps>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>CLK</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>dma_clk</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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</spirit:portMaps>
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<spirit:parameters>
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<spirit:parameter>
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<spirit:name>ASSOCIATED_RESET</spirit:name>
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<spirit:value spirit:id="BUSIFPARAM_VALUE.DMA_CLK.ASSOCIATED_RESET">dma_rst</spirit:value>
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</spirit:parameter>
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</spirit:parameters>
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</spirit:busInterface>
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<spirit:busInterface>
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<spirit:name>dma_rst</spirit:name>
|
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<spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="reset" spirit:version="1.0"/>
|
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<spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="reset_rtl" spirit:version="1.0"/>
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|
<spirit:slave/>
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|
<spirit:portMaps>
|
|
<spirit:portMap>
|
|
<spirit:logicalPort>
|
|
<spirit:name>RST</spirit:name>
|
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</spirit:logicalPort>
|
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<spirit:physicalPort>
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<spirit:name>dma_rst</spirit:name>
|
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</spirit:physicalPort>
|
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</spirit:portMap>
|
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</spirit:portMaps>
|
|
</spirit:busInterface>
|
|
<spirit:busInterface>
|
|
<spirit:name>dac_clk</spirit:name>
|
|
<spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock" spirit:version="1.0"/>
|
|
<spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock_rtl" spirit:version="1.0"/>
|
|
<spirit:slave/>
|
|
<spirit:portMaps>
|
|
<spirit:portMap>
|
|
<spirit:logicalPort>
|
|
<spirit:name>CLK</spirit:name>
|
|
</spirit:logicalPort>
|
|
<spirit:physicalPort>
|
|
<spirit:name>dac_clk</spirit:name>
|
|
</spirit:physicalPort>
|
|
</spirit:portMap>
|
|
</spirit:portMaps>
|
|
<spirit:parameters>
|
|
<spirit:parameter>
|
|
<spirit:name>ASSOCIATED_RESET</spirit:name>
|
|
<spirit:value spirit:id="BUSIFPARAM_VALUE.DAC_CLK.ASSOCIATED_RESET">dac_rst</spirit:value>
|
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</spirit:parameter>
|
|
</spirit:parameters>
|
|
</spirit:busInterface>
|
|
<spirit:busInterface>
|
|
<spirit:name>dac_rst</spirit:name>
|
|
<spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="reset" spirit:version="1.0"/>
|
|
<spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="reset_rtl" spirit:version="1.0"/>
|
|
<spirit:slave/>
|
|
<spirit:portMaps>
|
|
<spirit:portMap>
|
|
<spirit:logicalPort>
|
|
<spirit:name>RST</spirit:name>
|
|
</spirit:logicalPort>
|
|
<spirit:physicalPort>
|
|
<spirit:name>dac_rst</spirit:name>
|
|
</spirit:physicalPort>
|
|
</spirit:portMap>
|
|
</spirit:portMaps>
|
|
</spirit:busInterface>
|
|
</spirit:busInterfaces>
|
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<spirit:addressSpaces>
|
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<spirit:addressSpace>
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<spirit:name>axi</spirit:name>
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<spirit:range spirit:format="long">4294967296</spirit:range>
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<spirit:width spirit:format="long">512</spirit:width>
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</spirit:addressSpace>
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</spirit:addressSpaces>
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<spirit:model>
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<spirit:views>
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<spirit:view>
|
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<spirit:name>xilinx_anylanguagesynthesis</spirit:name>
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<spirit:displayName>Synthesis</spirit:displayName>
|
|
<spirit:envIdentifier>:vivado.xilinx.com:synthesis</spirit:envIdentifier>
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<spirit:language>Verilog</spirit:language>
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<spirit:modelName>axi_dacfifo</spirit:modelName>
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<spirit:fileSetRef>
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<spirit:localName>xilinx_anylanguagesynthesis_view_fileset</spirit:localName>
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</spirit:fileSetRef>
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<spirit:parameters>
|
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<spirit:parameter>
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<spirit:name>viewChecksum</spirit:name>
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<spirit:value>546a9a5f</spirit:value>
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</spirit:parameter>
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</spirit:parameters>
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</spirit:view>
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<spirit:view>
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<spirit:displayName>Axi Length</spirit:displayName>
|
|
<spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.AXI_LENGTH">15</spirit:value>
|
|
</spirit:modelParameter>
|
|
<spirit:modelParameter spirit:dataType="integer">
|
|
<spirit:name>AXI_ADDRESS</spirit:name>
|
|
<spirit:displayName>Axi Address</spirit:displayName>
|
|
<spirit:value spirit:format="bitString" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.AXI_ADDRESS" spirit:bitStringLength="32">0x00000000</spirit:value>
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|
</spirit:modelParameter>
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|
<spirit:modelParameter spirit:dataType="integer">
|
|
<spirit:name>AXI_ADDRESS_LIMIT</spirit:name>
|
|
<spirit:displayName>Axi Address Limit</spirit:displayName>
|
|
<spirit:value spirit:format="bitString" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.AXI_ADDRESS_LIMIT" spirit:bitStringLength="32">0xFFFFFFFF</spirit:value>
|
|
</spirit:modelParameter>
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</spirit:modelParameters>
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</spirit:model>
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|
<spirit:choices>
|
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<spirit:choice>
|
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<spirit:name>choice_list_74b5137e</spirit:name>
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<spirit:enumeration>ACTIVE_HIGH</spirit:enumeration>
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<spirit:enumeration>ACTIVE_LOW</spirit:enumeration>
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</spirit:choice>
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</spirit:choices>
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|
<spirit:fileSet>
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|
<spirit:name>xilinx_anylanguagesynthesis_view_fileset</spirit:name>
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|
<spirit:file>
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|
<spirit:name>axi_dacfifo_constr.xdc</spirit:name>
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|
<spirit:userFileType>xdc</spirit:userFileType>
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|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>../../common/ad_axis_inf_rx.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
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|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>../../common/ad_b2g.v</spirit:name>
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|
<spirit:fileType>verilogSource</spirit:fileType>
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</spirit:file>
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<spirit:file>
|
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<spirit:name>../../common/ad_g2b.v</spirit:name>
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|
<spirit:fileType>verilogSource</spirit:fileType>
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|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>../../common/ad_mem.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
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|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>../../common/ad_mem_asym.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
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|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>axi_dacfifo_address_buffer.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>axi_dacfifo_rd.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>axi_dacfifo_wr.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>../../util_dacfifo/util_dacfifo_bypass.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
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|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>axi_dacfifo.v</spirit:name>
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<spirit:fileType>verilogSource</spirit:fileType>
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<spirit:userFileType>CHECKSUM_ea154f34</spirit:userFileType>
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</spirit:file>
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</spirit:fileSet>
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<spirit:fileSet>
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<spirit:name>xilinx_anylanguagebehavioralsimulation_view_fileset</spirit:name>
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|
<spirit:file>
|
|
<spirit:name>../../common/ad_axis_inf_rx.v</spirit:name>
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|
<spirit:fileType>verilogSource</spirit:fileType>
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|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>../../common/ad_b2g.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
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|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>../../common/ad_g2b.v</spirit:name>
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|
<spirit:fileType>verilogSource</spirit:fileType>
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|
</spirit:file>
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|
<spirit:file>
|
|
<spirit:name>../../common/ad_mem.v</spirit:name>
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|
<spirit:fileType>verilogSource</spirit:fileType>
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|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>../../common/ad_mem_asym.v</spirit:name>
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|
<spirit:fileType>verilogSource</spirit:fileType>
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|
</spirit:file>
|
|
<spirit:file>
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|
<spirit:name>axi_dacfifo_address_buffer.v</spirit:name>
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|
<spirit:fileType>verilogSource</spirit:fileType>
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</spirit:file>
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|
<spirit:file>
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|
<spirit:name>axi_dacfifo_rd.v</spirit:name>
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<spirit:fileType>verilogSource</spirit:fileType>
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</spirit:file>
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|
<spirit:file>
|
|
<spirit:name>axi_dacfifo_wr.v</spirit:name>
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|
<spirit:fileType>verilogSource</spirit:fileType>
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|
</spirit:file>
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|
<spirit:file>
|
|
<spirit:name>../../util_dacfifo/util_dacfifo_bypass.v</spirit:name>
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|
<spirit:fileType>verilogSource</spirit:fileType>
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|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>axi_dacfifo.v</spirit:name>
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|
<spirit:fileType>verilogSource</spirit:fileType>
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|
</spirit:file>
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|
</spirit:fileSet>
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|
<spirit:fileSet>
|
|
<spirit:name>xilinx_xpgui_view_fileset</spirit:name>
|
|
<spirit:file>
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|
<spirit:name>xgui/axi_dacfifo_v1_0.tcl</spirit:name>
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|
<spirit:fileType>tclSource</spirit:fileType>
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|
<spirit:userFileType>CHECKSUM_bde7c6b3</spirit:userFileType>
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|
<spirit:userFileType>XGUI_VERSION_2</spirit:userFileType>
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</spirit:file>
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</spirit:fileSet>
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<spirit:description>axi_dacfifo_v1_0</spirit:description>
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|
<spirit:parameters>
|
|
<spirit:parameter>
|
|
<spirit:name>DAC_DATA_WIDTH</spirit:name>
|
|
<spirit:displayName>Dac Data Width</spirit:displayName>
|
|
<spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.DAC_DATA_WIDTH">64</spirit:value>
|
|
</spirit:parameter>
|
|
<spirit:parameter>
|
|
<spirit:name>DMA_DATA_WIDTH</spirit:name>
|
|
<spirit:displayName>Dma Data Width</spirit:displayName>
|
|
<spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.DMA_DATA_WIDTH">64</spirit:value>
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|
</spirit:parameter>
|
|
<spirit:parameter>
|
|
<spirit:name>AXI_DATA_WIDTH</spirit:name>
|
|
<spirit:displayName>Axi Data Width</spirit:displayName>
|
|
<spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.AXI_DATA_WIDTH">512</spirit:value>
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|
</spirit:parameter>
|
|
<spirit:parameter>
|
|
<spirit:name>AXI_SIZE</spirit:name>
|
|
<spirit:displayName>Axi Size</spirit:displayName>
|
|
<spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.AXI_SIZE">2</spirit:value>
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|
</spirit:parameter>
|
|
<spirit:parameter>
|
|
<spirit:name>AXI_LENGTH</spirit:name>
|
|
<spirit:displayName>Axi Length</spirit:displayName>
|
|
<spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.AXI_LENGTH">15</spirit:value>
|
|
</spirit:parameter>
|
|
<spirit:parameter>
|
|
<spirit:name>AXI_ADDRESS</spirit:name>
|
|
<spirit:displayName>Axi Address</spirit:displayName>
|
|
<spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.AXI_ADDRESS" spirit:bitStringLength="32">0x00000000</spirit:value>
|
|
</spirit:parameter>
|
|
<spirit:parameter>
|
|
<spirit:name>AXI_ADDRESS_LIMIT</spirit:name>
|
|
<spirit:displayName>Axi Address Limit</spirit:displayName>
|
|
<spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.AXI_ADDRESS_LIMIT" spirit:bitStringLength="32">0xFFFFFFFF</spirit:value>
|
|
</spirit:parameter>
|
|
<spirit:parameter>
|
|
<spirit:name>Component_Name</spirit:name>
|
|
<spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.Component_Name" spirit:order="1">axi_dacfifo_v1_0</spirit:value>
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|
</spirit:parameter>
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|
</spirit:parameters>
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|
<spirit:vendorExtensions>
|
|
<xilinx:coreExtensions>
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|
<xilinx:supportedFamilies>
|
|
<xilinx:family xilinx:lifeCycle="Production">virtex7</xilinx:family>
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<xilinx:family xilinx:lifeCycle="Production">zynquplusRFSOC</xilinx:family>
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</xilinx:supportedFamilies>
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<xilinx:taxonomies>
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|
<xilinx:taxonomy>/Analog_Devices</xilinx:taxonomy>
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</xilinx:taxonomies>
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<xilinx:displayName>axi_dacfifo_v1_0</xilinx:displayName>
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<xilinx:definitionSource>package_project</xilinx:definitionSource>
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<xilinx:vendorDisplayName>Analog Devices</xilinx:vendorDisplayName>
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<xilinx:vendorURL>http://www.analog.com</xilinx:vendorURL>
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<xilinx:coreRevision>1</xilinx:coreRevision>
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<xilinx:coreCreationDateTime>2021-12-09T07:20:20Z</xilinx:coreCreationDateTime>
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|
</xilinx:coreExtensions>
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<xilinx:packagingInfo>
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|
<xilinx:xilinxVersion>2019.1.3</xilinx:xilinxVersion>
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