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自动频点切换程序已经测试可用,对应程序为duifei_online_acq_par_20230511.xpr和dl814_dj_48m_20230511.xpr
This commit is contained in:
josh
2023-05-11 19:20:44 +08:00
parent c8b75a293f
commit 0f97436c8f
194 changed files with 8097 additions and 3586 deletions
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projects/dl814_dj/dl814_dj_48m/rtl/rf_auto_switch_freq.v
+76 -32
View File
@@ -1,44 +1,47 @@
`timescale 1ns / 1ps
//////////////////////////////////////////////////////////////////////////////////
// Company:
// Engineer:
//
// Company:
// Engineer:
//
// Create Date: 2023/05/06 15:37:29
// Design Name:
// Design Name:
// Module Name: rf_auto_switch_freq
// Project Name:
// Target Devices:
// Tool Versions:
// Description:
//
// Dependencies:
//
// Project Name:
// Target Devices:
// Tool Versions:
// Description:
//
// Dependencies:
//
// Revision:
// Revision 0.01 - File Created
// Additional Comments:
//
//
//////////////////////////////////////////////////////////////////////////////////
module rf_auto_switch_freq(
input clk ,
input rst ,
input clk ,
input rst ,
// vio control
input start , // rise-edge active, if start, change freq word to the first
input auto_test_enable , // rise-edge active
input rf_ctrl_mode , // 1 : auto switch, 0 : manual switch
input switch_next_freq , // rise-edge active
input switch_last_freq , // rise-edge active
input [15:0] cnt_valid_to_switch , // clock number from valid to switch
input [31:0] cnt_valid_to_switch , // clock number from valid to switch
input [31:0] test_slot_length ,
// input
input [10:0] freq_hop_words_vio ,
input hop_words_valid_vio ,
input freq_hop_switch_vio ,
// output
input [10:0] freq_hop_words_vio ,
input hop_words_valid_vio ,
input freq_hop_switch_vio ,
// output
output reg [10:0] freq_hop_words_auto = 11'd0 ,
output reg hop_words_valid_auto = 1'd0 ,
output reg freq_hop_switch_auto = 1'd0
output reg freq_hop_switch_auto = 1'd0 ,
output reg sync_signal = 1'b0 // sync signal from DJ to JD
);
//************************* rise-edge detect ***********************************
reg start_d1 = 1'b0;
reg start_d2 = 1'b0;
@@ -49,6 +52,9 @@ reg [9:0] switch_next_freq_pulse = 10'd0;
reg switch_last_freq_d1 = 1'b0;
reg switch_last_freq_d2 = 1'b0;
reg [9:0] switch_last_freq_pulse = 10'd0;
reg auto_test_enable_d1 = 1'b0;
reg auto_test_enable_d2 = 1'b0;
reg auto_test_enable_pulse = 1'b0;
always @ (posedge clk)
if(rst) begin
start_d1 <= 1'b0;
@@ -60,6 +66,9 @@ always @ (posedge clk)
switch_last_freq_d1 <= 1'b0;
switch_last_freq_d2 <= 1'b0;
switch_last_freq_pulse <= 10'd0;
auto_test_enable_d1 <= 1'b0;
auto_test_enable_d2 <= 1'b0;
auto_test_enable_pulse <= 1'b0;
end else begin
start_d1 <= start;
start_d2 <= start_d1;
@@ -72,13 +81,35 @@ always @ (posedge clk)
switch_last_freq_d2 <= switch_last_freq_d1;
switch_last_freq_pulse[0] <= switch_last_freq_d1 & ~switch_last_freq_d2;
switch_last_freq_pulse[9:1] <= switch_last_freq_pulse[8:0];
auto_test_enable_d1 <= auto_test_enable;
auto_test_enable_d2 <= auto_test_enable_d1;
auto_test_enable_pulse <= auto_test_enable_d1 & ~auto_test_enable_d2;
end
//************************ auto test logic *************************************
reg auto_test_enable_reg = 1'b0;
reg [31:0] auto_test_cnt = 32'd0;
reg [7:0] freq_word_cnt = 8'd0; // range 0 -> 80
always @ (posedge clk)
if(rst | start_pulse)
auto_test_enable_reg <= 1'b0;
else if(auto_test_enable_pulse && ~auto_test_enable_reg)
auto_test_enable_reg <= 1'b1;
else if(auto_test_cnt == test_slot_length && freq_word_cnt == 8'd80)
auto_test_enable_reg <= 1'b0;
always @ (posedge clk)
if(rst | start_pulse)
auto_test_cnt <= 32'd0;
else if(auto_test_cnt == test_slot_length)
auto_test_cnt <= 32'd0;
else if(auto_test_enable_reg)
auto_test_cnt <= auto_test_cnt + 1'b1;
//******************** local freq word control *********************************
reg [10:0] local_freq_word = 11'd0;
reg local_freq_word_valid = 1'b0;
reg local_freq_word_switch = 1'b0;
reg [7:0] freq_word_cnt = 8'd0; // range 0 -> 80
wire [10:0] rom_freq_word_dout;
// 2 clock latency
rom_freq_word rom_freq_word_inst(
@@ -92,8 +123,12 @@ always @ (posedge clk)
freq_word_cnt <= 8'd0;
else if(freq_word_cnt == 8'd80 && switch_next_freq_pulse[0])
freq_word_cnt <= 8'd0;
else if(freq_word_cnt == 8'd80 && auto_test_cnt == test_slot_length)
freq_word_cnt <= 8'd0;
else if(freq_word_cnt == 8'd0 && switch_last_freq_pulse[0])
freq_word_cnt <= 8'd80;
else if(auto_test_cnt == test_slot_length)
freq_word_cnt <= freq_word_cnt + 1'b1;
else if(switch_next_freq_pulse[0])
freq_word_cnt <= freq_word_cnt + 1'b1;
else if(switch_last_freq_pulse[0])
@@ -104,20 +139,20 @@ always @ (posedge clk)
always @ (posedge clk)
if(rst | start_pulse)
local_freq_word_valid <= 1'b0;
else if(switch_next_freq_pulse[4] | switch_last_freq_pulse[4])
else if(switch_next_freq_pulse[4] | switch_last_freq_pulse[4] | auto_test_cnt == 32'd4)
local_freq_word_valid <= 1'b1;
else
else if(auto_test_cnt == 32'd104)
local_freq_word_valid <= 1'b0;
reg [15:0] freq_word_valid_cnt = 16'd0;
reg [31:0] freq_word_valid_cnt = 32'd0;
always @ (posedge clk)
if(rst | start_pulse)
freq_word_valid_cnt <= 16'd0;
freq_word_valid_cnt <= 32'd0;
else if(freq_word_valid_cnt == cnt_valid_to_switch)
freq_word_valid_cnt <= 16'd0;
freq_word_valid_cnt <= 32'd0;
else if(local_freq_word_valid)
freq_word_valid_cnt <= freq_word_valid_cnt + 1'b1;
else if(freq_word_valid_cnt != 16'd0)
else if(freq_word_valid_cnt != 32'd0)
freq_word_valid_cnt <= freq_word_valid_cnt + 1'b1;
else
freq_word_valid_cnt <= freq_word_valid_cnt;
@@ -125,11 +160,13 @@ always @ (posedge clk)
always @ (posedge clk)
if(rst | start_pulse)
local_freq_word_switch <= 1'b0;
else if(freq_word_valid_cnt == cnt_valid_to_switch)
else if(freq_word_valid_cnt == cnt_valid_to_switch - 32'd100)
local_freq_word_switch <= 1'b1;
else
else if(freq_word_valid_cnt == cnt_valid_to_switch)
local_freq_word_switch <= 1'b0;
always @ (posedge clk)
if(rst | start_pulse)
local_freq_word <= 11'd0;
@@ -154,7 +191,7 @@ always @ (posedge clk)
hop_words_valid_auto <= local_freq_word_valid;
else
hop_words_valid_auto <= hop_words_valid_vio;
// freq_hop_switch_auto
always @ (posedge clk)
if(rst | start_pulse)
@@ -163,5 +200,12 @@ always @ (posedge clk)
freq_hop_switch_auto <= local_freq_word_switch;
else
freq_hop_switch_auto <= freq_hop_switch_vio;
// sync_signal
always @ (posedge clk)
if(rst | start_pulse)
sync_signal <= 1'b0;
else if(~freq_hop_switch_auto & local_freq_word_switch)
sync_signal <= ~sync_signal;
endmodule
projects/dl814_dj/dl814_dj_48m/rtl/system_top.v
+19 -15
View File
@@ -109,7 +109,12 @@ module system_top
inout [53:0] fixed_io_mio ,
inout fixed_io_ps_clk ,
inout fixed_io_ps_porb ,
inout fixed_io_ps_srstb
inout fixed_io_ps_srstb ,
// *************************************************************************
// ************************* Sync Signal ***********************************
// *************************************************************************
output sync_signal_out ,
output reg sync_gnd = 1'b0
);
@@ -278,11 +283,13 @@ assign rx_gain_4bit = rx_gain[4];
assign rx_gain_3bit = rx_gain[3];
// rf auto switch frequency function
wire auto_test_enable_vio;
wire rf_auto_start_vio ;
wire rf_ctrl_mode_vio ;
wire switch_next_freq_vio;
wire switch_last_freq_vio;
wire [15:0] cnt_valid_to_switch_vio;
wire [31:0] cnt_valid_to_switch_vio;
wire [31:0] test_slot_length_vio;
wire [10:0] freq_hop_words_auto ;
wire hop_words_valid_auto;
@@ -293,10 +300,12 @@ rf_auto_switch_freq u_rf_auto_switch_freq(
.rst (sys_rst ),
// vio control
.start (rf_auto_start_vio ), // rise-edge active, if start, change freq word to the first
.auto_test_enable (auto_test_enable_vio ), // rise-edge active
.rf_ctrl_mode (rf_ctrl_mode_vio ), // 1 : auto switch, 0 : manual switch
.switch_next_freq (switch_next_freq_vio ), // rise-edge active
.switch_last_freq (switch_last_freq_vio ), // rise-edge active
.cnt_valid_to_switch (cnt_valid_to_switch_vio ),
.cnt_valid_to_switch (cnt_valid_to_switch_vio ), // the clock number from valid to switch
.test_slot_length (test_slot_length_vio[31:0] ),
// input
.freq_hop_words_vio (freq_hop_words_vio[10:0] ),
.hop_words_valid_vio (hop_words_valid_vio ),
@@ -304,46 +313,38 @@ rf_auto_switch_freq u_rf_auto_switch_freq(
// output
.freq_hop_words_auto (freq_hop_words_auto[10:0] ),
.hop_words_valid_auto (hop_words_valid_auto ),
.freq_hop_switch_auto (freq_hop_switch_auto )
.freq_hop_switch_auto (freq_hop_switch_auto ),
.sync_signal (sync_signal_out )
);
rf_control u_rf_control
(
rf_control u_rf_control(
.clk (sys_clk ),
.rst (sys_rst ),
//input
.gain_on_vio (gain_on_vio ),
.rf_txrx_vio (rf_txrx_vio[1:0] ),
.rf_txrx_net (2'd0 ),
.tx_gain_manual (tx_gain_manual[5:0] ),
.rx_gain_manual (rx_gain_manual[5:0] ),
//0:net->control 1:vio->control
.rf_vio_set (rf_vio_set ),
//vio hop control
.freq_hop_words_vio (freq_hop_words_auto[10:0] ),
.hop_words_valid_vio (hop_words_valid_auto ),
.freq_hop_switch_vio (freq_hop_switch_auto ),
//tx hop control
.tx_freq_hop_words (11'b0 ),
.tx_hop_words_valid (1'b0 ),
.tx_freq_hop_switch (1'b0 ),
//rx hop control
.rx_freq_hop_words (11'b0 ),
.rx_hop_words_valid (1'b0 ),
.rx_freq_hop_switch (1'b0 ),
//output
.tx_gain (tx_gain[11:0] ),
.tx_gain_on (tx_gain_on ),
.rx_gain (rx_gain[9:0] ),
.rx_gain_on (rx_gain_on ),
.freq_hop_words (freq_hop_words[10:0] ),
.hop_words_valid (hop_words_valid ),
.freq_hop_switch (freq_hop_switch ),
@@ -351,6 +352,7 @@ rf_control u_rf_control
);
////////////////////////////////////////////////////////////////////////////////
///////////////////////////// Tx Baseband Signals //////////////////////////////
////////////////////////////////////////////////////////////////////////////////
@@ -476,7 +478,9 @@ vio_rf_control u_vio_rf_control
.probe_out10 (rf_ctrl_mode_vio ), // output wire [0 : 0] probe_out10
.probe_out11 (switch_next_freq_vio ), // output wire [0 : 0] probe_out11
.probe_out12 (switch_last_freq_vio ), // output wire [0 : 0] probe_out12
.probe_out13 (cnt_valid_to_switch_vio[15:0] ), // output wire [15: 0] probe_out13
.probe_out13 (cnt_valid_to_switch_vio[31:0] ), // output wire [31: 0] probe_out13
.probe_out14 (auto_test_enable_vio ), // output wire [0 : 0] probe_out14
.probe_out15 (test_slot_length_vio[31:0] ), // output wire [31: 0] probe_out15
.probe_in0 (freq_hop_words_auto[10:0] ) // input wire [10: 0] probe_in0
);