add lcmv to dl814 online acq, add phase compensation

projects/dl814_k7/dl814_k7_online_acq/testbenches/tb_phase_comp.v

@@ -0,0 +1,77 @@
+`timescale 1ns / 1ps
+//////////////////////////////////////////////////////////////////////////////////
+// Company:
+// Engineer:
+//
+// Create Date: 05/17/2023 06:20:20 PM
+// Design Name:
+// Module Name: tb_phase_comp
+// Project Name:
+// Target Devices:
+// Tool Versions:
+// Description:
+//
+// Dependencies:
+//
+// Revision:
+// Revision 0.01 - File Created
+// Additional Comments:
+//
+//////////////////////////////////////////////////////////////////////////////////
+
+
+module tb_phase_comp;
+
+reg clk = 1'b1;
+reg rst = 1'b1;
+
+reg din_valid = 'b0;
+reg [63:0] phase = {
+    16'b001_0000_0000_0000_0,
+    16'b000_1000_0000_0000_0,
+    16'b000_0100_0000_0000_0,
+    16'b111_0000_0000_0000_0
+};
+reg [47:0] din_real = 'b0;
+reg [47:0] din_imag = 'b0;
+
+wire dout_valid;
+wire [47:0] dout_real;
+wire [47:0] dout_imag;
+
+always #10 clk = ~clk;
+
+initial begin
+    #102;
+    rst = 'b0;
+
+    #100
+    din_valid = 1'b0;
+    din_real = { 12'd1023, 12'd511,-12'd2047,-12'd127};
+    din_imag = {-12'd1023, 12'd511,-12'd0   , 12'd127};
+    #20
+    din_valid = 1'b0;
+
+    #100
+    din_real = {-12'd1023,-12'd511, 12'd2047, 12'd127};
+    din_imag = {-12'd1023, 12'd511,-12'd0   , 12'd127};
+    #20
+    din_valid = 1'b0;
+end
+
+phase_comp u_phase_comp
+(
+    .rst        (rst        ),
+    .clk        (clk        ),
+
+    .din_valid  (c  ),
+    .phase      (phase      ),
+    .din_real   (din_real   ),
+    .din_imag   (din_imag   ),
+
+    .dout_valid (dout_valid ),
+    .dout_real  (dout_real  ),
+    .dout_imag  (dout_imag  )
+);
+
+endmodule