`timescale 1ns / 1ps
//////////////////////////////////////////////////////////////////////////////////
// Company:
// Engineer:
//
// Create Date: 04/25/2023 06:48:44 PM
// Design Name:
// Module Name: tb_rx_dmf
// Project Name:
// Target Devices:
// Tool Versions:
// Description:
//
// Dependencies:
//
// Revision:
// Revision 0.01 - File Created
// Additional Comments:
//
//////////////////////////////////////////////////////////////////////////////////


module tb_rx_dmf;

// length of pseudorandom bit sequence, need to be a power of 2
localparam PRBS_LEN        = 128;
// interpolation of input signal, need to be a power of 2
localparam INTERP_RATE     =   8;
// signal processing interpolation, need to be a power of 2
localparam PROCESS_INTERP  =   4;
localparam PRBS_LEN_INTERP = PRBS_LEN*PROCESS_INTERP;
// number of accumulated symbols, need to be a power of 2
localparam ACC_SYM_NUM     =   4;

localparam DATA_I_WIDTH = 12;
localparam DATA_O_WIDTH = 18;

reg clk = 1'b1;
reg rst = 1'b1;
reg dmf_start = 'b0;

wire [11:0] tx_data_i, tx_data_q;

wire peak_valid                                 ;
wire [DATA_O_WIDTH-1 : 0] peak_value_abs          ;
wire [DATA_O_WIDTH-1 : 0] peak_value_i            ;
wire [DATA_O_WIDTH-1 : 0] peak_value_q            ;
wire [$clog2(PRBS_LEN_INTERP)-1 : 0] peak_index ;

initial begin
    #102;
    rst = 1'b0;
    #1000;
    dmf_start = ~dmf_start;

    wait (peak_valid == 1);
    #1000;
    dmf_start = ~dmf_start;

    wait (peak_valid == 1);
    #1000;
    dmf_start = ~dmf_start;

    wait (peak_valid == 1);
    #1000;
    dmf_start = ~dmf_start;
end

always #10 clk = ~clk;

tx_qpsk u_tx_qpsk
(
    .clk            (clk            ),
    .rst            (rst            ),

    .tx_data_i      (tx_data_i      ),
    .tx_data_q      (tx_data_q      ),
    // debug ports
    .waveform_sel   (2'd1           ),
    .sweep_on       (1'b0           ),
    .freq_set       ('b0            ),
    .iq_sel         (2'b11          ),
    .bb_rshift      (4'd0           )
);

rx_dmf #(
    .ACC_SYM_NUM    (ACC_SYM_NUM    )
) u_rx_dmf
(
    .clk            (clk            ),
    .rst            (rst            ),

    .dmf_start      (dmf_start      ),
    .dmf_busy       (dmf_busy       ),

    .din_valid      (~rst           ),
    .din_real       (tx_data_i      ),
    .din_imag       (tx_data_i      ),

    .peak_valid     (peak_valid     ),
    .peak_value_abs (peak_value_abs ),
    .peak_value_i   (peak_value_i   ),
    .peak_value_q   (peak_value_q   ),
    .peak_index     (peak_index     )
);

endmodule