Archived
21 lines
682 B
Tcl
21 lines
682 B
Tcl
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set_property ASYNC_REG TRUE \
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[get_cells -hier {*cdc_sync_stage1_reg*}] \
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[get_cells -hier {*cdc_sync_stage2_reg*}]
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set_false_path \
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-to [get_pins -hierarchical * -filter {NAME=~*i_driver_otw_sync/cdc_sync_stage1_reg[0]/D}]
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set_false_path \
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-to [get_pins -hierarchical * -filter {NAME=~*i_pulse_sync/cdc_sync_stage1_reg[0]/D}]
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set_false_path \
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-to [get_pins -hierarchical * -filter {NAME=~*i_sequencer_sync/cdc_sync_stage1_reg[*]/D}]
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set_false_path \
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-to [get_pins -hierarchical * -filter {NAME=~*i_sequence_offset_sync/cdc_sync_stage1_reg[*]/D}]
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set_false_path \
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-to [get_pins -hierarchical * -filter {NAME=~*i_sequence_control_sync/cdc_sync_stage1_reg[*]/D}]
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