diff --git a/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.runs/impl_1/debug_nets.ltx b/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.runs/impl_1/debug_nets.ltx deleted file mode 100644 index 7f9dba3..0000000 --- a/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.runs/impl_1/debug_nets.ltx +++ /dev/null @@ -1,5580 +0,0 @@ -{ - "ltx_root": { - "version": 4, - "minor": 0, - "ltx_data": [ - { - "name": "EDA_PROBESET", - "active": true, - "debug_cores": [ - { - "type": "XSDB_V3", - "name": "dbg_hub", - "spec": "labtools_xsdbm_v3", - "clk_input_freq_hz": "48000000" - }, - { - "type": "ILA_V3", - "name": "u_ila_AntCtrl", - "spec": "labtools_ila_v6", - "ipName": "ila", - "core_location": { - "user_chain": 1, - "slave_index": 0, - "bscan_switch_index": 0 - }, - "uuid": "4E206E6C660B571C9832C9CE4B8660D8", - "pins": [ - { - "name": "probe0", - "id": 0, - "type": "DATA_TRIGGER", - "direction": "IN", - "isVector": false, - "leftIndex": 0, - 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"name": "RF_RecvWord_last[14]" - }, - { - "name": "RF_RecvWord_last[13]" - }, - { - "name": "RF_RecvWord_last[12]" - }, - { - "name": "RF_RecvWord_last[11]" - }, - { - "name": "RF_RecvWord_last[10]" - }, - { - "name": "RF_RecvWord_last[9]" - }, - { - "name": "RF_RecvWord_last[8]" - }, - { - "name": "RF_RecvWord_last[7]" - }, - { - "name": "RF_RecvWord_last[6]" - }, - { - "name": "RF_RecvWord_last[5]" - }, - { - "name": "RF_RecvWord_last[4]" - }, - { - "name": "RF_RecvWord_last[3]" - }, - { - "name": "RF_RecvWord_last[2]" - }, - { - "name": "RF_RecvWord_last[1]" - }, - { - "name": "RF_RecvWord_last[0]" - } - ] - } - ] - } - ] - }, - { - "type": "VIO_V2", - "name": "u_vio_rfcontrl", - "spec": "labtools_vio_v3", - "ipName": "vio", - "core_location": { - "user_chain": 1, - "slave_index": 10, - "bscan_switch_index": 0 - }, - "uuid": "3895CB8B6B1755D7963C7298FD0FCD61", - "pins": [ - { - "name": "probe_out0", - "id": 115, - "type": "DATA", - "direction": "OUT", - "isVector": false, - "leftIndex": 0, - "rightIndex": 0, - "portIndex": 0, - "nets": [ - { - "name": "vio_switch", - "isBus": false - } - ] - }, - { - "name": "probe_out1", - "id": 116, - "type": "DATA", - "direction": "OUT", - "isVector": false, - "leftIndex": 0, - "rightIndex": 0, - "portIndex": 1, - "nets": [ - { - "name": "vio_trdirection", - "isBus": false - } - ] - }, - { - "name": "probe_out2", - "id": 117, - "type": "DATA", - "direction": "OUT", - "isVector": true, - "leftIndex": 0, - "rightIndex": 15, - "portIndex": 2, - "nets": [ - { - "name": "vio_frequency", - "isBus": true, - "subnets": [ - { - "name": "vio_frequency[15]" - }, - { - "name": "vio_frequency[14]" - }, - { - "name": "vio_frequency[13]" - }, - { - "name": "vio_frequency[12]" - }, - { - "name": "vio_frequency[11]" - }, - { - "name": "vio_frequency[10]" - }, - { - "name": "vio_frequency[9]" - }, - { - "name": "vio_frequency[8]" - }, - { - "name": "vio_frequency[7]" - }, - { - "name": "vio_frequency[6]" - }, - { - "name": "vio_frequency[5]" - }, - { - "name": "vio_frequency[4]" - }, - { - "name": "vio_frequency[3]" - }, - { - "name": "vio_frequency[2]" - }, - { - "name": "vio_frequency[1]" - }, - { - "name": "vio_frequency[0]" - } - ] - } - ] - }, - { - "name": "probe_out3", - "id": 118, - "type": "DATA", - "direction": "OUT", - "isVector": true, - "leftIndex": 0, - "rightIndex": 7, - "portIndex": 3, - "nets": [ - { - "name": "vio_emitMGC", - "isBus": true, - "subnets": [ - { - "name": "vio_emitMGC[7]" - }, - { - "name": "vio_emitMGC[6]" - }, - { - "name": "vio_emitMGC[5]" - }, - { - "name": "vio_emitMGC[4]" - }, - { - "name": "vio_emitMGC[3]" - }, - { - "name": "vio_emitMGC[2]" - }, - { - "name": "vio_emitMGC[1]" - }, - { - "name": "vio_emitMGC[0]" - } - ] - } - ] - }, - { - "name": "probe_out4", - "id": 119, - "type": "DATA", - "direction": "OUT", - "isVector": true, - "leftIndex": 0, - "rightIndex": 3, - "portIndex": 4, - "nets": [ - { - "name": "vio_ch01MGC", - "isBus": true, - "subnets": [ - { - "name": "vio_ch01MGC[3]" - }, - { - "name": "vio_ch01MGC[2]" - }, - { - "name": "vio_ch01MGC[1]" - }, - { - "name": "vio_ch01MGC[0]" - } - ] - } - ] - }, - { - "name": "probe_out5", - "id": 120, - "type": "DATA", - "direction": "OUT", - "isVector": true, - "leftIndex": 0, - "rightIndex": 3, - "portIndex": 5, - "nets": [ - { - "name": "vio_ch02MGC", - "isBus": true, - "subnets": [ - { - "name": "vio_ch02MGC[3]" - }, - { - "name": "vio_ch02MGC[2]" - }, - { - "name": "vio_ch02MGC[1]" - }, - { - "name": "vio_ch02MGC[0]" - } - ] - } - ] - }, - { - "name": "probe_out6", - "id": 121, - "type": "DATA", - "direction": "OUT", - "isVector": true, - "leftIndex": 0, - "rightIndex": 3, - "portIndex": 6, - "nets": [ - { - "name": "vio_ch03MGC", - "isBus": true, - "subnets": [ - { - "name": "vio_ch03MGC[3]" - }, - { - "name": "vio_ch03MGC[2]" - }, - { - "name": "vio_ch03MGC[1]" - }, - { - "name": "vio_ch03MGC[0]" - } - ] - } - ] - }, - { - "name": "probe_out7", - "id": 122, - "type": "DATA", - "direction": "OUT", - "isVector": true, - "leftIndex": 0, - "rightIndex": 3, - "portIndex": 7, - "nets": [ - { - "name": "vio_ch04MGC", - "isBus": true, - "subnets": [ - { - "name": "vio_ch04MGC[3]" - }, - { - "name": "vio_ch04MGC[2]" - }, - { - "name": "vio_ch04MGC[1]" - }, - { - "name": "vio_ch04MGC[0]" - } - ] - } - ] - }, - { - "name": "probe_out8", - "id": 123, - "type": "DATA", - "direction": "OUT", - "isVector": true, - "leftIndex": 0, - "rightIndex": 7, - "portIndex": 8, - "nets": [ - { - "name": "vio_recvMGC", - "isBus": true, - "subnets": [ - { - "name": "vio_recvMGC[7]" - }, - { - "name": "vio_recvMGC[6]" - }, - { - "name": "vio_recvMGC[5]" - }, - { - "name": "vio_recvMGC[4]" - }, - { - "name": "vio_recvMGC[3]" - }, - { - "name": "vio_recvMGC[2]" - }, - { - "name": "vio_recvMGC[1]" - }, - { - "name": "vio_recvMGC[0]" - } - ] - } - ] - }, - { - "name": "probe_out9", - "id": 124, - "type": "DATA", - "direction": "OUT", - "isVector": true, - "leftIndex": 0, - "rightIndex": 7, - "portIndex": 9, - "nets": [ - { - "name": "vio_AntMod", - "isBus": true, - "subnets": [ - { - "name": "vio_AntMod[7]" - }, - { - "name": "vio_AntMod[6]" - }, - { - "name": "vio_AntMod[5]" - }, - { - "name": "vio_AntMod[4]" - }, - { - "name": "vio_AntMod[3]" - }, - { - "name": "vio_AntMod[2]" - }, - { - "name": "vio_AntMod[1]" - }, - { - "name": "vio_AntMod[0]" - } - ] - } - ] - }, - { - "name": "probe_out10", - "id": 125, - "type": "DATA", - "direction": "OUT", - "isVector": true, - "leftIndex": 0, - "rightIndex": 15, - "portIndex": 10, - "nets": [ - { - "name": "vio_AntOffAxis", - "isBus": true, - "subnets": [ - { - "name": "vio_AntOffAxis[15]" - }, - { - "name": "vio_AntOffAxis[14]" - }, - { - "name": "vio_AntOffAxis[13]" - }, - { - "name": "vio_AntOffAxis[12]" - }, - { - "name": "vio_AntOffAxis[11]" - }, - { - "name": "vio_AntOffAxis[10]" - }, - { - "name": "vio_AntOffAxis[9]" - }, - { - "name": "vio_AntOffAxis[8]" - }, - { - "name": "vio_AntOffAxis[7]" - }, - { - "name": "vio_AntOffAxis[6]" - }, - { - "name": "vio_AntOffAxis[5]" - }, - { - "name": "vio_AntOffAxis[4]" - }, - { - "name": "vio_AntOffAxis[3]" - }, - { - "name": "vio_AntOffAxis[2]" - }, - { - "name": "vio_AntOffAxis[1]" - }, - { - "name": "vio_AntOffAxis[0]" - } - ] - } - ] - }, - { - "name": "probe_out11", - "id": 126, - "type": "DATA", - "direction": "OUT", - "isVector": true, - "leftIndex": 0, - "rightIndex": 15, - "portIndex": 11, - "nets": [ - { - "name": "vio_AntYaw", - "isBus": true, - "subnets": [ - { - "name": "vio_AntYaw[15]" - }, - { - "name": "vio_AntYaw[14]" - }, - { - "name": "vio_AntYaw[13]" - }, - { - "name": "vio_AntYaw[12]" - }, - { - "name": "vio_AntYaw[11]" - }, - { - "name": "vio_AntYaw[10]" - }, - { - "name": "vio_AntYaw[9]" - }, - { - "name": "vio_AntYaw[8]" - }, - { - "name": "vio_AntYaw[7]" - }, - { - "name": "vio_AntYaw[6]" - }, - { - "name": "vio_AntYaw[5]" - }, - { - "name": "vio_AntYaw[4]" - }, - { - "name": "vio_AntYaw[3]" - }, - { - "name": "vio_AntYaw[2]" - }, - { - "name": "vio_AntYaw[1]" - }, - { - "name": "vio_AntYaw[0]" - } - ] - } - ] - }, - { - "name": "probe_out12", - "id": 127, - "type": "DATA", - "direction": "OUT", - "isVector": true, - "leftIndex": 0, - "rightIndex": 15, - "portIndex": 12, - "nets": [ - { - "name": "vio_PrecessTime", - "isBus": true, - "subnets": [ - { - "name": "vio_PrecessTime[15]" - }, - { - "name": "vio_PrecessTime[14]" - }, - { - "name": "vio_PrecessTime[13]" - }, - { - "name": "vio_PrecessTime[12]" - }, - { - "name": "vio_PrecessTime[11]" - }, - { - "name": "vio_PrecessTime[10]" - }, - { - "name": "vio_PrecessTime[9]" - }, - { - "name": "vio_PrecessTime[8]" - }, - { - "name": "vio_PrecessTime[7]" - }, - { - "name": "vio_PrecessTime[6]" - }, - { - "name": "vio_PrecessTime[5]" - }, - { - "name": "vio_PrecessTime[4]" - }, - { - "name": "vio_PrecessTime[3]" - }, - { - "name": "vio_PrecessTime[2]" - }, - { - "name": "vio_PrecessTime[1]" - }, - { - "name": "vio_PrecessTime[0]" - } - ] - } - ] - } - ] - } - ], - "parent_nets": [ - { - "id": 174, - "name": "u_ad9361_phase_cal/curr_state[1]", - "state_reg": [ - { - "name": "u_ad9361_phase_cal/curr_state_reg[1]", - "states": [ - { - "name": "STATE_IDLE", - "val": "00" - }, - { - "name": "STATE_CAL_1", - "val": "01" - }, - { - "name": "STATE_CAL_2", - "val": "10" - }, - { - "name": "STATE_DONE", - "val": "11" - } - ] - } - ] - }, - { - "id": 175, - "name": "u_ad9361_phase_cal/curr_state[0]", - "state_reg": [ - { - "name": "u_ad9361_phase_cal/curr_state_reg[0]", - "states": [ - { - "name": "STATE_IDLE", - "val": "00" - }, - { - "name": "STATE_CAL_1", - "val": "01" - }, - { - "name": "STATE_CAL_2", - "val": "10" - }, - { - "name": "STATE_DONE", - "val": "11" - } - ] - } - ] - } - ] - } - ] - } -} \ No newline at end of file diff --git a/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/constrs_1/new/z7100_hmc7044_2ad9361.xdc b/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/constrs_1/new/z7100_hmc7044_2ad9361.xdc deleted file mode 100644 index 8173aa8..0000000 --- a/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/constrs_1/new/z7100_hmc7044_2ad9361.xdc +++ /dev/null @@ -1,194 +0,0 @@ -# df_z7100_2ad9361 - -## Timing Assertions Section - -## Physical Constraints Section - -# Clocks -set_property -dict {PACKAGE_PIN F15 IOSTANDARD LVDS } [get_ports clk_250m_p ] ;# FPGA_DAC_LOGIC_CLK_C_P -set_property -dict {PACKAGE_PIN E16 IOSTANDARD LVCMOS18} [get_ports ad9361_1_buffer_clk ] ;# AD9361_CLK_OUT -set_property -dict {PACKAGE_PIN F4 IOSTANDARD LVCMOS18} [get_ports ad9361_2_buffer_clk ] ;# B_AD9361_CLK_OUT - -# HMC7044-1 Interface -set_property -dict {PACKAGE_PIN AD13 IOSTANDARD LVCMOS33} [get_ports hmc7044_spi_clk ] ;# HMC7044_1_SCLK -set_property -dict {PACKAGE_PIN AD14 IOSTANDARD LVCMOS33} [get_ports hmc7044_spi_csn ] ;# HMC7044_1_SLEN -set_property -dict {PACKAGE_PIN AG12 IOSTANDARD LVCMOS33} [get_ports hmc7044_spi_sdio ] ;# HMC7044_1_DATA - -set_property -dict {PACKAGE_PIN AE13 IOSTANDARD LVCMOS33} [get_ports hmc7044_reset ] ;# HMC7044_1_RESET -set_property -dict {PACKAGE_PIN AF13 IOSTANDARD LVCMOS33} [get_ports hmc7044_sync ] ;# HMC7044_1_SYNC - -set_property -dict {PACKAGE_PIN AH16 IOSTANDARD LVCMOS33} [get_ports hmc7044_gpio[0] ] ;# HMC7044_1_GPIO1 -set_property -dict {PACKAGE_PIN AE12 IOSTANDARD LVCMOS33} [get_ports hmc7044_gpio[1] ] ;# HMC7044_1_GPIO2 -set_property -dict {PACKAGE_PIN AF12 IOSTANDARD LVCMOS33} [get_ports hmc7044_gpio[2] ] ;# HMC7044_1_GPIO3 -set_property -dict {PACKAGE_PIN AH14 IOSTANDARD LVCMOS33} [get_ports hmc7044_gpio[3] ] ;# HMC7044_1_GPIO4 - -# AD9361-1 Interface -set_property -dict {PACKAGE_PIN F5 IOSTANDARD LVCMOS18} [get_ports ad9361_1_rx_data_clk ] ;# AD9361_DATA_CLK_P -set_property -dict {PACKAGE_PIN J1 IOSTANDARD LVCMOS18} [get_ports ad9361_1_rx_frame ] ;# AD9361_RX_FRAME_P -set_property -dict {PACKAGE_PIN B1 IOSTANDARD LVCMOS18} [get_ports ad9361_1_rx_data[0] ] ;# AD9361_TX_00_D0_N -set_property -dict {PACKAGE_PIN B2 IOSTANDARD LVCMOS18} [get_ports ad9361_1_rx_data[1] ] ;# AD9361_TX_01_D0_P -set_property -dict {PACKAGE_PIN C3 IOSTANDARD LVCMOS18} [get_ports ad9361_1_rx_data[2] ] ;# AD9361_TX_02_D1_N -set_property -dict {PACKAGE_PIN C4 IOSTANDARD LVCMOS18} [get_ports ad9361_1_rx_data[3] ] ;# AD9361_TX_03_D1_P -set_property -dict {PACKAGE_PIN B11 IOSTANDARD LVCMOS18} [get_ports ad9361_1_rx_data[4] ] ;# AD9361_TX_04_D2_N -set_property -dict {PACKAGE_PIN C11 IOSTANDARD LVCMOS18} [get_ports ad9361_1_rx_data[5] ] ;# AD9361_TX_05_D2_P -set_property -dict {PACKAGE_PIN B4 IOSTANDARD LVCMOS18} [get_ports ad9361_1_rx_data[6] ] ;# AD9361_TX_06_D3_N -set_property -dict {PACKAGE_PIN B5 IOSTANDARD LVCMOS18} [get_ports ad9361_1_rx_data[7] ] ;# AD9361_TX_07_D3_P -set_property -dict {PACKAGE_PIN A9 IOSTANDARD LVCMOS18} [get_ports ad9361_1_rx_data[8] ] ;# AD9361_TX_08_D4_N -set_property -dict {PACKAGE_PIN B9 IOSTANDARD LVCMOS18} [get_ports ad9361_1_rx_data[9] ] ;# AD9361_TX_09_D4_P -set_property -dict {PACKAGE_PIN B6 IOSTANDARD LVCMOS18} [get_ports ad9361_1_rx_data[10] ] ;# AD9361_TX_10_D5_N -set_property -dict {PACKAGE_PIN C6 IOSTANDARD LVCMOS18} [get_ports ad9361_1_rx_data[11] ] ;# AD9361_TX_11_D5_P - -set_property -dict {PACKAGE_PIN E13 IOSTANDARD LVCMOS18} [get_ports ad9361_1_tx_fb_clk ] ;# AD9361_FB_CLK_P -set_property -dict {PACKAGE_PIN C12 IOSTANDARD LVCMOS18} [get_ports ad9361_1_tx_frame ] ;# AD9361_TX_FRAME_P -set_property -dict {PACKAGE_PIN A2 IOSTANDARD LVCMOS18} [get_ports ad9361_1_tx_data[0] ] ;# AD9361_RX_00_D0_N -set_property -dict {PACKAGE_PIN A3 IOSTANDARD LVCMOS18} [get_ports ad9361_1_tx_data[1] ] ;# AD9361_RX_01_D0_P -set_property -dict {PACKAGE_PIN A4 IOSTANDARD LVCMOS18} [get_ports ad9361_1_tx_data[2] ] ;# AD9361_RX_02_D1_N -set_property -dict {PACKAGE_PIN A5 IOSTANDARD LVCMOS18} [get_ports ad9361_1_tx_data[3] ] ;# AD9361_RX_03_D1_P -set_property -dict {PACKAGE_PIN B7 IOSTANDARD LVCMOS18} [get_ports ad9361_1_tx_data[4] ] ;# AD9361_RX_04_D2_N -set_property -dict {PACKAGE_PIN C7 IOSTANDARD LVCMOS18} [get_ports ad9361_1_tx_data[5] ] ;# AD9361_RX_05_D2_P -set_property -dict {PACKAGE_PIN A10 IOSTANDARD LVCMOS18} [get_ports ad9361_1_tx_data[6] ] ;# AD9361_RX_06_D3_N -set_property -dict {PACKAGE_PIN B10 IOSTANDARD LVCMOS18} [get_ports ad9361_1_tx_data[7] ] ;# AD9361_RX_07_D3_P -set_property -dict {PACKAGE_PIN A7 IOSTANDARD LVCMOS18} [get_ports ad9361_1_tx_data[8] ] ;# AD9361_RX_08_D4_N -set_property -dict {PACKAGE_PIN A8 IOSTANDARD LVCMOS18} [get_ports ad9361_1_tx_data[9] ] ;# AD9361_RX_09_D4_P -set_property -dict {PACKAGE_PIN C8 IOSTANDARD LVCMOS18} [get_ports ad9361_1_tx_data[10] ] ;# AD9361_RX_10_D5_N -set_property -dict {PACKAGE_PIN C9 IOSTANDARD LVCMOS18} [get_ports ad9361_1_tx_data[11] ] ;# AD9361_RX_11_D5_P - -set_property -dict {PACKAGE_PIN G17 IOSTANDARD LVCMOS18} [get_ports ad9361_1_spi_clk ] ;# AD9361_SPI_CLK -set_property -dict {PACKAGE_PIN A15 IOSTANDARD LVCMOS18} [get_ports ad9361_1_spi_csn ] ;# AD9361_SPI_ENB -set_property -dict {PACKAGE_PIN H13 IOSTANDARD LVCMOS18} [get_ports ad9361_1_spi_mosi ] ;# AD9361_SPI_DI -set_property -dict {PACKAGE_PIN D14 IOSTANDARD LVCMOS18} [get_ports ad9361_1_spi_miso ] ;# AD9361_SPI_DO - -set_property -dict {PACKAGE_PIN J14 IOSTANDARD LVCMOS18} [get_ports ad9361_1_reset_b ] ;# AD9361_RESETB -set_property -dict {PACKAGE_PIN A17 IOSTANDARD LVCMOS18} [get_ports ad9361_1_en_agc ] ;# AD9361_EN_AGC -set_property -dict {PACKAGE_PIN C13 IOSTANDARD LVCMOS18} [get_ports ad9361_1_enable ] ;# AD9361_ENABLE -set_property -dict {PACKAGE_PIN A12 IOSTANDARD LVCMOS18} [get_ports ad9361_1_txnrx ] ;# AD9361_TXNRX - -set_property -dict {PACKAGE_PIN C14 IOSTANDARD LVCMOS18} [get_ports ad9361_1_ctrl_in[0] ] ;# AD9361_CTRL_IN0 -set_property -dict {PACKAGE_PIN H14 IOSTANDARD LVCMOS18} [get_ports ad9361_1_ctrl_in[1] ] ;# AD9361_CTRL_IN1 -set_property -dict {PACKAGE_PIN J13 IOSTANDARD LVCMOS18} [get_ports ad9361_1_ctrl_in[2] ] ;# AD9361_CTRL_IN2 -set_property -dict {PACKAGE_PIN B14 IOSTANDARD LVCMOS18} [get_ports ad9361_1_ctrl_in[3] ] ;# AD9361_CTRL_IN3 - -set_property -dict {PACKAGE_PIN D16 IOSTANDARD LVCMOS18} [get_ports ad9361_1_ctrl_out[0] ] ;# AD9361_CTRL_OUT0 -set_property -dict {PACKAGE_PIN C17 IOSTANDARD LVCMOS18} [get_ports ad9361_1_ctrl_out[1] ] ;# AD9361_CTRL_OUT1 -set_property -dict {PACKAGE_PIN A14 IOSTANDARD LVCMOS18} [get_ports ad9361_1_ctrl_out[2] ] ;# AD9361_CTRL_OUT2 -set_property -dict {PACKAGE_PIN G15 IOSTANDARD LVCMOS18} [get_ports ad9361_1_ctrl_out[3] ] ;# AD9361_CTRL_OUT3 -set_property -dict {PACKAGE_PIN G14 IOSTANDARD LVCMOS18} [get_ports ad9361_1_ctrl_out[4] ] ;# AD9361_CTRL_OUT4 -set_property -dict {PACKAGE_PIN B16 IOSTANDARD LVCMOS18} [get_ports ad9361_1_ctrl_out[5] ] ;# AD9361_CTRL_OUT5 -set_property -dict {PACKAGE_PIN B15 IOSTANDARD LVCMOS18} [get_ports ad9361_1_ctrl_out[6] ] ;# AD9361_CTRL_OUT6 -set_property -dict {PACKAGE_PIN M12 IOSTANDARD LVCMOS18} [get_ports ad9361_1_ctrl_out[7] ] ;# AD9361_CTRL_OUT7 - -set_property -dict {PACKAGE_PIN F9 IOSTANDARD LVCMOS18} [get_ports ad9361_sync ] ;# AD9361_SYNC_IN - -# AD9361-2 Interface -set_property -dict {PACKAGE_PIN G5 IOSTANDARD LVCMOS18} [get_ports ad9361_2_rx_data_clk ] ;# B_AD9361_DATA_CLK_P -set_property -dict {PACKAGE_PIN E1 IOSTANDARD LVCMOS18} [get_ports ad9361_2_rx_frame ] ;# B_AD9361_RX_FRAME_P -set_property -dict {PACKAGE_PIN D5 IOSTANDARD LVCMOS18} [get_ports ad9361_2_rx_data[0] ] ;# B_AD9361_TX_00_D0_N -set_property -dict {PACKAGE_PIN E6 IOSTANDARD LVCMOS18} [get_ports ad9361_2_rx_data[1] ] ;# B_AD9361_TX_01_D0_P -set_property -dict {PACKAGE_PIN H3 IOSTANDARD LVCMOS18} [get_ports ad9361_2_rx_data[2] ] ;# B_AD9361_TX_02_D1_N -set_property -dict {PACKAGE_PIN H4 IOSTANDARD LVCMOS18} [get_ports ad9361_2_rx_data[3] ] ;# B_AD9361_TX_03_D1_P -set_property -dict {PACKAGE_PIN J6 IOSTANDARD LVCMOS18} [get_ports ad9361_2_rx_data[4] ] ;# B_AD9361_TX_04_D2_N -set_property -dict {PACKAGE_PIN K6 IOSTANDARD LVCMOS18} [get_ports ad9361_2_rx_data[5] ] ;# B_AD9361_TX_05_D2_P -set_property -dict {PACKAGE_PIN J5 IOSTANDARD LVCMOS18} [get_ports ad9361_2_rx_data[6] ] ;# B_AD9361_TX_06_D3_N -set_property -dict {PACKAGE_PIN K5 IOSTANDARD LVCMOS18} [get_ports ad9361_2_rx_data[7] ] ;# B_AD9361_TX_07_D3_P -set_property -dict {PACKAGE_PIN L2 IOSTANDARD LVCMOS18} [get_ports ad9361_2_rx_data[8] ] ;# B_AD9361_TX_08_D4_N -set_property -dict {PACKAGE_PIN L3 IOSTANDARD LVCMOS18} [get_ports ad9361_2_rx_data[9] ] ;# B_AD9361_TX_09_D4_P -set_property -dict {PACKAGE_PIN K2 IOSTANDARD LVCMOS18} [get_ports ad9361_2_rx_data[10] ] ;# B_AD9361_TX_10_D5_N -set_property -dict {PACKAGE_PIN K3 IOSTANDARD LVCMOS18} [get_ports ad9361_2_rx_data[11] ] ;# B_AD9361_TX_11_D5_P - -set_property -dict {PACKAGE_PIN G10 IOSTANDARD LVCMOS18} [get_ports ad9361_2_tx_fb_clk ] ;# B_AD9361_FB_CLK_P -set_property -dict {PACKAGE_PIN H6 IOSTANDARD LVCMOS18} [get_ports ad9361_2_tx_frame ] ;# B_AD9361_TX_FRAME_P -set_property -dict {PACKAGE_PIN E2 IOSTANDARD LVCMOS18} [get_ports ad9361_2_tx_data[0] ] ;# B_AD9361_RX_00_D0_N -set_property -dict {PACKAGE_PIN E3 IOSTANDARD LVCMOS18} [get_ports ad9361_2_tx_data[1] ] ;# B_AD9361_RX_01_D0_P -set_property -dict {PACKAGE_PIN F2 IOSTANDARD LVCMOS18} [get_ports ad9361_2_tx_data[2] ] ;# B_AD9361_RX_02_D1_N -set_property -dict {PACKAGE_PIN G2 IOSTANDARD LVCMOS18} [get_ports ad9361_2_tx_data[3] ] ;# B_AD9361_RX_03_D1_P -set_property -dict {PACKAGE_PIN J3 IOSTANDARD LVCMOS18} [get_ports ad9361_2_tx_data[4] ] ;# B_AD9361_RX_04_D2_N -set_property -dict {PACKAGE_PIN J4 IOSTANDARD LVCMOS18} [get_ports ad9361_2_tx_data[5] ] ;# B_AD9361_RX_05_D2_P -set_property -dict {PACKAGE_PIN H16 IOSTANDARD LVCMOS18} [get_ports ad9361_2_tx_data[6] ] ;# B_AD9361_RX_06_D3_N -set_property -dict {PACKAGE_PIN J16 IOSTANDARD LVCMOS18} [get_ports ad9361_2_tx_data[7] ] ;# B_AD9361_RX_07_D3_P -set_property -dict {PACKAGE_PIN J15 IOSTANDARD LVCMOS18} [get_ports ad9361_2_tx_data[8] ] ;# B_AD9361_RX_08_D4_N -set_property -dict {PACKAGE_PIN K15 IOSTANDARD LVCMOS18} [get_ports ad9361_2_tx_data[9] ] ;# B_AD9361_RX_09_D4_P -set_property -dict {PACKAGE_PIN K13 IOSTANDARD LVCMOS18} [get_ports ad9361_2_tx_data[10] ] ;# B_AD9361_RX_10_D5_N -set_property -dict {PACKAGE_PIN L13 IOSTANDARD LVCMOS18} [get_ports ad9361_2_tx_data[11] ] ;# B_AD9361_RX_11_D5_P - -set_property -dict {PACKAGE_PIN L9 IOSTANDARD LVCMOS18} [get_ports ad9361_2_spi_clk ] ;# B_AD9361_SPI_CLK -set_property -dict {PACKAGE_PIN M10 IOSTANDARD LVCMOS18} [get_ports ad9361_2_spi_csn ] ;# B_AD9361_SPI_ENB -set_property -dict {PACKAGE_PIN L12 IOSTANDARD LVCMOS18} [get_ports ad9361_2_spi_mosi ] ;# B_AD9361_SPI_DI -set_property -dict {PACKAGE_PIN K12 IOSTANDARD LVCMOS18} [get_ports ad9361_2_spi_miso ] ;# B_AD9361_SPI_DO - -set_property -dict {PACKAGE_PIN J10 IOSTANDARD LVCMOS18} [get_ports ad9361_2_reset_b ] ;# B_AD9361_RESETB -set_property -dict {PACKAGE_PIN D4 IOSTANDARD LVCMOS18} [get_ports ad9361_2_en_agc ] ;# B_AD9361_EN_AGC -set_property -dict {PACKAGE_PIN D3 IOSTANDARD LVCMOS18} [get_ports ad9361_2_enable ] ;# B_AD9361_ENABLE -set_property -dict {PACKAGE_PIN J9 IOSTANDARD LVCMOS18} [get_ports ad9361_2_txnrx ] ;# B_AD9361_TXNRX - -set_property -dict {PACKAGE_PIN L10 IOSTANDARD LVCMOS18} [get_ports ad9361_2_ctrl_in[0] ] ;# B_AD9361_CTRL_IN0 -set_property -dict {PACKAGE_PIN D6 IOSTANDARD LVCMOS18} [get_ports ad9361_2_ctrl_in[1] ] ;# B_AD9361_CTRL_IN1 -set_property -dict {PACKAGE_PIN E7 IOSTANDARD LVCMOS18} [get_ports ad9361_2_ctrl_in[2] ] ;# B_AD9361_CTRL_IN2 -set_property -dict {PACKAGE_PIN K8 IOSTANDARD LVCMOS18} [get_ports ad9361_2_ctrl_in[3] ] ;# B_AD9361_CTRL_IN3 - -set_property -dict {PACKAGE_PIN H11 IOSTANDARD LVCMOS18} [get_ports ad9361_2_ctrl_out[0] ] ;# B_AD9361_CTRL_OUT0 -set_property -dict {PACKAGE_PIN J11 IOSTANDARD LVCMOS18} [get_ports ad9361_2_ctrl_out[1] ] ;# B_AD9361_CTRL_OUT1 -set_property -dict {PACKAGE_PIN K7 IOSTANDARD LVCMOS18} [get_ports ad9361_2_ctrl_out[2] ] ;# B_AD9361_CTRL_OUT2 -set_property -dict {PACKAGE_PIN L7 IOSTANDARD LVCMOS18} [get_ports ad9361_2_ctrl_out[3] ] ;# B_AD9361_CTRL_OUT3 -set_property -dict {PACKAGE_PIN G7 IOSTANDARD LVCMOS18} [get_ports ad9361_2_ctrl_out[4] ] ;# B_AD9361_CTRL_OUT4 -set_property -dict {PACKAGE_PIN H7 IOSTANDARD LVCMOS18} [get_ports ad9361_2_ctrl_out[5] ] ;# B_AD9361_CTRL_OUT5 -set_property -dict {PACKAGE_PIN K10 IOSTANDARD LVCMOS18} [get_ports ad9361_2_ctrl_out[6] ] ;# B_AD9361_CTRL_OUT6 -set_property -dict {PACKAGE_PIN K11 IOSTANDARD LVCMOS18} [get_ports ad9361_2_ctrl_out[7] ] ;# B_AD9361_CTRL_OUT7 - -# Phased-Array Control -set_property -dict {PACKAGE_PIN AC28 IOSTANDARD LVTTL } [get_ports ant_clk ] ;# ANT_CLK -set_property -dict {PACKAGE_PIN AD25 IOSTANDARD LVTTL } [get_ports ant_en ] ;# ANT_EN -set_property -dict {PACKAGE_PIN AD29 IOSTANDARD LVTTL } [get_ports ant_data ] ;# ANT_DATA -set_property -dict {PACKAGE_PIN AE26 IOSTANDARD LVTTL } [get_ports ant_tr ] ;# ANT_TR -set_property -dict {PACKAGE_PIN AB27 IOSTANDARD LVTTL } [get_ports ant_dary ] ;# ANT_DARY -set_property -dict {PACKAGE_PIN AC27 IOSTANDARD LVTTL } [get_ports ant_dout ] ;# ANT_DOUT - -# RF Synthesizer Control -set_property -dict {PACKAGE_PIN P21 IOSTANDARD LVCMOS33} [get_ports rf_standby ] ;# ANT_standby_R -set_property -dict {PACKAGE_PIN R22 IOSTANDARD LVCMOS33} [get_ports rf_sw_pll ] ;# ANT_SW_PLL_R -set_property -dict {PACKAGE_PIN T23 IOSTANDARD LVCMOS33} [get_ports rf_t ] ;# ANT_T_R -set_property -dict {PACKAGE_PIN U25 IOSTANDARD LVCMOS33} [get_ports rf_r ] ;# ANT_R_R -set_property -dict {PACKAGE_PIN T25 IOSTANDARD LVCMOS33} [get_ports rf_sw_bpf ] ;# ANT_SW_BPF_R -set_property -dict {PACKAGE_PIN R25 IOSTANDARD LVCMOS33} [get_ports rf_sclk1 ] ;# ANT_SCLK1_R -set_property -dict {PACKAGE_PIN T27 IOSTANDARD LVCMOS33} [get_ports rf_sdio1 ] ;# ANT_SDIO1_R -set_property -dict {PACKAGE_PIN R28 IOSTANDARD LVCMOS33} [get_ports rf_cs1 ] ;# ANT_CS1_R -set_property -dict {PACKAGE_PIN T28 IOSTANDARD LVCMOS33} [get_ports rf_ld1 ] ;# ANT_LD1_R -set_property -dict {PACKAGE_PIN U26 IOSTANDARD LVCMOS33} [get_ports rf_sclk2 ] ;# ANT_SCLK2_R -set_property -dict {PACKAGE_PIN V29 IOSTANDARD LVCMOS33} [get_ports rf_sdio2 ] ;# ANT_SDIO2_R -set_property -dict {PACKAGE_PIN W29 IOSTANDARD LVCMOS33} [get_ports rf_cs2 ] ;# ANT_CS2_R -set_property -dict {PACKAGE_PIN W30 IOSTANDARD LVCMOS33} [get_ports rf_ld2 ] ;# ANT_LD2_R -set_property -dict {PACKAGE_PIN AE28 IOSTANDARD LVCMOS33} [get_ports rf_sclk3 ] ;# ANT_SCLK3_R -set_property -dict {PACKAGE_PIN N29 IOSTANDARD LVCMOS33} [get_ports rf_sdio3 ] ;# ANT_SDIO3_R -set_property -dict {PACKAGE_PIN AH28 IOSTANDARD LVCMOS33} [get_ports rf_cs3 ] ;# ANT_CS3_R -set_property -dict {PACKAGE_PIN AJ30 IOSTANDARD LVCMOS33} [get_ports rf_ld3 ] ;# ANT_LD3_R -set_property -dict {PACKAGE_PIN AJ28 IOSTANDARD LVCMOS33} [get_ports rf_tmgc_16 ] ;# ANT_TMGC_16_R -set_property -dict {PACKAGE_PIN AH29 IOSTANDARD LVCMOS33} [get_ports rf_tmgc_8 ] ;# ANT_TMGC_8_R -set_property -dict {PACKAGE_PIN AF27 IOSTANDARD LVCMOS33} [get_ports rf_tmgc_4 ] ;# ANT_TMGC_4_R -set_property -dict {PACKAGE_PIN AG29 IOSTANDARD LVCMOS33} [get_ports rf_tmgc_2 ] ;# ANT_TMGC_2_R -set_property -dict {PACKAGE_PIN AE27 IOSTANDARD LVCMOS33} [get_ports rf_tmgc_1 ] ;# ANT_TMGC_1_R -set_property -dict {PACKAGE_PIN AG30 IOSTANDARD LVCMOS33} [get_ports rf_rmgc_16 ] ;# ANT_RMGC_16_R -set_property -dict {PACKAGE_PIN AF28 IOSTANDARD LVCMOS33} [get_ports rf_rmgc_8 ] ;# ANT_RMGC_8_R -set_property -dict {PACKAGE_PIN AG27 IOSTANDARD LVCMOS33} [get_ports rf_rmgc_4 ] ;# ANT_RMGC_4_R -set_property -dict {PACKAGE_PIN AD28 IOSTANDARD LVCMOS33} [get_ports rf_rmgc_2 ] ;# ANT_RMGC_2_R -set_property -dict {PACKAGE_PIN AK28 IOSTANDARD LVCMOS33} [get_ports rf_rmgc_1 ] ;# ANT_RMGC_1_R -set_property -dict {PACKAGE_PIN AK27 IOSTANDARD LVCMOS33} [get_ports rf_enable ] ;# ANT_ENABLE_R -set_property -dict {PACKAGE_PIN AH26 IOSTANDARD LVCMOS33} [get_ports rf_sc ] ;# ANT_SC_R -set_property -dict {PACKAGE_PIN AG26 IOSTANDARD LVCMOS33} [get_ports rf_sd ] ;# ANT_SD_R -set_property -dict {PACKAGE_PIN AE25 IOSTANDARD LVCMOS33} [get_ports rf_endsyn ] ;# ANT_END/SYN_R -set_property -dict {PACKAGE_PIN AF25 IOSTANDARD LVCMOS33} [get_ports rf_sdout ] ;# ANT_SDOUT_R -set_property -dict {PACKAGE_PIN AK30 IOSTANDARD LVCMOS33} [get_ports rf_dq_wd ] ;# ANT_DQ-WD_R 15 -set_property -dict {PACKAGE_PIN AJ29 IOSTANDARD LVCMOS33} [get_ports rf_sw_rx ] ;# ANT_SW_RX_R - -# Debug IO -set_property -dict {PACKAGE_PIN Y20 IOSTANDARD LVCMOS33} [get_ports uart1_txd ] ;# UART1_TXD -set_property -dict {PACKAGE_PIN AA20 IOSTANDARD LVCMOS33} [get_ports uart1_rxd ] ;# UART1_RXD -set_property -dict {PACKAGE_PIN AC18 IOSTANDARD LVCMOS33} [get_ports uart2_txd ] ;# UART2_TXD -set_property -dict {PACKAGE_PIN AC19 IOSTANDARD LVCMOS33} [get_ports uart2_rxd ] ;# UART2_RXD -set_property -dict {PACKAGE_PIN AD18 IOSTANDARD LVCMOS33} [get_ports uart3_txd ] ;# UART3_TXD -set_property -dict {PACKAGE_PIN AD19 IOSTANDARD LVCMOS33} [get_ports uart3_rxd ] ;# UART3_RXD -set_property -dict {PACKAGE_PIN L15 IOSTANDARD LVCMOS18} [get_ports debug_io_1 ] ;# DEBUG_IO_1 -set_property -dict {PACKAGE_PIN K16 IOSTANDARD LVCMOS18} [get_ports debug_io_2 ] ;# DEBUG_IO_2 -set_property -dict {PACKAGE_PIN AG16 IOSTANDARD LVCMOS33} [get_ports debug_io_3 ] ;# DEBUG_IO_3 -set_property -dict {PACKAGE_PIN AF15 IOSTANDARD LVCMOS33} [get_ports debug_io_4 ] ;# DEBUG_IO_4 -set_property -dict {PACKAGE_PIN AG15 IOSTANDARD LVCMOS33} [get_ports debug_io_5 ] ;# DEBUG_IO_5 -set_property -dict {PACKAGE_PIN AF18 IOSTANDARD LVCMOS33} [get_ports debug_io_6 ] ;# DEBUG_IO_6 -set_property -dict {PACKAGE_PIN AG17 IOSTANDARD LVCMOS33} [get_ports debug_io_7 ] ;# DEBUG_IO_7 diff --git a/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/constrs_1/new/z7100_hmc7044_2ad9361_timing.xdc b/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/constrs_1/new/z7100_hmc7044_2ad9361_timing.xdc deleted file mode 100644 index 45c759f..0000000 --- a/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/constrs_1/new/z7100_hmc7044_2ad9361_timing.xdc +++ /dev/null @@ -1 +0,0 @@ -set_property CLOCK_DEDICATED_ROUTE BACKBONE [get_nets u_clk_dist/u_ad9361_2_clk_gen/inst/clk_in1_ad9361_clk_gen_cmos_2t2r] diff --git a/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/sources_1/bd/system_bd/ip/system_bd_auto_pc_0/system_bd_auto_pc_0.xci b/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/sources_1/bd/system_bd/ip/system_bd_auto_pc_0/system_bd_auto_pc_0.xci deleted file mode 100644 index dd24971..0000000 --- a/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/sources_1/bd/system_bd/ip/system_bd_auto_pc_0/system_bd_auto_pc_0.xci +++ /dev/null @@ -1,301 +0,0 @@ -{ - "schema": "xilinx.com:schema:json_instance:1.0", - "ip_inst": { - "xci_name": "system_bd_auto_pc_0", - "cell_name": "ps7_axi_periph/s00_couplers/auto_pc", - "component_reference": "xilinx.com:ip:axi_protocol_converter:2.1", - "ip_revision": "30", - "gen_directory": "../../../../../../duifei_cal_coarse.gen/sources_1/bd/system_bd/ip/system_bd_auto_pc_0", - "parameters": { - "component_parameters": { - "SI_PROTOCOL": [ { "value": "AXI3", "value_src": "user", "value_permission": "bd_and_user", "resolve_type": "user", "usage": "all" } ], - "MI_PROTOCOL": [ { "value": "AXI4LITE", "value_src": "user", "value_permission": "bd_and_user", "resolve_type": "user", "usage": "all" } ], - "READ_WRITE_MODE": [ { "value": "READ_WRITE", "value_src": "propagated", "value_permission": "bd_and_user", "resolve_type": "user", "usage": "all" } ], - "TRANSLATION_MODE": [ { "value": "2", "resolve_type": "user", "format": "long", "usage": "all" } ], - "ADDR_WIDTH": [ { "value": "32", "value_src": "propagated", "value_permission": "bd_and_user", "resolve_type": "user", "format": "long", "usage": "all" } ], - "DATA_WIDTH": [ { "value": "32", "value_src": "propagated", "value_permission": "bd_and_user", "resolve_type": "user", "format": "long", "usage": "all" } ], - "ID_WIDTH": [ { "value": "12", "value_src": "propagated", "value_permission": "bd_and_user", "resolve_type": "user", "format": "long", "usage": "all" } ], - "AWUSER_WIDTH": [ { "value": "0", "value_src": "propagated", "value_permission": "bd_and_user", "resolve_type": "user", "format": "long", "usage": "all" } ], - "ARUSER_WIDTH": [ { "value": "0", "value_src": "propagated", "value_permission": "bd_and_user", "resolve_type": "user", "format": "long", "usage": "all" } ], - "RUSER_WIDTH": [ { "value": "0", "value_src": "propagated", "value_permission": "bd_and_user", "resolve_type": "user", "format": "long", "usage": "all" } ], - "WUSER_WIDTH": [ { "value": "0", "value_src": "propagated", "value_permission": "bd_and_user", "resolve_type": "user", "format": "long", "usage": "all" } ], - "BUSER_WIDTH": [ { "value": "0", "value_src": "propagated", "value_permission": "bd_and_user", "resolve_type": "user", "format": "long", "usage": "all" } ], - "Component_Name": [ { "value": "system_bd_auto_pc_0", "resolve_type": "user", "usage": "all" } ] - }, - "model_parameters": { - "C_FAMILY": [ { "value": "zynq", "resolve_type": "generated", "usage": "all" } ], - "C_M_AXI_PROTOCOL": [ { "value": "2", "resolve_type": "generated", "format": "long", "usage": "all" } ], - "C_S_AXI_PROTOCOL": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], - "C_IGNORE_ID": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], - "C_AXI_ID_WIDTH": [ { "value": "12", "resolve_type": "generated", "format": "long", "usage": "all" } ], - "C_AXI_ADDR_WIDTH": [ { "value": "32", "resolve_type": "generated", "format": "long", "usage": "all" } ], - "C_AXI_DATA_WIDTH": [ { "value": "32", "resolve_type": "generated", "format": "long", "usage": "all" } ], - "C_AXI_SUPPORTS_WRITE": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], - "C_AXI_SUPPORTS_READ": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], - "C_AXI_SUPPORTS_USER_SIGNALS": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], - "C_AXI_AWUSER_WIDTH": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], - "C_AXI_ARUSER_WIDTH": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], - "C_AXI_WUSER_WIDTH": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], - "C_AXI_RUSER_WIDTH": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], - "C_AXI_BUSER_WIDTH": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], - "C_TRANSLATION_MODE": [ { "value": "2", "resolve_type": "generated", "format": "long", "usage": "all" } ] - }, - "project_parameters": { - "ARCHITECTURE": [ { "value": "zynq" } ], - "BASE_BOARD_PART": [ { "value": "" } ], - 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"resolve_type": "generated", "format": "float", "is_ips_inferred": true, "is_static_object": false } ], - "CLK_DOMAIN": [ { "value": "system_bd_processing_system7_0_0_FCLK_CLK0", "value_src": "default_prop", "value_permission": "bd_and_user", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ], - "NUM_READ_THREADS": [ { "value": "4", "value_src": "constant_prop", "value_permission": "bd_and_user", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ], - "NUM_WRITE_THREADS": [ { "value": "4", "value_src": "constant_prop", "value_permission": "bd_and_user", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ], - "RUSER_BITS_PER_BYTE": [ { "value": "0", "value_permission": "bd_and_user", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ], - "WUSER_BITS_PER_BYTE": [ { "value": "0", "value_permission": "bd_and_user", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ], - "INSERT_VIP": [ { "value": "0", "resolve_type": "user", "format": "long", "usage": "simulation.rtl", "is_ips_inferred": true, "is_static_object": false } ] - }, - "port_maps": { - "AWADDR": [ { "physical_name": "s_axi_awaddr" } ], - "AWPROT": [ { "physical_name": "s_axi_awprot" } ], - "AWVALID": [ { "physical_name": "s_axi_awvalid" } ], - "AWREADY": [ { "physical_name": "s_axi_awready" } ], - "WDATA": [ { "physical_name": "s_axi_wdata" } ], - "WSTRB": [ { "physical_name": "s_axi_wstrb" } ], - "WVALID": [ { "physical_name": "s_axi_wvalid" } ], - "WREADY": [ { "physical_name": "s_axi_wready" } ], - "BRESP": [ { "physical_name": "s_axi_bresp" } ], - "BVALID": [ { "physical_name": "s_axi_bvalid" } ], - "BREADY": [ { "physical_name": "s_axi_bready" } ], - "ARADDR": [ { "physical_name": "s_axi_araddr" } ], - "ARPROT": [ { "physical_name": "s_axi_arprot" } ], - "ARVALID": [ { "physical_name": "s_axi_arvalid" } ], - "ARREADY": [ { "physical_name": "s_axi_arready" } ], - "RDATA": [ { "physical_name": "s_axi_rdata" } ], - "RRESP": [ { "physical_name": "s_axi_rresp" } ], - "RVALID": [ { "physical_name": "s_axi_rvalid" } ], - "RREADY": [ { "physical_name": "s_axi_rready" } ] - } - }, - "s_axi_aclk": { - "vlnv": "xilinx.com:signal:clock:1.0", - "abstraction_type": "xilinx.com:signal:clock_rtl:1.0", - "mode": "slave", - "parameters": { - "ASSOCIATED_BUSIF": [ { "value": "s_axi", "value_src": "constant", "value_permission": "bd_and_user", "usage": "all" } ], - "ASSOCIATED_RESET": [ { "value": "s_axi_aresetn", "value_src": "constant", "value_permission": "bd_and_user", "usage": "all" } ], - "FREQ_HZ": [ { "value": "100000000", "value_permission": "bd_and_user", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ], - "FREQ_TOLERANCE_HZ": [ { "value": "0", "value_permission": "bd_and_user", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ], - "PHASE": [ { "value": "0.0", "value_permission": "bd_and_user", "resolve_type": "generated", "format": "float", "is_ips_inferred": true, "is_static_object": false } ], - "CLK_DOMAIN": [ { "value": "", "value_permission": "bd_and_user", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ], - "ASSOCIATED_PORT": [ { "value": "", "value_permission": "bd_and_user", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ], - "INSERT_VIP": [ { "value": "0", "resolve_type": "user", "format": "long", "usage": "simulation.rtl", "is_ips_inferred": true, "is_static_object": false } ] - }, - "port_maps": { - "CLK": [ { "physical_name": "s_axi_aclk" } ] - } - }, - "s_axi_aresetn": { - "vlnv": "xilinx.com:signal:reset:1.0", - "abstraction_type": "xilinx.com:signal:reset_rtl:1.0", - "mode": "slave", - "parameters": { - "POLARITY": [ { "value": "ACTIVE_LOW", "value_src": "constant", "value_permission": "bd_and_user", "usage": "all" } ], - "INSERT_VIP": [ { "value": "0", "resolve_type": "user", "format": "long", "usage": "simulation.rtl", "is_ips_inferred": true, "is_static_object": false } ] - }, - "port_maps": { - "RST": [ { "physical_name": "s_axi_aresetn" } ] - } - }, - "spi_engine_ctrl": { - "vlnv": "analog.com:interface:spi_engine_ctrl:1.0", - "abstraction_type": "analog.com:interface:spi_engine_ctrl_rtl:1.0", - "mode": "master", - "port_maps": { - "CMD_READY": [ { "physical_name": "cmd_ready" } ], - "CMD_VALID": [ { "physical_name": "cmd_valid" } ], - "CMD_DATA": [ { "physical_name": "cmd_data" } ], - "SDO_READY": [ { "physical_name": "sdo_data_ready" } ], - "SDO_VALID": [ { "physical_name": "sdo_data_valid" } ], - "SDO_DATA": [ { "physical_name": "sdo_data" } ], - "SDI_READY": [ { "physical_name": "sdi_data_ready" } ], - "SDI_VALID": [ { "physical_name": "sdi_data_valid" } ], - "SDI_DATA": [ { "physical_name": "sdi_data" } ], - "SYNC_READY": [ { "physical_name": "sync_ready" } ], - "SYNC_VALID": [ { "physical_name": "sync_valid" } ], - "SYNC_DATA": [ { "physical_name": "sync_data" } ] - } - }, - "spi_engine_ctrl_signal_clock": { - "vlnv": "xilinx.com:signal:clock:1.0", - "abstraction_type": "xilinx.com:signal:clock_rtl:1.0", - "mode": "slave", - "parameters": { - "ASSOCIATED_BUSIF": [ { "value": "spi_engine_ctrl", "value_src": "constant", "value_permission": "bd_and_user", "usage": "all" } ], - "ASSOCIATED_RESET": [ { "value": "spi_resetn", "value_src": "constant", "value_permission": "bd_and_user", "usage": "all" } ], - "FREQ_HZ": [ { "value": "100000000", "value_src": "user_prop", "value_permission": "bd_and_user", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ], - "FREQ_TOLERANCE_HZ": [ { "value": "0", "value_permission": "bd_and_user", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ], - "PHASE": [ { "value": "0.0", "value_permission": "bd_and_user", "resolve_type": "generated", "format": "float", "is_ips_inferred": true, "is_static_object": false } ], - "CLK_DOMAIN": [ { "value": "system_bd_processing_system7_0_0_FCLK_CLK0", "value_src": "default_prop", "value_permission": "bd_and_user", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ], - "ASSOCIATED_PORT": [ { "value": "", "value_permission": "bd_and_user", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ], - "INSERT_VIP": [ { "value": "0", "resolve_type": "user", "format": "long", "usage": "simulation.rtl", "is_ips_inferred": true, "is_static_object": false } ] - }, - "port_maps": { - "CLK": [ { "physical_name": "spi_clk" } ] - } - }, - "spi_engine_ctrl_signal_reset": { - "vlnv": "xilinx.com:signal:reset:1.0", - "abstraction_type": "xilinx.com:signal:reset_rtl:1.0", - "mode": "master", - "parameters": { - "POLARITY": [ { "value": "ACTIVE_LOW", "value_src": "constant", "value_permission": "bd_and_user", "usage": "all" } ], - "INSERT_VIP": [ { "value": "0", "resolve_type": "user", "format": "long", "usage": "simulation.rtl", "is_ips_inferred": true, "is_static_object": false } ] - }, - "port_maps": { - "RST": [ { "physical_name": "spi_resetn" } ] - } - }, - "spi_engine_offload_ctrl0_s_axi_signal_clock": { - "vlnv": "xilinx.com:signal:clock:1.0", - "abstraction_type": "xilinx.com:signal:clock_rtl:1.0", - "mode": "slave", - "parameters": { - "ASSOCIATED_BUSIF": [ { "value": "spi_engine_offload_ctrl0:s_axi", "value_src": "constant", "value_permission": "bd_and_user", "usage": "all" } ], - "ASSOCIATED_RESET": [ { "value": "s_axi_aresetn", "value_src": "constant", "value_permission": "bd_and_user", "usage": "all" } ], - "FREQ_HZ": [ { "value": "100000000", "value_src": "user_prop", "value_permission": "bd_and_user", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ], - "FREQ_TOLERANCE_HZ": [ { "value": "0", "value_permission": "bd_and_user", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ], - "PHASE": [ { "value": "0.0", "value_permission": "bd_and_user", "resolve_type": "generated", "format": "float", "is_ips_inferred": true, "is_static_object": false } ], - "CLK_DOMAIN": [ { "value": "", "value_src": "default_prop", "value_permission": "bd_and_user", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ], - "ASSOCIATED_PORT": [ { "value": "", "value_permission": "bd_and_user", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ], - "INSERT_VIP": [ { "value": "0", "resolve_type": "user", "format": "long", "usage": "simulation.rtl", "is_ips_inferred": true, "is_static_object": false } ] - }, - "port_maps": { - "CLK": [ { "physical_name": "s_axi_aclk" } ] - } - }, - "spi_engine_offload_ctrl0_s_axi_signal_reset": { - "vlnv": "xilinx.com:signal:reset:1.0", - "abstraction_type": "xilinx.com:signal:reset_rtl:1.0", - "mode": "slave", - "parameters": { - "POLARITY": [ { "value": "ACTIVE_LOW", "value_src": "constant", "value_permission": "bd_and_user", "usage": "all" } ], - "INSERT_VIP": [ { "value": "0", "resolve_type": "user", "format": "long", "usage": "simulation.rtl", "is_ips_inferred": true, "is_static_object": false } ] - }, - "port_maps": { - "RST": [ { "physical_name": "s_axi_aresetn" } ] - } - } - }, - "memory_maps": { - "s_axi": { - "address_blocks": { - "axi_lite": { - "base_address": "0", - "range": "65536" - } - } - } - } - } - } -} \ No newline at end of file diff --git a/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/sources_1/bd/system_bd/ip/system_bd_processing_system7_0_0/system_bd_processing_system7_0_0.xci b/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/sources_1/bd/system_bd/ip/system_bd_processing_system7_0_0/system_bd_processing_system7_0_0.xci deleted file mode 100644 index cfc7a4a..0000000 --- a/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/sources_1/bd/system_bd/ip/system_bd_processing_system7_0_0/system_bd_processing_system7_0_0.xci +++ /dev/null @@ -1,1288 +0,0 @@ -{ - "schema": "xilinx.com:schema:json_instance:1.0", - "ip_inst": { - "xci_name": "system_bd_processing_system7_0_0", - "cell_name": "processing_system7", - "component_reference": "xilinx.com:ip:processing_system7:5.5", - "ip_revision": "6", - "gen_directory": "../../../../../../duifei_cal_coarse.gen/sources_1/bd/system_bd/ip/system_bd_processing_system7_0_0", - "parameters": { - "component_parameters": { - "PCW_DDR_RAM_BASEADDR": [ { "value": "0x00100000", "resolve_type": "user", "format": "bitString", "usage": "all" } ], - "PCW_DDR_RAM_HIGHADDR": [ { "value": "0x1FFFFFFF", "value_src": "user", "resolve_type": "user", "format": "bitString", "usage": "all" } ], - "PCW_UART0_BASEADDR": [ { "value": "0xE0000000", "resolve_type": "user", "format": "bitString", "enabled": false, "usage": "all" } ], - "PCW_UART0_HIGHADDR": [ { "value": "0xE0000FFF", "resolve_type": "user", "format": "bitString", "enabled": false, "usage": "all" } ], - "PCW_UART1_BASEADDR": [ { "value": "0xE0001000", "resolve_type": "user", "format": "bitString", "enabled": false, "usage": "all" } ], - "PCW_UART1_HIGHADDR": [ { "value": "0xE0001FFF", "resolve_type": "user", "format": "bitString", "enabled": false, "usage": "all" } ], - "PCW_I2C0_BASEADDR": [ { "value": "0xE0004000", "resolve_type": "user", "format": "bitString", "enabled": false, "usage": "all" } ], - "PCW_I2C0_HIGHADDR": [ { "value": "0xE0004FFF", "resolve_type": "user", "format": "bitString", "enabled": false, "usage": "all" } ], - "PCW_I2C1_BASEADDR": [ { "value": "0xE0005000", "resolve_type": "user", "format": "bitString", "enabled": false, "usage": "all" } ], - "PCW_I2C1_HIGHADDR": [ { "value": "0xE0005FFF", "resolve_type": "user", "format": "bitString", "enabled": false, "usage": "all" } ], - "PCW_SPI0_BASEADDR": [ { "value": "0xE0006000", "resolve_type": "user", "format": "bitString", "enabled": false, "usage": "all" } ], - "PCW_SPI0_HIGHADDR": [ { "value": "0xE0006FFF", "resolve_type": "user", "format": "bitString", "enabled": false, "usage": "all" } ], - "PCW_SPI1_BASEADDR": [ { "value": "0xE0007000", "resolve_type": "user", "format": "bitString", "enabled": false, "usage": "all" } ], - "PCW_SPI1_HIGHADDR": [ { "value": "0xE0007FFF", "resolve_type": "user", "format": "bitString", "enabled": false, "usage": "all" } ], - "PCW_CAN0_BASEADDR": [ { "value": "0xE0008000", "resolve_type": "user", "format": "bitString", "enabled": false, "usage": "all" } ], - "PCW_CAN0_HIGHADDR": [ { "value": "0xE0008FFF", "resolve_type": "user", "format": "bitString", "enabled": false, "usage": "all" } ], - "PCW_CAN1_BASEADDR": [ { "value": "0xE0009000", "resolve_type": "user", "format": "bitString", "enabled": false, "usage": "all" } ], - "PCW_CAN1_HIGHADDR": [ { "value": "0xE0009FFF", "resolve_type": "user", "format": "bitString", "enabled": false, "usage": "all" } ], - "PCW_GPIO_BASEADDR": [ { "value": "0xE000A000", "resolve_type": "user", "format": "bitString", "enabled": false, "usage": "all" } ], - "PCW_GPIO_HIGHADDR": [ { "value": "0xE000AFFF", "resolve_type": "user", "format": "bitString", "enabled": false, "usage": "all" } ], - "PCW_ENET0_BASEADDR": [ { "value": "0xE000B000", "resolve_type": "user", "format": "bitString", "enabled": false, "usage": "all" } ], - "PCW_ENET0_HIGHADDR": [ { "value": "0xE000BFFF", "resolve_type": "user", "format": "bitString", "enabled": false, "usage": "all" } ], - "PCW_ENET1_BASEADDR": [ { "value": "0xE000C000", "resolve_type": "user", "format": "bitString", "enabled": false, "usage": "all" } ], - "PCW_ENET1_HIGHADDR": [ { "value": "0xE000CFFF", "resolve_type": "user", "format": "bitString", "enabled": false, "usage": "all" } ], - "PCW_SDIO0_BASEADDR": [ { "value": "0xE0100000", "resolve_type": "user", "format": "bitString", "enabled": false, "usage": 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"0xE0104000", "resolve_type": "user", "format": "bitString", "enabled": false, "usage": "all" } ], - "PCW_TTC0_HIGHADDR": [ { "value": "0xE0104fff", "resolve_type": "user", "format": "bitString", "enabled": false, "usage": "all" } ], - "PCW_TTC1_BASEADDR": [ { "value": "0xE0105000", "resolve_type": "user", "format": "bitString", "enabled": false, "usage": "all" } ], - "PCW_TTC1_HIGHADDR": [ { "value": "0xE0105fff", "resolve_type": "user", "format": "bitString", "enabled": false, "usage": "all" } ], - "PCW_FCLK_CLK0_BUF": [ { "value": "TRUE", "resolve_type": "user", "usage": "all" } ], - "PCW_FCLK_CLK1_BUF": [ { "value": "FALSE", "resolve_type": "user", "enabled": false, "usage": "all" } ], - "PCW_FCLK_CLK2_BUF": [ { "value": "FALSE", "resolve_type": "user", "enabled": false, "usage": "all" } ], - "PCW_FCLK_CLK3_BUF": [ { "value": "FALSE", "resolve_type": "user", "enabled": false, "usage": "all" } ], - "PCW_UIPARAM_DDR_FREQ_MHZ": [ { "value": "533.333333", "resolve_type": "user", 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a/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/sources_1/bd/system_bd/system_bd.bd +++ /dev/null @@ -1,1087 +0,0 @@ -{ - "design": { - "design_info": { - "boundary_crc": "0x5FBD1CCA8A8679DB", - "device": "xc7z100ffg900-2", - "gen_directory": "../../../../duifei_cal_coarse.gen/sources_1/bd/system_bd", - "name": "system_bd", - "rev_ctrl_bd_flag": "RevCtrlBdOff", - "synth_flow_mode": "Hierarchical", - "tool_version": "2023.2.1", - "validated": "true" - }, - "design_tree": { - "processing_system7": "", - "axi_spi_engine": { - "axi_spi_engine": "", - "spi_engine_execution": "" - }, - "ps7_axi_periph": { - "s00_couplers": { - "auto_pc": "" - } - }, - "rst_ps7_100M": "", - "xlconcat_irq": "" - }, - "interface_ports": { - "DDR": { - "mode": "Master", - "vlnv_bus_definition": "xilinx.com:interface:ddrx:1.0", - "vlnv": "xilinx.com:interface:ddrx_rtl:1.0", - "parameters": { - "AXI_ARBITRATION_SCHEME": { - "value": "TDM", - "value_src": "default" - }, - "BURST_LENGTH": { - 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"DDR_ck_p", - "direction": "IO" - }, - "CS_N": { - "physical_name": "DDR_cs_n", - "direction": "IO" - }, - "RESET_N": { - "physical_name": "DDR_reset_n", - "direction": "IO" - }, - "ODT": { - "physical_name": "DDR_odt", - "direction": "IO" - }, - "RAS_N": { - "physical_name": "DDR_ras_n", - "direction": "IO" - }, - "WE_N": { - "physical_name": "DDR_we_n", - "direction": "IO" - }, - "BA": { - "physical_name": "DDR_ba", - "direction": "IO", - "left": "2", - "right": "0" - }, - "ADDR": { - "physical_name": "DDR_addr", - "direction": "IO", - "left": "14", - "right": "0" - }, - "DM": { - "physical_name": "DDR_dm", - "direction": "IO", - "left": "3", - "right": "0" - }, - "DQ": { - "physical_name": "DDR_dq", - "direction": "IO", - "left": "31", - "right": "0" - }, - "DQS_N": { - "physical_name": "DDR_dqs_n", - "direction": "IO", - "left": "3", - "right": "0" - }, - "DQS_P": { - "physical_name": "DDR_dqs_p", - "direction": "IO", - "left": "3", - "right": "0" - } - } - }, - "FIXED_IO": { - "mode": "Master", - "vlnv_bus_definition": "xilinx.com:display_processing_system7:fixedio:1.0", - "vlnv": "xilinx.com:display_processing_system7:fixedio_rtl:1.0", - "parameters": { - "CAN_DEBUG": { - "value": "false", - "value_src": "default" - } - }, - "port_maps": { - "MIO": { - "physical_name": "FIXED_IO_mio", - "direction": "IO", - "left": "53", - "right": "0" - }, - "DDR_VRN": { - "physical_name": "FIXED_IO_ddr_vrn", - "direction": "IO" - }, - "DDR_VRP": { - "physical_name": "FIXED_IO_ddr_vrp", - "direction": "IO" - }, - "PS_SRSTB": { - "physical_name": "FIXED_IO_ps_srstb", - "direction": "IO" - }, - "PS_CLK": { - "physical_name": "FIXED_IO_ps_clk", - "direction": "IO" - }, - "PS_PORB": { - "physical_name": "FIXED_IO_ps_porb", - "direction": "IO" - } - } - }, - "spi": { - "mode": "Master", - "vlnv_bus_definition": "analog.com:interface:spi_master:1.0", - "vlnv": "analog.com:interface:spi_master_rtl:1.0", - "port_maps": { - "SCLK": { - "physical_name": "spi_sclk", - "direction": "O" - }, - "SDI": { - "physical_name": "spi_sdi", - "direction": "I", - "left": "0", - "right": "0" - }, - "SDO": { - "physical_name": "spi_sdo", - "direction": "O" - }, - "SDO_T": { - "physical_name": "spi_sdo_t", - "direction": "O" - }, - "THREE_WIRE": { - "physical_name": "spi_three_wire", - "direction": "O" - }, - "CS": { - "physical_name": "spi_cs", - "direction": "O", - "left": "2", - "right": "0" - } - } - } - }, - "ports": { - "GPIO_O": { - "direction": "O", - "left": "47", - "right": "0" - }, - "GPIO_I": { - "direction": "I", - "left": "47", - "right": "0" - }, - "GPIO_T": { - "direction": "O", - "left": "47", - "right": "0" - }, - "spi_active": { - "direction": "O" - } - }, - "components": { - "processing_system7": { - "vlnv": "xilinx.com:ip:processing_system7:5.5", - "ip_revision": "6", - "xci_name": "system_bd_processing_system7_0_0", - "xci_path": "ip/system_bd_processing_system7_0_0/system_bd_processing_system7_0_0.xci", - "inst_hier_path": "processing_system7", - "parameters": { - "PCW_ACT_APU_PERIPHERAL_FREQMHZ": { - "value": "666.666687" - }, - "PCW_ACT_CAN_PERIPHERAL_FREQMHZ": { - "value": "10.000000" - }, - "PCW_ACT_DCI_PERIPHERAL_FREQMHZ": { - "value": "10.158730" - }, - "PCW_ACT_ENET0_PERIPHERAL_FREQMHZ": { - "value": "10.000000" - }, - "PCW_ACT_ENET1_PERIPHERAL_FREQMHZ": { - "value": "10.000000" - }, - "PCW_ACT_FPGA0_PERIPHERAL_FREQMHZ": { - "value": "100.000000" - }, - "PCW_ACT_FPGA1_PERIPHERAL_FREQMHZ": { - "value": "10.000000" - }, - "PCW_ACT_FPGA2_PERIPHERAL_FREQMHZ": { - "value": "10.000000" - }, - "PCW_ACT_FPGA3_PERIPHERAL_FREQMHZ": { - "value": "10.000000" - }, - "PCW_ACT_PCAP_PERIPHERAL_FREQMHZ": { - "value": "200.000000" - }, - "PCW_ACT_QSPI_PERIPHERAL_FREQMHZ": { - "value": "200.000000" - }, - "PCW_ACT_SDIO_PERIPHERAL_FREQMHZ": { - "value": "10.000000" - }, - "PCW_ACT_SMC_PERIPHERAL_FREQMHZ": { - "value": "10.000000" - }, - "PCW_ACT_SPI_PERIPHERAL_FREQMHZ": { - "value": "10.000000" - }, - "PCW_ACT_TPIU_PERIPHERAL_FREQMHZ": { - "value": "200.000000" - }, - "PCW_ACT_TTC0_CLK0_PERIPHERAL_FREQMHZ": { - "value": "111.111115" - }, - "PCW_ACT_TTC0_CLK1_PERIPHERAL_FREQMHZ": { - "value": "111.111115" - }, - "PCW_ACT_TTC0_CLK2_PERIPHERAL_FREQMHZ": { - "value": "111.111115" - }, - "PCW_ACT_TTC1_CLK0_PERIPHERAL_FREQMHZ": { - "value": "111.111115" - }, - "PCW_ACT_TTC1_CLK1_PERIPHERAL_FREQMHZ": { - "value": "111.111115" - }, - "PCW_ACT_TTC1_CLK2_PERIPHERAL_FREQMHZ": { - "value": "111.111115" - }, - "PCW_ACT_UART_PERIPHERAL_FREQMHZ": { - "value": "10.000000" - }, - "PCW_ACT_WDT_PERIPHERAL_FREQMHZ": { - "value": "111.111115" - }, - "PCW_CLK0_FREQ": { - "value": "100000000" - }, - "PCW_CLK1_FREQ": { - "value": "10000000" - }, - "PCW_CLK2_FREQ": { - "value": "10000000" - }, - "PCW_CLK3_FREQ": { - "value": "10000000" - }, - "PCW_DDR_RAM_HIGHADDR": { - "value": "0x1FFFFFFF" - }, - "PCW_EN_EMIO_CD_SDIO1": { - "value": "0" - }, - "PCW_EN_EMIO_GPIO": { - "value": "1" - }, - "PCW_EN_EMIO_SDIO1": { - "value": "0" - }, - "PCW_EN_EMIO_SPI0": { - "value": "0" - }, - "PCW_EN_EMIO_WP_SDIO1": { - "value": "0" - }, - "PCW_EN_QSPI": { - "value": "1" - }, - "PCW_EN_SDIO1": { - "value": "0" - }, - "PCW_EN_SPI0": { - "value": "0" - }, - "PCW_FPGA0_PERIPHERAL_FREQMHZ": { - "value": "100" - }, - "PCW_FPGA_FCLK0_ENABLE": { - "value": "1" - }, - "PCW_GPIO_EMIO_GPIO_ENABLE": { - "value": "1" - }, - "PCW_GPIO_EMIO_GPIO_IO": { - "value": "48" - }, - "PCW_GPIO_EMIO_GPIO_WIDTH": { - "value": "48" - }, - "PCW_IRQ_F2P_INTR": { - "value": "1" - }, - "PCW_MIO_1_IOTYPE": { - "value": "LVCMOS 3.3V" - }, - "PCW_MIO_1_PULLUP": { - "value": "enabled" - }, - "PCW_MIO_1_SLEW": { - "value": "slow" - }, - "PCW_MIO_2_IOTYPE": { - "value": "LVCMOS 3.3V" - }, - "PCW_MIO_2_SLEW": { - "value": "slow" - }, - "PCW_MIO_3_IOTYPE": { - "value": "LVCMOS 3.3V" - }, - "PCW_MIO_3_SLEW": { - "value": "slow" - }, - "PCW_MIO_4_IOTYPE": { - "value": "LVCMOS 3.3V" - }, - "PCW_MIO_4_SLEW": { - "value": "slow" - }, - "PCW_MIO_5_IOTYPE": { - "value": "LVCMOS 3.3V" - }, - "PCW_MIO_5_SLEW": { - "value": "slow" - }, - "PCW_MIO_6_IOTYPE": { - "value": "LVCMOS 3.3V" - }, - "PCW_MIO_6_SLEW": { - "value": "slow" - }, - "PCW_MIO_TREE_PERIPHERALS": { - "value": [ - "unassigned#Quad SPI Flash#Quad SPI Flash#Quad SPI Flash#Quad SPI Flash#Quad SPI Flash#Quad SPI", - "Flash#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned" - ] - }, - "PCW_MIO_TREE_SIGNALS": { - "value": "unassigned#qspi0_ss_b#qspi0_io[0]#qspi0_io[1]#qspi0_io[2]#qspi0_io[3]/HOLD_B#qspi0_sclk#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned" - }, - "PCW_QSPI_GRP_FBCLK_ENABLE": { - "value": "0" - }, - "PCW_QSPI_GRP_IO1_ENABLE": { - "value": "0" - }, - "PCW_QSPI_GRP_SINGLE_SS_ENABLE": { - "value": "1" - }, - "PCW_QSPI_GRP_SINGLE_SS_IO": { - "value": "MIO 1 .. 6" - }, - "PCW_QSPI_GRP_SS1_ENABLE": { - "value": "0" - }, - "PCW_QSPI_PERIPHERAL_ENABLE": { - "value": "1" - }, - "PCW_QSPI_PERIPHERAL_FREQMHZ": { - "value": "200" - }, - "PCW_QSPI_QSPI_IO": { - "value": "MIO 1 .. 6" - }, - "PCW_SD1_PERIPHERAL_ENABLE": { - "value": "0" - }, - "PCW_SDIO_PERIPHERAL_VALID": { - "value": "0" - }, - "PCW_SINGLE_QSPI_DATA_MODE": { - "value": "x4" - }, - "PCW_SPI0_PERIPHERAL_ENABLE": { - "value": "0" - }, - "PCW_SPI_PERIPHERAL_FREQMHZ": { - "value": "166.666666" - }, - "PCW_SPI_PERIPHERAL_VALID": { - "value": "0" - }, - "PCW_UIPARAM_ACT_DDR_FREQ_MHZ": { - "value": "533.333374" - }, - "PCW_UIPARAM_DDR_BUS_WIDTH": { - "value": "16 Bit" - }, - "PCW_UIPARAM_DDR_ECC": { - "value": "Disabled" - }, - "PCW_UIPARAM_DDR_PARTNO": { - "value": "MT41J256M16 RE-125" - }, - "PCW_USE_FABRIC_INTERRUPT": { - "value": "1" - }, - "PCW_USE_M_AXI_GP0": { - "value": "1" - } - }, - "interface_ports": { - "M_AXI_GP0": { - "vlnv": "xilinx.com:interface:aximm_rtl:1.0", - "mode": "Master", - "address_space_ref": "Data", - "base_address": { - "minimum": "0x40000000", - "maximum": "0x7FFFFFFF", - "width": "32" - } - } - }, - "addressing": { - "address_spaces": { - "Data": { - "range": "4G", - "width": "32", - "local_memory_map": { - "name": "Data", - "description": "Address Space Segments", - "address_blocks": { - "segment1": { - "name": "segment1", - "display_name": "segment1", - "base_address": "0x00000000", - "range": "256K", - "width": "18", - "usage": "register" - }, - "segment2": { - "name": "segment2", - "display_name": "segment2", - "base_address": "0x00040000", - "range": "256K", - "width": "19", - "usage": "register" - }, - "segment3": { - "name": "segment3", - "display_name": "segment3", - "base_address": "0x00080000", - "range": "512K", - "width": "20", - "usage": "register" - }, - "segment4": { - "name": "segment4", - "display_name": "segment4", - "base_address": "0x00100000", - "range": "1023M", - "width": "30", - "usage": "register" - }, - "M_AXI_GP0": { - "name": "M_AXI_GP0", - "display_name": "M_AXI_GP0", - "base_address": "0x40000000", - "range": "1G", - "width": "31", - "usage": "register" - }, - "M_AXI_GP1": { - "name": "M_AXI_GP1", - "display_name": "M_AXI_GP1", - "base_address": "0x80000000", - "range": "1G", - "width": "32", - "usage": "register" - }, - "IO_Peripheral_Registers": { - "name": "IO_Peripheral_Registers", - "display_name": "IO Peripheral Registers", - "base_address": "0xE0000000", - "range": "3M", - "width": "32", - "usage": "register" - }, - "SMC_Memories": { - "name": "SMC_Memories", - "display_name": "SMC Memories", - "base_address": "0xE1000000", - "range": "80M", - "width": "32", - "usage": "register" - }, - "SLCR_Registers": { - "name": "SLCR_Registers", - "display_name": "SLCR Registers", - "base_address": "0xF8000000", - "range": "3K", - "width": "32", - "usage": "register" - }, - "PS_System_Registers": { - "name": "PS_System_Registers", - "display_name": "PS System Registers", - "base_address": "0xF8001000", - "range": "8252K", - "width": "32", - "usage": "register" - }, - "CPU_Private_Registers": { - "name": "CPU_Private_Registers", - "display_name": "CPU Private Registers", - "base_address": "0xF8900000", - "range": "6156K", - "width": "32", - "usage": "register" - }, - "segment5": { - "name": "segment5", - "display_name": "segment5", - "base_address": "0xFC000000", - "range": "32M", - "width": "32", - "usage": "register" - }, - "segment6": { - "name": "segment6", - "display_name": "segment6", - "base_address": "0xFFFC0000", - "range": "256K", - "width": "32", - "usage": "register" - } - } - } - } - } - } - }, - "axi_spi_engine": { - "interface_ports": { - "s_axi": { - "mode": "Slave", - "vlnv_bus_definition": "xilinx.com:interface:aximm:1.0", - "vlnv": "xilinx.com:interface:aximm_rtl:1.0" - }, - "spi": { - "mode": "Master", - "vlnv_bus_definition": "analog.com:interface:spi_master:1.0", - "vlnv": "analog.com:interface:spi_master_rtl:1.0" - } - }, - "ports": { - "irq": { - "direction": "O" - }, - "s_axi_aclk": { - "type": "clk", - "direction": "I" - }, - "s_axi_aresetn": { - "type": "rst", - "direction": "I" - }, - "spi_clk": { - "type": "clk", - "direction": "I" - }, - "active": { - "direction": "O" - } - }, - "components": { - "axi_spi_engine": { - "vlnv": "analog.com:user:axi_spi_engine:1.0", - "ip_revision": "1", - "xci_name": "system_bd_axi_spi_engine_0_0", - "xci_path": "ip/system_bd_axi_spi_engine_0_0/system_bd_axi_spi_engine_0_0.xci", - "inst_hier_path": "axi_spi_engine/axi_spi_engine" - }, - "spi_engine_execution": { - "vlnv": "analog.com:user:spi_engine_execution:1.0", - "ip_revision": "1", - "xci_name": "system_bd_spi_engine_execution_0_0", - "xci_path": "ip/system_bd_spi_engine_execution_0_0/system_bd_spi_engine_execution_0_0.xci", - "inst_hier_path": "axi_spi_engine/spi_engine_execution", - "parameters": { - "NUM_OF_CS": { - "value": "3" - } - } - } - }, - "interface_nets": { - "Conn1": { - "interface_ports": [ - "axi_spi_engine/s_axi", - "s_axi" - ] - }, - "Conn2": { - "interface_ports": [ - "spi_engine_execution/spi", - "spi" - ] - }, - "axi_spi_engine_spi_engine_ctrl": { - "interface_ports": [ - "axi_spi_engine/spi_engine_ctrl", - "spi_engine_execution/ctrl" - ] - } - }, - "nets": { - "axi_spi_engine_irq": { - "ports": [ - "axi_spi_engine/irq", - "irq" - ] - }, - "axi_spi_engine_spi_resetn": { - "ports": [ - "axi_spi_engine/spi_resetn", - "spi_engine_execution/resetn" - ] - }, - "s_axi_aclk_0_1": { - "ports": [ - "s_axi_aclk", - "axi_spi_engine/s_axi_aclk" - ] - }, - "s_axi_aresetn_1": { - "ports": [ - "s_axi_aresetn", - "axi_spi_engine/s_axi_aresetn" - ] - }, - "spi_clk_0_1": { - "ports": [ - "spi_clk", - "axi_spi_engine/spi_clk", - "spi_engine_execution/clk" - ] - }, - "spi_engine_execution_active": { - "ports": [ - "spi_engine_execution/active", - "active" - ] - } - } - }, - "ps7_axi_periph": { - "vlnv": "xilinx.com:ip:axi_interconnect:2.1", - "xci_path": "ip/system_bd_ps7_axi_periph_0/system_bd_ps7_axi_periph_0.xci", - "inst_hier_path": "ps7_axi_periph", - "xci_name": "system_bd_ps7_axi_periph_0", - "parameters": { - "NUM_MI": { - "value": "1" - } - }, - "interface_ports": { - "S00_AXI": { - "mode": "Slave", - "vlnv_bus_definition": "xilinx.com:interface:aximm:1.0", - "vlnv": "xilinx.com:interface:aximm_rtl:1.0" - }, - "M00_AXI": { - "mode": "Master", - "vlnv_bus_definition": "xilinx.com:interface:aximm:1.0", - "vlnv": "xilinx.com:interface:aximm_rtl:1.0" - } - }, - "ports": { - "ACLK": { - "type": "clk", - "direction": "I", - "parameters": { - "ASSOCIATED_RESET": { - "value": "ARESETN" - } - } - }, - "ARESETN": { - "type": "rst", - "direction": "I" - }, - "S00_ACLK": { - "type": "clk", - "direction": "I", - "parameters": { - "ASSOCIATED_BUSIF": { - "value": "S00_AXI" - }, - "ASSOCIATED_RESET": { - "value": "S00_ARESETN" - } - } - }, - "S00_ARESETN": { - "type": "rst", - "direction": "I" - }, - "M00_ACLK": { - "type": "clk", - "direction": "I", - "parameters": { - "ASSOCIATED_BUSIF": { - "value": "M00_AXI" - }, - "ASSOCIATED_RESET": { - "value": "M00_ARESETN" - } - } - }, - "M00_ARESETN": { - "type": "rst", - "direction": "I" - } - }, - "components": { - "s00_couplers": { - "interface_ports": { - "M_AXI": { - "mode": "Master", - "vlnv_bus_definition": "xilinx.com:interface:aximm:1.0", - "vlnv": "xilinx.com:interface:aximm_rtl:1.0" - }, - "S_AXI": { - "mode": "Slave", - "vlnv_bus_definition": "xilinx.com:interface:aximm:1.0", - "vlnv": "xilinx.com:interface:aximm_rtl:1.0" - } - }, - "ports": { - "M_ACLK": { - "type": "clk", - "direction": "I", - "parameters": { - "ASSOCIATED_BUSIF": { - "value": "M_AXI" - }, - "ASSOCIATED_RESET": { - "value": "M_ARESETN" - } - } - }, - "M_ARESETN": { - "type": "rst", - "direction": "I" - }, - "S_ACLK": { - "type": "clk", - "direction": "I", - "parameters": { - "ASSOCIATED_BUSIF": { - "value": "S_AXI" - }, - "ASSOCIATED_RESET": { - "value": "S_ARESETN" - } - } - }, - "S_ARESETN": { - "type": "rst", - "direction": "I" - } - }, - "components": { - "auto_pc": { - "vlnv": "xilinx.com:ip:axi_protocol_converter:2.1", - "ip_revision": "30", - "xci_name": "system_bd_auto_pc_0", - "xci_path": "ip/system_bd_auto_pc_0/system_bd_auto_pc_0.xci", - "inst_hier_path": "ps7_axi_periph/s00_couplers/auto_pc", - "parameters": { - "MI_PROTOCOL": { - "value": "AXI4LITE" - }, - "SI_PROTOCOL": { - "value": "AXI3" - } - }, - "interface_ports": { - "S_AXI": { - "vlnv": "xilinx.com:interface:aximm_rtl:1.0", - "mode": "Slave", - "bridges": [ - "M_AXI" - ] - } - } - } - }, - "interface_nets": { - "auto_pc_to_s00_couplers": { - "interface_ports": [ - "M_AXI", - "auto_pc/M_AXI" - ] - }, - "s00_couplers_to_auto_pc": { - "interface_ports": [ - "S_AXI", - "auto_pc/S_AXI" - ] - } - }, - "nets": { - "S_ACLK_1": { - "ports": [ - "S_ACLK", - "auto_pc/aclk" - ] - }, - "S_ARESETN_1": { - "ports": [ - "S_ARESETN", - "auto_pc/aresetn" - ] - } - } - } - }, - "interface_nets": { - "ps7_axi_periph_to_s00_couplers": { - "interface_ports": [ - "S00_AXI", - "s00_couplers/S_AXI" - ] - }, - "s00_couplers_to_ps7_axi_periph": { - "interface_ports": [ - "s00_couplers/M_AXI", - "M00_AXI" - ] - } - }, - "nets": { - "S00_ACLK_1": { - "ports": [ - "S00_ACLK", - "s00_couplers/S_ACLK" - ] - }, - "S00_ARESETN_1": { - "ports": [ - "S00_ARESETN", - "s00_couplers/S_ARESETN" - ] - }, - "ps7_axi_periph_ACLK_net": { - "ports": [ - "M00_ACLK", - "s00_couplers/M_ACLK" - ] - }, - "ps7_axi_periph_ARESETN_net": { - "ports": [ - "M00_ARESETN", - "s00_couplers/M_ARESETN" - ] - } - } - }, - "rst_ps7_100M": { - "vlnv": "xilinx.com:ip:proc_sys_reset:5.0", - "ip_revision": "14", - "xci_name": "system_bd_rst_ps7_100M_0", - "xci_path": "ip/system_bd_rst_ps7_100M_0/system_bd_rst_ps7_100M_0.xci", - "inst_hier_path": "rst_ps7_100M" - }, - "xlconcat_irq": { - "vlnv": "xilinx.com:ip:xlconcat:2.1", - "ip_revision": "5", - "xci_name": "system_bd_xlconcat_0_0", - "xci_path": "ip/system_bd_xlconcat_0_0/system_bd_xlconcat_0_0.xci", - "inst_hier_path": "xlconcat_irq", - "parameters": { - "NUM_PORTS": { - "value": "1" - } - } - } - }, - "interface_nets": { - "axi_spi_engine_spi": { - "interface_ports": [ - "spi", - "axi_spi_engine/spi" - ] - }, - "processing_system7_0_DDR": { - "interface_ports": [ - "DDR", - "processing_system7/DDR" - ] - }, - "processing_system7_0_FIXED_IO": { - "interface_ports": [ - "FIXED_IO", - "processing_system7/FIXED_IO" - ] - }, - "processing_system7_M_AXI_GP0": { - "interface_ports": [ - "processing_system7/M_AXI_GP0", - "ps7_axi_periph/S00_AXI" - ] - }, - "ps7_axi_periph_M00_AXI": { - "interface_ports": [ - "ps7_axi_periph/M00_AXI", - "axi_spi_engine/s_axi" - ] - } - }, - "nets": { - "GPIO_I_0_1": { - "ports": [ - "GPIO_I", - "processing_system7/GPIO_I" - ] - }, - "axi_spi_engine_active": { - "ports": [ - "axi_spi_engine/active", - "spi_active" - ] - }, - "axi_spi_engine_irq": { - "ports": [ - "axi_spi_engine/irq", - "xlconcat_irq/In0" - ] - }, - "processing_system7_0_GPIO_O": { - "ports": [ - "processing_system7/GPIO_O", - "GPIO_O" - ] - }, - "processing_system7_0_GPIO_T": { - "ports": [ - "processing_system7/GPIO_T", - "GPIO_T" - ] - }, - "processing_system7_FCLK_CLK0": { - "ports": [ - "processing_system7/FCLK_CLK0", - "processing_system7/M_AXI_GP0_ACLK", - "ps7_axi_periph/S00_ACLK", - "rst_ps7_100M/slowest_sync_clk", - "axi_spi_engine/s_axi_aclk", - "ps7_axi_periph/M00_ACLK", - "ps7_axi_periph/ACLK", - "axi_spi_engine/spi_clk" - ] - }, - "processing_system7_FCLK_RESET0_N": { - "ports": [ - "processing_system7/FCLK_RESET0_N", - "rst_ps7_100M/ext_reset_in" - ] - }, - "rst_ps7_100M_peripheral_aresetn": { - "ports": [ - "rst_ps7_100M/peripheral_aresetn", - "ps7_axi_periph/S00_ARESETN", - "axi_spi_engine/s_axi_aresetn", - "ps7_axi_periph/M00_ARESETN", - "ps7_axi_periph/ARESETN" - ] - }, - "xlconcat_irq_dout": { - "ports": [ - "xlconcat_irq/dout", - "processing_system7/IRQ_F2P" - ] - } - }, - "addressing": { - "/processing_system7": { - "address_spaces": { - "Data": { - "segments": { - "SEG_axi_spi_engine_axi_lite": { - "address_block": "/axi_spi_engine/axi_spi_engine/s_axi/axi_lite", - "offset": "0x43C00000", - "range": "64K" - } - } - } - } - } - } - } -} \ No newline at end of file diff --git a/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/sources_1/bd/system_bd/system_bd.bda b/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/sources_1/bd/system_bd/system_bd.bda deleted file mode 100644 index c4216d3..0000000 --- a/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/sources_1/bd/system_bd/system_bd.bda +++ /dev/null @@ -1,226 +0,0 @@ -{ - "graphjs": { - "version": "1.0", - "keys": [ - { - "abrv": "VH", - "name": "vert_hid", - "type": "int", - "for": "node" - }, - { - "abrv": "VM", - "name": "vert_name", - "type": "string", - "for": "node" - }, - { - "abrv": "VT", - "name": "vert_type", - "type": "string", - "for": "node" - }, - { - "abrv": "BA", - "name": "base_addr", - "type": "string", - "for": "node" - }, - { - "abrv": "HA", - "name": "high_addr", - "type": "string", - "for": "node" - }, - { - "abrv": "BP", - "name": "base_param", - "type": "string", - "for": "node" - }, - { - "abrv": "HP", - "name": "high_param", - "type": "string", - "for": "node" - }, - { - "abrv": "MA", - "name": "master_addrspace", - "type": "string", - "for": "node" - }, - { - "abrv": "MX", - "name": "master_instance", - "type": "string", - "for": "node" - }, - { - "abrv": "MI", - "name": "master_interface", - "type": "string", - "for": "node" - }, - { - "abrv": "MS", - "name": "master_segment", - "type": "string", - "for": "node" - }, - { - "abrv": "MV", - "name": "master_vlnv", - "type": "string", - "for": "node" - }, - { - "abrv": "SX", - "name": "slave_instance", - "type": "string", - "for": "node" - }, - { - "abrv": "SI", - "name": "slave_interface", - "type": "string", - "for": "node" - }, - { - "abrv": "MM", - "name": "slave_memmap", - "type": "string", - "for": "node" - }, - { - "abrv": "SS", - "name": "slave_segment", - "type": "string", - "for": "node" - }, - { - "abrv": "SV", - "name": "slave_vlnv", - "type": "string", - "for": "node" - }, - { - "abrv": "TM", - "name": "memory_type", - "type": "string", - "for": "node" - }, - { - "abrv": "TU", - "name": "usage_type", - "type": "string", - "for": "node" - }, - { - "abrv": "LT", - "name": "lock_type", - "type": "string", - "for": "node" - }, - { - "abrv": "BT", - "name": "boot_type", - "type": "string", - "for": "node" - }, - { - "abrv": "EH", - "name": "edge_hid", - "type": "int", - "for": "edge" - } - ], - "vertice_type_order": [ - { - "abrv": "BC", - "desc": "Block Container" - }, - { - "abrv": "PR", - "desc": "Parital Reference" - }, - { - "abrv": "VR", - "desc": "Variant" - }, - { - "abrv": "PM", - "desc": "Variant Permutations" - }, - { - "abrv": "CX", - "desc": "Boundary Connection" - }, - { - "abrv": "AC", - "desc": "Assignment Coordinate" - }, - { - "abrv": "ACE", - "desc": "Excluded Assign Coordinate" - }, - { - "abrv": "APX", - "desc": "Boundary Aperture" - }, - { - "abrv": "CIP", - "desc": "High level Processing System" - } - ], - "vertices": { - "V0": { - "VM": "system_bd", - "VT": "BC" - }, - "V1": { - "VH": "2", - "VM": "system_bd", - "VT": "VR" - }, - "V2": { - "VH": "2", - "VT": "PM", - "TU": "active" - }, - "V3": { - "VT": "AC", - "BA": "0x43C00000", - "HA": "0x43C0FFFF", - "BP": "C_BASEADDR", - "HP": "C_HIGHADDR", - "MA": "Data", - "MX": "/processing_system7", - "MI": "M_AXI_GP0", - "MS": "SEG_axi_spi_engine_axi_lite", - "MV": "xilinx.com:ip:processing_system7:5.5", - "SX": "/axi_spi_engine/axi_spi_engine", - "SI": "s_axi", - "SS": "axi_lite", - "SV": "analog.com:user:axi_spi_engine:1.0", - "TM": "both", - "TU": "register" - } - }, - "edges": [ - { - "src": "V0", - "trg": "V1" - }, - { - "src": "V1", - "trg": "V2" - }, - { - "src": "V3", - "trg": "V2", - "EH": "2" - } - ] - } -} diff --git a/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/sources_1/bd/system_bd/ui/bd_c6d0cb12.ui b/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/sources_1/bd/system_bd/ui/bd_c6d0cb12.ui deleted file mode 100644 index e3a180c..0000000 --- a/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/sources_1/bd/system_bd/ui/bd_c6d0cb12.ui +++ /dev/null @@ -1,41 +0,0 @@ -{ - "ActiveEmotionalView":"Default View", - "Default View_ScaleFactor":"1.0", - "Default View_TopLeft":"-393,-47", - "ExpandedHierarchyInLayout":"", - "guistr":"# # String gsaved with Nlview 7.5.8 2022-09-21 7111 VDI=41 GEI=38 GUI=JA:10.0 TLS -# -string -flagsOSRD -preplace port DDR -pg 1 -lvl 3 -x 870 -y 180 -defaultsOSRD -preplace port FIXED_IO -pg 1 -lvl 3 -x 870 -y 200 -defaultsOSRD -preplace port spi -pg 1 -lvl 3 -x 870 -y 590 -defaultsOSRD -preplace port port-id_spi_active -pg 1 -lvl 3 -x 870 -y 630 -defaultsOSRD -preplace portBus GPIO_O -pg 1 -lvl 3 -x 870 -y 140 -defaultsOSRD -preplace portBus GPIO_I -pg 1 -lvl 3 -x 870 -y 120 -defaultsOSRD -right -preplace portBus GPIO_T -pg 1 -lvl 3 -x 870 -y 160 -defaultsOSRD -preplace inst processing_system7 -pg 1 -lvl 1 -x 270 -y 180 -defaultsOSRD -preplace inst axi_spi_engine -pg 1 -lvl 1 -x 270 -y 610 -defaultsOSRD -preplace inst ps7_axi_periph -pg 1 -lvl 1 -x 270 -y 420 -defaultsOSRD -preplace inst rst_ps7_100M -pg 1 -lvl 2 -x 670 -y 300 -defaultsOSRD -preplace inst xlconcat_irq -pg 1 -lvl 2 -x 670 -y 530 -defaultsOSRD -orient R180 -preplace netloc GPIO_I_0_1 1 1 2 N 120 N -preplace netloc axi_spi_engine_active 1 1 2 NJ 630 NJ -preplace netloc axi_spi_engine_irq 1 1 2 N 610 840 -preplace netloc processing_system7_0_GPIO_O 1 1 2 N 140 N -preplace netloc processing_system7_0_GPIO_T 1 1 2 N 160 N -preplace netloc processing_system7_FCLK_CLK0 1 0 2 70 30 470 -preplace netloc processing_system7_FCLK_RESET0_N 1 1 1 460 260n -preplace netloc rst_ps7_100M_peripheral_aresetn 1 0 3 50 20 NJ 20 840 -preplace netloc xlconcat_irq_dout 1 0 2 60 700 470 -preplace netloc axi_spi_engine_spi 1 1 2 NJ 590 NJ -preplace netloc processing_system7_0_DDR 1 1 2 NJ 180 N -preplace netloc processing_system7_0_FIXED_IO 1 1 2 NJ 200 N -preplace netloc processing_system7_M_AXI_GP0 1 0 2 80 40 460J -preplace netloc ps7_axi_periph_M00_AXI 1 0 2 80 690 460J -levelinfo -pg 1 0 270 670 870 -pagesize -pg 1 -db -bbox -sgen 0 0 1020 710 -" -} -{ - "da_axi4_cnt":"1", - "da_ps7_cnt":"1" -} diff --git a/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/sources_1/bd/system_bd/ui/bd_e4e34314.ui b/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/sources_1/bd/system_bd/ui/bd_e4e34314.ui deleted file mode 100644 index 53e91b2..0000000 --- a/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/sources_1/bd/system_bd/ui/bd_e4e34314.ui +++ /dev/null @@ -1,30 +0,0 @@ -{ - "ActiveEmotionalView":"Default View", - "Default View_ScaleFactor":"1.0", - "Default View_TopLeft":"-778,-240", - "ExpandedHierarchyInLayout":"", - "guistr":"# # String gsaved with Nlview 7.5.8 2022-09-21 7111 VDI=41 GEI=38 GUI=JA:10.0 TLS -# -string -flagsOSRD -preplace port s_axi -pg 1 -lvl 0 -x 0 -y 70 -defaultsOSRD -preplace port spi -pg 1 -lvl 2 -x 340 -y 230 -defaultsOSRD -preplace port port-id_irq -pg 1 -lvl 2 -x 340 -y 100 -defaultsOSRD -preplace port port-id_s_axi_aclk -pg 1 -lvl 0 -x 0 -y 90 -defaultsOSRD -preplace port port-id_s_axi_aresetn -pg 1 -lvl 0 -x 0 -y 110 -defaultsOSRD -preplace port port-id_spi_clk -pg 1 -lvl 0 -x 0 -y 130 -defaultsOSRD -preplace port port-id_active -pg 1 -lvl 2 -x 340 -y 250 -defaultsOSRD -preplace inst axi_spi_engine -pg 1 -lvl 1 -x 180 -y 90 -defaultsOSRD -preplace inst spi_engine_execution -pg 1 -lvl 1 -x 180 -y 240 -defaultsOSRD -preplace netloc axi_spi_engine_spi_resetn 1 0 2 40 320 320 -preplace netloc axi_spi_engine_irq 1 1 1 320J 90n -preplace netloc s_axi_aclk_0_1 1 0 1 20 80n -preplace netloc spi_clk_0_1 1 0 1 30 120n -preplace netloc spi_engine_execution_active 1 1 1 N 250 -preplace netloc s_axi_aresetn_1 1 0 1 20 100n -preplace netloc axi_spi_engine_spi_engine_ctrl 1 0 2 40 0 320 -preplace netloc Conn1 1 0 1 20 60n -preplace netloc Conn2 1 1 1 N 230 -levelinfo -pg 1 0 180 340 -pagesize -pg 1 -db -bbox -sgen -150 -10 440 350 -" -} - diff --git a/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/sources_1/ip/ad9361_clk_gen_cmos_2t2r/ad9361_clk_gen_cmos_2t2r.xci b/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/sources_1/ip/ad9361_clk_gen_cmos_2t2r/ad9361_clk_gen_cmos_2t2r.xci deleted file mode 100644 index 4cc9a25..0000000 --- a/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/sources_1/ip/ad9361_clk_gen_cmos_2t2r/ad9361_clk_gen_cmos_2t2r.xci +++ /dev/null @@ -1,713 +0,0 @@ -{ - "schema": "xilinx.com:schema:json_instance:1.0", - "ip_inst": { - "xci_name": "ad9361_clk_gen_cmos_2t2r", - "component_reference": "xilinx.com:ip:clk_wiz:6.0", - "ip_revision": "13", - "gen_directory": "../../../../duifei_cal_coarse.gen/sources_1/ip/ad9361_clk_gen_cmos_2t2r", - "parameters": { - "component_parameters": { - "Component_Name": [ { "value": "ad9361_clk_gen_cmos_2t2r", "resolve_type": "user", "usage": "all" } ], - "USER_CLK_FREQ0": [ { "value": "100.0", "resolve_type": "user", "format": "float", "usage": "all" } ], - "USER_CLK_FREQ1": [ { "value": "100.0", "resolve_type": "user", "format": "float", "usage": "all" } ], - "USER_CLK_FREQ2": [ { "value": "100.0", "resolve_type": "user", "format": "float", "usage": "all" } ], - "USER_CLK_FREQ3": [ { "value": "100.0", "resolve_type": "user", "format": "float", "usage": "all" } ], - "ENABLE_CLOCK_MONITOR": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "OPTIMIZE_CLOCKING_STRUCTURE_EN": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "ENABLE_USER_CLOCK0": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "ENABLE_USER_CLOCK1": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "ENABLE_USER_CLOCK2": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "ENABLE_USER_CLOCK3": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "Enable_PLL0": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "Enable_PLL1": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "REF_CLK_FREQ": [ { "value": "100.0", "resolve_type": "user", "format": "float", "usage": "all" } ], - "PRECISION": [ { "value": "1", "resolve_type": "user", "format": "float", "usage": "all" } ], - "PRIMITIVE": [ { "value": "MMCM", "resolve_type": "user", "usage": "all" } ], - "PRIMTYPE_SEL": [ { "value": "mmcm_adv", "resolve_type": "user", "usage": "all" } ], - "CLOCK_MGR_TYPE": [ { "value": "auto", "resolve_type": "user", "usage": "all" } ], - "USE_FREQ_SYNTH": [ { "value": "true", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "USE_SPREAD_SPECTRUM": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "USE_PHASE_ALIGNMENT": [ { "value": "true", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "USE_MIN_POWER": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "USE_DYN_PHASE_SHIFT": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "USE_DYN_RECONFIG": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "JITTER_SEL": [ { "value": "No_Jitter", "resolve_type": "user", "usage": "all" } ], - "PRIM_IN_FREQ": [ { "value": "96", "value_src": "user", "resolve_type": "user", "format": "float", "usage": "all" } ], - "PRIM_IN_TIMEPERIOD": [ { "value": "10.000", "resolve_type": "user", "format": "float", "usage": "all" } ], - "IN_FREQ_UNITS": [ { "value": "Units_MHz", "resolve_type": "user", "usage": "all" } ], - "PHASESHIFT_MODE": [ { "value": "WAVEFORM", "resolve_type": "user", "usage": "all" } ], - "IN_JITTER_UNITS": [ { "value": "Units_UI", "resolve_type": "user", "usage": "all" } ], - "RELATIVE_INCLK": [ { "value": "REL_PRIMARY", "resolve_type": "user", "usage": "all" } ], - "USE_INCLK_SWITCHOVER": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "SECONDARY_IN_FREQ": [ { "value": "100.000", "resolve_type": "user", "format": "float", "usage": "all" } ], - "SECONDARY_IN_TIMEPERIOD": [ { "value": "10.000", "resolve_type": "user", "format": "float", "usage": "all" } ], - "SECONDARY_PORT": [ { "value": "clk_in2", "resolve_type": "user", "usage": "all" } ], - "SECONDARY_SOURCE": [ { "value": "Single_ended_clock_capable_pin", "resolve_type": "user", "usage": "all" } ], - "JITTER_OPTIONS": [ { "value": "UI", "resolve_type": "user", "usage": "all" } ], - "CLKIN1_UI_JITTER": [ { "value": "0.010", "resolve_type": "user", "format": "float", "usage": "all" } ], - "CLKIN2_UI_JITTER": [ { "value": "0.010", "resolve_type": "user", "format": "float", "usage": "all" } ], - "PRIM_IN_JITTER": [ { "value": "0.010", "resolve_type": "user", "format": "float", "usage": "all" } ], - "SECONDARY_IN_JITTER": [ { "value": "0.010", "resolve_type": "user", "format": "float", "usage": "all" } ], - "CLKIN1_JITTER_PS": [ { "value": "104.16", "value_src": "user", "resolve_type": "user", "format": "float", "usage": "all" } ], - "CLKIN2_JITTER_PS": [ { "value": "100.0", "resolve_type": "user", "format": "float", "usage": "all" } ], - "CLKOUT1_USED": [ { "value": "true", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "CLKOUT2_USED": [ { "value": "true", "value_src": "user", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "CLKOUT3_USED": [ { "value": "true", "value_src": "user", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "CLKOUT4_USED": [ { "value": "true", "value_src": "user", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "CLKOUT5_USED": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "CLKOUT6_USED": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "CLKOUT7_USED": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "NUM_OUT_CLKS": [ { "value": "4", "value_src": "user", "resolve_type": "user", "format": "long", "usage": "all" } ], - "CLK_OUT1_USE_FINE_PS_GUI": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "CLK_OUT2_USE_FINE_PS_GUI": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "CLK_OUT3_USE_FINE_PS_GUI": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "CLK_OUT4_USE_FINE_PS_GUI": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "CLK_OUT5_USE_FINE_PS_GUI": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "CLK_OUT6_USE_FINE_PS_GUI": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "CLK_OUT7_USE_FINE_PS_GUI": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "PRIMARY_PORT": [ { "value": "clk_in1", "resolve_type": "user", "usage": "all" } ], - "CLK_OUT1_PORT": [ { "value": "clk_out1", "resolve_type": "user", "usage": "all" } ], - "CLK_OUT2_PORT": [ { "value": "clk_out2", "resolve_type": "user", "usage": "all" } ], - "CLK_OUT3_PORT": [ { "value": "clk_out3", "resolve_type": "user", "usage": "all" } ], - "CLK_OUT4_PORT": [ { "value": "clk_out4", "resolve_type": "user", "usage": "all" } ], - "CLK_OUT5_PORT": [ { "value": "clk_out5", "resolve_type": "user", "usage": "all" } ], - "CLK_OUT6_PORT": [ { "value": "clk_out6", "resolve_type": "user", "usage": "all" } ], - "CLK_OUT7_PORT": [ { "value": "clk_out7", "resolve_type": "user", "usage": "all" } ], - "DADDR_PORT": [ { "value": "daddr", "resolve_type": "user", "usage": "all" } ], - "DCLK_PORT": [ { "value": "dclk", "resolve_type": "user", "usage": "all" } ], - "DRDY_PORT": [ { "value": "drdy", "resolve_type": "user", "usage": "all" } ], - "DWE_PORT": [ { "value": "dwe", "resolve_type": "user", "usage": "all" } ], - "DIN_PORT": [ { "value": "din", "resolve_type": "user", "usage": "all" } ], - "DOUT_PORT": [ { "value": "dout", "resolve_type": "user", "usage": "all" } ], - "DEN_PORT": [ { "value": "den", "resolve_type": "user", "usage": "all" } ], - "PSCLK_PORT": [ { "value": "psclk", "resolve_type": "user", "usage": "all" } ], - "PSEN_PORT": [ { "value": "psen", "resolve_type": "user", "usage": "all" } ], - "PSINCDEC_PORT": [ { "value": "psincdec", "resolve_type": "user", "usage": "all" } ], - "PSDONE_PORT": [ { "value": "psdone", "resolve_type": "user", "usage": "all" } ], - "CLKOUT1_REQUESTED_OUT_FREQ": [ { "value": "48", "value_src": "user", "resolve_type": "user", "format": "float", "usage": "all" } ], - "CLKOUT1_REQUESTED_PHASE": [ { "value": "0.000", "resolve_type": "user", "format": "float", "usage": "all" } ], - "CLKOUT1_REQUESTED_DUTY_CYCLE": [ { "value": "50.000", "resolve_type": "user", "format": "float", "usage": "all" } ], - "CLKOUT2_REQUESTED_OUT_FREQ": [ { "value": "96", "value_src": "user", "resolve_type": "user", "format": "float", "usage": "all" } ], - "CLKOUT2_REQUESTED_PHASE": [ { "value": "0.000", "resolve_type": "user", "format": "float", "usage": "all" } ], - "CLKOUT2_REQUESTED_DUTY_CYCLE": [ { "value": "50.000", "resolve_type": "user", "format": "float", "usage": "all" } ], - "CLKOUT3_REQUESTED_OUT_FREQ": [ { "value": "144", "value_src": "user", "resolve_type": "user", "format": "float", "usage": "all" } ], - "CLKOUT3_REQUESTED_PHASE": [ { "value": "0.000", "resolve_type": "user", "format": "float", "usage": "all" } ], - "CLKOUT3_REQUESTED_DUTY_CYCLE": [ { "value": "50.000", "resolve_type": "user", "format": "float", "usage": "all" } ], - "CLKOUT4_REQUESTED_OUT_FREQ": [ { "value": "192", "value_src": "user", "resolve_type": "user", "format": "float", "usage": "all" } ], - "CLKOUT4_REQUESTED_PHASE": [ { "value": "0.000", "resolve_type": "user", "format": "float", "usage": "all" } ], - "CLKOUT4_REQUESTED_DUTY_CYCLE": [ { "value": "50.000", "resolve_type": "user", "format": "float", "usage": "all" } ], - "CLKOUT5_REQUESTED_OUT_FREQ": [ { "value": "100.000", "resolve_type": "user", "format": "float", "usage": "all" } ], - "CLKOUT5_REQUESTED_PHASE": [ { "value": "0.000", "resolve_type": "user", "format": "float", "usage": "all" } ], - "CLKOUT5_REQUESTED_DUTY_CYCLE": [ { "value": "50.000", "resolve_type": "user", "format": "float", "usage": "all" } ], - "CLKOUT6_REQUESTED_OUT_FREQ": [ { "value": "100.000", "resolve_type": "user", "format": "float", "usage": "all" } ], - "CLKOUT6_REQUESTED_PHASE": [ { "value": "0.000", "resolve_type": "user", "format": "float", "usage": "all" } ], - "CLKOUT6_REQUESTED_DUTY_CYCLE": [ { "value": "50.000", "resolve_type": "user", "format": "float", "usage": "all" } ], - "CLKOUT7_REQUESTED_OUT_FREQ": [ { "value": "100.000", "resolve_type": "user", "format": "float", "usage": "all" } ], - "CLKOUT7_REQUESTED_PHASE": [ { "value": "0.000", "resolve_type": "user", "format": "float", "usage": "all" } ], - "CLKOUT7_REQUESTED_DUTY_CYCLE": [ { "value": "50.000", "resolve_type": "user", "format": "float", "usage": "all" } ], - "USE_MAX_I_JITTER": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "USE_MIN_O_JITTER": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "CLKOUT1_MATCHED_ROUTING": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "CLKOUT2_MATCHED_ROUTING": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "CLKOUT3_MATCHED_ROUTING": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "CLKOUT4_MATCHED_ROUTING": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "CLKOUT5_MATCHED_ROUTING": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "CLKOUT6_MATCHED_ROUTING": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "CLKOUT7_MATCHED_ROUTING": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "PRIM_SOURCE": [ { "value": "Single_ended_clock_capable_pin", "resolve_type": "user", "usage": "all" } ], - "CLKOUT1_DRIVES": [ { "value": "BUFG", "resolve_type": "user", "usage": "all" } ], - "CLKOUT2_DRIVES": [ { "value": "BUFG", "resolve_type": "user", "usage": "all" } ], - "CLKOUT3_DRIVES": [ { "value": "BUFG", "resolve_type": "user", "usage": "all" } ], - "CLKOUT4_DRIVES": [ { "value": "BUFG", "resolve_type": "user", "usage": "all" } ], - "CLKOUT5_DRIVES": [ { "value": "BUFG", "resolve_type": "user", "usage": "all" } ], - "CLKOUT6_DRIVES": [ { "value": "BUFG", "resolve_type": "user", "usage": "all" } ], - "CLKOUT7_DRIVES": [ { "value": "BUFG", "resolve_type": "user", "usage": "all" } ], - "FEEDBACK_SOURCE": [ { "value": "FDBK_AUTO", "resolve_type": "user", "usage": "all" } ], - "CLKFB_IN_SIGNALING": [ { "value": "SINGLE", "resolve_type": "user", "usage": "all" } ], - "CLKFB_IN_PORT": [ { "value": "clkfb_in", "resolve_type": "user", "usage": "all" } ], - "CLKFB_IN_P_PORT": [ { "value": "clkfb_in_p", "resolve_type": "user", "usage": "all" } ], - "CLKFB_IN_N_PORT": [ { "value": "clkfb_in_n", "resolve_type": "user", "usage": "all" } ], - "CLKFB_OUT_PORT": [ { "value": "clkfb_out", "resolve_type": "user", "usage": "all" } ], - "CLKFB_OUT_P_PORT": [ { "value": "clkfb_out_p", "resolve_type": "user", "usage": "all" } ], - "CLKFB_OUT_N_PORT": [ { "value": "clkfb_out_n", "resolve_type": "user", "usage": "all" } ], - "PLATFORM": [ { "value": "UNKNOWN", "resolve_type": "user", "usage": "all" } ], - "SUMMARY_STRINGS": [ { "value": "empty", "resolve_type": "user", "usage": "all" } ], - "USE_LOCKED": [ { "value": "true", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "CALC_DONE": [ { "value": "empty", "resolve_type": "user", "usage": "all" } ], - "USE_RESET": [ { "value": "false", "value_src": "user", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "USE_POWER_DOWN": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "USE_STATUS": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "USE_FREEZE": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "USE_CLK_VALID": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "USE_INCLK_STOPPED": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "USE_CLKFB_STOPPED": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "RESET_PORT": [ { "value": "reset", "resolve_type": "user", "usage": "all" } ], - "LOCKED_PORT": [ { "value": "locked", "resolve_type": "user", "usage": "all" } ], - "POWER_DOWN_PORT": [ { "value": "power_down", "resolve_type": "user", "usage": "all" } ], - "CLK_VALID_PORT": [ { "value": "CLK_VALID", "resolve_type": "user", "usage": "all" } ], - "STATUS_PORT": [ { "value": "STATUS", "resolve_type": "user", "usage": "all" } ], - "CLK_IN_SEL_PORT": [ { "value": "clk_in_sel", "resolve_type": "user", "usage": "all" } ], - "INPUT_CLK_STOPPED_PORT": [ { "value": "input_clk_stopped", "resolve_type": "user", "usage": "all" } ], - "CLKFB_STOPPED_PORT": [ { "value": "clkfb_stopped", "resolve_type": "user", "usage": "all" } ], - "SS_MODE": [ { "value": "CENTER_HIGH", "resolve_type": "user", "usage": "all" } ], - "SS_MOD_FREQ": [ { "value": "250", "resolve_type": "user", "format": "float", "usage": "all" } ], - "SS_MOD_TIME": [ { "value": "0.004", "resolve_type": "user", "format": "float", "usage": "all" } ], - "OVERRIDE_MMCM": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "MMCM_NOTES": [ { "value": "None", "resolve_type": "user", "usage": "all" } ], - "MMCM_DIVCLK_DIVIDE": [ { "value": "1", "value_src": "user", "resolve_type": "user", "format": "long", "usage": "all" } ], - "MMCM_BANDWIDTH": [ { "value": "OPTIMIZED", "resolve_type": "user", "usage": "all" } ], - "MMCM_CLKFBOUT_MULT_F": [ { "value": "12.000", "value_src": "user", "resolve_type": "user", "format": "float", "usage": "all" } ], - "MMCM_CLKFBOUT_PHASE": [ { "value": "0.000", "resolve_type": "user", "format": "float", "usage": "all" } ], - "MMCM_CLKFBOUT_USE_FINE_PS": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "MMCM_CLKIN1_PERIOD": [ { "value": "10.417", "value_src": "user", "resolve_type": "user", "format": "float", "usage": "all" } ], - "MMCM_CLKIN2_PERIOD": [ { "value": "10.000", "value_src": "user", "resolve_type": "user", "format": "float", "usage": "all" } ], - "MMCM_CLKOUT4_CASCADE": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "MMCM_CLOCK_HOLD": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "MMCM_COMPENSATION": [ { "value": "ZHOLD", "resolve_type": "user", "usage": "all" } ], - "MMCM_REF_JITTER1": [ { "value": "0.010", "resolve_type": "user", "format": "float", "usage": "all" } ], - "MMCM_REF_JITTER2": [ { "value": "0.010", "resolve_type": "user", "format": "float", "usage": "all" } ], - "MMCM_STARTUP_WAIT": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "MMCM_CLKOUT0_DIVIDE_F": [ { "value": "24.000", "value_src": "user", "resolve_type": "user", "format": "float", "usage": "all" } ], - "MMCM_CLKOUT0_DUTY_CYCLE": [ { "value": "0.500", "resolve_type": "user", "format": "float", "usage": "all" } ], - "MMCM_CLKOUT0_PHASE": [ { "value": "0.000", "resolve_type": "user", "format": "float", "usage": "all" } ], - "MMCM_CLKOUT0_USE_FINE_PS": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "MMCM_CLKOUT1_DIVIDE": [ { "value": "12", "value_src": "user", "resolve_type": "user", "format": "long", "usage": "all" } ], - "MMCM_CLKOUT1_DUTY_CYCLE": [ { "value": "0.500", "resolve_type": "user", "format": "float", "usage": "all" } ], - "MMCM_CLKOUT1_PHASE": [ { "value": "0.000", "resolve_type": "user", "format": "float", "usage": "all" } ], - "MMCM_CLKOUT1_USE_FINE_PS": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "MMCM_CLKOUT2_DIVIDE": [ { "value": "8", "value_src": "user", "resolve_type": "user", "format": "long", "usage": "all" } ], - "MMCM_CLKOUT2_DUTY_CYCLE": [ { "value": "0.500", "resolve_type": "user", "format": "float", "usage": "all" } ], - "MMCM_CLKOUT2_PHASE": [ { "value": "0.000", "resolve_type": "user", "format": "float", "usage": "all" } ], - "MMCM_CLKOUT2_USE_FINE_PS": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "MMCM_CLKOUT3_DIVIDE": [ { "value": "6", "value_src": "user", "resolve_type": "user", "format": "long", "usage": "all" } ], - "MMCM_CLKOUT3_DUTY_CYCLE": [ { "value": "0.500", "resolve_type": "user", "format": "float", "usage": "all" } ], - "MMCM_CLKOUT3_PHASE": [ { "value": "0.000", "resolve_type": "user", "format": "float", "usage": "all" } ], - "MMCM_CLKOUT3_USE_FINE_PS": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "MMCM_CLKOUT4_DIVIDE": [ { "value": "1", "resolve_type": "user", "format": "long", "usage": "all" } ], - "MMCM_CLKOUT4_DUTY_CYCLE": [ { "value": "0.500", "resolve_type": "user", "format": "float", "usage": "all" } ], - "MMCM_CLKOUT4_PHASE": [ { "value": "0.000", "resolve_type": "user", "format": "float", "usage": "all" } ], - "MMCM_CLKOUT4_USE_FINE_PS": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "MMCM_CLKOUT5_DIVIDE": [ { "value": "1", "resolve_type": "user", "format": "long", "usage": "all" } ], - "MMCM_CLKOUT5_DUTY_CYCLE": [ { "value": "0.500", "resolve_type": "user", "format": "float", "usage": "all" } ], - "MMCM_CLKOUT5_PHASE": [ { "value": "0.000", "resolve_type": "user", "format": "float", "usage": "all" } ], - "MMCM_CLKOUT5_USE_FINE_PS": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "MMCM_CLKOUT6_DIVIDE": [ { "value": "1", "resolve_type": "user", "format": "long", "usage": "all" } ], - "MMCM_CLKOUT6_DUTY_CYCLE": [ { "value": "0.500", "resolve_type": "user", "format": "float", "usage": "all" } ], - "MMCM_CLKOUT6_PHASE": [ { "value": "0.000", "resolve_type": "user", "format": "float", "usage": "all" } ], - "MMCM_CLKOUT6_USE_FINE_PS": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "OVERRIDE_PLL": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "PLL_NOTES": [ { "value": "None", "resolve_type": "user", "usage": "all" } ], - "PLL_BANDWIDTH": [ { "value": "OPTIMIZED", "resolve_type": "user", "usage": "all" } ], - "PLL_CLKFBOUT_MULT": [ { "value": "4", "resolve_type": "user", "format": "long", "usage": "all" } ], - "PLL_CLKFBOUT_PHASE": [ { "value": "0.000", "resolve_type": "user", "format": "float", "usage": "all" } ], - "PLL_CLK_FEEDBACK": [ { "value": "CLKFBOUT", "resolve_type": "user", "usage": "all" } ], - "PLL_DIVCLK_DIVIDE": [ { "value": "1", "resolve_type": "user", "format": "long", "usage": "all" } ], - "PLL_CLKIN_PERIOD": [ { "value": "10.000", "resolve_type": "user", "format": "float", "usage": "all" } ], - "PLL_COMPENSATION": [ { "value": "SYSTEM_SYNCHRONOUS", "resolve_type": "user", "usage": "all" } ], - "PLL_REF_JITTER": [ { "value": "0.010", "resolve_type": "user", "format": "float", "usage": "all" } ], - "PLL_CLKOUT0_DIVIDE": [ { "value": "1", "resolve_type": "user", "format": "long", "usage": "all" } ], - "PLL_CLKOUT0_DUTY_CYCLE": [ { "value": "0.500", "resolve_type": "user", "format": "float", "usage": "all" } ], - "PLL_CLKOUT0_PHASE": [ { "value": "0.000", "resolve_type": "user", "format": "float", "usage": "all" } ], - "PLL_CLKOUT1_DIVIDE": [ { "value": "1", "resolve_type": "user", "format": "long", "usage": "all" } ], - "PLL_CLKOUT1_DUTY_CYCLE": [ { "value": "0.500", "resolve_type": "user", "format": "float", "usage": "all" } ], - "PLL_CLKOUT1_PHASE": [ { "value": "0.000", "resolve_type": "user", "format": "float", "usage": "all" } ], - "PLL_CLKOUT2_DIVIDE": [ { "value": "1", "resolve_type": "user", "format": "long", "usage": "all" } ], - "PLL_CLKOUT2_DUTY_CYCLE": [ { "value": "0.500", "resolve_type": "user", "format": "float", "usage": "all" } ], - "PLL_CLKOUT2_PHASE": [ { "value": "0.000", "resolve_type": "user", "format": "float", "usage": "all" } ], - "PLL_CLKOUT3_DIVIDE": [ { "value": "1", "resolve_type": "user", "format": "long", "usage": "all" } ], - "PLL_CLKOUT3_DUTY_CYCLE": [ { "value": "0.500", "resolve_type": "user", "format": "float", "usage": "all" } ], - "PLL_CLKOUT3_PHASE": [ { "value": "0.000", "resolve_type": "user", "format": "float", "usage": "all" } ], - "PLL_CLKOUT4_DIVIDE": [ { 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"all" } ], - "CLKOUT3_REQUESTED_PHASE": [ { "value": "0.000", "resolve_type": "user", "format": "float", "usage": "all" } ], - "CLKOUT3_REQUESTED_DUTY_CYCLE": [ { "value": "50.000", "resolve_type": "user", "format": "float", "usage": "all" } ], - "CLKOUT4_REQUESTED_OUT_FREQ": [ { "value": "100.000", "resolve_type": "user", "format": "float", "usage": "all" } ], - "CLKOUT4_REQUESTED_PHASE": [ { "value": "0.000", "resolve_type": "user", "format": "float", "usage": "all" } ], - "CLKOUT4_REQUESTED_DUTY_CYCLE": [ { "value": "50.000", "resolve_type": "user", "format": "float", "usage": "all" } ], - "CLKOUT5_REQUESTED_OUT_FREQ": [ { "value": "100.000", "resolve_type": "user", "format": "float", "usage": "all" } ], - "CLKOUT5_REQUESTED_PHASE": [ { "value": "0.000", "resolve_type": "user", "format": "float", "usage": "all" } ], - "CLKOUT5_REQUESTED_DUTY_CYCLE": [ { "value": "50.000", "resolve_type": "user", "format": "float", "usage": "all" } ], - "CLKOUT6_REQUESTED_OUT_FREQ": [ { "value": "100.000", "resolve_type": "user", "format": "float", "usage": "all" } ], - "CLKOUT6_REQUESTED_PHASE": [ { "value": "0.000", "resolve_type": "user", "format": "float", "usage": "all" } ], - "CLKOUT6_REQUESTED_DUTY_CYCLE": [ { "value": "50.000", "resolve_type": "user", "format": "float", "usage": "all" } ], - "CLKOUT7_REQUESTED_OUT_FREQ": [ { "value": "100.000", "resolve_type": "user", "format": "float", "usage": "all" } ], - "CLKOUT7_REQUESTED_PHASE": [ { "value": "0.000", "resolve_type": "user", "format": "float", "usage": "all" } ], - "CLKOUT7_REQUESTED_DUTY_CYCLE": [ { "value": "50.000", "resolve_type": "user", "format": "float", "usage": "all" } ], - "USE_MAX_I_JITTER": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "USE_MIN_O_JITTER": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "CLKOUT1_MATCHED_ROUTING": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "CLKOUT2_MATCHED_ROUTING": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "CLKOUT3_MATCHED_ROUTING": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "CLKOUT4_MATCHED_ROUTING": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "CLKOUT5_MATCHED_ROUTING": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "CLKOUT6_MATCHED_ROUTING": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "CLKOUT7_MATCHED_ROUTING": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "PRIM_SOURCE": [ { "value": "Differential_clock_capable_pin", "value_src": "user", "resolve_type": "user", "usage": "all" } ], - "CLKOUT1_DRIVES": [ { "value": "BUFG", "resolve_type": "user", "usage": "all" } ], - "CLKOUT2_DRIVES": [ { "value": "BUFG", "resolve_type": "user", "usage": "all" } ], - "CLKOUT3_DRIVES": [ { "value": "BUFG", "resolve_type": "user", "usage": "all" } ], - "CLKOUT4_DRIVES": [ { "value": "BUFG", "resolve_type": "user", "usage": "all" } ], - "CLKOUT5_DRIVES": [ { "value": "BUFG", "resolve_type": "user", "usage": "all" } ], - "CLKOUT6_DRIVES": [ { "value": "BUFG", "resolve_type": "user", "usage": "all" } ], - "CLKOUT7_DRIVES": [ { "value": "BUFG", "resolve_type": "user", "usage": "all" } ], - "FEEDBACK_SOURCE": [ { "value": "FDBK_AUTO", "resolve_type": "user", "usage": "all" } ], - "CLKFB_IN_SIGNALING": [ { "value": "SINGLE", "resolve_type": "user", "usage": "all" } ], - "CLKFB_IN_PORT": [ { "value": "clkfb_in", "resolve_type": "user", "usage": "all" } ], - "CLKFB_IN_P_PORT": [ { "value": "clkfb_in_p", "resolve_type": "user", "usage": "all" } ], - "CLKFB_IN_N_PORT": [ { "value": "clkfb_in_n", "resolve_type": "user", "usage": "all" } ], - "CLKFB_OUT_PORT": [ { "value": "clkfb_out", "resolve_type": "user", "usage": "all" } ], - "CLKFB_OUT_P_PORT": [ { "value": "clkfb_out_p", "resolve_type": "user", "usage": "all" } ], - "CLKFB_OUT_N_PORT": [ { "value": "clkfb_out_n", "resolve_type": "user", "usage": "all" } ], - "PLATFORM": [ { "value": "UNKNOWN", "resolve_type": "user", "usage": "all" } ], - "SUMMARY_STRINGS": [ { "value": "empty", "resolve_type": "user", "usage": "all" } ], - "USE_LOCKED": [ { "value": "true", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "CALC_DONE": [ { "value": "empty", "resolve_type": "user", "usage": "all" } ], - "USE_RESET": [ { "value": "false", "value_src": "user", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "USE_POWER_DOWN": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "USE_STATUS": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "USE_FREEZE": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "USE_CLK_VALID": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "USE_INCLK_STOPPED": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "USE_CLKFB_STOPPED": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "RESET_PORT": [ { "value": "reset", "resolve_type": "user", "usage": "all" } ], - "LOCKED_PORT": [ { "value": "locked", "resolve_type": "user", "usage": "all" } ], - "POWER_DOWN_PORT": [ { "value": "power_down", "resolve_type": "user", "usage": "all" } ], - "CLK_VALID_PORT": [ { "value": "CLK_VALID", "resolve_type": "user", "usage": "all" } ], - "STATUS_PORT": [ { "value": "STATUS", "resolve_type": "user", "usage": "all" } ], - "CLK_IN_SEL_PORT": [ { "value": "clk_in_sel", "resolve_type": "user", "usage": "all" } ], - "INPUT_CLK_STOPPED_PORT": [ { "value": "input_clk_stopped", "resolve_type": "user", "usage": "all" } ], - "CLKFB_STOPPED_PORT": [ { "value": "clkfb_stopped", "resolve_type": "user", "usage": "all" } ], - "SS_MODE": [ { "value": "CENTER_HIGH", "resolve_type": "user", "usage": "all" } ], - "SS_MOD_FREQ": [ { "value": "250", "resolve_type": "user", "format": "float", "usage": "all" } ], - "SS_MOD_TIME": [ { "value": "0.004", "resolve_type": "user", "format": "float", "usage": "all" } ], - "OVERRIDE_MMCM": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "MMCM_NOTES": [ { "value": "None", "resolve_type": "user", "usage": "all" } ], - "MMCM_DIVCLK_DIVIDE": [ { "value": "5", "value_src": "user", "resolve_type": "user", "format": "long", "usage": "all" } ], - "MMCM_BANDWIDTH": [ { "value": "OPTIMIZED", "resolve_type": "user", "usage": "all" } ], - "MMCM_CLKFBOUT_MULT_F": [ { "value": "18.000", "value_src": "user", "resolve_type": "user", "format": "float", "usage": "all" } ], - "MMCM_CLKFBOUT_PHASE": [ { "value": "0.000", "resolve_type": "user", "format": "float", "usage": "all" } ], - "MMCM_CLKFBOUT_USE_FINE_PS": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "MMCM_CLKIN1_PERIOD": [ { "value": "4.000", "value_src": "user", "resolve_type": "user", "format": "float", "usage": "all" } ], - "MMCM_CLKIN2_PERIOD": [ { "value": "10.0", "value_src": "user", "resolve_type": "user", "format": "float", "usage": "all" } ], - "MMCM_CLKOUT4_CASCADE": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "MMCM_CLOCK_HOLD": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "MMCM_COMPENSATION": [ { "value": "ZHOLD", "resolve_type": "user", "usage": "all" } ], - "MMCM_REF_JITTER1": [ { "value": "0.010", "resolve_type": "user", "format": "float", "usage": "all" } ], - "MMCM_REF_JITTER2": [ { "value": "0.010", "resolve_type": "user", "format": "float", "usage": "all" } ], - "MMCM_STARTUP_WAIT": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "MMCM_CLKOUT0_DIVIDE_F": [ { "value": "9.375", "value_src": "user", "resolve_type": "user", "format": "float", "usage": "all" } ], - "MMCM_CLKOUT0_DUTY_CYCLE": [ { "value": "0.500", "resolve_type": "user", "format": "float", "usage": "all" } ], - "MMCM_CLKOUT0_PHASE": [ { "value": "0.000", "resolve_type": "user", "format": "float", "usage": "all" } ], - "MMCM_CLKOUT0_USE_FINE_PS": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "MMCM_CLKOUT1_DIVIDE": [ { "value": "1", "resolve_type": "user", "format": "long", "usage": "all" } ], - "MMCM_CLKOUT1_DUTY_CYCLE": [ { "value": "0.500", "resolve_type": "user", "format": "float", "usage": "all" } ], - "MMCM_CLKOUT1_PHASE": [ { "value": "0.000", "resolve_type": "user", "format": "float", "usage": "all" } ], - "MMCM_CLKOUT1_USE_FINE_PS": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "MMCM_CLKOUT2_DIVIDE": [ { "value": "1", "resolve_type": "user", "format": "long", "usage": "all" } ], - "MMCM_CLKOUT2_DUTY_CYCLE": [ { "value": "0.500", "resolve_type": "user", "format": "float", "usage": "all" } ], - "MMCM_CLKOUT2_PHASE": [ { "value": "0.000", "resolve_type": "user", "format": "float", "usage": "all" } ], - "MMCM_CLKOUT2_USE_FINE_PS": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "MMCM_CLKOUT3_DIVIDE": [ { "value": "1", "resolve_type": "user", "format": "long", "usage": "all" } ], - "MMCM_CLKOUT3_DUTY_CYCLE": [ { "value": "0.500", "resolve_type": "user", "format": "float", "usage": "all" } ], - "MMCM_CLKOUT3_PHASE": [ { "value": "0.000", "resolve_type": "user", "format": "float", "usage": "all" } ], - "MMCM_CLKOUT3_USE_FINE_PS": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "MMCM_CLKOUT4_DIVIDE": [ { "value": "1", "resolve_type": "user", "format": "long", "usage": "all" } ], - "MMCM_CLKOUT4_DUTY_CYCLE": [ { "value": "0.500", "resolve_type": "user", "format": "float", "usage": "all" } ], - "MMCM_CLKOUT4_PHASE": [ { "value": "0.000", "resolve_type": "user", "format": "float", "usage": "all" } ], - "MMCM_CLKOUT4_USE_FINE_PS": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "MMCM_CLKOUT5_DIVIDE": [ { "value": "1", "resolve_type": "user", "format": "long", "usage": "all" } ], - "MMCM_CLKOUT5_DUTY_CYCLE": [ { "value": "0.500", "resolve_type": "user", "format": "float", "usage": "all" } ], - "MMCM_CLKOUT5_PHASE": [ { "value": "0.000", "resolve_type": "user", "format": "float", "usage": "all" } ], - "MMCM_CLKOUT5_USE_FINE_PS": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "MMCM_CLKOUT6_DIVIDE": [ { "value": "1", "resolve_type": "user", "format": "long", "usage": "all" } ], - "MMCM_CLKOUT6_DUTY_CYCLE": [ { "value": "0.500", "resolve_type": "user", "format": "float", "usage": "all" } ], - "MMCM_CLKOUT6_PHASE": [ { "value": "0.000", "resolve_type": "user", "format": "float", "usage": "all" } ], - "MMCM_CLKOUT6_USE_FINE_PS": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "OVERRIDE_PLL": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "PLL_NOTES": [ { "value": "None", "resolve_type": "user", "usage": "all" } ], - "PLL_BANDWIDTH": [ { "value": "OPTIMIZED", "resolve_type": "user", "usage": "all" } ], - "PLL_CLKFBOUT_MULT": [ { "value": "4", "resolve_type": "user", "format": "long", "usage": "all" } ], - "PLL_CLKFBOUT_PHASE": [ { "value": "0.000", "resolve_type": "user", "format": "float", "usage": "all" } ], - "PLL_CLK_FEEDBACK": [ { "value": "CLKFBOUT", "resolve_type": "user", "usage": "all" } ], - "PLL_DIVCLK_DIVIDE": [ { "value": "1", "resolve_type": "user", "format": "long", "usage": "all" } ], - "PLL_CLKIN_PERIOD": [ { "value": "10.000", "resolve_type": "user", "format": "float", "usage": "all" } ], - "PLL_COMPENSATION": [ { "value": "SYSTEM_SYNCHRONOUS", "resolve_type": "user", "usage": "all" } ], - "PLL_REF_JITTER": [ { "value": "0.010", "resolve_type": "user", "format": "float", "usage": "all" } ], - "PLL_CLKOUT0_DIVIDE": [ { "value": "1", "resolve_type": "user", "format": "long", "usage": "all" } ], - "PLL_CLKOUT0_DUTY_CYCLE": [ { "value": "0.500", "resolve_type": "user", "format": "float", "usage": "all" } ], - "PLL_CLKOUT0_PHASE": [ { "value": "0.000", "resolve_type": "user", "format": "float", "usage": "all" } ], - "PLL_CLKOUT1_DIVIDE": [ { "value": "1", "resolve_type": "user", "format": "long", "usage": "all" } ], - "PLL_CLKOUT1_DUTY_CYCLE": [ { "value": "0.500", "resolve_type": "user", "format": "float", "usage": "all" } ], - "PLL_CLKOUT1_PHASE": [ { "value": "0.000", "resolve_type": "user", "format": "float", "usage": "all" } ], - "PLL_CLKOUT2_DIVIDE": [ { "value": "1", "resolve_type": "user", "format": "long", "usage": "all" } ], - "PLL_CLKOUT2_DUTY_CYCLE": [ { "value": "0.500", "resolve_type": "user", "format": "float", "usage": "all" } ], - "PLL_CLKOUT2_PHASE": [ { "value": "0.000", "resolve_type": "user", "format": "float", "usage": "all" } ], - "PLL_CLKOUT3_DIVIDE": [ { "value": "1", "resolve_type": "user", "format": "long", "usage": "all" } ], - "PLL_CLKOUT3_DUTY_CYCLE": [ { "value": "0.500", "resolve_type": "user", "format": "float", "usage": "all" } ], - "PLL_CLKOUT3_PHASE": [ { "value": "0.000", "resolve_type": "user", "format": "float", "usage": "all" } ], - "PLL_CLKOUT4_DIVIDE": [ { "value": "1", "resolve_type": "user", "format": "long", "usage": "all" } ], - "PLL_CLKOUT4_DUTY_CYCLE": [ { "value": "0.500", "resolve_type": "user", "format": "float", "usage": "all" } ], - "PLL_CLKOUT4_PHASE": [ { "value": "0.000", "resolve_type": "user", "format": "float", "usage": "all" } ], - "PLL_CLKOUT5_DIVIDE": [ { "value": "1", "resolve_type": "user", "format": "long", "usage": "all" } ], - "PLL_CLKOUT5_DUTY_CYCLE": [ { "value": "0.500", "resolve_type": "user", "format": "float", "usage": "all" } ], - "PLL_CLKOUT5_PHASE": [ { "value": "0.000", "resolve_type": "user", "format": "float", "usage": "all" } ], - "RESET_TYPE": [ { "value": "ACTIVE_HIGH", "resolve_type": "user", "usage": "all" } ], - "USE_SAFE_CLOCK_STARTUP": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "USE_CLOCK_SEQUENCING": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "CLKOUT1_SEQUENCE_NUMBER": [ { "value": "1", "resolve_type": "user", "format": "long", "usage": "all" } ], - "CLKOUT2_SEQUENCE_NUMBER": [ { "value": "1", "resolve_type": "user", "format": "long", "usage": "all" } ], - "CLKOUT3_SEQUENCE_NUMBER": [ { "value": "1", "resolve_type": "user", "format": "long", "usage": "all" } ], - "CLKOUT4_SEQUENCE_NUMBER": [ { "value": "1", "resolve_type": "user", "format": "long", "usage": "all" } ], - "CLKOUT5_SEQUENCE_NUMBER": [ { "value": "1", "resolve_type": "user", "format": "long", "usage": "all" } ], - "CLKOUT6_SEQUENCE_NUMBER": [ { "value": "1", "resolve_type": "user", "format": "long", "usage": "all" } ], - "CLKOUT7_SEQUENCE_NUMBER": [ { "value": "1", "resolve_type": "user", "format": "long", "usage": "all" } ], - "USE_BOARD_FLOW": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "CLK_IN1_BOARD_INTERFACE": [ { "value": "Custom", "resolve_type": "user", "usage": "all" } ], - "CLK_IN2_BOARD_INTERFACE": [ { "value": "Custom", "resolve_type": "user", "usage": "all" } ], - "DIFF_CLK_IN1_BOARD_INTERFACE": [ { "value": "Custom", "resolve_type": "user", "usage": "all" } ], - "DIFF_CLK_IN2_BOARD_INTERFACE": [ { "value": "Custom", "resolve_type": "user", "usage": "all" } ], - "AUTO_PRIMITIVE": [ { "value": "MMCM", "resolve_type": "user", "usage": "all" } ], - "RESET_BOARD_INTERFACE": [ { "value": "Custom", "resolve_type": "user", "usage": "all" } ], - "ENABLE_CDDC": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "CDDCDONE_PORT": [ { "value": "cddcdone", "resolve_type": "user", "usage": "all" } ], - "CDDCREQ_PORT": [ { "value": "cddcreq", "resolve_type": "user", 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"port_maps": { - "CLK_OUT1": [ { "physical_name": "clk_out1" } ] - } - } - } - } - } -} \ No newline at end of file diff --git a/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/sources_1/ip/ant_clk_gen_stg2/ant_clk_gen_stg2.xci b/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/sources_1/ip/ant_clk_gen_stg2/ant_clk_gen_stg2.xci deleted file mode 100644 index 7fa31c1..0000000 --- a/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/sources_1/ip/ant_clk_gen_stg2/ant_clk_gen_stg2.xci +++ /dev/null @@ -1,713 +0,0 @@ -{ - "schema": "xilinx.com:schema:json_instance:1.0", - "ip_inst": { - "xci_name": "ant_clk_gen_stg2", - "component_reference": "xilinx.com:ip:clk_wiz:6.0", - "ip_revision": "13", - "gen_directory": "../../../../duifei_cal_coarse.gen/sources_1/ip/ant_clk_gen_stg2", - "parameters": { - "component_parameters": { - "Component_Name": [ { "value": "ant_clk_gen_stg2", "resolve_type": "user", "usage": "all" } ], - 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"value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "Enable_PLL0": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "Enable_PLL1": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "REF_CLK_FREQ": [ { "value": "100.0", "resolve_type": "user", "format": "float", "usage": "all" } ], - "PRECISION": [ { "value": "1", "resolve_type": "user", "format": "float", "usage": "all" } ], - "PRIMITIVE": [ { "value": "MMCM", "resolve_type": "user", "usage": "all" } ], - "PRIMTYPE_SEL": [ { "value": "mmcm_adv", "resolve_type": "user", "usage": "all" } ], - "CLOCK_MGR_TYPE": [ { "value": "auto", "resolve_type": "user", "usage": "all" } ], - "USE_FREQ_SYNTH": [ { "value": "true", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "USE_SPREAD_SPECTRUM": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "USE_PHASE_ALIGNMENT": [ { "value": "true", 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"user", "resolve_type": "user", "format": "long", "usage": "all" } ], - "MMCM_BANDWIDTH": [ { "value": "OPTIMIZED", "resolve_type": "user", "usage": "all" } ], - "MMCM_CLKFBOUT_MULT_F": [ { "value": "10.000", "value_src": "user", "resolve_type": "user", "format": "float", "usage": "all" } ], - "MMCM_CLKFBOUT_PHASE": [ { "value": "0.000", "resolve_type": "user", "format": "float", "usage": "all" } ], - "MMCM_CLKFBOUT_USE_FINE_PS": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "MMCM_CLKIN1_PERIOD": [ { "value": "10.417", "value_src": "user", "resolve_type": "user", "format": "float", "usage": "all" } ], - "MMCM_CLKIN2_PERIOD": [ { "value": "10.000", "value_src": "user", "resolve_type": "user", "format": "float", "usage": "all" } ], - "MMCM_CLKOUT4_CASCADE": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "MMCM_CLOCK_HOLD": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - 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} ], - "MMCM_CLKOUT1_DUTY_CYCLE": [ { "value": "0.500", "resolve_type": "user", "format": "float", "usage": "all" } ], - "MMCM_CLKOUT1_PHASE": [ { "value": "0.000", "resolve_type": "user", "format": "float", "usage": "all" } ], - "MMCM_CLKOUT1_USE_FINE_PS": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "MMCM_CLKOUT2_DIVIDE": [ { "value": "30", "value_src": "user", "resolve_type": "user", "format": "long", "usage": "all" } ], - "MMCM_CLKOUT2_DUTY_CYCLE": [ { "value": "0.500", "resolve_type": "user", "format": "float", "usage": "all" } ], - "MMCM_CLKOUT2_PHASE": [ { "value": "0.000", "resolve_type": "user", "format": "float", "usage": "all" } ], - "MMCM_CLKOUT2_USE_FINE_PS": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "MMCM_CLKOUT3_DIVIDE": [ { "value": "50", "value_src": "user", "resolve_type": "user", "format": "long", "usage": "all" } ], - "MMCM_CLKOUT3_DUTY_CYCLE": [ { "value": "0.500", "resolve_type": "user", "format": "float", "usage": "all" } ], - "MMCM_CLKOUT3_PHASE": [ { "value": "0.000", "resolve_type": "user", "format": "float", "usage": "all" } ], - "MMCM_CLKOUT3_USE_FINE_PS": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "MMCM_CLKOUT4_DIVIDE": [ { "value": "1", "resolve_type": "user", "format": "long", "usage": "all" } ], - "MMCM_CLKOUT4_DUTY_CYCLE": [ { "value": "0.500", "resolve_type": "user", "format": "float", "usage": "all" } ], - "MMCM_CLKOUT4_PHASE": [ { "value": "0.000", "resolve_type": "user", "format": "float", "usage": "all" } ], - "MMCM_CLKOUT4_USE_FINE_PS": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "MMCM_CLKOUT5_DIVIDE": [ { "value": "1", "resolve_type": "user", "format": "long", "usage": "all" } ], - "MMCM_CLKOUT5_DUTY_CYCLE": [ { "value": "0.500", "resolve_type": "user", "format": "float", "usage": "all" } ], - "MMCM_CLKOUT5_PHASE": [ { "value": "0.000", "resolve_type": "user", "format": "float", "usage": "all" } ], - "MMCM_CLKOUT5_USE_FINE_PS": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "MMCM_CLKOUT6_DIVIDE": [ { "value": "1", "resolve_type": "user", "format": "long", "usage": "all" } ], - "MMCM_CLKOUT6_DUTY_CYCLE": [ { "value": "0.500", "resolve_type": "user", "format": "float", "usage": "all" } ], - "MMCM_CLKOUT6_PHASE": [ { "value": "0.000", "resolve_type": "user", "format": "float", "usage": "all" } ], - "MMCM_CLKOUT6_USE_FINE_PS": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "OVERRIDE_PLL": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "PLL_NOTES": [ { "value": "None", "resolve_type": "user", "usage": "all" } ], - "PLL_BANDWIDTH": [ { "value": "OPTIMIZED", "resolve_type": "user", "usage": "all" } ], - "PLL_CLKFBOUT_MULT": [ { "value": "4", "resolve_type": "user", "format": "long", "usage": "all" } ], - "PLL_CLKFBOUT_PHASE": [ { "value": "0.000", "resolve_type": "user", "format": "float", "usage": "all" } ], - "PLL_CLK_FEEDBACK": [ { "value": "CLKFBOUT", "resolve_type": "user", "usage": "all" } ], - "PLL_DIVCLK_DIVIDE": [ { "value": "1", "resolve_type": "user", "format": "long", "usage": "all" } ], - "PLL_CLKIN_PERIOD": [ { "value": "10.000", "resolve_type": "user", "format": "float", "usage": "all" } ], - "PLL_COMPENSATION": [ { "value": "SYSTEM_SYNCHRONOUS", "resolve_type": "user", "usage": "all" } ], - "PLL_REF_JITTER": [ { "value": "0.010", "resolve_type": "user", "format": "float", "usage": "all" } ], - "PLL_CLKOUT0_DIVIDE": [ { "value": "1", "resolve_type": "user", "format": "long", "usage": "all" } ], - "PLL_CLKOUT0_DUTY_CYCLE": [ { "value": "0.500", "resolve_type": "user", "format": "float", "usage": "all" } ], - "PLL_CLKOUT0_PHASE": [ { "value": "0.000", "resolve_type": "user", "format": "float", "usage": "all" } ], - "PLL_CLKOUT1_DIVIDE": [ { "value": "1", "resolve_type": "user", "format": "long", "usage": "all" } ], - "PLL_CLKOUT1_DUTY_CYCLE": [ { "value": "0.500", "resolve_type": "user", "format": "float", "usage": "all" } ], - "PLL_CLKOUT1_PHASE": [ { "value": "0.000", "resolve_type": "user", "format": "float", "usage": "all" } ], - "PLL_CLKOUT2_DIVIDE": [ { "value": "1", "resolve_type": "user", "format": "long", "usage": "all" } ], - "PLL_CLKOUT2_DUTY_CYCLE": [ { "value": "0.500", "resolve_type": "user", "format": "float", "usage": "all" } ], - "PLL_CLKOUT2_PHASE": [ { "value": "0.000", "resolve_type": "user", "format": "float", "usage": "all" } ], - "PLL_CLKOUT3_DIVIDE": [ { "value": "1", "resolve_type": "user", "format": "long", "usage": "all" } ], - "PLL_CLKOUT3_DUTY_CYCLE": [ { "value": "0.500", "resolve_type": "user", "format": "float", "usage": "all" } ], - "PLL_CLKOUT3_PHASE": [ { "value": "0.000", "resolve_type": "user", "format": "float", "usage": "all" } ], - "PLL_CLKOUT4_DIVIDE": [ { "value": "1", "resolve_type": "user", "format": "long", "usage": "all" } ], - "PLL_CLKOUT4_DUTY_CYCLE": [ { "value": "0.500", "resolve_type": "user", "format": "float", "usage": "all" } ], - "PLL_CLKOUT4_PHASE": [ { "value": "0.000", "resolve_type": "user", "format": "float", "usage": "all" } ], - "PLL_CLKOUT5_DIVIDE": [ { "value": "1", "resolve_type": "user", "format": "long", "usage": "all" } ], - "PLL_CLKOUT5_DUTY_CYCLE": [ { "value": "0.500", "resolve_type": "user", "format": "float", "usage": "all" } ], - "PLL_CLKOUT5_PHASE": [ { "value": "0.000", "resolve_type": "user", "format": "float", "usage": "all" } ], - "RESET_TYPE": [ { "value": "ACTIVE_HIGH", "resolve_type": "user", "usage": "all" } ], - "USE_SAFE_CLOCK_STARTUP": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "USE_CLOCK_SEQUENCING": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "CLKOUT1_SEQUENCE_NUMBER": [ { "value": "1", "resolve_type": "user", "format": "long", "usage": "all" } ], - "CLKOUT2_SEQUENCE_NUMBER": [ { "value": "1", "resolve_type": "user", "format": "long", "usage": "all" } ], - "CLKOUT3_SEQUENCE_NUMBER": [ { "value": "1", "resolve_type": "user", "format": "long", "usage": "all" } ], - "CLKOUT4_SEQUENCE_NUMBER": [ { "value": "1", "resolve_type": "user", "format": "long", "usage": "all" } ], - "CLKOUT5_SEQUENCE_NUMBER": [ { "value": "1", "resolve_type": "user", "format": "long", "usage": "all" } ], - "CLKOUT6_SEQUENCE_NUMBER": [ { "value": "1", "resolve_type": "user", "format": "long", "usage": "all" } ], - "CLKOUT7_SEQUENCE_NUMBER": [ { "value": "1", "resolve_type": "user", "format": "long", "usage": "all" } ], - "USE_BOARD_FLOW": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "CLK_IN1_BOARD_INTERFACE": [ { "value": "Custom", "resolve_type": "user", "usage": "all" } ], - "CLK_IN2_BOARD_INTERFACE": [ { "value": "Custom", "resolve_type": "user", "usage": "all" } ], - "DIFF_CLK_IN1_BOARD_INTERFACE": [ { "value": "Custom", "resolve_type": "user", "usage": "all" } ], - "DIFF_CLK_IN2_BOARD_INTERFACE": [ { "value": "Custom", "resolve_type": "user", "usage": "all" } ], - "AUTO_PRIMITIVE": [ { "value": "MMCM", "resolve_type": "user", "usage": "all" } ], - "RESET_BOARD_INTERFACE": [ { "value": "Custom", "resolve_type": "user", "usage": "all" } ], - "ENABLE_CDDC": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "CDDCDONE_PORT": [ { "value": "cddcdone", "resolve_type": "user", "usage": "all" } ], - "CDDCREQ_PORT": [ { "value": "cddcreq", "resolve_type": "user", "usage": "all" } ], - "ENABLE_CLKOUTPHY": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "CLKOUTPHY_REQUESTED_FREQ": [ { "value": "600.000", "resolve_type": "user", "format": "float", "usage": "all" } ], - "CLKOUT1_JITTER": [ { "value": "136.435", "value_src": "user", "resolve_type": "user", "format": "float", "usage": "all" } ], - "CLKOUT1_PHASE_ERROR": [ { "value": "101.715", "value_src": "user", "resolve_type": "user", "format": "float", "usage": "all" } ], - "CLKOUT2_JITTER": [ { "value": "158.351", "value_src": "user", "resolve_type": "user", "format": "float", "usage": "all" } ], - "CLKOUT2_PHASE_ERROR": [ { "value": "101.715", "value_src": "user", "resolve_type": "user", "format": "float", "usage": "all" } ], - "CLKOUT3_JITTER": [ { "value": "172.426", "value_src": "user", "resolve_type": "user", "format": "float", "usage": "all" } ], - "CLKOUT3_PHASE_ERROR": [ { "value": "101.715", "value_src": "user", "resolve_type": "user", "format": "float", "usage": "all" } ], - "CLKOUT4_JITTER": [ { "value": "190.665", "value_src": "user", "resolve_type": "user", "format": "float", "usage": "all" } ], - "CLKOUT4_PHASE_ERROR": [ { "value": "101.715", "value_src": "user", "resolve_type": "user", "format": "float", "usage": "all" } ], - "CLKOUT5_JITTER": [ { "value": "0.0", "resolve_type": "user", "format": "float", "usage": "all" } ], - "CLKOUT5_PHASE_ERROR": [ { "value": "0.0", "resolve_type": "user", "format": "float", "usage": "all" } ], - "CLKOUT6_JITTER": [ { "value": "0.0", "resolve_type": "user", "format": "float", "usage": "all" } ], - "CLKOUT6_PHASE_ERROR": [ { "value": "0.0", "resolve_type": "user", "format": "float", "usage": "all" } ], - "CLKOUT7_JITTER": [ { "value": "0.0", "resolve_type": "user", "format": "float", "usage": "all" } ], - "CLKOUT7_PHASE_ERROR": [ { "value": "0.0", "resolve_type": "user", "format": "float", "usage": "all" } ], - "INPUT_MODE": [ { "value": "frequency", "resolve_type": "user", "usage": "all" } ], - "INTERFACE_SELECTION": [ { "value": "Enable_AXI", "resolve_type": "user", "usage": "all" } ], - "AXI_DRP": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], - "PHASE_DUTY_CONFIG": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ] - }, - "model_parameters": { - "C_CLKOUT2_USED": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], - "C_USER_CLK_FREQ0": [ { "value": "100.0", "resolve_type": "generated", "format": "float", "usage": "all" } ], - "C_AUTO_PRIMITIVE": [ { "value": "MMCM", "resolve_type": "generated", "usage": "all" } ], - "C_USER_CLK_FREQ1": [ { "value": "100.0", "resolve_type": "generated", "format": "float", "usage": "all" } ], - "C_USER_CLK_FREQ2": [ { "value": "100.0", "resolve_type": "generated", "format": "float", "usage": "all" } ], - "C_USER_CLK_FREQ3": [ { "value": "100.0", "resolve_type": "generated", "format": "float", "usage": "all" } ], - "C_ENABLE_CLOCK_MONITOR": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], - "C_ENABLE_USER_CLOCK0": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], - "C_ENABLE_USER_CLOCK1": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], - "C_ENABLE_USER_CLOCK2": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], - "C_ENABLE_USER_CLOCK3": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], - "C_Enable_PLL0": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], - "C_Enable_PLL1": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], - "C_REF_CLK_FREQ": [ { "value": "100.0", "resolve_type": "generated", "format": "float", "usage": "all" } ], - "C_PRECISION": [ { "value": "1", "resolve_type": "generated", "format": "float", "usage": "all" } ], - "C_CLKOUT3_USED": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], - "C_CLKOUT4_USED": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], - "C_CLKOUT5_USED": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], - "C_CLKOUT6_USED": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], - "C_CLKOUT7_USED": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], - "C_USE_CLKOUT1_BAR": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], - "C_USE_CLKOUT2_BAR": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], - "C_USE_CLKOUT3_BAR": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], - "C_USE_CLKOUT4_BAR": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], - "c_component_name": [ { "value": "ant_clk_gen_stg2", "resolve_type": "generated", "usage": "all" } ], - "C_PLATFORM": [ { "value": "UNKNOWN", "resolve_type": "generated", "usage": "all" } ], - "C_USE_FREQ_SYNTH": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], - "C_USE_PHASE_ALIGNMENT": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], - "C_PRIM_IN_JITTER": [ { "value": "0.010", "resolve_type": "generated", "format": "float", "usage": "all" } ], - "C_SECONDARY_IN_JITTER": [ { "value": "0.010", "resolve_type": "generated", "format": "float", "usage": "all" } ], - "C_JITTER_SEL": [ { "value": "No_Jitter", "resolve_type": "generated", "usage": "all" } ], - "C_USE_MIN_POWER": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], - "C_USE_MIN_O_JITTER": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], - "C_USE_MAX_I_JITTER": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], - "C_USE_DYN_PHASE_SHIFT": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], - "C_OPTIMIZE_CLOCKING_STRUCTURE_EN": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], - "C_USE_INCLK_SWITCHOVER": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], - "C_USE_DYN_RECONFIG": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], - "C_USE_SPREAD_SPECTRUM": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], - "C_USE_FAST_SIMULATION": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], - "C_PRIMTYPE_SEL": [ { "value": "AUTO", "resolve_type": "generated", "usage": "all" } ], - "C_USE_CLK_VALID": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], - "C_PRIM_IN_FREQ": [ { "value": "96", "resolve_type": "generated", "format": "float", "usage": "all" } ], - "C_PRIM_IN_TIMEPERIOD": [ { "value": "10.000", "resolve_type": "generated", "format": "float", "usage": "all" } ], - "C_IN_FREQ_UNITS": [ { "value": "Units_MHz", "resolve_type": "generated", "usage": "all" } ], - "C_SECONDARY_IN_FREQ": [ { "value": "100.000", "resolve_type": "generated", "format": "float", "usage": "all" } ], - "C_SECONDARY_IN_TIMEPERIOD": [ { "value": "10.000", "resolve_type": "generated", "format": "float", "usage": "all" } ], - "C_FEEDBACK_SOURCE": [ { "value": "FDBK_AUTO", "resolve_type": "generated", "usage": "all" } ], - "C_PRIM_SOURCE": [ { "value": "Global_buffer", "resolve_type": "generated", "usage": "all" } ], - "C_PHASESHIFT_MODE": [ { "value": "WAVEFORM", "resolve_type": "generated", "usage": "all" } ], - "C_SECONDARY_SOURCE": [ { "value": "Single_ended_clock_capable_pin", "resolve_type": "generated", "usage": "all" } ], - "C_CLKFB_IN_SIGNALING": [ { "value": "SINGLE", "resolve_type": "generated", "usage": "all" } ], - "C_USE_RESET": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], - "C_RESET_LOW": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], - "C_USE_LOCKED": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], - "C_USE_INCLK_STOPPED": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], - "C_USE_CLKFB_STOPPED": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], - "C_USE_POWER_DOWN": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], - "C_USE_STATUS": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], - "C_USE_FREEZE": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], - "C_NUM_OUT_CLKS": [ { "value": "4", "resolve_type": "generated", "format": "long", "usage": "all" } ], - "C_CLKOUT1_DRIVES": [ { "value": "BUFG", "resolve_type": "generated", "usage": "all" } ], - "C_CLKOUT2_DRIVES": [ { "value": "BUFG", "resolve_type": "generated", "usage": "all" } ], - "C_CLKOUT3_DRIVES": [ { "value": "BUFG", "resolve_type": "generated", "usage": "all" } ], - "C_CLKOUT4_DRIVES": [ { "value": "BUFG", "resolve_type": "generated", "usage": "all" } ], - "C_CLKOUT5_DRIVES": [ { "value": "BUFG", "resolve_type": "generated", "usage": "all" } ], - "C_CLKOUT6_DRIVES": [ { "value": "BUFG", "resolve_type": "generated", "usage": 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], - "C_PLL_CLKOUT1_PHASE": [ { "value": "0.000", "resolve_type": "generated", "format": "float", "usage": "all" } ], - "C_PLL_CLKOUT2_PHASE": [ { "value": "0.000", "resolve_type": "generated", "format": "float", "usage": "all" } ], - "C_PLL_CLKOUT3_PHASE": [ { "value": "0.000", "resolve_type": "generated", "format": "float", "usage": "all" } ], - "C_PLL_CLKOUT4_PHASE": [ { "value": "0.000", "resolve_type": "generated", "format": "float", "usage": "all" } ], - "C_PLL_CLKOUT5_PHASE": [ { "value": "0.000", "resolve_type": "generated", "format": "float", "usage": "all" } ], - "C_CLOCK_MGR_TYPE": [ { "value": "NA", "resolve_type": "generated", "usage": "all" } ], - "C_OVERRIDE_MMCM": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], - "C_OVERRIDE_PLL": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], - "C_PRIMARY_PORT": [ { "value": "clk_in1", "resolve_type": "generated", "usage": "all" } ], - "C_SECONDARY_PORT": [ { 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a/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/sources_1/new/ant_rf/Sisyif_src/ADF4351_2.v b/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/sources_1/new/ant_rf/Sisyif_src/ADF4351_2.v deleted file mode 100644 index 051c0c2..0000000 --- a/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/sources_1/new/ant_rf/Sisyif_src/ADF4351_2.v +++ /dev/null @@ -1,188 +0,0 @@ -`timescale 1ns / 1ps -////////////////////////////////////////////////////////////////////////////////// -// Company: -// Engineer: -// -// Create Date: 11:51:06 06/08/2020 -// Design Name: -// Module Name: test_784TR_top -// Project Name: -// Target Devices: -// Tool versions: -// Description: -// ??????9?byte? ?1-8?????????????????8???????????????????3?byte???5?don't care?? -// ?9byte??4bit??spi??4bit?????? -// Dependencies: -// -// Revision: -// Revision 0.01 - File Created -// Additional Comments: -// -////////////////////////////////////////////////////////////////////////////////// -/*************?????????*******************/ -module adf4351_2( -input i_sysclk , -input i_arstn , -output o_cfgover , -output o_ADF4351_SCK , -output o_ADF4351_DATA , -output o_ADF4351_LE , -output o_ADF4351_CE , -output o_ADF4351_mutel , -input i_ADF4351_locked - ); - - -localparam DATA_WIDTH = 32; -localparam DATA_LENTH = 6; -localparam SYS_CLOCK = 10; -localparam LOCK_PIRED = SYS_CLOCK * 100000; -localparam rst_time = 16'h7fff;//16'h7fff -reg[7:0] cnt_word = 8'd0; -reg[5:0] cnt_bits = 6'd0; - -reg [DATA_WIDTH-1:0] cfgdata = 0; -wire [DATA_WIDTH-1:0] regdata; -reg cfgover = 1'b0 ; -reg pll_locked = 1'b0 ; -reg load_en = 1'b0 ; -reg [31:0] cnt_lock = 32'b0; -(* KEEP = "TRUE" *)reg[3:0] cfgstate = 4'b0000; -wire spiIdle; - -reg spi_sdi = 1'b0,spi_csb = 1'b1 ; -assign o_cfgover = cfgover ; -assign o_ADF4351_LE = load_en ; -assign o_ADF4351_mutel= 1'b1 ; -assign o_ADF4351_SCK = o_ADF4351_CE ? 1'b0 : i_sysclk ; -assign o_ADF4351_CE = spi_csb ; -assign o_ADF4351_DATA = spi_sdi ; -reg [DATA_WIDTH-1:0] CFGREG0 ; -assign regdata = CFGREG0 ; -reg cfg_start ; -reg [15:0] counter0 ; - -always@ (posedge i_sysclk) -if(~i_arstn) - CFGREG0 <= 32'b0; -else begin -//RFout = Fpfd*(INT + (Frac/Mod)) Fpfd = Refin*[(1+D)/(R*(1+T))] - case (cnt_word) - 8'h00: CFGREG0 <= {32'h580005}; //reg 5 - 8'h01: CFGREG0 <= {32'h85003C}; //reg 4 - 8'h02: CFGREG0 <= {32'h4B3}; //reg 3 - 8'h03: CFGREG0 <= {32'h28F42}; //reg 2 {5'b0,T,R,D,12'h,reg2} R = 1 D = 1 T = 1 - 8'h04: CFGREG0 <= {32'h8008011}; //reg 1 {3'd0,phase adjust,prescaler,phase value,Frac,reg1}mod = 25 - 8'h05: CFGREG0 <= {32'hC80000}; //reg 0 {1'b0,int,frac,reg0} int = 52 frac= 8 - default : CFGREG0 <= 32'b0; - endcase -end - - - - - -always@(negedge i_sysclk)begin - if(~i_arstn)begin - cfgdata <= 0; - cnt_word <= 8'd0; - cnt_bits <= 6'd0; - cfgover <= 1'b0; - cfgstate <= 4'd0; - spi_csb <= 1'b1; - load_en <= 1'b1; - spi_sdi <= 1'b0; - end - else begin - case(cfgstate) - 4'd0:begin - if(cfg_start)begin - cfgstate <= 4'd1; - end - else begin - spi_csb <= 1'b1; - load_en <= 1'b0; - spi_sdi <= 1'b0; - cfgover <= 1'b0; - cfgstate <= 4'd0; - end - end - 4'd1:begin - cfgdata <= regdata; - cnt_lock <= 32'd0; - cnt_bits <= 6'd0; - cfgstate <= cfgstate + 1'b1; - end - 4'd2:begin - spi_csb <= 1'b0; - load_en <= 1'b0; - spi_sdi <= cfgdata[DATA_WIDTH-1]; - cfgdata <= cfgdata << 1'b1; - cnt_bits <= cnt_bits + 1'b1; - if(cnt_bits == DATA_WIDTH-1)begin - cfgstate <= cfgstate + 1'b1; - cnt_word <= cnt_word + 1'b1; - end - end - 4'd3:begin - spi_csb <= 1'b1; - load_en <= 1'b1; - spi_sdi <= 1'b0; - if(cnt_word == DATA_LENTH) - cfgstate <= cfgstate + 1'b1; - else - cfgstate <= 4'd0; - end - 4'd4:begin - cfgstate <= 4'd5; - spi_csb <= 1'b1; - load_en <= 1'b0; - spi_sdi <= 1'b0; - end - 4'd5:begin//ftw cfg - if(cnt_lock > LOCK_PIRED) - begin - pll_locked <= i_ADF4351_locked; - cnt_lock <= cnt_lock; - if( (pll_locked == 1'b0) && (cnt_lock > LOCK_PIRED)) - begin - cfgstate <= 4'd1; - cnt_word <= 8'd0; - end - else - begin - cfgstate <= 4'd5; - spi_csb <= 1'b1; - spi_sdi <= 1'b0; - cfgover <= 1'b1; - end - end - else - begin - cnt_lock <= cnt_lock + 1'b1; - end - end - default:cfgstate <= 4'd0; - endcase - end -end - - -always@(negedge i_sysclk)begin - if(~i_arstn)begin - counter0 <= 16'd0; - cfg_start <= 1'b0; - end - else begin - if(counter0 == rst_time)begin//16'h7fff - counter0 <= counter0; - cfg_start <= 1'b1; - end - else begin - counter0 <= counter0 + 1'b1; - cfg_start <= 1'b0; - end - end -end - -endmodule diff --git a/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/sources_1/new/ant_rf/Sisyif_src/FRAC1.v b/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/sources_1/new/ant_rf/Sisyif_src/FRAC1.v deleted file mode 100644 index 1dfe0f2..0000000 --- a/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/sources_1/new/ant_rf/Sisyif_src/FRAC1.v +++ /dev/null @@ -1,441 +0,0 @@ -`timescale 1ns / 1ps -////////////////////////////////////////////////////////////////////////////////// -// Company: -// Engineer: -// -// Create Date: 14:37:16 01/15/2022 -// Design Name: -// Module Name: FRAC1 -// Project Name: -// Target Devices: -// Tool versions: -// Description: -// -// Dependencies: -// -// Revision: -// Revision 0.01 - File Created -// Additional Comments: -// -////////////////////////////////////////////////////////////////////////////////// -module FRAC1( -input clka, -input [15:0] addra, -output reg[24:0] douta - ); - - -reg[11:0] addr=0; - -always@(posedge clka)begin - addr<= (addra+375) % 400 ; -end - -always@(posedge clka)begin - case(addr) -0 : douta <= 0 ; -1 : douta <= 83886 ; -2 : douta <= 167772 ; -3 : douta <= 251658 ; -4 : douta <= 335544 ; -5 : douta <= 419430 ; -6 : douta <= 503316 ; -7 : douta <= 587202 ; -8 : douta <= 671088 ; -9 : douta <= 754974 ; -10 : douta <= 838860 ; -11 : douta <= 922746 ; -12 : douta <= 1006632 ; -13 : douta <= 1090519 ; -14 : douta <= 1174405 ; -15 : douta <= 1258291 ; -16 : douta <= 1342177 ; -17 : douta <= 1426063 ; -18 : douta <= 1509949 ; -19 : douta <= 1593835 ; -20 : douta <= 1677721 ; -21 : douta <= 1761607 ; -22 : douta <= 1845493 ; -23 : douta <= 1929379 ; -24 : douta <= 2013265 ; -25 : douta <= 2097152 ; -26 : douta <= 2181038 ; -27 : douta <= 2264924 ; -28 : douta <= 2348810 ; -29 : douta <= 2432696 ; -30 : douta <= 2516582 ; -31 : douta <= 2600468 ; -32 : douta <= 2684354 ; -33 : douta <= 2768240 ; -34 : douta <= 2852126 ; -35 : douta <= 2936012 ; -36 : douta <= 3019898 ; -37 : douta <= 3103784 ; -38 : douta <= 3187671 ; -39 : douta <= 3271557 ; -40 : douta <= 3355443 ; -41 : douta <= 3439329 ; -42 : douta <= 3523215 ; -43 : douta <= 3607101 ; -44 : douta <= 3690987 ; -45 : douta <= 3774873 ; -46 : douta <= 3858759 ; -47 : douta <= 3942645 ; -48 : douta <= 4026531 ; -49 : douta <= 4110417 ; -50 : douta <= 4194304 ; -51 : douta <= 4278190 ; -52 : douta <= 4362076 ; -53 : douta <= 4445962 ; -54 : douta <= 4529848 ; -55 : douta <= 4613734 ; -56 : douta <= 4697620 ; -57 : douta <= 4781506 ; -58 : douta <= 4865392 ; -59 : douta <= 4949278 ; -60 : douta <= 5033164 ; -61 : douta <= 5117050 ; -62 : douta <= 5200936 ; -63 : douta <= 5284823 ; -64 : douta <= 5368709 ; -65 : douta <= 5452595 ; -66 : douta <= 5536481 ; -67 : douta <= 5620367 ; -68 : douta <= 5704253 ; -69 : douta <= 5788139 ; -70 : douta <= 5872025 ; -71 : douta <= 5955911 ; -72 : douta <= 6039797 ; -73 : douta <= 6123683 ; -74 : douta <= 6207569 ; -75 : douta <= 6291456 ; -76 : douta <= 6375342 ; -77 : douta <= 6459228 ; -78 : douta <= 6543114 ; -79 : douta <= 6627000 ; -80 : douta <= 6710886 ; -81 : douta <= 6794772 ; -82 : douta <= 6878658 ; -83 : douta <= 6962544 ; -84 : douta <= 7046430 ; -85 : douta <= 7130316 ; -86 : douta <= 7214202 ; -87 : douta <= 7298088 ; -88 : douta <= 7381975 ; -89 : douta <= 7465861 ; -90 : douta <= 7549747 ; -91 : douta <= 7633633 ; -92 : douta <= 7717519 ; -93 : douta <= 7801405 ; -94 : douta <= 7885291 ; -95 : douta <= 7969177 ; -96 : douta <= 8053063 ; -97 : douta <= 8136949 ; -98 : douta <= 8220835 ; -99 : douta <= 8304721 ; -100 : douta <= 8388608 ; -101 : douta <= 8472494 ; -102 : douta <= 8556380 ; -103 : douta <= 8640266 ; -104 : douta <= 8724152 ; -105 : douta <= 8808038 ; -106 : douta <= 8891924 ; -107 : douta <= 8975810 ; -108 : douta <= 9059696 ; -109 : douta <= 9143582 ; -110 : douta <= 9227468 ; -111 : douta <= 9311354 ; -112 : douta <= 9395240 ; -113 : douta <= 9479127 ; -114 : douta <= 9563013 ; -115 : douta <= 9646899 ; -116 : douta <= 9730785 ; -117 : douta <= 9814671 ; -118 : douta <= 9898557 ; -119 : douta <= 9982443 ; -120 : douta <= 10066329 ; -121 : douta <= 10150215 ; -122 : douta <= 10234101 ; -123 : douta <= 10317987 ; -124 : douta <= 10401873 ; -125 : douta <= 10485760 ; -126 : douta <= 10569646 ; -127 : douta <= 10653532 ; -128 : douta <= 10737418 ; -129 : douta <= 10821304 ; -130 : douta <= 10905190 ; -131 : douta <= 10989076 ; -132 : douta <= 11072962 ; -133 : douta <= 11156848 ; -134 : douta <= 11240734 ; -135 : douta <= 11324620 ; -136 : douta <= 11408506 ; -137 : douta <= 11492392 ; -138 : douta <= 11576279 ; -139 : douta <= 11660165 ; -140 : douta <= 11744051 ; -141 : douta <= 11827937 ; -142 : douta <= 11911823 ; -143 : douta <= 11995709 ; -144 : douta <= 12079595 ; -145 : douta <= 12163481 ; -146 : douta <= 12247367 ; -147 : douta <= 12331253 ; -148 : douta <= 12415139 ; -149 : douta <= 12499025 ; -150 : douta <= 12582912 ; -151 : douta <= 12666798 ; -152 : douta <= 12750684 ; -153 : douta <= 12834570 ; -154 : douta <= 12918456 ; -155 : douta <= 13002342 ; -156 : douta <= 13086228 ; -157 : douta <= 13170114 ; -158 : douta <= 13254000 ; -159 : douta <= 13337886 ; -160 : douta <= 13421772 ; -161 : douta <= 13505658 ; -162 : douta <= 13589544 ; -163 : douta <= 13673431 ; -164 : douta <= 13757317 ; -165 : douta <= 13841203 ; -166 : douta <= 13925089 ; -167 : douta <= 14008975 ; -168 : douta <= 14092861 ; -169 : douta <= 14176747 ; -170 : douta <= 14260633 ; -171 : douta <= 14344519 ; -172 : douta <= 14428405 ; -173 : douta <= 14512291 ; -174 : douta <= 14596177 ; -175 : douta <= 14680064 ; -176 : douta <= 14763950 ; -177 : douta <= 14847836 ; -178 : douta <= 14931722 ; -179 : douta <= 15015608 ; -180 : douta <= 15099494 ; -181 : douta <= 15183380 ; -182 : douta <= 15267266 ; -183 : douta <= 15351152 ; -184 : douta <= 15435038 ; -185 : douta <= 15518924 ; -186 : douta <= 15602810 ; -187 : douta <= 15686696 ; -188 : douta <= 15770583 ; -189 : douta <= 15854469 ; -190 : douta <= 15938355 ; -191 : douta <= 16022241 ; -192 : douta <= 16106127 ; -193 : douta <= 16190013 ; -194 : douta <= 16273899 ; -195 : douta <= 16357785 ; -196 : douta <= 16441671 ; -197 : douta <= 16525557 ; -198 : douta <= 16609443 ; -199 : douta <= 16693329 ; -200 : douta <= 16777216 ; -201 : douta <= 16861102 ; -202 : douta <= 16944988 ; -203 : douta <= 17028874 ; -204 : douta <= 17112760 ; -205 : douta <= 17196646 ; -206 : douta <= 17280532 ; -207 : douta <= 17364418 ; -208 : douta <= 17448304 ; -209 : douta <= 17532190 ; -210 : douta <= 17616076 ; -211 : douta <= 17699962 ; -212 : douta <= 17783848 ; -213 : douta <= 17867735 ; -214 : douta <= 17951621 ; -215 : douta <= 18035507 ; -216 : douta <= 18119393 ; -217 : douta <= 18203279 ; -218 : douta <= 18287165 ; -219 : douta <= 18371051 ; -220 : douta <= 18454937 ; -221 : douta <= 18538823 ; -222 : douta <= 18622709 ; -223 : douta <= 18706595 ; -224 : douta <= 18790481 ; -225 : douta <= 18874368 ; -226 : douta <= 18958254 ; -227 : douta <= 19042140 ; -228 : douta <= 19126026 ; -229 : douta <= 19209912 ; -230 : douta <= 19293798 ; -231 : douta <= 19377684 ; -232 : douta <= 19461570 ; -233 : douta <= 19545456 ; -234 : douta <= 19629342 ; -235 : douta <= 19713228 ; -236 : douta <= 19797114 ; -237 : douta <= 19881000 ; -238 : douta <= 19964887 ; -239 : douta <= 20048773 ; -240 : douta <= 20132659 ; -241 : douta <= 20216545 ; -242 : douta <= 20300431 ; -243 : douta <= 20384317 ; -244 : douta <= 20468203 ; -245 : douta <= 20552089 ; -246 : douta <= 20635975 ; -247 : douta <= 20719861 ; -248 : douta <= 20803747 ; -249 : douta <= 20887633 ; -250 : douta <= 20971520 ; -251 : douta <= 21055406 ; -252 : douta <= 21139292 ; -253 : douta <= 21223178 ; -254 : douta <= 21307064 ; -255 : douta <= 21390950 ; -256 : douta <= 21474836 ; -257 : douta <= 21558722 ; -258 : douta <= 21642608 ; -259 : douta <= 21726494 ; -260 : douta <= 21810380 ; -261 : douta <= 21894266 ; -262 : douta <= 21978152 ; -263 : douta <= 22062039 ; -264 : douta <= 22145925 ; -265 : douta <= 22229811 ; -266 : douta <= 22313697 ; -267 : douta <= 22397583 ; -268 : douta <= 22481469 ; -269 : douta <= 22565355 ; -270 : douta <= 22649241 ; -271 : douta <= 22733127 ; -272 : douta <= 22817013 ; -273 : douta <= 22900899 ; -274 : douta <= 22984785 ; -275 : douta <= 23068672 ; -276 : douta <= 23152558 ; -277 : douta <= 23236444 ; -278 : douta <= 23320330 ; -279 : douta <= 23404216 ; -280 : douta <= 23488102 ; -281 : douta <= 23571988 ; -282 : douta <= 23655874 ; -283 : douta <= 23739760 ; -284 : douta <= 23823646 ; -285 : douta <= 23907532 ; -286 : douta <= 23991418 ; -287 : douta <= 24075304 ; -288 : douta <= 24159191 ; -289 : douta <= 24243077 ; -290 : douta <= 24326963 ; -291 : douta <= 24410849 ; -292 : douta <= 24494735 ; -293 : douta <= 24578621 ; -294 : douta <= 24662507 ; -295 : douta <= 24746393 ; -296 : douta <= 24830279 ; -297 : douta <= 24914165 ; -298 : douta <= 24998051 ; -299 : douta <= 25081937 ; -300 : douta <= 25165824 ; -301 : douta <= 25249710 ; -302 : douta <= 25333596 ; -303 : douta <= 25417482 ; -304 : douta <= 25501368 ; -305 : douta <= 25585254 ; -306 : douta <= 25669140 ; -307 : douta <= 25753026 ; -308 : douta <= 25836912 ; -309 : douta <= 25920798 ; -310 : douta <= 26004684 ; -311 : douta <= 26088570 ; -312 : douta <= 26172456 ; -313 : douta <= 26256343 ; -314 : douta <= 26340229 ; -315 : douta <= 26424115 ; -316 : douta <= 26508001 ; -317 : douta <= 26591887 ; -318 : douta <= 26675773 ; -319 : douta <= 26759659 ; -320 : douta <= 26843545 ; -321 : douta <= 26927431 ; -322 : douta <= 27011317 ; -323 : douta <= 27095203 ; -324 : douta <= 27179089 ; -325 : douta <= 27262976 ; -326 : douta <= 27346862 ; -327 : douta <= 27430748 ; -328 : douta <= 27514634 ; -329 : douta <= 27598520 ; -330 : douta <= 27682406 ; -331 : douta <= 27766292 ; -332 : douta <= 27850178 ; -333 : douta <= 27934064 ; -334 : douta <= 28017950 ; -335 : douta <= 28101836 ; -336 : douta <= 28185722 ; -337 : douta <= 28269608 ; -338 : douta <= 28353495 ; -339 : douta <= 28437381 ; -340 : douta <= 28521267 ; -341 : douta <= 28605153 ; -342 : douta <= 28689039 ; -343 : douta <= 28772925 ; -344 : douta <= 28856811 ; -345 : douta <= 28940697 ; -346 : douta <= 29024583 ; -347 : douta <= 29108469 ; -348 : douta <= 29192355 ; -349 : douta <= 29276241 ; -350 : douta <= 29360128 ; -351 : douta <= 29444014 ; -352 : douta <= 29527900 ; -353 : douta <= 29611786 ; -354 : douta <= 29695672 ; -355 : douta <= 29779558 ; -356 : douta <= 29863444 ; -357 : douta <= 29947330 ; -358 : douta <= 30031216 ; -359 : douta <= 30115102 ; -360 : douta <= 30198988 ; -361 : douta <= 30282874 ; -362 : douta <= 30366760 ; -363 : douta <= 30450647 ; -364 : douta <= 30534533 ; -365 : douta <= 30618419 ; -366 : douta <= 30702305 ; -367 : douta <= 30786191 ; -368 : douta <= 30870077 ; -369 : douta <= 30953963 ; -370 : douta <= 31037849 ; -371 : douta <= 31121735 ; -372 : douta <= 31205621 ; -373 : douta <= 31289507 ; -374 : douta <= 31373393 ; -375 : douta <= 31457280 ; -376 : douta <= 31541166 ; -377 : douta <= 31625052 ; -378 : douta <= 31708938 ; -379 : douta <= 31792824 ; -380 : douta <= 31876710 ; -381 : douta <= 31960596 ; -382 : douta <= 32044482 ; -383 : douta <= 32128368 ; -384 : douta <= 32212254 ; -385 : douta <= 32296140 ; -386 : douta <= 32380026 ; -387 : douta <= 32463912 ; -388 : douta <= 32547799 ; -389 : douta <= 32631685 ; -390 : douta <= 32715571 ; -391 : douta <= 32799457 ; -392 : douta <= 32883343 ; -393 : douta <= 32967229 ; -394 : douta <= 33051115 ; -395 : douta <= 33135001 ; -396 : douta <= 33218887 ; -397 : douta <= 33302773 ; -398 : douta <= 33386659 ; -399 : douta <= 33470545 ; - default : douta <= douta ; - endcase -end - - -endmodule diff --git a/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/sources_1/new/ant_rf/Sisyif_src/INT_ROMb.v b/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/sources_1/new/ant_rf/Sisyif_src/INT_ROMb.v deleted file mode 100644 index 3cf64c9..0000000 --- a/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/sources_1/new/ant_rf/Sisyif_src/INT_ROMb.v +++ /dev/null @@ -1,3569 +0,0 @@ -`timescale 1ns / 1ps -////////////////////////////////////////////////////////////////////////////////// -// Company: -// Engineer: -// -// Create Date: 15:37:56 01/26/2022 -// Design Name: -// Module Name: INT_ROMb -// Project Name: -// Target Devices: -// Tool versions: -// Description: -// -// Dependencies: -// -// Revision: -// Revision 0.01 - File Created -// Additional Comments: -// -////////////////////////////////////////////////////////////////////////////////// -module INT_ROMb( -input sysclk, -input [11 : 0] addra, - -output reg[15:0] douta -); - - -always@(posedge sysclk)begin - if(addra>=0 && addra<=24) douta<=50; - else if(addra<=424 ) douta<=51; - else if(addra<=824 ) douta<=52; - else if(addra<=1224 ) douta<=53; - else if(addra<=1624 ) douta<=54; - else if(addra<=2024 ) douta<=55; - else if(addra<=2424 ) douta<=56; - else if(addra<=2824 ) douta<=57; - else if(addra<=3224 ) douta<=58; - else if(addra<=3500 ) douta<=59; - else douta<=douta; -end -/* -always@(posedge sysclk)begin - case(addra) - -0 : douta <= 50 ; -1 : douta <= 50 ; -2 : douta <= 50 ; -3 : douta <= 50 ; -4 : douta <= 50 ; -5 : douta <= 50 ; -6 : douta <= 50 ; -7 : douta <= 50 ; -8 : douta <= 50 ; -9 : douta <= 50 ; -10 : douta <= 50 ; -11 : douta <= 50 ; -12 : douta <= 50 ; -13 : douta <= 50 ; -14 : douta <= 50 ; -15 : douta <= 50 ; -16 : douta <= 50 ; -17 : douta <= 50 ; -18 : douta <= 50 ; -19 : douta <= 50 ; -20 : douta <= 50 ; -21 : douta <= 50 ; -22 : douta <= 50 ; -23 : douta <= 50 ; -24 : douta <= 50 ; -25 : douta <= 51 ; -26 : douta <= 51 ; -27 : douta <= 51 ; -28 : douta <= 51 ; -29 : douta <= 51 ; -30 : douta <= 51 ; -31 : douta <= 51 ; -32 : douta <= 51 ; -33 : douta <= 51 ; -34 : douta <= 51 ; -35 : douta <= 51 ; -36 : douta <= 51 ; -37 : douta <= 51 ; -38 : douta <= 51 ; -39 : douta <= 51 ; -40 : douta <= 51 ; -41 : douta <= 51 ; -42 : douta <= 51 ; -43 : douta <= 51 ; -44 : douta <= 51 ; -45 : douta <= 51 ; -46 : douta <= 51 ; -47 : douta <= 51 ; -48 : douta <= 51 ; -49 : douta <= 51 ; -50 : douta <= 51 ; -51 : douta <= 51 ; -52 : douta <= 51 ; -53 : douta <= 51 ; -54 : douta <= 51 ; -55 : douta <= 51 ; -56 : douta <= 51 ; -57 : douta <= 51 ; -58 : douta <= 51 ; -59 : douta <= 51 ; -60 : douta <= 51 ; -61 : douta <= 51 ; -62 : douta <= 51 ; -63 : douta <= 51 ; -64 : douta <= 51 ; -65 : douta <= 51 ; -66 : douta <= 51 ; -67 : douta <= 51 ; -68 : douta <= 51 ; -69 : douta <= 51 ; -70 : douta <= 51 ; -71 : douta <= 51 ; -72 : douta <= 51 ; -73 : douta <= 51 ; -74 : douta <= 51 ; -75 : douta <= 51 ; -76 : douta <= 51 ; -77 : douta <= 51 ; -78 : douta <= 51 ; -79 : douta <= 51 ; -80 : douta <= 51 ; -81 : douta <= 51 ; -82 : douta <= 51 ; -83 : douta <= 51 ; -84 : douta <= 51 ; -85 : douta <= 51 ; -86 : douta <= 51 ; -87 : douta <= 51 ; -88 : douta <= 51 ; -89 : douta <= 51 ; -90 : douta <= 51 ; -91 : douta <= 51 ; -92 : douta <= 51 ; -93 : douta <= 51 ; -94 : douta <= 51 ; -95 : douta <= 51 ; -96 : douta <= 51 ; -97 : douta <= 51 ; -98 : douta <= 51 ; -99 : douta <= 51 ; -100 : douta <= 51 ; -101 : douta <= 51 ; -102 : douta <= 51 ; -103 : douta <= 51 ; -104 : douta <= 51 ; -105 : douta <= 51 ; -106 : douta <= 51 ; -107 : douta <= 51 ; -108 : douta <= 51 ; -109 : douta <= 51 ; -110 : douta <= 51 ; -111 : douta <= 51 ; -112 : douta <= 51 ; -113 : douta <= 51 ; -114 : douta <= 51 ; -115 : douta <= 51 ; -116 : douta <= 51 ; -117 : douta <= 51 ; -118 : douta <= 51 ; -119 : douta <= 51 ; -120 : douta <= 51 ; -121 : douta <= 51 ; -122 : douta <= 51 ; -123 : douta <= 51 ; -124 : douta <= 51 ; -125 : douta <= 51 ; -126 : douta <= 51 ; -127 : douta <= 51 ; -128 : douta <= 51 ; -129 : douta <= 51 ; -130 : douta <= 51 ; -131 : douta <= 51 ; -132 : douta <= 51 ; -133 : douta <= 51 ; -134 : douta <= 51 ; -135 : douta <= 51 ; -136 : douta <= 51 ; -137 : douta <= 51 ; -138 : douta <= 51 ; -139 : douta <= 51 ; -140 : douta <= 51 ; -141 : douta <= 51 ; -142 : douta <= 51 ; -143 : douta <= 51 ; -144 : douta <= 51 ; -145 : douta <= 51 ; -146 : douta <= 51 ; -147 : douta <= 51 ; -148 : douta <= 51 ; -149 : douta <= 51 ; -150 : douta <= 51 ; -151 : douta <= 51 ; -152 : douta <= 51 ; -153 : douta <= 51 ; -154 : douta <= 51 ; -155 : douta <= 51 ; -156 : douta <= 51 ; -157 : douta <= 51 ; -158 : douta <= 51 ; -159 : douta <= 51 ; -160 : douta <= 51 ; -161 : douta <= 51 ; -162 : douta <= 51 ; -163 : douta <= 51 ; -164 : douta <= 51 ; -165 : douta <= 51 ; -166 : douta <= 51 ; -167 : douta <= 51 ; -168 : douta <= 51 ; -169 : douta <= 51 ; -170 : douta <= 51 ; -171 : douta <= 51 ; -172 : douta <= 51 ; -173 : douta <= 51 ; -174 : douta <= 51 ; -175 : douta <= 51 ; -176 : douta <= 51 ; -177 : douta <= 51 ; -178 : douta <= 51 ; -179 : douta <= 51 ; -180 : douta <= 51 ; -181 : douta <= 51 ; -182 : douta <= 51 ; -183 : douta <= 51 ; -184 : douta <= 51 ; -185 : douta <= 51 ; -186 : douta <= 51 ; -187 : douta <= 51 ; -188 : douta <= 51 ; -189 : douta <= 51 ; -190 : douta <= 51 ; -191 : douta <= 51 ; -192 : douta <= 51 ; -193 : douta <= 51 ; -194 : douta <= 51 ; -195 : douta <= 51 ; -196 : douta <= 51 ; -197 : douta <= 51 ; -198 : douta <= 51 ; -199 : douta <= 51 ; -200 : douta <= 51 ; -201 : douta <= 51 ; -202 : douta <= 51 ; -203 : douta <= 51 ; -204 : douta <= 51 ; -205 : douta <= 51 ; -206 : douta <= 51 ; -207 : douta <= 51 ; -208 : douta <= 51 ; -209 : douta <= 51 ; -210 : douta <= 51 ; -211 : douta <= 51 ; -212 : douta <= 51 ; -213 : douta <= 51 ; -214 : douta <= 51 ; -215 : douta <= 51 ; -216 : douta <= 51 ; -217 : douta <= 51 ; -218 : douta <= 51 ; -219 : douta <= 51 ; -220 : douta <= 51 ; -221 : douta <= 51 ; -222 : douta <= 51 ; -223 : douta <= 51 ; -224 : douta <= 51 ; -225 : douta <= 51 ; -226 : douta <= 51 ; -227 : douta <= 51 ; -228 : douta <= 51 ; -229 : douta <= 51 ; -230 : douta <= 51 ; -231 : douta <= 51 ; -232 : douta <= 51 ; -233 : douta <= 51 ; -234 : douta <= 51 ; -235 : douta <= 51 ; -236 : douta <= 51 ; -237 : douta <= 51 ; -238 : douta <= 51 ; -239 : douta <= 51 ; -240 : douta <= 51 ; -241 : douta <= 51 ; -242 : douta <= 51 ; -243 : douta <= 51 ; -244 : douta <= 51 ; -245 : douta <= 51 ; -246 : douta <= 51 ; -247 : douta <= 51 ; -248 : douta <= 51 ; -249 : douta <= 51 ; -250 : douta <= 51 ; -251 : douta <= 51 ; -252 : douta <= 51 ; -253 : douta <= 51 ; -254 : douta <= 51 ; -255 : douta <= 51 ; -256 : douta <= 51 ; -257 : douta <= 51 ; -258 : douta <= 51 ; -259 : douta <= 51 ; -260 : douta <= 51 ; -261 : douta <= 51 ; -262 : douta <= 51 ; -263 : douta <= 51 ; -264 : douta <= 51 ; -265 : douta <= 51 ; -266 : douta <= 51 ; -267 : douta <= 51 ; -268 : douta <= 51 ; -269 : douta <= 51 ; -270 : douta <= 51 ; -271 : douta <= 51 ; -272 : douta <= 51 ; -273 : douta <= 51 ; -274 : douta <= 51 ; -275 : douta <= 51 ; -276 : douta <= 51 ; -277 : douta <= 51 ; -278 : douta <= 51 ; -279 : douta <= 51 ; -280 : douta <= 51 ; -281 : douta <= 51 ; -282 : douta <= 51 ; -283 : douta <= 51 ; -284 : douta <= 51 ; -285 : douta <= 51 ; -286 : douta <= 51 ; -287 : douta <= 51 ; -288 : douta <= 51 ; -289 : douta <= 51 ; -290 : douta <= 51 ; -291 : douta <= 51 ; -292 : douta <= 51 ; -293 : douta <= 51 ; -294 : douta <= 51 ; -295 : douta <= 51 ; -296 : douta <= 51 ; -297 : douta <= 51 ; -298 : douta <= 51 ; -299 : douta <= 51 ; -300 : douta <= 51 ; -301 : douta <= 51 ; -302 : douta <= 51 ; -303 : douta <= 51 ; -304 : douta <= 51 ; -305 : douta <= 51 ; -306 : douta <= 51 ; -307 : douta <= 51 ; -308 : douta <= 51 ; -309 : douta <= 51 ; -310 : douta <= 51 ; -311 : douta <= 51 ; -312 : douta <= 51 ; -313 : douta <= 51 ; -314 : douta <= 51 ; -315 : douta <= 51 ; -316 : douta <= 51 ; -317 : douta <= 51 ; -318 : douta <= 51 ; -319 : douta <= 51 ; -320 : douta <= 51 ; -321 : douta <= 51 ; -322 : douta <= 51 ; -323 : douta <= 51 ; -324 : douta <= 51 ; -325 : douta <= 51 ; -326 : douta <= 51 ; -327 : douta <= 51 ; -328 : douta <= 51 ; -329 : douta <= 51 ; -330 : douta <= 51 ; -331 : douta <= 51 ; -332 : douta <= 51 ; -333 : douta <= 51 ; -334 : douta <= 51 ; -335 : douta <= 51 ; -336 : douta <= 51 ; -337 : douta <= 51 ; -338 : douta <= 51 ; -339 : douta <= 51 ; -340 : douta <= 51 ; -341 : douta <= 51 ; -342 : douta <= 51 ; -343 : douta <= 51 ; -344 : douta <= 51 ; -345 : douta <= 51 ; -346 : douta <= 51 ; -347 : douta <= 51 ; -348 : douta <= 51 ; -349 : douta <= 51 ; -350 : douta <= 51 ; -351 : douta <= 51 ; -352 : douta <= 51 ; -353 : douta <= 51 ; -354 : douta <= 51 ; -355 : douta <= 51 ; -356 : douta <= 51 ; -357 : douta <= 51 ; -358 : douta <= 51 ; -359 : douta <= 51 ; -360 : douta <= 51 ; -361 : douta <= 51 ; -362 : douta <= 51 ; -363 : douta <= 51 ; -364 : douta <= 51 ; -365 : douta <= 51 ; -366 : douta <= 51 ; -367 : douta <= 51 ; -368 : douta <= 51 ; -369 : douta <= 51 ; -370 : douta <= 51 ; -371 : douta <= 51 ; -372 : douta <= 51 ; -373 : douta <= 51 ; -374 : douta <= 51 ; -375 : douta <= 51 ; -376 : douta <= 51 ; -377 : douta <= 51 ; -378 : douta <= 51 ; -379 : douta <= 51 ; -380 : douta <= 51 ; -381 : douta <= 51 ; -382 : douta <= 51 ; -383 : douta <= 51 ; -384 : douta <= 51 ; -385 : douta <= 51 ; -386 : douta <= 51 ; -387 : douta <= 51 ; -388 : douta <= 51 ; -389 : douta <= 51 ; -390 : douta <= 51 ; -391 : douta <= 51 ; -392 : douta <= 51 ; -393 : douta <= 51 ; -394 : douta <= 51 ; -395 : douta <= 51 ; -396 : douta <= 51 ; -397 : douta <= 51 ; -398 : douta <= 51 ; -399 : douta <= 51 ; -400 : douta <= 51 ; -401 : douta <= 51 ; -402 : douta <= 51 ; -403 : douta <= 51 ; -404 : douta <= 51 ; -405 : douta <= 51 ; -406 : douta <= 51 ; -407 : douta <= 51 ; -408 : douta <= 51 ; -409 : douta <= 51 ; -410 : douta <= 51 ; -411 : douta <= 51 ; -412 : douta <= 51 ; -413 : douta <= 51 ; -414 : douta <= 51 ; -415 : douta <= 51 ; -416 : douta <= 51 ; -417 : douta <= 51 ; -418 : douta <= 51 ; -419 : douta <= 51 ; -420 : douta <= 51 ; -421 : douta <= 51 ; -422 : douta <= 51 ; -423 : douta <= 51 ; -424 : douta <= 51 ; -425 : douta <= 52 ; -426 : douta <= 52 ; -427 : douta <= 52 ; -428 : douta <= 52 ; -429 : douta <= 52 ; -430 : douta <= 52 ; -431 : douta <= 52 ; -432 : douta <= 52 ; -433 : douta <= 52 ; -434 : douta <= 52 ; -435 : douta <= 52 ; -436 : douta <= 52 ; -437 : douta <= 52 ; -438 : douta <= 52 ; -439 : douta <= 52 ; -440 : douta <= 52 ; -441 : douta <= 52 ; -442 : douta <= 52 ; -443 : douta <= 52 ; -444 : douta <= 52 ; -445 : douta <= 52 ; -446 : douta <= 52 ; -447 : douta <= 52 ; -448 : douta <= 52 ; -449 : douta <= 52 ; -450 : douta <= 52 ; -451 : douta <= 52 ; -452 : douta <= 52 ; -453 : douta <= 52 ; -454 : douta <= 52 ; -455 : douta <= 52 ; -456 : douta <= 52 ; -457 : douta <= 52 ; -458 : douta <= 52 ; -459 : douta <= 52 ; -460 : douta <= 52 ; -461 : douta <= 52 ; -462 : douta <= 52 ; -463 : douta <= 52 ; -464 : douta <= 52 ; -465 : douta <= 52 ; -466 : douta <= 52 ; -467 : douta <= 52 ; -468 : douta <= 52 ; -469 : douta <= 52 ; -470 : douta <= 52 ; -471 : douta <= 52 ; -472 : douta <= 52 ; -473 : douta <= 52 ; -474 : douta <= 52 ; -475 : douta <= 52 ; -476 : douta <= 52 ; -477 : douta <= 52 ; -478 : douta <= 52 ; -479 : douta <= 52 ; -480 : douta <= 52 ; -481 : douta <= 52 ; -482 : douta <= 52 ; -483 : douta <= 52 ; -484 : douta <= 52 ; -485 : douta <= 52 ; -486 : douta <= 52 ; -487 : douta <= 52 ; -488 : douta <= 52 ; -489 : douta <= 52 ; -490 : douta <= 52 ; -491 : douta <= 52 ; -492 : douta <= 52 ; -493 : douta <= 52 ; -494 : douta <= 52 ; -495 : douta <= 52 ; -496 : douta <= 52 ; -497 : douta <= 52 ; -498 : douta <= 52 ; -499 : douta <= 52 ; -500 : douta <= 52 ; -501 : douta <= 52 ; -502 : douta <= 52 ; -503 : douta <= 52 ; -504 : douta <= 52 ; -505 : douta <= 52 ; -506 : douta <= 52 ; -507 : douta <= 52 ; -508 : douta <= 52 ; -509 : douta <= 52 ; -510 : douta <= 52 ; -511 : douta <= 52 ; -512 : douta <= 52 ; -513 : douta <= 52 ; -514 : douta <= 52 ; -515 : douta <= 52 ; -516 : douta <= 52 ; -517 : douta <= 52 ; -518 : douta <= 52 ; -519 : douta <= 52 ; -520 : douta <= 52 ; -521 : douta <= 52 ; -522 : douta <= 52 ; -523 : douta <= 52 ; -524 : douta <= 52 ; -525 : douta <= 52 ; -526 : douta <= 52 ; -527 : douta <= 52 ; -528 : douta <= 52 ; -529 : douta <= 52 ; -530 : douta <= 52 ; -531 : douta <= 52 ; -532 : douta <= 52 ; -533 : douta <= 52 ; -534 : douta <= 52 ; -535 : douta <= 52 ; -536 : douta <= 52 ; -537 : douta <= 52 ; -538 : douta <= 52 ; -539 : douta <= 52 ; -540 : douta <= 52 ; -541 : douta <= 52 ; -542 : douta <= 52 ; -543 : douta <= 52 ; -544 : douta <= 52 ; -545 : douta <= 52 ; -546 : douta <= 52 ; -547 : douta <= 52 ; -548 : douta <= 52 ; -549 : douta <= 52 ; -550 : douta <= 52 ; -551 : douta <= 52 ; -552 : douta <= 52 ; -553 : douta <= 52 ; -554 : douta <= 52 ; -555 : douta <= 52 ; -556 : douta <= 52 ; -557 : douta <= 52 ; -558 : douta <= 52 ; -559 : douta <= 52 ; -560 : douta <= 52 ; -561 : douta <= 52 ; -562 : douta <= 52 ; -563 : douta <= 52 ; -564 : douta <= 52 ; -565 : douta <= 52 ; -566 : douta <= 52 ; -567 : douta <= 52 ; -568 : douta <= 52 ; -569 : douta <= 52 ; -570 : douta <= 52 ; -571 : douta <= 52 ; -572 : douta <= 52 ; -573 : douta <= 52 ; -574 : douta <= 52 ; -575 : douta <= 52 ; -576 : douta <= 52 ; -577 : douta <= 52 ; -578 : douta <= 52 ; -579 : douta <= 52 ; -580 : douta <= 52 ; -581 : douta <= 52 ; -582 : douta <= 52 ; -583 : douta <= 52 ; -584 : douta <= 52 ; -585 : douta <= 52 ; -586 : douta <= 52 ; -587 : douta <= 52 ; -588 : douta <= 52 ; -589 : douta <= 52 ; -590 : douta <= 52 ; -591 : douta <= 52 ; -592 : douta <= 52 ; -593 : douta <= 52 ; -594 : douta <= 52 ; -595 : douta <= 52 ; -596 : douta <= 52 ; -597 : douta <= 52 ; -598 : douta <= 52 ; -599 : douta <= 52 ; -600 : douta <= 52 ; -601 : douta <= 52 ; -602 : douta <= 52 ; -603 : douta <= 52 ; -604 : douta <= 52 ; -605 : douta <= 52 ; -606 : douta <= 52 ; -607 : douta <= 52 ; -608 : douta <= 52 ; -609 : douta <= 52 ; -610 : douta <= 52 ; -611 : douta <= 52 ; -612 : douta <= 52 ; -613 : douta <= 52 ; -614 : douta <= 52 ; -615 : douta <= 52 ; -616 : douta <= 52 ; -617 : douta <= 52 ; -618 : douta <= 52 ; -619 : douta <= 52 ; -620 : douta <= 52 ; -621 : douta <= 52 ; -622 : douta <= 52 ; -623 : douta <= 52 ; -624 : douta <= 52 ; -625 : douta <= 52 ; -626 : douta <= 52 ; -627 : douta <= 52 ; -628 : douta <= 52 ; -629 : douta <= 52 ; -630 : douta <= 52 ; -631 : douta <= 52 ; -632 : douta <= 52 ; -633 : douta <= 52 ; -634 : douta <= 52 ; -635 : douta <= 52 ; -636 : douta <= 52 ; -637 : douta <= 52 ; -638 : douta <= 52 ; -639 : douta <= 52 ; -640 : douta <= 52 ; -641 : douta <= 52 ; -642 : douta <= 52 ; -643 : douta <= 52 ; -644 : douta <= 52 ; -645 : douta <= 52 ; -646 : douta <= 52 ; -647 : douta <= 52 ; -648 : douta <= 52 ; -649 : douta <= 52 ; -650 : douta <= 52 ; -651 : douta <= 52 ; -652 : douta <= 52 ; -653 : douta <= 52 ; -654 : douta <= 52 ; -655 : douta <= 52 ; -656 : douta <= 52 ; -657 : douta <= 52 ; -658 : douta <= 52 ; -659 : douta <= 52 ; -660 : douta <= 52 ; -661 : douta <= 52 ; -662 : douta <= 52 ; -663 : douta <= 52 ; -664 : douta <= 52 ; -665 : douta <= 52 ; -666 : douta <= 52 ; -667 : douta <= 52 ; -668 : douta <= 52 ; -669 : douta <= 52 ; -670 : douta <= 52 ; -671 : douta <= 52 ; -672 : douta <= 52 ; -673 : douta <= 52 ; -674 : douta <= 52 ; -675 : douta <= 52 ; -676 : douta <= 52 ; -677 : douta <= 52 ; -678 : douta <= 52 ; -679 : douta <= 52 ; -680 : douta <= 52 ; -681 : douta <= 52 ; -682 : douta <= 52 ; -683 : douta <= 52 ; -684 : douta <= 52 ; -685 : douta <= 52 ; -686 : douta <= 52 ; -687 : douta <= 52 ; -688 : douta <= 52 ; -689 : douta <= 52 ; -690 : douta <= 52 ; -691 : douta <= 52 ; -692 : douta <= 52 ; -693 : douta <= 52 ; -694 : douta <= 52 ; -695 : douta <= 52 ; -696 : douta <= 52 ; -697 : douta <= 52 ; -698 : douta <= 52 ; -699 : douta <= 52 ; -700 : douta <= 52 ; -701 : douta <= 52 ; -702 : douta <= 52 ; -703 : douta <= 52 ; -704 : douta <= 52 ; -705 : douta <= 52 ; -706 : douta <= 52 ; -707 : douta <= 52 ; -708 : douta <= 52 ; -709 : douta <= 52 ; -710 : douta <= 52 ; -711 : douta <= 52 ; -712 : douta <= 52 ; -713 : douta <= 52 ; -714 : douta <= 52 ; -715 : douta <= 52 ; -716 : douta <= 52 ; -717 : douta <= 52 ; -718 : douta <= 52 ; -719 : douta <= 52 ; -720 : douta <= 52 ; -721 : douta <= 52 ; -722 : douta <= 52 ; -723 : douta <= 52 ; -724 : douta <= 52 ; -725 : douta <= 52 ; -726 : douta <= 52 ; -727 : douta <= 52 ; -728 : douta <= 52 ; -729 : douta <= 52 ; -730 : douta <= 52 ; -731 : douta <= 52 ; -732 : douta <= 52 ; -733 : douta <= 52 ; -734 : douta <= 52 ; -735 : douta <= 52 ; -736 : douta <= 52 ; -737 : douta <= 52 ; -738 : douta <= 52 ; -739 : douta <= 52 ; -740 : douta <= 52 ; -741 : douta <= 52 ; -742 : douta <= 52 ; -743 : douta <= 52 ; -744 : douta <= 52 ; -745 : douta <= 52 ; -746 : douta <= 52 ; -747 : douta <= 52 ; -748 : douta <= 52 ; -749 : douta <= 52 ; -750 : douta <= 52 ; -751 : douta <= 52 ; -752 : douta <= 52 ; -753 : douta <= 52 ; -754 : douta <= 52 ; -755 : douta <= 52 ; -756 : douta <= 52 ; -757 : douta <= 52 ; -758 : douta <= 52 ; -759 : douta <= 52 ; -760 : douta <= 52 ; -761 : douta <= 52 ; -762 : douta <= 52 ; -763 : douta <= 52 ; -764 : douta <= 52 ; -765 : douta <= 52 ; -766 : douta <= 52 ; -767 : douta <= 52 ; -768 : douta <= 52 ; -769 : douta <= 52 ; -770 : douta <= 52 ; -771 : douta <= 52 ; -772 : douta <= 52 ; -773 : douta <= 52 ; -774 : douta <= 52 ; -775 : douta <= 52 ; -776 : douta <= 52 ; -777 : douta <= 52 ; -778 : douta <= 52 ; -779 : douta <= 52 ; -780 : douta <= 52 ; -781 : douta <= 52 ; -782 : douta <= 52 ; -783 : douta <= 52 ; -784 : douta <= 52 ; -785 : douta <= 52 ; -786 : douta <= 52 ; -787 : douta <= 52 ; -788 : douta <= 52 ; -789 : douta <= 52 ; -790 : douta <= 52 ; -791 : douta <= 52 ; -792 : douta <= 52 ; -793 : douta <= 52 ; -794 : douta <= 52 ; -795 : douta <= 52 ; -796 : douta <= 52 ; -797 : douta <= 52 ; -798 : douta <= 52 ; -799 : douta <= 52 ; -800 : douta <= 52 ; -801 : douta <= 52 ; -802 : douta <= 52 ; -803 : douta <= 52 ; -804 : douta <= 52 ; -805 : douta <= 52 ; -806 : douta <= 52 ; -807 : douta <= 52 ; -808 : douta <= 52 ; -809 : douta <= 52 ; -810 : douta <= 52 ; -811 : douta <= 52 ; -812 : douta <= 52 ; -813 : douta <= 52 ; -814 : douta <= 52 ; -815 : douta <= 52 ; -816 : douta <= 52 ; -817 : douta <= 52 ; -818 : douta <= 52 ; -819 : douta <= 52 ; -820 : douta <= 52 ; -821 : douta <= 52 ; -822 : douta <= 52 ; -823 : douta <= 52 ; -824 : douta <= 52 ; -825 : douta <= 53 ; -826 : douta <= 53 ; -827 : douta <= 53 ; -828 : douta <= 53 ; -829 : douta <= 53 ; -830 : douta <= 53 ; -831 : douta <= 53 ; -832 : douta <= 53 ; -833 : douta <= 53 ; -834 : douta <= 53 ; -835 : douta <= 53 ; -836 : douta <= 53 ; -837 : douta <= 53 ; -838 : douta <= 53 ; -839 : douta <= 53 ; -840 : douta <= 53 ; -841 : douta <= 53 ; -842 : douta <= 53 ; -843 : douta <= 53 ; -844 : douta <= 53 ; -845 : douta <= 53 ; -846 : douta <= 53 ; -847 : douta <= 53 ; -848 : douta <= 53 ; -849 : douta <= 53 ; -850 : douta <= 53 ; -851 : douta <= 53 ; -852 : douta <= 53 ; -853 : douta <= 53 ; -854 : douta <= 53 ; -855 : douta <= 53 ; -856 : douta <= 53 ; -857 : douta <= 53 ; -858 : douta <= 53 ; -859 : douta <= 53 ; -860 : douta <= 53 ; -861 : douta <= 53 ; -862 : douta <= 53 ; -863 : douta <= 53 ; -864 : douta <= 53 ; -865 : douta <= 53 ; -866 : douta <= 53 ; -867 : douta <= 53 ; -868 : douta <= 53 ; -869 : douta <= 53 ; -870 : douta <= 53 ; -871 : douta <= 53 ; -872 : douta <= 53 ; -873 : douta <= 53 ; -874 : douta <= 53 ; -875 : douta <= 53 ; -876 : douta <= 53 ; -877 : douta <= 53 ; -878 : douta <= 53 ; -879 : douta <= 53 ; -880 : douta <= 53 ; -881 : douta <= 53 ; -882 : douta <= 53 ; -883 : douta <= 53 ; -884 : douta <= 53 ; -885 : douta <= 53 ; -886 : douta <= 53 ; -887 : douta <= 53 ; -888 : douta <= 53 ; -889 : douta <= 53 ; -890 : douta <= 53 ; -891 : douta <= 53 ; -892 : douta <= 53 ; -893 : douta <= 53 ; -894 : douta <= 53 ; -895 : douta <= 53 ; -896 : douta <= 53 ; -897 : douta <= 53 ; -898 : douta <= 53 ; -899 : douta <= 53 ; -900 : douta <= 53 ; -901 : douta <= 53 ; -902 : douta <= 53 ; -903 : douta <= 53 ; -904 : douta <= 53 ; -905 : douta <= 53 ; -906 : douta <= 53 ; -907 : douta <= 53 ; -908 : douta <= 53 ; -909 : douta <= 53 ; -910 : douta <= 53 ; -911 : douta <= 53 ; -912 : douta <= 53 ; -913 : douta <= 53 ; -914 : douta <= 53 ; -915 : douta <= 53 ; -916 : douta <= 53 ; -917 : douta <= 53 ; -918 : douta <= 53 ; -919 : douta <= 53 ; -920 : douta <= 53 ; -921 : douta <= 53 ; -922 : douta <= 53 ; -923 : douta <= 53 ; -924 : douta <= 53 ; -925 : douta <= 53 ; -926 : douta <= 53 ; -927 : douta <= 53 ; -928 : douta <= 53 ; -929 : douta <= 53 ; -930 : douta <= 53 ; -931 : douta <= 53 ; -932 : douta <= 53 ; -933 : douta <= 53 ; -934 : douta <= 53 ; -935 : douta <= 53 ; -936 : douta <= 53 ; -937 : douta <= 53 ; -938 : douta <= 53 ; -939 : douta <= 53 ; -940 : douta <= 53 ; -941 : douta <= 53 ; -942 : douta <= 53 ; -943 : douta <= 53 ; -944 : douta <= 53 ; -945 : douta <= 53 ; -946 : douta <= 53 ; -947 : douta <= 53 ; -948 : douta <= 53 ; -949 : douta <= 53 ; -950 : douta <= 53 ; -951 : douta <= 53 ; -952 : douta <= 53 ; -953 : douta <= 53 ; -954 : douta <= 53 ; -955 : douta <= 53 ; -956 : douta <= 53 ; -957 : douta <= 53 ; -958 : douta <= 53 ; -959 : douta <= 53 ; -960 : douta <= 53 ; -961 : douta <= 53 ; -962 : douta <= 53 ; -963 : douta <= 53 ; -964 : douta <= 53 ; -965 : douta <= 53 ; -966 : douta <= 53 ; -967 : douta <= 53 ; -968 : douta <= 53 ; -969 : douta <= 53 ; -970 : douta <= 53 ; -971 : douta <= 53 ; -972 : douta <= 53 ; -973 : douta <= 53 ; -974 : douta <= 53 ; -975 : douta <= 53 ; -976 : douta <= 53 ; -977 : douta <= 53 ; -978 : douta <= 53 ; -979 : douta <= 53 ; -980 : douta <= 53 ; -981 : douta <= 53 ; -982 : douta <= 53 ; -983 : douta <= 53 ; -984 : douta <= 53 ; -985 : douta <= 53 ; -986 : douta <= 53 ; -987 : douta <= 53 ; -988 : douta <= 53 ; -989 : douta <= 53 ; -990 : douta <= 53 ; -991 : douta <= 53 ; -992 : douta <= 53 ; -993 : douta <= 53 ; -994 : douta <= 53 ; -995 : douta <= 53 ; -996 : douta <= 53 ; -997 : douta <= 53 ; -998 : douta <= 53 ; -999 : douta <= 53 ; -1000 : douta <= 53 ; -1001 : douta <= 53 ; -1002 : douta <= 53 ; -1003 : douta <= 53 ; -1004 : douta <= 53 ; -1005 : douta <= 53 ; -1006 : douta <= 53 ; -1007 : douta <= 53 ; -1008 : douta <= 53 ; -1009 : douta <= 53 ; -1010 : douta <= 53 ; -1011 : douta <= 53 ; -1012 : douta <= 53 ; -1013 : douta <= 53 ; -1014 : douta <= 53 ; -1015 : douta <= 53 ; -1016 : douta <= 53 ; -1017 : douta <= 53 ; -1018 : douta <= 53 ; -1019 : douta <= 53 ; -1020 : douta <= 53 ; -1021 : douta <= 53 ; -1022 : douta <= 53 ; -1023 : douta <= 53 ; -1024 : douta <= 53 ; -1025 : douta <= 53 ; -1026 : douta <= 53 ; -1027 : douta <= 53 ; -1028 : douta <= 53 ; -1029 : douta <= 53 ; -1030 : douta <= 53 ; -1031 : douta <= 53 ; -1032 : douta <= 53 ; -1033 : douta <= 53 ; -1034 : douta <= 53 ; -1035 : douta <= 53 ; -1036 : douta <= 53 ; -1037 : douta <= 53 ; -1038 : douta <= 53 ; -1039 : douta <= 53 ; -1040 : douta <= 53 ; -1041 : douta <= 53 ; -1042 : douta <= 53 ; -1043 : douta <= 53 ; -1044 : douta <= 53 ; -1045 : douta <= 53 ; -1046 : douta <= 53 ; -1047 : douta <= 53 ; -1048 : douta <= 53 ; -1049 : douta <= 53 ; -1050 : douta <= 53 ; -1051 : douta <= 53 ; -1052 : douta <= 53 ; -1053 : douta <= 53 ; -1054 : douta <= 53 ; -1055 : douta <= 53 ; -1056 : douta <= 53 ; -1057 : douta <= 53 ; -1058 : douta <= 53 ; -1059 : douta <= 53 ; -1060 : douta <= 53 ; -1061 : douta <= 53 ; -1062 : douta <= 53 ; -1063 : douta <= 53 ; -1064 : douta <= 53 ; -1065 : douta <= 53 ; -1066 : douta <= 53 ; -1067 : douta <= 53 ; -1068 : douta <= 53 ; -1069 : douta <= 53 ; -1070 : douta <= 53 ; -1071 : douta <= 53 ; -1072 : douta <= 53 ; -1073 : douta <= 53 ; -1074 : douta <= 53 ; -1075 : douta <= 53 ; -1076 : douta <= 53 ; -1077 : douta <= 53 ; -1078 : douta <= 53 ; -1079 : douta <= 53 ; -1080 : douta <= 53 ; -1081 : douta <= 53 ; -1082 : douta <= 53 ; -1083 : douta <= 53 ; -1084 : douta <= 53 ; -1085 : douta <= 53 ; -1086 : douta <= 53 ; -1087 : douta <= 53 ; -1088 : douta <= 53 ; -1089 : douta <= 53 ; -1090 : douta <= 53 ; -1091 : douta <= 53 ; -1092 : douta <= 53 ; -1093 : douta <= 53 ; -1094 : douta <= 53 ; -1095 : douta <= 53 ; -1096 : douta <= 53 ; -1097 : douta <= 53 ; -1098 : douta <= 53 ; -1099 : douta <= 53 ; -1100 : douta <= 53 ; -1101 : douta <= 53 ; -1102 : douta <= 53 ; -1103 : douta <= 53 ; -1104 : douta <= 53 ; -1105 : douta <= 53 ; -1106 : douta <= 53 ; -1107 : douta <= 53 ; -1108 : douta <= 53 ; -1109 : douta <= 53 ; -1110 : douta <= 53 ; -1111 : douta <= 53 ; -1112 : douta <= 53 ; -1113 : douta <= 53 ; -1114 : douta <= 53 ; -1115 : douta <= 53 ; -1116 : douta <= 53 ; -1117 : douta <= 53 ; -1118 : douta <= 53 ; -1119 : douta <= 53 ; -1120 : douta <= 53 ; -1121 : douta <= 53 ; -1122 : douta <= 53 ; -1123 : douta <= 53 ; -1124 : douta <= 53 ; -1125 : douta <= 53 ; -1126 : douta <= 53 ; -1127 : douta <= 53 ; -1128 : douta <= 53 ; -1129 : douta <= 53 ; -1130 : douta <= 53 ; -1131 : douta <= 53 ; -1132 : douta <= 53 ; -1133 : douta <= 53 ; -1134 : douta <= 53 ; -1135 : douta <= 53 ; -1136 : douta <= 53 ; -1137 : douta <= 53 ; -1138 : douta <= 53 ; -1139 : douta <= 53 ; -1140 : douta <= 53 ; -1141 : douta <= 53 ; -1142 : douta <= 53 ; -1143 : douta <= 53 ; -1144 : douta <= 53 ; -1145 : douta <= 53 ; -1146 : douta <= 53 ; -1147 : douta <= 53 ; -1148 : douta <= 53 ; -1149 : douta <= 53 ; -1150 : douta <= 53 ; -1151 : douta <= 53 ; -1152 : douta <= 53 ; -1153 : douta <= 53 ; -1154 : douta <= 53 ; -1155 : douta <= 53 ; -1156 : douta <= 53 ; -1157 : douta <= 53 ; -1158 : douta <= 53 ; -1159 : douta <= 53 ; -1160 : douta <= 53 ; -1161 : douta <= 53 ; -1162 : douta <= 53 ; -1163 : douta <= 53 ; -1164 : douta <= 53 ; -1165 : douta <= 53 ; -1166 : douta <= 53 ; -1167 : douta <= 53 ; -1168 : douta <= 53 ; -1169 : douta <= 53 ; -1170 : douta <= 53 ; -1171 : douta <= 53 ; -1172 : douta <= 53 ; -1173 : douta <= 53 ; -1174 : douta <= 53 ; -1175 : douta <= 53 ; -1176 : douta <= 53 ; -1177 : douta <= 53 ; -1178 : douta <= 53 ; -1179 : douta <= 53 ; -1180 : douta <= 53 ; -1181 : douta <= 53 ; -1182 : douta <= 53 ; -1183 : douta <= 53 ; -1184 : douta <= 53 ; -1185 : douta <= 53 ; -1186 : douta <= 53 ; -1187 : douta <= 53 ; -1188 : douta <= 53 ; -1189 : douta <= 53 ; -1190 : douta <= 53 ; -1191 : douta <= 53 ; -1192 : douta <= 53 ; -1193 : douta <= 53 ; -1194 : douta <= 53 ; -1195 : douta <= 53 ; -1196 : douta <= 53 ; -1197 : douta <= 53 ; -1198 : douta <= 53 ; -1199 : douta <= 53 ; -1200 : douta <= 53 ; -1201 : douta <= 53 ; -1202 : douta <= 53 ; -1203 : douta <= 53 ; -1204 : douta <= 53 ; -1205 : douta <= 53 ; -1206 : douta <= 53 ; -1207 : douta <= 53 ; -1208 : douta <= 53 ; -1209 : douta <= 53 ; -1210 : douta <= 53 ; -1211 : douta <= 53 ; -1212 : douta <= 53 ; -1213 : douta <= 53 ; -1214 : douta <= 53 ; -1215 : douta <= 53 ; -1216 : douta <= 53 ; -1217 : douta <= 53 ; -1218 : douta <= 53 ; -1219 : douta <= 53 ; -1220 : douta <= 53 ; -1221 : douta <= 53 ; -1222 : douta <= 53 ; -1223 : douta <= 53 ; -1224 : douta <= 53 ; -1225 : douta <= 54 ; -1226 : douta <= 54 ; -1227 : douta <= 54 ; -1228 : douta <= 54 ; -1229 : douta <= 54 ; -1230 : douta <= 54 ; -1231 : douta <= 54 ; -1232 : douta <= 54 ; -1233 : douta <= 54 ; -1234 : douta <= 54 ; -1235 : douta <= 54 ; -1236 : douta <= 54 ; -1237 : douta <= 54 ; -1238 : douta <= 54 ; -1239 : douta <= 54 ; -1240 : douta <= 54 ; -1241 : douta <= 54 ; -1242 : douta <= 54 ; -1243 : douta <= 54 ; -1244 : douta <= 54 ; -1245 : douta <= 54 ; -1246 : douta <= 54 ; -1247 : douta <= 54 ; -1248 : douta <= 54 ; -1249 : douta <= 54 ; -1250 : douta <= 54 ; -1251 : douta <= 54 ; -1252 : douta <= 54 ; -1253 : douta <= 54 ; -1254 : douta <= 54 ; -1255 : douta <= 54 ; -1256 : douta <= 54 ; -1257 : douta <= 54 ; -1258 : douta <= 54 ; -1259 : douta <= 54 ; -1260 : douta <= 54 ; -1261 : douta <= 54 ; -1262 : douta <= 54 ; -1263 : douta <= 54 ; -1264 : douta <= 54 ; -1265 : douta <= 54 ; -1266 : douta <= 54 ; -1267 : douta <= 54 ; -1268 : douta <= 54 ; -1269 : douta <= 54 ; -1270 : douta <= 54 ; -1271 : douta <= 54 ; -1272 : douta <= 54 ; -1273 : douta <= 54 ; -1274 : douta <= 54 ; -1275 : douta <= 54 ; -1276 : douta <= 54 ; -1277 : douta <= 54 ; -1278 : douta <= 54 ; -1279 : douta <= 54 ; -1280 : douta <= 54 ; -1281 : douta <= 54 ; -1282 : douta <= 54 ; -1283 : douta <= 54 ; -1284 : douta <= 54 ; -1285 : douta <= 54 ; -1286 : douta <= 54 ; -1287 : douta <= 54 ; -1288 : douta <= 54 ; -1289 : douta <= 54 ; -1290 : douta <= 54 ; -1291 : douta <= 54 ; -1292 : douta <= 54 ; -1293 : douta <= 54 ; -1294 : douta <= 54 ; -1295 : douta <= 54 ; -1296 : douta <= 54 ; -1297 : douta <= 54 ; -1298 : douta <= 54 ; -1299 : douta <= 54 ; -1300 : douta <= 54 ; -1301 : douta <= 54 ; -1302 : douta <= 54 ; -1303 : douta <= 54 ; -1304 : douta <= 54 ; -1305 : douta <= 54 ; -1306 : douta <= 54 ; -1307 : douta <= 54 ; -1308 : douta <= 54 ; -1309 : douta <= 54 ; -1310 : douta <= 54 ; -1311 : douta <= 54 ; -1312 : douta <= 54 ; -1313 : douta <= 54 ; -1314 : douta <= 54 ; -1315 : douta <= 54 ; -1316 : douta <= 54 ; -1317 : douta <= 54 ; -1318 : douta <= 54 ; -1319 : douta <= 54 ; -1320 : douta <= 54 ; -1321 : douta <= 54 ; -1322 : douta <= 54 ; -1323 : douta <= 54 ; -1324 : douta <= 54 ; -1325 : douta <= 54 ; -1326 : douta <= 54 ; -1327 : douta <= 54 ; -1328 : douta <= 54 ; -1329 : douta <= 54 ; -1330 : douta <= 54 ; -1331 : douta <= 54 ; -1332 : douta <= 54 ; -1333 : douta <= 54 ; -1334 : douta <= 54 ; -1335 : douta <= 54 ; -1336 : douta <= 54 ; -1337 : douta <= 54 ; -1338 : douta <= 54 ; -1339 : douta <= 54 ; -1340 : douta <= 54 ; -1341 : douta <= 54 ; -1342 : douta <= 54 ; -1343 : douta <= 54 ; -1344 : douta <= 54 ; -1345 : douta <= 54 ; -1346 : douta <= 54 ; -1347 : douta <= 54 ; -1348 : douta <= 54 ; -1349 : douta <= 54 ; -1350 : douta <= 54 ; -1351 : douta <= 54 ; -1352 : douta <= 54 ; -1353 : douta <= 54 ; -1354 : douta <= 54 ; -1355 : douta <= 54 ; -1356 : douta <= 54 ; -1357 : douta <= 54 ; -1358 : douta <= 54 ; -1359 : douta <= 54 ; -1360 : douta <= 54 ; -1361 : douta <= 54 ; -1362 : douta <= 54 ; -1363 : douta <= 54 ; -1364 : douta <= 54 ; -1365 : douta <= 54 ; -1366 : douta <= 54 ; -1367 : douta <= 54 ; -1368 : douta <= 54 ; -1369 : douta <= 54 ; -1370 : douta <= 54 ; -1371 : douta <= 54 ; -1372 : douta <= 54 ; -1373 : douta <= 54 ; -1374 : douta <= 54 ; -1375 : douta <= 54 ; -1376 : douta <= 54 ; -1377 : douta <= 54 ; -1378 : douta <= 54 ; -1379 : douta <= 54 ; -1380 : douta <= 54 ; -1381 : douta <= 54 ; -1382 : douta <= 54 ; -1383 : douta <= 54 ; -1384 : douta <= 54 ; -1385 : douta <= 54 ; -1386 : douta <= 54 ; -1387 : douta <= 54 ; -1388 : douta <= 54 ; -1389 : douta <= 54 ; -1390 : douta <= 54 ; -1391 : douta <= 54 ; -1392 : douta <= 54 ; -1393 : douta <= 54 ; -1394 : douta <= 54 ; -1395 : douta <= 54 ; -1396 : douta <= 54 ; -1397 : douta <= 54 ; -1398 : douta <= 54 ; -1399 : douta <= 54 ; -1400 : douta <= 54 ; -1401 : douta <= 54 ; -1402 : douta <= 54 ; -1403 : douta <= 54 ; -1404 : douta <= 54 ; -1405 : douta <= 54 ; -1406 : douta <= 54 ; -1407 : douta <= 54 ; -1408 : douta <= 54 ; -1409 : douta <= 54 ; -1410 : douta <= 54 ; -1411 : douta <= 54 ; -1412 : douta <= 54 ; -1413 : douta <= 54 ; -1414 : douta <= 54 ; -1415 : douta <= 54 ; -1416 : douta <= 54 ; -1417 : douta <= 54 ; -1418 : douta <= 54 ; -1419 : douta <= 54 ; -1420 : douta <= 54 ; -1421 : douta <= 54 ; -1422 : douta <= 54 ; -1423 : douta <= 54 ; -1424 : douta <= 54 ; -1425 : douta <= 54 ; -1426 : douta <= 54 ; -1427 : douta <= 54 ; -1428 : douta <= 54 ; -1429 : douta <= 54 ; -1430 : douta <= 54 ; -1431 : douta <= 54 ; -1432 : douta <= 54 ; -1433 : douta <= 54 ; -1434 : douta <= 54 ; -1435 : douta <= 54 ; -1436 : douta <= 54 ; -1437 : douta <= 54 ; -1438 : douta <= 54 ; -1439 : douta <= 54 ; -1440 : douta <= 54 ; -1441 : douta <= 54 ; -1442 : douta <= 54 ; -1443 : douta <= 54 ; -1444 : douta <= 54 ; -1445 : douta <= 54 ; -1446 : douta <= 54 ; -1447 : douta <= 54 ; -1448 : douta <= 54 ; -1449 : douta <= 54 ; -1450 : douta <= 54 ; -1451 : douta <= 54 ; -1452 : douta <= 54 ; -1453 : douta <= 54 ; -1454 : douta <= 54 ; -1455 : douta <= 54 ; -1456 : douta <= 54 ; -1457 : douta <= 54 ; -1458 : douta <= 54 ; -1459 : douta <= 54 ; -1460 : douta <= 54 ; -1461 : douta <= 54 ; -1462 : douta <= 54 ; -1463 : douta <= 54 ; -1464 : douta <= 54 ; -1465 : douta <= 54 ; -1466 : douta <= 54 ; -1467 : douta <= 54 ; -1468 : douta <= 54 ; -1469 : douta <= 54 ; -1470 : douta <= 54 ; -1471 : douta <= 54 ; -1472 : douta <= 54 ; -1473 : douta <= 54 ; -1474 : douta <= 54 ; -1475 : douta <= 54 ; -1476 : douta <= 54 ; -1477 : douta <= 54 ; -1478 : douta <= 54 ; -1479 : douta <= 54 ; -1480 : douta <= 54 ; -1481 : douta <= 54 ; -1482 : douta <= 54 ; -1483 : douta <= 54 ; -1484 : douta <= 54 ; -1485 : douta <= 54 ; -1486 : douta <= 54 ; -1487 : douta <= 54 ; -1488 : douta <= 54 ; -1489 : douta <= 54 ; -1490 : douta <= 54 ; -1491 : douta <= 54 ; -1492 : douta <= 54 ; -1493 : douta <= 54 ; -1494 : douta <= 54 ; -1495 : douta <= 54 ; -1496 : douta <= 54 ; -1497 : douta <= 54 ; -1498 : douta <= 54 ; -1499 : douta <= 54 ; -1500 : douta <= 54 ; -1501 : douta <= 54 ; -1502 : douta <= 54 ; -1503 : douta <= 54 ; -1504 : douta <= 54 ; -1505 : douta <= 54 ; -1506 : douta <= 54 ; -1507 : douta <= 54 ; -1508 : douta <= 54 ; -1509 : douta <= 54 ; -1510 : douta <= 54 ; -1511 : douta <= 54 ; -1512 : douta <= 54 ; -1513 : douta <= 54 ; -1514 : douta <= 54 ; -1515 : douta <= 54 ; -1516 : douta <= 54 ; -1517 : douta <= 54 ; -1518 : douta <= 54 ; -1519 : douta <= 54 ; -1520 : douta <= 54 ; -1521 : douta <= 54 ; -1522 : douta <= 54 ; -1523 : douta <= 54 ; -1524 : douta <= 54 ; -1525 : douta <= 54 ; -1526 : douta <= 54 ; -1527 : douta <= 54 ; -1528 : douta <= 54 ; -1529 : douta <= 54 ; -1530 : douta <= 54 ; -1531 : douta <= 54 ; -1532 : douta <= 54 ; -1533 : douta <= 54 ; -1534 : douta <= 54 ; -1535 : douta <= 54 ; -1536 : douta <= 54 ; -1537 : douta <= 54 ; -1538 : douta <= 54 ; -1539 : douta <= 54 ; -1540 : douta <= 54 ; -1541 : douta <= 54 ; -1542 : douta <= 54 ; -1543 : douta <= 54 ; -1544 : douta <= 54 ; -1545 : douta <= 54 ; -1546 : douta <= 54 ; -1547 : douta <= 54 ; -1548 : douta <= 54 ; -1549 : douta <= 54 ; -1550 : douta <= 54 ; -1551 : douta <= 54 ; -1552 : douta <= 54 ; -1553 : douta <= 54 ; -1554 : douta <= 54 ; -1555 : douta <= 54 ; -1556 : douta <= 54 ; -1557 : douta <= 54 ; -1558 : douta <= 54 ; -1559 : douta <= 54 ; -1560 : douta <= 54 ; -1561 : douta <= 54 ; -1562 : douta <= 54 ; -1563 : douta <= 54 ; -1564 : douta <= 54 ; -1565 : douta <= 54 ; -1566 : douta <= 54 ; -1567 : douta <= 54 ; -1568 : douta <= 54 ; -1569 : douta <= 54 ; -1570 : douta <= 54 ; -1571 : douta <= 54 ; -1572 : douta <= 54 ; -1573 : douta <= 54 ; -1574 : douta <= 54 ; -1575 : douta <= 54 ; -1576 : douta <= 54 ; -1577 : douta <= 54 ; -1578 : douta <= 54 ; -1579 : douta <= 54 ; -1580 : douta <= 54 ; -1581 : douta <= 54 ; -1582 : douta <= 54 ; -1583 : douta <= 54 ; -1584 : douta <= 54 ; -1585 : douta <= 54 ; -1586 : douta <= 54 ; -1587 : douta <= 54 ; -1588 : douta <= 54 ; -1589 : douta <= 54 ; -1590 : douta <= 54 ; -1591 : douta <= 54 ; -1592 : douta <= 54 ; -1593 : douta <= 54 ; -1594 : douta <= 54 ; -1595 : douta <= 54 ; -1596 : douta <= 54 ; -1597 : douta <= 54 ; -1598 : douta <= 54 ; -1599 : douta <= 54 ; -1600 : douta <= 54 ; -1601 : douta <= 54 ; -1602 : douta <= 54 ; -1603 : douta <= 54 ; -1604 : douta <= 54 ; -1605 : douta <= 54 ; -1606 : douta <= 54 ; -1607 : douta <= 54 ; -1608 : douta <= 54 ; -1609 : douta <= 54 ; -1610 : douta <= 54 ; -1611 : douta <= 54 ; -1612 : douta <= 54 ; -1613 : douta <= 54 ; -1614 : douta <= 54 ; -1615 : douta <= 54 ; -1616 : douta <= 54 ; -1617 : douta <= 54 ; -1618 : douta <= 54 ; -1619 : douta <= 54 ; -1620 : douta <= 54 ; -1621 : douta <= 54 ; -1622 : douta <= 54 ; -1623 : douta <= 54 ; -1624 : douta <= 54 ; -1625 : douta <= 55 ; -1626 : douta <= 55 ; -1627 : douta <= 55 ; -1628 : douta <= 55 ; -1629 : douta <= 55 ; -1630 : douta <= 55 ; -1631 : douta <= 55 ; -1632 : douta <= 55 ; -1633 : douta <= 55 ; -1634 : douta <= 55 ; -1635 : douta <= 55 ; -1636 : douta <= 55 ; -1637 : douta <= 55 ; -1638 : douta <= 55 ; -1639 : douta <= 55 ; -1640 : douta <= 55 ; -1641 : douta <= 55 ; -1642 : douta <= 55 ; -1643 : douta <= 55 ; -1644 : douta <= 55 ; -1645 : douta <= 55 ; -1646 : douta <= 55 ; -1647 : douta <= 55 ; -1648 : douta <= 55 ; -1649 : douta <= 55 ; -1650 : douta <= 55 ; -1651 : douta <= 55 ; -1652 : douta <= 55 ; -1653 : douta <= 55 ; -1654 : douta <= 55 ; -1655 : douta <= 55 ; -1656 : douta <= 55 ; -1657 : douta <= 55 ; -1658 : douta <= 55 ; -1659 : douta <= 55 ; -1660 : douta <= 55 ; -1661 : douta <= 55 ; -1662 : douta <= 55 ; -1663 : douta <= 55 ; -1664 : douta <= 55 ; -1665 : douta <= 55 ; -1666 : douta <= 55 ; -1667 : douta <= 55 ; -1668 : douta <= 55 ; -1669 : douta <= 55 ; -1670 : douta <= 55 ; -1671 : douta <= 55 ; -1672 : douta <= 55 ; -1673 : douta <= 55 ; -1674 : douta <= 55 ; -1675 : douta <= 55 ; -1676 : douta <= 55 ; -1677 : douta <= 55 ; -1678 : douta <= 55 ; -1679 : douta <= 55 ; -1680 : douta <= 55 ; -1681 : douta <= 55 ; -1682 : douta <= 55 ; -1683 : douta <= 55 ; -1684 : douta <= 55 ; -1685 : douta <= 55 ; -1686 : douta <= 55 ; -1687 : douta <= 55 ; -1688 : douta <= 55 ; -1689 : douta <= 55 ; -1690 : douta <= 55 ; -1691 : douta <= 55 ; -1692 : douta <= 55 ; -1693 : douta <= 55 ; -1694 : douta <= 55 ; -1695 : douta <= 55 ; -1696 : douta <= 55 ; -1697 : douta <= 55 ; -1698 : douta <= 55 ; -1699 : douta <= 55 ; -1700 : douta <= 55 ; -1701 : douta <= 55 ; -1702 : douta <= 55 ; -1703 : douta <= 55 ; -1704 : douta <= 55 ; -1705 : douta <= 55 ; -1706 : douta <= 55 ; -1707 : douta <= 55 ; -1708 : douta <= 55 ; -1709 : douta <= 55 ; -1710 : douta <= 55 ; -1711 : douta <= 55 ; -1712 : douta <= 55 ; -1713 : douta <= 55 ; -1714 : douta <= 55 ; -1715 : douta <= 55 ; -1716 : douta <= 55 ; -1717 : douta <= 55 ; -1718 : douta <= 55 ; -1719 : douta <= 55 ; -1720 : douta <= 55 ; -1721 : douta <= 55 ; -1722 : douta <= 55 ; -1723 : douta <= 55 ; -1724 : douta <= 55 ; -1725 : douta <= 55 ; -1726 : douta <= 55 ; -1727 : douta <= 55 ; -1728 : douta <= 55 ; -1729 : douta <= 55 ; -1730 : douta <= 55 ; -1731 : douta <= 55 ; -1732 : douta <= 55 ; -1733 : douta <= 55 ; -1734 : douta <= 55 ; -1735 : douta <= 55 ; -1736 : douta <= 55 ; -1737 : douta <= 55 ; -1738 : douta <= 55 ; -1739 : douta <= 55 ; -1740 : douta <= 55 ; -1741 : douta <= 55 ; -1742 : douta <= 55 ; -1743 : douta <= 55 ; -1744 : douta <= 55 ; -1745 : douta <= 55 ; -1746 : douta <= 55 ; -1747 : douta <= 55 ; -1748 : douta <= 55 ; -1749 : douta <= 55 ; -1750 : douta <= 55 ; -1751 : douta <= 55 ; -1752 : douta <= 55 ; -1753 : douta <= 55 ; -1754 : douta <= 55 ; -1755 : douta <= 55 ; -1756 : douta <= 55 ; -1757 : douta <= 55 ; -1758 : douta <= 55 ; -1759 : douta <= 55 ; -1760 : douta <= 55 ; -1761 : douta <= 55 ; -1762 : douta <= 55 ; -1763 : douta <= 55 ; -1764 : douta <= 55 ; -1765 : douta <= 55 ; -1766 : douta <= 55 ; -1767 : douta <= 55 ; -1768 : douta <= 55 ; -1769 : douta <= 55 ; -1770 : douta <= 55 ; -1771 : douta <= 55 ; -1772 : douta <= 55 ; -1773 : douta <= 55 ; -1774 : douta <= 55 ; -1775 : douta <= 55 ; -1776 : douta <= 55 ; -1777 : douta <= 55 ; -1778 : douta <= 55 ; -1779 : douta <= 55 ; -1780 : douta <= 55 ; -1781 : douta <= 55 ; -1782 : douta <= 55 ; -1783 : douta <= 55 ; -1784 : douta <= 55 ; -1785 : douta <= 55 ; -1786 : douta <= 55 ; -1787 : douta <= 55 ; -1788 : douta <= 55 ; -1789 : douta <= 55 ; -1790 : douta <= 55 ; -1791 : douta <= 55 ; -1792 : douta <= 55 ; -1793 : douta <= 55 ; -1794 : douta <= 55 ; -1795 : douta <= 55 ; -1796 : douta <= 55 ; -1797 : douta <= 55 ; -1798 : douta <= 55 ; -1799 : douta <= 55 ; -1800 : douta <= 55 ; -1801 : douta <= 55 ; -1802 : douta <= 55 ; -1803 : douta <= 55 ; -1804 : douta <= 55 ; -1805 : douta <= 55 ; -1806 : douta <= 55 ; -1807 : douta <= 55 ; -1808 : douta <= 55 ; -1809 : douta <= 55 ; -1810 : douta <= 55 ; -1811 : douta <= 55 ; -1812 : douta <= 55 ; -1813 : douta <= 55 ; -1814 : douta <= 55 ; -1815 : douta <= 55 ; -1816 : douta <= 55 ; -1817 : douta <= 55 ; -1818 : douta <= 55 ; -1819 : douta <= 55 ; -1820 : douta <= 55 ; -1821 : douta <= 55 ; -1822 : douta <= 55 ; -1823 : douta <= 55 ; -1824 : douta <= 55 ; -1825 : douta <= 55 ; -1826 : douta <= 55 ; -1827 : douta <= 55 ; -1828 : douta <= 55 ; -1829 : douta <= 55 ; -1830 : douta <= 55 ; -1831 : douta <= 55 ; -1832 : douta <= 55 ; -1833 : douta <= 55 ; -1834 : douta <= 55 ; -1835 : douta <= 55 ; -1836 : douta <= 55 ; -1837 : douta <= 55 ; -1838 : douta <= 55 ; -1839 : douta <= 55 ; -1840 : douta <= 55 ; -1841 : douta <= 55 ; -1842 : douta <= 55 ; -1843 : douta <= 55 ; -1844 : douta <= 55 ; -1845 : douta <= 55 ; -1846 : douta <= 55 ; -1847 : douta <= 55 ; -1848 : douta <= 55 ; -1849 : douta <= 55 ; -1850 : douta <= 55 ; -1851 : douta <= 55 ; -1852 : douta <= 55 ; -1853 : douta <= 55 ; -1854 : douta <= 55 ; -1855 : douta <= 55 ; -1856 : douta <= 55 ; -1857 : douta <= 55 ; -1858 : douta <= 55 ; -1859 : douta <= 55 ; -1860 : douta <= 55 ; -1861 : douta <= 55 ; -1862 : douta <= 55 ; -1863 : douta <= 55 ; -1864 : douta <= 55 ; -1865 : douta <= 55 ; -1866 : douta <= 55 ; -1867 : douta <= 55 ; -1868 : douta <= 55 ; -1869 : douta <= 55 ; -1870 : douta <= 55 ; -1871 : douta <= 55 ; -1872 : douta <= 55 ; -1873 : douta <= 55 ; -1874 : douta <= 55 ; -1875 : douta <= 55 ; -1876 : douta <= 55 ; -1877 : douta <= 55 ; -1878 : douta <= 55 ; -1879 : douta <= 55 ; -1880 : douta <= 55 ; -1881 : douta <= 55 ; -1882 : douta <= 55 ; -1883 : douta <= 55 ; -1884 : douta <= 55 ; -1885 : douta <= 55 ; -1886 : douta <= 55 ; -1887 : douta <= 55 ; -1888 : douta <= 55 ; -1889 : douta <= 55 ; -1890 : douta <= 55 ; -1891 : douta <= 55 ; -1892 : douta <= 55 ; -1893 : douta <= 55 ; -1894 : douta <= 55 ; -1895 : douta <= 55 ; -1896 : douta <= 55 ; -1897 : douta <= 55 ; -1898 : douta <= 55 ; -1899 : douta <= 55 ; -1900 : douta <= 55 ; -1901 : douta <= 55 ; -1902 : douta <= 55 ; -1903 : douta <= 55 ; -1904 : douta <= 55 ; -1905 : douta <= 55 ; -1906 : douta <= 55 ; -1907 : douta <= 55 ; -1908 : douta <= 55 ; -1909 : douta <= 55 ; -1910 : douta <= 55 ; -1911 : douta <= 55 ; -1912 : douta <= 55 ; -1913 : douta <= 55 ; -1914 : douta <= 55 ; -1915 : douta <= 55 ; -1916 : douta <= 55 ; -1917 : douta <= 55 ; -1918 : douta <= 55 ; -1919 : douta <= 55 ; -1920 : douta <= 55 ; -1921 : douta <= 55 ; -1922 : douta <= 55 ; -1923 : douta <= 55 ; -1924 : douta <= 55 ; -1925 : douta <= 55 ; -1926 : douta <= 55 ; -1927 : douta <= 55 ; -1928 : douta <= 55 ; -1929 : douta <= 55 ; -1930 : douta <= 55 ; -1931 : douta <= 55 ; -1932 : douta <= 55 ; -1933 : douta <= 55 ; -1934 : douta <= 55 ; -1935 : douta <= 55 ; -1936 : douta <= 55 ; -1937 : douta <= 55 ; -1938 : douta <= 55 ; -1939 : douta <= 55 ; -1940 : douta <= 55 ; -1941 : douta <= 55 ; -1942 : douta <= 55 ; -1943 : douta <= 55 ; -1944 : douta <= 55 ; -1945 : douta <= 55 ; -1946 : douta <= 55 ; -1947 : douta <= 55 ; -1948 : douta <= 55 ; -1949 : douta <= 55 ; -1950 : douta <= 55 ; -1951 : douta <= 55 ; -1952 : douta <= 55 ; -1953 : douta <= 55 ; -1954 : douta <= 55 ; -1955 : douta <= 55 ; -1956 : douta <= 55 ; -1957 : douta <= 55 ; -1958 : douta <= 55 ; -1959 : douta <= 55 ; -1960 : douta <= 55 ; -1961 : douta <= 55 ; -1962 : douta <= 55 ; -1963 : douta <= 55 ; -1964 : douta <= 55 ; -1965 : douta <= 55 ; -1966 : douta <= 55 ; -1967 : douta <= 55 ; -1968 : douta <= 55 ; -1969 : douta <= 55 ; -1970 : douta <= 55 ; -1971 : douta <= 55 ; -1972 : douta <= 55 ; -1973 : douta <= 55 ; -1974 : douta <= 55 ; -1975 : douta <= 55 ; -1976 : douta <= 55 ; -1977 : douta <= 55 ; -1978 : douta <= 55 ; -1979 : douta <= 55 ; -1980 : douta <= 55 ; -1981 : douta <= 55 ; -1982 : douta <= 55 ; -1983 : douta <= 55 ; -1984 : douta <= 55 ; -1985 : douta <= 55 ; -1986 : douta <= 55 ; -1987 : douta <= 55 ; -1988 : douta <= 55 ; -1989 : douta <= 55 ; -1990 : douta <= 55 ; -1991 : douta <= 55 ; -1992 : douta <= 55 ; -1993 : douta <= 55 ; -1994 : douta <= 55 ; -1995 : douta <= 55 ; -1996 : douta <= 55 ; -1997 : douta <= 55 ; -1998 : douta <= 55 ; -1999 : douta <= 55 ; -2000 : douta <= 55 ; -2001 : douta <= 55 ; -2002 : douta <= 55 ; -2003 : douta <= 55 ; -2004 : douta <= 55 ; -2005 : douta <= 55 ; -2006 : douta <= 55 ; -2007 : douta <= 55 ; -2008 : douta <= 55 ; -2009 : douta <= 55 ; -2010 : douta <= 55 ; -2011 : douta <= 55 ; -2012 : douta <= 55 ; -2013 : douta <= 55 ; -2014 : douta <= 55 ; -2015 : douta <= 55 ; -2016 : douta <= 55 ; -2017 : douta <= 55 ; -2018 : douta <= 55 ; -2019 : douta <= 55 ; -2020 : douta <= 55 ; -2021 : douta <= 55 ; -2022 : douta <= 55 ; -2023 : douta <= 55 ; -2024 : douta <= 55 ; -2025 : douta <= 56 ; -2026 : douta <= 56 ; -2027 : douta <= 56 ; -2028 : douta <= 56 ; -2029 : douta <= 56 ; -2030 : douta <= 56 ; -2031 : douta <= 56 ; -2032 : douta <= 56 ; -2033 : douta <= 56 ; -2034 : douta <= 56 ; -2035 : douta <= 56 ; -2036 : douta <= 56 ; -2037 : douta <= 56 ; -2038 : douta <= 56 ; -2039 : douta <= 56 ; -2040 : douta <= 56 ; -2041 : douta <= 56 ; -2042 : douta <= 56 ; -2043 : douta <= 56 ; -2044 : douta <= 56 ; -2045 : douta <= 56 ; -2046 : douta <= 56 ; -2047 : douta <= 56 ; -2048 : douta <= 56 ; -2049 : douta <= 56 ; -2050 : douta <= 56 ; -2051 : douta <= 56 ; -2052 : douta <= 56 ; -2053 : douta <= 56 ; -2054 : douta <= 56 ; -2055 : douta <= 56 ; -2056 : douta <= 56 ; -2057 : douta <= 56 ; -2058 : douta <= 56 ; -2059 : douta <= 56 ; -2060 : douta <= 56 ; -2061 : douta <= 56 ; -2062 : douta <= 56 ; -2063 : douta <= 56 ; -2064 : douta <= 56 ; -2065 : douta <= 56 ; -2066 : douta <= 56 ; -2067 : douta <= 56 ; -2068 : douta <= 56 ; -2069 : douta <= 56 ; -2070 : douta <= 56 ; -2071 : douta <= 56 ; -2072 : douta <= 56 ; -2073 : douta <= 56 ; -2074 : douta <= 56 ; -2075 : douta <= 56 ; -2076 : douta <= 56 ; -2077 : douta <= 56 ; -2078 : douta <= 56 ; -2079 : douta <= 56 ; -2080 : douta <= 56 ; -2081 : douta <= 56 ; -2082 : douta <= 56 ; -2083 : douta <= 56 ; -2084 : douta <= 56 ; -2085 : douta <= 56 ; -2086 : douta <= 56 ; -2087 : douta <= 56 ; -2088 : douta <= 56 ; -2089 : douta <= 56 ; -2090 : douta <= 56 ; -2091 : douta <= 56 ; -2092 : douta <= 56 ; -2093 : douta <= 56 ; -2094 : douta <= 56 ; -2095 : douta <= 56 ; -2096 : douta <= 56 ; -2097 : douta <= 56 ; -2098 : douta <= 56 ; -2099 : douta <= 56 ; -2100 : douta <= 56 ; -2101 : douta <= 56 ; -2102 : douta <= 56 ; -2103 : douta <= 56 ; -2104 : douta <= 56 ; -2105 : douta <= 56 ; -2106 : douta <= 56 ; -2107 : douta <= 56 ; -2108 : douta <= 56 ; -2109 : douta <= 56 ; -2110 : douta <= 56 ; -2111 : douta <= 56 ; -2112 : douta <= 56 ; -2113 : douta <= 56 ; -2114 : douta <= 56 ; -2115 : douta <= 56 ; -2116 : douta <= 56 ; -2117 : douta <= 56 ; -2118 : douta <= 56 ; -2119 : douta <= 56 ; -2120 : douta <= 56 ; -2121 : douta <= 56 ; -2122 : douta <= 56 ; -2123 : douta <= 56 ; -2124 : douta <= 56 ; -2125 : douta <= 56 ; -2126 : douta <= 56 ; -2127 : douta <= 56 ; -2128 : douta <= 56 ; -2129 : douta <= 56 ; -2130 : douta <= 56 ; -2131 : douta <= 56 ; -2132 : douta <= 56 ; -2133 : douta <= 56 ; -2134 : douta <= 56 ; -2135 : douta <= 56 ; -2136 : douta <= 56 ; -2137 : douta <= 56 ; -2138 : douta <= 56 ; -2139 : douta <= 56 ; -2140 : douta <= 56 ; -2141 : douta <= 56 ; -2142 : douta <= 56 ; -2143 : douta <= 56 ; -2144 : douta <= 56 ; -2145 : douta <= 56 ; -2146 : douta <= 56 ; -2147 : douta <= 56 ; -2148 : douta <= 56 ; -2149 : douta <= 56 ; -2150 : douta <= 56 ; -2151 : douta <= 56 ; -2152 : douta <= 56 ; -2153 : douta <= 56 ; -2154 : douta <= 56 ; -2155 : douta <= 56 ; -2156 : douta <= 56 ; -2157 : douta <= 56 ; -2158 : douta <= 56 ; -2159 : douta <= 56 ; -2160 : douta <= 56 ; -2161 : douta <= 56 ; -2162 : douta <= 56 ; -2163 : douta <= 56 ; -2164 : douta <= 56 ; -2165 : douta <= 56 ; -2166 : douta <= 56 ; -2167 : douta <= 56 ; -2168 : douta <= 56 ; -2169 : douta <= 56 ; -2170 : douta <= 56 ; -2171 : douta <= 56 ; -2172 : douta <= 56 ; -2173 : douta <= 56 ; -2174 : douta <= 56 ; -2175 : douta <= 56 ; -2176 : douta <= 56 ; -2177 : douta <= 56 ; -2178 : douta <= 56 ; -2179 : douta <= 56 ; -2180 : douta <= 56 ; -2181 : douta <= 56 ; -2182 : douta <= 56 ; -2183 : douta <= 56 ; -2184 : douta <= 56 ; -2185 : douta <= 56 ; -2186 : douta <= 56 ; -2187 : douta <= 56 ; -2188 : douta <= 56 ; -2189 : douta <= 56 ; -2190 : douta <= 56 ; -2191 : douta <= 56 ; -2192 : douta <= 56 ; -2193 : douta <= 56 ; -2194 : douta <= 56 ; -2195 : douta <= 56 ; -2196 : douta <= 56 ; -2197 : douta <= 56 ; -2198 : douta <= 56 ; -2199 : douta <= 56 ; -2200 : douta <= 56 ; -2201 : douta <= 56 ; -2202 : douta <= 56 ; -2203 : douta <= 56 ; -2204 : douta <= 56 ; -2205 : douta <= 56 ; -2206 : douta <= 56 ; -2207 : douta <= 56 ; -2208 : douta <= 56 ; -2209 : douta <= 56 ; -2210 : douta <= 56 ; -2211 : douta <= 56 ; -2212 : douta <= 56 ; -2213 : douta <= 56 ; -2214 : douta <= 56 ; -2215 : douta <= 56 ; -2216 : douta <= 56 ; -2217 : douta <= 56 ; -2218 : douta <= 56 ; -2219 : douta <= 56 ; -2220 : douta <= 56 ; -2221 : douta <= 56 ; -2222 : douta <= 56 ; -2223 : douta <= 56 ; -2224 : douta <= 56 ; -2225 : douta <= 56 ; -2226 : douta <= 56 ; -2227 : douta <= 56 ; -2228 : douta <= 56 ; -2229 : douta <= 56 ; -2230 : douta <= 56 ; -2231 : douta <= 56 ; -2232 : douta <= 56 ; -2233 : douta <= 56 ; -2234 : douta <= 56 ; -2235 : douta <= 56 ; -2236 : douta <= 56 ; -2237 : douta <= 56 ; -2238 : douta <= 56 ; -2239 : douta <= 56 ; -2240 : douta <= 56 ; -2241 : douta <= 56 ; -2242 : douta <= 56 ; -2243 : douta <= 56 ; -2244 : douta <= 56 ; -2245 : douta <= 56 ; -2246 : douta <= 56 ; -2247 : douta <= 56 ; -2248 : douta <= 56 ; -2249 : douta <= 56 ; -2250 : douta <= 56 ; -2251 : douta <= 56 ; -2252 : douta <= 56 ; -2253 : douta <= 56 ; -2254 : douta <= 56 ; -2255 : douta <= 56 ; -2256 : douta <= 56 ; -2257 : douta <= 56 ; -2258 : douta <= 56 ; -2259 : douta <= 56 ; -2260 : douta <= 56 ; -2261 : douta <= 56 ; -2262 : douta <= 56 ; -2263 : douta <= 56 ; -2264 : douta <= 56 ; -2265 : douta <= 56 ; -2266 : douta <= 56 ; -2267 : douta <= 56 ; -2268 : douta <= 56 ; -2269 : douta <= 56 ; -2270 : douta <= 56 ; -2271 : douta <= 56 ; -2272 : douta <= 56 ; -2273 : douta <= 56 ; -2274 : douta <= 56 ; -2275 : douta <= 56 ; -2276 : douta <= 56 ; -2277 : douta <= 56 ; -2278 : douta <= 56 ; -2279 : douta <= 56 ; -2280 : douta <= 56 ; -2281 : douta <= 56 ; -2282 : douta <= 56 ; -2283 : douta <= 56 ; -2284 : douta <= 56 ; -2285 : douta <= 56 ; -2286 : douta <= 56 ; -2287 : douta <= 56 ; -2288 : douta <= 56 ; -2289 : douta <= 56 ; -2290 : douta <= 56 ; -2291 : douta <= 56 ; -2292 : douta <= 56 ; -2293 : douta <= 56 ; -2294 : douta <= 56 ; -2295 : douta <= 56 ; -2296 : douta <= 56 ; -2297 : douta <= 56 ; -2298 : douta <= 56 ; -2299 : douta <= 56 ; -2300 : douta <= 56 ; -2301 : douta <= 56 ; -2302 : douta <= 56 ; -2303 : douta <= 56 ; -2304 : douta <= 56 ; -2305 : douta <= 56 ; -2306 : douta <= 56 ; -2307 : douta <= 56 ; -2308 : douta <= 56 ; -2309 : douta <= 56 ; -2310 : douta <= 56 ; -2311 : douta <= 56 ; -2312 : douta <= 56 ; -2313 : douta <= 56 ; -2314 : douta <= 56 ; -2315 : douta <= 56 ; -2316 : douta <= 56 ; -2317 : douta <= 56 ; -2318 : douta <= 56 ; -2319 : douta <= 56 ; -2320 : douta <= 56 ; -2321 : douta <= 56 ; -2322 : douta <= 56 ; -2323 : douta <= 56 ; -2324 : douta <= 56 ; -2325 : douta <= 56 ; -2326 : douta <= 56 ; -2327 : douta <= 56 ; -2328 : douta <= 56 ; -2329 : douta <= 56 ; -2330 : douta <= 56 ; -2331 : douta <= 56 ; -2332 : douta <= 56 ; -2333 : douta <= 56 ; -2334 : douta <= 56 ; -2335 : douta <= 56 ; -2336 : douta <= 56 ; -2337 : douta <= 56 ; -2338 : douta <= 56 ; -2339 : douta <= 56 ; -2340 : douta <= 56 ; -2341 : douta <= 56 ; -2342 : douta <= 56 ; -2343 : douta <= 56 ; -2344 : douta <= 56 ; -2345 : douta <= 56 ; -2346 : douta <= 56 ; -2347 : douta <= 56 ; -2348 : douta <= 56 ; -2349 : douta <= 56 ; -2350 : douta <= 56 ; -2351 : douta <= 56 ; -2352 : douta <= 56 ; -2353 : douta <= 56 ; -2354 : douta <= 56 ; -2355 : douta <= 56 ; -2356 : douta <= 56 ; -2357 : douta <= 56 ; -2358 : douta <= 56 ; -2359 : douta <= 56 ; -2360 : douta <= 56 ; -2361 : douta <= 56 ; -2362 : douta <= 56 ; -2363 : douta <= 56 ; -2364 : douta <= 56 ; -2365 : douta <= 56 ; -2366 : douta <= 56 ; -2367 : douta <= 56 ; -2368 : douta <= 56 ; -2369 : douta <= 56 ; -2370 : douta <= 56 ; -2371 : douta <= 56 ; -2372 : douta <= 56 ; -2373 : douta <= 56 ; -2374 : douta <= 56 ; -2375 : douta <= 56 ; -2376 : douta <= 56 ; -2377 : douta <= 56 ; -2378 : douta <= 56 ; -2379 : douta <= 56 ; -2380 : douta <= 56 ; -2381 : douta <= 56 ; -2382 : douta <= 56 ; -2383 : douta <= 56 ; -2384 : douta <= 56 ; -2385 : douta <= 56 ; -2386 : douta <= 56 ; -2387 : douta <= 56 ; -2388 : douta <= 56 ; -2389 : douta <= 56 ; -2390 : douta <= 56 ; -2391 : douta <= 56 ; -2392 : douta <= 56 ; -2393 : douta <= 56 ; -2394 : douta <= 56 ; -2395 : douta <= 56 ; -2396 : douta <= 56 ; -2397 : douta <= 56 ; -2398 : douta <= 56 ; -2399 : douta <= 56 ; -2400 : douta <= 56 ; -2401 : douta <= 56 ; -2402 : douta <= 56 ; -2403 : douta <= 56 ; -2404 : douta <= 56 ; -2405 : douta <= 56 ; -2406 : douta <= 56 ; -2407 : douta <= 56 ; -2408 : douta <= 56 ; -2409 : douta <= 56 ; -2410 : douta <= 56 ; -2411 : douta <= 56 ; -2412 : douta <= 56 ; -2413 : douta <= 56 ; -2414 : douta <= 56 ; -2415 : douta <= 56 ; -2416 : douta <= 56 ; -2417 : douta <= 56 ; -2418 : douta <= 56 ; -2419 : douta <= 56 ; -2420 : douta <= 56 ; -2421 : douta <= 56 ; -2422 : douta <= 56 ; -2423 : douta <= 56 ; -2424 : douta <= 56 ; -2425 : douta <= 57 ; -2426 : douta <= 57 ; -2427 : douta <= 57 ; -2428 : douta <= 57 ; -2429 : douta <= 57 ; -2430 : douta <= 57 ; -2431 : douta <= 57 ; -2432 : douta <= 57 ; -2433 : douta <= 57 ; -2434 : douta <= 57 ; -2435 : douta <= 57 ; -2436 : douta <= 57 ; -2437 : douta <= 57 ; -2438 : douta <= 57 ; -2439 : douta <= 57 ; -2440 : douta <= 57 ; -2441 : douta <= 57 ; -2442 : douta <= 57 ; -2443 : douta <= 57 ; -2444 : douta <= 57 ; -2445 : douta <= 57 ; -2446 : douta <= 57 ; -2447 : douta <= 57 ; -2448 : douta <= 57 ; -2449 : douta <= 57 ; -2450 : douta <= 57 ; -2451 : douta <= 57 ; -2452 : douta <= 57 ; -2453 : douta <= 57 ; -2454 : douta <= 57 ; -2455 : douta <= 57 ; -2456 : douta <= 57 ; -2457 : douta <= 57 ; -2458 : douta <= 57 ; -2459 : douta <= 57 ; -2460 : douta <= 57 ; -2461 : douta <= 57 ; -2462 : douta <= 57 ; -2463 : douta <= 57 ; -2464 : douta <= 57 ; -2465 : douta <= 57 ; -2466 : douta <= 57 ; -2467 : douta <= 57 ; -2468 : douta <= 57 ; -2469 : douta <= 57 ; -2470 : douta <= 57 ; -2471 : douta <= 57 ; -2472 : douta <= 57 ; -2473 : douta <= 57 ; -2474 : douta <= 57 ; -2475 : douta <= 57 ; -2476 : douta <= 57 ; -2477 : douta <= 57 ; -2478 : douta <= 57 ; -2479 : douta <= 57 ; -2480 : douta <= 57 ; -2481 : douta <= 57 ; -2482 : douta <= 57 ; -2483 : douta <= 57 ; -2484 : douta <= 57 ; -2485 : douta <= 57 ; -2486 : douta <= 57 ; -2487 : douta <= 57 ; -2488 : douta <= 57 ; -2489 : douta <= 57 ; -2490 : douta <= 57 ; -2491 : douta <= 57 ; -2492 : douta <= 57 ; -2493 : douta <= 57 ; -2494 : douta <= 57 ; -2495 : douta <= 57 ; -2496 : douta <= 57 ; -2497 : douta <= 57 ; -2498 : douta <= 57 ; -2499 : douta <= 57 ; -2500 : douta <= 57 ; -2501 : douta <= 57 ; -2502 : douta <= 57 ; -2503 : douta <= 57 ; -2504 : douta <= 57 ; -2505 : douta <= 57 ; -2506 : douta <= 57 ; -2507 : douta <= 57 ; -2508 : douta <= 57 ; -2509 : douta <= 57 ; -2510 : douta <= 57 ; -2511 : douta <= 57 ; -2512 : douta <= 57 ; -2513 : douta <= 57 ; -2514 : douta <= 57 ; -2515 : douta <= 57 ; -2516 : douta <= 57 ; -2517 : douta <= 57 ; -2518 : douta <= 57 ; -2519 : douta <= 57 ; -2520 : douta <= 57 ; -2521 : douta <= 57 ; -2522 : douta <= 57 ; -2523 : douta <= 57 ; -2524 : douta <= 57 ; -2525 : douta <= 57 ; -2526 : douta <= 57 ; -2527 : douta <= 57 ; -2528 : douta <= 57 ; -2529 : douta <= 57 ; -2530 : douta <= 57 ; -2531 : douta <= 57 ; -2532 : douta <= 57 ; -2533 : douta <= 57 ; -2534 : douta <= 57 ; -2535 : douta <= 57 ; -2536 : douta <= 57 ; -2537 : douta <= 57 ; -2538 : douta <= 57 ; -2539 : douta <= 57 ; -2540 : douta <= 57 ; -2541 : douta <= 57 ; -2542 : douta <= 57 ; -2543 : douta <= 57 ; -2544 : douta <= 57 ; -2545 : douta <= 57 ; -2546 : douta <= 57 ; -2547 : douta <= 57 ; -2548 : douta <= 57 ; -2549 : douta <= 57 ; -2550 : douta <= 57 ; -2551 : douta <= 57 ; -2552 : douta <= 57 ; -2553 : douta <= 57 ; -2554 : douta <= 57 ; -2555 : douta <= 57 ; -2556 : douta <= 57 ; -2557 : douta <= 57 ; -2558 : douta <= 57 ; -2559 : douta <= 57 ; -2560 : douta <= 57 ; -2561 : douta <= 57 ; -2562 : douta <= 57 ; -2563 : douta <= 57 ; -2564 : douta <= 57 ; -2565 : douta <= 57 ; -2566 : douta <= 57 ; -2567 : douta <= 57 ; -2568 : douta <= 57 ; -2569 : douta <= 57 ; -2570 : douta <= 57 ; -2571 : douta <= 57 ; -2572 : douta <= 57 ; -2573 : douta <= 57 ; -2574 : douta <= 57 ; -2575 : douta <= 57 ; -2576 : douta <= 57 ; -2577 : douta <= 57 ; -2578 : douta <= 57 ; -2579 : douta <= 57 ; -2580 : douta <= 57 ; -2581 : douta <= 57 ; -2582 : douta <= 57 ; -2583 : douta <= 57 ; -2584 : douta <= 57 ; -2585 : douta <= 57 ; -2586 : douta <= 57 ; -2587 : douta <= 57 ; -2588 : douta <= 57 ; -2589 : douta <= 57 ; -2590 : douta <= 57 ; -2591 : douta <= 57 ; -2592 : douta <= 57 ; -2593 : douta <= 57 ; -2594 : douta <= 57 ; -2595 : douta <= 57 ; -2596 : douta <= 57 ; -2597 : douta <= 57 ; -2598 : douta <= 57 ; -2599 : douta <= 57 ; -2600 : douta <= 57 ; -2601 : douta <= 57 ; -2602 : douta <= 57 ; -2603 : douta <= 57 ; -2604 : douta <= 57 ; -2605 : douta <= 57 ; -2606 : douta <= 57 ; -2607 : douta <= 57 ; -2608 : douta <= 57 ; -2609 : douta <= 57 ; -2610 : douta <= 57 ; -2611 : douta <= 57 ; -2612 : douta <= 57 ; -2613 : douta <= 57 ; -2614 : douta <= 57 ; -2615 : douta <= 57 ; -2616 : douta <= 57 ; -2617 : douta <= 57 ; -2618 : douta <= 57 ; -2619 : douta <= 57 ; -2620 : douta <= 57 ; -2621 : douta <= 57 ; -2622 : douta <= 57 ; -2623 : douta <= 57 ; -2624 : douta <= 57 ; -2625 : douta <= 57 ; -2626 : douta <= 57 ; -2627 : douta <= 57 ; -2628 : douta <= 57 ; -2629 : douta <= 57 ; -2630 : douta <= 57 ; -2631 : douta <= 57 ; -2632 : douta <= 57 ; -2633 : douta <= 57 ; -2634 : douta <= 57 ; -2635 : douta <= 57 ; -2636 : douta <= 57 ; -2637 : douta <= 57 ; -2638 : douta <= 57 ; -2639 : douta <= 57 ; -2640 : douta <= 57 ; -2641 : douta <= 57 ; -2642 : douta <= 57 ; -2643 : douta <= 57 ; -2644 : douta <= 57 ; -2645 : douta <= 57 ; -2646 : douta <= 57 ; -2647 : douta <= 57 ; -2648 : douta <= 57 ; -2649 : douta <= 57 ; -2650 : douta <= 57 ; -2651 : douta <= 57 ; -2652 : douta <= 57 ; -2653 : douta <= 57 ; -2654 : douta <= 57 ; -2655 : douta <= 57 ; -2656 : douta <= 57 ; -2657 : douta <= 57 ; -2658 : douta <= 57 ; -2659 : douta <= 57 ; -2660 : douta <= 57 ; -2661 : douta <= 57 ; -2662 : douta <= 57 ; -2663 : douta <= 57 ; -2664 : douta <= 57 ; -2665 : douta <= 57 ; -2666 : douta <= 57 ; -2667 : douta <= 57 ; -2668 : douta <= 57 ; -2669 : douta <= 57 ; -2670 : douta <= 57 ; -2671 : douta <= 57 ; -2672 : douta <= 57 ; -2673 : douta <= 57 ; -2674 : douta <= 57 ; -2675 : douta <= 57 ; -2676 : douta <= 57 ; -2677 : douta <= 57 ; -2678 : douta <= 57 ; -2679 : douta <= 57 ; -2680 : douta <= 57 ; -2681 : douta <= 57 ; -2682 : douta <= 57 ; -2683 : douta <= 57 ; -2684 : douta <= 57 ; -2685 : douta <= 57 ; -2686 : douta <= 57 ; -2687 : douta <= 57 ; -2688 : douta <= 57 ; -2689 : douta <= 57 ; -2690 : douta <= 57 ; -2691 : douta <= 57 ; -2692 : douta <= 57 ; -2693 : douta <= 57 ; -2694 : douta <= 57 ; -2695 : douta <= 57 ; -2696 : douta <= 57 ; -2697 : douta <= 57 ; -2698 : douta <= 57 ; -2699 : douta <= 57 ; -2700 : douta <= 57 ; -2701 : douta <= 57 ; -2702 : douta <= 57 ; -2703 : douta <= 57 ; -2704 : douta <= 57 ; -2705 : douta <= 57 ; -2706 : douta <= 57 ; -2707 : douta <= 57 ; -2708 : douta <= 57 ; -2709 : douta <= 57 ; -2710 : douta <= 57 ; -2711 : douta <= 57 ; -2712 : douta <= 57 ; -2713 : douta <= 57 ; -2714 : douta <= 57 ; -2715 : douta <= 57 ; -2716 : douta <= 57 ; -2717 : douta <= 57 ; -2718 : douta <= 57 ; -2719 : douta <= 57 ; -2720 : douta <= 57 ; -2721 : douta <= 57 ; -2722 : douta <= 57 ; -2723 : douta <= 57 ; -2724 : douta <= 57 ; -2725 : douta <= 57 ; -2726 : douta <= 57 ; -2727 : douta <= 57 ; -2728 : douta <= 57 ; -2729 : douta <= 57 ; -2730 : douta <= 57 ; -2731 : douta <= 57 ; -2732 : douta <= 57 ; -2733 : douta <= 57 ; -2734 : douta <= 57 ; -2735 : douta <= 57 ; -2736 : douta <= 57 ; -2737 : douta <= 57 ; -2738 : douta <= 57 ; -2739 : douta <= 57 ; -2740 : douta <= 57 ; -2741 : douta <= 57 ; -2742 : douta <= 57 ; -2743 : douta <= 57 ; -2744 : douta <= 57 ; -2745 : douta <= 57 ; -2746 : douta <= 57 ; -2747 : douta <= 57 ; -2748 : douta <= 57 ; -2749 : douta <= 57 ; -2750 : douta <= 57 ; -2751 : douta <= 57 ; -2752 : douta <= 57 ; -2753 : douta <= 57 ; -2754 : douta <= 57 ; -2755 : douta <= 57 ; -2756 : douta <= 57 ; -2757 : douta <= 57 ; -2758 : douta <= 57 ; -2759 : douta <= 57 ; -2760 : douta <= 57 ; -2761 : douta <= 57 ; -2762 : douta <= 57 ; -2763 : douta <= 57 ; -2764 : douta <= 57 ; -2765 : douta <= 57 ; -2766 : douta <= 57 ; -2767 : douta <= 57 ; -2768 : douta <= 57 ; -2769 : douta <= 57 ; -2770 : douta <= 57 ; -2771 : douta <= 57 ; -2772 : douta <= 57 ; -2773 : douta <= 57 ; -2774 : douta <= 57 ; -2775 : douta <= 57 ; -2776 : douta <= 57 ; -2777 : douta <= 57 ; -2778 : douta <= 57 ; -2779 : douta <= 57 ; -2780 : douta <= 57 ; -2781 : douta <= 57 ; -2782 : douta <= 57 ; -2783 : douta <= 57 ; -2784 : douta <= 57 ; -2785 : douta <= 57 ; -2786 : douta <= 57 ; -2787 : douta <= 57 ; -2788 : douta <= 57 ; -2789 : douta <= 57 ; -2790 : douta <= 57 ; -2791 : douta <= 57 ; -2792 : douta <= 57 ; -2793 : douta <= 57 ; -2794 : douta <= 57 ; -2795 : douta <= 57 ; -2796 : douta <= 57 ; -2797 : douta <= 57 ; -2798 : douta <= 57 ; -2799 : douta <= 57 ; -2800 : douta <= 57 ; -2801 : douta <= 57 ; -2802 : douta <= 57 ; -2803 : douta <= 57 ; -2804 : douta <= 57 ; -2805 : douta <= 57 ; -2806 : douta <= 57 ; -2807 : douta <= 57 ; -2808 : douta <= 57 ; -2809 : douta <= 57 ; -2810 : douta <= 57 ; -2811 : douta <= 57 ; -2812 : douta <= 57 ; -2813 : douta <= 57 ; -2814 : douta <= 57 ; -2815 : douta <= 57 ; -2816 : douta <= 57 ; -2817 : douta <= 57 ; -2818 : douta <= 57 ; -2819 : douta <= 57 ; -2820 : douta <= 57 ; -2821 : douta <= 57 ; -2822 : douta <= 57 ; -2823 : douta <= 57 ; -2824 : douta <= 57 ; -2825 : douta <= 58 ; -2826 : douta <= 58 ; -2827 : douta <= 58 ; -2828 : douta <= 58 ; -2829 : douta <= 58 ; -2830 : douta <= 58 ; -2831 : douta <= 58 ; -2832 : douta <= 58 ; -2833 : douta <= 58 ; -2834 : douta <= 58 ; -2835 : douta <= 58 ; -2836 : douta <= 58 ; -2837 : douta <= 58 ; -2838 : douta <= 58 ; -2839 : douta <= 58 ; -2840 : douta <= 58 ; -2841 : douta <= 58 ; -2842 : douta <= 58 ; -2843 : douta <= 58 ; -2844 : douta <= 58 ; -2845 : douta <= 58 ; -2846 : douta <= 58 ; -2847 : douta <= 58 ; -2848 : douta <= 58 ; -2849 : douta <= 58 ; -2850 : douta <= 58 ; -2851 : douta <= 58 ; -2852 : douta <= 58 ; -2853 : douta <= 58 ; -2854 : douta <= 58 ; -2855 : douta <= 58 ; -2856 : douta <= 58 ; -2857 : douta <= 58 ; -2858 : douta <= 58 ; -2859 : douta <= 58 ; -2860 : douta <= 58 ; -2861 : douta <= 58 ; -2862 : douta <= 58 ; -2863 : douta <= 58 ; -2864 : douta <= 58 ; -2865 : douta <= 58 ; -2866 : douta <= 58 ; -2867 : douta <= 58 ; -2868 : douta <= 58 ; -2869 : douta <= 58 ; -2870 : douta <= 58 ; -2871 : douta <= 58 ; -2872 : douta <= 58 ; -2873 : douta <= 58 ; -2874 : douta <= 58 ; -2875 : douta <= 58 ; -2876 : douta <= 58 ; -2877 : douta <= 58 ; -2878 : douta <= 58 ; -2879 : douta <= 58 ; -2880 : douta <= 58 ; -2881 : douta <= 58 ; -2882 : douta <= 58 ; -2883 : douta <= 58 ; -2884 : douta <= 58 ; -2885 : douta <= 58 ; -2886 : douta <= 58 ; -2887 : douta <= 58 ; -2888 : douta <= 58 ; -2889 : douta <= 58 ; -2890 : douta <= 58 ; -2891 : douta <= 58 ; -2892 : douta <= 58 ; -2893 : douta <= 58 ; -2894 : douta <= 58 ; -2895 : douta <= 58 ; -2896 : douta <= 58 ; -2897 : douta <= 58 ; -2898 : douta <= 58 ; -2899 : douta <= 58 ; -2900 : douta <= 58 ; -2901 : douta <= 58 ; -2902 : douta <= 58 ; -2903 : douta <= 58 ; -2904 : douta <= 58 ; -2905 : douta <= 58 ; -2906 : douta <= 58 ; -2907 : douta <= 58 ; -2908 : douta <= 58 ; -2909 : douta <= 58 ; -2910 : douta <= 58 ; -2911 : douta <= 58 ; -2912 : douta <= 58 ; -2913 : douta <= 58 ; -2914 : douta <= 58 ; -2915 : douta <= 58 ; -2916 : douta <= 58 ; -2917 : douta <= 58 ; -2918 : douta <= 58 ; -2919 : douta <= 58 ; -2920 : douta <= 58 ; -2921 : douta <= 58 ; -2922 : douta <= 58 ; -2923 : douta <= 58 ; -2924 : douta <= 58 ; -2925 : douta <= 58 ; -2926 : douta <= 58 ; -2927 : douta <= 58 ; -2928 : douta <= 58 ; -2929 : douta <= 58 ; -2930 : douta <= 58 ; -2931 : douta <= 58 ; -2932 : douta <= 58 ; -2933 : douta <= 58 ; -2934 : douta <= 58 ; -2935 : douta <= 58 ; -2936 : douta <= 58 ; -2937 : douta <= 58 ; -2938 : douta <= 58 ; -2939 : douta <= 58 ; -2940 : douta <= 58 ; -2941 : douta <= 58 ; -2942 : douta <= 58 ; -2943 : douta <= 58 ; -2944 : douta <= 58 ; -2945 : douta <= 58 ; -2946 : douta <= 58 ; -2947 : douta <= 58 ; -2948 : douta <= 58 ; -2949 : douta <= 58 ; -2950 : douta <= 58 ; -2951 : douta <= 58 ; -2952 : douta <= 58 ; -2953 : douta <= 58 ; -2954 : douta <= 58 ; -2955 : douta <= 58 ; -2956 : douta <= 58 ; -2957 : douta <= 58 ; -2958 : douta <= 58 ; -2959 : douta <= 58 ; -2960 : douta <= 58 ; -2961 : douta <= 58 ; -2962 : douta <= 58 ; -2963 : douta <= 58 ; -2964 : douta <= 58 ; -2965 : douta <= 58 ; -2966 : douta <= 58 ; -2967 : douta <= 58 ; -2968 : douta <= 58 ; -2969 : douta <= 58 ; -2970 : douta <= 58 ; -2971 : douta <= 58 ; -2972 : douta <= 58 ; -2973 : douta <= 58 ; -2974 : douta <= 58 ; -2975 : douta <= 58 ; -2976 : douta <= 58 ; -2977 : douta <= 58 ; -2978 : douta <= 58 ; -2979 : douta <= 58 ; -2980 : douta <= 58 ; -2981 : douta <= 58 ; -2982 : douta <= 58 ; -2983 : douta <= 58 ; -2984 : douta <= 58 ; -2985 : douta <= 58 ; -2986 : douta <= 58 ; -2987 : douta <= 58 ; -2988 : douta <= 58 ; -2989 : douta <= 58 ; -2990 : douta <= 58 ; -2991 : douta <= 58 ; -2992 : douta <= 58 ; -2993 : douta <= 58 ; -2994 : douta <= 58 ; -2995 : douta <= 58 ; -2996 : douta <= 58 ; -2997 : douta <= 58 ; -2998 : douta <= 58 ; -2999 : douta <= 58 ; -3000 : douta <= 58 ; -3001 : douta <= 58 ; -3002 : douta <= 58 ; -3003 : douta <= 58 ; -3004 : douta <= 58 ; -3005 : douta <= 58 ; -3006 : douta <= 58 ; -3007 : douta <= 58 ; -3008 : douta <= 58 ; -3009 : douta <= 58 ; -3010 : douta <= 58 ; -3011 : douta <= 58 ; -3012 : douta <= 58 ; -3013 : douta <= 58 ; -3014 : douta <= 58 ; -3015 : douta <= 58 ; -3016 : douta <= 58 ; -3017 : douta <= 58 ; -3018 : douta <= 58 ; -3019 : douta <= 58 ; -3020 : douta <= 58 ; -3021 : douta <= 58 ; -3022 : douta <= 58 ; -3023 : douta <= 58 ; -3024 : douta <= 58 ; -3025 : douta <= 58 ; -3026 : douta <= 58 ; -3027 : douta <= 58 ; -3028 : douta <= 58 ; -3029 : douta <= 58 ; -3030 : douta <= 58 ; -3031 : douta <= 58 ; -3032 : douta <= 58 ; -3033 : douta <= 58 ; -3034 : douta <= 58 ; -3035 : douta <= 58 ; -3036 : douta <= 58 ; -3037 : douta <= 58 ; -3038 : douta <= 58 ; -3039 : douta <= 58 ; -3040 : douta <= 58 ; -3041 : douta <= 58 ; -3042 : douta <= 58 ; -3043 : douta <= 58 ; -3044 : douta <= 58 ; -3045 : douta <= 58 ; -3046 : douta <= 58 ; -3047 : douta <= 58 ; -3048 : douta <= 58 ; -3049 : douta <= 58 ; -3050 : douta <= 58 ; -3051 : douta <= 58 ; -3052 : douta <= 58 ; -3053 : douta <= 58 ; -3054 : douta <= 58 ; -3055 : douta <= 58 ; -3056 : douta <= 58 ; -3057 : douta <= 58 ; -3058 : douta <= 58 ; -3059 : douta <= 58 ; -3060 : douta <= 58 ; -3061 : douta <= 58 ; -3062 : douta <= 58 ; -3063 : douta <= 58 ; -3064 : douta <= 58 ; -3065 : douta <= 58 ; -3066 : douta <= 58 ; -3067 : douta <= 58 ; -3068 : douta <= 58 ; -3069 : douta <= 58 ; -3070 : douta <= 58 ; -3071 : douta <= 58 ; -3072 : douta <= 58 ; -3073 : douta <= 58 ; -3074 : douta <= 58 ; -3075 : douta <= 58 ; -3076 : douta <= 58 ; -3077 : douta <= 58 ; -3078 : douta <= 58 ; -3079 : douta <= 58 ; -3080 : douta <= 58 ; -3081 : douta <= 58 ; -3082 : douta <= 58 ; -3083 : douta <= 58 ; -3084 : douta <= 58 ; -3085 : douta <= 58 ; -3086 : douta <= 58 ; -3087 : douta <= 58 ; -3088 : douta <= 58 ; -3089 : douta <= 58 ; -3090 : douta <= 58 ; -3091 : douta <= 58 ; -3092 : douta <= 58 ; -3093 : douta <= 58 ; -3094 : douta <= 58 ; -3095 : douta <= 58 ; -3096 : douta <= 58 ; -3097 : douta <= 58 ; -3098 : douta <= 58 ; -3099 : douta <= 58 ; -3100 : douta <= 58 ; -3101 : douta <= 58 ; -3102 : douta <= 58 ; -3103 : douta <= 58 ; -3104 : douta <= 58 ; -3105 : douta <= 58 ; -3106 : douta <= 58 ; -3107 : douta <= 58 ; -3108 : douta <= 58 ; -3109 : douta <= 58 ; -3110 : douta <= 58 ; -3111 : douta <= 58 ; -3112 : douta <= 58 ; -3113 : douta <= 58 ; -3114 : douta <= 58 ; -3115 : douta <= 58 ; -3116 : douta <= 58 ; -3117 : douta <= 58 ; -3118 : douta <= 58 ; -3119 : douta <= 58 ; -3120 : douta <= 58 ; -3121 : douta <= 58 ; -3122 : douta <= 58 ; -3123 : douta <= 58 ; -3124 : douta <= 58 ; -3125 : douta <= 58 ; -3126 : douta <= 58 ; -3127 : douta <= 58 ; -3128 : douta <= 58 ; -3129 : douta <= 58 ; -3130 : douta <= 58 ; -3131 : douta <= 58 ; -3132 : douta <= 58 ; -3133 : douta <= 58 ; -3134 : douta <= 58 ; -3135 : douta <= 58 ; -3136 : douta <= 58 ; -3137 : douta <= 58 ; -3138 : douta <= 58 ; -3139 : douta <= 58 ; -3140 : douta <= 58 ; -3141 : douta <= 58 ; -3142 : douta <= 58 ; -3143 : douta <= 58 ; -3144 : douta <= 58 ; -3145 : douta <= 58 ; -3146 : douta <= 58 ; -3147 : douta <= 58 ; -3148 : douta <= 58 ; -3149 : douta <= 58 ; -3150 : douta <= 58 ; -3151 : douta <= 58 ; -3152 : douta <= 58 ; -3153 : douta <= 58 ; -3154 : douta <= 58 ; -3155 : douta <= 58 ; -3156 : douta <= 58 ; -3157 : douta <= 58 ; -3158 : douta <= 58 ; -3159 : douta <= 58 ; -3160 : douta <= 58 ; -3161 : douta <= 58 ; -3162 : douta <= 58 ; -3163 : douta <= 58 ; -3164 : douta <= 58 ; -3165 : douta <= 58 ; -3166 : douta <= 58 ; -3167 : douta <= 58 ; -3168 : douta <= 58 ; -3169 : douta <= 58 ; -3170 : douta <= 58 ; -3171 : douta <= 58 ; -3172 : douta <= 58 ; -3173 : douta <= 58 ; -3174 : douta <= 58 ; -3175 : douta <= 58 ; -3176 : douta <= 58 ; -3177 : douta <= 58 ; -3178 : douta <= 58 ; -3179 : douta <= 58 ; -3180 : douta <= 58 ; -3181 : douta <= 58 ; -3182 : douta <= 58 ; -3183 : douta <= 58 ; -3184 : douta <= 58 ; -3185 : douta <= 58 ; -3186 : douta <= 58 ; -3187 : douta <= 58 ; -3188 : douta <= 58 ; -3189 : douta <= 58 ; -3190 : douta <= 58 ; -3191 : douta <= 58 ; -3192 : douta <= 58 ; -3193 : douta <= 58 ; -3194 : douta <= 58 ; -3195 : douta <= 58 ; -3196 : douta <= 58 ; -3197 : douta <= 58 ; -3198 : douta <= 58 ; -3199 : douta <= 58 ; -3200 : douta <= 58 ; -3201 : douta <= 58 ; -3202 : douta <= 58 ; -3203 : douta <= 58 ; -3204 : douta <= 58 ; -3205 : douta <= 58 ; -3206 : douta <= 58 ; -3207 : douta <= 58 ; -3208 : douta <= 58 ; -3209 : douta <= 58 ; -3210 : douta <= 58 ; -3211 : douta <= 58 ; -3212 : douta <= 58 ; -3213 : douta <= 58 ; -3214 : douta <= 58 ; -3215 : douta <= 58 ; -3216 : douta <= 58 ; -3217 : douta <= 58 ; -3218 : douta <= 58 ; -3219 : douta <= 58 ; -3220 : douta <= 58 ; -3221 : douta <= 58 ; -3222 : douta <= 58 ; -3223 : douta <= 58 ; -3224 : douta <= 58 ; -3225 : douta <= 59 ; -3226 : douta <= 59 ; -3227 : douta <= 59 ; -3228 : douta <= 59 ; -3229 : douta <= 59 ; -3230 : douta <= 59 ; -3231 : douta <= 59 ; -3232 : douta <= 59 ; -3233 : douta <= 59 ; -3234 : douta <= 59 ; -3235 : douta <= 59 ; -3236 : douta <= 59 ; -3237 : douta <= 59 ; -3238 : douta <= 59 ; -3239 : douta <= 59 ; -3240 : douta <= 59 ; -3241 : douta <= 59 ; -3242 : douta <= 59 ; -3243 : douta <= 59 ; -3244 : douta <= 59 ; -3245 : douta <= 59 ; -3246 : douta <= 59 ; -3247 : douta <= 59 ; -3248 : douta <= 59 ; -3249 : douta <= 59 ; -3250 : douta <= 59 ; -3251 : douta <= 59 ; -3252 : douta <= 59 ; -3253 : douta <= 59 ; -3254 : douta <= 59 ; -3255 : douta <= 59 ; -3256 : douta <= 59 ; -3257 : douta <= 59 ; -3258 : douta <= 59 ; -3259 : douta <= 59 ; -3260 : douta <= 59 ; -3261 : douta <= 59 ; -3262 : douta <= 59 ; -3263 : douta <= 59 ; -3264 : douta <= 59 ; -3265 : douta <= 59 ; -3266 : douta <= 59 ; -3267 : douta <= 59 ; -3268 : douta <= 59 ; -3269 : douta <= 59 ; -3270 : douta <= 59 ; -3271 : douta <= 59 ; -3272 : douta <= 59 ; -3273 : douta <= 59 ; -3274 : douta <= 59 ; -3275 : douta <= 59 ; -3276 : douta <= 59 ; -3277 : douta <= 59 ; -3278 : douta <= 59 ; -3279 : douta <= 59 ; -3280 : douta <= 59 ; -3281 : douta <= 59 ; -3282 : douta <= 59 ; -3283 : douta <= 59 ; -3284 : douta <= 59 ; -3285 : douta <= 59 ; -3286 : douta <= 59 ; -3287 : douta <= 59 ; -3288 : douta <= 59 ; -3289 : douta <= 59 ; -3290 : douta <= 59 ; -3291 : douta <= 59 ; -3292 : douta <= 59 ; -3293 : douta <= 59 ; -3294 : douta <= 59 ; -3295 : douta <= 59 ; -3296 : douta <= 59 ; -3297 : douta <= 59 ; -3298 : douta <= 59 ; -3299 : douta <= 59 ; -3300 : douta <= 59 ; -3301 : douta <= 59 ; -3302 : douta <= 59 ; -3303 : douta <= 59 ; -3304 : douta <= 59 ; -3305 : douta <= 59 ; -3306 : douta <= 59 ; -3307 : douta <= 59 ; -3308 : douta <= 59 ; -3309 : douta <= 59 ; -3310 : douta <= 59 ; -3311 : douta <= 59 ; -3312 : douta <= 59 ; -3313 : douta <= 59 ; -3314 : douta <= 59 ; -3315 : douta <= 59 ; -3316 : douta <= 59 ; -3317 : douta <= 59 ; -3318 : douta <= 59 ; -3319 : douta <= 59 ; -3320 : douta <= 59 ; -3321 : douta <= 59 ; -3322 : douta <= 59 ; -3323 : douta <= 59 ; -3324 : douta <= 59 ; -3325 : douta <= 59 ; -3326 : douta <= 59 ; -3327 : douta <= 59 ; -3328 : douta <= 59 ; -3329 : douta <= 59 ; -3330 : douta <= 59 ; -3331 : douta <= 59 ; -3332 : douta <= 59 ; -3333 : douta <= 59 ; -3334 : douta <= 59 ; -3335 : douta <= 59 ; -3336 : douta <= 59 ; -3337 : douta <= 59 ; -3338 : douta <= 59 ; -3339 : douta <= 59 ; -3340 : douta <= 59 ; -3341 : douta <= 59 ; -3342 : douta <= 59 ; -3343 : douta <= 59 ; -3344 : douta <= 59 ; -3345 : douta <= 59 ; -3346 : douta <= 59 ; -3347 : douta <= 59 ; -3348 : douta <= 59 ; -3349 : douta <= 59 ; -3350 : douta <= 59 ; -3351 : douta <= 59 ; -3352 : douta <= 59 ; -3353 : douta <= 59 ; -3354 : douta <= 59 ; -3355 : douta <= 59 ; -3356 : douta <= 59 ; -3357 : douta <= 59 ; -3358 : douta <= 59 ; -3359 : douta <= 59 ; -3360 : douta <= 59 ; -3361 : douta <= 59 ; -3362 : douta <= 59 ; -3363 : douta <= 59 ; -3364 : douta <= 59 ; -3365 : douta <= 59 ; -3366 : douta <= 59 ; -3367 : douta <= 59 ; -3368 : douta <= 59 ; -3369 : douta <= 59 ; -3370 : douta <= 59 ; -3371 : douta <= 59 ; -3372 : douta <= 59 ; -3373 : douta <= 59 ; -3374 : douta <= 59 ; -3375 : douta <= 59 ; -3376 : douta <= 59 ; -3377 : douta <= 59 ; -3378 : douta <= 59 ; -3379 : douta <= 59 ; -3380 : douta <= 59 ; -3381 : douta <= 59 ; -3382 : douta <= 59 ; -3383 : douta <= 59 ; -3384 : douta <= 59 ; -3385 : douta <= 59 ; -3386 : douta <= 59 ; -3387 : douta <= 59 ; -3388 : douta <= 59 ; -3389 : douta <= 59 ; -3390 : douta <= 59 ; -3391 : douta <= 59 ; -3392 : douta <= 59 ; -3393 : douta <= 59 ; -3394 : douta <= 59 ; -3395 : douta <= 59 ; -3396 : douta <= 59 ; -3397 : douta <= 59 ; -3398 : douta <= 59 ; -3399 : douta <= 59 ; -3400 : douta <= 59 ; -3401 : douta <= 59 ; -3402 : douta <= 59 ; -3403 : douta <= 59 ; -3404 : douta <= 59 ; -3405 : douta <= 59 ; -3406 : douta <= 59 ; -3407 : douta <= 59 ; -3408 : douta <= 59 ; -3409 : douta <= 59 ; -3410 : douta <= 59 ; -3411 : douta <= 59 ; -3412 : douta <= 59 ; -3413 : douta <= 59 ; -3414 : douta <= 59 ; -3415 : douta <= 59 ; -3416 : douta <= 59 ; -3417 : douta <= 59 ; -3418 : douta <= 59 ; -3419 : douta <= 59 ; -3420 : douta <= 59 ; -3421 : douta <= 59 ; -3422 : douta <= 59 ; -3423 : douta <= 59 ; -3424 : douta <= 59 ; -3425 : douta <= 59 ; -3426 : douta <= 59 ; -3427 : douta <= 59 ; -3428 : douta <= 59 ; -3429 : douta <= 59 ; -3430 : douta <= 59 ; -3431 : douta <= 59 ; -3432 : douta <= 59 ; -3433 : douta <= 59 ; -3434 : douta <= 59 ; -3435 : douta <= 59 ; -3436 : douta <= 59 ; -3437 : douta <= 59 ; -3438 : douta <= 59 ; -3439 : douta <= 59 ; -3440 : douta <= 59 ; -3441 : douta <= 59 ; -3442 : douta <= 59 ; -3443 : douta <= 59 ; -3444 : douta <= 59 ; -3445 : douta <= 59 ; -3446 : douta <= 59 ; -3447 : douta <= 59 ; -3448 : douta <= 59 ; -3449 : douta <= 59 ; -3450 : douta <= 59 ; -3451 : douta <= 59 ; -3452 : douta <= 59 ; -3453 : douta <= 59 ; -3454 : douta <= 59 ; -3455 : douta <= 59 ; -3456 : douta <= 59 ; -3457 : douta <= 59 ; -3458 : douta <= 59 ; -3459 : douta <= 59 ; -3460 : douta <= 59 ; -3461 : douta <= 59 ; -3462 : douta <= 59 ; -3463 : douta <= 59 ; -3464 : douta <= 59 ; -3465 : douta <= 59 ; -3466 : douta <= 59 ; -3467 : douta <= 59 ; -3468 : douta <= 59 ; -3469 : douta <= 59 ; -3470 : douta <= 59 ; -3471 : douta <= 59 ; -3472 : douta <= 59 ; -3473 : douta <= 59 ; -3474 : douta <= 59 ; -3475 : douta <= 59 ; -3476 : douta <= 59 ; -3477 : douta <= 59 ; -3478 : douta <= 59 ; -3479 : douta <= 59 ; -3480 : douta <= 59 ; -3481 : douta <= 59 ; -3482 : douta <= 59 ; -3483 : douta <= 59 ; -3484 : douta <= 59 ; -3485 : douta <= 59 ; -3486 : douta <= 59 ; -3487 : douta <= 59 ; -3488 : douta <= 59 ; -3489 : douta <= 59 ; -3490 : douta <= 59 ; -3491 : douta <= 59 ; -3492 : douta <= 59 ; -3493 : douta <= 59 ; -3494 : douta <= 59 ; -3495 : douta <= 59 ; -3496 : douta <= 59 ; -3497 : douta <= 59 ; -3498 : douta <= 59 ; -3499 : douta <= 59 ; -3500 : douta <= 59 ; - - - -default:douta <= 59 ; -endcase - - -end - -*/ - - - - - - - - - - - - -endmodule diff --git a/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/sources_1/new/ant_rf/Sisyif_src/R_CAL_1.v b/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/sources_1/new/ant_rf/Sisyif_src/R_CAL_1.v deleted file mode 100644 index a52fc09..0000000 --- a/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/sources_1/new/ant_rf/Sisyif_src/R_CAL_1.v +++ /dev/null @@ -1,348 +0,0 @@ -`timescale 1ns / 1ps -////////////////////////////////////////////////////////////////////////////////// -// Company: -// Engineer: -// -// Create Date: 17:05:24 04/08/2022 -// Design Name: -// Module Name: R_CAL -// Project Name: -// Target Devices: -// Tool versions: -// Description: -// -// Dependencies: -// -// Revision: -// Revision 0.01 - File Created -// Additional Comments: -// -////////////////////////////////////////////////////////////////////////////////// -module R_CAL_1( -input i_clk , -input i_rstn , -input signed[7:0] i_temp , -input [15:0] fre_mode , -output reg[3:0] R_CAL - - ); - -//接收通é“1 -always@(posedge i_clk,negedge i_rstn)begin //1dB 步进 - if(!i_rstn) - R_CAL<='d0; - else if(i_temp>=8'sd70)begin//高温校准接收通é“1 - case(fre_mode) - 0 : R_CAL<= 7 ; //20375 ~ 20414 - 1 : R_CAL<= 7 ; //20415 ~ 20454 - 2 : R_CAL<= 7 ; //20455 ~ 20494 - 3 : R_CAL<= 6 ; //20495 ~ 20534 - 4 : R_CAL<= 6 ; //20535 ~ 20574 - 5 : R_CAL<= 6 ; //20575 ~ 20614 - 6 : R_CAL<= 6 ; //20615 ~ 20654 - 7 : R_CAL<= 6 ; //20655 ~ 20694 - 8 : R_CAL<= 5 ; //20695 ~ 20734 - 9 : R_CAL<= 5 ; //20735 ~ 20774 - 10: R_CAL<= 6 ; //20775 ~ 20814 - 11: R_CAL<= 6 ; //20815 ~ 20854 - 12: R_CAL<= 6 ; //20855 ~ 20894 - 13: R_CAL<= 6 ; //20895 ~ 20934 - 14: R_CAL<= 6 ; //20935 ~ 20974 - 15: R_CAL<= 6 ; //20975 ~ 21014 - 16: R_CAL<= 6 ; //21015 ~ 21054 - 17: R_CAL<= 6 ; //21055 ~ 21094 - 18: R_CAL<= 6 ; //21095 ~ 21134 - 19: R_CAL<= 7 ; //21135 ~ 21174 - 20: R_CAL<= 7 ; //21175 ~ 21214 - 21: R_CAL<= 7 ; //21215 ~ 21254 - 22: R_CAL<= 8 ; //21255 ~ 21294 - 23: R_CAL<= 8 ; //21295 ~ 21334 - 24: R_CAL<= 8 ; //21335 ~ 21374 - 25: R_CAL<= 8 ; //21375 ~ 21414 - 26: R_CAL<= 8 ; //21415 ~ 21454 - 27: R_CAL<= 8 ; //21455 ~ 21494 - 28: R_CAL<= 8 ; //21495 ~ 21534 - 29: R_CAL<= 8 ; //21535 ~ 21574 - 30: R_CAL<= 8 ; //21575 ~ 21614 - 31: R_CAL<= 8 ; //21615 ~ 21654 - 32: R_CAL<= 8 ; //21655 ~ 21694 - 33: R_CAL<= 8 ; //21695 ~ 21734 - 34: R_CAL<= 8 ; //21735 ~ 21774 - 35: R_CAL<= 8 ; //21775 ~ 21814 - 36: R_CAL<= 8 ; //21815 ~ 21854 - 37: R_CAL<= 8 ; //21855 ~ 21894 - 38: R_CAL<= 7 ; //21895 ~ 21934 - 39: R_CAL<= 7 ; //21935 ~ 21974 - 40: R_CAL<= 7 ; //21975 ~ 22014 - 41: R_CAL<= 7 ; //22015 ~ 22054 - 42: R_CAL<= 7 ; //22055 ~ 22094 - 43: R_CAL<= 7 ; //22095 ~ 22134 - 44: R_CAL<= 7 ; //22135 ~ 22174 - 45: R_CAL<= 7 ; //22175 ~ 22214 - 46: R_CAL<= 7 ; //22215 ~ 22254 - 47: R_CAL<= 7 ; //22255 ~ 22294 - 48: R_CAL<= 7 ; //22295 ~ 22334 - 49: R_CAL<= 7 ; //22335 ~ 22374 - 50: R_CAL<= 7 ; //22375 ~ 22414 - 51: R_CAL<= 7 ; //22415 ~ 22454 - 52: R_CAL<= 7 ; //22455 ~ 22494 - 53: R_CAL<= 7 ; //22495 ~ 22534 - 54: R_CAL<= 7 ; //22535 ~ 22574 - 55: R_CAL<= 7 ; //22575 ~ 22614 - 56: R_CAL<= 7 ; //22615 ~ 22654 - 57: R_CAL<= 7 ; //22655 ~ 22694 - 58: R_CAL<= 8 ; //22695 ~ 22734 - 59: R_CAL<= 8 ; //22735 ~ 22774 - 60: R_CAL<= 8 ; //22775 ~ 22814 - 61: R_CAL<= 8 ; //22815 ~ 22854 - 62: R_CAL<= 8 ; //22855 ~ 22894 - 63: R_CAL<= 8 ; //22895 ~ 22934 - 64: R_CAL<= 8 ; //22935 ~ 22974 - 65: R_CAL<= 8 ; //22975 ~ 23014 - 66: R_CAL<= 8 ; //23015 ~ 23054 - 67: R_CAL<= 8 ; //23055 ~ 23094 - 68: R_CAL<= 7 ; //23095 ~ 23134 - 69: R_CAL<= 7 ; //23135 ~ 23174 - 70: R_CAL<= 7 ; //23175 ~ 23214 - 71: R_CAL<= 7 ; //23215 ~ 23254 - 72: R_CAL<= 6 ; //23255 ~ 23294 - 73: R_CAL<= 6 ; //23295 ~ 23334 - 74: R_CAL<= 6 ; //23335 ~ 23374 - 75: R_CAL<= 6 ; //23375 ~ 23414 - 76: R_CAL<= 6 ; //23415 ~ 23454 - 77: R_CAL<= 6 ; //23455 ~ 23494 - 78: R_CAL<= 6 ; //23495 ~ 23534 - 79: R_CAL<= 5 ; //23535 ~ 23574 - 80: R_CAL<= 6 ; //23575 ~ 23614 - 81: R_CAL<= 6 ; //23615 ~ 23654 - 82: R_CAL<= 6 ; //23655 ~ 23694 - 83: R_CAL<= 6 ; //23695 ~ 23734 - 84: R_CAL<= 6 ; //23735 ~ 23774 - 85: R_CAL<= 6 ; //23775 ~ 23814 - 86: R_CAL<= 6 ; //23815 ~ 23854 - 87: R_CAL<= 6 ; //23855 ~ 23875 - default:R_CAL<=R_CAL; - endcase - end - - else if(i_temp>=8'sd0)begin//常温校准接收通é“1 - case(fre_mode) - 0 : R_CAL<= 7 ; //20375 ~ 20414 - 1 : R_CAL<= 7 ; //20415 ~ 20454 - 2 : R_CAL<= 7 ; //20455 ~ 20494 - 3 : R_CAL<= 6 ; //20495 ~ 20534 - 4 : R_CAL<= 6 ; //20535 ~ 20574 - 5 : R_CAL<= 6 ; //20575 ~ 20614 - 6 : R_CAL<= 6 ; //20615 ~ 20654 - 7 : R_CAL<= 6 ; //20655 ~ 20694 - 8 : R_CAL<= 5 ; //20695 ~ 20734 - 9 : R_CAL<= 5 ; //20735 ~ 20774 - 10: R_CAL<= 6 ; //20775 ~ 20814 - 11: R_CAL<= 6 ; //20815 ~ 20854 - 12: R_CAL<= 6 ; //20855 ~ 20894 - 13: R_CAL<= 6 ; //20895 ~ 20934 - 14: R_CAL<= 6 ; //20935 ~ 20974 - 15: R_CAL<= 6 ; //20975 ~ 21014 - 16: R_CAL<= 6 ; //21015 ~ 21054 - 17: R_CAL<= 6 ; //21055 ~ 21094 - 18: R_CAL<= 6 ; //21095 ~ 21134 - 19: R_CAL<= 7 ; //21135 ~ 21174 - 20: R_CAL<= 7 ; //21175 ~ 21214 - 21: R_CAL<= 7 ; //21215 ~ 21254 - 22: R_CAL<= 8 ; //21255 ~ 21294 - 23: R_CAL<= 8 ; //21295 ~ 21334 - 24: R_CAL<= 8 ; //21335 ~ 21374 - 25: R_CAL<= 8 ; //21375 ~ 21414 - 26: R_CAL<= 8 ; //21415 ~ 21454 - 27: R_CAL<= 8 ; //21455 ~ 21494 - 28: R_CAL<= 8 ; //21495 ~ 21534 - 29: R_CAL<= 8 ; //21535 ~ 21574 - 30: R_CAL<= 8 ; //21575 ~ 21614 - 31: R_CAL<= 8 ; //21615 ~ 21654 - 32: R_CAL<= 8 ; //21655 ~ 21694 - 33: R_CAL<= 8 ; //21695 ~ 21734 - 34: R_CAL<= 8 ; //21735 ~ 21774 - 35: R_CAL<= 8 ; //21775 ~ 21814 - 36: R_CAL<= 8 ; //21815 ~ 21854 - 37: R_CAL<= 8 ; //21855 ~ 21894 - 38: R_CAL<= 7 ; //21895 ~ 21934 - 39: R_CAL<= 7 ; //21935 ~ 21974 - 40: R_CAL<= 7 ; //21975 ~ 22014 - 41: R_CAL<= 7 ; //22015 ~ 22054 - 42: R_CAL<= 7 ; //22055 ~ 22094 - 43: R_CAL<= 7 ; //22095 ~ 22134 - 44: R_CAL<= 7 ; //22135 ~ 22174 - 45: R_CAL<= 7 ; //22175 ~ 22214 - 46: R_CAL<= 7 ; //22215 ~ 22254 - 47: R_CAL<= 7 ; //22255 ~ 22294 - 48: R_CAL<= 7 ; //22295 ~ 22334 - 49: R_CAL<= 7 ; //22335 ~ 22374 - 50: R_CAL<= 7 ; //22375 ~ 22414 - 51: R_CAL<= 7 ; //22415 ~ 22454 - 52: R_CAL<= 7 ; //22455 ~ 22494 - 53: R_CAL<= 7 ; //22495 ~ 22534 - 54: R_CAL<= 7 ; //22535 ~ 22574 - 55: R_CAL<= 7 ; //22575 ~ 22614 - 56: R_CAL<= 7 ; //22615 ~ 22654 - 57: R_CAL<= 7 ; //22655 ~ 22694 - 58: R_CAL<= 8 ; //22695 ~ 22734 - 59: R_CAL<= 8 ; //22735 ~ 22774 - 60: R_CAL<= 8 ; //22775 ~ 22814 - 61: R_CAL<= 8 ; //22815 ~ 22854 - 62: R_CAL<= 8 ; //22855 ~ 22894 - 63: R_CAL<= 8 ; //22895 ~ 22934 - 64: R_CAL<= 8 ; //22935 ~ 22974 - 65: R_CAL<= 8 ; //22975 ~ 23014 - 66: R_CAL<= 8 ; //23015 ~ 23054 - 67: R_CAL<= 8 ; //23055 ~ 23094 - 68: R_CAL<= 7 ; //23095 ~ 23134 - 69: R_CAL<= 7 ; //23135 ~ 23174 - 70: R_CAL<= 7 ; //23175 ~ 23214 - 71: R_CAL<= 7 ; //23215 ~ 23254 - 72: R_CAL<= 6 ; //23255 ~ 23294 - 73: R_CAL<= 6 ; //23295 ~ 23334 - 74: R_CAL<= 6 ; //23335 ~ 23374 - 75: R_CAL<= 6 ; //23375 ~ 23414 - 76: R_CAL<= 6 ; //23415 ~ 23454 - 77: R_CAL<= 6 ; //23455 ~ 23494 - 78: R_CAL<= 6 ; //23495 ~ 23534 - 79: R_CAL<= 5 ; //23535 ~ 23574 - 80: R_CAL<= 6 ; //23575 ~ 23614 - 81: R_CAL<= 6 ; //23615 ~ 23654 - 82: R_CAL<= 6 ; //23655 ~ 23694 - 83: R_CAL<= 6 ; //23695 ~ 23734 - 84: R_CAL<= 6 ; //23735 ~ 23774 - 85: R_CAL<= 6 ; //23775 ~ 23814 - 86: R_CAL<= 6 ; //23815 ~ 23854 - 87: R_CAL<= 6 ; //23855 ~ 23875 - default:R_CAL<=R_CAL; - endcase - end - else begin//低温校准接收通é“1 - case(fre_mode) - 0 : R_CAL<= 7 ; //20375 ~ 20414 - 1 : R_CAL<= 7 ; //20415 ~ 20454 - 2 : R_CAL<= 7 ; //20455 ~ 20494 - 3 : R_CAL<= 6 ; //20495 ~ 20534 - 4 : R_CAL<= 6 ; //20535 ~ 20574 - 5 : R_CAL<= 6 ; //20575 ~ 20614 - 6 : R_CAL<= 6 ; //20615 ~ 20654 - 7 : R_CAL<= 6 ; //20655 ~ 20694 - 8 : R_CAL<= 5 ; //20695 ~ 20734 - 9 : R_CAL<= 5 ; //20735 ~ 20774 - 10: R_CAL<= 6 ; //20775 ~ 20814 - 11: R_CAL<= 6 ; //20815 ~ 20854 - 12: R_CAL<= 6 ; //20855 ~ 20894 - 13: R_CAL<= 6 ; //20895 ~ 20934 - 14: R_CAL<= 6 ; //20935 ~ 20974 - 15: R_CAL<= 6 ; //20975 ~ 21014 - 16: R_CAL<= 6 ; //21015 ~ 21054 - 17: R_CAL<= 6 ; //21055 ~ 21094 - 18: R_CAL<= 6 ; //21095 ~ 21134 - 19: R_CAL<= 7 ; //21135 ~ 21174 - 20: R_CAL<= 7 ; //21175 ~ 21214 - 21: R_CAL<= 7 ; //21215 ~ 21254 - 22: R_CAL<= 8 ; //21255 ~ 21294 - 23: R_CAL<= 8 ; //21295 ~ 21334 - 24: R_CAL<= 8 ; //21335 ~ 21374 - 25: R_CAL<= 8 ; //21375 ~ 21414 - 26: R_CAL<= 8 ; //21415 ~ 21454 - 27: R_CAL<= 8 ; //21455 ~ 21494 - 28: R_CAL<= 8 ; //21495 ~ 21534 - 29: R_CAL<= 8 ; //21535 ~ 21574 - 30: R_CAL<= 8 ; //21575 ~ 21614 - 31: R_CAL<= 8 ; //21615 ~ 21654 - 32: R_CAL<= 8 ; //21655 ~ 21694 - 33: R_CAL<= 8 ; //21695 ~ 21734 - 34: R_CAL<= 8 ; //21735 ~ 21774 - 35: R_CAL<= 8 ; //21775 ~ 21814 - 36: R_CAL<= 8 ; //21815 ~ 21854 - 37: R_CAL<= 8 ; //21855 ~ 21894 - 38: R_CAL<= 7 ; //21895 ~ 21934 - 39: R_CAL<= 7 ; //21935 ~ 21974 - 40: R_CAL<= 7 ; //21975 ~ 22014 - 41: R_CAL<= 7 ; //22015 ~ 22054 - 42: R_CAL<= 7 ; //22055 ~ 22094 - 43: R_CAL<= 7 ; //22095 ~ 22134 - 44: R_CAL<= 7 ; //22135 ~ 22174 - 45: R_CAL<= 7 ; //22175 ~ 22214 - 46: R_CAL<= 7 ; //22215 ~ 22254 - 47: R_CAL<= 7 ; //22255 ~ 22294 - 48: R_CAL<= 7 ; //22295 ~ 22334 - 49: R_CAL<= 7 ; //22335 ~ 22374 - 50: R_CAL<= 7 ; //22375 ~ 22414 - 51: R_CAL<= 7 ; //22415 ~ 22454 - 52: R_CAL<= 7 ; //22455 ~ 22494 - 53: R_CAL<= 7 ; //22495 ~ 22534 - 54: R_CAL<= 7 ; //22535 ~ 22574 - 55: R_CAL<= 7 ; //22575 ~ 22614 - 56: R_CAL<= 7 ; //22615 ~ 22654 - 57: R_CAL<= 7 ; //22655 ~ 22694 - 58: R_CAL<= 8 ; //22695 ~ 22734 - 59: R_CAL<= 8 ; //22735 ~ 22774 - 60: R_CAL<= 8 ; //22775 ~ 22814 - 61: R_CAL<= 8 ; //22815 ~ 22854 - 62: R_CAL<= 8 ; //22855 ~ 22894 - 63: R_CAL<= 8 ; //22895 ~ 22934 - 64: R_CAL<= 8 ; //22935 ~ 22974 - 65: R_CAL<= 8 ; //22975 ~ 23014 - 66: R_CAL<= 8 ; //23015 ~ 23054 - 67: R_CAL<= 8 ; //23055 ~ 23094 - 68: R_CAL<= 7 ; //23095 ~ 23134 - 69: R_CAL<= 7 ; //23135 ~ 23174 - 70: R_CAL<= 7 ; //23175 ~ 23214 - 71: R_CAL<= 7 ; //23215 ~ 23254 - 72: R_CAL<= 6 ; //23255 ~ 23294 - 73: R_CAL<= 6 ; //23295 ~ 23334 - 74: R_CAL<= 6 ; //23335 ~ 23374 - 75: R_CAL<= 6 ; //23375 ~ 23414 - 76: R_CAL<= 6 ; //23415 ~ 23454 - 77: R_CAL<= 6 ; //23455 ~ 23494 - 78: R_CAL<= 6 ; //23495 ~ 23534 - 79: R_CAL<= 5 ; //23535 ~ 23574 - 80: R_CAL<= 6 ; //23575 ~ 23614 - 81: R_CAL<= 6 ; //23615 ~ 23654 - 82: R_CAL<= 6 ; //23655 ~ 23694 - 83: R_CAL<= 6 ; //23695 ~ 23734 - 84: R_CAL<= 6 ; //23735 ~ 23774 - 85: R_CAL<= 6 ; //23775 ~ 23814 - 86: R_CAL<= 6 ; //23815 ~ 23854 - 87: R_CAL<= 6 ; //23855 ~ 23875 - default:R_CAL<=R_CAL; - endcase - end -end - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -endmodule diff --git a/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/sources_1/new/ant_rf/Sisyif_src/R_CAL_2.v b/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/sources_1/new/ant_rf/Sisyif_src/R_CAL_2.v deleted file mode 100644 index 4e9cfcc..0000000 --- a/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/sources_1/new/ant_rf/Sisyif_src/R_CAL_2.v +++ /dev/null @@ -1,349 +0,0 @@ -`timescale 1ns / 1ps -////////////////////////////////////////////////////////////////////////////////// -// Company: -// Engineer: -// -// Create Date: 17:05:24 04/08/2022 -// Design Name: -// Module Name: R_CAL -// Project Name: -// Target Devices: -// Tool versions: -// Description: -// -// Dependencies: -// -// Revision: -// Revision 0.01 - File Created -// Additional Comments: -// -////////////////////////////////////////////////////////////////////////////////// -module R_CAL_2( -input i_clk , -input i_rstn , -input signed[7:0] i_temp , -input [15:0] fre_mode , -output reg[3:0] R_CAL - - ); - - -//接收通é“2 -always@(posedge i_clk,negedge i_rstn)begin //1dB 步进 - if(!i_rstn) - R_CAL<='d0; - else if(i_temp>=8'sd70)begin//高温校准接收通é“2 - case(fre_mode) - 0 : R_CAL<= 6 ; //20375 ~ 20414 - 1 : R_CAL<= 6 ; //20415 ~ 20454 - 2 : R_CAL<= 6 ; //20455 ~ 20494 - 3 : R_CAL<= 5 ; //20495 ~ 20534 - 4 : R_CAL<= 5 ; //20535 ~ 20574 - 5 : R_CAL<= 5 ; //20575 ~ 20614 - 6 : R_CAL<= 5 ; //20615 ~ 20654 - 7 : R_CAL<= 5 ; //20655 ~ 20694 - 8 : R_CAL<= 5 ; //20695 ~ 20734 - 9 : R_CAL<= 5 ; //20735 ~ 20774 - 10: R_CAL<= 5 ; //20775 ~ 20814 - 11: R_CAL<= 5 ; //20815 ~ 20854 - 12: R_CAL<= 5 ; //20855 ~ 20894 - 13: R_CAL<= 5 ; //20895 ~ 20934 - 14: R_CAL<= 5 ; //20935 ~ 20974 - 15: R_CAL<= 6 ; //20975 ~ 21014 - 16: R_CAL<= 6 ; //21015 ~ 21054 - 17: R_CAL<= 6 ; //21055 ~ 21094 - 18: R_CAL<= 6 ; //21095 ~ 21134 - 19: R_CAL<= 6 ; //21135 ~ 21174 - 20: R_CAL<= 6 ; //21175 ~ 21214 - 21: R_CAL<= 7 ; //21215 ~ 21254 - 22: R_CAL<= 7 ; //21255 ~ 21294 - 23: R_CAL<= 7 ; //21295 ~ 21334 - 24: R_CAL<= 8 ; //21335 ~ 21374 - 25: R_CAL<= 8 ; //21375 ~ 21414 - 26: R_CAL<= 8 ; //21415 ~ 21454 - 27: R_CAL<= 8 ; //21455 ~ 21494 - 28: R_CAL<= 8 ; //21495 ~ 21534 - 29: R_CAL<= 8 ; //21535 ~ 21574 - 30: R_CAL<= 8 ; //21575 ~ 21614 - 31: R_CAL<= 8 ; //21615 ~ 21654 - 32: R_CAL<= 8 ; //21655 ~ 21694 - 33: R_CAL<= 8 ; //21695 ~ 21734 - 34: R_CAL<= 8 ; //21735 ~ 21774 - 35: R_CAL<= 8 ; //21775 ~ 21814 - 36: R_CAL<= 8 ; //21815 ~ 21854 - 37: R_CAL<= 8 ; //21855 ~ 21894 - 38: R_CAL<= 7 ; //21895 ~ 21934 - 39: R_CAL<= 7 ; //21935 ~ 21974 - 40: R_CAL<= 7 ; //21975 ~ 22014 - 41: R_CAL<= 7 ; //22015 ~ 22054 - 42: R_CAL<= 7 ; //22055 ~ 22094 - 43: R_CAL<= 7 ; //22095 ~ 22134 - 44: R_CAL<= 7 ; //22135 ~ 22174 - 45: R_CAL<= 7 ; //22175 ~ 22214 - 46: R_CAL<= 7 ; //22215 ~ 22254 - 47: R_CAL<= 7 ; //22255 ~ 22294 - 48: R_CAL<= 7 ; //22295 ~ 22334 - 49: R_CAL<= 7 ; //22335 ~ 22374 - 50: R_CAL<= 7 ; //22375 ~ 22414 - 51: R_CAL<= 7 ; //22415 ~ 22454 - 52: R_CAL<= 7 ; //22455 ~ 22494 - 53: R_CAL<= 7 ; //22495 ~ 22534 - 54: R_CAL<= 7 ; //22535 ~ 22574 - 55: R_CAL<= 7 ; //22575 ~ 22614 - 56: R_CAL<= 7 ; //22615 ~ 22654 - 57: R_CAL<= 7 ; //22655 ~ 22694 - 58: R_CAL<= 7 ; //22695 ~ 22734 - 59: R_CAL<= 7 ; //22735 ~ 22774 - 60: R_CAL<= 7 ; //22775 ~ 22814 - 61: R_CAL<= 7 ; //22815 ~ 22854 - 62: R_CAL<= 7 ; //22855 ~ 22894 - 63: R_CAL<= 8 ; //22895 ~ 22934 - 64: R_CAL<= 8 ; //22935 ~ 22974 - 65: R_CAL<= 8 ; //22975 ~ 23014 - 66: R_CAL<= 8 ; //23015 ~ 23054 - 67: R_CAL<= 7 ; //23055 ~ 23094 - 68: R_CAL<= 7 ; //23095 ~ 23134 - 69: R_CAL<= 7 ; //23135 ~ 23174 - 70: R_CAL<= 7 ; //23175 ~ 23214 - 71: R_CAL<= 7 ; //23215 ~ 23254 - 72: R_CAL<= 7 ; //23255 ~ 23294 - 73: R_CAL<= 6 ; //23295 ~ 23334 - 74: R_CAL<= 6 ; //23335 ~ 23374 - 75: R_CAL<= 6 ; //23375 ~ 23414 - 76: R_CAL<= 6 ; //23415 ~ 23454 - 77: R_CAL<= 6 ; //23455 ~ 23494 - 78: R_CAL<= 5 ; //23495 ~ 23534 - 79: R_CAL<= 5 ; //23535 ~ 23574 - 80: R_CAL<= 6 ; //23575 ~ 23614 - 81: R_CAL<= 5 ; //23615 ~ 23654 - 82: R_CAL<= 5 ; //23655 ~ 23694 - 83: R_CAL<= 6 ; //23695 ~ 23734 - 84: R_CAL<= 5 ; //23735 ~ 23774 - 85: R_CAL<= 6 ; //23775 ~ 23814 - 86: R_CAL<= 6 ; //23815 ~ 23854 - 87: R_CAL<= 6 ; //23855 ~ 23875 - default:R_CAL<=R_CAL; - endcase - end - - else if(i_temp>=8'sd0)begin//常温校准接收通é“2 - case(fre_mode) - 0 : R_CAL<= 6 ; //20375 ~ 20414 - 1 : R_CAL<= 6 ; //20415 ~ 20454 - 2 : R_CAL<= 6 ; //20455 ~ 20494 - 3 : R_CAL<= 5 ; //20495 ~ 20534 - 4 : R_CAL<= 5 ; //20535 ~ 20574 - 5 : R_CAL<= 5 ; //20575 ~ 20614 - 6 : R_CAL<= 5 ; //20615 ~ 20654 - 7 : R_CAL<= 5 ; //20655 ~ 20694 - 8 : R_CAL<= 5 ; //20695 ~ 20734 - 9 : R_CAL<= 5 ; //20735 ~ 20774 - 10: R_CAL<= 5 ; //20775 ~ 20814 - 11: R_CAL<= 5 ; //20815 ~ 20854 - 12: R_CAL<= 5 ; //20855 ~ 20894 - 13: R_CAL<= 5 ; //20895 ~ 20934 - 14: R_CAL<= 5 ; //20935 ~ 20974 - 15: R_CAL<= 6 ; //20975 ~ 21014 - 16: R_CAL<= 6 ; //21015 ~ 21054 - 17: R_CAL<= 6 ; //21055 ~ 21094 - 18: R_CAL<= 6 ; //21095 ~ 21134 - 19: R_CAL<= 6 ; //21135 ~ 21174 - 20: R_CAL<= 6 ; //21175 ~ 21214 - 21: R_CAL<= 7 ; //21215 ~ 21254 - 22: R_CAL<= 7 ; //21255 ~ 21294 - 23: R_CAL<= 7 ; //21295 ~ 21334 - 24: R_CAL<= 8 ; //21335 ~ 21374 - 25: R_CAL<= 8 ; //21375 ~ 21414 - 26: R_CAL<= 8 ; //21415 ~ 21454 - 27: R_CAL<= 8 ; //21455 ~ 21494 - 28: R_CAL<= 8 ; //21495 ~ 21534 - 29: R_CAL<= 8 ; //21535 ~ 21574 - 30: R_CAL<= 8 ; //21575 ~ 21614 - 31: R_CAL<= 8 ; //21615 ~ 21654 - 32: R_CAL<= 8 ; //21655 ~ 21694 - 33: R_CAL<= 8 ; //21695 ~ 21734 - 34: R_CAL<= 8 ; //21735 ~ 21774 - 35: R_CAL<= 8 ; //21775 ~ 21814 - 36: R_CAL<= 8 ; //21815 ~ 21854 - 37: R_CAL<= 8 ; //21855 ~ 21894 - 38: R_CAL<= 7 ; //21895 ~ 21934 - 39: R_CAL<= 7 ; //21935 ~ 21974 - 40: R_CAL<= 7 ; //21975 ~ 22014 - 41: R_CAL<= 7 ; //22015 ~ 22054 - 42: R_CAL<= 7 ; //22055 ~ 22094 - 43: R_CAL<= 7 ; //22095 ~ 22134 - 44: R_CAL<= 7 ; //22135 ~ 22174 - 45: R_CAL<= 7 ; //22175 ~ 22214 - 46: R_CAL<= 7 ; //22215 ~ 22254 - 47: R_CAL<= 7 ; //22255 ~ 22294 - 48: R_CAL<= 7 ; //22295 ~ 22334 - 49: R_CAL<= 7 ; //22335 ~ 22374 - 50: R_CAL<= 7 ; //22375 ~ 22414 - 51: R_CAL<= 7 ; //22415 ~ 22454 - 52: R_CAL<= 7 ; //22455 ~ 22494 - 53: R_CAL<= 7 ; //22495 ~ 22534 - 54: R_CAL<= 7 ; //22535 ~ 22574 - 55: R_CAL<= 7 ; //22575 ~ 22614 - 56: R_CAL<= 7 ; //22615 ~ 22654 - 57: R_CAL<= 7 ; //22655 ~ 22694 - 58: R_CAL<= 7 ; //22695 ~ 22734 - 59: R_CAL<= 7 ; //22735 ~ 22774 - 60: R_CAL<= 7 ; //22775 ~ 22814 - 61: R_CAL<= 7 ; //22815 ~ 22854 - 62: R_CAL<= 7 ; //22855 ~ 22894 - 63: R_CAL<= 8 ; //22895 ~ 22934 - 64: R_CAL<= 8 ; //22935 ~ 22974 - 65: R_CAL<= 8 ; //22975 ~ 23014 - 66: R_CAL<= 8 ; //23015 ~ 23054 - 67: R_CAL<= 7 ; //23055 ~ 23094 - 68: R_CAL<= 7 ; //23095 ~ 23134 - 69: R_CAL<= 7 ; //23135 ~ 23174 - 70: R_CAL<= 7 ; //23175 ~ 23214 - 71: R_CAL<= 7 ; //23215 ~ 23254 - 72: R_CAL<= 7 ; //23255 ~ 23294 - 73: R_CAL<= 6 ; //23295 ~ 23334 - 74: R_CAL<= 6 ; //23335 ~ 23374 - 75: R_CAL<= 6 ; //23375 ~ 23414 - 76: R_CAL<= 6 ; //23415 ~ 23454 - 77: R_CAL<= 6 ; //23455 ~ 23494 - 78: R_CAL<= 5 ; //23495 ~ 23534 - 79: R_CAL<= 5 ; //23535 ~ 23574 - 80: R_CAL<= 6 ; //23575 ~ 23614 - 81: R_CAL<= 5 ; //23615 ~ 23654 - 82: R_CAL<= 5 ; //23655 ~ 23694 - 83: R_CAL<= 6 ; //23695 ~ 23734 - 84: R_CAL<= 5 ; //23735 ~ 23774 - 85: R_CAL<= 6 ; //23775 ~ 23814 - 86: R_CAL<= 6 ; //23815 ~ 23854 - 87: R_CAL<= 6 ; //23855 ~ 23875 - default:R_CAL<=R_CAL; - endcase - end - else begin//低温校准接收通é“2 - case(fre_mode) - 0 : R_CAL<= 6 ; //20375 ~ 20414 - 1 : R_CAL<= 6 ; //20415 ~ 20454 - 2 : R_CAL<= 6 ; //20455 ~ 20494 - 3 : R_CAL<= 5 ; //20495 ~ 20534 - 4 : R_CAL<= 5 ; //20535 ~ 20574 - 5 : R_CAL<= 5 ; //20575 ~ 20614 - 6 : R_CAL<= 5 ; //20615 ~ 20654 - 7 : R_CAL<= 5 ; //20655 ~ 20694 - 8 : R_CAL<= 5 ; //20695 ~ 20734 - 9 : R_CAL<= 5 ; //20735 ~ 20774 - 10: R_CAL<= 5 ; //20775 ~ 20814 - 11: R_CAL<= 5 ; //20815 ~ 20854 - 12: R_CAL<= 5 ; //20855 ~ 20894 - 13: R_CAL<= 5 ; //20895 ~ 20934 - 14: R_CAL<= 5 ; //20935 ~ 20974 - 15: R_CAL<= 6 ; //20975 ~ 21014 - 16: R_CAL<= 6 ; //21015 ~ 21054 - 17: R_CAL<= 6 ; //21055 ~ 21094 - 18: R_CAL<= 6 ; //21095 ~ 21134 - 19: R_CAL<= 6 ; //21135 ~ 21174 - 20: R_CAL<= 6 ; //21175 ~ 21214 - 21: R_CAL<= 7 ; //21215 ~ 21254 - 22: R_CAL<= 7 ; //21255 ~ 21294 - 23: R_CAL<= 7 ; //21295 ~ 21334 - 24: R_CAL<= 8 ; //21335 ~ 21374 - 25: R_CAL<= 8 ; //21375 ~ 21414 - 26: R_CAL<= 8 ; //21415 ~ 21454 - 27: R_CAL<= 8 ; //21455 ~ 21494 - 28: R_CAL<= 8 ; //21495 ~ 21534 - 29: R_CAL<= 8 ; //21535 ~ 21574 - 30: R_CAL<= 8 ; //21575 ~ 21614 - 31: R_CAL<= 8 ; //21615 ~ 21654 - 32: R_CAL<= 8 ; //21655 ~ 21694 - 33: R_CAL<= 8 ; //21695 ~ 21734 - 34: R_CAL<= 8 ; //21735 ~ 21774 - 35: R_CAL<= 8 ; //21775 ~ 21814 - 36: R_CAL<= 8 ; //21815 ~ 21854 - 37: R_CAL<= 8 ; //21855 ~ 21894 - 38: R_CAL<= 7 ; //21895 ~ 21934 - 39: R_CAL<= 7 ; //21935 ~ 21974 - 40: R_CAL<= 7 ; //21975 ~ 22014 - 41: R_CAL<= 7 ; //22015 ~ 22054 - 42: R_CAL<= 7 ; //22055 ~ 22094 - 43: R_CAL<= 7 ; //22095 ~ 22134 - 44: R_CAL<= 7 ; //22135 ~ 22174 - 45: R_CAL<= 7 ; //22175 ~ 22214 - 46: R_CAL<= 7 ; //22215 ~ 22254 - 47: R_CAL<= 7 ; //22255 ~ 22294 - 48: R_CAL<= 7 ; //22295 ~ 22334 - 49: R_CAL<= 7 ; //22335 ~ 22374 - 50: R_CAL<= 7 ; //22375 ~ 22414 - 51: R_CAL<= 7 ; //22415 ~ 22454 - 52: R_CAL<= 7 ; //22455 ~ 22494 - 53: R_CAL<= 7 ; //22495 ~ 22534 - 54: R_CAL<= 7 ; //22535 ~ 22574 - 55: R_CAL<= 7 ; //22575 ~ 22614 - 56: R_CAL<= 7 ; //22615 ~ 22654 - 57: R_CAL<= 7 ; //22655 ~ 22694 - 58: R_CAL<= 7 ; //22695 ~ 22734 - 59: R_CAL<= 7 ; //22735 ~ 22774 - 60: R_CAL<= 7 ; //22775 ~ 22814 - 61: R_CAL<= 7 ; //22815 ~ 22854 - 62: R_CAL<= 7 ; //22855 ~ 22894 - 63: R_CAL<= 8 ; //22895 ~ 22934 - 64: R_CAL<= 8 ; //22935 ~ 22974 - 65: R_CAL<= 8 ; //22975 ~ 23014 - 66: R_CAL<= 8 ; //23015 ~ 23054 - 67: R_CAL<= 7 ; //23055 ~ 23094 - 68: R_CAL<= 7 ; //23095 ~ 23134 - 69: R_CAL<= 7 ; //23135 ~ 23174 - 70: R_CAL<= 7 ; //23175 ~ 23214 - 71: R_CAL<= 7 ; //23215 ~ 23254 - 72: R_CAL<= 7 ; //23255 ~ 23294 - 73: R_CAL<= 6 ; //23295 ~ 23334 - 74: R_CAL<= 6 ; //23335 ~ 23374 - 75: R_CAL<= 6 ; //23375 ~ 23414 - 76: R_CAL<= 6 ; //23415 ~ 23454 - 77: R_CAL<= 6 ; //23455 ~ 23494 - 78: R_CAL<= 5 ; //23495 ~ 23534 - 79: R_CAL<= 5 ; //23535 ~ 23574 - 80: R_CAL<= 6 ; //23575 ~ 23614 - 81: R_CAL<= 5 ; //23615 ~ 23654 - 82: R_CAL<= 5 ; //23655 ~ 23694 - 83: R_CAL<= 6 ; //23695 ~ 23734 - 84: R_CAL<= 5 ; //23735 ~ 23774 - 85: R_CAL<= 6 ; //23775 ~ 23814 - 86: R_CAL<= 6 ; //23815 ~ 23854 - 87: R_CAL<= 6 ; //23855 ~ 23875 - default:R_CAL<=R_CAL; - endcase - end -end - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -endmodule diff --git a/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/sources_1/new/ant_rf/Sisyif_src/R_CAL_3.v b/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/sources_1/new/ant_rf/Sisyif_src/R_CAL_3.v deleted file mode 100644 index ec51530..0000000 --- a/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/sources_1/new/ant_rf/Sisyif_src/R_CAL_3.v +++ /dev/null @@ -1,348 +0,0 @@ -`timescale 1ns / 1ps -////////////////////////////////////////////////////////////////////////////////// -// Company: -// Engineer: -// -// Create Date: 17:05:24 04/08/2022 -// Design Name: -// Module Name: R_CAL -// Project Name: -// Target Devices: -// Tool versions: -// Description: -// -// Dependencies: -// -// Revision: -// Revision 0.01 - File Created -// Additional Comments: -// -////////////////////////////////////////////////////////////////////////////////// -module R_CAL_3( -input i_clk , -input i_rstn , -input signed[7:0] i_temp , -input [15:0] fre_mode , -output reg[3:0] R_CAL - - ); - -//接收通é“3 -always@(posedge i_clk,negedge i_rstn)begin //1dB 步进 - if(!i_rstn) - R_CAL<='d0; - else if(i_temp>=8'sd70)begin//高温校准接收通é“3 - case(fre_mode) - 0 : R_CAL<= 7 ; //20375 ~ 20414 - 1 : R_CAL<= 7 ; //20415 ~ 20454 - 2 : R_CAL<= 7 ; //20455 ~ 20494 - 3 : R_CAL<= 7 ; //20495 ~ 20534 - 4 : R_CAL<= 7 ; //20535 ~ 20574 - 5 : R_CAL<= 7 ; //20575 ~ 20614 - 6 : R_CAL<= 6 ; //20615 ~ 20654 - 7 : R_CAL<= 6 ; //20655 ~ 20694 - 8 : R_CAL<= 6 ; //20695 ~ 20734 - 9 : R_CAL<= 6 ; //20735 ~ 20774 - 10: R_CAL<= 6 ; //20775 ~ 20814 - 11: R_CAL<= 6 ; //20815 ~ 20854 - 12: R_CAL<= 6 ; //20855 ~ 20894 - 13: R_CAL<= 6 ; //20895 ~ 20934 - 14: R_CAL<= 6 ; //20935 ~ 20974 - 15: R_CAL<= 6 ; //20975 ~ 21014 - 16: R_CAL<= 6 ; //21015 ~ 21054 - 17: R_CAL<= 7 ; //21055 ~ 21094 - 18: R_CAL<= 7 ; //21095 ~ 21134 - 19: R_CAL<= 7 ; //21135 ~ 21174 - 20: R_CAL<= 8 ; //21175 ~ 21214 - 21: R_CAL<= 8 ; //21215 ~ 21254 - 22: R_CAL<= 8 ; //21255 ~ 21294 - 23: R_CAL<= 8 ; //21295 ~ 21334 - 24: R_CAL<= 8 ; //21335 ~ 21374 - 25: R_CAL<= 8 ; //21375 ~ 21414 - 26: R_CAL<= 9 ; //21415 ~ 21454 - 27: R_CAL<= 9 ; //21455 ~ 21494 - 28: R_CAL<= 9 ; //21495 ~ 21534 - 29: R_CAL<= 9 ; //21535 ~ 21574 - 30: R_CAL<= 9 ; //21575 ~ 21614 - 31: R_CAL<= 9 ; //21615 ~ 21654 - 32: R_CAL<= 9 ; //21655 ~ 21694 - 33: R_CAL<= 9 ; //21695 ~ 21734 - 34: R_CAL<= 9 ; //21735 ~ 21774 - 35: R_CAL<= 9 ; //21775 ~ 21814 - 36: R_CAL<= 9 ; //21815 ~ 21854 - 37: R_CAL<= 9 ; //21855 ~ 21894 - 38: R_CAL<= 9 ; //21895 ~ 21934 - 39: R_CAL<= 9 ; //21935 ~ 21974 - 40: R_CAL<= 8 ; //21975 ~ 22014 - 41: R_CAL<= 8 ; //22015 ~ 22054 - 42: R_CAL<= 8 ; //22055 ~ 22094 - 43: R_CAL<= 8 ; //22095 ~ 22134 - 44: R_CAL<= 8 ; //22135 ~ 22174 - 45: R_CAL<= 8 ; //22175 ~ 22214 - 46: R_CAL<= 8 ; //22215 ~ 22254 - 47: R_CAL<= 8 ; //22255 ~ 22294 - 48: R_CAL<= 8 ; //22295 ~ 22334 - 49: R_CAL<= 8 ; //22335 ~ 22374 - 50: R_CAL<= 8 ; //22375 ~ 22414 - 51: R_CAL<= 8 ; //22415 ~ 22454 - 52: R_CAL<= 8 ; //22455 ~ 22494 - 53: R_CAL<= 8 ; //22495 ~ 22534 - 54: R_CAL<= 8 ; //22535 ~ 22574 - 55: R_CAL<= 8 ; //22575 ~ 22614 - 56: R_CAL<= 8 ; //22615 ~ 22654 - 57: R_CAL<= 8 ; //22655 ~ 22694 - 58: R_CAL<= 8 ; //22695 ~ 22734 - 59: R_CAL<= 8 ; //22735 ~ 22774 - 60: R_CAL<= 8 ; //22775 ~ 22814 - 61: R_CAL<= 8 ; //22815 ~ 22854 - 62: R_CAL<= 8 ; //22855 ~ 22894 - 63: R_CAL<= 9 ; //22895 ~ 22934 - 64: R_CAL<= 9 ; //22935 ~ 22974 - 65: R_CAL<= 9 ; //22975 ~ 23014 - 66: R_CAL<= 9 ; //23015 ~ 23054 - 67: R_CAL<= 9 ; //23055 ~ 23094 - 68: R_CAL<= 8 ; //23095 ~ 23134 - 69: R_CAL<= 8 ; //23135 ~ 23174 - 70: R_CAL<= 8 ; //23175 ~ 23214 - 71: R_CAL<= 8 ; //23215 ~ 23254 - 72: R_CAL<= 8 ; //23255 ~ 23294 - 73: R_CAL<= 7 ; //23295 ~ 23334 - 74: R_CAL<= 7 ; //23335 ~ 23374 - 75: R_CAL<= 7 ; //23375 ~ 23414 - 76: R_CAL<= 7 ; //23415 ~ 23454 - 77: R_CAL<= 7 ; //23455 ~ 23494 - 78: R_CAL<= 7 ; //23495 ~ 23534 - 79: R_CAL<= 7 ; //23535 ~ 23574 - 80: R_CAL<= 7 ; //23575 ~ 23614 - 81: R_CAL<= 7 ; //23615 ~ 23654 - 82: R_CAL<= 7 ; //23655 ~ 23694 - 83: R_CAL<= 7 ; //23695 ~ 23734 - 84: R_CAL<= 7 ; //23735 ~ 23774 - 85: R_CAL<= 7 ; //23775 ~ 23814 - 86: R_CAL<= 7 ; //23815 ~ 23854 - 87: R_CAL<= 7 ; //23855 ~ 23875 - default:R_CAL<=R_CAL; - endcase - end - - else if(i_temp>=8'sd0)begin//常温校准接收通é“3 - case(fre_mode) - 0 : R_CAL<= 7 ; //20375 ~ 20414 - 1 : R_CAL<= 7 ; //20415 ~ 20454 - 2 : R_CAL<= 7 ; //20455 ~ 20494 - 3 : R_CAL<= 7 ; //20495 ~ 20534 - 4 : R_CAL<= 7 ; //20535 ~ 20574 - 5 : R_CAL<= 7 ; //20575 ~ 20614 - 6 : R_CAL<= 6 ; //20615 ~ 20654 - 7 : R_CAL<= 6 ; //20655 ~ 20694 - 8 : R_CAL<= 6 ; //20695 ~ 20734 - 9 : R_CAL<= 6 ; //20735 ~ 20774 - 10: R_CAL<= 6 ; //20775 ~ 20814 - 11: R_CAL<= 6 ; //20815 ~ 20854 - 12: R_CAL<= 6 ; //20855 ~ 20894 - 13: R_CAL<= 6 ; //20895 ~ 20934 - 14: R_CAL<= 6 ; //20935 ~ 20974 - 15: R_CAL<= 6 ; //20975 ~ 21014 - 16: R_CAL<= 6 ; //21015 ~ 21054 - 17: R_CAL<= 7 ; //21055 ~ 21094 - 18: R_CAL<= 7 ; //21095 ~ 21134 - 19: R_CAL<= 7 ; //21135 ~ 21174 - 20: R_CAL<= 8 ; //21175 ~ 21214 - 21: R_CAL<= 8 ; //21215 ~ 21254 - 22: R_CAL<= 8 ; //21255 ~ 21294 - 23: R_CAL<= 8 ; //21295 ~ 21334 - 24: R_CAL<= 8 ; //21335 ~ 21374 - 25: R_CAL<= 8 ; //21375 ~ 21414 - 26: R_CAL<= 9 ; //21415 ~ 21454 - 27: R_CAL<= 9 ; //21455 ~ 21494 - 28: R_CAL<= 9 ; //21495 ~ 21534 - 29: R_CAL<= 9 ; //21535 ~ 21574 - 30: R_CAL<= 9 ; //21575 ~ 21614 - 31: R_CAL<= 9 ; //21615 ~ 21654 - 32: R_CAL<= 9 ; //21655 ~ 21694 - 33: R_CAL<= 9 ; //21695 ~ 21734 - 34: R_CAL<= 9 ; //21735 ~ 21774 - 35: R_CAL<= 9 ; //21775 ~ 21814 - 36: R_CAL<= 9 ; //21815 ~ 21854 - 37: R_CAL<= 9 ; //21855 ~ 21894 - 38: R_CAL<= 9 ; //21895 ~ 21934 - 39: R_CAL<= 9 ; //21935 ~ 21974 - 40: R_CAL<= 8 ; //21975 ~ 22014 - 41: R_CAL<= 8 ; //22015 ~ 22054 - 42: R_CAL<= 8 ; //22055 ~ 22094 - 43: R_CAL<= 8 ; //22095 ~ 22134 - 44: R_CAL<= 8 ; //22135 ~ 22174 - 45: R_CAL<= 8 ; //22175 ~ 22214 - 46: R_CAL<= 8 ; //22215 ~ 22254 - 47: R_CAL<= 8 ; //22255 ~ 22294 - 48: R_CAL<= 8 ; //22295 ~ 22334 - 49: R_CAL<= 8 ; //22335 ~ 22374 - 50: R_CAL<= 8 ; //22375 ~ 22414 - 51: R_CAL<= 8 ; //22415 ~ 22454 - 52: R_CAL<= 8 ; //22455 ~ 22494 - 53: R_CAL<= 8 ; //22495 ~ 22534 - 54: R_CAL<= 8 ; //22535 ~ 22574 - 55: R_CAL<= 8 ; //22575 ~ 22614 - 56: R_CAL<= 8 ; //22615 ~ 22654 - 57: R_CAL<= 8 ; //22655 ~ 22694 - 58: R_CAL<= 8 ; //22695 ~ 22734 - 59: R_CAL<= 8 ; //22735 ~ 22774 - 60: R_CAL<= 8 ; //22775 ~ 22814 - 61: R_CAL<= 8 ; //22815 ~ 22854 - 62: R_CAL<= 8 ; //22855 ~ 22894 - 63: R_CAL<= 9 ; //22895 ~ 22934 - 64: R_CAL<= 9 ; //22935 ~ 22974 - 65: R_CAL<= 9 ; //22975 ~ 23014 - 66: R_CAL<= 9 ; //23015 ~ 23054 - 67: R_CAL<= 9 ; //23055 ~ 23094 - 68: R_CAL<= 8 ; //23095 ~ 23134 - 69: R_CAL<= 8 ; //23135 ~ 23174 - 70: R_CAL<= 8 ; //23175 ~ 23214 - 71: R_CAL<= 8 ; //23215 ~ 23254 - 72: R_CAL<= 8 ; //23255 ~ 23294 - 73: R_CAL<= 7 ; //23295 ~ 23334 - 74: R_CAL<= 7 ; //23335 ~ 23374 - 75: R_CAL<= 7 ; //23375 ~ 23414 - 76: R_CAL<= 7 ; //23415 ~ 23454 - 77: R_CAL<= 7 ; //23455 ~ 23494 - 78: R_CAL<= 7 ; //23495 ~ 23534 - 79: R_CAL<= 7 ; //23535 ~ 23574 - 80: R_CAL<= 7 ; //23575 ~ 23614 - 81: R_CAL<= 7 ; //23615 ~ 23654 - 82: R_CAL<= 7 ; //23655 ~ 23694 - 83: R_CAL<= 7 ; //23695 ~ 23734 - 84: R_CAL<= 7 ; //23735 ~ 23774 - 85: R_CAL<= 7 ; //23775 ~ 23814 - 86: R_CAL<= 7 ; //23815 ~ 23854 - 87: R_CAL<= 7 ; //23855 ~ 23875 - default:R_CAL<=R_CAL; - endcase - end - else begin//低温校准接收通é“3 - case(fre_mode) - 0 : R_CAL<= 7 ; //20375 ~ 20414 - 1 : R_CAL<= 7 ; //20415 ~ 20454 - 2 : R_CAL<= 7 ; //20455 ~ 20494 - 3 : R_CAL<= 7 ; //20495 ~ 20534 - 4 : R_CAL<= 7 ; //20535 ~ 20574 - 5 : R_CAL<= 7 ; //20575 ~ 20614 - 6 : R_CAL<= 6 ; //20615 ~ 20654 - 7 : R_CAL<= 6 ; //20655 ~ 20694 - 8 : R_CAL<= 6 ; //20695 ~ 20734 - 9 : R_CAL<= 6 ; //20735 ~ 20774 - 10: R_CAL<= 6 ; //20775 ~ 20814 - 11: R_CAL<= 6 ; //20815 ~ 20854 - 12: R_CAL<= 6 ; //20855 ~ 20894 - 13: R_CAL<= 6 ; //20895 ~ 20934 - 14: R_CAL<= 6 ; //20935 ~ 20974 - 15: R_CAL<= 6 ; //20975 ~ 21014 - 16: R_CAL<= 6 ; //21015 ~ 21054 - 17: R_CAL<= 7 ; //21055 ~ 21094 - 18: R_CAL<= 7 ; //21095 ~ 21134 - 19: R_CAL<= 7 ; //21135 ~ 21174 - 20: R_CAL<= 8 ; //21175 ~ 21214 - 21: R_CAL<= 8 ; //21215 ~ 21254 - 22: R_CAL<= 8 ; //21255 ~ 21294 - 23: R_CAL<= 8 ; //21295 ~ 21334 - 24: R_CAL<= 8 ; //21335 ~ 21374 - 25: R_CAL<= 8 ; //21375 ~ 21414 - 26: R_CAL<= 9 ; //21415 ~ 21454 - 27: R_CAL<= 9 ; //21455 ~ 21494 - 28: R_CAL<= 9 ; //21495 ~ 21534 - 29: R_CAL<= 9 ; //21535 ~ 21574 - 30: R_CAL<= 9 ; //21575 ~ 21614 - 31: R_CAL<= 9 ; //21615 ~ 21654 - 32: R_CAL<= 9 ; //21655 ~ 21694 - 33: R_CAL<= 9 ; //21695 ~ 21734 - 34: R_CAL<= 9 ; //21735 ~ 21774 - 35: R_CAL<= 9 ; //21775 ~ 21814 - 36: R_CAL<= 9 ; //21815 ~ 21854 - 37: R_CAL<= 9 ; //21855 ~ 21894 - 38: R_CAL<= 9 ; //21895 ~ 21934 - 39: R_CAL<= 9 ; //21935 ~ 21974 - 40: R_CAL<= 8 ; //21975 ~ 22014 - 41: R_CAL<= 8 ; //22015 ~ 22054 - 42: R_CAL<= 8 ; //22055 ~ 22094 - 43: R_CAL<= 8 ; //22095 ~ 22134 - 44: R_CAL<= 8 ; //22135 ~ 22174 - 45: R_CAL<= 8 ; //22175 ~ 22214 - 46: R_CAL<= 8 ; //22215 ~ 22254 - 47: R_CAL<= 8 ; //22255 ~ 22294 - 48: R_CAL<= 8 ; //22295 ~ 22334 - 49: R_CAL<= 8 ; //22335 ~ 22374 - 50: R_CAL<= 8 ; //22375 ~ 22414 - 51: R_CAL<= 8 ; //22415 ~ 22454 - 52: R_CAL<= 8 ; //22455 ~ 22494 - 53: R_CAL<= 8 ; //22495 ~ 22534 - 54: R_CAL<= 8 ; //22535 ~ 22574 - 55: R_CAL<= 8 ; //22575 ~ 22614 - 56: R_CAL<= 8 ; //22615 ~ 22654 - 57: R_CAL<= 8 ; //22655 ~ 22694 - 58: R_CAL<= 8 ; //22695 ~ 22734 - 59: R_CAL<= 8 ; //22735 ~ 22774 - 60: R_CAL<= 8 ; //22775 ~ 22814 - 61: R_CAL<= 8 ; //22815 ~ 22854 - 62: R_CAL<= 8 ; //22855 ~ 22894 - 63: R_CAL<= 9 ; //22895 ~ 22934 - 64: R_CAL<= 9 ; //22935 ~ 22974 - 65: R_CAL<= 9 ; //22975 ~ 23014 - 66: R_CAL<= 9 ; //23015 ~ 23054 - 67: R_CAL<= 9 ; //23055 ~ 23094 - 68: R_CAL<= 8 ; //23095 ~ 23134 - 69: R_CAL<= 8 ; //23135 ~ 23174 - 70: R_CAL<= 8 ; //23175 ~ 23214 - 71: R_CAL<= 8 ; //23215 ~ 23254 - 72: R_CAL<= 8 ; //23255 ~ 23294 - 73: R_CAL<= 7 ; //23295 ~ 23334 - 74: R_CAL<= 7 ; //23335 ~ 23374 - 75: R_CAL<= 7 ; //23375 ~ 23414 - 76: R_CAL<= 7 ; //23415 ~ 23454 - 77: R_CAL<= 7 ; //23455 ~ 23494 - 78: R_CAL<= 7 ; //23495 ~ 23534 - 79: R_CAL<= 7 ; //23535 ~ 23574 - 80: R_CAL<= 7 ; //23575 ~ 23614 - 81: R_CAL<= 7 ; //23615 ~ 23654 - 82: R_CAL<= 7 ; //23655 ~ 23694 - 83: R_CAL<= 7 ; //23695 ~ 23734 - 84: R_CAL<= 7 ; //23735 ~ 23774 - 85: R_CAL<= 7 ; //23775 ~ 23814 - 86: R_CAL<= 7 ; //23815 ~ 23854 - 87: R_CAL<= 7 ; //23855 ~ 23875 - default:R_CAL<=R_CAL; - endcase - end -end - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -endmodule diff --git a/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/sources_1/new/ant_rf/Sisyif_src/R_CAL_4.v b/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/sources_1/new/ant_rf/Sisyif_src/R_CAL_4.v deleted file mode 100644 index eaa7f3f..0000000 --- a/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/sources_1/new/ant_rf/Sisyif_src/R_CAL_4.v +++ /dev/null @@ -1,349 +0,0 @@ -`timescale 1ns / 1ps -////////////////////////////////////////////////////////////////////////////////// -// Company: -// Engineer: -// -// Create Date: 17:05:24 04/08/2022 -// Design Name: -// Module Name: R_CAL -// Project Name: -// Target Devices: -// Tool versions: -// Description: -// -// Dependencies: -// -// Revision: -// Revision 0.01 - File Created -// Additional Comments: -// -////////////////////////////////////////////////////////////////////////////////// -module R_CAL_4( -input i_clk , -input i_rstn , -input signed[7:0] i_temp , -input [15:0] fre_mode , -output reg[3:0] R_CAL - - ); - - -//接收通é“4 -always@(posedge i_clk,negedge i_rstn)begin //1dB 步进 - if(!i_rstn) - R_CAL<='d0; - else if(i_temp>=8'sd70)begin//高温校准接收通é“4 - case(fre_mode) - 0 : R_CAL<= 7 ; //20375 ~ 20414 - 1 : R_CAL<= 7 ; //20415 ~ 20454 - 2 : R_CAL<= 7 ; //20455 ~ 20494 - 3 : R_CAL<= 7 ; //20495 ~ 20534 - 4 : R_CAL<= 7 ; //20535 ~ 20574 - 5 : R_CAL<= 7 ; //20575 ~ 20614 - 6 : R_CAL<= 7 ; //20615 ~ 20654 - 7 : R_CAL<= 7 ; //20655 ~ 20694 - 8 : R_CAL<= 7 ; //20695 ~ 20734 - 9 : R_CAL<= 7 ; //20735 ~ 20774 - 10: R_CAL<= 7 ; //20775 ~ 20814 - 11: R_CAL<= 7 ; //20815 ~ 20854 - 12: R_CAL<= 7 ; //20855 ~ 20894 - 13: R_CAL<= 7 ; //20895 ~ 20934 - 14: R_CAL<= 7 ; //20935 ~ 20974 - 15: R_CAL<= 7 ; //20975 ~ 21014 - 16: R_CAL<= 7 ; //21015 ~ 21054 - 17: R_CAL<= 7 ; //21055 ~ 21094 - 18: R_CAL<= 7 ; //21095 ~ 21134 - 19: R_CAL<= 7 ; //21135 ~ 21174 - 20: R_CAL<= 7 ; //21175 ~ 21214 - 21: R_CAL<= 7 ; //21215 ~ 21254 - 22: R_CAL<= 7 ; //21255 ~ 21294 - 23: R_CAL<= 8 ; //21295 ~ 21334 - 24: R_CAL<= 8 ; //21335 ~ 21374 - 25: R_CAL<= 8 ; //21375 ~ 21414 - 26: R_CAL<= 8 ; //21415 ~ 21454 - 27: R_CAL<= 8 ; //21455 ~ 21494 - 28: R_CAL<= 8 ; //21495 ~ 21534 - 29: R_CAL<= 8 ; //21535 ~ 21574 - 30: R_CAL<= 8 ; //21575 ~ 21614 - 31: R_CAL<= 8 ; //21615 ~ 21654 - 32: R_CAL<= 8 ; //21655 ~ 21694 - 33: R_CAL<= 8 ; //21695 ~ 21734 - 34: R_CAL<= 8 ; //21735 ~ 21774 - 35: R_CAL<= 8 ; //21775 ~ 21814 - 36: R_CAL<= 8 ; //21815 ~ 21854 - 37: R_CAL<= 8 ; //21855 ~ 21894 - 38: R_CAL<= 8 ; //21895 ~ 21934 - 39: R_CAL<= 8 ; //21935 ~ 21974 - 40: R_CAL<= 8 ; //21975 ~ 22014 - 41: R_CAL<= 8 ; //22015 ~ 22054 - 42: R_CAL<= 7 ; //22055 ~ 22094 - 43: R_CAL<= 7 ; //22095 ~ 22134 - 44: R_CAL<= 7 ; //22135 ~ 22174 - 45: R_CAL<= 7 ; //22175 ~ 22214 - 46: R_CAL<= 7 ; //22215 ~ 22254 - 47: R_CAL<= 7 ; //22255 ~ 22294 - 48: R_CAL<= 7 ; //22295 ~ 22334 - 49: R_CAL<= 7 ; //22335 ~ 22374 - 50: R_CAL<= 7 ; //22375 ~ 22414 - 51: R_CAL<= 7 ; //22415 ~ 22454 - 52: R_CAL<= 7 ; //22455 ~ 22494 - 53: R_CAL<= 7 ; //22495 ~ 22534 - 54: R_CAL<= 7 ; //22535 ~ 22574 - 55: R_CAL<= 7 ; //22575 ~ 22614 - 56: R_CAL<= 7 ; //22615 ~ 22654 - 57: R_CAL<= 7 ; //22655 ~ 22694 - 58: R_CAL<= 7 ; //22695 ~ 22734 - 59: R_CAL<= 7 ; //22735 ~ 22774 - 60: R_CAL<= 8 ; //22775 ~ 22814 - 61: R_CAL<= 8 ; //22815 ~ 22854 - 62: R_CAL<= 8 ; //22855 ~ 22894 - 63: R_CAL<= 8 ; //22895 ~ 22934 - 64: R_CAL<= 8 ; //22935 ~ 22974 - 65: R_CAL<= 8 ; //22975 ~ 23014 - 66: R_CAL<= 8 ; //23015 ~ 23054 - 67: R_CAL<= 8 ; //23055 ~ 23094 - 68: R_CAL<= 8 ; //23095 ~ 23134 - 69: R_CAL<= 8 ; //23135 ~ 23174 - 70: R_CAL<= 7 ; //23175 ~ 23214 - 71: R_CAL<= 7 ; //23215 ~ 23254 - 72: R_CAL<= 7 ; //23255 ~ 23294 - 73: R_CAL<= 7 ; //23295 ~ 23334 - 74: R_CAL<= 7 ; //23335 ~ 23374 - 75: R_CAL<= 7 ; //23375 ~ 23414 - 76: R_CAL<= 6 ; //23415 ~ 23454 - 77: R_CAL<= 6 ; //23455 ~ 23494 - 78: R_CAL<= 6 ; //23495 ~ 23534 - 79: R_CAL<= 6 ; //23535 ~ 23574 - 80: R_CAL<= 6 ; //23575 ~ 23614 - 81: R_CAL<= 6 ; //23615 ~ 23654 - 82: R_CAL<= 6 ; //23655 ~ 23694 - 83: R_CAL<= 6 ; //23695 ~ 23734 - 84: R_CAL<= 6 ; //23735 ~ 23774 - 85: R_CAL<= 6 ; //23775 ~ 23814 - 86: R_CAL<= 6 ; //23815 ~ 23854 - 87: R_CAL<= 6 ; //23855 ~ 23875 - default:R_CAL<=R_CAL; - endcase - end - - else if(i_temp>=8'sd0)begin//常温校准接收通é“4 - case(fre_mode) - 0 : R_CAL<= 7 ; //20375 ~ 20414 - 1 : R_CAL<= 7 ; //20415 ~ 20454 - 2 : R_CAL<= 7 ; //20455 ~ 20494 - 3 : R_CAL<= 7 ; //20495 ~ 20534 - 4 : R_CAL<= 7 ; //20535 ~ 20574 - 5 : R_CAL<= 7 ; //20575 ~ 20614 - 6 : R_CAL<= 7 ; //20615 ~ 20654 - 7 : R_CAL<= 7 ; //20655 ~ 20694 - 8 : R_CAL<= 7 ; //20695 ~ 20734 - 9 : R_CAL<= 7 ; //20735 ~ 20774 - 10: R_CAL<= 7 ; //20775 ~ 20814 - 11: R_CAL<= 7 ; //20815 ~ 20854 - 12: R_CAL<= 7 ; //20855 ~ 20894 - 13: R_CAL<= 7 ; //20895 ~ 20934 - 14: R_CAL<= 7 ; //20935 ~ 20974 - 15: R_CAL<= 7 ; //20975 ~ 21014 - 16: R_CAL<= 7 ; //21015 ~ 21054 - 17: R_CAL<= 7 ; //21055 ~ 21094 - 18: R_CAL<= 7 ; //21095 ~ 21134 - 19: R_CAL<= 7 ; //21135 ~ 21174 - 20: R_CAL<= 7 ; //21175 ~ 21214 - 21: R_CAL<= 7 ; //21215 ~ 21254 - 22: R_CAL<= 7 ; //21255 ~ 21294 - 23: R_CAL<= 8 ; //21295 ~ 21334 - 24: R_CAL<= 8 ; //21335 ~ 21374 - 25: R_CAL<= 8 ; //21375 ~ 21414 - 26: R_CAL<= 8 ; //21415 ~ 21454 - 27: R_CAL<= 8 ; //21455 ~ 21494 - 28: R_CAL<= 8 ; //21495 ~ 21534 - 29: R_CAL<= 8 ; //21535 ~ 21574 - 30: R_CAL<= 8 ; //21575 ~ 21614 - 31: R_CAL<= 8 ; //21615 ~ 21654 - 32: R_CAL<= 8 ; //21655 ~ 21694 - 33: R_CAL<= 8 ; //21695 ~ 21734 - 34: R_CAL<= 8 ; //21735 ~ 21774 - 35: R_CAL<= 8 ; //21775 ~ 21814 - 36: R_CAL<= 8 ; //21815 ~ 21854 - 37: R_CAL<= 8 ; //21855 ~ 21894 - 38: R_CAL<= 8 ; //21895 ~ 21934 - 39: R_CAL<= 8 ; //21935 ~ 21974 - 40: R_CAL<= 8 ; //21975 ~ 22014 - 41: R_CAL<= 8 ; //22015 ~ 22054 - 42: R_CAL<= 7 ; //22055 ~ 22094 - 43: R_CAL<= 7 ; //22095 ~ 22134 - 44: R_CAL<= 7 ; //22135 ~ 22174 - 45: R_CAL<= 7 ; //22175 ~ 22214 - 46: R_CAL<= 7 ; //22215 ~ 22254 - 47: R_CAL<= 7 ; //22255 ~ 22294 - 48: R_CAL<= 7 ; //22295 ~ 22334 - 49: R_CAL<= 7 ; //22335 ~ 22374 - 50: R_CAL<= 7 ; //22375 ~ 22414 - 51: R_CAL<= 7 ; //22415 ~ 22454 - 52: R_CAL<= 7 ; //22455 ~ 22494 - 53: R_CAL<= 7 ; //22495 ~ 22534 - 54: R_CAL<= 7 ; //22535 ~ 22574 - 55: R_CAL<= 7 ; //22575 ~ 22614 - 56: R_CAL<= 7 ; //22615 ~ 22654 - 57: R_CAL<= 7 ; //22655 ~ 22694 - 58: R_CAL<= 7 ; //22695 ~ 22734 - 59: R_CAL<= 7 ; //22735 ~ 22774 - 60: R_CAL<= 8 ; //22775 ~ 22814 - 61: R_CAL<= 8 ; //22815 ~ 22854 - 62: R_CAL<= 8 ; //22855 ~ 22894 - 63: R_CAL<= 8 ; //22895 ~ 22934 - 64: R_CAL<= 8 ; //22935 ~ 22974 - 65: R_CAL<= 8 ; //22975 ~ 23014 - 66: R_CAL<= 8 ; //23015 ~ 23054 - 67: R_CAL<= 8 ; //23055 ~ 23094 - 68: R_CAL<= 8 ; //23095 ~ 23134 - 69: R_CAL<= 8 ; //23135 ~ 23174 - 70: R_CAL<= 7 ; //23175 ~ 23214 - 71: R_CAL<= 7 ; //23215 ~ 23254 - 72: R_CAL<= 7 ; //23255 ~ 23294 - 73: R_CAL<= 7 ; //23295 ~ 23334 - 74: R_CAL<= 7 ; //23335 ~ 23374 - 75: R_CAL<= 7 ; //23375 ~ 23414 - 76: R_CAL<= 6 ; //23415 ~ 23454 - 77: R_CAL<= 6 ; //23455 ~ 23494 - 78: R_CAL<= 6 ; //23495 ~ 23534 - 79: R_CAL<= 6 ; //23535 ~ 23574 - 80: R_CAL<= 6 ; //23575 ~ 23614 - 81: R_CAL<= 6 ; //23615 ~ 23654 - 82: R_CAL<= 6 ; //23655 ~ 23694 - 83: R_CAL<= 6 ; //23695 ~ 23734 - 84: R_CAL<= 6 ; //23735 ~ 23774 - 85: R_CAL<= 6 ; //23775 ~ 23814 - 86: R_CAL<= 6 ; //23815 ~ 23854 - 87: R_CAL<= 6 ; //23855 ~ 23875 - default:R_CAL<=R_CAL; - endcase - end - else begin//低温校准接收通é“4 - case(fre_mode) - 0 : R_CAL<= 7 ; //20375 ~ 20414 - 1 : R_CAL<= 7 ; //20415 ~ 20454 - 2 : R_CAL<= 7 ; //20455 ~ 20494 - 3 : R_CAL<= 7 ; //20495 ~ 20534 - 4 : R_CAL<= 7 ; //20535 ~ 20574 - 5 : R_CAL<= 7 ; //20575 ~ 20614 - 6 : R_CAL<= 7 ; //20615 ~ 20654 - 7 : R_CAL<= 7 ; //20655 ~ 20694 - 8 : R_CAL<= 7 ; //20695 ~ 20734 - 9 : R_CAL<= 7 ; //20735 ~ 20774 - 10: R_CAL<= 7 ; //20775 ~ 20814 - 11: R_CAL<= 7 ; //20815 ~ 20854 - 12: R_CAL<= 7 ; //20855 ~ 20894 - 13: R_CAL<= 7 ; //20895 ~ 20934 - 14: R_CAL<= 7 ; //20935 ~ 20974 - 15: R_CAL<= 7 ; //20975 ~ 21014 - 16: R_CAL<= 7 ; //21015 ~ 21054 - 17: R_CAL<= 7 ; //21055 ~ 21094 - 18: R_CAL<= 7 ; //21095 ~ 21134 - 19: R_CAL<= 7 ; //21135 ~ 21174 - 20: R_CAL<= 7 ; //21175 ~ 21214 - 21: R_CAL<= 7 ; //21215 ~ 21254 - 22: R_CAL<= 7 ; //21255 ~ 21294 - 23: R_CAL<= 8 ; //21295 ~ 21334 - 24: R_CAL<= 8 ; //21335 ~ 21374 - 25: R_CAL<= 8 ; //21375 ~ 21414 - 26: R_CAL<= 8 ; //21415 ~ 21454 - 27: R_CAL<= 8 ; //21455 ~ 21494 - 28: R_CAL<= 8 ; //21495 ~ 21534 - 29: R_CAL<= 8 ; //21535 ~ 21574 - 30: R_CAL<= 8 ; //21575 ~ 21614 - 31: R_CAL<= 8 ; //21615 ~ 21654 - 32: R_CAL<= 8 ; //21655 ~ 21694 - 33: R_CAL<= 8 ; //21695 ~ 21734 - 34: R_CAL<= 8 ; //21735 ~ 21774 - 35: R_CAL<= 8 ; //21775 ~ 21814 - 36: R_CAL<= 8 ; //21815 ~ 21854 - 37: R_CAL<= 8 ; //21855 ~ 21894 - 38: R_CAL<= 8 ; //21895 ~ 21934 - 39: R_CAL<= 8 ; //21935 ~ 21974 - 40: R_CAL<= 8 ; //21975 ~ 22014 - 41: R_CAL<= 8 ; //22015 ~ 22054 - 42: R_CAL<= 7 ; //22055 ~ 22094 - 43: R_CAL<= 7 ; //22095 ~ 22134 - 44: R_CAL<= 7 ; //22135 ~ 22174 - 45: R_CAL<= 7 ; //22175 ~ 22214 - 46: R_CAL<= 7 ; //22215 ~ 22254 - 47: R_CAL<= 7 ; //22255 ~ 22294 - 48: R_CAL<= 7 ; //22295 ~ 22334 - 49: R_CAL<= 7 ; //22335 ~ 22374 - 50: R_CAL<= 7 ; //22375 ~ 22414 - 51: R_CAL<= 7 ; //22415 ~ 22454 - 52: R_CAL<= 7 ; //22455 ~ 22494 - 53: R_CAL<= 7 ; //22495 ~ 22534 - 54: R_CAL<= 7 ; //22535 ~ 22574 - 55: R_CAL<= 7 ; //22575 ~ 22614 - 56: R_CAL<= 7 ; //22615 ~ 22654 - 57: R_CAL<= 7 ; //22655 ~ 22694 - 58: R_CAL<= 7 ; //22695 ~ 22734 - 59: R_CAL<= 7 ; //22735 ~ 22774 - 60: R_CAL<= 8 ; //22775 ~ 22814 - 61: R_CAL<= 8 ; //22815 ~ 22854 - 62: R_CAL<= 8 ; //22855 ~ 22894 - 63: R_CAL<= 8 ; //22895 ~ 22934 - 64: R_CAL<= 8 ; //22935 ~ 22974 - 65: R_CAL<= 8 ; //22975 ~ 23014 - 66: R_CAL<= 8 ; //23015 ~ 23054 - 67: R_CAL<= 8 ; //23055 ~ 23094 - 68: R_CAL<= 8 ; //23095 ~ 23134 - 69: R_CAL<= 8 ; //23135 ~ 23174 - 70: R_CAL<= 7 ; //23175 ~ 23214 - 71: R_CAL<= 7 ; //23215 ~ 23254 - 72: R_CAL<= 7 ; //23255 ~ 23294 - 73: R_CAL<= 7 ; //23295 ~ 23334 - 74: R_CAL<= 7 ; //23335 ~ 23374 - 75: R_CAL<= 7 ; //23375 ~ 23414 - 76: R_CAL<= 6 ; //23415 ~ 23454 - 77: R_CAL<= 6 ; //23455 ~ 23494 - 78: R_CAL<= 6 ; //23495 ~ 23534 - 79: R_CAL<= 6 ; //23535 ~ 23574 - 80: R_CAL<= 6 ; //23575 ~ 23614 - 81: R_CAL<= 6 ; //23615 ~ 23654 - 82: R_CAL<= 6 ; //23655 ~ 23694 - 83: R_CAL<= 6 ; //23695 ~ 23734 - 84: R_CAL<= 6 ; //23735 ~ 23774 - 85: R_CAL<= 6 ; //23775 ~ 23814 - 86: R_CAL<= 6 ; //23815 ~ 23854 - 87: R_CAL<= 6 ; //23855 ~ 23875 - default:R_CAL<=R_CAL; - endcase - end -end - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -endmodule diff --git a/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/sources_1/new/ant_rf/Sisyif_src/Sisyif.v b/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/sources_1/new/ant_rf/Sisyif_src/Sisyif.v deleted file mode 100644 index 264a7db..0000000 --- a/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/sources_1/new/ant_rf/Sisyif_src/Sisyif.v +++ /dev/null @@ -1,301 +0,0 @@ -`timescale 1ns / 1ps -////////////////////////////////////////////////////////////////////////////////// -// Company: Chengdu Tiger -// Engineer: Tangxy -// -// Create Date: 14:14:49 09/06/2021 -// Design Name: -// Module Name: top -// Project Name: -// Target Devices: -// Tool versions: -// Description: -// -// Dependencies: -// -// Revision: -// Revision 0.01 - File Created -// Additional Comments: -// -////////////////////////////////////////////////////////////////////////////////// -module Sisyif( -input clk_40m , -input clk_20m , -input rst_n , -//è°ƒé›¶è‡³ä¿¡å¤„æŽ¥å£ -input SPI_CLK_F ,//SPI控制，时钟暂定50MHz，用æ¥å‘é€è·³é¢‘频点ã€å‘å°„MGC值ã€æŽ¥æ”¶MGC值 -input SPI_SYN_F ,//片选 -input SPI_MOSI_F , -output SPI_MISO_F , -input TP_EN_F ,//跳频使能控制(上å‡æ²¿æ›´æ–°) -input TR_MGC_F ,//接收å‘å°„MGC使能控制(上å‡æ²¿æ›´æ–°) -input CAL_F ,//校准MGC使能(上å‡æ²¿æ›´æ–°) -input PRF ,//高å‘低收，默认接收 - -//ä¿¡å¤„è‡³å°„é¢‘æŽ¥å£ -output standby ,//高开低待机，默认待机 -output SW_PLL ,//乒乓频率æºé€‰æ‹©0：频率æºA —— 1：频率æºB -output T ,//å‘射电æºæŽ§åˆ¶ -output R ,//接收电æºæŽ§åˆ¶ -output SW_BPF ,//开关滤波器选择 -output SCLK1 ,//é”相环A控制 -output SDIO1 ,// -output CS1 ,// -input LD1 ,// -output SCLK2 ,//é”相环B控制 -output SDIO2 ,// -output CS2 ,// -input LD2 ,// -output SCLK3 ,//点频æºæŽ§åˆ¶ -output SDIO3 ,// -output CS3 ,// -input LD3 ,// -output TMGC_16db ,//å‘射通é“MGC控制,é«˜ç”µå¹³è¡°å‡ -output TMGC_8db ,// -output TMGC_4db ,// -output TMGC_2db ,// -output TMGC_1db ,// -output RMGC_16db ,//四个接收通é“MGC控制，åŒæ—¶æŽ§åˆ¶ï¼Œé«˜ç”µå¹³è¡°å‡ -output RMGC_8db ,// -output RMGC_4db ,// -output RMGC_2db ,// -output RMGC_1db ,// -output ENABLE ,//SPI控制四个接收通é“增益校准 -output SC ,// -output SD ,// -output END_SYN ,// -input SDOUT ,// -inout DQ_WD ,//温度传感器 -output SW_RX //接收监测控制 - -); - -wire vio_rstn ; -wire [9:0] SYNC_OUT ; -wire [35:0] CONTROL0 ; -wire [35:0] CONTROL1 ; -wire [150:0] TRIG0 ; - -wire[15:0] temp_data ;//LSB =0.625 C -wire[7:0] temp ;//LSB =1°C -wire[11:0] hop_fre_code; -wire adf4371_hop1 ; -wire adf4371_hop2 ; -wire [15:0] fre_code ; -wire [7:0] tx_mgc ; -wire [7:0] rx1_mgc ; -wire [7:0] rx2_mgc ; -wire [7:0] rx3_mgc ; -wire [7:0] rx4_mgc ; -wire [3:0] cal1_mgc ; -wire [3:0] cal2_mgc ; -wire [3:0] cal3_mgc ; -wire [3:0] cal4_mgc ; -wire [7:0] tx_cal_mgc ; -wire [3:0] model ; -wire [3:0] rf_en ; -wire [31:0] frame_count; -wire [3:0] ceshi_model; -wire [15:0] current_fre_code ; -wire [15:0] cal_fre_code ; -wire [7:0] R_MGC_1 ; - -wire SW_C1; -wire SW; -wire SW2; -wire SW3; - -wire [3:0] R_CAL1; -wire [3:0] R_CAL2; -wire [3:0] R_CAL3; -wire [3:0] R_CAL4; -wire [4:0] T_CAL ; - -assign temp = temp_data[11:4] ; -assign RMGC_16db = R_MGC_1[4] ; -assign RMGC_8db = R_MGC_1[3] ; -assign RMGC_4db = R_MGC_1[2] ; -assign RMGC_2db = R_MGC_1[1] ; -assign RMGC_1db = R_MGC_1[0] ; -assign standby = rf_en == 4'b0 ; -assign T = PRF ; -assign R = ~PRF ; -assign SW_BPF = SW_C1 ; -assign SW_PLL = SW ; -assign SW_RX = rx2_mgc == 8'b0 ? 1'b0 :1'b1 ; - - -spi_slave u_spi_slave ( - .i_sys_clk(clk_40m), - .i_sys_rst_n(rst_n), - .i_spi_sck(SPI_CLK_F), - .i_spi_cs(SPI_SYN_F), - .i_spi_sdi(SPI_MOSI_F), - .o_frame_count(frame_count), - .o_fre_code(fre_code), - .o_tx_mgc(tx_mgc), - .o_model(model), - .o_rf_en(rf_en), - .o_cal1_mgc(cal1_mgc), - .o_cal2_mgc(cal2_mgc), - .o_cal3_mgc(cal3_mgc), - .o_cal4_mgc(cal4_mgc), - .o_tx_cal_mgc(tx_cal_mgc), - .o_rx1_mgc(rx1_mgc), - .o_rx2_mgc(rx2_mgc), - .o_rx3_mgc(rx3_mgc), - .o_rx4_mgc(rx4_mgc), - .o_ceshi_model(ceshi_model) - ); - -spi_master u_spi_master ( -.i_sys_rst_n (rst_n) , -.i_clk (clk_40m) , -//.debug_clk (clk_80m) , -.i_spi_sck (SPI_CLK_F) , -.i_spi_cs (SPI_SYN_F) , -.o_spi_sdo (SPI_MISO_F) , -.i_spi_sdi (SPI_MOSI_F) , -.i_LD_LO3 (LD3) , -.i_LD1 (LD1) , -.i_LD2 (LD2) , -.i_cal1_mgc (R_CAL4) , -.i_cal2_mgc (R_CAL3) , -.i_cal3_mgc (R_CAL2) , -.i_cal4_mgc (R_CAL1) , -.i_temp (temp ) , -.i_frame_count (frame_count) - ); - -mgc_ctrl u_mgc_ctrl( - .i_sys_clk (clk_40m ), - .i_rst_n (rst_n ), - .i_TR_SW_F (PRF ), - .i_TP_EN_F (TP_EN_F ), - .i_T_MGC_EN_F (TR_MGC_F ), - .i_R_MGC_EN_F (TR_MGC_F ), - .i_CAL_F (CAL_F ), - .i_fre_code (fre_code ), - .i_tx_mgc (tx_mgc ), - .i_rx1_mgc (rx1_mgc ), - .i_rx2_mgc (rx2_mgc ), - .i_rx3_mgc (rx3_mgc ), - .i_rx4_mgc (rx4_mgc ), - .i_ceshi_module (ceshi_model ), - .o_current_fre_code (current_fre_code ), - .o_cal_fre_code (cal_fre_code ), - .o_hop_fre_code (hop_fre_code ), //0(20.375GHz)~3500(23.875GHz) - .o_adf4371_hop1 (adf4371_hop1 ), //high active - .o_adf4371_hop2 (adf4371_hop2 ), - .o_SW (SW ), - .o_SW2 (SW2 ), - .o_SW3 (SW3 ), - .o_SW_C1 (SW_C1 ), - .o_T_MGC_1dB (TMGC_1db ), - .o_T_MGC_2dB (TMGC_2db ), - .o_T_MGC_4dB (TMGC_4db ), - .o_T_MGC_8dB (TMGC_8db ), - .o_T_MGC_16dB (TMGC_16db ), - .o_R_MGC_1 (R_MGC_1 ) - //.o_R_MGC_2 (R_MGC_2 ), - //.o_R_MGC_3 (R_MGC_3 ), - //.o_R_MGC_4 (R_MGC_4 ) -); - -wire cfgover; -adf4371_a u_adf4371_a ( - .sysclk (clk_40m ), - .arstn (rst_n&vio_rstn ), - .cs (CS1 ), - .mux_out (LD1 ), - .sclk (SCLK1 ), - .sdio (SDIO1 ), - .rf_en (rf_en ), - .SW_PLL (SW_PLL ), - .CAL_F (CAL_F ), - .o_cfgover (cfgover ), - .ceshi_model(ceshi_model ), - .adf4371_hop(adf4371_hop1), - .fre_code (hop_fre_code) - ); - -adf4371_b u_adf4371_b ( - .sysclk (clk_40m ), - .arstn (rst_n&vio_rstn), - .cs (CS2 ), - .mux_out (LD2 ), - .sclk (SCLK2 ), - .sdio (SDIO2 ), - .rf_en (rf_en ), - .SW_PLL (SW_PLL ), - .CAL_F (CAL_F ), - .i_cfgover (cfgover ), - .ceshi_model(ceshi_model ), - .adf4371_hop(adf4371_hop2), - .fre_code (hop_fre_code) - ); - -fre_caliatt u_fre_caliatt ( - .i_clk (clk_40m ), - .i_rstn (rst_n ), - .ENABLE (ENABLE ), - .SC (SC ), - .SD (SD ), - .END_SYN (END_SYN ), - .SDOUT (SDOUT ), - .CAL_F (CAL_F ), - .i_temp (temp ), - .i_fre_mode (current_fre_code ), - .i_cal_fre_code (cal_fre_code ), - // .SYNC_OUT (SYNC_OUT ), - .SW (SW ), - .cal1_mgc (cal1_mgc ), - .cal2_mgc (cal2_mgc ), - .cal3_mgc (cal3_mgc ), - .cal4_mgc (cal4_mgc ), - .tx_cal_mgc (tx_cal_mgc ), - .tx_mgc (tx_mgc ), - .i_ceshi_module (ceshi_model ), - .R_CAL1 (R_CAL1 ), - .R_CAL2 (R_CAL2 ), - .R_CAL3 (R_CAL3 ), - .R_CAL4 (R_CAL4 ), - .T_CAL (T_CAL ) - ); - - -adf4351_2 u_adf4351 ( - .i_sysclk(clk_20m), - .i_arstn(rst_n), - .o_ADF4351_SCK(SCLK3), - .o_ADF4351_DATA(SDIO3), - .o_ADF4351_LE(CS3), - .i_ADF4351_locked(LD3) - ); - - - ds18b20_temp u_temp ( - .clk(clk_40m), - .rstn(rst_n), - .dq(DQ_WD), - .temp_data(temp_data) - ); - - - - - - -assign vio_rstn = 1'b1; - - - - - - - - - - - - endmodule diff --git a/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/sources_1/new/ant_rf/Sisyif_src/T_CAL.v b/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/sources_1/new/ant_rf/Sisyif_src/T_CAL.v deleted file mode 100644 index ed19257..0000000 --- a/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/sources_1/new/ant_rf/Sisyif_src/T_CAL.v +++ /dev/null @@ -1,631 +0,0 @@ -`timescale 1ns / 1ps -////////////////////////////////////////////////////////////////////////////////// -// Company: -// Engineer: -// -// Create Date: 17:05:24 04/08/2022 -// Design Name: -// Module Name: T_CAL_ -// Project Name: -// Target Devices: -// Tool versions: -// Description: -// -// Dependencies: -// -// Revision: -// Revision 0.01 - File Created -// Additional Comments: -// -////////////////////////////////////////////////////////////////////////////////// -module T_CAL( -input i_clk , -input i_rstn , -input SW , -input signed[7:0] i_temp , -input [31:0] hop_fre_mode , -output reg[4:0] T_CAL_ - - ); - - - -//å‘å°„é€šé“ -always@(posedge i_clk,negedge i_rstn)begin//1dB 步进 - if(!i_rstn) - T_CAL_<='d0; - else if(SW==1'b1)//B环校准值 - begin - if(i_temp>=8'sd70)//B环高温校准值 - begin - if(hop_fre_mode<=20414) T_CAL_<= 14 ; - else if(hop_fre_mode<=20454) T_CAL_<= 14 ; - else if(hop_fre_mode<=20494) T_CAL_<= 14 ; - else if(hop_fre_mode<=20534) T_CAL_<= 14 ; - else if(hop_fre_mode<=20574) T_CAL_<= 15 ; - else if(hop_fre_mode<=20614) T_CAL_<= 15 ; - else if(hop_fre_mode<=20654) T_CAL_<= 15 ; - else if(hop_fre_mode<=20694) T_CAL_<= 15 ; - else if(hop_fre_mode<=20734) T_CAL_<= 15 ; - else if(hop_fre_mode<=20774) T_CAL_<= 16 ; - else if(hop_fre_mode<=20814) T_CAL_<= 16 ; - else if(hop_fre_mode<=20854) T_CAL_<= 16 ; - else if(hop_fre_mode<=20894) T_CAL_<= 16 ; - else if(hop_fre_mode<=20934) T_CAL_<= 16 ; - else if(hop_fre_mode<=20974) T_CAL_<= 16 ; - else if(hop_fre_mode<=21014) T_CAL_<= 16 ; - else if(hop_fre_mode<=21054) T_CAL_<= 16 ; - else if(hop_fre_mode<=21094) T_CAL_<= 15 ; - else if(hop_fre_mode<=21134) T_CAL_<= 14 ; - else if(hop_fre_mode<=21174) T_CAL_<= 14 ; - else if(hop_fre_mode<=21214) T_CAL_<= 13 ; - else if(hop_fre_mode<=21254) T_CAL_<= 13 ; - else if(hop_fre_mode<=21294) T_CAL_<= 13 ; - else if(hop_fre_mode<=21334) T_CAL_<= 13 ; - else if(hop_fre_mode<=21374) T_CAL_<= 14 ; - else if(hop_fre_mode<=21414) T_CAL_<= 14 ; - else if(hop_fre_mode<=21454) T_CAL_<= 15 ; - else if(hop_fre_mode<=21494) T_CAL_<= 15 ; - else if(hop_fre_mode<=21534) T_CAL_<= 15 ; - else if(hop_fre_mode<=21574) T_CAL_<= 15 ; - else if(hop_fre_mode<=21614) T_CAL_<= 15 ; - else if(hop_fre_mode<=21654) T_CAL_<= 15 ; - else if(hop_fre_mode<=21694) T_CAL_<= 15 ; - else if(hop_fre_mode<=21734) T_CAL_<= 14 ; - else if(hop_fre_mode<=21774) T_CAL_<= 14 ; - else if(hop_fre_mode<=21814) T_CAL_<= 13 ; - else if(hop_fre_mode<=21854) T_CAL_<= 13 ; - else if(hop_fre_mode<=21875) T_CAL_<= 13 ; - else if(hop_fre_mode<=21894) T_CAL_<= 11 ; //21894 - else if(hop_fre_mode<=21934) T_CAL_<= 11 ; - else if(hop_fre_mode<=21974) T_CAL_<= 11 ; - else if(hop_fre_mode<=22014) T_CAL_<= 11 ; - else if(hop_fre_mode<=22054) T_CAL_<= 11 ; - else if(hop_fre_mode<=22094) T_CAL_<= 11 ; - else if(hop_fre_mode<=22134) T_CAL_<= 11 ; - else if(hop_fre_mode<=22174) T_CAL_<= 11 ; - else if(hop_fre_mode<=22214) T_CAL_<= 11 ; - else if(hop_fre_mode<=22254) T_CAL_<= 11 ; - else if(hop_fre_mode<=22294) T_CAL_<= 11 ; - else if(hop_fre_mode<=22334) T_CAL_<= 11 ; - else if(hop_fre_mode<=22374) T_CAL_<= 11 ; - else if(hop_fre_mode<=22414) T_CAL_<= 11 ; - else if(hop_fre_mode<=22454) T_CAL_<= 11 ; - else if(hop_fre_mode<=22494) T_CAL_<= 11 ; - else if(hop_fre_mode<=22534) T_CAL_<= 11 ; - else if(hop_fre_mode<=22574) T_CAL_<= 11 ; - else if(hop_fre_mode<=22614) T_CAL_<= 11 ; - else if(hop_fre_mode<=22654) T_CAL_<= 11 ; - else if(hop_fre_mode<=22694) T_CAL_<= 11 ; - else if(hop_fre_mode<=22734) T_CAL_<= 11 ; - else if(hop_fre_mode<=22774) T_CAL_<= 11 ; - else if(hop_fre_mode<=22814) T_CAL_<= 11 ; - else if(hop_fre_mode<=22854) T_CAL_<= 11 ; - else if(hop_fre_mode<=22894) T_CAL_<= 11 ; - else if(hop_fre_mode<=22934) T_CAL_<= 11 ; - else if(hop_fre_mode<=22974) T_CAL_<= 11 ; - else if(hop_fre_mode<=23014) T_CAL_<= 11 ; - else if(hop_fre_mode<=23054) T_CAL_<= 10 ; - else if(hop_fre_mode<=23094) T_CAL_<= 10 ; - else if(hop_fre_mode<=23134) T_CAL_<= 10 ; - else if(hop_fre_mode<=23174) T_CAL_<= 10 ; - else if(hop_fre_mode<=23214) T_CAL_<= 10 ; - else if(hop_fre_mode<=23254) T_CAL_<= 10 ; - else if(hop_fre_mode<=23294) T_CAL_<= 10 ; - else if(hop_fre_mode<=23334) T_CAL_<= 10 ; - else if(hop_fre_mode<=23374) T_CAL_<= 10 ; - else if(hop_fre_mode<=23414) T_CAL_<= 10 ; - else if(hop_fre_mode<=23454) T_CAL_<= 10 ; - else if(hop_fre_mode<=23494) T_CAL_<= 10 ; - else if(hop_fre_mode<=23534) T_CAL_<= 10 ; - else if(hop_fre_mode<=23574) T_CAL_<= 10 ; - else if(hop_fre_mode<=23614) T_CAL_<= 9 ; - else if(hop_fre_mode<=23654) T_CAL_<= 9 ; - else if(hop_fre_mode<=23694) T_CAL_<= 9 ; - else if(hop_fre_mode<=23734) T_CAL_<= 9 ; - else if(hop_fre_mode<=23774) T_CAL_<= 9 ; - else if(hop_fre_mode<=23814) T_CAL_<= 9 ; - else if(hop_fre_mode<=23854) T_CAL_<= 9 ; - else if(hop_fre_mode<=23875) T_CAL_<= 9 ; - end - - else if(i_temp>=8'sd0)//B环常温校准值 - begin - if(hop_fre_mode<=20414) T_CAL_<= 14 ; - else if(hop_fre_mode<=20454) T_CAL_<= 14 ; - else if(hop_fre_mode<=20494) T_CAL_<= 14 ; - else if(hop_fre_mode<=20534) T_CAL_<= 14 ; - else if(hop_fre_mode<=20574) T_CAL_<= 15 ; - else if(hop_fre_mode<=20614) T_CAL_<= 15 ; - else if(hop_fre_mode<=20654) T_CAL_<= 15 ; - else if(hop_fre_mode<=20694) T_CAL_<= 15 ; - else if(hop_fre_mode<=20734) T_CAL_<= 15 ; - else if(hop_fre_mode<=20774) T_CAL_<= 16 ; - else if(hop_fre_mode<=20814) T_CAL_<= 16 ; - else if(hop_fre_mode<=20854) T_CAL_<= 16 ; - else if(hop_fre_mode<=20894) T_CAL_<= 16 ; - else if(hop_fre_mode<=20934) T_CAL_<= 16 ; - else if(hop_fre_mode<=20974) T_CAL_<= 16 ; - else if(hop_fre_mode<=21014) T_CAL_<= 16 ; - else if(hop_fre_mode<=21054) T_CAL_<= 16 ; - else if(hop_fre_mode<=21094) T_CAL_<= 15 ; - else if(hop_fre_mode<=21134) T_CAL_<= 14 ; - else if(hop_fre_mode<=21174) T_CAL_<= 14 ; - else if(hop_fre_mode<=21214) T_CAL_<= 13 ; - else if(hop_fre_mode<=21254) T_CAL_<= 13 ; - else if(hop_fre_mode<=21294) T_CAL_<= 13 ; - else if(hop_fre_mode<=21334) T_CAL_<= 13 ; - else if(hop_fre_mode<=21374) T_CAL_<= 14 ; - else if(hop_fre_mode<=21414) T_CAL_<= 14 ; - else if(hop_fre_mode<=21454) T_CAL_<= 15 ; - else if(hop_fre_mode<=21494) T_CAL_<= 15 ; - else if(hop_fre_mode<=21534) T_CAL_<= 15 ; - else if(hop_fre_mode<=21574) T_CAL_<= 15 ; - else if(hop_fre_mode<=21614) T_CAL_<= 15 ; - else if(hop_fre_mode<=21654) T_CAL_<= 15 ; - else if(hop_fre_mode<=21694) T_CAL_<= 15 ; - else if(hop_fre_mode<=21734) T_CAL_<= 14 ; - else if(hop_fre_mode<=21774) T_CAL_<= 14 ; - else if(hop_fre_mode<=21814) T_CAL_<= 13 ; - else if(hop_fre_mode<=21854) T_CAL_<= 13 ; - else if(hop_fre_mode<=21875) T_CAL_<= 13 ; - else if(hop_fre_mode<=21894) T_CAL_<= 11 ; //21894 - else if(hop_fre_mode<=21934) T_CAL_<= 11 ; - else if(hop_fre_mode<=21974) T_CAL_<= 11 ; - else if(hop_fre_mode<=22014) T_CAL_<= 11 ; - else if(hop_fre_mode<=22054) T_CAL_<= 11 ; - else if(hop_fre_mode<=22094) T_CAL_<= 11 ; - else if(hop_fre_mode<=22134) T_CAL_<= 11 ; - else if(hop_fre_mode<=22174) T_CAL_<= 11 ; - else if(hop_fre_mode<=22214) T_CAL_<= 11 ; - else if(hop_fre_mode<=22254) T_CAL_<= 11 ; - else if(hop_fre_mode<=22294) T_CAL_<= 11 ; - else if(hop_fre_mode<=22334) T_CAL_<= 11 ; - else if(hop_fre_mode<=22374) T_CAL_<= 11 ; - else if(hop_fre_mode<=22414) T_CAL_<= 11 ; - else if(hop_fre_mode<=22454) T_CAL_<= 11 ; - else if(hop_fre_mode<=22494) T_CAL_<= 11 ; - else if(hop_fre_mode<=22534) T_CAL_<= 11 ; - else if(hop_fre_mode<=22574) T_CAL_<= 11 ; - else if(hop_fre_mode<=22614) T_CAL_<= 11 ; - else if(hop_fre_mode<=22654) T_CAL_<= 11 ; - else if(hop_fre_mode<=22694) T_CAL_<= 11 ; - else if(hop_fre_mode<=22734) T_CAL_<= 11 ; - else if(hop_fre_mode<=22774) T_CAL_<= 11 ; - else if(hop_fre_mode<=22814) T_CAL_<= 11 ; - else if(hop_fre_mode<=22854) T_CAL_<= 11 ; - else if(hop_fre_mode<=22894) T_CAL_<= 11 ; - else if(hop_fre_mode<=22934) T_CAL_<= 11 ; - else if(hop_fre_mode<=22974) T_CAL_<= 11 ; - else if(hop_fre_mode<=23014) T_CAL_<= 11 ; - else if(hop_fre_mode<=23054) T_CAL_<= 10 ; - else if(hop_fre_mode<=23094) T_CAL_<= 10 ; - else if(hop_fre_mode<=23134) T_CAL_<= 10 ; - else if(hop_fre_mode<=23174) T_CAL_<= 10 ; - else if(hop_fre_mode<=23214) T_CAL_<= 10 ; - else if(hop_fre_mode<=23254) T_CAL_<= 10 ; - else if(hop_fre_mode<=23294) T_CAL_<= 10 ; - else if(hop_fre_mode<=23334) T_CAL_<= 10 ; - else if(hop_fre_mode<=23374) T_CAL_<= 10 ; - else if(hop_fre_mode<=23414) T_CAL_<= 10 ; - else if(hop_fre_mode<=23454) T_CAL_<= 10 ; - else if(hop_fre_mode<=23494) T_CAL_<= 10 ; - else if(hop_fre_mode<=23534) T_CAL_<= 10 ; - else if(hop_fre_mode<=23574) T_CAL_<= 10 ; - else if(hop_fre_mode<=23614) T_CAL_<= 9 ; - else if(hop_fre_mode<=23654) T_CAL_<= 9 ; - else if(hop_fre_mode<=23694) T_CAL_<= 9 ; - else if(hop_fre_mode<=23734) T_CAL_<= 9 ; - else if(hop_fre_mode<=23774) T_CAL_<= 9 ; - else if(hop_fre_mode<=23814) T_CAL_<= 9 ; - else if(hop_fre_mode<=23854) T_CAL_<= 9 ; - else if(hop_fre_mode<=23875) T_CAL_<= 9 ; - end - - else //B环低温校准值 - begin - if(hop_fre_mode<=20414) T_CAL_<= 14 ; - else if(hop_fre_mode<=20454) T_CAL_<= 14 ; - else if(hop_fre_mode<=20494) T_CAL_<= 14 ; - else if(hop_fre_mode<=20534) T_CAL_<= 14 ; - else if(hop_fre_mode<=20574) T_CAL_<= 15 ; - else if(hop_fre_mode<=20614) T_CAL_<= 15 ; - else if(hop_fre_mode<=20654) T_CAL_<= 15 ; - else if(hop_fre_mode<=20694) T_CAL_<= 15 ; - else if(hop_fre_mode<=20734) T_CAL_<= 15 ; - else if(hop_fre_mode<=20774) T_CAL_<= 16 ; - else if(hop_fre_mode<=20814) T_CAL_<= 16 ; - else if(hop_fre_mode<=20854) T_CAL_<= 16 ; - else if(hop_fre_mode<=20894) T_CAL_<= 16 ; - else if(hop_fre_mode<=20934) T_CAL_<= 16 ; - else if(hop_fre_mode<=20974) T_CAL_<= 16 ; - else if(hop_fre_mode<=21014) T_CAL_<= 16 ; - else if(hop_fre_mode<=21054) T_CAL_<= 16 ; - else if(hop_fre_mode<=21094) T_CAL_<= 15 ; - else if(hop_fre_mode<=21134) T_CAL_<= 14 ; - else if(hop_fre_mode<=21174) T_CAL_<= 14 ; - else if(hop_fre_mode<=21214) T_CAL_<= 13 ; - else if(hop_fre_mode<=21254) T_CAL_<= 13 ; - else if(hop_fre_mode<=21294) T_CAL_<= 13 ; - else if(hop_fre_mode<=21334) T_CAL_<= 13 ; - else if(hop_fre_mode<=21374) T_CAL_<= 14 ; - else if(hop_fre_mode<=21414) T_CAL_<= 14 ; - else if(hop_fre_mode<=21454) T_CAL_<= 15 ; - else if(hop_fre_mode<=21494) T_CAL_<= 15 ; - else if(hop_fre_mode<=21534) T_CAL_<= 15 ; - else if(hop_fre_mode<=21574) T_CAL_<= 15 ; - else if(hop_fre_mode<=21614) T_CAL_<= 15 ; - else if(hop_fre_mode<=21654) T_CAL_<= 15 ; - else if(hop_fre_mode<=21694) T_CAL_<= 15 ; - else if(hop_fre_mode<=21734) T_CAL_<= 14 ; - else if(hop_fre_mode<=21774) T_CAL_<= 14 ; - else if(hop_fre_mode<=21814) T_CAL_<= 13 ; - else if(hop_fre_mode<=21854) T_CAL_<= 13 ; - else if(hop_fre_mode<=21875) T_CAL_<= 13 ; - else if(hop_fre_mode<=21894) T_CAL_<= 11 ; //21894 - else if(hop_fre_mode<=21934) T_CAL_<= 11 ; - else if(hop_fre_mode<=21974) T_CAL_<= 11 ; - else if(hop_fre_mode<=22014) T_CAL_<= 11 ; - else if(hop_fre_mode<=22054) T_CAL_<= 11 ; - else if(hop_fre_mode<=22094) T_CAL_<= 11 ; - else if(hop_fre_mode<=22134) T_CAL_<= 11 ; - else if(hop_fre_mode<=22174) T_CAL_<= 11 ; - else if(hop_fre_mode<=22214) T_CAL_<= 11 ; - else if(hop_fre_mode<=22254) T_CAL_<= 11 ; - else if(hop_fre_mode<=22294) T_CAL_<= 11 ; - else if(hop_fre_mode<=22334) T_CAL_<= 11 ; - else if(hop_fre_mode<=22374) T_CAL_<= 11 ; - else if(hop_fre_mode<=22414) T_CAL_<= 11 ; - else if(hop_fre_mode<=22454) T_CAL_<= 11 ; - else if(hop_fre_mode<=22494) T_CAL_<= 11 ; - else if(hop_fre_mode<=22534) T_CAL_<= 11 ; - else if(hop_fre_mode<=22574) T_CAL_<= 11 ; - else if(hop_fre_mode<=22614) T_CAL_<= 11 ; - else if(hop_fre_mode<=22654) T_CAL_<= 11 ; - else if(hop_fre_mode<=22694) T_CAL_<= 11 ; - else if(hop_fre_mode<=22734) T_CAL_<= 11 ; - else if(hop_fre_mode<=22774) T_CAL_<= 11 ; - else if(hop_fre_mode<=22814) T_CAL_<= 11 ; - else if(hop_fre_mode<=22854) T_CAL_<= 11 ; - else if(hop_fre_mode<=22894) T_CAL_<= 11 ; - else if(hop_fre_mode<=22934) T_CAL_<= 11 ; - else if(hop_fre_mode<=22974) T_CAL_<= 11 ; - else if(hop_fre_mode<=23014) T_CAL_<= 11 ; - else if(hop_fre_mode<=23054) T_CAL_<= 10 ; - else if(hop_fre_mode<=23094) T_CAL_<= 10 ; - else if(hop_fre_mode<=23134) T_CAL_<= 10 ; - else if(hop_fre_mode<=23174) T_CAL_<= 10 ; - else if(hop_fre_mode<=23214) T_CAL_<= 10 ; - else if(hop_fre_mode<=23254) T_CAL_<= 10 ; - else if(hop_fre_mode<=23294) T_CAL_<= 10 ; - else if(hop_fre_mode<=23334) T_CAL_<= 10 ; - else if(hop_fre_mode<=23374) T_CAL_<= 10 ; - else if(hop_fre_mode<=23414) T_CAL_<= 10 ; - else if(hop_fre_mode<=23454) T_CAL_<= 10 ; - else if(hop_fre_mode<=23494) T_CAL_<= 10 ; - else if(hop_fre_mode<=23534) T_CAL_<= 10 ; - else if(hop_fre_mode<=23574) T_CAL_<= 10 ; - else if(hop_fre_mode<=23614) T_CAL_<= 9 ; - else if(hop_fre_mode<=23654) T_CAL_<= 9 ; - else if(hop_fre_mode<=23694) T_CAL_<= 9 ; - else if(hop_fre_mode<=23734) T_CAL_<= 9 ; - else if(hop_fre_mode<=23774) T_CAL_<= 9 ; - else if(hop_fre_mode<=23814) T_CAL_<= 9 ; - else if(hop_fre_mode<=23854) T_CAL_<= 9 ; - else if(hop_fre_mode<=23875) T_CAL_<= 9 ; - end - end - else //A环校准值 - begin - if(i_temp>=8'sd70)//A环高温校准值 - begin - if(hop_fre_mode<=20414) T_CAL_<= 14 ; - else if(hop_fre_mode<=20454) T_CAL_<= 14 ; - else if(hop_fre_mode<=20494) T_CAL_<= 14 ; - else if(hop_fre_mode<=20534) T_CAL_<= 14 ; - else if(hop_fre_mode<=20574) T_CAL_<= 15 ; - else if(hop_fre_mode<=20614) T_CAL_<= 15 ; - else if(hop_fre_mode<=20654) T_CAL_<= 15 ; - else if(hop_fre_mode<=20694) T_CAL_<= 15 ; - else if(hop_fre_mode<=20734) T_CAL_<= 15 ; - else if(hop_fre_mode<=20774) T_CAL_<= 16 ; - else if(hop_fre_mode<=20814) T_CAL_<= 16 ; - else if(hop_fre_mode<=20854) T_CAL_<= 16 ; - else if(hop_fre_mode<=20894) T_CAL_<= 16 ; - else if(hop_fre_mode<=20934) T_CAL_<= 16 ; - else if(hop_fre_mode<=20974) T_CAL_<= 16 ; - else if(hop_fre_mode<=21014) T_CAL_<= 16 ; - else if(hop_fre_mode<=21054) T_CAL_<= 16 ; - else if(hop_fre_mode<=21094) T_CAL_<= 15 ; - else if(hop_fre_mode<=21134) T_CAL_<= 14 ; - else if(hop_fre_mode<=21174) T_CAL_<= 14 ; - else if(hop_fre_mode<=21214) T_CAL_<= 13 ; - else if(hop_fre_mode<=21254) T_CAL_<= 13 ; - else if(hop_fre_mode<=21294) T_CAL_<= 13 ; - else if(hop_fre_mode<=21334) T_CAL_<= 13 ; - else if(hop_fre_mode<=21374) T_CAL_<= 14 ; - else if(hop_fre_mode<=21414) T_CAL_<= 14 ; - else if(hop_fre_mode<=21454) T_CAL_<= 15 ; - else if(hop_fre_mode<=21494) T_CAL_<= 15 ; - else if(hop_fre_mode<=21534) T_CAL_<= 15 ; - else if(hop_fre_mode<=21574) T_CAL_<= 15 ; - else if(hop_fre_mode<=21614) T_CAL_<= 15 ; - else if(hop_fre_mode<=21654) T_CAL_<= 15 ; - else if(hop_fre_mode<=21694) T_CAL_<= 15 ; - else if(hop_fre_mode<=21734) T_CAL_<= 14 ; - else if(hop_fre_mode<=21774) T_CAL_<= 14 ; - else if(hop_fre_mode<=21814) T_CAL_<= 13 ; - else if(hop_fre_mode<=21854) T_CAL_<= 13 ; - else if(hop_fre_mode<=21875) T_CAL_<= 13 ; - else if(hop_fre_mode<=21894) T_CAL_<= 11 ; //21894 - else if(hop_fre_mode<=21934) T_CAL_<= 11 ; - else if(hop_fre_mode<=21974) T_CAL_<= 11 ; - else if(hop_fre_mode<=22014) T_CAL_<= 11 ; - else if(hop_fre_mode<=22054) T_CAL_<= 11 ; - else if(hop_fre_mode<=22094) T_CAL_<= 11 ; - else if(hop_fre_mode<=22134) T_CAL_<= 11 ; - else if(hop_fre_mode<=22174) T_CAL_<= 11 ; - else if(hop_fre_mode<=22214) T_CAL_<= 11 ; - else if(hop_fre_mode<=22254) T_CAL_<= 11 ; - else if(hop_fre_mode<=22294) T_CAL_<= 11 ; - else if(hop_fre_mode<=22334) T_CAL_<= 11 ; - else if(hop_fre_mode<=22374) T_CAL_<= 11 ; - else if(hop_fre_mode<=22414) T_CAL_<= 11 ; - else if(hop_fre_mode<=22454) T_CAL_<= 11 ; - else if(hop_fre_mode<=22494) T_CAL_<= 11 ; - else if(hop_fre_mode<=22534) T_CAL_<= 11 ; - else if(hop_fre_mode<=22574) T_CAL_<= 11 ; - else if(hop_fre_mode<=22614) T_CAL_<= 11 ; - else if(hop_fre_mode<=22654) T_CAL_<= 11 ; - else if(hop_fre_mode<=22694) T_CAL_<= 11 ; - else if(hop_fre_mode<=22734) T_CAL_<= 11 ; - else if(hop_fre_mode<=22774) T_CAL_<= 11 ; - else if(hop_fre_mode<=22814) T_CAL_<= 11 ; - else if(hop_fre_mode<=22854) T_CAL_<= 11 ; - else if(hop_fre_mode<=22894) T_CAL_<= 11 ; - else if(hop_fre_mode<=22934) T_CAL_<= 11 ; - else if(hop_fre_mode<=22974) T_CAL_<= 11 ; - else if(hop_fre_mode<=23014) T_CAL_<= 11 ; - else if(hop_fre_mode<=23054) T_CAL_<= 10 ; - else if(hop_fre_mode<=23094) T_CAL_<= 10 ; - else if(hop_fre_mode<=23134) T_CAL_<= 10 ; - else if(hop_fre_mode<=23174) T_CAL_<= 10 ; - else if(hop_fre_mode<=23214) T_CAL_<= 10 ; - else if(hop_fre_mode<=23254) T_CAL_<= 10 ; - else if(hop_fre_mode<=23294) T_CAL_<= 10 ; - else if(hop_fre_mode<=23334) T_CAL_<= 10 ; - else if(hop_fre_mode<=23374) T_CAL_<= 10 ; - else if(hop_fre_mode<=23414) T_CAL_<= 10 ; - else if(hop_fre_mode<=23454) T_CAL_<= 10 ; - else if(hop_fre_mode<=23494) T_CAL_<= 10 ; - else if(hop_fre_mode<=23534) T_CAL_<= 10 ; - else if(hop_fre_mode<=23574) T_CAL_<= 10 ; - else if(hop_fre_mode<=23614) T_CAL_<= 9 ; - else if(hop_fre_mode<=23654) T_CAL_<= 9 ; - else if(hop_fre_mode<=23694) T_CAL_<= 9 ; - else if(hop_fre_mode<=23734) T_CAL_<= 9 ; - else if(hop_fre_mode<=23774) T_CAL_<= 9 ; - else if(hop_fre_mode<=23814) T_CAL_<= 9 ; - else if(hop_fre_mode<=23854) T_CAL_<= 9 ; - else if(hop_fre_mode<=23875) T_CAL_<= 9 ; - end - - else if(i_temp>=8'sd0)//A环常温校准值 - begin - if(hop_fre_mode<=20414) T_CAL_<= 14 ; //20375 ~ 20414 - else if(hop_fre_mode<=20454) T_CAL_<= 14 ; //20415 ~ 20454 - else if(hop_fre_mode<=20494) T_CAL_<= 14 ; //20455 ~ 20494 - else if(hop_fre_mode<=20534) T_CAL_<= 14 ; //20495 ~ 20534 - else if(hop_fre_mode<=20574) T_CAL_<= 15 ; //20535 ~ 20574 - else if(hop_fre_mode<=20614) T_CAL_<= 15 ; //20575 ~ 20614 - else if(hop_fre_mode<=20654) T_CAL_<= 15 ; //20615 ~ 20654 - else if(hop_fre_mode<=20694) T_CAL_<= 15 ; //20655 ~ 20694 - else if(hop_fre_mode<=20734) T_CAL_<= 15 ; //20695 ~ 20734 - else if(hop_fre_mode<=20774) T_CAL_<= 16 ; //20735 ~ 20774 - else if(hop_fre_mode<=20814) T_CAL_<= 16 ; //20775 ~ 20814 - else if(hop_fre_mode<=20854) T_CAL_<= 16 ; //20815 ~ 20854 - else if(hop_fre_mode<=20894) T_CAL_<= 16 ; //20855 ~ 20894 - else if(hop_fre_mode<=20934) T_CAL_<= 16 ; //20895 ~ 20934 - else if(hop_fre_mode<=20974) T_CAL_<= 16 ; //20935 ~ 20974 - else if(hop_fre_mode<=21014) T_CAL_<= 16 ; //20975 ~ 21014 - else if(hop_fre_mode<=21054) T_CAL_<= 16 ; //21015 ~ 21054 - else if(hop_fre_mode<=21094) T_CAL_<= 15 ; //21055 ~ 21094 - else if(hop_fre_mode<=21134) T_CAL_<= 14 ; //21095 ~ 21134 - else if(hop_fre_mode<=21174) T_CAL_<= 14 ; //21135 ~ 21174 - else if(hop_fre_mode<=21214) T_CAL_<= 13 ; //21175 ~ 21214 - else if(hop_fre_mode<=21254) T_CAL_<= 13 ; //21215 ~ 21254 - else if(hop_fre_mode<=21294) T_CAL_<= 13 ; //21255 ~ 21294 - else if(hop_fre_mode<=21334) T_CAL_<= 13 ; //21295 ~ 21334 - else if(hop_fre_mode<=21374) T_CAL_<= 14 ; //21335 ~ 21374 - else if(hop_fre_mode<=21414) T_CAL_<= 14 ; //21375 ~ 21414 - else if(hop_fre_mode<=21454) T_CAL_<= 15 ; //21415 ~ 21454 - else if(hop_fre_mode<=21494) T_CAL_<= 15 ; //21455 ~ 21494 - else if(hop_fre_mode<=21534) T_CAL_<= 15 ; //21495 ~ 21534 - else if(hop_fre_mode<=21574) T_CAL_<= 15 ; //21535 ~ 21574 - else if(hop_fre_mode<=21614) T_CAL_<= 15 ; //21575 ~ 21614 - else if(hop_fre_mode<=21654) T_CAL_<= 15 ; //21615 ~ 21654 - else if(hop_fre_mode<=21694) T_CAL_<= 15 ; //21655 ~ 21694 - else if(hop_fre_mode<=21734) T_CAL_<= 14 ; //21695 ~ 21734 - else if(hop_fre_mode<=21774) T_CAL_<= 14 ; //21735 ~ 21774 - else if(hop_fre_mode<=21814) T_CAL_<= 13 ; //21775 ~ 21814 - else if(hop_fre_mode<=21854) T_CAL_<= 13 ; //21815 ~ 21854 - else if(hop_fre_mode<=21875) T_CAL_<= 13 ; //21855 ~ 21875 - else if(hop_fre_mode<=21894) T_CAL_<= 11 ; //21874 ~ 21894 - else if(hop_fre_mode<=21934) T_CAL_<= 11 ; //21895 ~ 21934 - else if(hop_fre_mode<=21974) T_CAL_<= 11 ; //21935 ~ 21974 - else if(hop_fre_mode<=22014) T_CAL_<= 11 ; //21975 ~ 22014 - else if(hop_fre_mode<=22054) T_CAL_<= 11 ; //22015 ~ 22054 - else if(hop_fre_mode<=22094) T_CAL_<= 11 ; //22055 ~ 22094 - else if(hop_fre_mode<=22134) T_CAL_<= 11 ; //22095 ~ 22134 - else if(hop_fre_mode<=22174) T_CAL_<= 11 ; //22135 ~ 22174 - else if(hop_fre_mode<=22214) T_CAL_<= 11 ; //22175 ~ 22214 - else if(hop_fre_mode<=22254) T_CAL_<= 11 ; //22215 ~ 22254 - else if(hop_fre_mode<=22294) T_CAL_<= 11 ; //22255 ~ 22294 - else if(hop_fre_mode<=22334) T_CAL_<= 11 ; //22295 ~ 22334 - else if(hop_fre_mode<=22374) T_CAL_<= 11 ; //22335 ~ 22374 - else if(hop_fre_mode<=22414) T_CAL_<= 11 ; //22375 ~ 22414 - else if(hop_fre_mode<=22454) T_CAL_<= 11 ; //22415 ~ 22454 - else if(hop_fre_mode<=22494) T_CAL_<= 11 ; //22455 ~ 22494 - else if(hop_fre_mode<=22534) T_CAL_<= 11 ; //22495 ~ 22534 - else if(hop_fre_mode<=22574) T_CAL_<= 11 ; //22535 ~ 22574 - else if(hop_fre_mode<=22614) T_CAL_<= 11 ; //22575 ~ 22614 - else if(hop_fre_mode<=22654) T_CAL_<= 11 ; //22615 ~ 22654 - else if(hop_fre_mode<=22694) T_CAL_<= 11 ; //22655 ~ 22694 - else if(hop_fre_mode<=22734) T_CAL_<= 11 ; //22695 ~ 22734 - else if(hop_fre_mode<=22774) T_CAL_<= 11 ; //22735 ~ 22774 - else if(hop_fre_mode<=22814) T_CAL_<= 11 ; //22775 ~ 22814 - else if(hop_fre_mode<=22854) T_CAL_<= 11 ; //22815 ~ 22854 - else if(hop_fre_mode<=22894) T_CAL_<= 11 ; //22855 ~ 22894 - else if(hop_fre_mode<=22934) T_CAL_<= 11 ; //22895 ~ 22934 - else if(hop_fre_mode<=22974) T_CAL_<= 11 ; //22935 ~ 22974 - else if(hop_fre_mode<=23014) T_CAL_<= 11 ; //22975 ~ 23014 - else if(hop_fre_mode<=23054) T_CAL_<= 10 ; //23015 ~ 23054 - else if(hop_fre_mode<=23094) T_CAL_<= 10 ; //23055 ~ 23094 - else if(hop_fre_mode<=23134) T_CAL_<= 10 ; //23095 ~ 23134 - else if(hop_fre_mode<=23174) T_CAL_<= 10 ; //23135 ~ 23174 - else if(hop_fre_mode<=23214) T_CAL_<= 10 ; //23175 ~ 23214 - else if(hop_fre_mode<=23254) T_CAL_<= 10 ; //23215 ~ 23254 - else if(hop_fre_mode<=23294) T_CAL_<= 10 ; //23255 ~ 23294 - else if(hop_fre_mode<=23334) T_CAL_<= 10 ; //23295 ~ 23334 - else if(hop_fre_mode<=23374) T_CAL_<= 10 ; //23335 ~ 23374 - else if(hop_fre_mode<=23414) T_CAL_<= 10 ; //23375 ~ 23414 - else if(hop_fre_mode<=23454) T_CAL_<= 10 ; //23415 ~ 23454 - else if(hop_fre_mode<=23494) T_CAL_<= 10 ; //23455 ~ 23494 - else if(hop_fre_mode<=23534) T_CAL_<= 10 ; //23495 ~ 23534 - else if(hop_fre_mode<=23574) T_CAL_<= 10 ; //23535 ~ 23574 - else if(hop_fre_mode<=23614) T_CAL_<= 9 ; //23575 ~ 23614 - else if(hop_fre_mode<=23654) T_CAL_<= 9 ; //23615 ~ 23654 - else if(hop_fre_mode<=23694) T_CAL_<= 9 ; //23655 ~ 23694 - else if(hop_fre_mode<=23734) T_CAL_<= 9 ; //23695 ~ 23734 - else if(hop_fre_mode<=23774) T_CAL_<= 9 ; //23735 ~ 23774 - else if(hop_fre_mode<=23814) T_CAL_<= 9 ; //23775 ~ 23814 - else if(hop_fre_mode<=23854) T_CAL_<= 9 ; //23815 ~ 23854 - else if(hop_fre_mode<=23875) T_CAL_<= 9 ; //23855 ~ 23875 - end - else //A环低温校准值 - begin - if(hop_fre_mode<=20414) T_CAL_<= 14 ; - else if(hop_fre_mode<=20454) T_CAL_<= 14 ; - else if(hop_fre_mode<=20494) T_CAL_<= 14 ; - else if(hop_fre_mode<=20534) T_CAL_<= 14 ; - else if(hop_fre_mode<=20574) T_CAL_<= 15 ; - else if(hop_fre_mode<=20614) T_CAL_<= 15 ; - else if(hop_fre_mode<=20654) T_CAL_<= 15 ; - else if(hop_fre_mode<=20694) T_CAL_<= 15 ; - else if(hop_fre_mode<=20734) T_CAL_<= 15 ; - else if(hop_fre_mode<=20774) T_CAL_<= 16 ; - else if(hop_fre_mode<=20814) T_CAL_<= 16 ; - else if(hop_fre_mode<=20854) T_CAL_<= 16 ; - else if(hop_fre_mode<=20894) T_CAL_<= 16 ; - else if(hop_fre_mode<=20934) T_CAL_<= 16 ; - else if(hop_fre_mode<=20974) T_CAL_<= 16 ; - else if(hop_fre_mode<=21014) T_CAL_<= 16 ; - else if(hop_fre_mode<=21054) T_CAL_<= 16 ; - else if(hop_fre_mode<=21094) T_CAL_<= 15 ; - else if(hop_fre_mode<=21134) T_CAL_<= 14 ; - else if(hop_fre_mode<=21174) T_CAL_<= 14 ; - else if(hop_fre_mode<=21214) T_CAL_<= 13 ; - else if(hop_fre_mode<=21254) T_CAL_<= 13 ; - else if(hop_fre_mode<=21294) T_CAL_<= 13 ; - else if(hop_fre_mode<=21334) T_CAL_<= 13 ; - else if(hop_fre_mode<=21374) T_CAL_<= 14 ; - else if(hop_fre_mode<=21414) T_CAL_<= 14 ; - else if(hop_fre_mode<=21454) T_CAL_<= 15 ; - else if(hop_fre_mode<=21494) T_CAL_<= 15 ; - else if(hop_fre_mode<=21534) T_CAL_<= 15 ; - else if(hop_fre_mode<=21574) T_CAL_<= 15 ; - else if(hop_fre_mode<=21614) T_CAL_<= 15 ; - else if(hop_fre_mode<=21654) T_CAL_<= 15 ; - else if(hop_fre_mode<=21694) T_CAL_<= 15 ; - else if(hop_fre_mode<=21734) T_CAL_<= 14 ; - else if(hop_fre_mode<=21774) T_CAL_<= 14 ; - else if(hop_fre_mode<=21814) T_CAL_<= 13 ; - else if(hop_fre_mode<=21854) T_CAL_<= 13 ; - else if(hop_fre_mode<=21875) T_CAL_<= 13 ; - else if(hop_fre_mode<=21894) T_CAL_<= 11 ; //21894 - else if(hop_fre_mode<=21934) T_CAL_<= 11 ; - else if(hop_fre_mode<=21974) T_CAL_<= 11 ; - else if(hop_fre_mode<=22014) T_CAL_<= 11 ; - else if(hop_fre_mode<=22054) T_CAL_<= 11 ; - else if(hop_fre_mode<=22094) T_CAL_<= 11 ; - else if(hop_fre_mode<=22134) T_CAL_<= 11 ; - else if(hop_fre_mode<=22174) T_CAL_<= 11 ; - else if(hop_fre_mode<=22214) T_CAL_<= 11 ; - else if(hop_fre_mode<=22254) T_CAL_<= 11 ; - else if(hop_fre_mode<=22294) T_CAL_<= 11 ; - else if(hop_fre_mode<=22334) T_CAL_<= 11 ; - else if(hop_fre_mode<=22374) T_CAL_<= 11 ; - else if(hop_fre_mode<=22414) T_CAL_<= 11 ; - else if(hop_fre_mode<=22454) T_CAL_<= 11 ; - else if(hop_fre_mode<=22494) T_CAL_<= 11 ; - else if(hop_fre_mode<=22534) T_CAL_<= 11 ; - else if(hop_fre_mode<=22574) T_CAL_<= 11 ; - else if(hop_fre_mode<=22614) T_CAL_<= 11 ; - else if(hop_fre_mode<=22654) T_CAL_<= 11 ; - else if(hop_fre_mode<=22694) T_CAL_<= 11 ; - else if(hop_fre_mode<=22734) T_CAL_<= 11 ; - else if(hop_fre_mode<=22774) T_CAL_<= 11 ; - else if(hop_fre_mode<=22814) T_CAL_<= 11 ; - else if(hop_fre_mode<=22854) T_CAL_<= 11 ; - else if(hop_fre_mode<=22894) T_CAL_<= 11 ; - else if(hop_fre_mode<=22934) T_CAL_<= 11 ; - else if(hop_fre_mode<=22974) T_CAL_<= 11 ; - else if(hop_fre_mode<=23014) T_CAL_<= 11 ; - else if(hop_fre_mode<=23054) T_CAL_<= 10 ; - else if(hop_fre_mode<=23094) T_CAL_<= 10 ; - else if(hop_fre_mode<=23134) T_CAL_<= 10 ; - else if(hop_fre_mode<=23174) T_CAL_<= 10 ; - else if(hop_fre_mode<=23214) T_CAL_<= 10 ; - else if(hop_fre_mode<=23254) T_CAL_<= 10 ; - else if(hop_fre_mode<=23294) T_CAL_<= 10 ; - else if(hop_fre_mode<=23334) T_CAL_<= 10 ; - else if(hop_fre_mode<=23374) T_CAL_<= 10 ; - else if(hop_fre_mode<=23414) T_CAL_<= 10 ; - else if(hop_fre_mode<=23454) T_CAL_<= 10 ; - else if(hop_fre_mode<=23494) T_CAL_<= 10 ; - else if(hop_fre_mode<=23534) T_CAL_<= 10 ; - else if(hop_fre_mode<=23574) T_CAL_<= 10 ; - else if(hop_fre_mode<=23614) T_CAL_<= 9 ; - else if(hop_fre_mode<=23654) T_CAL_<= 9 ; - else if(hop_fre_mode<=23694) T_CAL_<= 9 ; - else if(hop_fre_mode<=23734) T_CAL_<= 9 ; - else if(hop_fre_mode<=23774) T_CAL_<= 9 ; - else if(hop_fre_mode<=23814) T_CAL_<= 9 ; - else if(hop_fre_mode<=23854) T_CAL_<= 9 ; - else if(hop_fre_mode<=23875) T_CAL_<= 9 ; - end - end - -end - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -endmodule diff --git a/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/sources_1/new/ant_rf/Sisyif_src/adf4371_a.v b/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/sources_1/new/ant_rf/Sisyif_src/adf4371_a.v deleted file mode 100644 index dc928a7..0000000 --- a/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/sources_1/new/ant_rf/Sisyif_src/adf4371_a.v +++ /dev/null @@ -1,633 +0,0 @@ - -`timescale 1ns / 1ps -////////////////////////////////////////////////////////////////////////////////// -// Company: -// Engineer: -// -// Create Date: 2021/8/13 00:24:20 -// Design Name: -// Module Name: LMX2595 -// Project Name: -// Target Devices: -// Tool Versions: -// Description: -// -// Dependencies: - -// fRFOUT= (INT+ (FRAC1+FRAC2/MOD2)/MOD1)× (fPFD/R) -// fPFD = fPFD = REFIN × ((1 + D)/(R × (1 + T))) -// Revision: -// Revision 0.01 - File Created -// Additional Comments: -////////////////////////////////////////////////////////////////////////////////// - - -module adf4371_a(//20.375Ghz ~ 23.875Ghz -input sysclk ,//40MHZ -input arstn , -output cs , -input mux_out , -output sclk , -output sdio , -input [3:0] rf_en , -input SW_PLL , -input CAL_F , -input [3:0] ceshi_model , -input adf4371_hop , -output o_cfgover , -input[11:0] fre_code - ); - -localparam DATA_WIDTH = 24 ; -localparam DATA_LENTH = 72 ; -localparam WAIT_ld = 40000 ; -//***************************************************************************** -reg[7:0] cnt_word = 8'd0 ; -reg csb_reg = 1'b1 ; -reg[5:0] cnt_bits = 6'd0 ; -reg[DATA_WIDTH-1:0] cfgdata = 0, regdata = 0 ; -reg[3:0] state = 4'b000 ; -reg spi_sdo = 1'b0, spi_csb = 1'b1; -wire pll_locked ; -reg cfgover ; -reg[31:0] cnt_lock = 32'd0 ; -reg[31:0] cnt_locked = 32'd0 ; -wire[15:0] band ; -assign o_cfgover =cfgover ; -//----------------------------------- -assign pll_locked = mux_out ; -assign sclk = spi_csb ? 1'b0 : ~sysclk ; -assign cs = spi_csb & csb_reg ; -assign sdio = spi_sdo ; -//----------------------------------- - -wire [7:0] SI_BAND_SEL ; //VCO频段 -wire [7:0] SI_VCO_SEL_BIAS_CODE ; //[7:4]=VCO内核, [3:0]=VCOåç½® -reg[13:0] MOD2 ; -reg[13:0] FRAC2 ; -reg[24:0] FRAC1 ; -reg[15:0] INT ; - -assign SI_BAND_SEL = band[15:8] ; -assign SI_VCO_SEL_BIAS_CODE = band[7:0] ; - -reg[2:0] hop_en ; -reg[15:0] code ; -reg[11:0] pre_fre_code ; -reg[3:0] rf_en_r ; -reg[2:0] CAL_F_R ; - -reg [3:0] R_DIV ; -reg [3:0] D ; -wire[13:0] douta3 ; -wire[13:0] douta4 ; -wire[24:0] douta2 ; -wire[15:0] douta1 ; -//----------------------------------- - -INT_ROMb int_rom ( - .sysclk(sysclk), - .addra(code), - .douta(douta1) - ); - -// Instantiate the module -FRAC1 frac1_rom ( - .clka(sysclk), - .addra(code), - .douta(douta2) - ); - - -// FRAC1_ROM FRAC1_ROM ( -// .clka(sysclk), // input clka -// .addra(code), // input [11 : 0] addra -// .douta(douta2) // output [24 : 0] douta -//); - -frac2_rom frac2_rom ( - .sysclk(sysclk), - .addra(code), - .douta(douta4) - ); - -mod2_rom mod2_rom ( - .sysclk(sysclk), - .addra(code), - .douta(douta3) - ); - - -band_rom_a band_rom_a ( - .sysclk(sysclk), - .addra(code), - .douta(band) // output [15 : 0] douta - ); - - -//-------------------整数边界æ‚散用66.666666Mhz鉴相---------------------------------- -always@(posedge sysclk,negedge arstn) -begin - if(!arstn) - INT<=douta1; - else if(code==24 || code==26 ) - INT<=76; - else if(code==424 ) - INT<=77; - else if(code==426 ) - INT<=78; - else if(code==824 || code==826 ) - INT<=79; - else if(code==1224) - INT<=80; - else if(code==1226 ) - INT<=81; - else if(code==1624 || code==1626 ) - INT<=82; - else if(code==2024 ) - INT<=83; - else if(code==2026 ) - INT<=84; - else if(code==2424 || code==2426 ) - INT<=85; - else if(code==2824 ) - INT<=86; - else if( code==2826 ) - INT<=87; - else - INT<=douta1; -end - -always@(posedge sysclk,negedge arstn) -begin - if(!arstn) - FRAC1<=douta2; - else if(code==24 ) - FRAC1<=16651386; - else if(code==26 ) - FRAC1<=16903045; - else if(code==424 ) - FRAC1<=33428602; - else if(code==426 ) - FRAC1<=125829; - else if(code==824 ) - FRAC1<=16651386; - else if(code==826 ) - FRAC1<=16903045; - else if(code==1224) - FRAC1<=33428602; - else if(code==1226 ) - FRAC1<=125829; - else if(code==1624) - FRAC1<=16651386; - else if(code==1626 ) - FRAC1<=16903045; - else if(code==2024 ) - FRAC1<=33428602; - else if(code==2026 ) - FRAC1<=125829; - else if(code==2424 ) - FRAC1<=16651386; - else if(code==2426 ) - FRAC1<=16903045; - else if(code==2824 ) - FRAC1<=33428602; - else if( code==2826 ) - FRAC1<=125829; - else - FRAC1<=douta2; -end - -always@(posedge sysclk,negedge arstn) -begin - if(!arstn) - MOD2<=douta3; - else if(code==24 ) - MOD2<=25; - else if(code==26 ) - MOD2<=25; - else if(code==424 ) - MOD2<=25; - else if(code==426 ) - MOD2<=25; - else if(code==824 ) - MOD2<=25; - else if(code==826 ) - MOD2<=25; - else if(code==1224) - MOD2<=25; - else if(code==1226 ) - MOD2<=25; - else if(code==1624) - MOD2<=25; - else if(code==1626 ) - MOD2<=25; - else if(code==2024 ) - MOD2<=25; - else if(code==2026 ) - MOD2<=25; - else if(code==2424 ) - MOD2<=25; - else if(code==2426 ) - MOD2<=25; - else if(code==2824 ) - MOD2<=25; - else if( code==2826 ) - MOD2<=25; - else - MOD2<=douta3; -end - -always@(posedge sysclk,negedge arstn) -begin - if(!arstn) - FRAC2<=douta4; - else if(code==24 ) - FRAC2<=22; - else if(code==26 ) - FRAC2<=3; - else if(code==424 ) - FRAC2<=22; - else if(code==426 ) - FRAC2<=3; - else if(code==824 ) - FRAC2<=22; - else if(code==826 ) - FRAC2<=3; - else if(code==1224) - FRAC2<=22; - else if(code==1226 ) - FRAC2<=3; - else if(code==1624) - FRAC2<=22; - else if(code==1626 ) - FRAC2<=3; - else if(code==2024 ) - FRAC2<=22; - else if(code==2026 ) - FRAC2<=3; - else if(code==2424 ) - FRAC2<=22; - else if(code==2426 ) - FRAC2<=3; - else if(code==2824 ) - FRAC2<=22; - else if( code==2826 ) - FRAC2<=3; - else - FRAC2<=douta4; -end - -always@(posedge sysclk,negedge arstn) -begin - if(!arstn)begin - R_DIV<=4'b1; - D<=4'b0; - end - else if(code==24 || code==26 || code==424 || code==426 || code==824 || code==826|| code==1224 || code==1226 || code==1624 || code==1626 ||code==2024 || code==2026 ||code==2424 || code==2426 ||code==2824 || code==2826 ) - begin - R_DIV<= 4'd3; - D<=4'd2; - end - else - begin - R_DIV<=4'b1; - D<=4'b0; - end -end - -//---------------------------------------------------------------- - -always@(posedge sysclk,negedge arstn)begin -if(~arstn) - pre_fre_code<=11'h6d6; -else if(CAL_F_R==3'b011) - pre_fre_code<=fre_code; -else - pre_fre_code<=pre_fre_code; -end - - -always@(posedge sysclk,negedge arstn)begin -if(~arstn) - code<=16'h0; -else if(hop_en==2'b01) - code<=fre_code; -else - code<=code; -end - - -always@(posedge sysclk,negedge arstn)begin -if(~arstn)begin - hop_en <= 3'b0; - rf_en_r <= 4'b0; - CAL_F_R <= 3'b0; -end -else begin - hop_en <= {hop_en[1:0],adf4371_hop}; - CAL_F_R <= {CAL_F_R[1:0],CAL_F}; - rf_en_r <= rf_en ; -end -end - - -always@(posedge sysclk,negedge arstn)begin -if(~arstn) - csb_reg <= 1'b1; -else - csb_reg <= spi_csb; -end - - -always@(posedge sysclk,negedge arstn)begin -if(~arstn) - cnt_locked<=32'b0; -else if(cnt_locked==WAIT_ld) - cnt_locked<=32'b0; -else if(!pll_locked) - cnt_locked<=cnt_locked+1'b1; -else - cnt_locked<=32'b0; -end - -always@(posedge sysclk,negedge arstn)begin -if(~arstn)begin - cfgdata <= 0; - cnt_word <= 7'd0; - cnt_bits <= 6'd0; - state <= 4'b0; - cnt_lock <= 32'd0; - spi_csb <= 1'b1; - cfgover <= 1'b0; - spi_sdo <= 1'b0; -end -else begin - case(state) - 4'd0:begin - cnt_word <= 7'd0; - if(rf_en==1'b1) - state <= 4'd0; - else if(cnt_lock >= 32'd4000) - state <= 4'd1; - else - state <= state; - - if(rf_en==1'b0) - cnt_lock <= cnt_lock + 1'b1; - else - cnt_lock<=32'd0; - - end - 4'd1:begin - spi_csb <= 1'b1; - spi_sdo <= 1'b0; - if(rf_en==1'b1) - state <= 4'd0; - else - state <= 4'd2; - end - 4'd2:begin - cfgdata <= regdata; - cnt_bits <= 6'd0; - state <= 4'd3; - end - 4'd3:begin - spi_csb <= 1'b0; - spi_sdo <= cfgdata[DATA_WIDTH-1]; - cfgdata <= cfgdata << 1'b1; - cnt_bits <= cnt_bits + 1'b1; - if(cnt_bits == DATA_WIDTH-1)begin - state <= 4'd4; - cnt_word <= cnt_word + 1'b1; - end - cnt_lock <= 32'd0; - end - 4'd4:begin - spi_csb <= 1'b1; - spi_sdo <= 1'b0; - cnt_lock <= 32'd0; - cnt_bits <= 32'd0; - if(cnt_word == DATA_LENTH)begin - state <= 4'd5; - end - else - state <= 4'd1; - end - 4'd5:begin - if(cnt_lock>=40000 || pll_locked)begin - cnt_lock <= 32'd0 ; - state <= 4'd6 ; - end - else begin - cnt_lock <=cnt_lock+1'b1; - state <= state ; - end - end - 4'd6:begin - cnt_word <= 7'd0; - if(pll_locked) - state <= 4'd7 ; - else - state <= 4'b1 ; - end -//---------------------------------------------------------------- - 4'd7:begin//IDLE - cnt_word <= DATA_LENTH; - spi_csb <= 1'b1; - spi_sdo <= 1'b0; - cnt_bits <= 6'd0; - cfgover <= 1'b0; - if(rf_en==4'b1) - state <= state; - else if(rf_en==4'b0 && rf_en_r==4'b1 ) - state <= 4'd0; - else if(hop_en==2'b10 || cnt_locked==WAIT_ld ) - state <= 4'd8; - else if(CAL_F_R==3'b011 && (pre_fre_code!=fre_code))//打开RF_OUT - state <= 4'd12; - else - state <= state; - end - 4'd8:begin - spi_csb <= 1'b1; - spi_sdo <= 1'b0; - state <= 4'd9; - end - 4'd9:begin - cfgdata <= regdata; - cnt_bits <= 6'd0; - state <= 4'd10; - end - 4'd10:begin - spi_csb <= 1'b0; - spi_sdo <= cfgdata[DATA_WIDTH-1]; - cfgdata <= cfgdata << 1'b1; - cnt_bits <= cnt_bits + 1'b1; - if(cnt_bits == DATA_WIDTH-1)begin - state <= 4'd11; - cnt_word <= cnt_word + 1'b1; - end - end - 4'd11:begin - spi_csb <= 1'b1; - spi_sdo <= 1'b0; - cnt_lock <= 32'd0; - cnt_bits <= 32'd0; - if(cnt_word == 8'd85)begin - state <= 4'd7; - end - else - state <= 4'd8; - end - 4'd12:begin - spi_csb <= 1'b1; - spi_sdo <= 1'b0; - state <= 4'd13; - end - 4'd13:begin - cnt_bits <= 6'd0; - state <= 4'd14; - if(ceshi_model==4'ha) - cfgdata<={16'h0025,8'h13}; - else if(ceshi_model==4'hb) - cfgdata<={16'h0025,8'h00}; - else if(SW_PLL) - cfgdata<={16'h0025,8'h13}; - else - cfgdata<={16'h0025,8'h00}; - end - 4'd14:begin - spi_csb <= 1'b0; - spi_sdo <= cfgdata[DATA_WIDTH-1]; - cfgdata <= cfgdata << 1'b1; - cnt_bits <= cnt_bits + 1'b1; - if(cnt_bits == DATA_WIDTH-1)begin - state <= 4'd7; - cfgover <= 1'b1; - cnt_word <= cnt_word ; - end - end - -//&*&#&*&#&*&#&*&#&*&#&*&#&*&#&*&#&*&#&*&#&*&#&*&#// - default: begin - spi_csb <= 1'b1; - state <= 4'd0; - cnt_lock <= 32'd0; - cnt_word <= 8'd0; - end - endcase -end -end - -always@(posedge sysclk,negedge arstn) -begin - if(!arstn) - regdata <= {16'h0000,8'h18 }; - else case(cnt_word) - 8'd0 : regdata <= {16'h0000,8'h18 }; - 8'd1 : regdata <= {16'h0001,8'h00 }; - 8'd2 : regdata <= {16'h0003,8'h00 }; - 8'd3 : regdata <= {16'h0004,8'h00 }; - 8'd4 : regdata <= {16'h0005,8'h00 }; - 8'd5 : regdata <= {16'h0006,8'hFF }; - 8'd6 : regdata <= {16'h000C,8'h00 }; - 8'd7 : regdata <= {16'h000D,8'h00 }; - 8'd8 : regdata <= {16'h0010 ,INT[7:0] } ; - 8'd9 : regdata <= {16'h0011 ,INT[15:8] } ; - 8'd10 : regdata <= {16'h0012,8'h00 };//[6]No Autocalibration - //8'd10 : regdata <= {16'h0012,8'h40 };//[6]Autocalibration - 8'd11 : regdata <= {16'h0014 ,FRAC1[7:0]} ; - 8'd12 : regdata <= {16'h0015 ,FRAC1[15:8]} ; - 8'd13 : regdata <= {16'h0016 ,FRAC1[23:16]} ; - 8'd14 : regdata <= {16'h0017 ,FRAC2[6:0],FRAC1[24]} ; - 8'd15 : regdata <= {16'h0018 ,1'b0,FRAC2[13:7] } ; - 8'd16 : regdata <= {16'h0019 ,MOD2[7:0]} ; - 8'd17 : regdata <= {16'h001A ,2'b0,MOD2[13:8]} ; - 8'd18 : regdata <= {16'h001B,8'h00 }; - 8'd19 : regdata <= {16'h001C,8'h00 }; - 8'd20 : regdata <= {16'h001D,8'h00 }; - 8'd21 : regdata <= {16'h001E,8'h18 };//CP_CURRENT 电è·æ³µ - // 8'd21 : regdata <= { 16'h001E,cp,4'h8 };//CP_CURRENT 电è·æ³µ - 8'd22 : regdata <= { 16'h001F,4'h0,R_DIV };//R DIV R分频器 - 8'd23 : regdata <= {16'h0020,8'h1c };//digital lock detect æ•°å­—é”定ld - 8'd24 : regdata <= {16'h0021,8'h00 }; - 8'd25 : regdata <= {16'h0022,D,4'd0 };//[4]2分频 [5]double 2å€é¢‘器 - 8'd26 : regdata <= {16'h0023,8'h00 }; - 8'd27 : regdata <= {16'h0024,8'h80 };//Fout_clk DIV_SEL - 8'd28 : regdata <= {16'h0025,8'h13 };//X4_EN - 8'd29 : regdata <= {16'h0026,8'h1F }; - 8'd30 : regdata <= {16'h0027,8'hCD }; - //8'd30 : regdata <= {16'h0027,8'hCD }; - 8'd31 : regdata <= {16'h0028,8'h83 }; - 8'd32 : regdata <= {16'h002A,8'h00 }; - 8'd33 : regdata <= {16'h002B,8'h00 }; - 8'd34 : regdata <= {16'h002C,8'h44 }; - 8'd35 : regdata <= {16'h002D,8'h11 }; - 8'd36 : regdata <= {16'h002E,8'h12 }; - 8'd37 : regdata <= {16'h002F,8'h94 }; - 8'd38 : regdata <= {16'h0030,8'h2A }; - 8'd39 : regdata <= {16'h0031,8'h02 }; - 8'd40 : regdata <= {16'h0032,8'h04 }; - 8'd41 : regdata <= {16'h0033,8'h22 }; - 8'd42 : regdata <= {16'h0034,8'h25 }; - 8'd43 : regdata <= {16'h0035,8'hFA }; - 8'd44 : regdata <= {16'h0036,8'h30 }; - 8'd45 : regdata <= {16'h0037,SI_BAND_SEL} ;//VCO频段 - 8'd46 : regdata <= {16'h0038,SI_VCO_SEL_BIAS_CODE };//[7:4]=VCO内核,[3:0]VCOåç½® - 8'd47 : regdata <= {16'h0039,8'h07 }; - 8'd48 : regdata <= {16'h003A,8'h55 }; - 8'd49 : regdata <= {16'h003D,8'h00 }; - 8'd50 : regdata <= {16'h003E,8'h0C }; - 8'd51 : regdata <= {16'h003F,8'h80 }; - 8'd52 : regdata <= {16'h0040,8'h50 }; - 8'd53 : regdata <= {16'h0041,8'h28 }; - 8'd54 : regdata <= {16'h0042,8'h00 }; - 8'd55 : regdata <= {16'h0043,8'h00 }; - 8'd56 : regdata <= {16'h0044,8'h00 }; - 8'd57 : regdata <= {16'h0045,8'h00 }; - 8'd58 : regdata <= {16'h0046,8'h00 }; - 8'd59 : regdata <= {16'h0047,8'hC0 }; - 8'd60 : regdata <= {16'h0052,8'hF4 }; - 8'd61 : regdata <= {16'h006C,8'h00 }; - 8'd62 : regdata <= {16'h006E,8'h00 }; - 8'd63 : regdata <= {16'h006F,8'h00 }; - 8'd64 : regdata <= {16'h0070,8'hE3 }; - 8'd65 : regdata <= {16'h0071,8'h60 }; - 8'd66 : regdata <= {16'h0072,8'h32 }; - 8'd67 : regdata <= {16'h0073,8'h00 }; - 8'd68 : regdata <= {16'h0079,8'h00 }; - 8'd69 : regdata <= {16'h007A,8'h00 }; - 8'd70 : regdata <= {16'h007B,8'h00 }; - 8'd71 : regdata <= {16'h007C,8'h00 }; - - //跳频 - 8'd72:regdata <= { 16'h0022,D,4'd0 };//double Då€é¢‘器 - 8'd73:regdata <= { 16'h001F,4'h0,R_DIV };//R DIV R分频器 - 8'd74:regdata <= { 16'h001A ,2'b0,MOD2[13:8] } ; - 8'd75:regdata <= { 16'h0019 ,MOD2[7:0] } ; - 8'd76:regdata <= { 16'h0018 ,1'b0,FRAC2[13:7] } ; - 8'd77:regdata <= { 16'h0017 ,FRAC2[6:0],FRAC1[24] } ; - 8'd78:regdata <= { 16'h0016 ,FRAC1[23:16] } ; - 8'd79:regdata <= { 16'h0015 ,FRAC1[15:8] } ; - 8'd80:regdata <= { 16'h0014 ,FRAC1[7:0] } ; - 8'd81:regdata <= { 16'h0037 ,SI_BAND_SEL } ; - 8'd82:regdata <= { 16'h0038 ,SI_VCO_SEL_BIAS_CODE } ; - 8'd83:regdata <= { 16'h0011 ,INT[15:8] } ; - 8'd84:regdata <= { 16'h0010 ,INT[7:0] } ; - - default: regdata <= regdata; -endcase -end - - - - - - - - - - - -endmodule diff --git a/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/sources_1/new/ant_rf/Sisyif_src/adf4371_b.v b/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/sources_1/new/ant_rf/Sisyif_src/adf4371_b.v deleted file mode 100644 index 7708440..0000000 --- a/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/sources_1/new/ant_rf/Sisyif_src/adf4371_b.v +++ /dev/null @@ -1,622 +0,0 @@ - -`timescale 1ns / 1ps -////////////////////////////////////////////////////////////////////////////////// -// Company: -// Engineer: -// -// Create Date: 2021/8/13 00:24:20 -// Design Name: -// Module Name: LMX2595 -// Project Name: -// Target Devices: -// Tool Versions: -// Description: -// -// Dependencies: - -// fRFOUT= (INT+ (FRAC1+FRAC2/MOD2)/MOD1)× (fPFD/R) -// fPFD = fPFD = REFIN × ((1 + D)/(R × (1 + T))) -// Revision: -// Revision 0.01 - File Created -// Additional Comments: -////////////////////////////////////////////////////////////////////////////////// - - -module adf4371_b(//20.375Ghz ~ 23.875Ghz -input sysclk ,//40MHZ -input arstn , -output cs , -input mux_out , -output sclk , -output sdio , -input [3:0] rf_en , -input CAL_F , -input SW_PLL , -input i_cfgover , -input [3:0] ceshi_model , -input adf4371_hop , -input[11:0] fre_code - ); - -localparam DATA_WIDTH = 24 ; -localparam DATA_LENTH = 72 ; -localparam WAIT_ld = 40000 ; -//***********************************************************************************************************// -reg[7:0] cnt_word = 8'd0 ; -reg csb_reg = 1'b1 ; -reg[5:0] cnt_bits = 6'd0 ; -reg[DATA_WIDTH-1:0] cfgdata = 0, regdata = 0 ; -reg[3:0] state = 4'b000 ; -reg spi_sdo = 1'b0, spi_csb = 1'b1; -wire pll_locked ; -reg[31:0] cnt_lock = 32'd0 ; -reg[31:0] cnt_locked = 32'd0 ; -wire[15:0] band ; - -//----------------------------------- -assign pll_locked = mux_out ; -assign sclk = spi_csb ? 1'b0 : ~sysclk ; -assign cs = spi_csb & csb_reg ; -assign sdio = spi_sdo ; -//----------------------------------- - -wire [7:0] SI_BAND_SEL ; //VCO频段 -wire [7:0] SI_VCO_SEL_BIAS_CODE ; //[7:4]=VCO内核, [3:0]=VCOåç½® -reg[13:0] MOD2 ; -reg[13:0] FRAC2 ; -reg[24:0] FRAC1 ; -reg[15:0] INT ; - -assign SI_BAND_SEL = band[15:8] ; -assign SI_VCO_SEL_BIAS_CODE = band[7:0] ; - -reg[2:0] hop_en; -reg[15:0] code; -reg[11:0] pre_fre_code; -reg[3:0] cp_r; -reg[3:0] rf_en_r; -reg[2:0] CAL_F_R; - -reg [3:0] R_DIV ; -reg [3:0] D ; -wire[13:0] douta3 ; -wire[13:0] douta4 ; -wire[24:0] douta2 ; -wire[15:0] douta1 ; - -//----------------------------------- -INT_ROMb int_rom ( - .sysclk(sysclk), - .addra(code), - .douta(douta1) - ); - -FRAC1 frac1_rom ( - .clka(sysclk), - .addra(code), - .douta(douta2) - ); - -// FRAC1_ROM FRAC1_ROM ( -// .clka(sysclk), // input clka -// .addra(code), // input [11 : 0] addra -// .douta(douta2) // output [24 : 0] douta -//); - -frac2_rom frac2_rom ( - .sysclk(sysclk), - .addra(code), - .douta(douta4) - ); - -mod2_rom mod2_rom ( - .sysclk(sysclk), - .addra(code), - .douta(douta3) - ); - - -band_rom_b band_rom_b ( - .sysclk(sysclk), - .addra(code), - .douta(band) // output [15 : 0] douta - ); - -//-------------------整数边界æ‚散用66.666666Mhz鉴相---------------------------------- - -always@(posedge sysclk,negedge arstn) -begin - if(!arstn) - INT<=douta1; - else if(code==24 || code==26 ) - INT<=76; - else if(code==424 ) - INT<=77; - else if(code==426 ) - INT<=78; - else if(code==824 || code==826 ) - INT<=79; - else if(code==1224) - INT<=80; - else if(code==1226 ) - INT<=81; - else if(code==1624 || code==1626 ) - INT<=82; - else if(code==2024 ) - INT<=83; - else if(code==2026 ) - INT<=84; - else if(code==2424 || code==2426 ) - INT<=85; - else if(code==2824 ) - INT<=86; - else if( code==2826 ) - INT<=87; - else - INT<=douta1; -end - -always@(posedge sysclk,negedge arstn) -begin - if(!arstn) - FRAC1<=douta2; - else if(code==24 ) - FRAC1<=16651386; - else if(code==26 ) - FRAC1<=16903045; - else if(code==424 ) - FRAC1<=33428602; - else if(code==426 ) - FRAC1<=125829; - else if(code==824 ) - FRAC1<=16651386; - else if(code==826 ) - FRAC1<=16903045; - else if(code==1224) - FRAC1<=33428602; - else if(code==1226 ) - FRAC1<=125829; - else if(code==1624) - FRAC1<=16651386; - else if(code==1626 ) - FRAC1<=16903045; - else if(code==2024 ) - FRAC1<=33428602; - else if(code==2026 ) - FRAC1<=125829; - else if(code==2424 ) - FRAC1<=16651386; - else if(code==2426 ) - FRAC1<=16903045; - else if(code==2824 ) - FRAC1<=33428602; - else if( code==2826 ) - FRAC1<=125829; - else - FRAC1<=douta2; -end - -always@(posedge sysclk,negedge arstn) -begin - if(!arstn) - MOD2<=douta3; - else if(code==24 ) - MOD2<=25; - else if(code==26 ) - MOD2<=25; - else if(code==424 ) - MOD2<=25; - else if(code==426 ) - MOD2<=25; - else if(code==824 ) - MOD2<=25; - else if(code==826 ) - MOD2<=25; - else if(code==1224) - MOD2<=25; - else if(code==1226 ) - MOD2<=25; - else if(code==1624) - MOD2<=25; - else if(code==1626 ) - MOD2<=25; - else if(code==2024 ) - MOD2<=25; - else if(code==2026 ) - MOD2<=25; - else if(code==2424 ) - MOD2<=25; - else if(code==2426 ) - MOD2<=25; - else if(code==2824 ) - MOD2<=25; - else if( code==2826 ) - MOD2<=25; - else - MOD2<=douta3; -end - -always@(posedge sysclk,negedge arstn) -begin - if(!arstn) - FRAC2<=douta4; - else if(code==24 ) - FRAC2<=22; - else if(code==26 ) - FRAC2<=3; - else if(code==424 ) - FRAC2<=22; - else if(code==426 ) - FRAC2<=3; - else if(code==824 ) - FRAC2<=22; - else if(code==826 ) - FRAC2<=3; - else if(code==1224) - FRAC2<=22; - else if(code==1226 ) - FRAC2<=3; - else if(code==1624) - FRAC2<=22; - else if(code==1626 ) - FRAC2<=3; - else if(code==2024 ) - FRAC2<=22; - else if(code==2026 ) - FRAC2<=3; - else if(code==2424 ) - FRAC2<=22; - else if(code==2426 ) - FRAC2<=3; - else if(code==2824 ) - FRAC2<=22; - else if( code==2826 ) - FRAC2<=3; - else - FRAC2<=douta4; -end - -always@(posedge sysclk,negedge arstn) -begin - if(!arstn)begin - R_DIV<=4'b1; - D<=4'b0; - end - else if(code==24 || code==26 || code==424 || code==426 || code==824 || code==826|| code==1224 || code==1226 || code==1624 || code==1626 ||code==2024 || code==2026 ||code==2424 || code==2426 ||code==2824 || code==2826 ) - begin - R_DIV<= 4'd3; - D<=4'd2; - end - else - begin - R_DIV<=4'b1; - D<=4'b0; - end -end - - -always@(posedge sysclk,negedge arstn)begin -if(~arstn) - pre_fre_code<=11'h6d6; -else if(CAL_F_R==3'b011) - pre_fre_code<=fre_code; -else - pre_fre_code<=pre_fre_code; -end - -always@(posedge sysclk,negedge arstn)begin -if(~arstn) - code<=16'h6d6; -else if(hop_en==2'b01) - code<=fre_code; -else - code<=code; -end - -always@(posedge sysclk,negedge arstn)begin -if(~arstn)begin - hop_en <= 3'b0; - CAL_F_R <= 3'b0; - rf_en_r <= 4'b0; -end -else begin - hop_en <= {hop_en[1:0],adf4371_hop}; - CAL_F_R <= {CAL_F_R[1:0],CAL_F}; - rf_en_r <= rf_en ; -end -end - - -always@(posedge sysclk,negedge arstn)begin -if(~arstn) - csb_reg <= 1'b1; -else - csb_reg <= spi_csb; -end - - -always@(posedge sysclk,negedge arstn)begin -if(~arstn) - cnt_locked<=32'b0; -else if(cnt_locked==WAIT_ld) - cnt_locked<=32'b0; -else if(!pll_locked) - cnt_locked<=cnt_locked+1'b1; -else - cnt_locked<=32'b0; -end - -always@(posedge sysclk,negedge arstn)begin -if(~arstn)begin - cfgdata <= 0; - cnt_word <= 7'd0; - cnt_bits <= 6'd0; - state <= 4'b0; - cnt_lock <= 32'd0; - spi_csb <= 1'b1; - spi_sdo <= 1'b0; -end -else begin - case(state) - 4'd0:begin - cnt_word <= 7'd0; - if(rf_en==1'b1) - state <= 4'd0; - else if(cnt_lock >= 32'd6000) - state <= 4'd1; - else - state <= state; - - if(rf_en==1'b0) - cnt_lock <= cnt_lock + 1'b1; - else - cnt_lock<=32'd0; - - end - 4'd1:begin - spi_csb <= 1'b1; - spi_sdo <= 1'b0; - state <= 4'd2; - end - 4'd2:begin - cfgdata <= regdata; - cnt_bits <= 6'd0; - state <= 4'd3; - end - 4'd3:begin - spi_csb <= 1'b0; - spi_sdo <= cfgdata[DATA_WIDTH-1]; - cfgdata <= cfgdata << 1'b1; - cnt_bits <= cnt_bits + 1'b1; - if(cnt_bits == DATA_WIDTH-1)begin - state <= 4'd4; - cnt_word <= cnt_word + 1'b1; - end - cnt_lock <= 32'd0; - end - 4'd4:begin - spi_csb <= 1'b1; - spi_sdo <= 1'b0; - cnt_lock <= 32'd0; - cnt_bits <= 32'd0; - if(cnt_word == DATA_LENTH)begin - state <= 4'd5; - end - else - state <= 4'd1; - end - 4'd5:begin - if(cnt_lock>=40000 || pll_locked)begin - cnt_lock <= 32'd0 ; - state <= 4'd6 ; - end - else begin - cnt_lock <=cnt_lock+1'b1; - state <= state ; - end - end - 4'd6:begin - cnt_word <= 7'd0; - if(pll_locked) - state <= 4'd7 ; - else - state <= 4'b1 ; - end -//&*&#&*&#&*&#&*&#&*&#&*&#&*&#&*&#&*&#&*&#&*&#&*&#// - 4'd7:begin//IDLE - cnt_word <= DATA_LENTH; - spi_csb <= 1'b1; - spi_sdo <= 1'b0; - cnt_bits <= 6'd0; - if(rf_en==4'b1) - state <= state; - else if(rf_en==4'b0 && rf_en_r==4'b1 ) - state <= 4'd0; - else if(hop_en==2'b10 || cnt_locked==WAIT_ld ) - state <= 4'd8; - //else if(CAL_F_R==3'b011 && (pre_fre_code!=fre_code))//打开RF_OUT - else if(i_cfgover) - state <= 4'd12; - else - state <= state; - end - 4'd8:begin - spi_csb <= 1'b1; - spi_sdo <= 1'b0; - state <= 4'd9; - end - 4'd9:begin - cfgdata <= regdata; - cnt_bits <= 6'd0; - state <= 4'd10; - end - 4'd10:begin - spi_csb <= 1'b0; - spi_sdo <= cfgdata[DATA_WIDTH-1]; - cfgdata <= cfgdata << 1'b1; - cnt_bits <= cnt_bits + 1'b1; - if(cnt_bits == DATA_WIDTH-1)begin - state <= 4'd11; - cnt_word <= cnt_word + 1'b1; - end - end - 4'd11:begin - spi_csb <= 1'b1; - spi_sdo <= 1'b0; - cnt_lock <= 32'd0; - cnt_bits <= 32'd0; - if(cnt_word == 8'd85)begin - state <= 4'd7; - end - else - state <= 4'd8; - end - 4'd12:begin - spi_csb <= 1'b1; - spi_sdo <= 1'b0; - state <= 4'd13; - end - 4'd13:begin - cnt_bits <= 6'd0; - state <= 4'd14; - if(ceshi_model==4'hb) - cfgdata <= {16'h0025,8'h13}; - else if(ceshi_model==4'ha) - cfgdata <= {16'h0025,8'h00}; - else if (SW_PLL) - cfgdata <= {16'h0025,8'h00}; - else - cfgdata <= {16'h0025,8'h13}; - end - 4'd14:begin - spi_csb <= 1'b0; - spi_sdo <= cfgdata[DATA_WIDTH-1]; - cfgdata <= cfgdata << 1'b1; - cnt_bits <= cnt_bits + 1'b1; - if(cnt_bits == DATA_WIDTH-1)begin - state <= 4'd7; - cnt_word <= cnt_word ; - end - end -//&*&#&*&#&*&#&*&#&*&#&*&#&*&#&*&#&*&#&*&#&*&#&*&#// - default: begin - spi_csb <= 1'b1; - state <= 4'd0; - cnt_lock <= 32'd0; - cnt_word <= 8'd0; - end - endcase -end -end - -always@(posedge sysclk,negedge arstn) -begin - if(!arstn) - regdata <= {16'h0000,8'h18 }; - else case(cnt_word) - 8'd0 : regdata <= {16'h0000,8'h18 }; - 8'd1 : regdata <= {16'h0001,8'h00 }; - 8'd2 : regdata <= {16'h0003,8'h00 }; - 8'd3 : regdata <= {16'h0004,8'h00 }; - 8'd4 : regdata <= {16'h0005,8'h00 }; - 8'd5 : regdata <= {16'h0006,8'hFF }; - 8'd6 : regdata <= {16'h000C,8'h00 }; - 8'd7 : regdata <= {16'h000D,8'h00 }; - 8'd8 : regdata <= {16'h0010 ,INT[7:0] } ; - 8'd9 : regdata <= {16'h0011 ,INT[15:8] } ; - 8'd10 : regdata <= {16'h0012,8'h00 };//[6]Autocalibration - //8'd10 : regdata <= {16'h0012,8'h40 };//[6]Autocalibration - 8'd11 : regdata <= {16'h0014 ,FRAC1[7:0]} ; - 8'd12 : regdata <= {16'h0015 ,FRAC1[15:8]} ; - 8'd13 : regdata <= {16'h0016 ,FRAC1[23:16]} ; - 8'd14 : regdata <= {16'h0017 ,FRAC2[6:0],FRAC1[24]} ; - 8'd15 : regdata <= {16'h0018 ,1'b0,FRAC2[13:7] } ; - 8'd16 : regdata <= {16'h0019 ,MOD2[7:0]} ; - 8'd17 : regdata <= {16'h001A ,2'b0,MOD2[13:8]} ; - 8'd18 : regdata <= {16'h001B,8'h00 }; - 8'd19 : regdata <= {16'h001C,8'h00 }; - 8'd20 : regdata <= {16'h001D,8'h00 }; - 8'd21 : regdata <= {16'h001E,8'h18 };//CP_CURRENT 电è·æ³µ - //8'd21 : regdata <= {16'h001E,cp,4'h8 };//CP_CURRENT 电è·æ³µ - 8'd22 : regdata <= { 16'h001F,4'h0,R_DIV };//R DIV R分频器 - 8'd23 : regdata <= {16'h0020,8'h1c };//digital lock detect æ•°å­—é”定ld - 8'd24 : regdata <= {16'h0021,8'h00 }; - 8'd25 : regdata <= { 16'h0022,D,4'd0 };//double Då€é¢‘器 - 8'd26 : regdata <= {16'h0023,8'h00 }; - 8'd27 : regdata <= {16'h0024,8'h80 };//DIV_SEL - 8'd28 : regdata <= {16'h0025,8'h13 };//X4_EN - 8'd29 : regdata <= {16'h0026,8'h1F }; - 8'd30 : regdata <= {16'h0027,8'hCD }; - //8'd30 : regdata <= {16'h0027,8'hCD }; - 8'd31 : regdata <= {16'h0028,8'h83 }; - 8'd32 : regdata <= {16'h002A,8'h00 }; - 8'd33 : regdata <= {16'h002B,8'h00 }; - 8'd34 : regdata <= {16'h002C,8'h44 }; - 8'd35 : regdata <= {16'h002D,8'h11 }; - 8'd36 : regdata <= {16'h002E,8'h12 }; - 8'd37 : regdata <= {16'h002F,8'h94 }; - 8'd38 : regdata <= {16'h0030,8'h2A }; - 8'd39 : regdata <= {16'h0031,8'h02 }; - 8'd40 : regdata <= {16'h0032,8'h04 }; - 8'd41 : regdata <= {16'h0033,8'h22 }; - 8'd42 : regdata <= {16'h0034,8'h25 }; - 8'd43 : regdata <= {16'h0035,8'hFA }; - 8'd44 : regdata <= {16'h0036,8'h30 }; - 8'd45 : regdata <= {16'h0037,SI_BAND_SEL} ;//VCO频段 - 8'd46 : regdata <= {16'h0038,SI_VCO_SEL_BIAS_CODE };//[7:4]=VCO内核,[3:0]VCOåç½® - 8'd47 : regdata <= {16'h0039,8'h07 }; - 8'd48 : regdata <= {16'h003A,8'h55 }; - 8'd49 : regdata <= {16'h003D,8'h00 }; - 8'd50 : regdata <= {16'h003E,8'h0C }; - 8'd51 : regdata <= {16'h003F,8'h80 }; - 8'd52 : regdata <= {16'h0040,8'h50 }; - 8'd53 : regdata <= {16'h0041,8'h28 }; - 8'd54 : regdata <= {16'h0042,8'h00 }; - 8'd55 : regdata <= {16'h0043,8'h00 }; - 8'd56 : regdata <= {16'h0044,8'h00 }; - 8'd57 : regdata <= {16'h0045,8'h00 }; - 8'd58 : regdata <= {16'h0046,8'h00 }; - 8'd59 : regdata <= {16'h0047,8'hC0 }; - 8'd60 : regdata <= {16'h0052,8'hF4 }; - 8'd61 : regdata <= {16'h006C,8'h00 }; - 8'd62 : regdata <= {16'h006E,8'h00 }; - 8'd63 : regdata <= {16'h006F,8'h00 }; - 8'd64 : regdata <= {16'h0070,8'hE3 }; - 8'd65 : regdata <= {16'h0071,8'h60 }; - 8'd66 : regdata <= {16'h0072,8'h32 }; - 8'd67 : regdata <= {16'h0073,8'h00 }; - 8'd68 : regdata <= {16'h0079,8'h00 }; - 8'd69 : regdata <= {16'h007A,8'h00 }; - 8'd70 : regdata <= {16'h007B,8'h00 }; - 8'd71 : regdata <= {16'h007C,8'h00 }; - - //跳频 - 8'd72:regdata <= { 16'h0022,D,4'd0 };//double Då€é¢‘器 - 8'd73:regdata <= { 16'h001F,4'h0,R_DIV };//R DIV R分频器 - 8'd74:regdata <= { 16'h001A ,2'b0,MOD2[13:8] } ; - 8'd75:regdata <= { 16'h0019 ,MOD2[7:0] } ; - 8'd76:regdata <= { 16'h0018 ,1'b0,FRAC2[13:7] } ; - 8'd77:regdata <= { 16'h0017 ,FRAC2[6:0],FRAC1[24] } ; - 8'd78:regdata <= { 16'h0016 ,FRAC1[23:16] } ; - 8'd79:regdata <= { 16'h0015 ,FRAC1[15:8] } ; - 8'd80:regdata <= { 16'h0014 ,FRAC1[7:0] } ; - 8'd81:regdata <= { 16'h0037 ,SI_BAND_SEL } ; - 8'd82:regdata <= { 16'h0038 ,SI_VCO_SEL_BIAS_CODE } ; - 8'd83:regdata <= { 16'h0011 ,INT[15:8] } ; - 8'd84:regdata <= { 16'h0010 ,INT[7:0] } ; - - default: regdata <= regdata; -endcase -end - - - - - - - - - - - -endmodule diff --git a/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/sources_1/new/ant_rf/Sisyif_src/band_rom_a.v b/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/sources_1/new/ant_rf/Sisyif_src/band_rom_a.v deleted file mode 100644 index 71f7026..0000000 --- a/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/sources_1/new/ant_rf/Sisyif_src/band_rom_a.v +++ /dev/null @@ -1,3573 +0,0 @@ -`timescale 1ns / 1ps -////////////////////////////////////////////////////////////////////////////////// -// Company: -// Engineer: -// -// Create Date: 18:19:17 01/25/2022 -// Design Name: -// Module Name: band_rom -// Project Name: -// Target Devices: -// Tool versions: -// Description: -// -// Dependencies: -// -// Revision: -// Revision 0.01 - File Created -// Additional Comments: -// -////////////////////////////////////////////////////////////////////////////////// -module band_rom_a( -input sysclk, -input [11 : 0] addra, - -output reg[15:0] douta -); - -always@(posedge sysclk)begin - case(addra) - -0 : douta <= 16'h7426 ; -1 : douta <= 16'h7426 ; -2 : douta <= 16'h7426 ; -3 : douta <= 16'h7426 ; -4 : douta <= 16'h7426 ; -5 : douta <= 16'h7326 ; -6 : douta <= 16'h7326 ; -7 : douta <= 16'h7426 ; -8 : douta <= 16'h7426 ; -9 : douta <= 16'h7326 ; -10 : douta <= 16'h7326 ; -11 : douta <= 16'h7326 ; -12 : douta <= 16'h7326 ; -13 : douta <= 16'h7326 ; -14 : douta <= 16'h7326 ; -15 : douta <= 16'h7326 ; -16 : douta <= 16'h7326 ; -17 : douta <= 16'h7226 ; -18 : douta <= 16'h7326 ; -19 : douta <= 16'h7226 ; -20 : douta <= 16'h7226 ; -21 : douta <= 16'h7226 ; -22 : douta <= 16'h7226 ; -23 : douta <= 16'h7126 ; -24 : douta <= 16'h7126 ; -25 : douta <= 16'h7126 ; -26 : douta <= 16'h7226 ; -27 : douta <= 16'h7226 ; -28 : douta <= 16'h7226 ; -29 : douta <= 16'h7226 ; -30 : douta <= 16'h7226 ; -31 : douta <= 16'h7226 ; -32 : douta <= 16'h7226 ; -33 : douta <= 16'h7226 ; -34 : douta <= 16'h7226 ; -35 : douta <= 16'h7226 ; -36 : douta <= 16'h7126 ; -37 : douta <= 16'h7126 ; -38 : douta <= 16'h7126 ; -39 : douta <= 16'h7126 ; -40 : douta <= 16'h7126 ; -41 : douta <= 16'h7126 ; -42 : douta <= 16'h7126 ; -43 : douta <= 16'h7126 ; -44 : douta <= 16'h7126 ; -45 : douta <= 16'h7126 ; -46 : douta <= 16'h7126 ; -47 : douta <= 16'h7126 ; -48 : douta <= 16'h7126 ; -49 : douta <= 16'h7026 ; -50 : douta <= 16'h7026 ; -51 : douta <= 16'h7126 ; -52 : douta <= 16'h7026 ; -53 : douta <= 16'h7126 ; -54 : douta <= 16'h6F26 ; -55 : douta <= 16'h7126 ; -56 : douta <= 16'h7126 ; -57 : douta <= 16'h7126 ; -58 : douta <= 16'h7126 ; -59 : douta <= 16'h7026 ; -60 : douta <= 16'h7126 ; -61 : douta <= 16'h6E26 ; -62 : douta <= 16'h7026 ; -63 : douta <= 16'h6E26 ; -64 : douta <= 16'h7026 ; -65 : douta <= 16'h7026 ; -66 : douta <= 16'h7026 ; -67 : douta <= 16'h7026 ; -68 : douta <= 16'h7026 ; -69 : douta <= 16'h7026 ; -70 : douta <= 16'h7026 ; -71 : douta <= 16'h7026 ; -72 : douta <= 16'h7026 ; -73 : douta <= 16'h7026 ; -74 : douta <= 16'h7026 ; -75 : douta <= 16'h7026 ; -76 : douta <= 16'h7026 ; -77 : douta <= 16'h7026 ; -78 : douta <= 16'h7026 ; -79 : douta <= 16'h7026 ; -80 : douta <= 16'h7026 ; -81 : douta <= 16'h6F26 ; -82 : douta <= 16'h6F26 ; -83 : douta <= 16'h6F26 ; -84 : douta <= 16'h6F26 ; -85 : douta <= 16'h6F26 ; -86 : douta <= 16'h6E26 ; -87 : douta <= 16'h6E26 ; -88 : douta <= 16'h6E26 ; -89 : douta <= 16'h6E26 ; -90 : douta <= 16'h6E26 ; -91 : douta <= 16'h6E26 ; -92 : douta <= 16'h6E26 ; -93 : douta <= 16'h6E26 ; -94 : douta <= 16'h6E26 ; -95 : douta <= 16'h6E26 ; -96 : douta <= 16'h6E26 ; -97 : douta <= 16'h6E26 ; -98 : douta <= 16'h6E26 ; -99 : douta <= 16'h6E26 ; -100 : douta <= 16'h6E26 ; -101 : douta <= 16'h6E26 ; -102 : douta <= 16'h6E26 ; -103 : douta <= 16'h6E26 ; -104 : douta <= 16'h6E26 ; -105 : douta <= 16'h6E26 ; -106 : douta <= 16'h6E26 ; -107 : douta <= 16'h6D26 ; -108 : douta <= 16'h6E26 ; -109 : douta <= 16'h6D26 ; -110 : douta <= 16'h6D26 ; -111 : douta <= 16'h6D26 ; -112 : douta <= 16'h6D26 ; -113 : douta <= 16'h6D26 ; -114 : douta <= 16'h6D26 ; -115 : douta <= 16'h6D26 ; -116 : douta <= 16'h6D26 ; -117 : douta <= 16'h6D26 ; -118 : douta <= 16'h6D26 ; -119 : douta <= 16'h6D26 ; -120 : douta <= 16'h6D26 ; -121 : douta <= 16'h6C26 ; -122 : douta <= 16'h6D26 ; -123 : douta <= 16'h6D26 ; -124 : douta <= 16'h6C26 ; -125 : douta <= 16'h6D26 ; -126 : douta <= 16'h6D26 ; -127 : douta <= 16'h6D26 ; -128 : douta <= 16'h6D26 ; -129 : douta <= 16'h6D26 ; -130 : douta <= 16'h6D26 ; -131 : douta <= 16'h6D26 ; -132 : douta <= 16'h6D26 ; -133 : douta <= 16'h6C26 ; -134 : douta <= 16'h6C26 ; -135 : douta <= 16'h6C26 ; -136 : douta <= 16'h6C26 ; -137 : douta <= 16'h6C26 ; -138 : douta <= 16'h6C26 ; -139 : douta <= 16'h6C26 ; -140 : douta <= 16'h6C26 ; -141 : douta <= 16'h6C26 ; -142 : douta <= 16'h6C26 ; -143 : douta <= 16'h6C26 ; -144 : douta <= 16'h6C26 ; -145 : douta <= 16'h6C26 ; -146 : douta <= 16'h6C26 ; -147 : douta <= 16'h6C26 ; -148 : douta <= 16'h6C26 ; -149 : douta <= 16'h6C26 ; -150 : douta <= 16'h6C26 ; -151 : douta <= 16'h6C26 ; -152 : douta <= 16'h6C26 ; -153 : douta <= 16'h6B26 ; -154 : douta <= 16'h6B26 ; -155 : douta <= 16'h6B26 ; -156 : douta <= 16'h6B26 ; -157 : douta <= 16'h6B26 ; -158 : douta <= 16'h6B26 ; -159 : douta <= 16'h6B26 ; -160 : douta <= 16'h6B26 ; -161 : douta <= 16'h6B26 ; -162 : douta <= 16'h6A26 ; -163 : douta <= 16'h6A26 ; -164 : douta <= 16'h6A26 ; -165 : douta <= 16'h6A26 ; -166 : douta <= 16'h6A26 ; -167 : douta <= 16'h6A26 ; -168 : douta <= 16'h6926 ; -169 : douta <= 16'h6A26 ; -170 : douta <= 16'h6926 ; -171 : douta <= 16'h6A26 ; -172 : douta <= 16'h6926 ; -173 : douta <= 16'h6A26 ; -174 : douta <= 16'h6A26 ; -175 : douta <= 16'h6A26 ; -176 : douta <= 16'h6A26 ; -177 : douta <= 16'h6A26 ; -178 : douta <= 16'h6A26 ; -179 : douta <= 16'h6A26 ; -180 : douta <= 16'h6A26 ; -181 : douta <= 16'h6A26 ; -182 : douta <= 16'h6A26 ; -183 : douta <= 16'h6A26 ; -184 : douta <= 16'h6926 ; -185 : douta <= 16'h6926 ; -186 : douta <= 16'h6926 ; -187 : douta <= 16'h6926 ; -188 : douta <= 16'h6926 ; -189 : douta <= 16'h6926 ; -190 : douta <= 16'h6926 ; -191 : douta <= 16'h6926 ; -192 : douta <= 16'h6926 ; -193 : douta <= 16'h6926 ; -194 : douta <= 16'h6926 ; -195 : douta <= 16'h6826 ; -196 : douta <= 16'h6826 ; -197 : douta <= 16'h6826 ; -198 : douta <= 16'h6826 ; -199 : douta <= 16'h6826 ; -200 : douta <= 16'h6926 ; -201 : douta <= 16'h6926 ; -202 : douta <= 16'h6926 ; -203 : douta <= 16'h6926 ; -204 : douta <= 16'h6926 ; -205 : douta <= 16'h6926 ; -206 : douta <= 16'h6926 ; -207 : douta <= 16'h6926 ; -208 : douta <= 16'h6826 ; -209 : douta <= 16'h6826 ; -210 : douta <= 16'h6826 ; -211 : douta <= 16'h6826 ; -212 : douta <= 16'h6826 ; -213 : douta <= 16'h6826 ; -214 : douta <= 16'h6826 ; -215 : douta <= 16'h6826 ; -216 : douta <= 16'h6826 ; -217 : douta <= 16'h6826 ; -218 : douta <= 16'h6826 ; -219 : douta <= 16'h6726 ; -220 : douta <= 16'h6726 ; -221 : douta <= 16'h6826 ; -222 : douta <= 16'h6826 ; -223 : douta <= 16'h6826 ; -224 : douta <= 16'h6826 ; -225 : douta <= 16'h6826 ; -226 : douta <= 16'h6826 ; -227 : douta <= 16'h6826 ; -228 : douta <= 16'h6826 ; -229 : douta <= 16'h6826 ; -230 : douta <= 16'h6826 ; -231 : douta <= 16'h6826 ; -232 : douta <= 16'h6726 ; -233 : douta <= 16'h6726 ; -234 : douta <= 16'h6526 ; -235 : douta <= 16'h6526 ; -236 : douta <= 16'h6726 ; -237 : douta <= 16'h6726 ; -238 : douta <= 16'h6726 ; -239 : douta <= 16'h6726 ; -240 : douta <= 16'h6726 ; -241 : douta <= 16'h6626 ; -242 : douta <= 16'h6626 ; -243 : douta <= 16'h6626 ; -244 : douta <= 16'h6626 ; -245 : douta <= 16'h6626 ; -246 : douta <= 16'h6626 ; -247 : douta <= 16'h6626 ; -248 : douta <= 16'h6626 ; -249 : douta <= 16'h6626 ; -250 : douta <= 16'h6626 ; -251 : douta <= 16'h6626 ; -252 : douta <= 16'h6626 ; -253 : douta <= 16'h6626 ; -254 : douta <= 16'h6626 ; -255 : douta <= 16'h6626 ; -256 : douta <= 16'h6626 ; -257 : douta <= 16'h6626 ; -258 : douta <= 16'h6626 ; -259 : douta <= 16'h6626 ; -260 : douta <= 16'h6626 ; -261 : douta <= 16'h6626 ; -262 : douta <= 16'h6526 ; -263 : douta <= 16'h6626 ; -264 : douta <= 16'h6526 ; -265 : douta <= 16'h6526 ; -266 : douta <= 16'h6526 ; -267 : douta <= 16'h6526 ; -268 : douta <= 16'h6526 ; -269 : douta <= 16'h6526 ; -270 : douta <= 16'h6526 ; -271 : douta <= 16'h6526 ; -272 : douta <= 16'h6526 ; -273 : douta <= 16'h6526 ; -274 : douta <= 16'h6526 ; -275 : douta <= 16'h6526 ; -276 : douta <= 16'h6526 ; -277 : douta <= 16'h6426 ; -278 : douta <= 16'h6526 ; -279 : douta <= 16'h6526 ; -280 : douta <= 16'h6526 ; -281 : douta <= 16'h6526 ; -282 : douta <= 16'h6526 ; -283 : douta <= 16'h6526 ; -284 : douta <= 16'h6526 ; -285 : douta <= 16'h6526 ; -286 : douta <= 16'h6526 ; -287 : douta <= 16'h6526 ; -288 : douta <= 16'h6426 ; -289 : douta <= 16'h6426 ; -290 : douta <= 16'h6426 ; -291 : douta <= 16'h6426 ; -292 : douta <= 16'h6426 ; -293 : douta <= 16'h6426 ; -294 : douta <= 16'h6426 ; -295 : douta <= 16'h6426 ; -296 : douta <= 16'h6426 ; -297 : douta <= 16'h6426 ; -298 : douta <= 16'h6426 ; -299 : douta <= 16'h6426 ; -300 : douta <= 16'h6426 ; -301 : douta <= 16'h6426 ; -302 : douta <= 16'h6426 ; -303 : douta <= 16'h6426 ; -304 : douta <= 16'h6426 ; -305 : douta <= 16'h6326 ; -306 : douta <= 16'h6426 ; -307 : douta <= 16'h6326 ; -308 : douta <= 16'h6326 ; -309 : douta <= 16'h6326 ; -310 : douta <= 16'h6326 ; -311 : douta <= 16'h6426 ; -312 : douta <= 16'h6426 ; -313 : douta <= 16'h6326 ; -314 : douta <= 16'h6326 ; -315 : douta <= 16'h6326 ; -316 : douta <= 16'h6326 ; -317 : douta <= 16'h6326 ; -318 : douta <= 16'h6326 ; -319 : douta <= 16'h6226 ; -320 : douta <= 16'h6226 ; -321 : douta <= 16'h6226 ; -322 : douta <= 16'h6226 ; -323 : douta <= 16'h6226 ; -324 : douta <= 16'h6126 ; -325 : douta <= 16'h6226 ; -326 : douta <= 16'h6126 ; -327 : douta <= 16'h6126 ; -328 : douta <= 16'h6126 ; -329 : douta <= 16'h6226 ; -330 : douta <= 16'h6226 ; -331 : douta <= 16'h6226 ; -332 : douta <= 16'h6226 ; -333 : douta <= 16'h6226 ; -334 : douta <= 16'h6226 ; -335 : douta <= 16'h6226 ; -336 : douta <= 16'h6226 ; -337 : douta <= 16'h6226 ; -338 : douta <= 16'h6226 ; -339 : douta <= 16'h6226 ; -340 : douta <= 16'h6226 ; -341 : douta <= 16'h6126 ; -342 : douta <= 16'h6126 ; -343 : douta <= 16'h6126 ; -344 : douta <= 16'h6126 ; -345 : douta <= 16'h6126 ; -346 : douta <= 16'h6126 ; -347 : douta <= 16'h6126 ; -348 : douta <= 16'h6126 ; -349 : douta <= 16'h6126 ; -350 : douta <= 16'h6126 ; -351 : douta <= 16'h6126 ; -352 : douta <= 16'h6126 ; -353 : douta <= 16'h6126 ; -354 : douta <= 16'h6126 ; -355 : douta <= 16'h6026 ; -356 : douta <= 16'h6026 ; -357 : douta <= 16'h6126 ; -358 : douta <= 16'h6126 ; -359 : douta <= 16'h6126 ; -360 : douta <= 16'h6126 ; -361 : douta <= 16'h6126 ; -362 : douta <= 16'h6126 ; -363 : douta <= 16'h6126 ; -364 : douta <= 16'h6126 ; -365 : douta <= 16'h6126 ; -366 : douta <= 16'h6126 ; -367 : douta <= 16'h6126 ; -368 : douta <= 16'h6026 ; -369 : douta <= 16'h6026 ; -370 : douta <= 16'h6026 ; -371 : douta <= 16'h6026 ; -372 : douta <= 16'h6026 ; -373 : douta <= 16'h6026 ; -374 : douta <= 16'h6026 ; -375 : douta <= 16'h5F28 ; -376 : douta <= 16'h6026 ; -377 : douta <= 16'h6026 ; -378 : douta <= 16'h6026 ; -379 : douta <= 16'h5F28 ; -380 : douta <= 16'h6026 ; -381 : douta <= 16'h6026 ; -382 : douta <= 16'h6026 ; -383 : douta <= 16'h6026 ; -384 : douta <= 16'h6026 ; -385 : douta <= 16'h6026 ; -386 : douta <= 16'h5F28 ; -387 : douta <= 16'h6026 ; -388 : douta <= 16'h6026 ; -389 : douta <= 16'h6026 ; -390 : douta <= 16'h5E28 ; -391 : douta <= 16'h6026 ; -392 : douta <= 16'h6026 ; -393 : douta <= 16'h6026 ; -394 : douta <= 16'h6026 ; -395 : douta <= 16'h6026 ; -396 : douta <= 16'h6026 ; -397 : douta <= 16'h6026 ; -398 : douta <= 16'h6026 ; -399 : douta <= 16'h6026 ; -400 : douta <= 16'h5E28 ; -401 : douta <= 16'h5E28 ; -402 : douta <= 16'h5E28 ; -403 : douta <= 16'h5E28 ; -404 : douta <= 16'h5E28 ; -405 : douta <= 16'h5E28 ; -406 : douta <= 16'h5E28 ; -407 : douta <= 16'h5E28 ; -408 : douta <= 16'h5E28 ; -409 : douta <= 16'h5E28 ; -410 : douta <= 16'h5E28 ; -411 : douta <= 16'h5D28 ; -412 : douta <= 16'h5D28 ; -413 : douta <= 16'h5D28 ; -414 : douta <= 16'h5D28 ; -415 : douta <= 16'h5D28 ; -416 : douta <= 16'h5D28 ; -417 : douta <= 16'h5D28 ; -418 : douta <= 16'h5D28 ; -419 : douta <= 16'h5D28 ; -420 : douta <= 16'h5D28 ; -421 : douta <= 16'h5D28 ; -422 : douta <= 16'h5D28 ; -423 : douta <= 16'h5D28 ; -424 : douta <= 16'h5D28 ; -425 : douta <= 16'h5C28 ; -426 : douta <= 16'h5C28 ; -427 : douta <= 16'h5D28 ; -428 : douta <= 16'h5D28 ; -429 : douta <= 16'h5B28 ; -430 : douta <= 16'h5B28 ; -431 : douta <= 16'h5D28 ; -432 : douta <= 16'h5D28 ; -433 : douta <= 16'h5C28 ; -434 : douta <= 16'h5C28 ; -435 : douta <= 16'h5C28 ; -436 : douta <= 16'h5C28 ; -437 : douta <= 16'h5C28 ; -438 : douta <= 16'h5C28 ; -439 : douta <= 16'h5C28 ; -440 : douta <= 16'h5C28 ; -441 : douta <= 16'h5C28 ; -442 : douta <= 16'h5C28 ; -443 : douta <= 16'h5C28 ; -444 : douta <= 16'h5C28 ; -445 : douta <= 16'h5C28 ; -446 : douta <= 16'h5C28 ; -447 : douta <= 16'h5C28 ; -448 : douta <= 16'h5C28 ; -449 : douta <= 16'h5C28 ; -450 : douta <= 16'h5C28 ; -451 : douta <= 16'h5C28 ; -452 : douta <= 16'h5C28 ; -453 : douta <= 16'h5C28 ; -454 : douta <= 16'h5C28 ; -455 : douta <= 16'h5B28 ; -456 : douta <= 16'h5C28 ; -457 : douta <= 16'h5C28 ; -458 : douta <= 16'h5B28 ; -459 : douta <= 16'h5B28 ; -460 : douta <= 16'h5B28 ; -461 : douta <= 16'h5B28 ; -462 : douta <= 16'h5B28 ; -463 : douta <= 16'h5B28 ; -464 : douta <= 16'h5B28 ; -465 : douta <= 16'h5B28 ; -466 : douta <= 16'h5B28 ; -467 : douta <= 16'h5A28 ; -468 : douta <= 16'h5A28 ; -469 : douta <= 16'h5A28 ; -470 : douta <= 16'h5A28 ; -471 : douta <= 16'h5A28 ; -472 : douta <= 16'h5A28 ; -473 : douta <= 16'h5A28 ; -474 : douta <= 16'h5A28 ; -475 : douta <= 16'h5A28 ; -476 : douta <= 16'h5A28 ; -477 : douta <= 16'h5A28 ; -478 : douta <= 16'h5A28 ; -479 : douta <= 16'h5A28 ; -480 : douta <= 16'h5A28 ; -481 : douta <= 16'h5A28 ; -482 : douta <= 16'h5A28 ; -483 : douta <= 16'h5A28 ; -484 : douta <= 16'h5A28 ; -485 : douta <= 16'h5A28 ; -486 : douta <= 16'h5A28 ; -487 : douta <= 16'h5A28 ; -488 : douta <= 16'h5A28 ; -489 : douta <= 16'h5928 ; -490 : douta <= 16'h5928 ; -491 : douta <= 16'h5928 ; -492 : douta <= 16'h5928 ; -493 : douta <= 16'h5928 ; -494 : douta <= 16'h5928 ; -495 : douta <= 16'h5928 ; -496 : douta <= 16'h5928 ; -497 : douta <= 16'h5928 ; -498 : douta <= 16'h5928 ; -499 : douta <= 16'h5928 ; -500 : douta <= 16'h5928 ; -501 : douta <= 16'h5928 ; -502 : douta <= 16'h5828 ; -503 : douta <= 16'h5828 ; -504 : douta <= 16'h5828 ; -505 : douta <= 16'h5828 ; -506 : douta <= 16'h5828 ; -507 : douta <= 16'h5928 ; -508 : douta <= 16'h5928 ; -509 : douta <= 16'h5928 ; -510 : douta <= 16'h5928 ; -511 : douta <= 16'h5928 ; -512 : douta <= 16'h5928 ; -513 : douta <= 16'h5928 ; -514 : douta <= 16'h5828 ; -515 : douta <= 16'h5828 ; -516 : douta <= 16'h5828 ; -517 : douta <= 16'h5828 ; -518 : douta <= 16'h5828 ; -519 : douta <= 16'h5828 ; -520 : douta <= 16'h5828 ; -521 : douta <= 16'h5828 ; -522 : douta <= 16'h5828 ; -523 : douta <= 16'h5828 ; -524 : douta <= 16'h5828 ; -525 : douta <= 16'h5828 ; -526 : douta <= 16'h5828 ; -527 : douta <= 16'h5828 ; -528 : douta <= 16'h5828 ; -529 : douta <= 16'h5828 ; -530 : douta <= 16'h5828 ; -531 : douta <= 16'h5828 ; -532 : douta <= 16'h5728 ; -533 : douta <= 16'h5728 ; -534 : douta <= 16'h5728 ; -535 : douta <= 16'h5828 ; -536 : douta <= 16'h5828 ; -537 : douta <= 16'h5728 ; -538 : douta <= 16'h5728 ; -539 : douta <= 16'h5728 ; -540 : douta <= 16'h5728 ; -541 : douta <= 16'h5528 ; -542 : douta <= 16'h5728 ; -543 : douta <= 16'h5528 ; -544 : douta <= 16'h5728 ; -545 : douta <= 16'h5728 ; -546 : douta <= 16'h5728 ; -547 : douta <= 16'h5628 ; -548 : douta <= 16'h5628 ; -549 : douta <= 16'h5628 ; -550 : douta <= 16'h5628 ; -551 : douta <= 16'h5628 ; -552 : douta <= 16'h5628 ; -553 : douta <= 16'h5628 ; -554 : douta <= 16'h5628 ; -555 : douta <= 16'h5628 ; -556 : douta <= 16'h5628 ; -557 : douta <= 16'h5628 ; -558 : douta <= 16'h5628 ; -559 : douta <= 16'h5628 ; -560 : douta <= 16'h5628 ; -561 : douta <= 16'h5628 ; -562 : douta <= 16'h5628 ; -563 : douta <= 16'h5628 ; -564 : douta <= 16'h5628 ; -565 : douta <= 16'h5628 ; -566 : douta <= 16'h5628 ; -567 : douta <= 16'h5628 ; -568 : douta <= 16'h5628 ; -569 : douta <= 16'h5628 ; -570 : douta <= 16'h5628 ; -571 : douta <= 16'h5528 ; -572 : douta <= 16'h5528 ; -573 : douta <= 16'h5528 ; -574 : douta <= 16'h5528 ; -575 : douta <= 16'h5528 ; -576 : douta <= 16'h5528 ; -577 : douta <= 16'h5528 ; -578 : douta <= 16'h5528 ; -579 : douta <= 16'h5528 ; -580 : douta <= 16'h5528 ; -581 : douta <= 16'h5528 ; -582 : douta <= 16'h5528 ; -583 : douta <= 16'h5528 ; -584 : douta <= 16'h5528 ; -585 : douta <= 16'h5528 ; -586 : douta <= 16'h5428 ; -587 : douta <= 16'h5528 ; -588 : douta <= 16'h5528 ; -589 : douta <= 16'h5528 ; -590 : douta <= 16'h5528 ; -591 : douta <= 16'h5528 ; -592 : douta <= 16'h5528 ; -593 : douta <= 16'h5528 ; -594 : douta <= 16'h5528 ; -595 : douta <= 16'h5528 ; -596 : douta <= 16'h5428 ; -597 : douta <= 16'h5428 ; -598 : douta <= 16'h5428 ; -599 : douta <= 16'h5428 ; -600 : douta <= 16'h5428 ; -601 : douta <= 16'h5428 ; -602 : douta <= 16'h5428 ; -603 : douta <= 16'h5428 ; -604 : douta <= 16'h5428 ; -605 : douta <= 16'h5428 ; -606 : douta <= 16'h5428 ; -607 : douta <= 16'h5428 ; -608 : douta <= 16'h5428 ; -609 : douta <= 16'h5428 ; -610 : douta <= 16'h5428 ; -611 : douta <= 16'h5428 ; -612 : douta <= 16'h5428 ; -613 : douta <= 16'h5428 ; -614 : douta <= 16'h5428 ; -615 : douta <= 16'h5428 ; -616 : douta <= 16'h5328 ; -617 : douta <= 16'h5328 ; -618 : douta <= 16'h5328 ; -619 : douta <= 16'h5328 ; -620 : douta <= 16'h5428 ; -621 : douta <= 16'h5328 ; -622 : douta <= 16'h5328 ; -623 : douta <= 16'h5328 ; -624 : douta <= 16'h5328 ; -625 : douta <= 16'h5328 ; -626 : douta <= 16'h5328 ; -627 : douta <= 16'h5328 ; -628 : douta <= 16'h5328 ; -629 : douta <= 16'h5328 ; -630 : douta <= 16'h5328 ; -631 : douta <= 16'h5328 ; -632 : douta <= 16'h5328 ; -633 : douta <= 16'h5328 ; -634 : douta <= 16'h5228 ; -635 : douta <= 16'h5228 ; -636 : douta <= 16'h5128 ; -637 : douta <= 16'h5128 ; -638 : douta <= 16'h5128 ; -639 : douta <= 16'h5228 ; -640 : douta <= 16'h5228 ; -641 : douta <= 16'h5228 ; -642 : douta <= 16'h5228 ; -643 : douta <= 16'h5228 ; -644 : douta <= 16'h5228 ; -645 : douta <= 16'h5228 ; -646 : douta <= 16'h5228 ; -647 : douta <= 16'h5228 ; -648 : douta <= 16'h5228 ; -649 : douta <= 16'h5228 ; -650 : douta <= 16'h5228 ; -651 : douta <= 16'h5228 ; -652 : douta <= 16'h5228 ; -653 : douta <= 16'h5228 ; -654 : douta <= 16'h5228 ; -655 : douta <= 16'h5228 ; -656 : douta <= 16'h5128 ; -657 : douta <= 16'h5128 ; -658 : douta <= 16'h5128 ; -659 : douta <= 16'h5128 ; -660 : douta <= 16'h5128 ; -661 : douta <= 16'h5128 ; -662 : douta <= 16'h5128 ; -663 : douta <= 16'h5128 ; -664 : douta <= 16'h5128 ; -665 : douta <= 16'h5128 ; -666 : douta <= 16'h5128 ; -667 : douta <= 16'h5128 ; -668 : douta <= 16'h5128 ; -669 : douta <= 16'h5128 ; -670 : douta <= 16'h5128 ; -671 : douta <= 16'h5028 ; -672 : douta <= 16'h5028 ; -673 : douta <= 16'h5128 ; -674 : douta <= 16'h5128 ; -675 : douta <= 16'h5128 ; -676 : douta <= 16'h5128 ; -677 : douta <= 16'h5128 ; -678 : douta <= 16'h5128 ; -679 : douta <= 16'h5128 ; -680 : douta <= 16'h5128 ; -681 : douta <= 16'h5128 ; -682 : douta <= 16'h5028 ; -683 : douta <= 16'h5028 ; -684 : douta <= 16'h5028 ; -685 : douta <= 16'h4E28 ; -686 : douta <= 16'h5028 ; -687 : douta <= 16'h5028 ; -688 : douta <= 16'h4F28 ; -689 : douta <= 16'h5028 ; -690 : douta <= 16'h5028 ; -691 : douta <= 16'h5028 ; -692 : douta <= 16'h4F28 ; -693 : douta <= 16'h5028 ; -694 : douta <= 16'h5028 ; -695 : douta <= 16'h5028 ; -696 : douta <= 16'h5028 ; -697 : douta <= 16'h5028 ; -698 : douta <= 16'h5028 ; -699 : douta <= 16'h5028 ; -700 : douta <= 16'h5028 ; -701 : douta <= 16'h5028 ; -702 : douta <= 16'h5028 ; -703 : douta <= 16'h5028 ; -704 : douta <= 16'h5028 ; -705 : douta <= 16'h5028 ; -706 : douta <= 16'h5028 ; -707 : douta <= 16'h5028 ; -708 : douta <= 16'h4D28 ; -709 : douta <= 16'h4D28 ; -710 : douta <= 16'h4E28 ; -711 : douta <= 16'h4E28 ; -712 : douta <= 16'h4E28 ; -713 : douta <= 16'h4E28 ; -714 : douta <= 16'h4E28 ; -715 : douta <= 16'h4E28 ; -716 : douta <= 16'h4E28 ; -717 : douta <= 16'h4E28 ; -718 : douta <= 16'h4E28 ; -719 : douta <= 16'h4E28 ; -720 : douta <= 16'h4E28 ; -721 : douta <= 16'h4E28 ; -722 : douta <= 16'h4E28 ; -723 : douta <= 16'h4E28 ; -724 : douta <= 16'h4E28 ; -725 : douta <= 16'h4E28 ; -726 : douta <= 16'h4E28 ; -727 : douta <= 16'h4E28 ; -728 : douta <= 16'h4E28 ; -729 : douta <= 16'h4E28 ; -730 : douta <= 16'h4E28 ; -731 : douta <= 16'h4E28 ; -732 : douta <= 16'h4E28 ; -733 : douta <= 16'h4E28 ; -734 : douta <= 16'h4D28 ; -735 : douta <= 16'h4D28 ; -736 : douta <= 16'h4D28 ; -737 : douta <= 16'h4D28 ; -738 : douta <= 16'h4D28 ; -739 : douta <= 16'h4D28 ; -740 : douta <= 16'h4D28 ; -741 : douta <= 16'h4D28 ; -742 : douta <= 16'h4D28 ; -743 : douta <= 16'h4D28 ; -744 : douta <= 16'h4D28 ; -745 : douta <= 16'h4D28 ; -746 : douta <= 16'h4D28 ; -747 : douta <= 16'h4C28 ; -748 : douta <= 16'h4C28 ; -749 : douta <= 16'h4D28 ; -750 : douta <= 16'h4D28 ; -751 : douta <= 16'h4D28 ; -752 : douta <= 16'h4D28 ; -753 : douta <= 16'h4D28 ; -754 : douta <= 16'h4D28 ; -755 : douta <= 16'h4D28 ; -756 : douta <= 16'h4D28 ; -757 : douta <= 16'h4D28 ; -758 : douta <= 16'h4D28 ; -759 : douta <= 16'h4D28 ; -760 : douta <= 16'h4B28 ; -761 : douta <= 16'h4B28 ; -762 : douta <= 16'h4C28 ; -763 : douta <= 16'h4C28 ; -764 : douta <= 16'h4C28 ; -765 : douta <= 16'h4C28 ; -766 : douta <= 16'h4C28 ; -767 : douta <= 16'h4C28 ; -768 : douta <= 16'h4C28 ; -769 : douta <= 16'h4C28 ; -770 : douta <= 16'h4C28 ; -771 : douta <= 16'h4C28 ; -772 : douta <= 16'h4C28 ; -773 : douta <= 16'h4C28 ; -774 : douta <= 16'h4C28 ; -775 : douta <= 16'h4C28 ; -776 : douta <= 16'h4C28 ; -777 : douta <= 16'h4C28 ; -778 : douta <= 16'h4C28 ; -779 : douta <= 16'h4C28 ; -780 : douta <= 16'h4C28 ; -781 : douta <= 16'h4C28 ; -782 : douta <= 16'h4C28 ; -783 : douta <= 16'h4C28 ; -784 : douta <= 16'h4C28 ; -785 : douta <= 16'h4C28 ; -786 : douta <= 16'h4B28 ; -787 : douta <= 16'h4B28 ; -788 : douta <= 16'h4B28 ; -789 : douta <= 16'h4B28 ; -790 : douta <= 16'h4B28 ; -791 : douta <= 16'h4B28 ; -792 : douta <= 16'h4B28 ; -793 : douta <= 16'h4B28 ; -794 : douta <= 16'h4B28 ; -795 : douta <= 16'h4A28 ; -796 : douta <= 16'h4A28 ; -797 : douta <= 16'h4A28 ; -798 : douta <= 16'h4A28 ; -799 : douta <= 16'h4A28 ; -800 : douta <= 16'h4A28 ; -801 : douta <= 16'h4928 ; -802 : douta <= 16'h4A28 ; -803 : douta <= 16'h4928 ; -804 : douta <= 16'h4A28 ; -805 : douta <= 16'h4A28 ; -806 : douta <= 16'h4A28 ; -807 : douta <= 16'h4A28 ; -808 : douta <= 16'h4A28 ; -809 : douta <= 16'h4A28 ; -810 : douta <= 16'h4A28 ; -811 : douta <= 16'h4A28 ; -812 : douta <= 16'h4A28 ; -813 : douta <= 16'h4A28 ; -814 : douta <= 16'h4A28 ; -815 : douta <= 16'h4A28 ; -816 : douta <= 16'h4A28 ; -817 : douta <= 16'h4A28 ; -818 : douta <= 16'h4928 ; -819 : douta <= 16'h4928 ; -820 : douta <= 16'h4928 ; -821 : douta <= 16'h4928 ; -822 : douta <= 16'h4928 ; -823 : douta <= 16'h4928 ; -824 : douta <= 16'h4928 ; -825 : douta <= 16'h4928 ; -826 : douta <= 16'h4928 ; -827 : douta <= 16'h4928 ; -828 : douta <= 16'h4928 ; -829 : douta <= 16'h4928 ; -830 : douta <= 16'h4928 ; -831 : douta <= 16'h4828 ; -832 : douta <= 16'h4928 ; -833 : douta <= 16'h4928 ; -834 : douta <= 16'h4928 ; -835 : douta <= 16'h4928 ; -836 : douta <= 16'h4928 ; -837 : douta <= 16'h4928 ; -838 : douta <= 16'h4928 ; -839 : douta <= 16'h4928 ; -840 : douta <= 16'h4928 ; -841 : douta <= 16'h4928 ; -842 : douta <= 16'h4928 ; -843 : douta <= 16'h4928 ; -844 : douta <= 16'h4828 ; -845 : douta <= 16'h4828 ; -846 : douta <= 16'h4728 ; -847 : douta <= 16'h4728 ; -848 : douta <= 16'h4828 ; -849 : douta <= 16'h4828 ; -850 : douta <= 16'h4828 ; -851 : douta <= 16'h4828 ; -852 : douta <= 16'h4828 ; -853 : douta <= 16'h4828 ; -854 : douta <= 16'h4828 ; -855 : douta <= 16'h4828 ; -856 : douta <= 16'h4828 ; -857 : douta <= 16'h4828 ; -858 : douta <= 16'h4828 ; -859 : douta <= 16'h4828 ; -860 : douta <= 16'h4828 ; -861 : douta <= 16'h4828 ; -862 : douta <= 16'h4828 ; -863 : douta <= 16'h4828 ; -864 : douta <= 16'h4828 ; -865 : douta <= 16'h4828 ; -866 : douta <= 16'h4828 ; -867 : douta <= 16'h4828 ; -868 : douta <= 16'h4828 ; -869 : douta <= 16'h4528 ; -870 : douta <= 16'h4728 ; -871 : douta <= 16'h4528 ; -872 : douta <= 16'h4528 ; -873 : douta <= 16'h4728 ; -874 : douta <= 16'h4528 ; -875 : douta <= 16'h4728 ; -876 : douta <= 16'h4628 ; -877 : douta <= 16'h4628 ; -878 : douta <= 16'h4628 ; -879 : douta <= 16'h4628 ; -880 : douta <= 16'h4628 ; -881 : douta <= 16'h4628 ; -882 : douta <= 16'h4628 ; -883 : douta <= 16'h4628 ; -884 : douta <= 16'h4628 ; -885 : douta <= 16'h4628 ; -886 : douta <= 16'h4628 ; -887 : douta <= 16'h4628 ; -888 : douta <= 16'h4628 ; -889 : douta <= 16'h4628 ; -890 : douta <= 16'h4628 ; -891 : douta <= 16'h4628 ; -892 : douta <= 16'h4628 ; -893 : douta <= 16'h4628 ; -894 : douta <= 16'h4628 ; -895 : douta <= 16'h4628 ; -896 : douta <= 16'h4628 ; -897 : douta <= 16'h4528 ; -898 : douta <= 16'h4628 ; -899 : douta <= 16'h4528 ; -900 : douta <= 16'h4528 ; -901 : douta <= 16'h4528 ; -902 : douta <= 16'h4528 ; -903 : douta <= 16'h4528 ; -904 : douta <= 16'h4528 ; -905 : douta <= 16'h4528 ; -906 : douta <= 16'h4528 ; -907 : douta <= 16'h4528 ; -908 : douta <= 16'h4528 ; -909 : douta <= 16'h4528 ; -910 : douta <= 16'h4528 ; -911 : douta <= 16'h4528 ; -912 : douta <= 16'h4528 ; -913 : douta <= 16'h4428 ; -914 : douta <= 16'h4428 ; -915 : douta <= 16'h4528 ; -916 : douta <= 16'h4428 ; -917 : douta <= 16'h4428 ; -918 : douta <= 16'h4528 ; -919 : douta <= 16'h4528 ; -920 : douta <= 16'h4528 ; -921 : douta <= 16'h4528 ; -922 : douta <= 16'h4528 ; -923 : douta <= 16'h4528 ; -924 : douta <= 16'h4528 ; -925 : douta <= 16'h4528 ; -926 : douta <= 16'h4528 ; -927 : douta <= 16'h4428 ; -928 : douta <= 16'h4428 ; -929 : douta <= 16'h4428 ; -930 : douta <= 16'h4428 ; -931 : douta <= 16'h4428 ; -932 : douta <= 16'h4428 ; -933 : douta <= 16'h4428 ; -934 : douta <= 16'h4428 ; -935 : douta <= 16'h4428 ; -936 : douta <= 16'h4428 ; -937 : douta <= 16'h4428 ; -938 : douta <= 16'h4428 ; -939 : douta <= 16'h4428 ; -940 : douta <= 16'h4428 ; -941 : douta <= 16'h4428 ; -942 : douta <= 16'h4428 ; -943 : douta <= 16'h4428 ; -944 : douta <= 16'h4428 ; -945 : douta <= 16'h4428 ; -946 : douta <= 16'h4328 ; -947 : douta <= 16'h4328 ; -948 : douta <= 16'h4428 ; -949 : douta <= 16'h4328 ; -950 : douta <= 16'h4428 ; -951 : douta <= 16'h4428 ; -952 : douta <= 16'h4328 ; -953 : douta <= 16'h4328 ; -954 : douta <= 16'h4328 ; -955 : douta <= 16'h4328 ; -956 : douta <= 16'h4328 ; -957 : douta <= 16'h4328 ; -958 : douta <= 16'h4328 ; -959 : douta <= 16'h4328 ; -960 : douta <= 16'h4328 ; -961 : douta <= 16'h4328 ; -962 : douta <= 16'h4328 ; -963 : douta <= 16'h4228 ; -964 : douta <= 16'h4228 ; -965 : douta <= 16'h4228 ; -966 : douta <= 16'h4228 ; -967 : douta <= 16'h4228 ; -968 : douta <= 16'h4228 ; -969 : douta <= 16'h4228 ; -970 : douta <= 16'h4228 ; -971 : douta <= 16'h4228 ; -972 : douta <= 16'h4228 ; -973 : douta <= 16'h4228 ; -974 : douta <= 16'h4228 ; -975 : douta <= 16'h4228 ; -976 : douta <= 16'h4228 ; -977 : douta <= 16'h4228 ; -978 : douta <= 16'h4228 ; -979 : douta <= 16'h4228 ; -980 : douta <= 16'h4228 ; -981 : douta <= 16'h4228 ; -982 : douta <= 16'h4228 ; -983 : douta <= 16'h4228 ; -984 : douta <= 16'h4128 ; -985 : douta <= 16'h4128 ; -986 : douta <= 16'h4128 ; -987 : douta <= 16'h4128 ; -988 : douta <= 16'h4128 ; -989 : douta <= 16'h4128 ; -990 : douta <= 16'h4128 ; -991 : douta <= 16'h4128 ; -992 : douta <= 16'h4128 ; -993 : douta <= 16'h4128 ; -994 : douta <= 16'h4128 ; -995 : douta <= 16'h4128 ; -996 : douta <= 16'h4128 ; -997 : douta <= 16'h4128 ; -998 : douta <= 16'h4128 ; -999 : douta <= 16'h4128 ; -1000 : douta <= 16'h4128 ; -1001 : douta <= 16'h4128 ; -1002 : douta <= 16'h4128 ; -1003 : douta <= 16'h4128 ; -1004 : douta <= 16'h4028 ; -1005 : douta <= 16'h4128 ; -1006 : douta <= 16'h4128 ; -1007 : douta <= 16'h4128 ; -1008 : douta <= 16'h4128 ; -1009 : douta <= 16'h4128 ; -1010 : douta <= 16'h4128 ; -1011 : douta <= 16'h4128 ; -1012 : douta <= 16'h4128 ; -1013 : douta <= 16'h4128 ; -1014 : douta <= 16'h4128 ; -1015 : douta <= 16'h4028 ; -1016 : douta <= 16'h4028 ; -1017 : douta <= 16'h4028 ; -1018 : douta <= 16'h4028 ; -1019 : douta <= 16'h4028 ; -1020 : douta <= 16'h4028 ; -1021 : douta <= 16'h4028 ; -1022 : douta <= 16'h4028 ; -1023 : douta <= 16'h3F2A ; -1024 : douta <= 16'h4028 ; -1025 : douta <= 16'h4028 ; -1026 : douta <= 16'h3E2A ; -1027 : douta <= 16'h4028 ; -1028 : douta <= 16'h3F2A ; -1029 : douta <= 16'h4028 ; -1030 : douta <= 16'h4028 ; -1031 : douta <= 16'h4028 ; -1032 : douta <= 16'h4028 ; -1033 : douta <= 16'h4028 ; -1034 : douta <= 16'h4028 ; -1035 : douta <= 16'h4028 ; -1036 : douta <= 16'h4028 ; -1037 : douta <= 16'h4028 ; -1038 : douta <= 16'h4028 ; -1039 : douta <= 16'h4028 ; -1040 : douta <= 16'h4028 ; -1041 : douta <= 16'h4028 ; -1042 : douta <= 16'h4028 ; -1043 : douta <= 16'h4028 ; -1044 : douta <= 16'h4028 ; -1045 : douta <= 16'h4028 ; -1046 : douta <= 16'h4028 ; -1047 : douta <= 16'h4028 ; -1048 : douta <= 16'h4028 ; -1049 : douta <= 16'h4028 ; -1050 : douta <= 16'h3D2A ; -1051 : douta <= 16'h4028 ; -1052 : douta <= 16'h3E2A ; -1053 : douta <= 16'h3E2A ; -1054 : douta <= 16'h3E2A ; -1055 : douta <= 16'h3E2A ; -1056 : douta <= 16'h3E2A ; -1057 : douta <= 16'h3E2A ; -1058 : douta <= 16'h3E2A ; -1059 : douta <= 16'h3E2A ; -1060 : douta <= 16'h3E2A ; -1061 : douta <= 16'h3E2A ; -1062 : douta <= 16'h3E2A ; -1063 : douta <= 16'h3E2A ; -1064 : douta <= 16'h3E2A ; -1065 : douta <= 16'h3E2A ; -1066 : douta <= 16'h3E2A ; -1067 : douta <= 16'h3E2A ; -1068 : douta <= 16'h3E2A ; -1069 : douta <= 16'h3E2A ; -1070 : douta <= 16'h3E2A ; -1071 : douta <= 16'h3E2A ; -1072 : douta <= 16'h3E2A ; -1073 : douta <= 16'h3E2A ; -1074 : douta <= 16'h3E2A ; -1075 : douta <= 16'h3E2A ; -1076 : douta <= 16'h3D2A ; -1077 : douta <= 16'h3E2A ; -1078 : douta <= 16'h3D2A ; -1079 : douta <= 16'h3D2A ; -1080 : douta <= 16'h3D2A ; -1081 : douta <= 16'h3D2A ; -1082 : douta <= 16'h3D2A ; -1083 : douta <= 16'h3D2A ; -1084 : douta <= 16'h3D2A ; -1085 : douta <= 16'h3D2A ; -1086 : douta <= 16'h3D2A ; -1087 : douta <= 16'h3D2A ; -1088 : douta <= 16'h3D2A ; -1089 : douta <= 16'h3D2A ; -1090 : douta <= 16'h3D2A ; -1091 : douta <= 16'h3D2A ; -1092 : douta <= 16'h3C2A ; -1093 : douta <= 16'h3D2A ; -1094 : douta <= 16'h3D2A ; -1095 : douta <= 16'h3D2A ; -1096 : douta <= 16'h3C2A ; -1097 : douta <= 16'h3D2A ; -1098 : douta <= 16'h3D2A ; -1099 : douta <= 16'h3D2A ; -1100 : douta <= 16'h3D2A ; -1101 : douta <= 16'h3D2A ; -1102 : douta <= 16'h3C2A ; -1103 : douta <= 16'h3D2A ; -1104 : douta <= 16'h3B2A ; -1105 : douta <= 16'h3B2A ; -1106 : douta <= 16'h3B2A ; -1107 : douta <= 16'h3C2A ; -1108 : douta <= 16'h3C2A ; -1109 : douta <= 16'h3C2A ; -1110 : douta <= 16'h3C2A ; -1111 : douta <= 16'h3C2A ; -1112 : douta <= 16'h3C2A ; -1113 : douta <= 16'h3C2A ; -1114 : douta <= 16'h3C2A ; -1115 : douta <= 16'h3C2A ; -1116 : douta <= 16'h3C2A ; -1117 : douta <= 16'h3C2A ; -1118 : douta <= 16'h3C2A ; -1119 : douta <= 16'h3C2A ; -1120 : douta <= 16'h3C2A ; -1121 : douta <= 16'h3C2A ; -1122 : douta <= 16'h3C2A ; -1123 : douta <= 16'h3C2A ; -1124 : douta <= 16'h3C2A ; -1125 : douta <= 16'h3C2A ; -1126 : douta <= 16'h3C2A ; -1127 : douta <= 16'h3C2A ; -1128 : douta <= 16'h3C2A ; -1129 : douta <= 16'h3C2A ; -1130 : douta <= 16'h3C2A ; -1131 : douta <= 16'h3B2A ; -1132 : douta <= 16'h3B2A ; -1133 : douta <= 16'h3B2A ; -1134 : douta <= 16'h3B2A ; -1135 : douta <= 16'h3B2A ; -1136 : douta <= 16'h3B2A ; -1137 : douta <= 16'h3B2A ; -1138 : douta <= 16'h3A2A ; -1139 : douta <= 16'h3A2A ; -1140 : douta <= 16'h3A2A ; -1141 : douta <= 16'h3A2A ; -1142 : douta <= 16'h3A2A ; -1143 : douta <= 16'h3A2A ; -1144 : douta <= 16'h3A2A ; -1145 : douta <= 16'h3A2A ; -1146 : douta <= 16'h392A ; -1147 : douta <= 16'h392A ; -1148 : douta <= 16'h392A ; -1149 : douta <= 16'h3A2A ; -1150 : douta <= 16'h3A2A ; -1151 : douta <= 16'h3A2A ; -1152 : douta <= 16'h3A2A ; -1153 : douta <= 16'h3A2A ; -1154 : douta <= 16'h3A2A ; -1155 : douta <= 16'h3A2A ; -1156 : douta <= 16'h3A2A ; -1157 : douta <= 16'h3A2A ; -1158 : douta <= 16'h3A2A ; -1159 : douta <= 16'h3A2A ; -1160 : douta <= 16'h3A2A ; -1161 : douta <= 16'h3A2A ; -1162 : douta <= 16'h3A2A ; -1163 : douta <= 16'h392A ; -1164 : douta <= 16'h3A2A ; -1165 : douta <= 16'h392A ; -1166 : douta <= 16'h392A ; -1167 : douta <= 16'h392A ; -1168 : douta <= 16'h392A ; -1169 : douta <= 16'h392A ; -1170 : douta <= 16'h392A ; -1171 : douta <= 16'h392A ; -1172 : douta <= 16'h392A ; -1173 : douta <= 16'h392A ; -1174 : douta <= 16'h392A ; -1175 : douta <= 16'h392A ; -1176 : douta <= 16'h392A ; -1177 : douta <= 16'h392A ; -1178 : douta <= 16'h392A ; -1179 : douta <= 16'h382A ; -1180 : douta <= 16'h382A ; -1181 : douta <= 16'h392A ; -1182 : douta <= 16'h392A ; -1183 : douta <= 16'h392A ; -1184 : douta <= 16'h392A ; -1185 : douta <= 16'h392A ; -1186 : douta <= 16'h392A ; -1187 : douta <= 16'h392A ; -1188 : douta <= 16'h372A ; -1189 : douta <= 16'h372A ; -1190 : douta <= 16'h372A ; -1191 : douta <= 16'h372A ; -1192 : douta <= 16'h382A ; -1193 : douta <= 16'h382A ; -1194 : douta <= 16'h382A ; -1195 : douta <= 16'h382A ; -1196 : douta <= 16'h382A ; -1197 : douta <= 16'h382A ; -1198 : douta <= 16'h382A ; -1199 : douta <= 16'h382A ; -1200 : douta <= 16'h382A ; -1201 : douta <= 16'h382A ; -1202 : douta <= 16'h382A ; -1203 : douta <= 16'h382A ; -1204 : douta <= 16'h382A ; -1205 : douta <= 16'h382A ; -1206 : douta <= 16'h382A ; -1207 : douta <= 16'h382A ; -1208 : douta <= 16'h382A ; -1209 : douta <= 16'h382A ; -1210 : douta <= 16'h382A ; -1211 : douta <= 16'h382A ; -1212 : douta <= 16'h382A ; -1213 : douta <= 16'h382A ; -1214 : douta <= 16'h382A ; -1215 : douta <= 16'h382A ; -1216 : douta <= 16'h382A ; -1217 : douta <= 16'h372A ; -1218 : douta <= 16'h382A ; -1219 : douta <= 16'h372A ; -1220 : douta <= 16'h372A ; -1221 : douta <= 16'h372A ; -1222 : douta <= 16'h372A ; -1223 : douta <= 16'h372A ; -1224 : douta <= 16'h372A ; -1225 : douta <= 16'h372A ; -1226 : douta <= 16'h372A ; -1227 : douta <= 16'h362A ; -1228 : douta <= 16'h352A ; -1229 : douta <= 16'h362A ; -1230 : douta <= 16'h362A ; -1231 : douta <= 16'h362A ; -1232 : douta <= 16'h362A ; -1233 : douta <= 16'h362A ; -1234 : douta <= 16'h362A ; -1235 : douta <= 16'h362A ; -1236 : douta <= 16'h362A ; -1237 : douta <= 16'h362A ; -1238 : douta <= 16'h362A ; -1239 : douta <= 16'h362A ; -1240 : douta <= 16'h362A ; -1241 : douta <= 16'h362A ; -1242 : douta <= 16'h362A ; -1243 : douta <= 16'h362A ; -1244 : douta <= 16'h362A ; -1245 : douta <= 16'h362A ; -1246 : douta <= 16'h362A ; -1247 : douta <= 16'h362A ; -1248 : douta <= 16'h362A ; -1249 : douta <= 16'h362A ; -1250 : douta <= 16'h362A ; -1251 : douta <= 16'h362A ; -1252 : douta <= 16'h362A ; -1253 : douta <= 16'h352A ; -1254 : douta <= 16'h352A ; -1255 : douta <= 16'h352A ; -1256 : douta <= 16'h352A ; -1257 : douta <= 16'h352A ; -1258 : douta <= 16'h352A ; -1259 : douta <= 16'h352A ; -1260 : douta <= 16'h352A ; -1261 : douta <= 16'h352A ; -1262 : douta <= 16'h352A ; -1263 : douta <= 16'h352A ; -1264 : douta <= 16'h352A ; -1265 : douta <= 16'h352A ; -1266 : douta <= 16'h352A ; -1267 : douta <= 16'h342A ; -1268 : douta <= 16'h342A ; -1269 : douta <= 16'h352A ; -1270 : douta <= 16'h352A ; -1271 : douta <= 16'h352A ; -1272 : douta <= 16'h352A ; -1273 : douta <= 16'h352A ; -1274 : douta <= 16'h352A ; -1275 : douta <= 16'h352A ; -1276 : douta <= 16'h352A ; -1277 : douta <= 16'h352A ; -1278 : douta <= 16'h352A ; -1279 : douta <= 16'h352A ; -1280 : douta <= 16'h342A ; -1281 : douta <= 16'h342A ; -1282 : douta <= 16'h342A ; -1283 : douta <= 16'h342A ; -1284 : douta <= 16'h342A ; -1285 : douta <= 16'h342A ; -1286 : douta <= 16'h342A ; -1287 : douta <= 16'h342A ; -1288 : douta <= 16'h342A ; -1289 : douta <= 16'h342A ; -1290 : douta <= 16'h342A ; -1291 : douta <= 16'h342A ; -1292 : douta <= 16'h342A ; -1293 : douta <= 16'h342A ; -1294 : douta <= 16'h342A ; -1295 : douta <= 16'h342A ; -1296 : douta <= 16'h332A ; -1297 : douta <= 16'h332A ; -1298 : douta <= 16'h332A ; -1299 : douta <= 16'h342A ; -1300 : douta <= 16'h342A ; -1301 : douta <= 16'h342A ; -1302 : douta <= 16'h342A ; -1303 : douta <= 16'h342A ; -1304 : douta <= 16'h342A ; -1305 : douta <= 16'h332A ; -1306 : douta <= 16'h332A ; -1307 : douta <= 16'h332A ; -1308 : douta <= 16'h332A ; -1309 : douta <= 16'h332A ; -1310 : douta <= 16'h332A ; -1311 : douta <= 16'h332A ; -1312 : douta <= 16'h332A ; -1313 : douta <= 16'h332A ; -1314 : douta <= 16'h332A ; -1315 : douta <= 16'h322A ; -1316 : douta <= 16'h322A ; -1317 : douta <= 16'h322A ; -1318 : douta <= 16'h322A ; -1319 : douta <= 16'h322A ; -1320 : douta <= 16'h322A ; -1321 : douta <= 16'h312A ; -1322 : douta <= 16'h322A ; -1323 : douta <= 16'h312A ; -1324 : douta <= 16'h312A ; -1325 : douta <= 16'h322A ; -1326 : douta <= 16'h322A ; -1327 : douta <= 16'h322A ; -1328 : douta <= 16'h322A ; -1329 : douta <= 16'h322A ; -1330 : douta <= 16'h322A ; -1331 : douta <= 16'h322A ; -1332 : douta <= 16'h322A ; -1333 : douta <= 16'h322A ; -1334 : douta <= 16'h322A ; -1335 : douta <= 16'h322A ; -1336 : douta <= 16'h322A ; -1337 : douta <= 16'h322A ; -1338 : douta <= 16'h322A ; -1339 : douta <= 16'h322A ; -1340 : douta <= 16'h312A ; -1341 : douta <= 16'h312A ; -1342 : douta <= 16'h312A ; -1343 : douta <= 16'h312A ; -1344 : douta <= 16'h312A ; -1345 : douta <= 16'h312A ; -1346 : douta <= 16'h312A ; -1347 : douta <= 16'h312A ; -1348 : douta <= 16'h312A ; -1349 : douta <= 16'h312A ; -1350 : douta <= 16'h312A ; -1351 : douta <= 16'h312A ; -1352 : douta <= 16'h312A ; -1353 : douta <= 16'h312A ; -1354 : douta <= 16'h312A ; -1355 : douta <= 16'h312A ; -1356 : douta <= 16'h302A ; -1357 : douta <= 16'h312A ; -1358 : douta <= 16'h312A ; -1359 : douta <= 16'h312A ; -1360 : douta <= 16'h312A ; -1361 : douta <= 16'h312A ; -1362 : douta <= 16'h312A ; -1363 : douta <= 16'h312A ; -1364 : douta <= 16'h312A ; -1365 : douta <= 16'h312A ; -1366 : douta <= 16'h2F2A ; -1367 : douta <= 16'h302A ; -1368 : douta <= 16'h302A ; -1369 : douta <= 16'h302A ; -1370 : douta <= 16'h302A ; -1371 : douta <= 16'h302A ; -1372 : douta <= 16'h302A ; -1373 : douta <= 16'h302A ; -1374 : douta <= 16'h302A ; -1375 : douta <= 16'h302A ; -1376 : douta <= 16'h302A ; -1377 : douta <= 16'h302A ; -1378 : douta <= 16'h302A ; -1379 : douta <= 16'h302A ; -1380 : douta <= 16'h302A ; -1381 : douta <= 16'h302A ; -1382 : douta <= 16'h2F2A ; -1383 : douta <= 16'h302A ; -1384 : douta <= 16'h302A ; -1385 : douta <= 16'h302A ; -1386 : douta <= 16'h302A ; -1387 : douta <= 16'h302A ; -1388 : douta <= 16'h302A ; -1389 : douta <= 16'h302A ; -1390 : douta <= 16'h302A ; -1391 : douta <= 16'h2F2A ; -1392 : douta <= 16'h302A ; -1393 : douta <= 16'h302A ; -1394 : douta <= 16'h302A ; -1395 : douta <= 16'h2F2A ; -1396 : douta <= 16'h302A ; -1397 : douta <= 16'h2F2A ; -1398 : douta <= 16'h2F2A ; -1399 : douta <= 16'h2F2A ; -1400 : douta <= 16'h2E2A ; -1401 : douta <= 16'h2E2A ; -1402 : douta <= 16'h2D2A ; -1403 : douta <= 16'h2D2A ; -1404 : douta <= 16'h2D2A ; -1405 : douta <= 16'h2D2A ; -1406 : douta <= 16'h2E2A ; -1407 : douta <= 16'h2E2A ; -1408 : douta <= 16'h2E2A ; -1409 : douta <= 16'h2E2A ; -1410 : douta <= 16'h2E2A ; -1411 : douta <= 16'h2E2A ; -1412 : douta <= 16'h2E2A ; -1413 : douta <= 16'h2E2A ; -1414 : douta <= 16'h2E2A ; -1415 : douta <= 16'h2E2A ; -1416 : douta <= 16'h2E2A ; -1417 : douta <= 16'h2E2A ; -1418 : douta <= 16'h2E2A ; -1419 : douta <= 16'h2E2A ; -1420 : douta <= 16'h2E2A ; -1421 : douta <= 16'h2E2A ; -1422 : douta <= 16'h2E2A ; -1423 : douta <= 16'h2E2A ; -1424 : douta <= 16'h2E2A ; -1425 : douta <= 16'h2E2A ; -1426 : douta <= 16'h2E2A ; -1427 : douta <= 16'h2D2A ; -1428 : douta <= 16'h2E2A ; -1429 : douta <= 16'h2D2A ; -1430 : douta <= 16'h2D2A ; -1431 : douta <= 16'h2D2A ; -1432 : douta <= 16'h2D2A ; -1433 : douta <= 16'h2D2A ; -1434 : douta <= 16'h2D2A ; -1435 : douta <= 16'h2D2A ; -1436 : douta <= 16'h2D2A ; -1437 : douta <= 16'h2D2A ; -1438 : douta <= 16'h2D2A ; -1439 : douta <= 16'h2D2A ; -1440 : douta <= 16'h2D2A ; -1441 : douta <= 16'h2D2A ; -1442 : douta <= 16'h2D2A ; -1443 : douta <= 16'h2C2A ; -1444 : douta <= 16'h2D2A ; -1445 : douta <= 16'h2C2A ; -1446 : douta <= 16'h2D2A ; -1447 : douta <= 16'h2D2A ; -1448 : douta <= 16'h2D2A ; -1449 : douta <= 16'h2D2A ; -1450 : douta <= 16'h2D2A ; -1451 : douta <= 16'h2D2A ; -1452 : douta <= 16'h2D2A ; -1453 : douta <= 16'h2D2A ; -1454 : douta <= 16'h2D2A ; -1455 : douta <= 16'h2D2A ; -1456 : douta <= 16'h2C2A ; -1457 : douta <= 16'h2C2A ; -1458 : douta <= 16'h2C2A ; -1459 : douta <= 16'h2B2A ; -1460 : douta <= 16'h2B2A ; -1461 : douta <= 16'h2C2A ; -1462 : douta <= 16'h2C2A ; -1463 : douta <= 16'h2C2A ; -1464 : douta <= 16'h2C2A ; -1465 : douta <= 16'h2C2A ; -1466 : douta <= 16'h2C2A ; -1467 : douta <= 16'h2C2A ; -1468 : douta <= 16'h2C2A ; -1469 : douta <= 16'h2C2A ; -1470 : douta <= 16'h2C2A ; -1471 : douta <= 16'h2C2A ; -1472 : douta <= 16'h2C2A ; -1473 : douta <= 16'h2C2A ; -1474 : douta <= 16'h2C2A ; -1475 : douta <= 16'h2C2A ; -1476 : douta <= 16'h2C2A ; -1477 : douta <= 16'h2C2A ; -1478 : douta <= 16'h2C2A ; -1479 : douta <= 16'h2C2A ; -1480 : douta <= 16'h2C2A ; -1481 : douta <= 16'h2C2A ; -1482 : douta <= 16'h2C2A ; -1483 : douta <= 16'h2C2A ; -1484 : douta <= 16'h2C2A ; -1485 : douta <= 16'h2B2A ; -1486 : douta <= 16'h2B2A ; -1487 : douta <= 16'h2B2A ; -1488 : douta <= 16'h2B2A ; -1489 : douta <= 16'h2A2A ; -1490 : douta <= 16'h2B2A ; -1491 : douta <= 16'h2A2A ; -1492 : douta <= 16'h2A2A ; -1493 : douta <= 16'h2A2A ; -1494 : douta <= 16'h2A2A ; -1495 : douta <= 16'h2A2A ; -1496 : douta <= 16'h2A2A ; -1497 : douta <= 16'h2A2A ; -1498 : douta <= 16'h2A2A ; -1499 : douta <= 16'h2A2A ; -1500 : douta <= 16'h292A ; -1501 : douta <= 16'h292A ; -1502 : douta <= 16'h292A ; -1503 : douta <= 16'h2A2A ; -1504 : douta <= 16'h2A2A ; -1505 : douta <= 16'h2A2A ; -1506 : douta <= 16'h2A2A ; -1507 : douta <= 16'h2A2A ; -1508 : douta <= 16'h2A2A ; -1509 : douta <= 16'h2A2A ; -1510 : douta <= 16'h2A2A ; -1511 : douta <= 16'h2A2A ; -1512 : douta <= 16'h2A2A ; -1513 : douta <= 16'h2A2A ; -1514 : douta <= 16'h2A2A ; -1515 : douta <= 16'h292A ; -1516 : douta <= 16'h292A ; -1517 : douta <= 16'h292A ; -1518 : douta <= 16'h292A ; -1519 : douta <= 16'h292A ; -1520 : douta <= 16'h292A ; -1521 : douta <= 16'h292A ; -1522 : douta <= 16'h292A ; -1523 : douta <= 16'h292A ; -1524 : douta <= 16'h292A ; -1525 : douta <= 16'h292A ; -1526 : douta <= 16'h292A ; -1527 : douta <= 16'h292A ; -1528 : douta <= 16'h292A ; -1529 : douta <= 16'h292A ; -1530 : douta <= 16'h292A ; -1531 : douta <= 16'h292A ; -1532 : douta <= 16'h282A ; -1533 : douta <= 16'h282A ; -1534 : douta <= 16'h282A ; -1535 : douta <= 16'h292A ; -1536 : douta <= 16'h292A ; -1537 : douta <= 16'h292A ; -1538 : douta <= 16'h292A ; -1539 : douta <= 16'h292A ; -1540 : douta <= 16'h292A ; -1541 : douta <= 16'h292A ; -1542 : douta <= 16'h272A ; -1543 : douta <= 16'h292A ; -1544 : douta <= 16'h272A ; -1545 : douta <= 16'h272A ; -1546 : douta <= 16'h282A ; -1547 : douta <= 16'h282A ; -1548 : douta <= 16'h282A ; -1549 : douta <= 16'h282A ; -1550 : douta <= 16'h282A ; -1551 : douta <= 16'h282A ; -1552 : douta <= 16'h282A ; -1553 : douta <= 16'h282A ; -1554 : douta <= 16'h282A ; -1555 : douta <= 16'h282A ; -1556 : douta <= 16'h282A ; -1557 : douta <= 16'h282A ; -1558 : douta <= 16'h282A ; -1559 : douta <= 16'h282A ; -1560 : douta <= 16'h282A ; -1561 : douta <= 16'h282A ; -1562 : douta <= 16'h282A ; -1563 : douta <= 16'h282A ; -1564 : douta <= 16'h282A ; -1565 : douta <= 16'h282A ; -1566 : douta <= 16'h282A ; -1567 : douta <= 16'h282A ; -1568 : douta <= 16'h282A ; -1569 : douta <= 16'h282A ; -1570 : douta <= 16'h282A ; -1571 : douta <= 16'h282A ; -1572 : douta <= 16'h282A ; -1573 : douta <= 16'h282A ; -1574 : douta <= 16'h282A ; -1575 : douta <= 16'h272A ; -1576 : douta <= 16'h272A ; -1577 : douta <= 16'h272A ; -1578 : douta <= 16'h272A ; -1579 : douta <= 16'h272A ; -1580 : douta <= 16'h272A ; -1581 : douta <= 16'h272A ; -1582 : douta <= 16'h272A ; -1583 : douta <= 16'h262A ; -1584 : douta <= 16'h262A ; -1585 : douta <= 16'h252A ; -1586 : douta <= 16'h252A ; -1587 : douta <= 16'h262A ; -1588 : douta <= 16'h262A ; -1589 : douta <= 16'h252A ; -1590 : douta <= 16'h262A ; -1591 : douta <= 16'h262A ; -1592 : douta <= 16'h262A ; -1593 : douta <= 16'h262A ; -1594 : douta <= 16'h262A ; -1595 : douta <= 16'h262A ; -1596 : douta <= 16'h262A ; -1597 : douta <= 16'h262A ; -1598 : douta <= 16'h262A ; -1599 : douta <= 16'h262A ; -1600 : douta <= 16'h262A ; -1601 : douta <= 16'h262A ; -1602 : douta <= 16'h262A ; -1603 : douta <= 16'h262A ; -1604 : douta <= 16'h262A ; -1605 : douta <= 16'h262A ; -1606 : douta <= 16'h262A ; -1607 : douta <= 16'h262A ; -1608 : douta <= 16'h262A ; -1609 : douta <= 16'h252A ; -1610 : douta <= 16'h252A ; -1611 : douta <= 16'h252A ; -1612 : douta <= 16'h252A ; -1613 : douta <= 16'h252A ; -1614 : douta <= 16'h252A ; -1615 : douta <= 16'h252A ; -1616 : douta <= 16'h252A ; -1617 : douta <= 16'h252A ; -1618 : douta <= 16'h252A ; -1619 : douta <= 16'h252A ; -1620 : douta <= 16'h252A ; -1621 : douta <= 16'h252A ; -1622 : douta <= 16'h252A ; -1623 : douta <= 16'h252A ; -1624 : douta <= 16'h252A ; -1625 : douta <= 16'h242A ; -1626 : douta <= 16'h252A ; -1627 : douta <= 16'h252A ; -1628 : douta <= 16'h252A ; -1629 : douta <= 16'h252A ; -1630 : douta <= 16'h252A ; -1631 : douta <= 16'h252A ; -1632 : douta <= 16'h252A ; -1633 : douta <= 16'h252A ; -1634 : douta <= 16'h252A ; -1635 : douta <= 16'h252A ; -1636 : douta <= 16'h252A ; -1637 : douta <= 16'h252A ; -1638 : douta <= 16'h242A ; -1639 : douta <= 16'h242A ; -1640 : douta <= 16'h242A ; -1641 : douta <= 16'h242A ; -1642 : douta <= 16'h242A ; -1643 : douta <= 16'h242A ; -1644 : douta <= 16'h242A ; -1645 : douta <= 16'h242A ; -1646 : douta <= 16'h242A ; -1647 : douta <= 16'h242A ; -1648 : douta <= 16'h242A ; -1649 : douta <= 16'h242A ; -1650 : douta <= 16'h242A ; -1651 : douta <= 16'h242A ; -1652 : douta <= 16'h232A ; -1653 : douta <= 16'h232A ; -1654 : douta <= 16'h242A ; -1655 : douta <= 16'h242A ; -1656 : douta <= 16'h242A ; -1657 : douta <= 16'h242A ; -1658 : douta <= 16'h242A ; -1659 : douta <= 16'h242A ; -1660 : douta <= 16'h242A ; -1661 : douta <= 16'h242A ; -1662 : douta <= 16'h242A ; -1663 : douta <= 16'h242A ; -1664 : douta <= 16'h242A ; -1665 : douta <= 16'h232A ; -1666 : douta <= 16'h232A ; -1667 : douta <= 16'h232A ; -1668 : douta <= 16'h232A ; -1669 : douta <= 16'h232A ; -1670 : douta <= 16'h232A ; -1671 : douta <= 16'h232A ; -1672 : douta <= 16'h222A ; -1673 : douta <= 16'h222A ; -1674 : douta <= 16'h222A ; -1675 : douta <= 16'h222A ; -1676 : douta <= 16'h222A ; -1677 : douta <= 16'h222A ; -1678 : douta <= 16'h222A ; -1679 : douta <= 16'h222A ; -1680 : douta <= 16'h222A ; -1681 : douta <= 16'h212A ; -1682 : douta <= 16'h222A ; -1683 : douta <= 16'h212A ; -1684 : douta <= 16'h222A ; -1685 : douta <= 16'h222A ; -1686 : douta <= 16'h222A ; -1687 : douta <= 16'h222A ; -1688 : douta <= 16'h222A ; -1689 : douta <= 16'h222A ; -1690 : douta <= 16'h222A ; -1691 : douta <= 16'h222A ; -1692 : douta <= 16'h222A ; -1693 : douta <= 16'h222A ; -1694 : douta <= 16'h222A ; -1695 : douta <= 16'h222A ; -1696 : douta <= 16'h222A ; -1697 : douta <= 16'h222A ; -1698 : douta <= 16'h222A ; -1699 : douta <= 16'h212A ; -1700 : douta <= 16'h212A ; -1701 : douta <= 16'h212A ; -1702 : douta <= 16'h212A ; -1703 : douta <= 16'h212A ; -1704 : douta <= 16'h212A ; -1705 : douta <= 16'h212A ; -1706 : douta <= 16'h212A ; -1707 : douta <= 16'h212A ; -1708 : douta <= 16'h212A ; -1709 : douta <= 16'h212A ; -1710 : douta <= 16'h212A ; -1711 : douta <= 16'h212A ; -1712 : douta <= 16'h212A ; -1713 : douta <= 16'h212A ; -1714 : douta <= 16'h202A ; -1715 : douta <= 16'h202A ; -1716 : douta <= 16'h212A ; -1717 : douta <= 16'h212A ; -1718 : douta <= 16'h212A ; -1719 : douta <= 16'h212A ; -1720 : douta <= 16'h212A ; -1721 : douta <= 16'h212A ; -1722 : douta <= 16'h212A ; -1723 : douta <= 16'h212A ; -1724 : douta <= 16'h212A ; -1725 : douta <= 16'h212A ; -1726 : douta <= 16'h202A ; -1727 : douta <= 16'h212A ; -1728 : douta <= 16'h202A ; -1729 : douta <= 16'h202A ; -1730 : douta <= 16'h202A ; -1731 : douta <= 16'h202A ; -1732 : douta <= 16'h202A ; -1733 : douta <= 16'h202A ; -1734 : douta <= 16'h202A ; -1735 : douta <= 16'h202A ; -1736 : douta <= 16'h202A ; -1737 : douta <= 16'h202A ; -1738 : douta <= 16'h202A ; -1739 : douta <= 16'h202A ; -1740 : douta <= 16'h202A ; -1741 : douta <= 16'h202A ; -1742 : douta <= 16'h202A ; -1743 : douta <= 16'h202A ; -1744 : douta <= 16'h202A ; -1745 : douta <= 16'h202A ; -1746 : douta <= 16'h202A ; -1747 : douta <= 16'h202A ; -1748 : douta <= 16'h202A ; -1749 : douta <= 16'h202A ; -1750 : douta <= 16'h202A ; -1751 : douta <= 16'h1F2C ; -1752 : douta <= 16'h202A ; -1753 : douta <= 16'h202A ; -1754 : douta <= 16'h202A ; -1755 : douta <= 16'h202A ; -1756 : douta <= 16'h202A ; -1757 : douta <= 16'h1D2C ; -1758 : douta <= 16'h202A ; -1759 : douta <= 16'h202A ; -1760 : douta <= 16'h202A ; -1761 : douta <= 16'h202A ; -1762 : douta <= 16'h1E2C ; -1763 : douta <= 16'h202A ; -1764 : douta <= 16'h202A ; -1765 : douta <= 16'h202A ; -1766 : douta <= 16'h202A ; -1767 : douta <= 16'h1E2C ; -1768 : douta <= 16'h202A ; -1769 : douta <= 16'h1E2C ; -1770 : douta <= 16'h1E2C ; -1771 : douta <= 16'h1E2C ; -1772 : douta <= 16'h1E2C ; -1773 : douta <= 16'h1E2C ; -1774 : douta <= 16'h1E2C ; -1775 : douta <= 16'h1E2C ; -1776 : douta <= 16'h1E2C ; -1777 : douta <= 16'h1E2C ; -1778 : douta <= 16'h1E2C ; -1779 : douta <= 16'h1E2C ; -1780 : douta <= 16'h1E2C ; -1781 : douta <= 16'h1E2C ; -1782 : douta <= 16'h1E2C ; -1783 : douta <= 16'h1D2C ; -1784 : douta <= 16'h1D2C ; -1785 : douta <= 16'h1D2C ; -1786 : douta <= 16'h1D2C ; -1787 : douta <= 16'h1D2C ; -1788 : douta <= 16'h1D2C ; -1789 : douta <= 16'h1D2C ; -1790 : douta <= 16'h1D2C ; -1791 : douta <= 16'h1D2C ; -1792 : douta <= 16'h1D2C ; -1793 : douta <= 16'h1D2C ; -1794 : douta <= 16'h1D2C ; -1795 : douta <= 16'h1D2C ; -1796 : douta <= 16'h1D2C ; -1797 : douta <= 16'h1C2C ; -1798 : douta <= 16'h1C2C ; -1799 : douta <= 16'h1C2C ; -1800 : douta <= 16'h1C2C ; -1801 : douta <= 16'h1D2C ; -1802 : douta <= 16'h1D2C ; -1803 : douta <= 16'h1D2C ; -1804 : douta <= 16'h1D2C ; -1805 : douta <= 16'h1D2C ; -1806 : douta <= 16'h1D2C ; -1807 : douta <= 16'h1D2C ; -1808 : douta <= 16'h1D2C ; -1809 : douta <= 16'h1D2C ; -1810 : douta <= 16'h1D2C ; -1811 : douta <= 16'h1C2C ; -1812 : douta <= 16'h1C2C ; -1813 : douta <= 16'h1C2C ; -1814 : douta <= 16'h1C2C ; -1815 : douta <= 16'h1C2C ; -1816 : douta <= 16'h1C2C ; -1817 : douta <= 16'h1B2C ; -1818 : douta <= 16'h1C2C ; -1819 : douta <= 16'h1B2C ; -1820 : douta <= 16'h1B2C ; -1821 : douta <= 16'h1B2C ; -1822 : douta <= 16'h1C2C ; -1823 : douta <= 16'h1C2C ; -1824 : douta <= 16'h1C2C ; -1825 : douta <= 16'h1C2C ; -1826 : douta <= 16'h1C2C ; -1827 : douta <= 16'h1C2C ; -1828 : douta <= 16'h1C2C ; -1829 : douta <= 16'h1C2C ; -1830 : douta <= 16'h1C2C ; -1831 : douta <= 16'h1C2C ; -1832 : douta <= 16'h1C2C ; -1833 : douta <= 16'h1C2C ; -1834 : douta <= 16'h1C2C ; -1835 : douta <= 16'h1C2C ; -1836 : douta <= 16'h1C2C ; -1837 : douta <= 16'h1C2C ; -1838 : douta <= 16'h1C2C ; -1839 : douta <= 16'h1C2C ; -1840 : douta <= 16'h1B2C ; -1841 : douta <= 16'h1B2C ; -1842 : douta <= 16'h1B2C ; -1843 : douta <= 16'h1B2C ; -1844 : douta <= 16'h1B2C ; -1845 : douta <= 16'h1B2C ; -1846 : douta <= 16'h1B2C ; -1847 : douta <= 16'h1B2C ; -1848 : douta <= 16'h1B2C ; -1849 : douta <= 16'h1B2C ; -1850 : douta <= 16'h1A2C ; -1851 : douta <= 16'h1A2C ; -1852 : douta <= 16'h1A2C ; -1853 : douta <= 16'h1A2C ; -1854 : douta <= 16'h1A2C ; -1855 : douta <= 16'h1A2C ; -1856 : douta <= 16'h192C ; -1857 : douta <= 16'h192C ; -1858 : douta <= 16'h192C ; -1859 : douta <= 16'h1A2C ; -1860 : douta <= 16'h1A2C ; -1861 : douta <= 16'h1A2C ; -1862 : douta <= 16'h1A2C ; -1863 : douta <= 16'h1A2C ; -1864 : douta <= 16'h1A2C ; -1865 : douta <= 16'h1A2C ; -1866 : douta <= 16'h1A2C ; -1867 : douta <= 16'h1A2C ; -1868 : douta <= 16'h1A2C ; -1869 : douta <= 16'h1A2C ; -1870 : douta <= 16'h1A2C ; -1871 : douta <= 16'h1A2C ; -1872 : douta <= 16'h1A2C ; -1873 : douta <= 16'h1A2C ; -1874 : douta <= 16'h1A2C ; -1875 : douta <= 16'h1A2C ; -1876 : douta <= 16'h1A2C ; -1877 : douta <= 16'h1A2C ; -1878 : douta <= 16'h192C ; -1879 : douta <= 16'h192C ; -1880 : douta <= 16'h192C ; -1881 : douta <= 16'h192C ; -1882 : douta <= 16'h192C ; -1883 : douta <= 16'h192C ; -1884 : douta <= 16'h192C ; -1885 : douta <= 16'h192C ; -1886 : douta <= 16'h192C ; -1887 : douta <= 16'h192C ; -1888 : douta <= 16'h192C ; -1889 : douta <= 16'h192C ; -1890 : douta <= 16'h192C ; -1891 : douta <= 16'h192C ; -1892 : douta <= 16'h182C ; -1893 : douta <= 16'h192C ; -1894 : douta <= 16'h192C ; -1895 : douta <= 16'h192C ; -1896 : douta <= 16'h192C ; -1897 : douta <= 16'h192C ; -1898 : douta <= 16'h192C ; -1899 : douta <= 16'h192C ; -1900 : douta <= 16'h192C ; -1901 : douta <= 16'h192C ; -1902 : douta <= 16'h192C ; -1903 : douta <= 16'h192C ; -1904 : douta <= 16'h192C ; -1905 : douta <= 16'h192C ; -1906 : douta <= 16'h182C ; -1907 : douta <= 16'h182C ; -1908 : douta <= 16'h182C ; -1909 : douta <= 16'h172C ; -1910 : douta <= 16'h182C ; -1911 : douta <= 16'h172C ; -1912 : douta <= 16'h172C ; -1913 : douta <= 16'h172C ; -1914 : douta <= 16'h182C ; -1915 : douta <= 16'h182C ; -1916 : douta <= 16'h182C ; -1917 : douta <= 16'h182C ; -1918 : douta <= 16'h182C ; -1919 : douta <= 16'h182C ; -1920 : douta <= 16'h182C ; -1921 : douta <= 16'h182C ; -1922 : douta <= 16'h182C ; -1923 : douta <= 16'h182C ; -1924 : douta <= 16'h182C ; -1925 : douta <= 16'h182C ; -1926 : douta <= 16'h182C ; -1927 : douta <= 16'h182C ; -1928 : douta <= 16'h182C ; -1929 : douta <= 16'h182C ; -1930 : douta <= 16'h182C ; -1931 : douta <= 16'h182C ; -1932 : douta <= 16'h182C ; -1933 : douta <= 16'h182C ; -1934 : douta <= 16'h182C ; -1935 : douta <= 16'h172C ; -1936 : douta <= 16'h172C ; -1937 : douta <= 16'h172C ; -1938 : douta <= 16'h172C ; -1939 : douta <= 16'h172C ; -1940 : douta <= 16'h172C ; -1941 : douta <= 16'h172C ; -1942 : douta <= 16'h172C ; -1943 : douta <= 16'h152C ; -1944 : douta <= 16'h152C ; -1945 : douta <= 16'h152C ; -1946 : douta <= 16'h152C ; -1947 : douta <= 16'h152C ; -1948 : douta <= 16'h162C ; -1949 : douta <= 16'h162C ; -1950 : douta <= 16'h162C ; -1951 : douta <= 16'h162C ; -1952 : douta <= 16'h162C ; -1953 : douta <= 16'h162C ; -1954 : douta <= 16'h162C ; -1955 : douta <= 16'h162C ; -1956 : douta <= 16'h162C ; -1957 : douta <= 16'h162C ; -1958 : douta <= 16'h162C ; -1959 : douta <= 16'h162C ; -1960 : douta <= 16'h162C ; -1961 : douta <= 16'h162C ; -1962 : douta <= 16'h162C ; -1963 : douta <= 16'h162C ; -1964 : douta <= 16'h162C ; -1965 : douta <= 16'h162C ; -1966 : douta <= 16'h162C ; -1967 : douta <= 16'h162C ; -1968 : douta <= 16'h162C ; -1969 : douta <= 16'h162C ; -1970 : douta <= 16'h162C ; -1971 : douta <= 16'h162C ; -1972 : douta <= 16'h152C ; -1973 : douta <= 16'h152C ; -1974 : douta <= 16'h152C ; -1975 : douta <= 16'h152C ; -1976 : douta <= 16'h152C ; -1977 : douta <= 16'h152C ; -1978 : douta <= 16'h152C ; -1979 : douta <= 16'h152C ; -1980 : douta <= 16'h152C ; -1981 : douta <= 16'h152C ; -1982 : douta <= 16'h152C ; -1983 : douta <= 16'h152C ; -1984 : douta <= 16'h152C ; -1985 : douta <= 16'h152C ; -1986 : douta <= 16'h152C ; -1987 : douta <= 16'h142C ; -1988 : douta <= 16'h142C ; -1989 : douta <= 16'h152C ; -1990 : douta <= 16'h152C ; -1991 : douta <= 16'h152C ; -1992 : douta <= 16'h152C ; -1993 : douta <= 16'h152C ; -1994 : douta <= 16'h152C ; -1995 : douta <= 16'h152C ; -1996 : douta <= 16'h152C ; -1997 : douta <= 16'h152C ; -1998 : douta <= 16'h152C ; -1999 : douta <= 16'h152C ; -2000 : douta <= 16'h152C ; -2001 : douta <= 16'h152C ; -2002 : douta <= 16'h142C ; -2003 : douta <= 16'h142C ; -2004 : douta <= 16'h142C ; -2005 : douta <= 16'h142C ; -2006 : douta <= 16'h142C ; -2007 : douta <= 16'h142C ; -2008 : douta <= 16'h142C ; -2009 : douta <= 16'h142C ; -2010 : douta <= 16'h142C ; -2011 : douta <= 16'h142C ; -2012 : douta <= 16'h142C ; -2013 : douta <= 16'h142C ; -2014 : douta <= 16'h142C ; -2015 : douta <= 16'h142C ; -2016 : douta <= 16'h142C ; -2017 : douta <= 16'h142C ; -2018 : douta <= 16'h142C ; -2019 : douta <= 16'h122C ; -2020 : douta <= 16'h132C ; -2021 : douta <= 16'h142C ; -2022 : douta <= 16'h142C ; -2023 : douta <= 16'h142C ; -2024 : douta <= 16'h142C ; -2025 : douta <= 16'h142C ; -2026 : douta <= 16'h142C ; -2027 : douta <= 16'h132C ; -2028 : douta <= 16'h132C ; -2029 : douta <= 16'h132C ; -2030 : douta <= 16'h132C ; -2031 : douta <= 16'h132C ; -2032 : douta <= 16'h132C ; -2033 : douta <= 16'h132C ; -2034 : douta <= 16'h132C ; -2035 : douta <= 16'h132C ; -2036 : douta <= 16'h132C ; -2037 : douta <= 16'h122C ; -2038 : douta <= 16'h132C ; -2039 : douta <= 16'h122C ; -2040 : douta <= 16'h122C ; -2041 : douta <= 16'h122C ; -2042 : douta <= 16'h122C ; -2043 : douta <= 16'h112C ; -2044 : douta <= 16'h122C ; -2045 : douta <= 16'h112C ; -2046 : douta <= 16'h122C ; -2047 : douta <= 16'h122C ; -2048 : douta <= 16'h122C ; -2049 : douta <= 16'h122C ; -2050 : douta <= 16'h122C ; -2051 : douta <= 16'h122C ; -2052 : douta <= 16'h122C ; -2053 : douta <= 16'h122C ; -2054 : douta <= 16'h122C ; -2055 : douta <= 16'h122C ; -2056 : douta <= 16'h122C ; -2057 : douta <= 16'h122C ; -2058 : douta <= 16'h122C ; -2059 : douta <= 16'h122C ; -2060 : douta <= 16'h122C ; -2061 : douta <= 16'h122C ; -2062 : douta <= 16'h122C ; -2063 : douta <= 16'h122C ; -2064 : douta <= 16'h122C ; -2065 : douta <= 16'h122C ; -2066 : douta <= 16'h112C ; -2067 : douta <= 16'h112C ; -2068 : douta <= 16'h112C ; -2069 : douta <= 16'h112C ; -2070 : douta <= 16'h112C ; -2071 : douta <= 16'h112C ; -2072 : douta <= 16'h112C ; -2073 : douta <= 16'h112C ; -2074 : douta <= 16'h112C ; -2075 : douta <= 16'h112C ; -2076 : douta <= 16'h112C ; -2077 : douta <= 16'h112C ; -2078 : douta <= 16'h112C ; -2079 : douta <= 16'h112C ; -2080 : douta <= 16'h112C ; -2081 : douta <= 16'h102C ; -2082 : douta <= 16'h102C ; -2083 : douta <= 16'h102C ; -2084 : douta <= 16'h102C ; -2085 : douta <= 16'h112C ; -2086 : douta <= 16'h112C ; -2087 : douta <= 16'h112C ; -2088 : douta <= 16'h112C ; -2089 : douta <= 16'h112C ; -2090 : douta <= 16'h112C ; -2091 : douta <= 16'h0F2C ; -2092 : douta <= 16'h112C ; -2093 : douta <= 16'h112C ; -2094 : douta <= 16'h112C ; -2095 : douta <= 16'h102C ; -2096 : douta <= 16'h102C ; -2097 : douta <= 16'h102C ; -2098 : douta <= 16'h102C ; -2099 : douta <= 16'h102C ; -2100 : douta <= 16'h102C ; -2101 : douta <= 16'h102C ; -2102 : douta <= 16'h102C ; -2103 : douta <= 16'h102C ; -2104 : douta <= 16'h102C ; -2105 : douta <= 16'h102C ; -2106 : douta <= 16'h102C ; -2107 : douta <= 16'h102C ; -2108 : douta <= 16'h0E2C ; -2109 : douta <= 16'h102C ; -2110 : douta <= 16'h102C ; -2111 : douta <= 16'h102C ; -2112 : douta <= 16'h102C ; -2113 : douta <= 16'h102C ; -2114 : douta <= 16'h102C ; -2115 : douta <= 16'h102C ; -2116 : douta <= 16'h102C ; -2117 : douta <= 16'h102C ; -2118 : douta <= 16'h102C ; -2119 : douta <= 16'h102C ; -2120 : douta <= 16'h102C ; -2121 : douta <= 16'h102C ; -2122 : douta <= 16'h102C ; -2123 : douta <= 16'h102C ; -2124 : douta <= 16'h0F2C ; -2125 : douta <= 16'h0F2C ; -2126 : douta <= 16'h0F2C ; -2127 : douta <= 16'h0E2C ; -2128 : douta <= 16'h0F2C ; -2129 : douta <= 16'h0F2C ; -2130 : douta <= 16'h0F2C ; -2131 : douta <= 16'h0E2C ; -2132 : douta <= 16'h0E2C ; -2133 : douta <= 16'h0D2C ; -2134 : douta <= 16'h0D2C ; -2135 : douta <= 16'h0D2C ; -2136 : douta <= 16'h0E2C ; -2137 : douta <= 16'h0E2C ; -2138 : douta <= 16'h0E2C ; -2139 : douta <= 16'h0E2C ; -2140 : douta <= 16'h0E2C ; -2141 : douta <= 16'h0E2C ; -2142 : douta <= 16'h0E2C ; -2143 : douta <= 16'h0E2C ; -2144 : douta <= 16'h0E2C ; -2145 : douta <= 16'h0E2C ; -2146 : douta <= 16'h0E2C ; -2147 : douta <= 16'h0E2C ; -2148 : douta <= 16'h0E2C ; -2149 : douta <= 16'h0E2C ; -2150 : douta <= 16'h0E2C ; -2151 : douta <= 16'h0E2C ; -2152 : douta <= 16'h0E2C ; -2153 : douta <= 16'h0E2C ; -2154 : douta <= 16'h0E2C ; -2155 : douta <= 16'h0E2C ; -2156 : douta <= 16'h0E2C ; -2157 : douta <= 16'h0E2C ; -2158 : douta <= 16'h0D2C ; -2159 : douta <= 16'h0D2C ; -2160 : douta <= 16'h0D2C ; -2161 : douta <= 16'h0D2C ; -2162 : douta <= 16'h0D2C ; -2163 : douta <= 16'h0D2C ; -2164 : douta <= 16'h0D2C ; -2165 : douta <= 16'h0D2C ; -2166 : douta <= 16'h0D2C ; -2167 : douta <= 16'h0D2C ; -2168 : douta <= 16'h0D2C ; -2169 : douta <= 16'h0D2C ; -2170 : douta <= 16'h0D2C ; -2171 : douta <= 16'h0D2C ; -2172 : douta <= 16'h0C2C ; -2173 : douta <= 16'h0C2C ; -2174 : douta <= 16'h0C2C ; -2175 : douta <= 16'h0D2C ; -2176 : douta <= 16'h0C2C ; -2177 : douta <= 16'h0D2C ; -2178 : douta <= 16'h0D2C ; -2179 : douta <= 16'h0D2C ; -2180 : douta <= 16'h0D2C ; -2181 : douta <= 16'h0D2C ; -2182 : douta <= 16'h0D2C ; -2183 : douta <= 16'h0D2C ; -2184 : douta <= 16'h0D2C ; -2185 : douta <= 16'h0D2C ; -2186 : douta <= 16'h0D2C ; -2187 : douta <= 16'h0D2C ; -2188 : douta <= 16'h0D2C ; -2189 : douta <= 16'h0C2C ; -2190 : douta <= 16'h0C2C ; -2191 : douta <= 16'h0C2C ; -2192 : douta <= 16'h0C2C ; -2193 : douta <= 16'h0C2C ; -2194 : douta <= 16'h0C2C ; -2195 : douta <= 16'h0C2C ; -2196 : douta <= 16'h0B2C ; -2197 : douta <= 16'h0B2C ; -2198 : douta <= 16'h0B2C ; -2199 : douta <= 16'h0C2C ; -2200 : douta <= 16'h0C2C ; -2201 : douta <= 16'h0C2C ; -2202 : douta <= 16'h0C2C ; -2203 : douta <= 16'h0C2C ; -2204 : douta <= 16'h0C2C ; -2205 : douta <= 16'h0C2C ; -2206 : douta <= 16'h0C2C ; -2207 : douta <= 16'h0C2C ; -2208 : douta <= 16'h0C2C ; -2209 : douta <= 16'h0C2C ; -2210 : douta <= 16'h0C2C ; -2211 : douta <= 16'h0C2C ; -2212 : douta <= 16'h0C2C ; -2213 : douta <= 16'h0C2C ; -2214 : douta <= 16'h0C2C ; -2215 : douta <= 16'h0C2C ; -2216 : douta <= 16'h0C2C ; -2217 : douta <= 16'h0C2C ; -2218 : douta <= 16'h0C2C ; -2219 : douta <= 16'h0C2C ; -2220 : douta <= 16'h0B2C ; -2221 : douta <= 16'h0B2C ; -2222 : douta <= 16'h0B2C ; -2223 : douta <= 16'h0B2C ; -2224 : douta <= 16'h0B2C ; -2225 : douta <= 16'h0B2C ; -2226 : douta <= 16'h0A2C ; -2227 : douta <= 16'h0A2C ; -2228 : douta <= 16'h0A2C ; -2229 : douta <= 16'h0A2C ; -2230 : douta <= 16'h0A2C ; -2231 : douta <= 16'h0A2C ; -2232 : douta <= 16'h0A2C ; -2233 : douta <= 16'h0A2C ; -2234 : douta <= 16'h92C ; -2235 : douta <= 16'h0A2C ; -2236 : douta <= 16'h0A2C ; -2237 : douta <= 16'h92C ; -2238 : douta <= 16'h0A2C ; -2239 : douta <= 16'h0A2C ; -2240 : douta <= 16'h0A2C ; -2241 : douta <= 16'h0A2C ; -2242 : douta <= 16'h0A2C ; -2243 : douta <= 16'h0A2C ; -2244 : douta <= 16'h0A2C ; -2245 : douta <= 16'h0A2C ; -2246 : douta <= 16'h0A2C ; -2247 : douta <= 16'h0A2C ; -2248 : douta <= 16'h0A2C ; -2249 : douta <= 16'h0A2C ; -2250 : douta <= 16'h0A2C ; -2251 : douta <= 16'h0A2C ; -2252 : douta <= 16'h0A2C ; -2253 : douta <= 16'h92C ; -2254 : douta <= 16'h0A2C ; -2255 : douta <= 16'h92C ; -2256 : douta <= 16'h92C ; -2257 : douta <= 16'h92C ; -2258 : douta <= 16'h92C ; -2259 : douta <= 16'h92C ; -2260 : douta <= 16'h92C ; -2261 : douta <= 16'h92C ; -2262 : douta <= 16'h92C ; -2263 : douta <= 16'h92C ; -2264 : douta <= 16'h92C ; -2265 : douta <= 16'h92C ; -2266 : douta <= 16'h92C ; -2267 : douta <= 16'h92C ; -2268 : douta <= 16'h92C ; -2269 : douta <= 16'h92C ; -2270 : douta <= 16'h82C ; -2271 : douta <= 16'h82C ; -2272 : douta <= 16'h92C ; -2273 : douta <= 16'h92C ; -2274 : douta <= 16'h82C ; -2275 : douta <= 16'h92C ; -2276 : douta <= 16'h92C ; -2277 : douta <= 16'h92C ; -2278 : douta <= 16'h92C ; -2279 : douta <= 16'h92C ; -2280 : douta <= 16'h92C ; -2281 : douta <= 16'h92C ; -2282 : douta <= 16'h92C ; -2283 : douta <= 16'h92C ; -2284 : douta <= 16'h92C ; -2285 : douta <= 16'h92C ; -2286 : douta <= 16'h92C ; -2287 : douta <= 16'h82C ; -2288 : douta <= 16'h82C ; -2289 : douta <= 16'h82C ; -2290 : douta <= 16'h82C ; -2291 : douta <= 16'h82C ; -2292 : douta <= 16'h82C ; -2293 : douta <= 16'h82C ; -2294 : douta <= 16'h82C ; -2295 : douta <= 16'h82C ; -2296 : douta <= 16'h82C ; -2297 : douta <= 16'h82C ; -2298 : douta <= 16'h82C ; -2299 : douta <= 16'h82C ; -2300 : douta <= 16'h82C ; -2301 : douta <= 16'h82C ; -2302 : douta <= 16'h82C ; -2303 : douta <= 16'h82C ; -2304 : douta <= 16'h82C ; -2305 : douta <= 16'h82C ; -2306 : douta <= 16'h82C ; -2307 : douta <= 16'h82C ; -2308 : douta <= 16'h82C ; -2309 : douta <= 16'h82C ; -2310 : douta <= 16'h82C ; -2311 : douta <= 16'h82C ; -2312 : douta <= 16'h72C ; -2313 : douta <= 16'h72C ; -2314 : douta <= 16'h82C ; -2315 : douta <= 16'h82C ; -2316 : douta <= 16'h72C ; -2317 : douta <= 16'h72C ; -2318 : douta <= 16'h72C ; -2319 : douta <= 16'h72C ; -2320 : douta <= 16'h72C ; -2321 : douta <= 16'h72C ; -2322 : douta <= 16'h72C ; -2323 : douta <= 16'h72C ; -2324 : douta <= 16'h62C ; -2325 : douta <= 16'h62C ; -2326 : douta <= 16'h62C ; -2327 : douta <= 16'h52C ; -2328 : douta <= 16'h52C ; -2329 : douta <= 16'h52C ; -2330 : douta <= 16'h52C ; -2331 : douta <= 16'h62C ; -2332 : douta <= 16'h62C ; -2333 : douta <= 16'h62C ; -2334 : douta <= 16'h62C ; -2335 : douta <= 16'h62C ; -2336 : douta <= 16'h62C ; -2337 : douta <= 16'h62C ; -2338 : douta <= 16'h62C ; -2339 : douta <= 16'h62C ; -2340 : douta <= 16'h62C ; -2341 : douta <= 16'h62C ; -2342 : douta <= 16'h62C ; -2343 : douta <= 16'h62C ; -2344 : douta <= 16'h62C ; -2345 : douta <= 16'h62C ; -2346 : douta <= 16'h62C ; -2347 : douta <= 16'h62C ; -2348 : douta <= 16'h62C ; -2349 : douta <= 16'h62C ; -2350 : douta <= 16'h62C ; -2351 : douta <= 16'h62C ; -2352 : douta <= 16'h52C ; -2353 : douta <= 16'h52C ; -2354 : douta <= 16'h52C ; -2355 : douta <= 16'h52C ; -2356 : douta <= 16'h52C ; -2357 : douta <= 16'h52C ; -2358 : douta <= 16'h52C ; -2359 : douta <= 16'h52C ; -2360 : douta <= 16'h52C ; -2361 : douta <= 16'h52C ; -2362 : douta <= 16'h52C ; -2363 : douta <= 16'h52C ; -2364 : douta <= 16'h52C ; -2365 : douta <= 16'h52C ; -2366 : douta <= 16'h42C ; -2367 : douta <= 16'h42C ; -2368 : douta <= 16'h42C ; -2369 : douta <= 16'h42C ; -2370 : douta <= 16'h52C ; -2371 : douta <= 16'h52C ; -2372 : douta <= 16'h52C ; -2373 : douta <= 16'h52C ; -2374 : douta <= 16'h52C ; -2375 : douta <= 16'h52C ; -2376 : douta <= 16'h52C ; -2377 : douta <= 16'h52C ; -2378 : douta <= 16'h52C ; -2379 : douta <= 16'h52C ; -2380 : douta <= 16'h52C ; -2381 : douta <= 16'h52C ; -2382 : douta <= 16'h52C ; -2383 : douta <= 16'h42C ; -2384 : douta <= 16'h42C ; -2385 : douta <= 16'h42C ; -2386 : douta <= 16'h42C ; -2387 : douta <= 16'h42C ; -2388 : douta <= 16'h42C ; -2389 : douta <= 16'h42C ; -2390 : douta <= 16'h42C ; -2391 : douta <= 16'h42C ; -2392 : douta <= 16'h42C ; -2393 : douta <= 16'h42C ; -2394 : douta <= 16'h42C ; -2395 : douta <= 16'h42C ; -2396 : douta <= 16'h42C ; -2397 : douta <= 16'h42C ; -2398 : douta <= 16'h42C ; -2399 : douta <= 16'h42C ; -2400 : douta <= 16'h42C ; -2401 : douta <= 16'h22C ; -2402 : douta <= 16'h42C ; -2403 : douta <= 16'h42C ; -2404 : douta <= 16'h42C ; -2405 : douta <= 16'h42C ; -2406 : douta <= 16'h42C ; -2407 : douta <= 16'h42C ; -2408 : douta <= 16'h42C ; -2409 : douta <= 16'h42C ; -2410 : douta <= 16'h42C ; -2411 : douta <= 16'h42C ; -2412 : douta <= 16'h42C ; -2413 : douta <= 16'h32C ; -2414 : douta <= 16'h32C ; -2415 : douta <= 16'h32C ; -2416 : douta <= 16'h32C ; -2417 : douta <= 16'h32C ; -2418 : douta <= 16'h32C ; -2419 : douta <= 16'h32C ; -2420 : douta <= 16'h32C ; -2421 : douta <= 16'h32C ; -2422 : douta <= 16'h32C ; -2423 : douta <= 16'h22C ; -2424 : douta <= 16'h22C ; -2425 : douta <= 16'h22C ; -2426 : douta <= 16'h22C ; -2427 : douta <= 16'h22C ; -2428 : douta <= 16'h12C ; -2429 : douta <= 16'h22C ; -2430 : douta <= 16'h22C ; -2431 : douta <= 16'h22C ; -2432 : douta <= 16'h22C ; -2433 : douta <= 16'h22C ; -2434 : douta <= 16'h22C ; -2435 : douta <= 16'h22C ; -2436 : douta <= 16'h22C ; -2437 : douta <= 16'h22C ; -2438 : douta <= 16'h22C ; -2439 : douta <= 16'h22C ; -2440 : douta <= 16'h22C ; -2441 : douta <= 16'h22C ; -2442 : douta <= 16'h22C ; -2443 : douta <= 16'h22C ; -2444 : douta <= 16'h22C ; -2445 : douta <= 16'h22C ; -2446 : douta <= 16'h22C ; -2447 : douta <= 16'h22C ; -2448 : douta <= 16'h12C ; -2449 : douta <= 16'h12C ; -2450 : douta <= 16'h12C ; -2451 : douta <= 16'h12C ; -2452 : douta <= 16'h12C ; -2453 : douta <= 16'h12C ; -2454 : douta <= 16'h12C ; -2455 : douta <= 16'h12C ; -2456 : douta <= 16'h12C ; -2457 : douta <= 16'h12C ; -2458 : douta <= 16'h12C ; -2459 : douta <= 16'h12C ; -2460 : douta <= 16'h12C ; -2461 : douta <= 16'h12C ; -2462 : douta <= 16'h12C ; -2463 : douta <= 16'h02C ; -2464 : douta <= 16'h02C ; -2465 : douta <= 16'h12C ; -2466 : douta <= 16'h02C ; -2467 : douta <= 16'h12C ; -2468 : douta <= 16'h12C ; -2469 : douta <= 16'h12C ; -2470 : douta <= 16'h12C ; -2471 : douta <= 16'h12C ; -2472 : douta <= 16'h12C ; -2473 : douta <= 16'h12C ; -2474 : douta <= 16'h12C ; -2475 : douta <= 16'h12C ; -2476 : douta <= 16'h12C ; -2477 : douta <= 16'h12C ; -2478 : douta <= 16'h12C ; -2479 : douta <= 16'h02C ; -2480 : douta <= 16'h12C ; -2481 : douta <= 16'h02C ; -2482 : douta <= 16'h02C ; -2483 : douta <= 16'h02C ; -2484 : douta <= 16'hD040 ; -2485 : douta <= 16'h02C ; -2486 : douta <= 16'h02C ; -2487 : douta <= 16'h02C ; -2488 : douta <= 16'h02C ; -2489 : douta <= 16'h02C ; -2490 : douta <= 16'h02C ; -2491 : douta <= 16'h02C ; -2492 : douta <= 16'h02C ; -2493 : douta <= 16'hD040 ; -2494 : douta <= 16'h02C ; -2495 : douta <= 16'h02C ; -2496 : douta <= 16'h02C ; -2497 : douta <= 16'h02C ; -2498 : douta <= 16'h02C ; -2499 : douta <= 16'h02C ; -2500 : douta <= 16'h02C ; -2501 : douta <= 16'h02C ; -2502 : douta <= 16'h02C ; -2503 : douta <= 16'h02C ; -2504 : douta <= 16'h02C ; -2505 : douta <= 16'h02C ; -2506 : douta <= 16'h02C ; -2507 : douta <= 16'hCE40 ; -2508 : douta <= 16'h02C ; -2509 : douta <= 16'h02C ; -2510 : douta <= 16'hCE40 ; -2511 : douta <= 16'hCD40 ; -2512 : douta <= 16'hCD40 ; -2513 : douta <= 16'hCD40 ; -2514 : douta <= 16'hCD40 ; -2515 : douta <= 16'hCD40 ; -2516 : douta <= 16'hCD40 ; -2517 : douta <= 16'hCD40 ; -2518 : douta <= 16'hCD40 ; -2519 : douta <= 16'hCD40 ; -2520 : douta <= 16'hCD40 ; -2521 : douta <= 16'hCD40 ; -2522 : douta <= 16'hCC40 ; -2523 : douta <= 16'hCC40 ; -2524 : douta <= 16'hCC40 ; -2525 : douta <= 16'hCD40 ; -2526 : douta <= 16'hCD40 ; -2527 : douta <= 16'hCD40 ; -2528 : douta <= 16'hCD40 ; -2529 : douta <= 16'hCD40 ; -2530 : douta <= 16'hCC40 ; -2531 : douta <= 16'hCB40 ; -2532 : douta <= 16'hCB40 ; -2533 : douta <= 16'hCB40 ; -2534 : douta <= 16'hCB40 ; -2535 : douta <= 16'hCC40 ; -2536 : douta <= 16'hCC40 ; -2537 : douta <= 16'hCC40 ; -2538 : douta <= 16'hCC40 ; -2539 : douta <= 16'hCC40 ; -2540 : douta <= 16'hCC40 ; -2541 : douta <= 16'hCC40 ; -2542 : douta <= 16'hCC40 ; -2543 : douta <= 16'hCC40 ; -2544 : douta <= 16'hCC40 ; -2545 : douta <= 16'hCC40 ; -2546 : douta <= 16'hCC40 ; -2547 : douta <= 16'hCC40 ; -2548 : douta <= 16'hCC40 ; -2549 : douta <= 16'hCC40 ; -2550 : douta <= 16'hCB40 ; -2551 : douta <= 16'hCB40 ; -2552 : douta <= 16'hCB40 ; -2553 : douta <= 16'hCB40 ; -2554 : douta <= 16'hCB40 ; -2555 : douta <= 16'hCB40 ; -2556 : douta <= 16'hCA40 ; -2557 : douta <= 16'hCA40 ; -2558 : douta <= 16'hCA40 ; -2559 : douta <= 16'hCA40 ; -2560 : douta <= 16'hCA40 ; -2561 : douta <= 16'hCA40 ; -2562 : douta <= 16'hCA40 ; -2563 : douta <= 16'hCA40 ; -2564 : douta <= 16'hCA40 ; -2565 : douta <= 16'hCA40 ; -2566 : douta <= 16'hCA40 ; -2567 : douta <= 16'hC940 ; -2568 : douta <= 16'hCA40 ; -2569 : douta <= 16'hCA40 ; -2570 : douta <= 16'hCA40 ; -2571 : douta <= 16'hCA40 ; -2572 : douta <= 16'hCA40 ; -2573 : douta <= 16'hC940 ; -2574 : douta <= 16'hCA40 ; -2575 : douta <= 16'hC940 ; -2576 : douta <= 16'hC940 ; -2577 : douta <= 16'hC940 ; -2578 : douta <= 16'hC940 ; -2579 : douta <= 16'hC940 ; -2580 : douta <= 16'hC940 ; -2581 : douta <= 16'hC940 ; -2582 : douta <= 16'hC940 ; -2583 : douta <= 16'hC940 ; -2584 : douta <= 16'hC940 ; -2585 : douta <= 16'hC940 ; -2586 : douta <= 16'hC940 ; -2587 : douta <= 16'hC940 ; -2588 : douta <= 16'hC940 ; -2589 : douta <= 16'hC840 ; -2590 : douta <= 16'hC940 ; -2591 : douta <= 16'hC940 ; -2592 : douta <= 16'hC840 ; -2593 : douta <= 16'hC840 ; -2594 : douta <= 16'hC940 ; -2595 : douta <= 16'hC940 ; -2596 : douta <= 16'hC940 ; -2597 : douta <= 16'hC940 ; -2598 : douta <= 16'hC840 ; -2599 : douta <= 16'hC840 ; -2600 : douta <= 16'hC840 ; -2601 : douta <= 16'hC840 ; -2602 : douta <= 16'hC840 ; -2603 : douta <= 16'hC840 ; -2604 : douta <= 16'hC840 ; -2605 : douta <= 16'hC840 ; -2606 : douta <= 16'hC840 ; -2607 : douta <= 16'hC840 ; -2608 : douta <= 16'hC740 ; -2609 : douta <= 16'hC740 ; -2610 : douta <= 16'hC740 ; -2611 : douta <= 16'hC840 ; -2612 : douta <= 16'hC840 ; -2613 : douta <= 16'hC840 ; -2614 : douta <= 16'hC840 ; -2615 : douta <= 16'hC840 ; -2616 : douta <= 16'hC840 ; -2617 : douta <= 16'hC640 ; -2618 : douta <= 16'hC640 ; -2619 : douta <= 16'hC640 ; -2620 : douta <= 16'hC640 ; -2621 : douta <= 16'hC640 ; -2622 : douta <= 16'hC640 ; -2623 : douta <= 16'hC640 ; -2624 : douta <= 16'hC640 ; -2625 : douta <= 16'hC640 ; -2626 : douta <= 16'hC640 ; -2627 : douta <= 16'hC640 ; -2628 : douta <= 16'hC540 ; -2629 : douta <= 16'hC540 ; -2630 : douta <= 16'hC640 ; -2631 : douta <= 16'hC640 ; -2632 : douta <= 16'hC640 ; -2633 : douta <= 16'hC640 ; -2634 : douta <= 16'hC640 ; -2635 : douta <= 16'hC540 ; -2636 : douta <= 16'hC640 ; -2637 : douta <= 16'hC640 ; -2638 : douta <= 16'hC540 ; -2639 : douta <= 16'hC540 ; -2640 : douta <= 16'hC540 ; -2641 : douta <= 16'hC540 ; -2642 : douta <= 16'hC540 ; -2643 : douta <= 16'hC540 ; -2644 : douta <= 16'hC540 ; -2645 : douta <= 16'hC540 ; -2646 : douta <= 16'hC540 ; -2647 : douta <= 16'hC540 ; -2648 : douta <= 16'hC540 ; -2649 : douta <= 16'hC540 ; -2650 : douta <= 16'hC540 ; -2651 : douta <= 16'hC540 ; -2652 : douta <= 16'hC440 ; -2653 : douta <= 16'hC440 ; -2654 : douta <= 16'hC440 ; -2655 : douta <= 16'hC540 ; -2656 : douta <= 16'hC540 ; -2657 : douta <= 16'hC540 ; -2658 : douta <= 16'hC540 ; -2659 : douta <= 16'hC540 ; -2660 : douta <= 16'hC540 ; -2661 : douta <= 16'hC440 ; -2662 : douta <= 16'hC440 ; -2663 : douta <= 16'hC440 ; -2664 : douta <= 16'hC440 ; -2665 : douta <= 16'hC440 ; -2666 : douta <= 16'hC440 ; -2667 : douta <= 16'hC440 ; -2668 : douta <= 16'hC340 ; -2669 : douta <= 16'hC340 ; -2670 : douta <= 16'hC340 ; -2671 : douta <= 16'hC440 ; -2672 : douta <= 16'hC440 ; -2673 : douta <= 16'hC440 ; -2674 : douta <= 16'hC440 ; -2675 : douta <= 16'hC440 ; -2676 : douta <= 16'hC440 ; -2677 : douta <= 16'hC440 ; -2678 : douta <= 16'hC440 ; -2679 : douta <= 16'hC440 ; -2680 : douta <= 16'hC340 ; -2681 : douta <= 16'hC340 ; -2682 : douta <= 16'hC340 ; -2683 : douta <= 16'hC340 ; -2684 : douta <= 16'hC340 ; -2685 : douta <= 16'hC340 ; -2686 : douta <= 16'hC340 ; -2687 : douta <= 16'hC340 ; -2688 : douta <= 16'hC240 ; -2689 : douta <= 16'hC240 ; -2690 : douta <= 16'hC240 ; -2691 : douta <= 16'hC240 ; -2692 : douta <= 16'hC240 ; -2693 : douta <= 16'hC240 ; -2694 : douta <= 16'hC240 ; -2695 : douta <= 16'hC240 ; -2696 : douta <= 16'hC140 ; -2697 : douta <= 16'hC240 ; -2698 : douta <= 16'hC240 ; -2699 : douta <= 16'hC240 ; -2700 : douta <= 16'hC240 ; -2701 : douta <= 16'hC240 ; -2702 : douta <= 16'hC240 ; -2703 : douta <= 16'hC240 ; -2704 : douta <= 16'hC240 ; -2705 : douta <= 16'hC140 ; -2706 : douta <= 16'hC240 ; -2707 : douta <= 16'hC140 ; -2708 : douta <= 16'hC140 ; -2709 : douta <= 16'hC140 ; -2710 : douta <= 16'hC140 ; -2711 : douta <= 16'hC140 ; -2712 : douta <= 16'hC140 ; -2713 : douta <= 16'hC140 ; -2714 : douta <= 16'hC140 ; -2715 : douta <= 16'hC140 ; -2716 : douta <= 16'hC140 ; -2717 : douta <= 16'hC140 ; -2718 : douta <= 16'hC140 ; -2719 : douta <= 16'hC140 ; -2720 : douta <= 16'hC140 ; -2721 : douta <= 16'hC140 ; -2722 : douta <= 16'hC140 ; -2723 : douta <= 16'hC040 ; -2724 : douta <= 16'hC040 ; -2725 : douta <= 16'hC040 ; -2726 : douta <= 16'hC140 ; -2727 : douta <= 16'hC140 ; -2728 : douta <= 16'hC140 ; -2729 : douta <= 16'hC140 ; -2730 : douta <= 16'hC040 ; -2731 : douta <= 16'hC040 ; -2732 : douta <= 16'hC040 ; -2733 : douta <= 16'hC040 ; -2734 : douta <= 16'hC040 ; -2735 : douta <= 16'hC040 ; -2736 : douta <= 16'hC040 ; -2737 : douta <= 16'hC040 ; -2738 : douta <= 16'hC040 ; -2739 : douta <= 16'hC040 ; -2740 : douta <= 16'hC040 ; -2741 : douta <= 16'hC040 ; -2742 : douta <= 16'hC040 ; -2743 : douta <= 16'hC040 ; -2744 : douta <= 16'hBF40 ; -2745 : douta <= 16'hC040 ; -2746 : douta <= 16'hC040 ; -2747 : douta <= 16'hC040 ; -2748 : douta <= 16'hC040 ; -2749 : douta <= 16'hC040 ; -2750 : douta <= 16'hC040 ; -2751 : douta <= 16'hC040 ; -2752 : douta <= 16'hC040 ; -2753 : douta <= 16'hC040 ; -2754 : douta <= 16'hBE40 ; -2755 : douta <= 16'hBE40 ; -2756 : douta <= 16'hBE40 ; -2757 : douta <= 16'hBE40 ; -2758 : douta <= 16'hBE40 ; -2759 : douta <= 16'hBE40 ; -2760 : douta <= 16'hBE40 ; -2761 : douta <= 16'hBE40 ; -2762 : douta <= 16'hBE40 ; -2763 : douta <= 16'hBE40 ; -2764 : douta <= 16'hBE40 ; -2765 : douta <= 16'hBE40 ; -2766 : douta <= 16'hBE40 ; -2767 : douta <= 16'hBE40 ; -2768 : douta <= 16'hBD40 ; -2769 : douta <= 16'hBD40 ; -2770 : douta <= 16'hBE40 ; -2771 : douta <= 16'hBE40 ; -2772 : douta <= 16'hBE40 ; -2773 : douta <= 16'hBE40 ; -2774 : douta <= 16'hBE40 ; -2775 : douta <= 16'hBE40 ; -2776 : douta <= 16'hBE40 ; -2777 : douta <= 16'hBE40 ; -2778 : douta <= 16'hBD40 ; -2779 : douta <= 16'hBD40 ; -2780 : douta <= 16'hBD40 ; -2781 : douta <= 16'hBD40 ; -2782 : douta <= 16'hBD40 ; -2783 : douta <= 16'hBD40 ; -2784 : douta <= 16'hBD40 ; -2785 : douta <= 16'hBD40 ; -2786 : douta <= 16'hBD40 ; -2787 : douta <= 16'hBD40 ; -2788 : douta <= 16'hBD40 ; -2789 : douta <= 16'hBD40 ; -2790 : douta <= 16'hBD40 ; -2791 : douta <= 16'hBD40 ; -2792 : douta <= 16'hBC40 ; -2793 : douta <= 16'hBC40 ; -2794 : douta <= 16'hBC40 ; -2795 : douta <= 16'hBD40 ; -2796 : douta <= 16'hBC40 ; -2797 : douta <= 16'hBC40 ; -2798 : douta <= 16'hBC40 ; -2799 : douta <= 16'hBC40 ; -2800 : douta <= 16'hBB40 ; -2801 : douta <= 16'hBC40 ; -2802 : douta <= 16'hBB40 ; -2803 : douta <= 16'hBC40 ; -2804 : douta <= 16'hBC40 ; -2805 : douta <= 16'hBC40 ; -2806 : douta <= 16'hBC40 ; -2807 : douta <= 16'hBC40 ; -2808 : douta <= 16'hBC40 ; -2809 : douta <= 16'hBC40 ; -2810 : douta <= 16'hBC40 ; -2811 : douta <= 16'hBC40 ; -2812 : douta <= 16'hBC40 ; -2813 : douta <= 16'hBC40 ; -2814 : douta <= 16'hBC40 ; -2815 : douta <= 16'hBC40 ; -2816 : douta <= 16'hBC40 ; -2817 : douta <= 16'hBC40 ; -2818 : douta <= 16'hBC40 ; -2819 : douta <= 16'hBC40 ; -2820 : douta <= 16'hBB40 ; -2821 : douta <= 16'hBA40 ; -2822 : douta <= 16'hBA40 ; -2823 : douta <= 16'hBA40 ; -2824 : douta <= 16'hBA40 ; -2825 : douta <= 16'hBA40 ; -2826 : douta <= 16'hBA40 ; -2827 : douta <= 16'hBA40 ; -2828 : douta <= 16'hBA40 ; -2829 : douta <= 16'hBA40 ; -2830 : douta <= 16'hBA40 ; -2831 : douta <= 16'hBA40 ; -2832 : douta <= 16'hBA40 ; -2833 : douta <= 16'hBA40 ; -2834 : douta <= 16'hBA40 ; -2835 : douta <= 16'hB940 ; -2836 : douta <= 16'hB940 ; -2837 : douta <= 16'hBA40 ; -2838 : douta <= 16'hBA40 ; -2839 : douta <= 16'hBA40 ; -2840 : douta <= 16'hBA40 ; -2841 : douta <= 16'hB940 ; -2842 : douta <= 16'hB940 ; -2843 : douta <= 16'hB940 ; -2844 : douta <= 16'hB940 ; -2845 : douta <= 16'hB940 ; -2846 : douta <= 16'hB940 ; -2847 : douta <= 16'hB940 ; -2848 : douta <= 16'hB940 ; -2849 : douta <= 16'hB940 ; -2850 : douta <= 16'hB940 ; -2851 : douta <= 16'hB940 ; -2852 : douta <= 16'hB940 ; -2853 : douta <= 16'hB940 ; -2854 : douta <= 16'hB940 ; -2855 : douta <= 16'hB940 ; -2856 : douta <= 16'hB940 ; -2857 : douta <= 16'hB940 ; -2858 : douta <= 16'hB840 ; -2859 : douta <= 16'hB940 ; -2860 : douta <= 16'hB840 ; -2861 : douta <= 16'hB840 ; -2862 : douta <= 16'hB840 ; -2863 : douta <= 16'hB840 ; -2864 : douta <= 16'hB840 ; -2865 : douta <= 16'hB840 ; -2866 : douta <= 16'hB740 ; -2867 : douta <= 16'hB740 ; -2868 : douta <= 16'hB740 ; -2869 : douta <= 16'hB740 ; -2870 : douta <= 16'hB740 ; -2871 : douta <= 16'hB740 ; -2872 : douta <= 16'hB840 ; -2873 : douta <= 16'hB840 ; -2874 : douta <= 16'hB840 ; -2875 : douta <= 16'hB840 ; -2876 : douta <= 16'hB840 ; -2877 : douta <= 16'hB840 ; -2878 : douta <= 16'hB840 ; -2879 : douta <= 16'hB840 ; -2880 : douta <= 16'hB840 ; -2881 : douta <= 16'hB840 ; -2882 : douta <= 16'hB840 ; -2883 : douta <= 16'hB840 ; -2884 : douta <= 16'hB840 ; -2885 : douta <= 16'hB840 ; -2886 : douta <= 16'hB640 ; -2887 : douta <= 16'hB640 ; -2888 : douta <= 16'hB640 ; -2889 : douta <= 16'hB640 ; -2890 : douta <= 16'hB640 ; -2891 : douta <= 16'hB640 ; -2892 : douta <= 16'hB640 ; -2893 : douta <= 16'hB640 ; -2894 : douta <= 16'hB640 ; -2895 : douta <= 16'hB640 ; -2896 : douta <= 16'hB640 ; -2897 : douta <= 16'hB640 ; -2898 : douta <= 16'hB640 ; -2899 : douta <= 16'hB640 ; -2900 : douta <= 16'hB540 ; -2901 : douta <= 16'hB540 ; -2902 : douta <= 16'hB540 ; -2903 : douta <= 16'hB640 ; -2904 : douta <= 16'hB540 ; -2905 : douta <= 16'hB640 ; -2906 : douta <= 16'hB640 ; -2907 : douta <= 16'hB640 ; -2908 : douta <= 16'hB640 ; -2909 : douta <= 16'hB540 ; -2910 : douta <= 16'hB640 ; -2911 : douta <= 16'hB540 ; -2912 : douta <= 16'hB540 ; -2913 : douta <= 16'hB540 ; -2914 : douta <= 16'hB540 ; -2915 : douta <= 16'hB540 ; -2916 : douta <= 16'hB540 ; -2917 : douta <= 16'hB540 ; -2918 : douta <= 16'hB540 ; -2919 : douta <= 16'hB540 ; -2920 : douta <= 16'hB540 ; -2921 : douta <= 16'hB540 ; -2922 : douta <= 16'hB540 ; -2923 : douta <= 16'hB540 ; -2924 : douta <= 16'hB540 ; -2925 : douta <= 16'hB540 ; -2926 : douta <= 16'hB440 ; -2927 : douta <= 16'hB440 ; -2928 : douta <= 16'hB540 ; -2929 : douta <= 16'hB540 ; -2930 : douta <= 16'hB440 ; -2931 : douta <= 16'hB440 ; -2932 : douta <= 16'hB440 ; -2933 : douta <= 16'hB440 ; -2934 : douta <= 16'hB440 ; -2935 : douta <= 16'hB440 ; -2936 : douta <= 16'hB440 ; -2937 : douta <= 16'hB340 ; -2938 : douta <= 16'hB340 ; -2939 : douta <= 16'hB440 ; -2940 : douta <= 16'hB340 ; -2941 : douta <= 16'hB440 ; -2942 : douta <= 16'hB440 ; -2943 : douta <= 16'hB440 ; -2944 : douta <= 16'hB440 ; -2945 : douta <= 16'hB440 ; -2946 : douta <= 16'hB440 ; -2947 : douta <= 16'hB440 ; -2948 : douta <= 16'hB440 ; -2949 : douta <= 16'hB440 ; -2950 : douta <= 16'hB440 ; -2951 : douta <= 16'hB440 ; -2952 : douta <= 16'hB440 ; -2953 : douta <= 16'hB440 ; -2954 : douta <= 16'hB340 ; -2955 : douta <= 16'hB240 ; -2956 : douta <= 16'hB240 ; -2957 : douta <= 16'hB240 ; -2958 : douta <= 16'hB240 ; -2959 : douta <= 16'hB240 ; -2960 : douta <= 16'hB240 ; -2961 : douta <= 16'hB240 ; -2962 : douta <= 16'hB240 ; -2963 : douta <= 16'hB240 ; -2964 : douta <= 16'hB240 ; -2965 : douta <= 16'hB240 ; -2966 : douta <= 16'hB240 ; -2967 : douta <= 16'hB240 ; -2968 : douta <= 16'hB240 ; -2969 : douta <= 16'hB240 ; -2970 : douta <= 16'hB140 ; -2971 : douta <= 16'hB140 ; -2972 : douta <= 16'hB140 ; -2973 : douta <= 16'hB140 ; -2974 : douta <= 16'hB140 ; -2975 : douta <= 16'hB240 ; -2976 : douta <= 16'hB240 ; -2977 : douta <= 16'hB240 ; -2978 : douta <= 16'hB240 ; -2979 : douta <= 16'hB140 ; -2980 : douta <= 16'hB140 ; -2981 : douta <= 16'hB140 ; -2982 : douta <= 16'hB140 ; -2983 : douta <= 16'hB140 ; -2984 : douta <= 16'hB140 ; -2985 : douta <= 16'hB140 ; -2986 : douta <= 16'hB140 ; -2987 : douta <= 16'hB140 ; -2988 : douta <= 16'hB140 ; -2989 : douta <= 16'hB140 ; -2990 : douta <= 16'hB140 ; -2991 : douta <= 16'hB140 ; -2992 : douta <= 16'hB140 ; -2993 : douta <= 16'hB140 ; -2994 : douta <= 16'hB040 ; -2995 : douta <= 16'hB040 ; -2996 : douta <= 16'hB140 ; -2997 : douta <= 16'hB140 ; -2998 : douta <= 16'hB040 ; -2999 : douta <= 16'hB040 ; -3000 : douta <= 16'hB040 ; -3001 : douta <= 16'hB040 ; -3002 : douta <= 16'hB040 ; -3003 : douta <= 16'hB040 ; -3004 : douta <= 16'hB040 ; -3005 : douta <= 16'hB040 ; -3006 : douta <= 16'hB040 ; -3007 : douta <= 16'hB040 ; -3008 : douta <= 16'hB040 ; -3009 : douta <= 16'hB040 ; -3010 : douta <= 16'hB040 ; -3011 : douta <= 16'hB040 ; -3012 : douta <= 16'hB040 ; -3013 : douta <= 16'hB040 ; -3014 : douta <= 16'hB040 ; -3015 : douta <= 16'hB040 ; -3016 : douta <= 16'hB040 ; -3017 : douta <= 16'hB040 ; -3018 : douta <= 16'hB040 ; -3019 : douta <= 16'hB040 ; -3020 : douta <= 16'hB040 ; -3021 : douta <= 16'hB040 ; -3022 : douta <= 16'hB040 ; -3023 : douta <= 16'hB040 ; -3024 : douta <= 16'hB040 ; -3025 : douta <= 16'hAE40 ; -3026 : douta <= 16'hAE40 ; -3027 : douta <= 16'hAE40 ; -3028 : douta <= 16'hAE40 ; -3029 : douta <= 16'hAE40 ; -3030 : douta <= 16'hAE40 ; -3031 : douta <= 16'hAE40 ; -3032 : douta <= 16'hAE40 ; -3033 : douta <= 16'hAE40 ; -3034 : douta <= 16'hAE40 ; -3035 : douta <= 16'hAE40 ; -3036 : douta <= 16'hAD40 ; -3037 : douta <= 16'hAD40 ; -3038 : douta <= 16'hAD40 ; -3039 : douta <= 16'hAE40 ; -3040 : douta <= 16'hAE40 ; -3041 : douta <= 16'hAE40 ; -3042 : douta <= 16'hAE40 ; -3043 : douta <= 16'hAD40 ; -3044 : douta <= 16'hAE40 ; -3045 : douta <= 16'hAD40 ; -3046 : douta <= 16'hAD40 ; -3047 : douta <= 16'hAD40 ; -3048 : douta <= 16'hAD40 ; -3049 : douta <= 16'hAD40 ; -3050 : douta <= 16'hAD40 ; -3051 : douta <= 16'hAD40 ; -3052 : douta <= 16'hAD40 ; -3053 : douta <= 16'hAD40 ; -3054 : douta <= 16'hAD40 ; -3055 : douta <= 16'hAD40 ; -3056 : douta <= 16'hAD40 ; -3057 : douta <= 16'hAD40 ; -3058 : douta <= 16'hAD40 ; -3059 : douta <= 16'hAD40 ; -3060 : douta <= 16'hAC40 ; -3061 : douta <= 16'hAC40 ; -3062 : douta <= 16'hAC40 ; -3063 : douta <= 16'hAD40 ; -3064 : douta <= 16'hAC40 ; -3065 : douta <= 16'hAC40 ; -3066 : douta <= 16'hAC40 ; -3067 : douta <= 16'hAC40 ; -3068 : douta <= 16'hAC40 ; -3069 : douta <= 16'hAB40 ; -3070 : douta <= 16'hAB40 ; -3071 : douta <= 16'hAB40 ; -3072 : douta <= 16'hAB40 ; -3073 : douta <= 16'hAC40 ; -3074 : douta <= 16'hAB40 ; -3075 : douta <= 16'hAC40 ; -3076 : douta <= 16'hAC40 ; -3077 : douta <= 16'hAC40 ; -3078 : douta <= 16'hAC40 ; -3079 : douta <= 16'hAC40 ; -3080 : douta <= 16'hAC40 ; -3081 : douta <= 16'hAC40 ; -3082 : douta <= 16'hAC40 ; -3083 : douta <= 16'hAC40 ; -3084 : douta <= 16'hAC40 ; -3085 : douta <= 16'hAC40 ; -3086 : douta <= 16'hAC40 ; -3087 : douta <= 16'hAC40 ; -3088 : douta <= 16'hAC40 ; -3089 : douta <= 16'hAC40 ; -3090 : douta <= 16'hAA40 ; -3091 : douta <= 16'hAA40 ; -3092 : douta <= 16'hAA40 ; -3093 : douta <= 16'hAA40 ; -3094 : douta <= 16'hAA40 ; -3095 : douta <= 16'hAA40 ; -3096 : douta <= 16'hAA40 ; -3097 : douta <= 16'hAA40 ; -3098 : douta <= 16'hAA40 ; -3099 : douta <= 16'hAA40 ; -3100 : douta <= 16'hAA40 ; -3101 : douta <= 16'hAA40 ; -3102 : douta <= 16'hAA40 ; -3103 : douta <= 16'hAA40 ; -3104 : douta <= 16'hAA40 ; -3105 : douta <= 16'hAA40 ; -3106 : douta <= 16'hA940 ; -3107 : douta <= 16'hA940 ; -3108 : douta <= 16'hA940 ; -3109 : douta <= 16'hAA40 ; -3110 : douta <= 16'hAA40 ; -3111 : douta <= 16'hAA40 ; -3112 : douta <= 16'hA940 ; -3113 : douta <= 16'hA940 ; -3114 : douta <= 16'hA940 ; -3115 : douta <= 16'hA940 ; -3116 : douta <= 16'hA940 ; -3117 : douta <= 16'hA940 ; -3118 : douta <= 16'hA940 ; -3119 : douta <= 16'hA940 ; -3120 : douta <= 16'hA940 ; -3121 : douta <= 16'hA940 ; -3122 : douta <= 16'hA940 ; -3123 : douta <= 16'hA940 ; -3124 : douta <= 16'hA940 ; -3125 : douta <= 16'hA940 ; -3126 : douta <= 16'hA940 ; -3127 : douta <= 16'hA940 ; -3128 : douta <= 16'hA840 ; -3129 : douta <= 16'hA940 ; -3130 : douta <= 16'hA840 ; -3131 : douta <= 16'hA940 ; -3132 : douta <= 16'hA840 ; -3133 : douta <= 16'hA840 ; -3134 : douta <= 16'hA840 ; -3135 : douta <= 16'hA840 ; -3136 : douta <= 16'hA840 ; -3137 : douta <= 16'hA840 ; -3138 : douta <= 16'hA840 ; -3139 : douta <= 16'hA840 ; -3140 : douta <= 16'hA840 ; -3141 : douta <= 16'hA840 ; -3142 : douta <= 16'hA840 ; -3143 : douta <= 16'hA840 ; -3144 : douta <= 16'hA840 ; -3145 : douta <= 16'hA840 ; -3146 : douta <= 16'hA840 ; -3147 : douta <= 16'hA840 ; -3148 : douta <= 16'hA840 ; -3149 : douta <= 16'hA840 ; -3150 : douta <= 16'hA840 ; -3151 : douta <= 16'hA840 ; -3152 : douta <= 16'hA840 ; -3153 : douta <= 16'hA840 ; -3154 : douta <= 16'hA840 ; -3155 : douta <= 16'hA840 ; -3156 : douta <= 16'hA840 ; -3157 : douta <= 16'hA640 ; -3158 : douta <= 16'hA840 ; -3159 : douta <= 16'hA840 ; -3160 : douta <= 16'hA640 ; -3161 : douta <= 16'hA640 ; -3162 : douta <= 16'hA640 ; -3163 : douta <= 16'hA640 ; -3164 : douta <= 16'hA640 ; -3165 : douta <= 16'hA640 ; -3166 : douta <= 16'hA640 ; -3167 : douta <= 16'hA640 ; -3168 : douta <= 16'hA640 ; -3169 : douta <= 16'hA640 ; -3170 : douta <= 16'hA640 ; -3171 : douta <= 16'hA640 ; -3172 : douta <= 16'hA640 ; -3173 : douta <= 16'hA640 ; -3174 : douta <= 16'hA640 ; -3175 : douta <= 16'hA640 ; -3176 : douta <= 16'hA540 ; -3177 : douta <= 16'hA640 ; -3178 : douta <= 16'hA640 ; -3179 : douta <= 16'hA640 ; -3180 : douta <= 16'hA640 ; -3181 : douta <= 16'hA640 ; -3182 : douta <= 16'hA640 ; -3183 : douta <= 16'hA540 ; -3184 : douta <= 16'hA540 ; -3185 : douta <= 16'hA540 ; -3186 : douta <= 16'hA540 ; -3187 : douta <= 16'hA540 ; -3188 : douta <= 16'hA540 ; -3189 : douta <= 16'hA540 ; -3190 : douta <= 16'hA540 ; -3191 : douta <= 16'hA540 ; -3192 : douta <= 16'hA540 ; -3193 : douta <= 16'hA540 ; -3194 : douta <= 16'hA540 ; -3195 : douta <= 16'hA540 ; -3196 : douta <= 16'hA540 ; -3197 : douta <= 16'hA540 ; -3198 : douta <= 16'hA440 ; -3199 : douta <= 16'hA440 ; -3200 : douta <= 16'hA440 ; -3201 : douta <= 16'hA440 ; -3202 : douta <= 16'hA440 ; -3203 : douta <= 16'hA540 ; -3204 : douta <= 16'hA540 ; -3205 : douta <= 16'hA540 ; -3206 : douta <= 16'hA440 ; -3207 : douta <= 16'hA440 ; -3208 : douta <= 16'hA440 ; -3209 : douta <= 16'hA340 ; -3210 : douta <= 16'hA340 ; -3211 : douta <= 16'hA340 ; -3212 : douta <= 16'hA440 ; -3213 : douta <= 16'hA440 ; -3214 : douta <= 16'hA440 ; -3215 : douta <= 16'hA440 ; -3216 : douta <= 16'hA440 ; -3217 : douta <= 16'hA440 ; -3218 : douta <= 16'hA440 ; -3219 : douta <= 16'hA440 ; -3220 : douta <= 16'hA440 ; -3221 : douta <= 16'hA440 ; -3222 : douta <= 16'hA440 ; -3223 : douta <= 16'hA440 ; -3224 : douta <= 16'hA440 ; -3225 : douta <= 16'hA440 ; -3226 : douta <= 16'hA440 ; -3227 : douta <= 16'hA240 ; -3228 : douta <= 16'hA240 ; -3229 : douta <= 16'hA240 ; -3230 : douta <= 16'hA240 ; -3231 : douta <= 16'hA240 ; -3232 : douta <= 16'hA240 ; -3233 : douta <= 16'hA240 ; -3234 : douta <= 16'hA240 ; -3235 : douta <= 16'hA240 ; -3236 : douta <= 16'hA240 ; -3237 : douta <= 16'hA240 ; -3238 : douta <= 16'hA240 ; -3239 : douta <= 16'hA240 ; -3240 : douta <= 16'hA240 ; -3241 : douta <= 16'hA240 ; -3242 : douta <= 16'hA140 ; -3243 : douta <= 16'hA140 ; -3244 : douta <= 16'hA140 ; -3245 : douta <= 16'hA240 ; -3246 : douta <= 16'hA240 ; -3247 : douta <= 16'hA240 ; -3248 : douta <= 16'hA240 ; -3249 : douta <= 16'hA140 ; -3250 : douta <= 16'hA140 ; -3251 : douta <= 16'hA140 ; -3252 : douta <= 16'hA140 ; -3253 : douta <= 16'hA140 ; -3254 : douta <= 16'hA140 ; -3255 : douta <= 16'hA140 ; -3256 : douta <= 16'hA140 ; -3257 : douta <= 16'hA140 ; -3258 : douta <= 16'hA140 ; -3259 : douta <= 16'hA140 ; -3260 : douta <= 16'hA140 ; -3261 : douta <= 16'hA140 ; -3262 : douta <= 16'hA140 ; -3263 : douta <= 16'hA140 ; -3264 : douta <= 16'hA140 ; -3265 : douta <= 16'hA140 ; -3266 : douta <= 16'hA040 ; -3267 : douta <= 16'hA040 ; -3268 : douta <= 16'hA040 ; -3269 : douta <= 16'hA140 ; -3270 : douta <= 16'hA040 ; -3271 : douta <= 16'hA040 ; -3272 : douta <= 16'hA040 ; -3273 : douta <= 16'hA040 ; -3274 : douta <= 16'hA040 ; -3275 : douta <= 16'hA040 ; -3276 : douta <= 16'hA040 ; -3277 : douta <= 16'hA040 ; -3278 : douta <= 16'hA040 ; -3279 : douta <= 16'hA040 ; -3280 : douta <= 16'hA040 ; -3281 : douta <= 16'hA040 ; -3282 : douta <= 16'hA040 ; -3283 : douta <= 16'hA040 ; -3284 : douta <= 16'hA040 ; -3285 : douta <= 16'hA040 ; -3286 : douta <= 16'hA040 ; -3287 : douta <= 16'hA040 ; -3288 : douta <= 16'hA040 ; -3289 : douta <= 16'hA040 ; -3290 : douta <= 16'hA040 ; -3291 : douta <= 16'hA040 ; -3292 : douta <= 16'h9E42 ; -3293 : douta <= 16'hA040 ; -3294 : douta <= 16'hA040 ; -3295 : douta <= 16'hA040 ; -3296 : douta <= 16'hA040 ; -3297 : douta <= 16'hA040 ; -3298 : douta <= 16'hA040 ; -3299 : douta <= 16'hA040 ; -3300 : douta <= 16'hA040 ; -3301 : douta <= 16'hA040 ; -3302 : douta <= 16'h9F42 ; -3303 : douta <= 16'hA040 ; -3304 : douta <= 16'hA040 ; -3305 : douta <= 16'hA040 ; -3306 : douta <= 16'hA040 ; -3307 : douta <= 16'hA040 ; -3308 : douta <= 16'hA040 ; -3309 : douta <= 16'hA040 ; -3310 : douta <= 16'hA040 ; -3311 : douta <= 16'hA040 ; -3312 : douta <= 16'hA040 ; -3313 : douta <= 16'hA040 ; -3314 : douta <= 16'hA040 ; -3315 : douta <= 16'hA040 ; -3316 : douta <= 16'hA040 ; -3317 : douta <= 16'hA040 ; -3318 : douta <= 16'h9F42 ; -3319 : douta <= 16'hA040 ; -3320 : douta <= 16'hA040 ; -3321 : douta <= 16'hA040 ; -3322 : douta <= 16'hA040 ; -3323 : douta <= 16'hA040 ; -3324 : douta <= 16'h9E42 ; -3325 : douta <= 16'h9E42 ; -3326 : douta <= 16'h9E42 ; -3327 : douta <= 16'h9E42 ; -3328 : douta <= 16'h9E42 ; -3329 : douta <= 16'h9E42 ; -3330 : douta <= 16'h9E42 ; -3331 : douta <= 16'h9E42 ; -3332 : douta <= 16'h9E42 ; -3333 : douta <= 16'h9E42 ; -3334 : douta <= 16'h9E42 ; -3335 : douta <= 16'h9E42 ; -3336 : douta <= 16'h9E42 ; -3337 : douta <= 16'h9E42 ; -3338 : douta <= 16'h9E42 ; -3339 : douta <= 16'h9E42 ; -3340 : douta <= 16'h9E42 ; -3341 : douta <= 16'h9D42 ; -3342 : douta <= 16'h9E42 ; -3343 : douta <= 16'h9E42 ; -3344 : douta <= 16'h9E42 ; -3345 : douta <= 16'h9E42 ; -3346 : douta <= 16'h9E42 ; -3347 : douta <= 16'h9D42 ; -3348 : douta <= 16'h9D42 ; -3349 : douta <= 16'h9D42 ; -3350 : douta <= 16'h9D42 ; -3351 : douta <= 16'h9D42 ; -3352 : douta <= 16'h9D42 ; -3353 : douta <= 16'h9D42 ; -3354 : douta <= 16'h9D42 ; -3355 : douta <= 16'h9D42 ; -3356 : douta <= 16'h9D42 ; -3357 : douta <= 16'h9D42 ; -3358 : douta <= 16'h9D42 ; -3359 : douta <= 16'h9D42 ; -3360 : douta <= 16'h9D42 ; -3361 : douta <= 16'h9D42 ; -3362 : douta <= 16'h9D42 ; -3363 : douta <= 16'h9C42 ; -3364 : douta <= 16'h9C42 ; -3365 : douta <= 16'h9D42 ; -3366 : douta <= 16'h9C42 ; -3367 : douta <= 16'h9C42 ; -3368 : douta <= 16'h9C42 ; -3369 : douta <= 16'h9C42 ; -3370 : douta <= 16'h9C42 ; -3371 : douta <= 16'h9C42 ; -3372 : douta <= 16'h9C42 ; -3373 : douta <= 16'h9C42 ; -3374 : douta <= 16'h9C42 ; -3375 : douta <= 16'h9C42 ; -3376 : douta <= 16'h9C42 ; -3377 : douta <= 16'h9C42 ; -3378 : douta <= 16'h9C42 ; -3379 : douta <= 16'h9C42 ; -3380 : douta <= 16'h9B42 ; -3381 : douta <= 16'h9B42 ; -3382 : douta <= 16'h9C42 ; -3383 : douta <= 16'h9C42 ; -3384 : douta <= 16'h9C42 ; -3385 : douta <= 16'h9C42 ; -3386 : douta <= 16'h9C42 ; -3387 : douta <= 16'h9C42 ; -3388 : douta <= 16'h9C42 ; -3389 : douta <= 16'h9C42 ; -3390 : douta <= 16'h9C42 ; -3391 : douta <= 16'h9C42 ; -3392 : douta <= 16'h9C42 ; -3393 : douta <= 16'h9B42 ; -3394 : douta <= 16'h9B42 ; -3395 : douta <= 16'h9B42 ; -3396 : douta <= 16'h9B42 ; -3397 : douta <= 16'h9B42 ; -3398 : douta <= 16'h9A42 ; -3399 : douta <= 16'h9A42 ; -3400 : douta <= 16'h9A42 ; -3401 : douta <= 16'h9A42 ; -3402 : douta <= 16'h9A42 ; -3403 : douta <= 16'h9A42 ; -3404 : douta <= 16'h9A42 ; -3405 : douta <= 16'h9A42 ; -3406 : douta <= 16'h9A42 ; -3407 : douta <= 16'h9A42 ; -3408 : douta <= 16'h9A42 ; -3409 : douta <= 16'h9942 ; -3410 : douta <= 16'h9A42 ; -3411 : douta <= 16'h9A42 ; -3412 : douta <= 16'h9A42 ; -3413 : douta <= 16'h9A42 ; -3414 : douta <= 16'h9A42 ; -3415 : douta <= 16'h9A42 ; -3416 : douta <= 16'h9A42 ; -3417 : douta <= 16'h9A42 ; -3418 : douta <= 16'h9A42 ; -3419 : douta <= 16'h9A42 ; -3420 : douta <= 16'h9942 ; -3421 : douta <= 16'h9942 ; -3422 : douta <= 16'h9942 ; -3423 : douta <= 16'h9942 ; -3424 : douta <= 16'h9942 ; -3425 : douta <= 16'h9942 ; -3426 : douta <= 16'h9942 ; -3427 : douta <= 16'h9942 ; -3428 : douta <= 16'h9942 ; -3429 : douta <= 16'h9942 ; -3430 : douta <= 16'h9942 ; -3431 : douta <= 16'h9942 ; -3432 : douta <= 16'h9942 ; -3433 : douta <= 16'h9942 ; -3434 : douta <= 16'h9942 ; -3435 : douta <= 16'h9942 ; -3436 : douta <= 16'h9942 ; -3437 : douta <= 16'h9942 ; -3438 : douta <= 16'h9942 ; -3439 : douta <= 16'h9842 ; -3440 : douta <= 16'h9842 ; -3441 : douta <= 16'h9942 ; -3442 : douta <= 16'h9842 ; -3443 : douta <= 16'h9842 ; -3444 : douta <= 16'h9842 ; -3445 : douta <= 16'h9842 ; -3446 : douta <= 16'h9842 ; -3447 : douta <= 16'h9842 ; -3448 : douta <= 16'h9842 ; -3449 : douta <= 16'h9842 ; -3450 : douta <= 16'h9842 ; -3451 : douta <= 16'h9842 ; -3452 : douta <= 16'h9842 ; -3453 : douta <= 16'h9842 ; -3454 : douta <= 16'h9842 ; -3455 : douta <= 16'h9842 ; -3456 : douta <= 16'h9842 ; -3457 : douta <= 16'h9842 ; -3458 : douta <= 16'h9842 ; -3459 : douta <= 16'h9742 ; -3460 : douta <= 16'h9742 ; -3461 : douta <= 16'h9842 ; -3462 : douta <= 16'h9842 ; -3463 : douta <= 16'h9842 ; -3464 : douta <= 16'h9842 ; -3465 : douta <= 16'h9842 ; -3466 : douta <= 16'h9842 ; -3467 : douta <= 16'h9842 ; -3468 : douta <= 16'h9642 ; -3469 : douta <= 16'h9642 ; -3470 : douta <= 16'h9642 ; -3471 : douta <= 16'h9642 ; -3472 : douta <= 16'h9642 ; -3473 : douta <= 16'h9642 ; -3474 : douta <= 16'h9642 ; -3475 : douta <= 16'h9642 ; -3476 : douta <= 16'h9642 ; -3477 : douta <= 16'h9642 ; -3478 : douta <= 16'h9642 ; -3479 : douta <= 16'h9642 ; -3480 : douta <= 16'h9642 ; -3481 : douta <= 16'h9642 ; -3482 : douta <= 16'h9642 ; -3483 : douta <= 16'h9642 ; -3484 : douta <= 16'h9542 ; -3485 : douta <= 16'h9542 ; -3486 : douta <= 16'h9542 ; -3487 : douta <= 16'h9642 ; -3488 : douta <= 16'h9642 ; -3489 : douta <= 16'h9642 ; -3490 : douta <= 16'h9642 ; -3491 : douta <= 16'h9642 ; -3492 : douta <= 16'h9642 ; -3493 : douta <= 16'h9542 ; -3494 : douta <= 16'h9542 ; -3495 : douta <= 16'h9542 ; -3496 : douta <= 16'h9542 ; -3497 : douta <= 16'h9542 ; -3498 : douta <= 16'h9542 ; -3499 : douta <= 16'h9542 ; -3500 : douta <= 16'h9542 ; - - - -default:douta<=16'h9542; -endcase - -end - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -endmodule diff --git a/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/sources_1/new/ant_rf/Sisyif_src/band_rom_b.v b/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/sources_1/new/ant_rf/Sisyif_src/band_rom_b.v deleted file mode 100644 index e8d0539..0000000 --- a/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/sources_1/new/ant_rf/Sisyif_src/band_rom_b.v +++ /dev/null @@ -1,3573 +0,0 @@ -`timescale 1ns / 1ps -////////////////////////////////////////////////////////////////////////////////// -// Company: -// Engineer: -// -// Create Date: 18:19:17 01/25/2022 -// Design Name: -// Module Name: band_rom -// Project Name: -// Target Devices: -// Tool versions: -// Description: -// -// Dependencies: -// -// Revision: -// Revision 0.01 - File Created -// Additional Comments: -// -////////////////////////////////////////////////////////////////////////////////// -module band_rom_b( -input sysclk, -input [11 : 0] addra, - -output reg[15:0] douta -); - -always@(posedge sysclk)begin - case(addra) - -0 : douta <= 16'h7426 ; -1 : douta <= 16'h7426 ; -2 : douta <= 16'h7426 ; -3 : douta <= 16'h7426 ; -4 : douta <= 16'h7426 ; -5 : douta <= 16'h7326 ; -6 : douta <= 16'h7326 ; -7 : douta <= 16'h7426 ; -8 : douta <= 16'h7426 ; -9 : douta <= 16'h7326 ; -10 : douta <= 16'h7326 ; -11 : douta <= 16'h7326 ; -12 : douta <= 16'h7326 ; -13 : douta <= 16'h7326 ; -14 : douta <= 16'h7326 ; -15 : douta <= 16'h7326 ; -16 : douta <= 16'h7326 ; -17 : douta <= 16'h7226 ; -18 : douta <= 16'h7326 ; -19 : douta <= 16'h7226 ; -20 : douta <= 16'h7226 ; -21 : douta <= 16'h7226 ; -22 : douta <= 16'h7226 ; -23 : douta <= 16'h7126 ; -24 : douta <= 16'h7126 ; -25 : douta <= 16'h7126 ; -26 : douta <= 16'h7226 ; -27 : douta <= 16'h7226 ; -28 : douta <= 16'h7226 ; -29 : douta <= 16'h7226 ; -30 : douta <= 16'h7226 ; -31 : douta <= 16'h7226 ; -32 : douta <= 16'h7226 ; -33 : douta <= 16'h7226 ; -34 : douta <= 16'h7226 ; -35 : douta <= 16'h7226 ; -36 : douta <= 16'h7126 ; -37 : douta <= 16'h7126 ; -38 : douta <= 16'h7126 ; -39 : douta <= 16'h7126 ; -40 : douta <= 16'h7126 ; -41 : douta <= 16'h7126 ; -42 : douta <= 16'h7126 ; -43 : douta <= 16'h7126 ; -44 : douta <= 16'h7126 ; -45 : douta <= 16'h7126 ; -46 : douta <= 16'h7126 ; -47 : douta <= 16'h7126 ; -48 : douta <= 16'h7126 ; -49 : douta <= 16'h7026 ; -50 : douta <= 16'h7026 ; -51 : douta <= 16'h7126 ; -52 : douta <= 16'h7026 ; -53 : douta <= 16'h7126 ; -54 : douta <= 16'h6F26 ; -55 : douta <= 16'h7126 ; -56 : douta <= 16'h7126 ; -57 : douta <= 16'h7126 ; -58 : douta <= 16'h7126 ; -59 : douta <= 16'h7026 ; -60 : douta <= 16'h7126 ; -61 : douta <= 16'h6E26 ; -62 : douta <= 16'h7026 ; -63 : douta <= 16'h6E26 ; -64 : douta <= 16'h7026 ; -65 : douta <= 16'h7026 ; -66 : douta <= 16'h7026 ; -67 : douta <= 16'h7026 ; -68 : douta <= 16'h7026 ; -69 : douta <= 16'h7026 ; -70 : douta <= 16'h7026 ; -71 : douta <= 16'h7026 ; -72 : douta <= 16'h7026 ; -73 : douta <= 16'h7026 ; -74 : douta <= 16'h7026 ; -75 : douta <= 16'h7026 ; -76 : douta <= 16'h7026 ; -77 : douta <= 16'h7026 ; -78 : douta <= 16'h7026 ; -79 : douta <= 16'h7026 ; -80 : douta <= 16'h7026 ; -81 : douta <= 16'h6F26 ; -82 : douta <= 16'h6F26 ; -83 : douta <= 16'h6F26 ; -84 : douta <= 16'h6F26 ; -85 : douta <= 16'h6F26 ; -86 : douta <= 16'h6E26 ; -87 : douta <= 16'h6E26 ; -88 : douta <= 16'h6E26 ; -89 : douta <= 16'h6E26 ; -90 : douta <= 16'h6E26 ; -91 : douta <= 16'h6E26 ; -92 : douta <= 16'h6E26 ; -93 : douta <= 16'h6E26 ; -94 : douta <= 16'h6E26 ; -95 : douta <= 16'h6E26 ; -96 : douta <= 16'h6E26 ; -97 : douta <= 16'h6E26 ; -98 : douta <= 16'h6E26 ; -99 : douta <= 16'h6E26 ; -100 : douta <= 16'h6E26 ; -101 : douta <= 16'h6E26 ; -102 : douta <= 16'h6E26 ; -103 : douta <= 16'h6E26 ; -104 : douta <= 16'h6E26 ; -105 : douta <= 16'h6E26 ; -106 : douta <= 16'h6E26 ; -107 : douta <= 16'h6D26 ; -108 : douta <= 16'h6E26 ; -109 : douta <= 16'h6D26 ; -110 : douta <= 16'h6D26 ; -111 : douta <= 16'h6D26 ; -112 : douta <= 16'h6D26 ; -113 : douta <= 16'h6D26 ; -114 : douta <= 16'h6D26 ; -115 : douta <= 16'h6D26 ; -116 : douta <= 16'h6D26 ; -117 : douta <= 16'h6D26 ; -118 : douta <= 16'h6D26 ; -119 : douta <= 16'h6D26 ; -120 : douta <= 16'h6D26 ; -121 : douta <= 16'h6C26 ; -122 : douta <= 16'h6D26 ; -123 : douta <= 16'h6D26 ; -124 : douta <= 16'h6C26 ; -125 : douta <= 16'h6D26 ; -126 : douta <= 16'h6D26 ; -127 : douta <= 16'h6D26 ; -128 : douta <= 16'h6D26 ; -129 : douta <= 16'h6D26 ; -130 : douta <= 16'h6D26 ; -131 : douta <= 16'h6D26 ; -132 : douta <= 16'h6D26 ; -133 : douta <= 16'h6C26 ; -134 : douta <= 16'h6C26 ; -135 : douta <= 16'h6C26 ; -136 : douta <= 16'h6C26 ; -137 : douta <= 16'h6C26 ; -138 : douta <= 16'h6C26 ; -139 : douta <= 16'h6C26 ; -140 : douta <= 16'h6C26 ; -141 : douta <= 16'h6C26 ; -142 : douta <= 16'h6C26 ; -143 : douta <= 16'h6C26 ; -144 : douta <= 16'h6C26 ; -145 : douta <= 16'h6C26 ; -146 : douta <= 16'h6C26 ; -147 : douta <= 16'h6C26 ; -148 : douta <= 16'h6C26 ; -149 : douta <= 16'h6C26 ; -150 : douta <= 16'h6C26 ; -151 : douta <= 16'h6C26 ; -152 : douta <= 16'h6C26 ; -153 : douta <= 16'h6B26 ; -154 : douta <= 16'h6B26 ; -155 : douta <= 16'h6B26 ; -156 : douta <= 16'h6B26 ; -157 : douta <= 16'h6B26 ; -158 : douta <= 16'h6B26 ; -159 : douta <= 16'h6B26 ; -160 : douta <= 16'h6B26 ; -161 : douta <= 16'h6B26 ; -162 : douta <= 16'h6A26 ; -163 : douta <= 16'h6A26 ; -164 : douta <= 16'h6A26 ; -165 : douta <= 16'h6A26 ; -166 : douta <= 16'h6A26 ; -167 : douta <= 16'h6A26 ; -168 : douta <= 16'h6926 ; -169 : douta <= 16'h6A26 ; -170 : douta <= 16'h6926 ; -171 : douta <= 16'h6A26 ; -172 : douta <= 16'h6926 ; -173 : douta <= 16'h6A26 ; -174 : douta <= 16'h6A26 ; -175 : douta <= 16'h6A26 ; -176 : douta <= 16'h6A26 ; -177 : douta <= 16'h6A26 ; -178 : douta <= 16'h6A26 ; -179 : douta <= 16'h6A26 ; -180 : douta <= 16'h6A26 ; -181 : douta <= 16'h6A26 ; -182 : douta <= 16'h6A26 ; -183 : douta <= 16'h6A26 ; -184 : douta <= 16'h6926 ; -185 : douta <= 16'h6926 ; -186 : douta <= 16'h6926 ; -187 : douta <= 16'h6926 ; -188 : douta <= 16'h6926 ; -189 : douta <= 16'h6926 ; -190 : douta <= 16'h6926 ; -191 : douta <= 16'h6926 ; -192 : douta <= 16'h6926 ; -193 : douta <= 16'h6926 ; -194 : douta <= 16'h6926 ; -195 : douta <= 16'h6826 ; -196 : douta <= 16'h6826 ; -197 : douta <= 16'h6826 ; -198 : douta <= 16'h6826 ; -199 : douta <= 16'h6826 ; -200 : douta <= 16'h6926 ; -201 : douta <= 16'h6926 ; -202 : douta <= 16'h6926 ; -203 : douta <= 16'h6926 ; -204 : douta <= 16'h6926 ; -205 : douta <= 16'h6926 ; -206 : douta <= 16'h6926 ; -207 : douta <= 16'h6926 ; -208 : douta <= 16'h6826 ; -209 : douta <= 16'h6826 ; -210 : douta <= 16'h6826 ; -211 : douta <= 16'h6826 ; -212 : douta <= 16'h6826 ; -213 : douta <= 16'h6826 ; -214 : douta <= 16'h6826 ; -215 : douta <= 16'h6826 ; -216 : douta <= 16'h6826 ; -217 : douta <= 16'h6826 ; -218 : douta <= 16'h6826 ; -219 : douta <= 16'h6726 ; -220 : douta <= 16'h6726 ; -221 : douta <= 16'h6826 ; -222 : douta <= 16'h6826 ; -223 : douta <= 16'h6826 ; -224 : douta <= 16'h6826 ; -225 : douta <= 16'h6826 ; -226 : douta <= 16'h6826 ; -227 : douta <= 16'h6826 ; -228 : douta <= 16'h6826 ; -229 : douta <= 16'h6826 ; -230 : douta <= 16'h6826 ; -231 : douta <= 16'h6826 ; -232 : douta <= 16'h6726 ; -233 : douta <= 16'h6726 ; -234 : douta <= 16'h6526 ; -235 : douta <= 16'h6526 ; -236 : douta <= 16'h6726 ; -237 : douta <= 16'h6726 ; -238 : douta <= 16'h6726 ; -239 : douta <= 16'h6726 ; -240 : douta <= 16'h6726 ; -241 : douta <= 16'h6626 ; -242 : douta <= 16'h6626 ; -243 : douta <= 16'h6626 ; -244 : douta <= 16'h6626 ; -245 : douta <= 16'h6626 ; -246 : douta <= 16'h6626 ; -247 : douta <= 16'h6626 ; -248 : douta <= 16'h6626 ; -249 : douta <= 16'h6626 ; -250 : douta <= 16'h6626 ; -251 : douta <= 16'h6626 ; -252 : douta <= 16'h6626 ; -253 : douta <= 16'h6626 ; -254 : douta <= 16'h6626 ; -255 : douta <= 16'h6626 ; -256 : douta <= 16'h6626 ; -257 : douta <= 16'h6626 ; -258 : douta <= 16'h6626 ; -259 : douta <= 16'h6626 ; -260 : douta <= 16'h6626 ; -261 : douta <= 16'h6626 ; -262 : douta <= 16'h6526 ; -263 : douta <= 16'h6626 ; -264 : douta <= 16'h6526 ; -265 : douta <= 16'h6526 ; -266 : douta <= 16'h6526 ; -267 : douta <= 16'h6526 ; -268 : douta <= 16'h6526 ; -269 : douta <= 16'h6526 ; -270 : douta <= 16'h6526 ; -271 : douta <= 16'h6526 ; -272 : douta <= 16'h6526 ; -273 : douta <= 16'h6526 ; -274 : douta <= 16'h6526 ; -275 : douta <= 16'h6526 ; -276 : douta <= 16'h6526 ; -277 : douta <= 16'h6426 ; -278 : douta <= 16'h6526 ; -279 : douta <= 16'h6526 ; -280 : douta <= 16'h6526 ; -281 : douta <= 16'h6526 ; -282 : douta <= 16'h6526 ; -283 : douta <= 16'h6526 ; -284 : douta <= 16'h6526 ; -285 : douta <= 16'h6526 ; -286 : douta <= 16'h6526 ; -287 : douta <= 16'h6526 ; -288 : douta <= 16'h6426 ; -289 : douta <= 16'h6426 ; -290 : douta <= 16'h6426 ; -291 : douta <= 16'h6426 ; -292 : douta <= 16'h6426 ; -293 : douta <= 16'h6426 ; -294 : douta <= 16'h6426 ; -295 : douta <= 16'h6426 ; -296 : douta <= 16'h6426 ; -297 : douta <= 16'h6426 ; -298 : douta <= 16'h6426 ; -299 : douta <= 16'h6426 ; -300 : douta <= 16'h6426 ; -301 : douta <= 16'h6426 ; -302 : douta <= 16'h6426 ; -303 : douta <= 16'h6426 ; -304 : douta <= 16'h6426 ; -305 : douta <= 16'h6326 ; -306 : douta <= 16'h6426 ; -307 : douta <= 16'h6326 ; -308 : douta <= 16'h6326 ; -309 : douta <= 16'h6326 ; -310 : douta <= 16'h6326 ; -311 : douta <= 16'h6426 ; -312 : douta <= 16'h6426 ; -313 : douta <= 16'h6326 ; -314 : douta <= 16'h6326 ; -315 : douta <= 16'h6326 ; -316 : douta <= 16'h6326 ; -317 : douta <= 16'h6326 ; -318 : douta <= 16'h6326 ; -319 : douta <= 16'h6226 ; -320 : douta <= 16'h6226 ; -321 : douta <= 16'h6226 ; -322 : douta <= 16'h6226 ; -323 : douta <= 16'h6226 ; -324 : douta <= 16'h6126 ; -325 : douta <= 16'h6226 ; -326 : douta <= 16'h6126 ; -327 : douta <= 16'h6126 ; -328 : douta <= 16'h6126 ; -329 : douta <= 16'h6226 ; -330 : douta <= 16'h6226 ; -331 : douta <= 16'h6226 ; -332 : douta <= 16'h6226 ; -333 : douta <= 16'h6226 ; -334 : douta <= 16'h6226 ; -335 : douta <= 16'h6226 ; -336 : douta <= 16'h6226 ; -337 : douta <= 16'h6226 ; -338 : douta <= 16'h6226 ; -339 : douta <= 16'h6226 ; -340 : douta <= 16'h6226 ; -341 : douta <= 16'h6126 ; -342 : douta <= 16'h6126 ; -343 : douta <= 16'h6126 ; -344 : douta <= 16'h6126 ; -345 : douta <= 16'h6126 ; -346 : douta <= 16'h6126 ; -347 : douta <= 16'h6126 ; -348 : douta <= 16'h6126 ; -349 : douta <= 16'h6126 ; -350 : douta <= 16'h6126 ; -351 : douta <= 16'h6126 ; -352 : douta <= 16'h6126 ; -353 : douta <= 16'h6126 ; -354 : douta <= 16'h6126 ; -355 : douta <= 16'h6026 ; -356 : douta <= 16'h6026 ; -357 : douta <= 16'h6126 ; -358 : douta <= 16'h6126 ; -359 : douta <= 16'h6126 ; -360 : douta <= 16'h6126 ; -361 : douta <= 16'h6126 ; -362 : douta <= 16'h6126 ; -363 : douta <= 16'h6126 ; -364 : douta <= 16'h6126 ; -365 : douta <= 16'h6126 ; -366 : douta <= 16'h6126 ; -367 : douta <= 16'h6126 ; -368 : douta <= 16'h6026 ; -369 : douta <= 16'h6026 ; -370 : douta <= 16'h6026 ; -371 : douta <= 16'h6026 ; -372 : douta <= 16'h6026 ; -373 : douta <= 16'h6026 ; -374 : douta <= 16'h6026 ; -375 : douta <= 16'h5F28 ; -376 : douta <= 16'h6026 ; -377 : douta <= 16'h6026 ; -378 : douta <= 16'h6026 ; -379 : douta <= 16'h5F28 ; -380 : douta <= 16'h6026 ; -381 : douta <= 16'h6026 ; -382 : douta <= 16'h6026 ; -383 : douta <= 16'h6026 ; -384 : douta <= 16'h6026 ; -385 : douta <= 16'h6026 ; -386 : douta <= 16'h5F28 ; -387 : douta <= 16'h6026 ; -388 : douta <= 16'h6026 ; -389 : douta <= 16'h6026 ; -390 : douta <= 16'h5E28 ; -391 : douta <= 16'h6026 ; -392 : douta <= 16'h6026 ; -393 : douta <= 16'h6026 ; -394 : douta <= 16'h6026 ; -395 : douta <= 16'h6026 ; -396 : douta <= 16'h6026 ; -397 : douta <= 16'h6026 ; -398 : douta <= 16'h6026 ; -399 : douta <= 16'h6026 ; -400 : douta <= 16'h5E28 ; -401 : douta <= 16'h5E28 ; -402 : douta <= 16'h5E28 ; -403 : douta <= 16'h5E28 ; -404 : douta <= 16'h5E28 ; -405 : douta <= 16'h5E28 ; -406 : douta <= 16'h5E28 ; -407 : douta <= 16'h5E28 ; -408 : douta <= 16'h5E28 ; -409 : douta <= 16'h5E28 ; -410 : douta <= 16'h5E28 ; -411 : douta <= 16'h5D28 ; -412 : douta <= 16'h5D28 ; -413 : douta <= 16'h5D28 ; -414 : douta <= 16'h5D28 ; -415 : douta <= 16'h5D28 ; -416 : douta <= 16'h5D28 ; -417 : douta <= 16'h5D28 ; -418 : douta <= 16'h5D28 ; -419 : douta <= 16'h5D28 ; -420 : douta <= 16'h5D28 ; -421 : douta <= 16'h5D28 ; -422 : douta <= 16'h5D28 ; -423 : douta <= 16'h5D28 ; -424 : douta <= 16'h5D28 ; -425 : douta <= 16'h5C28 ; -426 : douta <= 16'h5C28 ; -427 : douta <= 16'h5D28 ; -428 : douta <= 16'h5D28 ; -429 : douta <= 16'h5B28 ; -430 : douta <= 16'h5B28 ; -431 : douta <= 16'h5D28 ; -432 : douta <= 16'h5D28 ; -433 : douta <= 16'h5C28 ; -434 : douta <= 16'h5C28 ; -435 : douta <= 16'h5C28 ; -436 : douta <= 16'h5C28 ; -437 : douta <= 16'h5C28 ; -438 : douta <= 16'h5C28 ; -439 : douta <= 16'h5C28 ; -440 : douta <= 16'h5C28 ; -441 : douta <= 16'h5C28 ; -442 : douta <= 16'h5C28 ; -443 : douta <= 16'h5C28 ; -444 : douta <= 16'h5C28 ; -445 : douta <= 16'h5C28 ; -446 : douta <= 16'h5C28 ; -447 : douta <= 16'h5C28 ; -448 : douta <= 16'h5C28 ; -449 : douta <= 16'h5C28 ; -450 : douta <= 16'h5C28 ; -451 : douta <= 16'h5C28 ; -452 : douta <= 16'h5C28 ; -453 : douta <= 16'h5C28 ; -454 : douta <= 16'h5C28 ; -455 : douta <= 16'h5B28 ; -456 : douta <= 16'h5C28 ; -457 : douta <= 16'h5C28 ; -458 : douta <= 16'h5B28 ; -459 : douta <= 16'h5B28 ; -460 : douta <= 16'h5B28 ; -461 : douta <= 16'h5B28 ; -462 : douta <= 16'h5B28 ; -463 : douta <= 16'h5B28 ; -464 : douta <= 16'h5B28 ; -465 : douta <= 16'h5B28 ; -466 : douta <= 16'h5B28 ; -467 : douta <= 16'h5A28 ; -468 : douta <= 16'h5A28 ; -469 : douta <= 16'h5A28 ; -470 : douta <= 16'h5A28 ; -471 : douta <= 16'h5A28 ; -472 : douta <= 16'h5A28 ; -473 : douta <= 16'h5A28 ; -474 : douta <= 16'h5A28 ; -475 : douta <= 16'h5A28 ; -476 : douta <= 16'h5A28 ; -477 : douta <= 16'h5A28 ; -478 : douta <= 16'h5A28 ; -479 : douta <= 16'h5A28 ; -480 : douta <= 16'h5A28 ; -481 : douta <= 16'h5A28 ; -482 : douta <= 16'h5A28 ; -483 : douta <= 16'h5A28 ; -484 : douta <= 16'h5A28 ; -485 : douta <= 16'h5A28 ; -486 : douta <= 16'h5A28 ; -487 : douta <= 16'h5A28 ; -488 : douta <= 16'h5A28 ; -489 : douta <= 16'h5928 ; -490 : douta <= 16'h5928 ; -491 : douta <= 16'h5928 ; -492 : douta <= 16'h5928 ; -493 : douta <= 16'h5928 ; -494 : douta <= 16'h5928 ; -495 : douta <= 16'h5928 ; -496 : douta <= 16'h5928 ; -497 : douta <= 16'h5928 ; -498 : douta <= 16'h5928 ; -499 : douta <= 16'h5928 ; -500 : douta <= 16'h5928 ; -501 : douta <= 16'h5928 ; -502 : douta <= 16'h5828 ; -503 : douta <= 16'h5828 ; -504 : douta <= 16'h5828 ; -505 : douta <= 16'h5828 ; -506 : douta <= 16'h5828 ; -507 : douta <= 16'h5928 ; -508 : douta <= 16'h5928 ; -509 : douta <= 16'h5928 ; -510 : douta <= 16'h5928 ; -511 : douta <= 16'h5928 ; -512 : douta <= 16'h5928 ; -513 : douta <= 16'h5928 ; -514 : douta <= 16'h5828 ; -515 : douta <= 16'h5828 ; -516 : douta <= 16'h5828 ; -517 : douta <= 16'h5828 ; -518 : douta <= 16'h5828 ; -519 : douta <= 16'h5828 ; -520 : douta <= 16'h5828 ; -521 : douta <= 16'h5828 ; -522 : douta <= 16'h5828 ; -523 : douta <= 16'h5828 ; -524 : douta <= 16'h5828 ; -525 : douta <= 16'h5828 ; -526 : douta <= 16'h5828 ; -527 : douta <= 16'h5828 ; -528 : douta <= 16'h5828 ; -529 : douta <= 16'h5828 ; -530 : douta <= 16'h5828 ; -531 : douta <= 16'h5828 ; -532 : douta <= 16'h5728 ; -533 : douta <= 16'h5728 ; -534 : douta <= 16'h5728 ; -535 : douta <= 16'h5828 ; -536 : douta <= 16'h5828 ; -537 : douta <= 16'h5728 ; -538 : douta <= 16'h5728 ; -539 : douta <= 16'h5728 ; -540 : douta <= 16'h5728 ; -541 : douta <= 16'h5528 ; -542 : douta <= 16'h5728 ; -543 : douta <= 16'h5528 ; -544 : douta <= 16'h5728 ; -545 : douta <= 16'h5728 ; -546 : douta <= 16'h5728 ; -547 : douta <= 16'h5628 ; -548 : douta <= 16'h5628 ; -549 : douta <= 16'h5628 ; -550 : douta <= 16'h5628 ; -551 : douta <= 16'h5628 ; -552 : douta <= 16'h5628 ; -553 : douta <= 16'h5628 ; -554 : douta <= 16'h5628 ; -555 : douta <= 16'h5628 ; -556 : douta <= 16'h5628 ; -557 : douta <= 16'h5628 ; -558 : douta <= 16'h5628 ; -559 : douta <= 16'h5628 ; -560 : douta <= 16'h5628 ; -561 : douta <= 16'h5628 ; -562 : douta <= 16'h5628 ; -563 : douta <= 16'h5628 ; -564 : douta <= 16'h5628 ; -565 : douta <= 16'h5628 ; -566 : douta <= 16'h5628 ; -567 : douta <= 16'h5628 ; -568 : douta <= 16'h5628 ; -569 : douta <= 16'h5628 ; -570 : douta <= 16'h5628 ; -571 : douta <= 16'h5528 ; -572 : douta <= 16'h5528 ; -573 : douta <= 16'h5528 ; -574 : douta <= 16'h5528 ; -575 : douta <= 16'h5528 ; -576 : douta <= 16'h5528 ; -577 : douta <= 16'h5528 ; -578 : douta <= 16'h5528 ; -579 : douta <= 16'h5528 ; -580 : douta <= 16'h5528 ; -581 : douta <= 16'h5528 ; -582 : douta <= 16'h5528 ; -583 : douta <= 16'h5528 ; -584 : douta <= 16'h5528 ; -585 : douta <= 16'h5528 ; -586 : douta <= 16'h5428 ; -587 : douta <= 16'h5528 ; -588 : douta <= 16'h5528 ; -589 : douta <= 16'h5528 ; -590 : douta <= 16'h5528 ; -591 : douta <= 16'h5528 ; -592 : douta <= 16'h5528 ; -593 : douta <= 16'h5528 ; -594 : douta <= 16'h5528 ; -595 : douta <= 16'h5528 ; -596 : douta <= 16'h5428 ; -597 : douta <= 16'h5428 ; -598 : douta <= 16'h5428 ; -599 : douta <= 16'h5428 ; -600 : douta <= 16'h5428 ; -601 : douta <= 16'h5428 ; -602 : douta <= 16'h5428 ; -603 : douta <= 16'h5428 ; -604 : douta <= 16'h5428 ; -605 : douta <= 16'h5428 ; -606 : douta <= 16'h5428 ; -607 : douta <= 16'h5428 ; -608 : douta <= 16'h5428 ; -609 : douta <= 16'h5428 ; -610 : douta <= 16'h5428 ; -611 : douta <= 16'h5428 ; -612 : douta <= 16'h5428 ; -613 : douta <= 16'h5428 ; -614 : douta <= 16'h5428 ; -615 : douta <= 16'h5428 ; -616 : douta <= 16'h5328 ; -617 : douta <= 16'h5328 ; -618 : douta <= 16'h5328 ; -619 : douta <= 16'h5328 ; -620 : douta <= 16'h5428 ; -621 : douta <= 16'h5328 ; -622 : douta <= 16'h5328 ; -623 : douta <= 16'h5328 ; -624 : douta <= 16'h5328 ; -625 : douta <= 16'h5328 ; -626 : douta <= 16'h5328 ; -627 : douta <= 16'h5328 ; -628 : douta <= 16'h5328 ; -629 : douta <= 16'h5328 ; -630 : douta <= 16'h5328 ; -631 : douta <= 16'h5328 ; -632 : douta <= 16'h5328 ; -633 : douta <= 16'h5328 ; -634 : douta <= 16'h5228 ; -635 : douta <= 16'h5228 ; -636 : douta <= 16'h5128 ; -637 : douta <= 16'h5128 ; -638 : douta <= 16'h5128 ; -639 : douta <= 16'h5228 ; -640 : douta <= 16'h5228 ; -641 : douta <= 16'h5228 ; -642 : douta <= 16'h5228 ; -643 : douta <= 16'h5228 ; -644 : douta <= 16'h5228 ; -645 : douta <= 16'h5228 ; -646 : douta <= 16'h5228 ; -647 : douta <= 16'h5228 ; -648 : douta <= 16'h5228 ; -649 : douta <= 16'h5228 ; -650 : douta <= 16'h5228 ; -651 : douta <= 16'h5228 ; -652 : douta <= 16'h5228 ; -653 : douta <= 16'h5228 ; -654 : douta <= 16'h5228 ; -655 : douta <= 16'h5228 ; -656 : douta <= 16'h5128 ; -657 : douta <= 16'h5128 ; -658 : douta <= 16'h5128 ; -659 : douta <= 16'h5128 ; -660 : douta <= 16'h5128 ; -661 : douta <= 16'h5128 ; -662 : douta <= 16'h5128 ; -663 : douta <= 16'h5128 ; -664 : douta <= 16'h5128 ; -665 : douta <= 16'h5128 ; -666 : douta <= 16'h5128 ; -667 : douta <= 16'h5128 ; -668 : douta <= 16'h5128 ; -669 : douta <= 16'h5128 ; -670 : douta <= 16'h5128 ; -671 : douta <= 16'h5028 ; -672 : douta <= 16'h5028 ; -673 : douta <= 16'h5128 ; -674 : douta <= 16'h5128 ; -675 : douta <= 16'h5128 ; -676 : douta <= 16'h5128 ; -677 : douta <= 16'h5128 ; -678 : douta <= 16'h5128 ; -679 : douta <= 16'h5128 ; -680 : douta <= 16'h5128 ; -681 : douta <= 16'h5128 ; -682 : douta <= 16'h5028 ; -683 : douta <= 16'h5028 ; -684 : douta <= 16'h5028 ; -685 : douta <= 16'h4E28 ; -686 : douta <= 16'h5028 ; -687 : douta <= 16'h5028 ; -688 : douta <= 16'h4F28 ; -689 : douta <= 16'h5028 ; -690 : douta <= 16'h5028 ; -691 : douta <= 16'h5028 ; -692 : douta <= 16'h4F28 ; -693 : douta <= 16'h5028 ; -694 : douta <= 16'h5028 ; -695 : douta <= 16'h5028 ; -696 : douta <= 16'h5028 ; -697 : douta <= 16'h5028 ; -698 : douta <= 16'h5028 ; -699 : douta <= 16'h5028 ; -700 : douta <= 16'h5028 ; -701 : douta <= 16'h5028 ; -702 : douta <= 16'h5028 ; -703 : douta <= 16'h5028 ; -704 : douta <= 16'h5028 ; -705 : douta <= 16'h5028 ; -706 : douta <= 16'h5028 ; -707 : douta <= 16'h5028 ; -708 : douta <= 16'h4D28 ; -709 : douta <= 16'h4D28 ; -710 : douta <= 16'h4E28 ; -711 : douta <= 16'h4E28 ; -712 : douta <= 16'h4E28 ; -713 : douta <= 16'h4E28 ; -714 : douta <= 16'h4E28 ; -715 : douta <= 16'h4E28 ; -716 : douta <= 16'h4E28 ; -717 : douta <= 16'h4E28 ; -718 : douta <= 16'h4E28 ; -719 : douta <= 16'h4E28 ; -720 : douta <= 16'h4E28 ; -721 : douta <= 16'h4E28 ; -722 : douta <= 16'h4E28 ; -723 : douta <= 16'h4E28 ; -724 : douta <= 16'h4E28 ; -725 : douta <= 16'h4E28 ; -726 : douta <= 16'h4E28 ; -727 : douta <= 16'h4E28 ; -728 : douta <= 16'h4E28 ; -729 : douta <= 16'h4E28 ; -730 : douta <= 16'h4E28 ; -731 : douta <= 16'h4E28 ; -732 : douta <= 16'h4E28 ; -733 : douta <= 16'h4E28 ; -734 : douta <= 16'h4D28 ; -735 : douta <= 16'h4D28 ; -736 : douta <= 16'h4D28 ; -737 : douta <= 16'h4D28 ; -738 : douta <= 16'h4D28 ; -739 : douta <= 16'h4D28 ; -740 : douta <= 16'h4D28 ; -741 : douta <= 16'h4D28 ; -742 : douta <= 16'h4D28 ; -743 : douta <= 16'h4D28 ; -744 : douta <= 16'h4D28 ; -745 : douta <= 16'h4D28 ; -746 : douta <= 16'h4D28 ; -747 : douta <= 16'h4C28 ; -748 : douta <= 16'h4C28 ; -749 : douta <= 16'h4D28 ; -750 : douta <= 16'h4D28 ; -751 : douta <= 16'h4D28 ; -752 : douta <= 16'h4D28 ; -753 : douta <= 16'h4D28 ; -754 : douta <= 16'h4D28 ; -755 : douta <= 16'h4D28 ; -756 : douta <= 16'h4D28 ; -757 : douta <= 16'h4D28 ; -758 : douta <= 16'h4D28 ; -759 : douta <= 16'h4D28 ; -760 : douta <= 16'h4B28 ; -761 : douta <= 16'h4B28 ; -762 : douta <= 16'h4C28 ; -763 : douta <= 16'h4C28 ; -764 : douta <= 16'h4C28 ; -765 : douta <= 16'h4C28 ; -766 : douta <= 16'h4C28 ; -767 : douta <= 16'h4C28 ; -768 : douta <= 16'h4C28 ; -769 : douta <= 16'h4C28 ; -770 : douta <= 16'h4C28 ; -771 : douta <= 16'h4C28 ; -772 : douta <= 16'h4C28 ; -773 : douta <= 16'h4C28 ; -774 : douta <= 16'h4C28 ; -775 : douta <= 16'h4C28 ; -776 : douta <= 16'h4C28 ; -777 : douta <= 16'h4C28 ; -778 : douta <= 16'h4C28 ; -779 : douta <= 16'h4C28 ; -780 : douta <= 16'h4C28 ; -781 : douta <= 16'h4C28 ; -782 : douta <= 16'h4C28 ; -783 : douta <= 16'h4C28 ; -784 : douta <= 16'h4C28 ; -785 : douta <= 16'h4C28 ; -786 : douta <= 16'h4B28 ; -787 : douta <= 16'h4B28 ; -788 : douta <= 16'h4B28 ; -789 : douta <= 16'h4B28 ; -790 : douta <= 16'h4B28 ; -791 : douta <= 16'h4B28 ; -792 : douta <= 16'h4B28 ; -793 : douta <= 16'h4B28 ; -794 : douta <= 16'h4B28 ; -795 : douta <= 16'h4A28 ; -796 : douta <= 16'h4A28 ; -797 : douta <= 16'h4A28 ; -798 : douta <= 16'h4A28 ; -799 : douta <= 16'h4A28 ; -800 : douta <= 16'h4A28 ; -801 : douta <= 16'h4928 ; -802 : douta <= 16'h4A28 ; -803 : douta <= 16'h4928 ; -804 : douta <= 16'h4A28 ; -805 : douta <= 16'h4A28 ; -806 : douta <= 16'h4A28 ; -807 : douta <= 16'h4A28 ; -808 : douta <= 16'h4A28 ; -809 : douta <= 16'h4A28 ; -810 : douta <= 16'h4A28 ; -811 : douta <= 16'h4A28 ; -812 : douta <= 16'h4A28 ; -813 : douta <= 16'h4A28 ; -814 : douta <= 16'h4A28 ; -815 : douta <= 16'h4A28 ; -816 : douta <= 16'h4A28 ; -817 : douta <= 16'h4A28 ; -818 : douta <= 16'h4928 ; -819 : douta <= 16'h4928 ; -820 : douta <= 16'h4928 ; -821 : douta <= 16'h4928 ; -822 : douta <= 16'h4928 ; -823 : douta <= 16'h4928 ; -824 : douta <= 16'h4928 ; -825 : douta <= 16'h4928 ; -826 : douta <= 16'h4928 ; -827 : douta <= 16'h4928 ; -828 : douta <= 16'h4928 ; -829 : douta <= 16'h4928 ; -830 : douta <= 16'h4928 ; -831 : douta <= 16'h4828 ; -832 : douta <= 16'h4928 ; -833 : douta <= 16'h4928 ; -834 : douta <= 16'h4928 ; -835 : douta <= 16'h4928 ; -836 : douta <= 16'h4928 ; -837 : douta <= 16'h4928 ; -838 : douta <= 16'h4928 ; -839 : douta <= 16'h4928 ; -840 : douta <= 16'h4928 ; -841 : douta <= 16'h4928 ; -842 : douta <= 16'h4928 ; -843 : douta <= 16'h4928 ; -844 : douta <= 16'h4828 ; -845 : douta <= 16'h4828 ; -846 : douta <= 16'h4728 ; -847 : douta <= 16'h4728 ; -848 : douta <= 16'h4828 ; -849 : douta <= 16'h4828 ; -850 : douta <= 16'h4828 ; -851 : douta <= 16'h4828 ; -852 : douta <= 16'h4828 ; -853 : douta <= 16'h4828 ; -854 : douta <= 16'h4828 ; -855 : douta <= 16'h4828 ; -856 : douta <= 16'h4828 ; -857 : douta <= 16'h4828 ; -858 : douta <= 16'h4828 ; -859 : douta <= 16'h4828 ; -860 : douta <= 16'h4828 ; -861 : douta <= 16'h4828 ; -862 : douta <= 16'h4828 ; -863 : douta <= 16'h4828 ; -864 : douta <= 16'h4828 ; -865 : douta <= 16'h4828 ; -866 : douta <= 16'h4828 ; -867 : douta <= 16'h4828 ; -868 : douta <= 16'h4828 ; -869 : douta <= 16'h4528 ; -870 : douta <= 16'h4728 ; -871 : douta <= 16'h4528 ; -872 : douta <= 16'h4528 ; -873 : douta <= 16'h4728 ; -874 : douta <= 16'h4528 ; -875 : douta <= 16'h4728 ; -876 : douta <= 16'h4628 ; -877 : douta <= 16'h4628 ; -878 : douta <= 16'h4628 ; -879 : douta <= 16'h4628 ; -880 : douta <= 16'h4628 ; -881 : douta <= 16'h4628 ; -882 : douta <= 16'h4628 ; -883 : douta <= 16'h4628 ; -884 : douta <= 16'h4628 ; -885 : douta <= 16'h4628 ; -886 : douta <= 16'h4628 ; -887 : douta <= 16'h4628 ; -888 : douta <= 16'h4628 ; -889 : douta <= 16'h4628 ; -890 : douta <= 16'h4628 ; -891 : douta <= 16'h4628 ; -892 : douta <= 16'h4628 ; -893 : douta <= 16'h4628 ; -894 : douta <= 16'h4628 ; -895 : douta <= 16'h4628 ; -896 : douta <= 16'h4628 ; -897 : douta <= 16'h4528 ; -898 : douta <= 16'h4628 ; -899 : douta <= 16'h4528 ; -900 : douta <= 16'h4528 ; -901 : douta <= 16'h4528 ; -902 : douta <= 16'h4528 ; -903 : douta <= 16'h4528 ; -904 : douta <= 16'h4528 ; -905 : douta <= 16'h4528 ; -906 : douta <= 16'h4528 ; -907 : douta <= 16'h4528 ; -908 : douta <= 16'h4528 ; -909 : douta <= 16'h4528 ; -910 : douta <= 16'h4528 ; -911 : douta <= 16'h4528 ; -912 : douta <= 16'h4528 ; -913 : douta <= 16'h4428 ; -914 : douta <= 16'h4428 ; -915 : douta <= 16'h4528 ; -916 : douta <= 16'h4428 ; -917 : douta <= 16'h4428 ; -918 : douta <= 16'h4528 ; -919 : douta <= 16'h4528 ; -920 : douta <= 16'h4528 ; -921 : douta <= 16'h4528 ; -922 : douta <= 16'h4528 ; -923 : douta <= 16'h4528 ; -924 : douta <= 16'h4528 ; -925 : douta <= 16'h4528 ; -926 : douta <= 16'h4528 ; -927 : douta <= 16'h4428 ; -928 : douta <= 16'h4428 ; -929 : douta <= 16'h4428 ; -930 : douta <= 16'h4428 ; -931 : douta <= 16'h4428 ; -932 : douta <= 16'h4428 ; -933 : douta <= 16'h4428 ; -934 : douta <= 16'h4428 ; -935 : douta <= 16'h4428 ; -936 : douta <= 16'h4428 ; -937 : douta <= 16'h4428 ; -938 : douta <= 16'h4428 ; -939 : douta <= 16'h4428 ; -940 : douta <= 16'h4428 ; -941 : douta <= 16'h4428 ; -942 : douta <= 16'h4428 ; -943 : douta <= 16'h4428 ; -944 : douta <= 16'h4428 ; -945 : douta <= 16'h4428 ; -946 : douta <= 16'h4328 ; -947 : douta <= 16'h4328 ; -948 : douta <= 16'h4428 ; -949 : douta <= 16'h4328 ; -950 : douta <= 16'h4428 ; -951 : douta <= 16'h4428 ; -952 : douta <= 16'h4328 ; -953 : douta <= 16'h4328 ; -954 : douta <= 16'h4328 ; -955 : douta <= 16'h4328 ; -956 : douta <= 16'h4328 ; -957 : douta <= 16'h4328 ; -958 : douta <= 16'h4328 ; -959 : douta <= 16'h4328 ; -960 : douta <= 16'h4328 ; -961 : douta <= 16'h4328 ; -962 : douta <= 16'h4328 ; -963 : douta <= 16'h4228 ; -964 : douta <= 16'h4228 ; -965 : douta <= 16'h4228 ; -966 : douta <= 16'h4228 ; -967 : douta <= 16'h4228 ; -968 : douta <= 16'h4228 ; -969 : douta <= 16'h4228 ; -970 : douta <= 16'h4228 ; -971 : douta <= 16'h4228 ; -972 : douta <= 16'h4228 ; -973 : douta <= 16'h4228 ; -974 : douta <= 16'h4228 ; -975 : douta <= 16'h4228 ; -976 : douta <= 16'h4228 ; -977 : douta <= 16'h4228 ; -978 : douta <= 16'h4228 ; -979 : douta <= 16'h4228 ; -980 : douta <= 16'h4228 ; -981 : douta <= 16'h4228 ; -982 : douta <= 16'h4228 ; -983 : douta <= 16'h4228 ; -984 : douta <= 16'h4128 ; -985 : douta <= 16'h4128 ; -986 : douta <= 16'h4128 ; -987 : douta <= 16'h4128 ; -988 : douta <= 16'h4128 ; -989 : douta <= 16'h4128 ; -990 : douta <= 16'h4128 ; -991 : douta <= 16'h4128 ; -992 : douta <= 16'h4128 ; -993 : douta <= 16'h4128 ; -994 : douta <= 16'h4128 ; -995 : douta <= 16'h4128 ; -996 : douta <= 16'h4128 ; -997 : douta <= 16'h4128 ; -998 : douta <= 16'h4128 ; -999 : douta <= 16'h4128 ; -1000 : douta <= 16'h4128 ; -1001 : douta <= 16'h4128 ; -1002 : douta <= 16'h4128 ; -1003 : douta <= 16'h4128 ; -1004 : douta <= 16'h4028 ; -1005 : douta <= 16'h4128 ; -1006 : douta <= 16'h4128 ; -1007 : douta <= 16'h4128 ; -1008 : douta <= 16'h4128 ; -1009 : douta <= 16'h4128 ; -1010 : douta <= 16'h4128 ; -1011 : douta <= 16'h4128 ; -1012 : douta <= 16'h4128 ; -1013 : douta <= 16'h4128 ; -1014 : douta <= 16'h4128 ; -1015 : douta <= 16'h4028 ; -1016 : douta <= 16'h4028 ; -1017 : douta <= 16'h4028 ; -1018 : douta <= 16'h4028 ; -1019 : douta <= 16'h4028 ; -1020 : douta <= 16'h4028 ; -1021 : douta <= 16'h4028 ; -1022 : douta <= 16'h4028 ; -1023 : douta <= 16'h3F2A ; -1024 : douta <= 16'h4028 ; -1025 : douta <= 16'h4028 ; -1026 : douta <= 16'h3E2A ; -1027 : douta <= 16'h4028 ; -1028 : douta <= 16'h3F2A ; -1029 : douta <= 16'h4028 ; -1030 : douta <= 16'h4028 ; -1031 : douta <= 16'h4028 ; -1032 : douta <= 16'h4028 ; -1033 : douta <= 16'h4028 ; -1034 : douta <= 16'h4028 ; -1035 : douta <= 16'h4028 ; -1036 : douta <= 16'h4028 ; -1037 : douta <= 16'h4028 ; -1038 : douta <= 16'h4028 ; -1039 : douta <= 16'h4028 ; -1040 : douta <= 16'h4028 ; -1041 : douta <= 16'h4028 ; -1042 : douta <= 16'h4028 ; -1043 : douta <= 16'h4028 ; -1044 : douta <= 16'h4028 ; -1045 : douta <= 16'h4028 ; -1046 : douta <= 16'h4028 ; -1047 : douta <= 16'h4028 ; -1048 : douta <= 16'h4028 ; -1049 : douta <= 16'h4028 ; -1050 : douta <= 16'h3D2A ; -1051 : douta <= 16'h4028 ; -1052 : douta <= 16'h3E2A ; -1053 : douta <= 16'h3E2A ; -1054 : douta <= 16'h3E2A ; -1055 : douta <= 16'h3E2A ; -1056 : douta <= 16'h3E2A ; -1057 : douta <= 16'h3E2A ; -1058 : douta <= 16'h3E2A ; -1059 : douta <= 16'h3E2A ; -1060 : douta <= 16'h3E2A ; -1061 : douta <= 16'h3E2A ; -1062 : douta <= 16'h3E2A ; -1063 : douta <= 16'h3E2A ; -1064 : douta <= 16'h3E2A ; -1065 : douta <= 16'h3E2A ; -1066 : douta <= 16'h3E2A ; -1067 : douta <= 16'h3E2A ; -1068 : douta <= 16'h3E2A ; -1069 : douta <= 16'h3E2A ; -1070 : douta <= 16'h3E2A ; -1071 : douta <= 16'h3E2A ; -1072 : douta <= 16'h3E2A ; -1073 : douta <= 16'h3E2A ; -1074 : douta <= 16'h3E2A ; -1075 : douta <= 16'h3E2A ; -1076 : douta <= 16'h3D2A ; -1077 : douta <= 16'h3E2A ; -1078 : douta <= 16'h3D2A ; -1079 : douta <= 16'h3D2A ; -1080 : douta <= 16'h3D2A ; -1081 : douta <= 16'h3D2A ; -1082 : douta <= 16'h3D2A ; -1083 : douta <= 16'h3D2A ; -1084 : douta <= 16'h3D2A ; -1085 : douta <= 16'h3D2A ; -1086 : douta <= 16'h3D2A ; -1087 : douta <= 16'h3D2A ; -1088 : douta <= 16'h3D2A ; -1089 : douta <= 16'h3D2A ; -1090 : douta <= 16'h3D2A ; -1091 : douta <= 16'h3D2A ; -1092 : douta <= 16'h3C2A ; -1093 : douta <= 16'h3D2A ; -1094 : douta <= 16'h3D2A ; -1095 : douta <= 16'h3D2A ; -1096 : douta <= 16'h3C2A ; -1097 : douta <= 16'h3D2A ; -1098 : douta <= 16'h3D2A ; -1099 : douta <= 16'h3D2A ; -1100 : douta <= 16'h3D2A ; -1101 : douta <= 16'h3D2A ; -1102 : douta <= 16'h3C2A ; -1103 : douta <= 16'h3D2A ; -1104 : douta <= 16'h3B2A ; -1105 : douta <= 16'h3B2A ; -1106 : douta <= 16'h3B2A ; -1107 : douta <= 16'h3C2A ; -1108 : douta <= 16'h3C2A ; -1109 : douta <= 16'h3C2A ; -1110 : douta <= 16'h3C2A ; -1111 : douta <= 16'h3C2A ; -1112 : douta <= 16'h3C2A ; -1113 : douta <= 16'h3C2A ; -1114 : douta <= 16'h3C2A ; -1115 : douta <= 16'h3C2A ; -1116 : douta <= 16'h3C2A ; -1117 : douta <= 16'h3C2A ; -1118 : douta <= 16'h3C2A ; -1119 : douta <= 16'h3C2A ; -1120 : douta <= 16'h3C2A ; -1121 : douta <= 16'h3C2A ; -1122 : douta <= 16'h3C2A ; -1123 : douta <= 16'h3C2A ; -1124 : douta <= 16'h3C2A ; -1125 : douta <= 16'h3C2A ; -1126 : douta <= 16'h3C2A ; -1127 : douta <= 16'h3C2A ; -1128 : douta <= 16'h3C2A ; -1129 : douta <= 16'h3C2A ; -1130 : douta <= 16'h3C2A ; -1131 : douta <= 16'h3B2A ; -1132 : douta <= 16'h3B2A ; -1133 : douta <= 16'h3B2A ; -1134 : douta <= 16'h3B2A ; -1135 : douta <= 16'h3B2A ; -1136 : douta <= 16'h3B2A ; -1137 : douta <= 16'h3B2A ; -1138 : douta <= 16'h3A2A ; -1139 : douta <= 16'h3A2A ; -1140 : douta <= 16'h3A2A ; -1141 : douta <= 16'h3A2A ; -1142 : douta <= 16'h3A2A ; -1143 : douta <= 16'h3A2A ; -1144 : douta <= 16'h3A2A ; -1145 : douta <= 16'h3A2A ; -1146 : douta <= 16'h392A ; -1147 : douta <= 16'h392A ; -1148 : douta <= 16'h392A ; -1149 : douta <= 16'h3A2A ; -1150 : douta <= 16'h3A2A ; -1151 : douta <= 16'h3A2A ; -1152 : douta <= 16'h3A2A ; -1153 : douta <= 16'h3A2A ; -1154 : douta <= 16'h3A2A ; -1155 : douta <= 16'h3A2A ; -1156 : douta <= 16'h3A2A ; -1157 : douta <= 16'h3A2A ; -1158 : douta <= 16'h3A2A ; -1159 : douta <= 16'h3A2A ; -1160 : douta <= 16'h3A2A ; -1161 : douta <= 16'h3A2A ; -1162 : douta <= 16'h3A2A ; -1163 : douta <= 16'h392A ; -1164 : douta <= 16'h3A2A ; -1165 : douta <= 16'h392A ; -1166 : douta <= 16'h392A ; -1167 : douta <= 16'h392A ; -1168 : douta <= 16'h392A ; -1169 : douta <= 16'h392A ; -1170 : douta <= 16'h392A ; -1171 : douta <= 16'h392A ; -1172 : douta <= 16'h392A ; -1173 : douta <= 16'h392A ; -1174 : douta <= 16'h392A ; -1175 : douta <= 16'h392A ; -1176 : douta <= 16'h392A ; -1177 : douta <= 16'h392A ; -1178 : douta <= 16'h392A ; -1179 : douta <= 16'h382A ; -1180 : douta <= 16'h382A ; -1181 : douta <= 16'h392A ; -1182 : douta <= 16'h392A ; -1183 : douta <= 16'h392A ; -1184 : douta <= 16'h392A ; -1185 : douta <= 16'h392A ; -1186 : douta <= 16'h392A ; -1187 : douta <= 16'h392A ; -1188 : douta <= 16'h372A ; -1189 : douta <= 16'h372A ; -1190 : douta <= 16'h372A ; -1191 : douta <= 16'h372A ; -1192 : douta <= 16'h382A ; -1193 : douta <= 16'h382A ; -1194 : douta <= 16'h382A ; -1195 : douta <= 16'h382A ; -1196 : douta <= 16'h382A ; -1197 : douta <= 16'h382A ; -1198 : douta <= 16'h382A ; -1199 : douta <= 16'h382A ; -1200 : douta <= 16'h382A ; -1201 : douta <= 16'h382A ; -1202 : douta <= 16'h382A ; -1203 : douta <= 16'h382A ; -1204 : douta <= 16'h382A ; -1205 : douta <= 16'h382A ; -1206 : douta <= 16'h382A ; -1207 : douta <= 16'h382A ; -1208 : douta <= 16'h382A ; -1209 : douta <= 16'h382A ; -1210 : douta <= 16'h382A ; -1211 : douta <= 16'h382A ; -1212 : douta <= 16'h382A ; -1213 : douta <= 16'h382A ; -1214 : douta <= 16'h382A ; -1215 : douta <= 16'h382A ; -1216 : douta <= 16'h382A ; -1217 : douta <= 16'h372A ; -1218 : douta <= 16'h382A ; -1219 : douta <= 16'h372A ; -1220 : douta <= 16'h372A ; -1221 : douta <= 16'h372A ; -1222 : douta <= 16'h372A ; -1223 : douta <= 16'h372A ; -1224 : douta <= 16'h372A ; -1225 : douta <= 16'h372A ; -1226 : douta <= 16'h372A ; -1227 : douta <= 16'h362A ; -1228 : douta <= 16'h352A ; -1229 : douta <= 16'h362A ; -1230 : douta <= 16'h362A ; -1231 : douta <= 16'h362A ; -1232 : douta <= 16'h362A ; -1233 : douta <= 16'h362A ; -1234 : douta <= 16'h362A ; -1235 : douta <= 16'h362A ; -1236 : douta <= 16'h362A ; -1237 : douta <= 16'h362A ; -1238 : douta <= 16'h362A ; -1239 : douta <= 16'h362A ; -1240 : douta <= 16'h362A ; -1241 : douta <= 16'h362A ; -1242 : douta <= 16'h362A ; -1243 : douta <= 16'h362A ; -1244 : douta <= 16'h362A ; -1245 : douta <= 16'h362A ; -1246 : douta <= 16'h362A ; -1247 : douta <= 16'h362A ; -1248 : douta <= 16'h362A ; -1249 : douta <= 16'h362A ; -1250 : douta <= 16'h362A ; -1251 : douta <= 16'h362A ; -1252 : douta <= 16'h362A ; -1253 : douta <= 16'h352A ; -1254 : douta <= 16'h352A ; -1255 : douta <= 16'h352A ; -1256 : douta <= 16'h352A ; -1257 : douta <= 16'h352A ; -1258 : douta <= 16'h352A ; -1259 : douta <= 16'h352A ; -1260 : douta <= 16'h352A ; -1261 : douta <= 16'h352A ; -1262 : douta <= 16'h352A ; -1263 : douta <= 16'h352A ; -1264 : douta <= 16'h352A ; -1265 : douta <= 16'h352A ; -1266 : douta <= 16'h352A ; -1267 : douta <= 16'h342A ; -1268 : douta <= 16'h342A ; -1269 : douta <= 16'h352A ; -1270 : douta <= 16'h352A ; -1271 : douta <= 16'h352A ; -1272 : douta <= 16'h352A ; -1273 : douta <= 16'h352A ; -1274 : douta <= 16'h352A ; -1275 : douta <= 16'h352A ; -1276 : douta <= 16'h352A ; -1277 : douta <= 16'h352A ; -1278 : douta <= 16'h352A ; -1279 : douta <= 16'h352A ; -1280 : douta <= 16'h342A ; -1281 : douta <= 16'h342A ; -1282 : douta <= 16'h342A ; -1283 : douta <= 16'h342A ; -1284 : douta <= 16'h342A ; -1285 : douta <= 16'h342A ; -1286 : douta <= 16'h342A ; -1287 : douta <= 16'h342A ; -1288 : douta <= 16'h342A ; -1289 : douta <= 16'h342A ; -1290 : douta <= 16'h342A ; -1291 : douta <= 16'h342A ; -1292 : douta <= 16'h342A ; -1293 : douta <= 16'h342A ; -1294 : douta <= 16'h342A ; -1295 : douta <= 16'h342A ; -1296 : douta <= 16'h332A ; -1297 : douta <= 16'h332A ; -1298 : douta <= 16'h332A ; -1299 : douta <= 16'h342A ; -1300 : douta <= 16'h342A ; -1301 : douta <= 16'h342A ; -1302 : douta <= 16'h342A ; -1303 : douta <= 16'h342A ; -1304 : douta <= 16'h342A ; -1305 : douta <= 16'h332A ; -1306 : douta <= 16'h332A ; -1307 : douta <= 16'h332A ; -1308 : douta <= 16'h332A ; -1309 : douta <= 16'h332A ; -1310 : douta <= 16'h332A ; -1311 : douta <= 16'h332A ; -1312 : douta <= 16'h332A ; -1313 : douta <= 16'h332A ; -1314 : douta <= 16'h332A ; -1315 : douta <= 16'h322A ; -1316 : douta <= 16'h322A ; -1317 : douta <= 16'h322A ; -1318 : douta <= 16'h322A ; -1319 : douta <= 16'h322A ; -1320 : douta <= 16'h322A ; -1321 : douta <= 16'h312A ; -1322 : douta <= 16'h322A ; -1323 : douta <= 16'h312A ; -1324 : douta <= 16'h312A ; -1325 : douta <= 16'h322A ; -1326 : douta <= 16'h322A ; -1327 : douta <= 16'h322A ; -1328 : douta <= 16'h322A ; -1329 : douta <= 16'h322A ; -1330 : douta <= 16'h322A ; -1331 : douta <= 16'h322A ; -1332 : douta <= 16'h322A ; -1333 : douta <= 16'h322A ; -1334 : douta <= 16'h322A ; -1335 : douta <= 16'h322A ; -1336 : douta <= 16'h322A ; -1337 : douta <= 16'h322A ; -1338 : douta <= 16'h322A ; -1339 : douta <= 16'h322A ; -1340 : douta <= 16'h312A ; -1341 : douta <= 16'h312A ; -1342 : douta <= 16'h312A ; -1343 : douta <= 16'h312A ; -1344 : douta <= 16'h312A ; -1345 : douta <= 16'h312A ; -1346 : douta <= 16'h312A ; -1347 : douta <= 16'h312A ; -1348 : douta <= 16'h312A ; -1349 : douta <= 16'h312A ; -1350 : douta <= 16'h312A ; -1351 : douta <= 16'h312A ; -1352 : douta <= 16'h312A ; -1353 : douta <= 16'h312A ; -1354 : douta <= 16'h312A ; -1355 : douta <= 16'h312A ; -1356 : douta <= 16'h302A ; -1357 : douta <= 16'h312A ; -1358 : douta <= 16'h312A ; -1359 : douta <= 16'h312A ; -1360 : douta <= 16'h312A ; -1361 : douta <= 16'h312A ; -1362 : douta <= 16'h312A ; -1363 : douta <= 16'h312A ; -1364 : douta <= 16'h312A ; -1365 : douta <= 16'h312A ; -1366 : douta <= 16'h2F2A ; -1367 : douta <= 16'h302A ; -1368 : douta <= 16'h302A ; -1369 : douta <= 16'h302A ; -1370 : douta <= 16'h302A ; -1371 : douta <= 16'h302A ; -1372 : douta <= 16'h302A ; -1373 : douta <= 16'h302A ; -1374 : douta <= 16'h302A ; -1375 : douta <= 16'h302A ; -1376 : douta <= 16'h302A ; -1377 : douta <= 16'h302A ; -1378 : douta <= 16'h302A ; -1379 : douta <= 16'h302A ; -1380 : douta <= 16'h302A ; -1381 : douta <= 16'h302A ; -1382 : douta <= 16'h2F2A ; -1383 : douta <= 16'h302A ; -1384 : douta <= 16'h302A ; -1385 : douta <= 16'h302A ; -1386 : douta <= 16'h302A ; -1387 : douta <= 16'h302A ; -1388 : douta <= 16'h302A ; -1389 : douta <= 16'h302A ; -1390 : douta <= 16'h302A ; -1391 : douta <= 16'h2F2A ; -1392 : douta <= 16'h302A ; -1393 : douta <= 16'h302A ; -1394 : douta <= 16'h302A ; -1395 : douta <= 16'h2F2A ; -1396 : douta <= 16'h302A ; -1397 : douta <= 16'h2F2A ; -1398 : douta <= 16'h2F2A ; -1399 : douta <= 16'h2F2A ; -1400 : douta <= 16'h2E2A ; -1401 : douta <= 16'h2E2A ; -1402 : douta <= 16'h2D2A ; -1403 : douta <= 16'h2D2A ; -1404 : douta <= 16'h2D2A ; -1405 : douta <= 16'h2D2A ; -1406 : douta <= 16'h2E2A ; -1407 : douta <= 16'h2E2A ; -1408 : douta <= 16'h2E2A ; -1409 : douta <= 16'h2E2A ; -1410 : douta <= 16'h2E2A ; -1411 : douta <= 16'h2E2A ; -1412 : douta <= 16'h2E2A ; -1413 : douta <= 16'h2E2A ; -1414 : douta <= 16'h2E2A ; -1415 : douta <= 16'h2E2A ; -1416 : douta <= 16'h2E2A ; -1417 : douta <= 16'h2E2A ; -1418 : douta <= 16'h2E2A ; -1419 : douta <= 16'h2E2A ; -1420 : douta <= 16'h2E2A ; -1421 : douta <= 16'h2E2A ; -1422 : douta <= 16'h2E2A ; -1423 : douta <= 16'h2E2A ; -1424 : douta <= 16'h2E2A ; -1425 : douta <= 16'h2E2A ; -1426 : douta <= 16'h2E2A ; -1427 : douta <= 16'h2D2A ; -1428 : douta <= 16'h2E2A ; -1429 : douta <= 16'h2D2A ; -1430 : douta <= 16'h2D2A ; -1431 : douta <= 16'h2D2A ; -1432 : douta <= 16'h2D2A ; -1433 : douta <= 16'h2D2A ; -1434 : douta <= 16'h2D2A ; -1435 : douta <= 16'h2D2A ; -1436 : douta <= 16'h2D2A ; -1437 : douta <= 16'h2D2A ; -1438 : douta <= 16'h2D2A ; -1439 : douta <= 16'h2D2A ; -1440 : douta <= 16'h2D2A ; -1441 : douta <= 16'h2D2A ; -1442 : douta <= 16'h2D2A ; -1443 : douta <= 16'h2C2A ; -1444 : douta <= 16'h2D2A ; -1445 : douta <= 16'h2C2A ; -1446 : douta <= 16'h2D2A ; -1447 : douta <= 16'h2D2A ; -1448 : douta <= 16'h2D2A ; -1449 : douta <= 16'h2D2A ; -1450 : douta <= 16'h2D2A ; -1451 : douta <= 16'h2D2A ; -1452 : douta <= 16'h2D2A ; -1453 : douta <= 16'h2D2A ; -1454 : douta <= 16'h2D2A ; -1455 : douta <= 16'h2D2A ; -1456 : douta <= 16'h2C2A ; -1457 : douta <= 16'h2C2A ; -1458 : douta <= 16'h2C2A ; -1459 : douta <= 16'h2B2A ; -1460 : douta <= 16'h2B2A ; -1461 : douta <= 16'h2C2A ; -1462 : douta <= 16'h2C2A ; -1463 : douta <= 16'h2C2A ; -1464 : douta <= 16'h2C2A ; -1465 : douta <= 16'h2C2A ; -1466 : douta <= 16'h2C2A ; -1467 : douta <= 16'h2C2A ; -1468 : douta <= 16'h2C2A ; -1469 : douta <= 16'h2C2A ; -1470 : douta <= 16'h2C2A ; -1471 : douta <= 16'h2C2A ; -1472 : douta <= 16'h2C2A ; -1473 : douta <= 16'h2C2A ; -1474 : douta <= 16'h2C2A ; -1475 : douta <= 16'h2C2A ; -1476 : douta <= 16'h2C2A ; -1477 : douta <= 16'h2C2A ; -1478 : douta <= 16'h2C2A ; -1479 : douta <= 16'h2C2A ; -1480 : douta <= 16'h2C2A ; -1481 : douta <= 16'h2C2A ; -1482 : douta <= 16'h2C2A ; -1483 : douta <= 16'h2C2A ; -1484 : douta <= 16'h2C2A ; -1485 : douta <= 16'h2B2A ; -1486 : douta <= 16'h2B2A ; -1487 : douta <= 16'h2B2A ; -1488 : douta <= 16'h2B2A ; -1489 : douta <= 16'h2A2A ; -1490 : douta <= 16'h2B2A ; -1491 : douta <= 16'h2A2A ; -1492 : douta <= 16'h2A2A ; -1493 : douta <= 16'h2A2A ; -1494 : douta <= 16'h2A2A ; -1495 : douta <= 16'h2A2A ; -1496 : douta <= 16'h2A2A ; -1497 : douta <= 16'h2A2A ; -1498 : douta <= 16'h2A2A ; -1499 : douta <= 16'h2A2A ; -1500 : douta <= 16'h292A ; -1501 : douta <= 16'h292A ; -1502 : douta <= 16'h292A ; -1503 : douta <= 16'h2A2A ; -1504 : douta <= 16'h2A2A ; -1505 : douta <= 16'h2A2A ; -1506 : douta <= 16'h2A2A ; -1507 : douta <= 16'h2A2A ; -1508 : douta <= 16'h2A2A ; -1509 : douta <= 16'h2A2A ; -1510 : douta <= 16'h2A2A ; -1511 : douta <= 16'h2A2A ; -1512 : douta <= 16'h2A2A ; -1513 : douta <= 16'h2A2A ; -1514 : douta <= 16'h2A2A ; -1515 : douta <= 16'h292A ; -1516 : douta <= 16'h292A ; -1517 : douta <= 16'h292A ; -1518 : douta <= 16'h292A ; -1519 : douta <= 16'h292A ; -1520 : douta <= 16'h292A ; -1521 : douta <= 16'h292A ; -1522 : douta <= 16'h292A ; -1523 : douta <= 16'h292A ; -1524 : douta <= 16'h292A ; -1525 : douta <= 16'h292A ; -1526 : douta <= 16'h292A ; -1527 : douta <= 16'h292A ; -1528 : douta <= 16'h292A ; -1529 : douta <= 16'h292A ; -1530 : douta <= 16'h292A ; -1531 : douta <= 16'h292A ; -1532 : douta <= 16'h282A ; -1533 : douta <= 16'h282A ; -1534 : douta <= 16'h282A ; -1535 : douta <= 16'h292A ; -1536 : douta <= 16'h292A ; -1537 : douta <= 16'h292A ; -1538 : douta <= 16'h292A ; -1539 : douta <= 16'h292A ; -1540 : douta <= 16'h292A ; -1541 : douta <= 16'h292A ; -1542 : douta <= 16'h272A ; -1543 : douta <= 16'h292A ; -1544 : douta <= 16'h272A ; -1545 : douta <= 16'h272A ; -1546 : douta <= 16'h282A ; -1547 : douta <= 16'h282A ; -1548 : douta <= 16'h282A ; -1549 : douta <= 16'h282A ; -1550 : douta <= 16'h282A ; -1551 : douta <= 16'h282A ; -1552 : douta <= 16'h282A ; -1553 : douta <= 16'h282A ; -1554 : douta <= 16'h282A ; -1555 : douta <= 16'h282A ; -1556 : douta <= 16'h282A ; -1557 : douta <= 16'h282A ; -1558 : douta <= 16'h282A ; -1559 : douta <= 16'h282A ; -1560 : douta <= 16'h282A ; -1561 : douta <= 16'h282A ; -1562 : douta <= 16'h282A ; -1563 : douta <= 16'h282A ; -1564 : douta <= 16'h282A ; -1565 : douta <= 16'h282A ; -1566 : douta <= 16'h282A ; -1567 : douta <= 16'h282A ; -1568 : douta <= 16'h282A ; -1569 : douta <= 16'h282A ; -1570 : douta <= 16'h282A ; -1571 : douta <= 16'h282A ; -1572 : douta <= 16'h282A ; -1573 : douta <= 16'h282A ; -1574 : douta <= 16'h282A ; -1575 : douta <= 16'h272A ; -1576 : douta <= 16'h272A ; -1577 : douta <= 16'h272A ; -1578 : douta <= 16'h272A ; -1579 : douta <= 16'h272A ; -1580 : douta <= 16'h272A ; -1581 : douta <= 16'h272A ; -1582 : douta <= 16'h272A ; -1583 : douta <= 16'h262A ; -1584 : douta <= 16'h262A ; -1585 : douta <= 16'h252A ; -1586 : douta <= 16'h252A ; -1587 : douta <= 16'h262A ; -1588 : douta <= 16'h262A ; -1589 : douta <= 16'h252A ; -1590 : douta <= 16'h262A ; -1591 : douta <= 16'h262A ; -1592 : douta <= 16'h262A ; -1593 : douta <= 16'h262A ; -1594 : douta <= 16'h262A ; -1595 : douta <= 16'h262A ; -1596 : douta <= 16'h262A ; -1597 : douta <= 16'h262A ; -1598 : douta <= 16'h262A ; -1599 : douta <= 16'h262A ; -1600 : douta <= 16'h262A ; -1601 : douta <= 16'h262A ; -1602 : douta <= 16'h262A ; -1603 : douta <= 16'h262A ; -1604 : douta <= 16'h262A ; -1605 : douta <= 16'h262A ; -1606 : douta <= 16'h262A ; -1607 : douta <= 16'h262A ; -1608 : douta <= 16'h262A ; -1609 : douta <= 16'h252A ; -1610 : douta <= 16'h252A ; -1611 : douta <= 16'h252A ; -1612 : douta <= 16'h252A ; -1613 : douta <= 16'h252A ; -1614 : douta <= 16'h252A ; -1615 : douta <= 16'h252A ; -1616 : douta <= 16'h252A ; -1617 : douta <= 16'h252A ; -1618 : douta <= 16'h252A ; -1619 : douta <= 16'h252A ; -1620 : douta <= 16'h252A ; -1621 : douta <= 16'h252A ; -1622 : douta <= 16'h252A ; -1623 : douta <= 16'h252A ; -1624 : douta <= 16'h252A ; -1625 : douta <= 16'h242A ; -1626 : douta <= 16'h252A ; -1627 : douta <= 16'h252A ; -1628 : douta <= 16'h252A ; -1629 : douta <= 16'h252A ; -1630 : douta <= 16'h252A ; -1631 : douta <= 16'h252A ; -1632 : douta <= 16'h252A ; -1633 : douta <= 16'h252A ; -1634 : douta <= 16'h252A ; -1635 : douta <= 16'h252A ; -1636 : douta <= 16'h252A ; -1637 : douta <= 16'h252A ; -1638 : douta <= 16'h242A ; -1639 : douta <= 16'h242A ; -1640 : douta <= 16'h242A ; -1641 : douta <= 16'h242A ; -1642 : douta <= 16'h242A ; -1643 : douta <= 16'h242A ; -1644 : douta <= 16'h242A ; -1645 : douta <= 16'h242A ; -1646 : douta <= 16'h242A ; -1647 : douta <= 16'h242A ; -1648 : douta <= 16'h242A ; -1649 : douta <= 16'h242A ; -1650 : douta <= 16'h242A ; -1651 : douta <= 16'h242A ; -1652 : douta <= 16'h232A ; -1653 : douta <= 16'h232A ; -1654 : douta <= 16'h242A ; -1655 : douta <= 16'h242A ; -1656 : douta <= 16'h242A ; -1657 : douta <= 16'h242A ; -1658 : douta <= 16'h242A ; -1659 : douta <= 16'h242A ; -1660 : douta <= 16'h242A ; -1661 : douta <= 16'h242A ; -1662 : douta <= 16'h242A ; -1663 : douta <= 16'h242A ; -1664 : douta <= 16'h242A ; -1665 : douta <= 16'h232A ; -1666 : douta <= 16'h232A ; -1667 : douta <= 16'h232A ; -1668 : douta <= 16'h232A ; -1669 : douta <= 16'h232A ; -1670 : douta <= 16'h232A ; -1671 : douta <= 16'h232A ; -1672 : douta <= 16'h222A ; -1673 : douta <= 16'h222A ; -1674 : douta <= 16'h222A ; -1675 : douta <= 16'h222A ; -1676 : douta <= 16'h222A ; -1677 : douta <= 16'h222A ; -1678 : douta <= 16'h222A ; -1679 : douta <= 16'h222A ; -1680 : douta <= 16'h222A ; -1681 : douta <= 16'h212A ; -1682 : douta <= 16'h222A ; -1683 : douta <= 16'h212A ; -1684 : douta <= 16'h222A ; -1685 : douta <= 16'h222A ; -1686 : douta <= 16'h222A ; -1687 : douta <= 16'h222A ; -1688 : douta <= 16'h222A ; -1689 : douta <= 16'h222A ; -1690 : douta <= 16'h222A ; -1691 : douta <= 16'h222A ; -1692 : douta <= 16'h222A ; -1693 : douta <= 16'h222A ; -1694 : douta <= 16'h222A ; -1695 : douta <= 16'h222A ; -1696 : douta <= 16'h222A ; -1697 : douta <= 16'h222A ; -1698 : douta <= 16'h222A ; -1699 : douta <= 16'h212A ; -1700 : douta <= 16'h212A ; -1701 : douta <= 16'h212A ; -1702 : douta <= 16'h212A ; -1703 : douta <= 16'h212A ; -1704 : douta <= 16'h212A ; -1705 : douta <= 16'h212A ; -1706 : douta <= 16'h212A ; -1707 : douta <= 16'h212A ; -1708 : douta <= 16'h212A ; -1709 : douta <= 16'h212A ; -1710 : douta <= 16'h212A ; -1711 : douta <= 16'h212A ; -1712 : douta <= 16'h212A ; -1713 : douta <= 16'h212A ; -1714 : douta <= 16'h202A ; -1715 : douta <= 16'h202A ; -1716 : douta <= 16'h212A ; -1717 : douta <= 16'h212A ; -1718 : douta <= 16'h212A ; -1719 : douta <= 16'h212A ; -1720 : douta <= 16'h212A ; -1721 : douta <= 16'h212A ; -1722 : douta <= 16'h212A ; -1723 : douta <= 16'h212A ; -1724 : douta <= 16'h212A ; -1725 : douta <= 16'h212A ; -1726 : douta <= 16'h202A ; -1727 : douta <= 16'h212A ; -1728 : douta <= 16'h202A ; -1729 : douta <= 16'h202A ; -1730 : douta <= 16'h202A ; -1731 : douta <= 16'h202A ; -1732 : douta <= 16'h202A ; -1733 : douta <= 16'h202A ; -1734 : douta <= 16'h202A ; -1735 : douta <= 16'h202A ; -1736 : douta <= 16'h202A ; -1737 : douta <= 16'h202A ; -1738 : douta <= 16'h202A ; -1739 : douta <= 16'h202A ; -1740 : douta <= 16'h202A ; -1741 : douta <= 16'h202A ; -1742 : douta <= 16'h202A ; -1743 : douta <= 16'h202A ; -1744 : douta <= 16'h202A ; -1745 : douta <= 16'h202A ; -1746 : douta <= 16'h202A ; -1747 : douta <= 16'h202A ; -1748 : douta <= 16'h202A ; -1749 : douta <= 16'h202A ; -1750 : douta <= 16'h202A ; -1751 : douta <= 16'h1F2C ; -1752 : douta <= 16'h202A ; -1753 : douta <= 16'h202A ; -1754 : douta <= 16'h202A ; -1755 : douta <= 16'h202A ; -1756 : douta <= 16'h202A ; -1757 : douta <= 16'h1D2C ; -1758 : douta <= 16'h202A ; -1759 : douta <= 16'h202A ; -1760 : douta <= 16'h202A ; -1761 : douta <= 16'h202A ; -1762 : douta <= 16'h1E2C ; -1763 : douta <= 16'h202A ; -1764 : douta <= 16'h202A ; -1765 : douta <= 16'h202A ; -1766 : douta <= 16'h202A ; -1767 : douta <= 16'h1E2C ; -1768 : douta <= 16'h202A ; -1769 : douta <= 16'h1E2C ; -1770 : douta <= 16'h1E2C ; -1771 : douta <= 16'h1E2C ; -1772 : douta <= 16'h1E2C ; -1773 : douta <= 16'h1E2C ; -1774 : douta <= 16'h1E2C ; -1775 : douta <= 16'h1E2C ; -1776 : douta <= 16'h1E2C ; -1777 : douta <= 16'h1E2C ; -1778 : douta <= 16'h1E2C ; -1779 : douta <= 16'h1E2C ; -1780 : douta <= 16'h1E2C ; -1781 : douta <= 16'h1E2C ; -1782 : douta <= 16'h1E2C ; -1783 : douta <= 16'h1D2C ; -1784 : douta <= 16'h1D2C ; -1785 : douta <= 16'h1D2C ; -1786 : douta <= 16'h1D2C ; -1787 : douta <= 16'h1D2C ; -1788 : douta <= 16'h1D2C ; -1789 : douta <= 16'h1D2C ; -1790 : douta <= 16'h1D2C ; -1791 : douta <= 16'h1D2C ; -1792 : douta <= 16'h1D2C ; -1793 : douta <= 16'h1D2C ; -1794 : douta <= 16'h1D2C ; -1795 : douta <= 16'h1D2C ; -1796 : douta <= 16'h1D2C ; -1797 : douta <= 16'h1C2C ; -1798 : douta <= 16'h1C2C ; -1799 : douta <= 16'h1C2C ; -1800 : douta <= 16'h1C2C ; -1801 : douta <= 16'h1D2C ; -1802 : douta <= 16'h1D2C ; -1803 : douta <= 16'h1D2C ; -1804 : douta <= 16'h1D2C ; -1805 : douta <= 16'h1D2C ; -1806 : douta <= 16'h1D2C ; -1807 : douta <= 16'h1D2C ; -1808 : douta <= 16'h1D2C ; -1809 : douta <= 16'h1D2C ; -1810 : douta <= 16'h1D2C ; -1811 : douta <= 16'h1C2C ; -1812 : douta <= 16'h1C2C ; -1813 : douta <= 16'h1C2C ; -1814 : douta <= 16'h1C2C ; -1815 : douta <= 16'h1C2C ; -1816 : douta <= 16'h1C2C ; -1817 : douta <= 16'h1B2C ; -1818 : douta <= 16'h1C2C ; -1819 : douta <= 16'h1B2C ; -1820 : douta <= 16'h1B2C ; -1821 : douta <= 16'h1B2C ; -1822 : douta <= 16'h1C2C ; -1823 : douta <= 16'h1C2C ; -1824 : douta <= 16'h1C2C ; -1825 : douta <= 16'h1C2C ; -1826 : douta <= 16'h1C2C ; -1827 : douta <= 16'h1C2C ; -1828 : douta <= 16'h1C2C ; -1829 : douta <= 16'h1C2C ; -1830 : douta <= 16'h1C2C ; -1831 : douta <= 16'h1C2C ; -1832 : douta <= 16'h1C2C ; -1833 : douta <= 16'h1C2C ; -1834 : douta <= 16'h1C2C ; -1835 : douta <= 16'h1C2C ; -1836 : douta <= 16'h1C2C ; -1837 : douta <= 16'h1C2C ; -1838 : douta <= 16'h1C2C ; -1839 : douta <= 16'h1C2C ; -1840 : douta <= 16'h1B2C ; -1841 : douta <= 16'h1B2C ; -1842 : douta <= 16'h1B2C ; -1843 : douta <= 16'h1B2C ; -1844 : douta <= 16'h1B2C ; -1845 : douta <= 16'h1B2C ; -1846 : douta <= 16'h1B2C ; -1847 : douta <= 16'h1B2C ; -1848 : douta <= 16'h1B2C ; -1849 : douta <= 16'h1B2C ; -1850 : douta <= 16'h1A2C ; -1851 : douta <= 16'h1A2C ; -1852 : douta <= 16'h1A2C ; -1853 : douta <= 16'h1A2C ; -1854 : douta <= 16'h1A2C ; -1855 : douta <= 16'h1A2C ; -1856 : douta <= 16'h192C ; -1857 : douta <= 16'h192C ; -1858 : douta <= 16'h192C ; -1859 : douta <= 16'h1A2C ; -1860 : douta <= 16'h1A2C ; -1861 : douta <= 16'h1A2C ; -1862 : douta <= 16'h1A2C ; -1863 : douta <= 16'h1A2C ; -1864 : douta <= 16'h1A2C ; -1865 : douta <= 16'h1A2C ; -1866 : douta <= 16'h1A2C ; -1867 : douta <= 16'h1A2C ; -1868 : douta <= 16'h1A2C ; -1869 : douta <= 16'h1A2C ; -1870 : douta <= 16'h1A2C ; -1871 : douta <= 16'h1A2C ; -1872 : douta <= 16'h1A2C ; -1873 : douta <= 16'h1A2C ; -1874 : douta <= 16'h1A2C ; -1875 : douta <= 16'h1A2C ; -1876 : douta <= 16'h1A2C ; -1877 : douta <= 16'h1A2C ; -1878 : douta <= 16'h192C ; -1879 : douta <= 16'h192C ; -1880 : douta <= 16'h192C ; -1881 : douta <= 16'h192C ; -1882 : douta <= 16'h192C ; -1883 : douta <= 16'h192C ; -1884 : douta <= 16'h192C ; -1885 : douta <= 16'h192C ; -1886 : douta <= 16'h192C ; -1887 : douta <= 16'h192C ; -1888 : douta <= 16'h192C ; -1889 : douta <= 16'h192C ; -1890 : douta <= 16'h192C ; -1891 : douta <= 16'h192C ; -1892 : douta <= 16'h182C ; -1893 : douta <= 16'h192C ; -1894 : douta <= 16'h192C ; -1895 : douta <= 16'h192C ; -1896 : douta <= 16'h192C ; -1897 : douta <= 16'h192C ; -1898 : douta <= 16'h192C ; -1899 : douta <= 16'h192C ; -1900 : douta <= 16'h192C ; -1901 : douta <= 16'h192C ; -1902 : douta <= 16'h192C ; -1903 : douta <= 16'h192C ; -1904 : douta <= 16'h192C ; -1905 : douta <= 16'h192C ; -1906 : douta <= 16'h182C ; -1907 : douta <= 16'h182C ; -1908 : douta <= 16'h182C ; -1909 : douta <= 16'h172C ; -1910 : douta <= 16'h182C ; -1911 : douta <= 16'h172C ; -1912 : douta <= 16'h172C ; -1913 : douta <= 16'h172C ; -1914 : douta <= 16'h182C ; -1915 : douta <= 16'h182C ; -1916 : douta <= 16'h182C ; -1917 : douta <= 16'h182C ; -1918 : douta <= 16'h182C ; -1919 : douta <= 16'h182C ; -1920 : douta <= 16'h182C ; -1921 : douta <= 16'h182C ; -1922 : douta <= 16'h182C ; -1923 : douta <= 16'h182C ; -1924 : douta <= 16'h182C ; -1925 : douta <= 16'h182C ; -1926 : douta <= 16'h182C ; -1927 : douta <= 16'h182C ; -1928 : douta <= 16'h182C ; -1929 : douta <= 16'h182C ; -1930 : douta <= 16'h182C ; -1931 : douta <= 16'h182C ; -1932 : douta <= 16'h182C ; -1933 : douta <= 16'h182C ; -1934 : douta <= 16'h182C ; -1935 : douta <= 16'h172C ; -1936 : douta <= 16'h172C ; -1937 : douta <= 16'h172C ; -1938 : douta <= 16'h172C ; -1939 : douta <= 16'h172C ; -1940 : douta <= 16'h172C ; -1941 : douta <= 16'h172C ; -1942 : douta <= 16'h172C ; -1943 : douta <= 16'h152C ; -1944 : douta <= 16'h152C ; -1945 : douta <= 16'h152C ; -1946 : douta <= 16'h152C ; -1947 : douta <= 16'h152C ; -1948 : douta <= 16'h162C ; -1949 : douta <= 16'h162C ; -1950 : douta <= 16'h162C ; -1951 : douta <= 16'h162C ; -1952 : douta <= 16'h162C ; -1953 : douta <= 16'h162C ; -1954 : douta <= 16'h162C ; -1955 : douta <= 16'h162C ; -1956 : douta <= 16'h162C ; -1957 : douta <= 16'h162C ; -1958 : douta <= 16'h162C ; -1959 : douta <= 16'h162C ; -1960 : douta <= 16'h162C ; -1961 : douta <= 16'h162C ; -1962 : douta <= 16'h162C ; -1963 : douta <= 16'h162C ; -1964 : douta <= 16'h162C ; -1965 : douta <= 16'h162C ; -1966 : douta <= 16'h162C ; -1967 : douta <= 16'h162C ; -1968 : douta <= 16'h162C ; -1969 : douta <= 16'h162C ; -1970 : douta <= 16'h162C ; -1971 : douta <= 16'h162C ; -1972 : douta <= 16'h152C ; -1973 : douta <= 16'h152C ; -1974 : douta <= 16'h152C ; -1975 : douta <= 16'h152C ; -1976 : douta <= 16'h152C ; -1977 : douta <= 16'h152C ; -1978 : douta <= 16'h152C ; -1979 : douta <= 16'h152C ; -1980 : douta <= 16'h152C ; -1981 : douta <= 16'h152C ; -1982 : douta <= 16'h152C ; -1983 : douta <= 16'h152C ; -1984 : douta <= 16'h152C ; -1985 : douta <= 16'h152C ; -1986 : douta <= 16'h152C ; -1987 : douta <= 16'h142C ; -1988 : douta <= 16'h142C ; -1989 : douta <= 16'h152C ; -1990 : douta <= 16'h152C ; -1991 : douta <= 16'h152C ; -1992 : douta <= 16'h152C ; -1993 : douta <= 16'h152C ; -1994 : douta <= 16'h152C ; -1995 : douta <= 16'h152C ; -1996 : douta <= 16'h152C ; -1997 : douta <= 16'h152C ; -1998 : douta <= 16'h152C ; -1999 : douta <= 16'h152C ; -2000 : douta <= 16'h152C ; -2001 : douta <= 16'h152C ; -2002 : douta <= 16'h142C ; -2003 : douta <= 16'h142C ; -2004 : douta <= 16'h142C ; -2005 : douta <= 16'h142C ; -2006 : douta <= 16'h142C ; -2007 : douta <= 16'h142C ; -2008 : douta <= 16'h142C ; -2009 : douta <= 16'h142C ; -2010 : douta <= 16'h142C ; -2011 : douta <= 16'h142C ; -2012 : douta <= 16'h142C ; -2013 : douta <= 16'h142C ; -2014 : douta <= 16'h142C ; -2015 : douta <= 16'h142C ; -2016 : douta <= 16'h142C ; -2017 : douta <= 16'h142C ; -2018 : douta <= 16'h142C ; -2019 : douta <= 16'h122C ; -2020 : douta <= 16'h132C ; -2021 : douta <= 16'h142C ; -2022 : douta <= 16'h142C ; -2023 : douta <= 16'h142C ; -2024 : douta <= 16'h142C ; -2025 : douta <= 16'h142C ; -2026 : douta <= 16'h142C ; -2027 : douta <= 16'h132C ; -2028 : douta <= 16'h132C ; -2029 : douta <= 16'h132C ; -2030 : douta <= 16'h132C ; -2031 : douta <= 16'h132C ; -2032 : douta <= 16'h132C ; -2033 : douta <= 16'h132C ; -2034 : douta <= 16'h132C ; -2035 : douta <= 16'h132C ; -2036 : douta <= 16'h132C ; -2037 : douta <= 16'h122C ; -2038 : douta <= 16'h132C ; -2039 : douta <= 16'h122C ; -2040 : douta <= 16'h122C ; -2041 : douta <= 16'h122C ; -2042 : douta <= 16'h122C ; -2043 : douta <= 16'h112C ; -2044 : douta <= 16'h122C ; -2045 : douta <= 16'h112C ; -2046 : douta <= 16'h122C ; -2047 : douta <= 16'h122C ; -2048 : douta <= 16'h122C ; -2049 : douta <= 16'h122C ; -2050 : douta <= 16'h122C ; -2051 : douta <= 16'h122C ; -2052 : douta <= 16'h122C ; -2053 : douta <= 16'h122C ; -2054 : douta <= 16'h122C ; -2055 : douta <= 16'h122C ; -2056 : douta <= 16'h122C ; -2057 : douta <= 16'h122C ; -2058 : douta <= 16'h122C ; -2059 : douta <= 16'h122C ; -2060 : douta <= 16'h122C ; -2061 : douta <= 16'h122C ; -2062 : douta <= 16'h122C ; -2063 : douta <= 16'h122C ; -2064 : douta <= 16'h122C ; -2065 : douta <= 16'h122C ; -2066 : douta <= 16'h112C ; -2067 : douta <= 16'h112C ; -2068 : douta <= 16'h112C ; -2069 : douta <= 16'h112C ; -2070 : douta <= 16'h112C ; -2071 : douta <= 16'h112C ; -2072 : douta <= 16'h112C ; -2073 : douta <= 16'h112C ; -2074 : douta <= 16'h112C ; -2075 : douta <= 16'h112C ; -2076 : douta <= 16'h112C ; -2077 : douta <= 16'h112C ; -2078 : douta <= 16'h112C ; -2079 : douta <= 16'h112C ; -2080 : douta <= 16'h112C ; -2081 : douta <= 16'h102C ; -2082 : douta <= 16'h102C ; -2083 : douta <= 16'h102C ; -2084 : douta <= 16'h102C ; -2085 : douta <= 16'h112C ; -2086 : douta <= 16'h112C ; -2087 : douta <= 16'h112C ; -2088 : douta <= 16'h112C ; -2089 : douta <= 16'h112C ; -2090 : douta <= 16'h112C ; -2091 : douta <= 16'h0F2C ; -2092 : douta <= 16'h112C ; -2093 : douta <= 16'h112C ; -2094 : douta <= 16'h112C ; -2095 : douta <= 16'h102C ; -2096 : douta <= 16'h102C ; -2097 : douta <= 16'h102C ; -2098 : douta <= 16'h102C ; -2099 : douta <= 16'h102C ; -2100 : douta <= 16'h102C ; -2101 : douta <= 16'h102C ; -2102 : douta <= 16'h102C ; -2103 : douta <= 16'h102C ; -2104 : douta <= 16'h102C ; -2105 : douta <= 16'h102C ; -2106 : douta <= 16'h102C ; -2107 : douta <= 16'h102C ; -2108 : douta <= 16'h0E2C ; -2109 : douta <= 16'h102C ; -2110 : douta <= 16'h102C ; -2111 : douta <= 16'h102C ; -2112 : douta <= 16'h102C ; -2113 : douta <= 16'h102C ; -2114 : douta <= 16'h102C ; -2115 : douta <= 16'h102C ; -2116 : douta <= 16'h102C ; -2117 : douta <= 16'h102C ; -2118 : douta <= 16'h102C ; -2119 : douta <= 16'h102C ; -2120 : douta <= 16'h102C ; -2121 : douta <= 16'h102C ; -2122 : douta <= 16'h102C ; -2123 : douta <= 16'h102C ; -2124 : douta <= 16'h0F2C ; -2125 : douta <= 16'h0F2C ; -2126 : douta <= 16'h0F2C ; -2127 : douta <= 16'h0E2C ; -2128 : douta <= 16'h0F2C ; -2129 : douta <= 16'h0F2C ; -2130 : douta <= 16'h0F2C ; -2131 : douta <= 16'h0E2C ; -2132 : douta <= 16'h0E2C ; -2133 : douta <= 16'h0D2C ; -2134 : douta <= 16'h0D2C ; -2135 : douta <= 16'h0D2C ; -2136 : douta <= 16'h0E2C ; -2137 : douta <= 16'h0E2C ; -2138 : douta <= 16'h0E2C ; -2139 : douta <= 16'h0E2C ; -2140 : douta <= 16'h0E2C ; -2141 : douta <= 16'h0E2C ; -2142 : douta <= 16'h0E2C ; -2143 : douta <= 16'h0E2C ; -2144 : douta <= 16'h0E2C ; -2145 : douta <= 16'h0E2C ; -2146 : douta <= 16'h0E2C ; -2147 : douta <= 16'h0E2C ; -2148 : douta <= 16'h0E2C ; -2149 : douta <= 16'h0E2C ; -2150 : douta <= 16'h0E2C ; -2151 : douta <= 16'h0E2C ; -2152 : douta <= 16'h0E2C ; -2153 : douta <= 16'h0E2C ; -2154 : douta <= 16'h0E2C ; -2155 : douta <= 16'h0E2C ; -2156 : douta <= 16'h0E2C ; -2157 : douta <= 16'h0E2C ; -2158 : douta <= 16'h0D2C ; -2159 : douta <= 16'h0D2C ; -2160 : douta <= 16'h0D2C ; -2161 : douta <= 16'h0D2C ; -2162 : douta <= 16'h0D2C ; -2163 : douta <= 16'h0D2C ; -2164 : douta <= 16'h0D2C ; -2165 : douta <= 16'h0D2C ; -2166 : douta <= 16'h0D2C ; -2167 : douta <= 16'h0D2C ; -2168 : douta <= 16'h0D2C ; -2169 : douta <= 16'h0D2C ; -2170 : douta <= 16'h0D2C ; -2171 : douta <= 16'h0D2C ; -2172 : douta <= 16'h0C2C ; -2173 : douta <= 16'h0C2C ; -2174 : douta <= 16'h0C2C ; -2175 : douta <= 16'h0D2C ; -2176 : douta <= 16'h0C2C ; -2177 : douta <= 16'h0D2C ; -2178 : douta <= 16'h0D2C ; -2179 : douta <= 16'h0D2C ; -2180 : douta <= 16'h0D2C ; -2181 : douta <= 16'h0D2C ; -2182 : douta <= 16'h0D2C ; -2183 : douta <= 16'h0D2C ; -2184 : douta <= 16'h0D2C ; -2185 : douta <= 16'h0D2C ; -2186 : douta <= 16'h0D2C ; -2187 : douta <= 16'h0D2C ; -2188 : douta <= 16'h0D2C ; -2189 : douta <= 16'h0C2C ; -2190 : douta <= 16'h0C2C ; -2191 : douta <= 16'h0C2C ; -2192 : douta <= 16'h0C2C ; -2193 : douta <= 16'h0C2C ; -2194 : douta <= 16'h0C2C ; -2195 : douta <= 16'h0C2C ; -2196 : douta <= 16'h0B2C ; -2197 : douta <= 16'h0B2C ; -2198 : douta <= 16'h0B2C ; -2199 : douta <= 16'h0C2C ; -2200 : douta <= 16'h0C2C ; -2201 : douta <= 16'h0C2C ; -2202 : douta <= 16'h0C2C ; -2203 : douta <= 16'h0C2C ; -2204 : douta <= 16'h0C2C ; -2205 : douta <= 16'h0C2C ; -2206 : douta <= 16'h0C2C ; -2207 : douta <= 16'h0C2C ; -2208 : douta <= 16'h0C2C ; -2209 : douta <= 16'h0C2C ; -2210 : douta <= 16'h0C2C ; -2211 : douta <= 16'h0C2C ; -2212 : douta <= 16'h0C2C ; -2213 : douta <= 16'h0C2C ; -2214 : douta <= 16'h0C2C ; -2215 : douta <= 16'h0C2C ; -2216 : douta <= 16'h0C2C ; -2217 : douta <= 16'h0C2C ; -2218 : douta <= 16'h0C2C ; -2219 : douta <= 16'h0C2C ; -2220 : douta <= 16'h0B2C ; -2221 : douta <= 16'h0B2C ; -2222 : douta <= 16'h0B2C ; -2223 : douta <= 16'h0B2C ; -2224 : douta <= 16'h0B2C ; -2225 : douta <= 16'h0B2C ; -2226 : douta <= 16'h0A2C ; -2227 : douta <= 16'h0A2C ; -2228 : douta <= 16'h0A2C ; -2229 : douta <= 16'h0A2C ; -2230 : douta <= 16'h0A2C ; -2231 : douta <= 16'h0A2C ; -2232 : douta <= 16'h0A2C ; -2233 : douta <= 16'h0A2C ; -2234 : douta <= 16'h92C ; -2235 : douta <= 16'h0A2C ; -2236 : douta <= 16'h0A2C ; -2237 : douta <= 16'h92C ; -2238 : douta <= 16'h0A2C ; -2239 : douta <= 16'h0A2C ; -2240 : douta <= 16'h0A2C ; -2241 : douta <= 16'h0A2C ; -2242 : douta <= 16'h0A2C ; -2243 : douta <= 16'h0A2C ; -2244 : douta <= 16'h0A2C ; -2245 : douta <= 16'h0A2C ; -2246 : douta <= 16'h0A2C ; -2247 : douta <= 16'h0A2C ; -2248 : douta <= 16'h0A2C ; -2249 : douta <= 16'h0A2C ; -2250 : douta <= 16'h0A2C ; -2251 : douta <= 16'h0A2C ; -2252 : douta <= 16'h0A2C ; -2253 : douta <= 16'h92C ; -2254 : douta <= 16'h0A2C ; -2255 : douta <= 16'h92C ; -2256 : douta <= 16'h92C ; -2257 : douta <= 16'h92C ; -2258 : douta <= 16'h92C ; -2259 : douta <= 16'h92C ; -2260 : douta <= 16'h92C ; -2261 : douta <= 16'h92C ; -2262 : douta <= 16'h92C ; -2263 : douta <= 16'h92C ; -2264 : douta <= 16'h92C ; -2265 : douta <= 16'h92C ; -2266 : douta <= 16'h92C ; -2267 : douta <= 16'h92C ; -2268 : douta <= 16'h92C ; -2269 : douta <= 16'h92C ; -2270 : douta <= 16'h82C ; -2271 : douta <= 16'h82C ; -2272 : douta <= 16'h92C ; -2273 : douta <= 16'h92C ; -2274 : douta <= 16'h82C ; -2275 : douta <= 16'h92C ; -2276 : douta <= 16'h92C ; -2277 : douta <= 16'h92C ; -2278 : douta <= 16'h92C ; -2279 : douta <= 16'h92C ; -2280 : douta <= 16'h92C ; -2281 : douta <= 16'h92C ; -2282 : douta <= 16'h92C ; -2283 : douta <= 16'h92C ; -2284 : douta <= 16'h92C ; -2285 : douta <= 16'h92C ; -2286 : douta <= 16'h92C ; -2287 : douta <= 16'h82C ; -2288 : douta <= 16'h82C ; -2289 : douta <= 16'h82C ; -2290 : douta <= 16'h82C ; -2291 : douta <= 16'h82C ; -2292 : douta <= 16'h82C ; -2293 : douta <= 16'h82C ; -2294 : douta <= 16'h82C ; -2295 : douta <= 16'h82C ; -2296 : douta <= 16'h82C ; -2297 : douta <= 16'h82C ; -2298 : douta <= 16'h82C ; -2299 : douta <= 16'h82C ; -2300 : douta <= 16'h82C ; -2301 : douta <= 16'h82C ; -2302 : douta <= 16'h82C ; -2303 : douta <= 16'h82C ; -2304 : douta <= 16'h82C ; -2305 : douta <= 16'h82C ; -2306 : douta <= 16'h82C ; -2307 : douta <= 16'h82C ; -2308 : douta <= 16'h82C ; -2309 : douta <= 16'h82C ; -2310 : douta <= 16'h82C ; -2311 : douta <= 16'h82C ; -2312 : douta <= 16'h72C ; -2313 : douta <= 16'h72C ; -2314 : douta <= 16'h82C ; -2315 : douta <= 16'h82C ; -2316 : douta <= 16'h72C ; -2317 : douta <= 16'h72C ; -2318 : douta <= 16'h72C ; -2319 : douta <= 16'h72C ; -2320 : douta <= 16'h72C ; -2321 : douta <= 16'h72C ; -2322 : douta <= 16'h72C ; -2323 : douta <= 16'h72C ; -2324 : douta <= 16'h62C ; -2325 : douta <= 16'h62C ; -2326 : douta <= 16'h62C ; -2327 : douta <= 16'h52C ; -2328 : douta <= 16'h52C ; -2329 : douta <= 16'h52C ; -2330 : douta <= 16'h52C ; -2331 : douta <= 16'h62C ; -2332 : douta <= 16'h62C ; -2333 : douta <= 16'h62C ; -2334 : douta <= 16'h62C ; -2335 : douta <= 16'h62C ; -2336 : douta <= 16'h62C ; -2337 : douta <= 16'h62C ; -2338 : douta <= 16'h62C ; -2339 : douta <= 16'h62C ; -2340 : douta <= 16'h62C ; -2341 : douta <= 16'h62C ; -2342 : douta <= 16'h62C ; -2343 : douta <= 16'h62C ; -2344 : douta <= 16'h62C ; -2345 : douta <= 16'h62C ; -2346 : douta <= 16'h62C ; -2347 : douta <= 16'h62C ; -2348 : douta <= 16'h62C ; -2349 : douta <= 16'h62C ; -2350 : douta <= 16'h62C ; -2351 : douta <= 16'h62C ; -2352 : douta <= 16'h52C ; -2353 : douta <= 16'h52C ; -2354 : douta <= 16'h52C ; -2355 : douta <= 16'h52C ; -2356 : douta <= 16'h52C ; -2357 : douta <= 16'h52C ; -2358 : douta <= 16'h52C ; -2359 : douta <= 16'h52C ; -2360 : douta <= 16'h52C ; -2361 : douta <= 16'h52C ; -2362 : douta <= 16'h52C ; -2363 : douta <= 16'h52C ; -2364 : douta <= 16'h52C ; -2365 : douta <= 16'h52C ; -2366 : douta <= 16'h42C ; -2367 : douta <= 16'h42C ; -2368 : douta <= 16'h42C ; -2369 : douta <= 16'h42C ; -2370 : douta <= 16'h52C ; -2371 : douta <= 16'h52C ; -2372 : douta <= 16'h52C ; -2373 : douta <= 16'h52C ; -2374 : douta <= 16'h52C ; -2375 : douta <= 16'h52C ; -2376 : douta <= 16'h52C ; -2377 : douta <= 16'h52C ; -2378 : douta <= 16'h52C ; -2379 : douta <= 16'h52C ; -2380 : douta <= 16'h52C ; -2381 : douta <= 16'h52C ; -2382 : douta <= 16'h52C ; -2383 : douta <= 16'h42C ; -2384 : douta <= 16'h42C ; -2385 : douta <= 16'h42C ; -2386 : douta <= 16'h42C ; -2387 : douta <= 16'h42C ; -2388 : douta <= 16'h42C ; -2389 : douta <= 16'h42C ; -2390 : douta <= 16'h42C ; -2391 : douta <= 16'h42C ; -2392 : douta <= 16'h42C ; -2393 : douta <= 16'h42C ; -2394 : douta <= 16'h42C ; -2395 : douta <= 16'h42C ; -2396 : douta <= 16'h42C ; -2397 : douta <= 16'h42C ; -2398 : douta <= 16'h42C ; -2399 : douta <= 16'h42C ; -2400 : douta <= 16'h42C ; -2401 : douta <= 16'h22C ; -2402 : douta <= 16'h42C ; -2403 : douta <= 16'h42C ; -2404 : douta <= 16'h42C ; -2405 : douta <= 16'h42C ; -2406 : douta <= 16'h42C ; -2407 : douta <= 16'h42C ; -2408 : douta <= 16'h42C ; -2409 : douta <= 16'h42C ; -2410 : douta <= 16'h42C ; -2411 : douta <= 16'h42C ; -2412 : douta <= 16'h42C ; -2413 : douta <= 16'h32C ; -2414 : douta <= 16'h32C ; -2415 : douta <= 16'h32C ; -2416 : douta <= 16'h32C ; -2417 : douta <= 16'h32C ; -2418 : douta <= 16'h32C ; -2419 : douta <= 16'h32C ; -2420 : douta <= 16'h32C ; -2421 : douta <= 16'h32C ; -2422 : douta <= 16'h32C ; -2423 : douta <= 16'h22C ; -2424 : douta <= 16'h22C ; -2425 : douta <= 16'h22C ; -2426 : douta <= 16'h22C ; -2427 : douta <= 16'h22C ; -2428 : douta <= 16'h12C ; -2429 : douta <= 16'h22C ; -2430 : douta <= 16'h22C ; -2431 : douta <= 16'h22C ; -2432 : douta <= 16'h22C ; -2433 : douta <= 16'h22C ; -2434 : douta <= 16'h22C ; -2435 : douta <= 16'h22C ; -2436 : douta <= 16'h22C ; -2437 : douta <= 16'h22C ; -2438 : douta <= 16'h22C ; -2439 : douta <= 16'h22C ; -2440 : douta <= 16'h22C ; -2441 : douta <= 16'h22C ; -2442 : douta <= 16'h22C ; -2443 : douta <= 16'h22C ; -2444 : douta <= 16'h22C ; -2445 : douta <= 16'h22C ; -2446 : douta <= 16'h22C ; -2447 : douta <= 16'h22C ; -2448 : douta <= 16'h12C ; -2449 : douta <= 16'h12C ; -2450 : douta <= 16'h12C ; -2451 : douta <= 16'h12C ; -2452 : douta <= 16'h12C ; -2453 : douta <= 16'h12C ; -2454 : douta <= 16'h12C ; -2455 : douta <= 16'h12C ; -2456 : douta <= 16'h12C ; -2457 : douta <= 16'h12C ; -2458 : douta <= 16'h12C ; -2459 : douta <= 16'h12C ; -2460 : douta <= 16'h12C ; -2461 : douta <= 16'h12C ; -2462 : douta <= 16'h12C ; -2463 : douta <= 16'h02C ; -2464 : douta <= 16'h02C ; -2465 : douta <= 16'h12C ; -2466 : douta <= 16'h02C ; -2467 : douta <= 16'h12C ; -2468 : douta <= 16'h12C ; -2469 : douta <= 16'h12C ; -2470 : douta <= 16'h12C ; -2471 : douta <= 16'h12C ; -2472 : douta <= 16'h12C ; -2473 : douta <= 16'h12C ; -2474 : douta <= 16'h12C ; -2475 : douta <= 16'h12C ; -2476 : douta <= 16'h12C ; -2477 : douta <= 16'h12C ; -2478 : douta <= 16'h12C ; -2479 : douta <= 16'h02C ; -2480 : douta <= 16'h12C ; -2481 : douta <= 16'h02C ; -2482 : douta <= 16'h02C ; -2483 : douta <= 16'h02C ; -2484 : douta <= 16'hD040 ; -2485 : douta <= 16'h02C ; -2486 : douta <= 16'h02C ; -2487 : douta <= 16'h02C ; -2488 : douta <= 16'h02C ; -2489 : douta <= 16'h02C ; -2490 : douta <= 16'h02C ; -2491 : douta <= 16'h02C ; -2492 : douta <= 16'h02C ; -2493 : douta <= 16'hD040 ; -2494 : douta <= 16'h02C ; -2495 : douta <= 16'h02C ; -2496 : douta <= 16'h02C ; -2497 : douta <= 16'h02C ; -2498 : douta <= 16'h02C ; -2499 : douta <= 16'h02C ; -2500 : douta <= 16'h02C ; -2501 : douta <= 16'h02C ; -2502 : douta <= 16'h02C ; -2503 : douta <= 16'h02C ; -2504 : douta <= 16'h02C ; -2505 : douta <= 16'h02C ; -2506 : douta <= 16'h02C ; -2507 : douta <= 16'hCE40 ; -2508 : douta <= 16'h02C ; -2509 : douta <= 16'h02C ; -2510 : douta <= 16'hCE40 ; -2511 : douta <= 16'hCD40 ; -2512 : douta <= 16'hCD40 ; -2513 : douta <= 16'hCD40 ; -2514 : douta <= 16'hCD40 ; -2515 : douta <= 16'hCD40 ; -2516 : douta <= 16'hCD40 ; -2517 : douta <= 16'hCD40 ; -2518 : douta <= 16'hCD40 ; -2519 : douta <= 16'hCD40 ; -2520 : douta <= 16'hCD40 ; -2521 : douta <= 16'hCD40 ; -2522 : douta <= 16'hCC40 ; -2523 : douta <= 16'hCC40 ; -2524 : douta <= 16'hCC40 ; -2525 : douta <= 16'hCD40 ; -2526 : douta <= 16'hCD40 ; -2527 : douta <= 16'hCD40 ; -2528 : douta <= 16'hCD40 ; -2529 : douta <= 16'hCD40 ; -2530 : douta <= 16'hCC40 ; -2531 : douta <= 16'hCB40 ; -2532 : douta <= 16'hCB40 ; -2533 : douta <= 16'hCB40 ; -2534 : douta <= 16'hCB40 ; -2535 : douta <= 16'hCC40 ; -2536 : douta <= 16'hCC40 ; -2537 : douta <= 16'hCC40 ; -2538 : douta <= 16'hCC40 ; -2539 : douta <= 16'hCC40 ; -2540 : douta <= 16'hCC40 ; -2541 : douta <= 16'hCC40 ; -2542 : douta <= 16'hCC40 ; -2543 : douta <= 16'hCC40 ; -2544 : douta <= 16'hCC40 ; -2545 : douta <= 16'hCC40 ; -2546 : douta <= 16'hCC40 ; -2547 : douta <= 16'hCC40 ; -2548 : douta <= 16'hCC40 ; -2549 : douta <= 16'hCC40 ; -2550 : douta <= 16'hCB40 ; -2551 : douta <= 16'hCB40 ; -2552 : douta <= 16'hCB40 ; -2553 : douta <= 16'hCB40 ; -2554 : douta <= 16'hCB40 ; -2555 : douta <= 16'hCB40 ; -2556 : douta <= 16'hCA40 ; -2557 : douta <= 16'hCA40 ; -2558 : douta <= 16'hCA40 ; -2559 : douta <= 16'hCA40 ; -2560 : douta <= 16'hCA40 ; -2561 : douta <= 16'hCA40 ; -2562 : douta <= 16'hCA40 ; -2563 : douta <= 16'hCA40 ; -2564 : douta <= 16'hCA40 ; -2565 : douta <= 16'hCA40 ; -2566 : douta <= 16'hCA40 ; -2567 : douta <= 16'hC940 ; -2568 : douta <= 16'hCA40 ; -2569 : douta <= 16'hCA40 ; -2570 : douta <= 16'hCA40 ; -2571 : douta <= 16'hCA40 ; -2572 : douta <= 16'hCA40 ; -2573 : douta <= 16'hC940 ; -2574 : douta <= 16'hCA40 ; -2575 : douta <= 16'hC940 ; -2576 : douta <= 16'hC940 ; -2577 : douta <= 16'hC940 ; -2578 : douta <= 16'hC940 ; -2579 : douta <= 16'hC940 ; -2580 : douta <= 16'hC940 ; -2581 : douta <= 16'hC940 ; -2582 : douta <= 16'hC940 ; -2583 : douta <= 16'hC940 ; -2584 : douta <= 16'hC940 ; -2585 : douta <= 16'hC940 ; -2586 : douta <= 16'hC940 ; -2587 : douta <= 16'hC940 ; -2588 : douta <= 16'hC940 ; -2589 : douta <= 16'hC840 ; -2590 : douta <= 16'hC940 ; -2591 : douta <= 16'hC940 ; -2592 : douta <= 16'hC840 ; -2593 : douta <= 16'hC840 ; -2594 : douta <= 16'hC940 ; -2595 : douta <= 16'hC940 ; -2596 : douta <= 16'hC940 ; -2597 : douta <= 16'hC940 ; -2598 : douta <= 16'hC840 ; -2599 : douta <= 16'hC840 ; -2600 : douta <= 16'hC840 ; -2601 : douta <= 16'hC840 ; -2602 : douta <= 16'hC840 ; -2603 : douta <= 16'hC840 ; -2604 : douta <= 16'hC840 ; -2605 : douta <= 16'hC840 ; -2606 : douta <= 16'hC840 ; -2607 : douta <= 16'hC840 ; -2608 : douta <= 16'hC740 ; -2609 : douta <= 16'hC740 ; -2610 : douta <= 16'hC740 ; -2611 : douta <= 16'hC840 ; -2612 : douta <= 16'hC840 ; -2613 : douta <= 16'hC840 ; -2614 : douta <= 16'hC840 ; -2615 : douta <= 16'hC840 ; -2616 : douta <= 16'hC840 ; -2617 : douta <= 16'hC640 ; -2618 : douta <= 16'hC640 ; -2619 : douta <= 16'hC640 ; -2620 : douta <= 16'hC640 ; -2621 : douta <= 16'hC640 ; -2622 : douta <= 16'hC640 ; -2623 : douta <= 16'hC640 ; -2624 : douta <= 16'hC640 ; -2625 : douta <= 16'hC640 ; -2626 : douta <= 16'hC640 ; -2627 : douta <= 16'hC640 ; -2628 : douta <= 16'hC540 ; -2629 : douta <= 16'hC540 ; -2630 : douta <= 16'hC640 ; -2631 : douta <= 16'hC640 ; -2632 : douta <= 16'hC640 ; -2633 : douta <= 16'hC640 ; -2634 : douta <= 16'hC640 ; -2635 : douta <= 16'hC540 ; -2636 : douta <= 16'hC640 ; -2637 : douta <= 16'hC640 ; -2638 : douta <= 16'hC540 ; -2639 : douta <= 16'hC540 ; -2640 : douta <= 16'hC540 ; -2641 : douta <= 16'hC540 ; -2642 : douta <= 16'hC540 ; -2643 : douta <= 16'hC540 ; -2644 : douta <= 16'hC540 ; -2645 : douta <= 16'hC540 ; -2646 : douta <= 16'hC540 ; -2647 : douta <= 16'hC540 ; -2648 : douta <= 16'hC540 ; -2649 : douta <= 16'hC540 ; -2650 : douta <= 16'hC540 ; -2651 : douta <= 16'hC540 ; -2652 : douta <= 16'hC440 ; -2653 : douta <= 16'hC440 ; -2654 : douta <= 16'hC440 ; -2655 : douta <= 16'hC540 ; -2656 : douta <= 16'hC540 ; -2657 : douta <= 16'hC540 ; -2658 : douta <= 16'hC540 ; -2659 : douta <= 16'hC540 ; -2660 : douta <= 16'hC540 ; -2661 : douta <= 16'hC440 ; -2662 : douta <= 16'hC440 ; -2663 : douta <= 16'hC440 ; -2664 : douta <= 16'hC440 ; -2665 : douta <= 16'hC440 ; -2666 : douta <= 16'hC440 ; -2667 : douta <= 16'hC440 ; -2668 : douta <= 16'hC340 ; -2669 : douta <= 16'hC340 ; -2670 : douta <= 16'hC340 ; -2671 : douta <= 16'hC440 ; -2672 : douta <= 16'hC440 ; -2673 : douta <= 16'hC440 ; -2674 : douta <= 16'hC440 ; -2675 : douta <= 16'hC440 ; -2676 : douta <= 16'hC440 ; -2677 : douta <= 16'hC440 ; -2678 : douta <= 16'hC440 ; -2679 : douta <= 16'hC440 ; -2680 : douta <= 16'hC340 ; -2681 : douta <= 16'hC340 ; -2682 : douta <= 16'hC340 ; -2683 : douta <= 16'hC340 ; -2684 : douta <= 16'hC340 ; -2685 : douta <= 16'hC340 ; -2686 : douta <= 16'hC340 ; -2687 : douta <= 16'hC340 ; -2688 : douta <= 16'hC240 ; -2689 : douta <= 16'hC240 ; -2690 : douta <= 16'hC240 ; -2691 : douta <= 16'hC240 ; -2692 : douta <= 16'hC240 ; -2693 : douta <= 16'hC240 ; -2694 : douta <= 16'hC240 ; -2695 : douta <= 16'hC240 ; -2696 : douta <= 16'hC140 ; -2697 : douta <= 16'hC240 ; -2698 : douta <= 16'hC240 ; -2699 : douta <= 16'hC240 ; -2700 : douta <= 16'hC240 ; -2701 : douta <= 16'hC240 ; -2702 : douta <= 16'hC240 ; -2703 : douta <= 16'hC240 ; -2704 : douta <= 16'hC240 ; -2705 : douta <= 16'hC140 ; -2706 : douta <= 16'hC240 ; -2707 : douta <= 16'hC140 ; -2708 : douta <= 16'hC140 ; -2709 : douta <= 16'hC140 ; -2710 : douta <= 16'hC140 ; -2711 : douta <= 16'hC140 ; -2712 : douta <= 16'hC140 ; -2713 : douta <= 16'hC140 ; -2714 : douta <= 16'hC140 ; -2715 : douta <= 16'hC140 ; -2716 : douta <= 16'hC140 ; -2717 : douta <= 16'hC140 ; -2718 : douta <= 16'hC140 ; -2719 : douta <= 16'hC140 ; -2720 : douta <= 16'hC140 ; -2721 : douta <= 16'hC140 ; -2722 : douta <= 16'hC140 ; -2723 : douta <= 16'hC040 ; -2724 : douta <= 16'hC040 ; -2725 : douta <= 16'hC040 ; -2726 : douta <= 16'hC140 ; -2727 : douta <= 16'hC140 ; -2728 : douta <= 16'hC140 ; -2729 : douta <= 16'hC140 ; -2730 : douta <= 16'hC040 ; -2731 : douta <= 16'hC040 ; -2732 : douta <= 16'hC040 ; -2733 : douta <= 16'hC040 ; -2734 : douta <= 16'hC040 ; -2735 : douta <= 16'hC040 ; -2736 : douta <= 16'hC040 ; -2737 : douta <= 16'hC040 ; -2738 : douta <= 16'hC040 ; -2739 : douta <= 16'hC040 ; -2740 : douta <= 16'hC040 ; -2741 : douta <= 16'hC040 ; -2742 : douta <= 16'hC040 ; -2743 : douta <= 16'hC040 ; -2744 : douta <= 16'hBF40 ; -2745 : douta <= 16'hC040 ; -2746 : douta <= 16'hC040 ; -2747 : douta <= 16'hC040 ; -2748 : douta <= 16'hC040 ; -2749 : douta <= 16'hC040 ; -2750 : douta <= 16'hC040 ; -2751 : douta <= 16'hC040 ; -2752 : douta <= 16'hC040 ; -2753 : douta <= 16'hC040 ; -2754 : douta <= 16'hBE40 ; -2755 : douta <= 16'hBE40 ; -2756 : douta <= 16'hBE40 ; -2757 : douta <= 16'hBE40 ; -2758 : douta <= 16'hBE40 ; -2759 : douta <= 16'hBE40 ; -2760 : douta <= 16'hBE40 ; -2761 : douta <= 16'hBE40 ; -2762 : douta <= 16'hBE40 ; -2763 : douta <= 16'hBE40 ; -2764 : douta <= 16'hBE40 ; -2765 : douta <= 16'hBE40 ; -2766 : douta <= 16'hBE40 ; -2767 : douta <= 16'hBE40 ; -2768 : douta <= 16'hBD40 ; -2769 : douta <= 16'hBD40 ; -2770 : douta <= 16'hBE40 ; -2771 : douta <= 16'hBE40 ; -2772 : douta <= 16'hBE40 ; -2773 : douta <= 16'hBE40 ; -2774 : douta <= 16'hBE40 ; -2775 : douta <= 16'hBE40 ; -2776 : douta <= 16'hBE40 ; -2777 : douta <= 16'hBE40 ; -2778 : douta <= 16'hBD40 ; -2779 : douta <= 16'hBD40 ; -2780 : douta <= 16'hBD40 ; -2781 : douta <= 16'hBD40 ; -2782 : douta <= 16'hBD40 ; -2783 : douta <= 16'hBD40 ; -2784 : douta <= 16'hBD40 ; -2785 : douta <= 16'hBD40 ; -2786 : douta <= 16'hBD40 ; -2787 : douta <= 16'hBD40 ; -2788 : douta <= 16'hBD40 ; -2789 : douta <= 16'hBD40 ; -2790 : douta <= 16'hBD40 ; -2791 : douta <= 16'hBD40 ; -2792 : douta <= 16'hBC40 ; -2793 : douta <= 16'hBC40 ; -2794 : douta <= 16'hBC40 ; -2795 : douta <= 16'hBD40 ; -2796 : douta <= 16'hBC40 ; -2797 : douta <= 16'hBC40 ; -2798 : douta <= 16'hBC40 ; -2799 : douta <= 16'hBC40 ; -2800 : douta <= 16'hBB40 ; -2801 : douta <= 16'hBC40 ; -2802 : douta <= 16'hBB40 ; -2803 : douta <= 16'hBC40 ; -2804 : douta <= 16'hBC40 ; -2805 : douta <= 16'hBC40 ; -2806 : douta <= 16'hBC40 ; -2807 : douta <= 16'hBC40 ; -2808 : douta <= 16'hBC40 ; -2809 : douta <= 16'hBC40 ; -2810 : douta <= 16'hBC40 ; -2811 : douta <= 16'hBC40 ; -2812 : douta <= 16'hBC40 ; -2813 : douta <= 16'hBC40 ; -2814 : douta <= 16'hBC40 ; -2815 : douta <= 16'hBC40 ; -2816 : douta <= 16'hBC40 ; -2817 : douta <= 16'hBC40 ; -2818 : douta <= 16'hBC40 ; -2819 : douta <= 16'hBC40 ; -2820 : douta <= 16'hBB40 ; -2821 : douta <= 16'hBA40 ; -2822 : douta <= 16'hBA40 ; -2823 : douta <= 16'hBA40 ; -2824 : douta <= 16'hBA40 ; -2825 : douta <= 16'hBA40 ; -2826 : douta <= 16'hBA40 ; -2827 : douta <= 16'hBA40 ; -2828 : douta <= 16'hBA40 ; -2829 : douta <= 16'hBA40 ; -2830 : douta <= 16'hBA40 ; -2831 : douta <= 16'hBA40 ; -2832 : douta <= 16'hBA40 ; -2833 : douta <= 16'hBA40 ; -2834 : douta <= 16'hBA40 ; -2835 : douta <= 16'hB940 ; -2836 : douta <= 16'hB940 ; -2837 : douta <= 16'hBA40 ; -2838 : douta <= 16'hBA40 ; -2839 : douta <= 16'hBA40 ; -2840 : douta <= 16'hBA40 ; -2841 : douta <= 16'hB940 ; -2842 : douta <= 16'hB940 ; -2843 : douta <= 16'hB940 ; -2844 : douta <= 16'hB940 ; -2845 : douta <= 16'hB940 ; -2846 : douta <= 16'hB940 ; -2847 : douta <= 16'hB940 ; -2848 : douta <= 16'hB940 ; -2849 : douta <= 16'hB940 ; -2850 : douta <= 16'hB940 ; -2851 : douta <= 16'hB940 ; -2852 : douta <= 16'hB940 ; -2853 : douta <= 16'hB940 ; -2854 : douta <= 16'hB940 ; -2855 : douta <= 16'hB940 ; -2856 : douta <= 16'hB940 ; -2857 : douta <= 16'hB940 ; -2858 : douta <= 16'hB840 ; -2859 : douta <= 16'hB940 ; -2860 : douta <= 16'hB840 ; -2861 : douta <= 16'hB840 ; -2862 : douta <= 16'hB840 ; -2863 : douta <= 16'hB840 ; -2864 : douta <= 16'hB840 ; -2865 : douta <= 16'hB840 ; -2866 : douta <= 16'hB740 ; -2867 : douta <= 16'hB740 ; -2868 : douta <= 16'hB740 ; -2869 : douta <= 16'hB740 ; -2870 : douta <= 16'hB740 ; -2871 : douta <= 16'hB740 ; -2872 : douta <= 16'hB840 ; -2873 : douta <= 16'hB840 ; -2874 : douta <= 16'hB840 ; -2875 : douta <= 16'hB840 ; -2876 : douta <= 16'hB840 ; -2877 : douta <= 16'hB840 ; -2878 : douta <= 16'hB840 ; -2879 : douta <= 16'hB840 ; -2880 : douta <= 16'hB840 ; -2881 : douta <= 16'hB840 ; -2882 : douta <= 16'hB840 ; -2883 : douta <= 16'hB840 ; -2884 : douta <= 16'hB840 ; -2885 : douta <= 16'hB840 ; -2886 : douta <= 16'hB640 ; -2887 : douta <= 16'hB640 ; -2888 : douta <= 16'hB640 ; -2889 : douta <= 16'hB640 ; -2890 : douta <= 16'hB640 ; -2891 : douta <= 16'hB640 ; -2892 : douta <= 16'hB640 ; -2893 : douta <= 16'hB640 ; -2894 : douta <= 16'hB640 ; -2895 : douta <= 16'hB640 ; -2896 : douta <= 16'hB640 ; -2897 : douta <= 16'hB640 ; -2898 : douta <= 16'hB640 ; -2899 : douta <= 16'hB640 ; -2900 : douta <= 16'hB540 ; -2901 : douta <= 16'hB540 ; -2902 : douta <= 16'hB540 ; -2903 : douta <= 16'hB640 ; -2904 : douta <= 16'hB540 ; -2905 : douta <= 16'hB640 ; -2906 : douta <= 16'hB640 ; -2907 : douta <= 16'hB640 ; -2908 : douta <= 16'hB640 ; -2909 : douta <= 16'hB540 ; -2910 : douta <= 16'hB640 ; -2911 : douta <= 16'hB540 ; -2912 : douta <= 16'hB540 ; -2913 : douta <= 16'hB540 ; -2914 : douta <= 16'hB540 ; -2915 : douta <= 16'hB540 ; -2916 : douta <= 16'hB540 ; -2917 : douta <= 16'hB540 ; -2918 : douta <= 16'hB540 ; -2919 : douta <= 16'hB540 ; -2920 : douta <= 16'hB540 ; -2921 : douta <= 16'hB540 ; -2922 : douta <= 16'hB540 ; -2923 : douta <= 16'hB540 ; -2924 : douta <= 16'hB540 ; -2925 : douta <= 16'hB540 ; -2926 : douta <= 16'hB440 ; -2927 : douta <= 16'hB440 ; -2928 : douta <= 16'hB540 ; -2929 : douta <= 16'hB540 ; -2930 : douta <= 16'hB440 ; -2931 : douta <= 16'hB440 ; -2932 : douta <= 16'hB440 ; -2933 : douta <= 16'hB440 ; -2934 : douta <= 16'hB440 ; -2935 : douta <= 16'hB440 ; -2936 : douta <= 16'hB440 ; -2937 : douta <= 16'hB340 ; -2938 : douta <= 16'hB340 ; -2939 : douta <= 16'hB440 ; -2940 : douta <= 16'hB340 ; -2941 : douta <= 16'hB440 ; -2942 : douta <= 16'hB440 ; -2943 : douta <= 16'hB440 ; -2944 : douta <= 16'hB440 ; -2945 : douta <= 16'hB440 ; -2946 : douta <= 16'hB440 ; -2947 : douta <= 16'hB440 ; -2948 : douta <= 16'hB440 ; -2949 : douta <= 16'hB440 ; -2950 : douta <= 16'hB440 ; -2951 : douta <= 16'hB440 ; -2952 : douta <= 16'hB440 ; -2953 : douta <= 16'hB440 ; -2954 : douta <= 16'hB340 ; -2955 : douta <= 16'hB240 ; -2956 : douta <= 16'hB240 ; -2957 : douta <= 16'hB240 ; -2958 : douta <= 16'hB240 ; -2959 : douta <= 16'hB240 ; -2960 : douta <= 16'hB240 ; -2961 : douta <= 16'hB240 ; -2962 : douta <= 16'hB240 ; -2963 : douta <= 16'hB240 ; -2964 : douta <= 16'hB240 ; -2965 : douta <= 16'hB240 ; -2966 : douta <= 16'hB240 ; -2967 : douta <= 16'hB240 ; -2968 : douta <= 16'hB240 ; -2969 : douta <= 16'hB240 ; -2970 : douta <= 16'hB140 ; -2971 : douta <= 16'hB140 ; -2972 : douta <= 16'hB140 ; -2973 : douta <= 16'hB140 ; -2974 : douta <= 16'hB140 ; -2975 : douta <= 16'hB240 ; -2976 : douta <= 16'hB240 ; -2977 : douta <= 16'hB240 ; -2978 : douta <= 16'hB240 ; -2979 : douta <= 16'hB140 ; -2980 : douta <= 16'hB140 ; -2981 : douta <= 16'hB140 ; -2982 : douta <= 16'hB140 ; -2983 : douta <= 16'hB140 ; -2984 : douta <= 16'hB140 ; -2985 : douta <= 16'hB140 ; -2986 : douta <= 16'hB140 ; -2987 : douta <= 16'hB140 ; -2988 : douta <= 16'hB140 ; -2989 : douta <= 16'hB140 ; -2990 : douta <= 16'hB140 ; -2991 : douta <= 16'hB140 ; -2992 : douta <= 16'hB140 ; -2993 : douta <= 16'hB140 ; -2994 : douta <= 16'hB040 ; -2995 : douta <= 16'hB040 ; -2996 : douta <= 16'hB140 ; -2997 : douta <= 16'hB140 ; -2998 : douta <= 16'hB040 ; -2999 : douta <= 16'hB040 ; -3000 : douta <= 16'hB040 ; -3001 : douta <= 16'hB040 ; -3002 : douta <= 16'hB040 ; -3003 : douta <= 16'hB040 ; -3004 : douta <= 16'hB040 ; -3005 : douta <= 16'hB040 ; -3006 : douta <= 16'hB040 ; -3007 : douta <= 16'hB040 ; -3008 : douta <= 16'hB040 ; -3009 : douta <= 16'hB040 ; -3010 : douta <= 16'hB040 ; -3011 : douta <= 16'hB040 ; -3012 : douta <= 16'hB040 ; -3013 : douta <= 16'hB040 ; -3014 : douta <= 16'hB040 ; -3015 : douta <= 16'hB040 ; -3016 : douta <= 16'hB040 ; -3017 : douta <= 16'hB040 ; -3018 : douta <= 16'hB040 ; -3019 : douta <= 16'hB040 ; -3020 : douta <= 16'hB040 ; -3021 : douta <= 16'hB040 ; -3022 : douta <= 16'hB040 ; -3023 : douta <= 16'hB040 ; -3024 : douta <= 16'hB040 ; -3025 : douta <= 16'hAE40 ; -3026 : douta <= 16'hAE40 ; -3027 : douta <= 16'hAE40 ; -3028 : douta <= 16'hAE40 ; -3029 : douta <= 16'hAE40 ; -3030 : douta <= 16'hAE40 ; -3031 : douta <= 16'hAE40 ; -3032 : douta <= 16'hAE40 ; -3033 : douta <= 16'hAE40 ; -3034 : douta <= 16'hAE40 ; -3035 : douta <= 16'hAE40 ; -3036 : douta <= 16'hAD40 ; -3037 : douta <= 16'hAD40 ; -3038 : douta <= 16'hAD40 ; -3039 : douta <= 16'hAE40 ; -3040 : douta <= 16'hAE40 ; -3041 : douta <= 16'hAE40 ; -3042 : douta <= 16'hAE40 ; -3043 : douta <= 16'hAD40 ; -3044 : douta <= 16'hAE40 ; -3045 : douta <= 16'hAD40 ; -3046 : douta <= 16'hAD40 ; -3047 : douta <= 16'hAD40 ; -3048 : douta <= 16'hAD40 ; -3049 : douta <= 16'hAD40 ; -3050 : douta <= 16'hAD40 ; -3051 : douta <= 16'hAD40 ; -3052 : douta <= 16'hAD40 ; -3053 : douta <= 16'hAD40 ; -3054 : douta <= 16'hAD40 ; -3055 : douta <= 16'hAD40 ; -3056 : douta <= 16'hAD40 ; -3057 : douta <= 16'hAD40 ; -3058 : douta <= 16'hAD40 ; -3059 : douta <= 16'hAD40 ; -3060 : douta <= 16'hAC40 ; -3061 : douta <= 16'hAC40 ; -3062 : douta <= 16'hAC40 ; -3063 : douta <= 16'hAD40 ; -3064 : douta <= 16'hAC40 ; -3065 : douta <= 16'hAC40 ; -3066 : douta <= 16'hAC40 ; -3067 : douta <= 16'hAC40 ; -3068 : douta <= 16'hAC40 ; -3069 : douta <= 16'hAB40 ; -3070 : douta <= 16'hAB40 ; -3071 : douta <= 16'hAB40 ; -3072 : douta <= 16'hAB40 ; -3073 : douta <= 16'hAC40 ; -3074 : douta <= 16'hAB40 ; -3075 : douta <= 16'hAC40 ; -3076 : douta <= 16'hAC40 ; -3077 : douta <= 16'hAC40 ; -3078 : douta <= 16'hAC40 ; -3079 : douta <= 16'hAC40 ; -3080 : douta <= 16'hAC40 ; -3081 : douta <= 16'hAC40 ; -3082 : douta <= 16'hAC40 ; -3083 : douta <= 16'hAC40 ; -3084 : douta <= 16'hAC40 ; -3085 : douta <= 16'hAC40 ; -3086 : douta <= 16'hAC40 ; -3087 : douta <= 16'hAC40 ; -3088 : douta <= 16'hAC40 ; -3089 : douta <= 16'hAC40 ; -3090 : douta <= 16'hAA40 ; -3091 : douta <= 16'hAA40 ; -3092 : douta <= 16'hAA40 ; -3093 : douta <= 16'hAA40 ; -3094 : douta <= 16'hAA40 ; -3095 : douta <= 16'hAA40 ; -3096 : douta <= 16'hAA40 ; -3097 : douta <= 16'hAA40 ; -3098 : douta <= 16'hAA40 ; -3099 : douta <= 16'hAA40 ; -3100 : douta <= 16'hAA40 ; -3101 : douta <= 16'hAA40 ; -3102 : douta <= 16'hAA40 ; -3103 : douta <= 16'hAA40 ; -3104 : douta <= 16'hAA40 ; -3105 : douta <= 16'hAA40 ; -3106 : douta <= 16'hA940 ; -3107 : douta <= 16'hA940 ; -3108 : douta <= 16'hA940 ; -3109 : douta <= 16'hAA40 ; -3110 : douta <= 16'hAA40 ; -3111 : douta <= 16'hAA40 ; -3112 : douta <= 16'hA940 ; -3113 : douta <= 16'hA940 ; -3114 : douta <= 16'hA940 ; -3115 : douta <= 16'hA940 ; -3116 : douta <= 16'hA940 ; -3117 : douta <= 16'hA940 ; -3118 : douta <= 16'hA940 ; -3119 : douta <= 16'hA940 ; -3120 : douta <= 16'hA940 ; -3121 : douta <= 16'hA940 ; -3122 : douta <= 16'hA940 ; -3123 : douta <= 16'hA940 ; -3124 : douta <= 16'hA940 ; -3125 : douta <= 16'hA940 ; -3126 : douta <= 16'hA940 ; -3127 : douta <= 16'hA940 ; -3128 : douta <= 16'hA840 ; -3129 : douta <= 16'hA940 ; -3130 : douta <= 16'hA840 ; -3131 : douta <= 16'hA940 ; -3132 : douta <= 16'hA840 ; -3133 : douta <= 16'hA840 ; -3134 : douta <= 16'hA840 ; -3135 : douta <= 16'hA840 ; -3136 : douta <= 16'hA840 ; -3137 : douta <= 16'hA840 ; -3138 : douta <= 16'hA840 ; -3139 : douta <= 16'hA840 ; -3140 : douta <= 16'hA840 ; -3141 : douta <= 16'hA840 ; -3142 : douta <= 16'hA840 ; -3143 : douta <= 16'hA840 ; -3144 : douta <= 16'hA840 ; -3145 : douta <= 16'hA840 ; -3146 : douta <= 16'hA840 ; -3147 : douta <= 16'hA840 ; -3148 : douta <= 16'hA840 ; -3149 : douta <= 16'hA840 ; -3150 : douta <= 16'hA840 ; -3151 : douta <= 16'hA840 ; -3152 : douta <= 16'hA840 ; -3153 : douta <= 16'hA840 ; -3154 : douta <= 16'hA840 ; -3155 : douta <= 16'hA840 ; -3156 : douta <= 16'hA840 ; -3157 : douta <= 16'hA640 ; -3158 : douta <= 16'hA840 ; -3159 : douta <= 16'hA840 ; -3160 : douta <= 16'hA640 ; -3161 : douta <= 16'hA640 ; -3162 : douta <= 16'hA640 ; -3163 : douta <= 16'hA640 ; -3164 : douta <= 16'hA640 ; -3165 : douta <= 16'hA640 ; -3166 : douta <= 16'hA640 ; -3167 : douta <= 16'hA640 ; -3168 : douta <= 16'hA640 ; -3169 : douta <= 16'hA640 ; -3170 : douta <= 16'hA640 ; -3171 : douta <= 16'hA640 ; -3172 : douta <= 16'hA640 ; -3173 : douta <= 16'hA640 ; -3174 : douta <= 16'hA640 ; -3175 : douta <= 16'hA640 ; -3176 : douta <= 16'hA540 ; -3177 : douta <= 16'hA640 ; -3178 : douta <= 16'hA640 ; -3179 : douta <= 16'hA640 ; -3180 : douta <= 16'hA640 ; -3181 : douta <= 16'hA640 ; -3182 : douta <= 16'hA640 ; -3183 : douta <= 16'hA540 ; -3184 : douta <= 16'hA540 ; -3185 : douta <= 16'hA540 ; -3186 : douta <= 16'hA540 ; -3187 : douta <= 16'hA540 ; -3188 : douta <= 16'hA540 ; -3189 : douta <= 16'hA540 ; -3190 : douta <= 16'hA540 ; -3191 : douta <= 16'hA540 ; -3192 : douta <= 16'hA540 ; -3193 : douta <= 16'hA540 ; -3194 : douta <= 16'hA540 ; -3195 : douta <= 16'hA540 ; -3196 : douta <= 16'hA540 ; -3197 : douta <= 16'hA540 ; -3198 : douta <= 16'hA440 ; -3199 : douta <= 16'hA440 ; -3200 : douta <= 16'hA440 ; -3201 : douta <= 16'hA440 ; -3202 : douta <= 16'hA440 ; -3203 : douta <= 16'hA540 ; -3204 : douta <= 16'hA540 ; -3205 : douta <= 16'hA540 ; -3206 : douta <= 16'hA440 ; -3207 : douta <= 16'hA440 ; -3208 : douta <= 16'hA440 ; -3209 : douta <= 16'hA340 ; -3210 : douta <= 16'hA340 ; -3211 : douta <= 16'hA340 ; -3212 : douta <= 16'hA440 ; -3213 : douta <= 16'hA440 ; -3214 : douta <= 16'hA440 ; -3215 : douta <= 16'hA440 ; -3216 : douta <= 16'hA440 ; -3217 : douta <= 16'hA440 ; -3218 : douta <= 16'hA440 ; -3219 : douta <= 16'hA440 ; -3220 : douta <= 16'hA440 ; -3221 : douta <= 16'hA440 ; -3222 : douta <= 16'hA440 ; -3223 : douta <= 16'hA440 ; -3224 : douta <= 16'hA440 ; -3225 : douta <= 16'hA440 ; -3226 : douta <= 16'hA440 ; -3227 : douta <= 16'hA240 ; -3228 : douta <= 16'hA240 ; -3229 : douta <= 16'hA240 ; -3230 : douta <= 16'hA240 ; -3231 : douta <= 16'hA240 ; -3232 : douta <= 16'hA240 ; -3233 : douta <= 16'hA240 ; -3234 : douta <= 16'hA240 ; -3235 : douta <= 16'hA240 ; -3236 : douta <= 16'hA240 ; -3237 : douta <= 16'hA240 ; -3238 : douta <= 16'hA240 ; -3239 : douta <= 16'hA240 ; -3240 : douta <= 16'hA240 ; -3241 : douta <= 16'hA240 ; -3242 : douta <= 16'hA140 ; -3243 : douta <= 16'hA140 ; -3244 : douta <= 16'hA140 ; -3245 : douta <= 16'hA240 ; -3246 : douta <= 16'hA240 ; -3247 : douta <= 16'hA240 ; -3248 : douta <= 16'hA240 ; -3249 : douta <= 16'hA140 ; -3250 : douta <= 16'hA140 ; -3251 : douta <= 16'hA140 ; -3252 : douta <= 16'hA140 ; -3253 : douta <= 16'hA140 ; -3254 : douta <= 16'hA140 ; -3255 : douta <= 16'hA140 ; -3256 : douta <= 16'hA140 ; -3257 : douta <= 16'hA140 ; -3258 : douta <= 16'hA140 ; -3259 : douta <= 16'hA140 ; -3260 : douta <= 16'hA140 ; -3261 : douta <= 16'hA140 ; -3262 : douta <= 16'hA140 ; -3263 : douta <= 16'hA140 ; -3264 : douta <= 16'hA140 ; -3265 : douta <= 16'hA140 ; -3266 : douta <= 16'hA040 ; -3267 : douta <= 16'hA040 ; -3268 : douta <= 16'hA040 ; -3269 : douta <= 16'hA140 ; -3270 : douta <= 16'hA040 ; -3271 : douta <= 16'hA040 ; -3272 : douta <= 16'hA040 ; -3273 : douta <= 16'hA040 ; -3274 : douta <= 16'hA040 ; -3275 : douta <= 16'hA040 ; -3276 : douta <= 16'hA040 ; -3277 : douta <= 16'hA040 ; -3278 : douta <= 16'hA040 ; -3279 : douta <= 16'hA040 ; -3280 : douta <= 16'hA040 ; -3281 : douta <= 16'hA040 ; -3282 : douta <= 16'hA040 ; -3283 : douta <= 16'hA040 ; -3284 : douta <= 16'hA040 ; -3285 : douta <= 16'hA040 ; -3286 : douta <= 16'hA040 ; -3287 : douta <= 16'hA040 ; -3288 : douta <= 16'hA040 ; -3289 : douta <= 16'hA040 ; -3290 : douta <= 16'hA040 ; -3291 : douta <= 16'hA040 ; -3292 : douta <= 16'h9E42 ; -3293 : douta <= 16'hA040 ; -3294 : douta <= 16'hA040 ; -3295 : douta <= 16'hA040 ; -3296 : douta <= 16'hA040 ; -3297 : douta <= 16'hA040 ; -3298 : douta <= 16'hA040 ; -3299 : douta <= 16'hA040 ; -3300 : douta <= 16'hA040 ; -3301 : douta <= 16'hA040 ; -3302 : douta <= 16'h9F42 ; -3303 : douta <= 16'hA040 ; -3304 : douta <= 16'hA040 ; -3305 : douta <= 16'hA040 ; -3306 : douta <= 16'hA040 ; -3307 : douta <= 16'hA040 ; -3308 : douta <= 16'hA040 ; -3309 : douta <= 16'hA040 ; -3310 : douta <= 16'hA040 ; -3311 : douta <= 16'hA040 ; -3312 : douta <= 16'hA040 ; -3313 : douta <= 16'hA040 ; -3314 : douta <= 16'hA040 ; -3315 : douta <= 16'hA040 ; -3316 : douta <= 16'hA040 ; -3317 : douta <= 16'hA040 ; -3318 : douta <= 16'h9F42 ; -3319 : douta <= 16'hA040 ; -3320 : douta <= 16'hA040 ; -3321 : douta <= 16'hA040 ; -3322 : douta <= 16'hA040 ; -3323 : douta <= 16'hA040 ; -3324 : douta <= 16'h9E42 ; -3325 : douta <= 16'h9E42 ; -3326 : douta <= 16'h9E42 ; -3327 : douta <= 16'h9E42 ; -3328 : douta <= 16'h9E42 ; -3329 : douta <= 16'h9E42 ; -3330 : douta <= 16'h9E42 ; -3331 : douta <= 16'h9E42 ; -3332 : douta <= 16'h9E42 ; -3333 : douta <= 16'h9E42 ; -3334 : douta <= 16'h9E42 ; -3335 : douta <= 16'h9E42 ; -3336 : douta <= 16'h9E42 ; -3337 : douta <= 16'h9E42 ; -3338 : douta <= 16'h9E42 ; -3339 : douta <= 16'h9E42 ; -3340 : douta <= 16'h9E42 ; -3341 : douta <= 16'h9D42 ; -3342 : douta <= 16'h9E42 ; -3343 : douta <= 16'h9E42 ; -3344 : douta <= 16'h9E42 ; -3345 : douta <= 16'h9E42 ; -3346 : douta <= 16'h9E42 ; -3347 : douta <= 16'h9D42 ; -3348 : douta <= 16'h9D42 ; -3349 : douta <= 16'h9D42 ; -3350 : douta <= 16'h9D42 ; -3351 : douta <= 16'h9D42 ; -3352 : douta <= 16'h9D42 ; -3353 : douta <= 16'h9D42 ; -3354 : douta <= 16'h9D42 ; -3355 : douta <= 16'h9D42 ; -3356 : douta <= 16'h9D42 ; -3357 : douta <= 16'h9D42 ; -3358 : douta <= 16'h9D42 ; -3359 : douta <= 16'h9D42 ; -3360 : douta <= 16'h9D42 ; -3361 : douta <= 16'h9D42 ; -3362 : douta <= 16'h9D42 ; -3363 : douta <= 16'h9C42 ; -3364 : douta <= 16'h9C42 ; -3365 : douta <= 16'h9D42 ; -3366 : douta <= 16'h9C42 ; -3367 : douta <= 16'h9C42 ; -3368 : douta <= 16'h9C42 ; -3369 : douta <= 16'h9C42 ; -3370 : douta <= 16'h9C42 ; -3371 : douta <= 16'h9C42 ; -3372 : douta <= 16'h9C42 ; -3373 : douta <= 16'h9C42 ; -3374 : douta <= 16'h9C42 ; -3375 : douta <= 16'h9C42 ; -3376 : douta <= 16'h9C42 ; -3377 : douta <= 16'h9C42 ; -3378 : douta <= 16'h9C42 ; -3379 : douta <= 16'h9C42 ; -3380 : douta <= 16'h9B42 ; -3381 : douta <= 16'h9B42 ; -3382 : douta <= 16'h9C42 ; -3383 : douta <= 16'h9C42 ; -3384 : douta <= 16'h9C42 ; -3385 : douta <= 16'h9C42 ; -3386 : douta <= 16'h9C42 ; -3387 : douta <= 16'h9C42 ; -3388 : douta <= 16'h9C42 ; -3389 : douta <= 16'h9C42 ; -3390 : douta <= 16'h9C42 ; -3391 : douta <= 16'h9C42 ; -3392 : douta <= 16'h9C42 ; -3393 : douta <= 16'h9B42 ; -3394 : douta <= 16'h9B42 ; -3395 : douta <= 16'h9B42 ; -3396 : douta <= 16'h9B42 ; -3397 : douta <= 16'h9B42 ; -3398 : douta <= 16'h9A42 ; -3399 : douta <= 16'h9A42 ; -3400 : douta <= 16'h9A42 ; -3401 : douta <= 16'h9A42 ; -3402 : douta <= 16'h9A42 ; -3403 : douta <= 16'h9A42 ; -3404 : douta <= 16'h9A42 ; -3405 : douta <= 16'h9A42 ; -3406 : douta <= 16'h9A42 ; -3407 : douta <= 16'h9A42 ; -3408 : douta <= 16'h9A42 ; -3409 : douta <= 16'h9942 ; -3410 : douta <= 16'h9A42 ; -3411 : douta <= 16'h9A42 ; -3412 : douta <= 16'h9A42 ; -3413 : douta <= 16'h9A42 ; -3414 : douta <= 16'h9A42 ; -3415 : douta <= 16'h9A42 ; -3416 : douta <= 16'h9A42 ; -3417 : douta <= 16'h9A42 ; -3418 : douta <= 16'h9A42 ; -3419 : douta <= 16'h9A42 ; -3420 : douta <= 16'h9942 ; -3421 : douta <= 16'h9942 ; -3422 : douta <= 16'h9942 ; -3423 : douta <= 16'h9942 ; -3424 : douta <= 16'h9942 ; -3425 : douta <= 16'h9942 ; -3426 : douta <= 16'h9942 ; -3427 : douta <= 16'h9942 ; -3428 : douta <= 16'h9942 ; -3429 : douta <= 16'h9942 ; -3430 : douta <= 16'h9942 ; -3431 : douta <= 16'h9942 ; -3432 : douta <= 16'h9942 ; -3433 : douta <= 16'h9942 ; -3434 : douta <= 16'h9942 ; -3435 : douta <= 16'h9942 ; -3436 : douta <= 16'h9942 ; -3437 : douta <= 16'h9942 ; -3438 : douta <= 16'h9942 ; -3439 : douta <= 16'h9842 ; -3440 : douta <= 16'h9842 ; -3441 : douta <= 16'h9942 ; -3442 : douta <= 16'h9842 ; -3443 : douta <= 16'h9842 ; -3444 : douta <= 16'h9842 ; -3445 : douta <= 16'h9842 ; -3446 : douta <= 16'h9842 ; -3447 : douta <= 16'h9842 ; -3448 : douta <= 16'h9842 ; -3449 : douta <= 16'h9842 ; -3450 : douta <= 16'h9842 ; -3451 : douta <= 16'h9842 ; -3452 : douta <= 16'h9842 ; -3453 : douta <= 16'h9842 ; -3454 : douta <= 16'h9842 ; -3455 : douta <= 16'h9842 ; -3456 : douta <= 16'h9842 ; -3457 : douta <= 16'h9842 ; -3458 : douta <= 16'h9842 ; -3459 : douta <= 16'h9742 ; -3460 : douta <= 16'h9742 ; -3461 : douta <= 16'h9842 ; -3462 : douta <= 16'h9842 ; -3463 : douta <= 16'h9842 ; -3464 : douta <= 16'h9842 ; -3465 : douta <= 16'h9842 ; -3466 : douta <= 16'h9842 ; -3467 : douta <= 16'h9842 ; -3468 : douta <= 16'h9642 ; -3469 : douta <= 16'h9642 ; -3470 : douta <= 16'h9642 ; -3471 : douta <= 16'h9642 ; -3472 : douta <= 16'h9642 ; -3473 : douta <= 16'h9642 ; -3474 : douta <= 16'h9642 ; -3475 : douta <= 16'h9642 ; -3476 : douta <= 16'h9642 ; -3477 : douta <= 16'h9642 ; -3478 : douta <= 16'h9642 ; -3479 : douta <= 16'h9642 ; -3480 : douta <= 16'h9642 ; -3481 : douta <= 16'h9642 ; -3482 : douta <= 16'h9642 ; -3483 : douta <= 16'h9642 ; -3484 : douta <= 16'h9542 ; -3485 : douta <= 16'h9542 ; -3486 : douta <= 16'h9542 ; -3487 : douta <= 16'h9642 ; -3488 : douta <= 16'h9642 ; -3489 : douta <= 16'h9642 ; -3490 : douta <= 16'h9642 ; -3491 : douta <= 16'h9642 ; -3492 : douta <= 16'h9642 ; -3493 : douta <= 16'h9542 ; -3494 : douta <= 16'h9542 ; -3495 : douta <= 16'h9542 ; -3496 : douta <= 16'h9542 ; -3497 : douta <= 16'h9542 ; -3498 : douta <= 16'h9542 ; -3499 : douta <= 16'h9542 ; -3500 : douta <= 16'h9542 ; - - - -default:douta<=16'h9542; -endcase - -end - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -endmodule diff --git a/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/sources_1/new/ant_rf/Sisyif_src/ds18b20_temp.v b/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/sources_1/new/ant_rf/Sisyif_src/ds18b20_temp.v deleted file mode 100644 index 8c44794..0000000 --- a/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/sources_1/new/ant_rf/Sisyif_src/ds18b20_temp.v +++ /dev/null @@ -1,368 +0,0 @@ -`timescale 1ns / 1ps -////////////////////////////////////////////////////////////////////////////////// -// Company: -// Engineer: -// -// Create Date: 13:59:21 10/19/2020 -// Design Name: -// Module Name: DS18B20 -// Project Name: -// Target Devices: -// Tool versions: -// Description: - -//+125 0000 0111 1101 0000 07D0h -//+85* 0000 0101 0101 0000 0550h -//+25.0625 0000 0001 1001 0001 0191h -//+10.125 0000 0000 1010 0010 00A2h -//+0.5 0000 0000 0000 1000 0008h -//0 0000 0000 0000 0000 0000h -//-0.5 1111 1111 1111 1000 FFF8h -//-10.125 1111 1111 0101 1110 FF5Eh -//-25.0625 1111 1110 0110 1111 FE6Fh -//-55 1111 1100 1001 0000 FC90h -////////////////////////////////////////////////////////////////////////////////// -module ds18b20_temp( - input clk , //40_000_000 - input rstn , - inout dq , - output reg signed[15:0] temp_data //LSB =0.625 C -); - -parameter FRE = 40 ;// //clk为40M时钟，若clk为50M，则 FRE=50ï¼› - -parameter INIT = 3'b000 , //Gray code - WR_CMD = 3'b001 , - WAIT = 3'b011 , - INIT_AGAIN = 3'b010 , - RD_CMD = 3'b110 , - RD_TEMP = 3'b111 ; - -localparam WR_CC_44 = 16'h44cc ; -localparam WR_CC_BE = 16'hbecc ; -localparam cnt_max = FRE[31:1]-1 ; -localparam WAIT_TEMP_CNT = 20'd750_000 ;//750ms - -reg flag ; -reg [15:0] data_reg ; -reg [2:0] state ; -reg clk_1us ; -reg [31:0] cnt_1us ; -reg dq_en ; -reg dq_reg ; -reg [19:0] cnt ; -reg [3:0] bit_cnt ; - -assign dq = dq_en ? dq_reg : 1'bz; - -always@(posedge clk,negedge rstn) - if(!rstn) - cnt_1us<=32'b0; - else if(cnt_1us==cnt_max) - cnt_1us<=32'b0; - else - cnt_1us<=cnt_1us+1'b1; - -always@(posedge clk,negedge rstn) - if(!rstn) - clk_1us<=1'b0; - else if(cnt_1us==cnt_max) - clk_1us<=~clk_1us; - else - clk_1us<=clk_1us; - -always@(posedge clk_1us,negedge rstn) - if(!rstn) - begin - dq_en <=1'b1; - dq_reg <=1'b0; - state <=INIT; - cnt <=20'd0; - flag <=1'b0; - bit_cnt <=4'b0; - data_reg <=16'd0; - temp_data<=12'b0; - end - else case(state) - INIT :begin - //if(cnt==16'd999)begin //for sim - if(cnt==16'd9999) - cnt <=20'd0; - else if(cnt==16'd999&&flag)begin - cnt <=20'd0; - state<=WR_CMD; - end - else begin - cnt <=cnt+1'd1; - state<=INIT; - end - //------------------ - if(cnt==16'd9999)begin - dq_en <=1'b1; - dq_reg<=1'b0; - end - //else if(cnt==16'd499)begin - else if(cnt==16'd599)begin - dq_en <=1'b0; - dq_reg<=1'b0; - end - else begin - dq_en <=dq_en; - dq_reg<=dq_reg; - end - //------------------ - // if(cnt==20'd570)//&&dq==1'b0) - if(cnt==20'd670)//&&dq==1'b0) - flag<= ~dq; - else if(cnt==20'd999) - flag<=1'b0; - else - flag<=flag; - end - /* INIT :begin - //if(cnt==16'd999)begin //for sim - if(cnt==16'd999&&flag)begin - cnt <=20'd0; - state<=WR_CMD; - end - else begin - cnt <=cnt+1'd1; - state<=INIT; - end - //------------------ - if(cnt==16'd499)begin - dq_en <=1'b0; - dq_reg<=1'b0; - end - else begin - dq_en <=dq_en; - dq_reg<=dq_reg; - end - //------------------ - if(cnt==20'd570)//&&dq==1'b0) - flag<= ~dq; - else if(cnt==20'd999) - flag<=1'b0; - else - flag<=flag; - end */ - WR_CMD :begin - if(cnt==20'd64 && bit_cnt==4'd15) - begin - bit_cnt<=4'd0; - state<=WAIT; - end - else if(cnt==20'd64) - begin - bit_cnt<=bit_cnt+1'd1; - state<=WR_CMD; - end - else - begin - bit_cnt<=bit_cnt; - state<=WR_CMD; - end - //------------------ - if(cnt==20'd64 && bit_cnt==4'd15) - cnt<=20'd0; - else if(cnt==20'd64) - cnt<=20'd0; - else - cnt<=cnt+1'd1; - //------------------ - if(WR_CC_44[bit_cnt]==1'b0 && cnt<=20'd62) - begin - dq_en <=1'b1; - dq_reg<=1'b0; - end - else if(WR_CC_44[bit_cnt]==1'b1 && cnt<=20'd1) - begin - dq_en <=1'b1; - dq_reg<=1'b0; - end - else - begin - dq_en <=1'b0; - dq_reg<=1'b0; - end - end - WAIT : if(cnt==WAIT_TEMP_CNT) - begin - dq_en <=1'b1; - dq_reg<=1'b0; - cnt<=20'd0; - state<=INIT_AGAIN; - end - else - begin - dq_en <=1'b1; - dq_reg<=1'b1; - cnt<=cnt+1'd1; - state<=WAIT; - end - INIT_AGAIN :begin - if(cnt==16'd999&&flag) - //if(cnt==16'd999) //for sim - begin - cnt <=20'd0; - state<=RD_CMD; - end - else - begin - cnt <=cnt+1'd1; - state<=INIT_AGAIN; - end - //------------------ - if(cnt==16'd499) - begin - dq_en <=1'b0; - dq_reg<=1'b0; - end - else - begin - dq_en <=dq_en; - dq_reg<=dq_reg; - end - //------------------ - if(cnt==20'd570)//&&dq==1'b0) - flag<=~dq; - else if(cnt==20'd999) - flag<=1'b0; - else - flag<=flag; - end - RD_CMD :begin - if(cnt==20'd64 && bit_cnt==4'd15) - begin - bit_cnt<=4'd0; - state<=RD_TEMP; - end - else if(cnt==20'd64) - begin - bit_cnt<=bit_cnt+1'd1; - state<=RD_CMD; - end - else - begin - bit_cnt<=bit_cnt; - state<=RD_CMD; - end - //------------------ - if(cnt==20'd64 && bit_cnt==4'd15) - cnt<=20'd0; - else if(cnt==20'd64) - cnt<=20'd0; - else - cnt<=cnt+1'd1; - //------------------ - if(WR_CC_BE[bit_cnt]==1'b0 && cnt<=20'd62) - begin - dq_en <=1'b1; - dq_reg<=1'b0; - end - else if(WR_CC_BE[bit_cnt]==1'b1 && cnt<=20'd1) - begin - dq_en <=1'b1; - dq_reg<=1'b0; - end - else - begin - dq_en <=1'b0; - dq_reg<=1'b0; - end - end - RD_TEMP :begin - if(cnt==20'd64 && bit_cnt==4'd15) - cnt <=20'd0; - else if(cnt==20'd64) - cnt<=20'd0; - else - cnt<=cnt+1'd1; - //------------------ - if(cnt<=20'd1|| (cnt==20'd64 && bit_cnt==4'd15)) - begin - dq_en <=1'b1; - dq_reg<=1'b0; - end - else - begin - dq_en <=1'b0; - dq_reg<=1'b0; - end - //------------------ - if(cnt==20'd64 && bit_cnt==4'd15) - begin - bit_cnt<=4'd0; - state<=INIT; - end - else if(cnt==20'd64) - begin - bit_cnt<=bit_cnt+1'd1; - state<=RD_TEMP; - end - else - begin - bit_cnt<=bit_cnt; - state<=RD_TEMP; - end - //------------------ - if(cnt==20'd8) - data_reg<={dq,data_reg[15:1]}; - else - data_reg<=data_reg; - //------------------ - if(cnt==20'd64 && bit_cnt==4'd15) - temp_data<=data_reg; - else - temp_data<=temp_data; - end - default: state<=INIT; - endcase - - -/* wire[33:0]SYNC_OUT; -wire[35:0]CONTROL0; -wire[35:0]CONTROL1; -wire[149:0]TRIG0; - - vio u_vio ( - .CONTROL (CONTROL0), // INOUT BUS [35:0] - .CLK (clk), // IN - .SYNC_OUT (SYNC_OUT) // OUT BUS [33:0] -); - - -icon u_icon ( - .CONTROL0 (CONTROL0), // INOUT BUS [35:0] - .CONTROL1 (CONTROL1) // INOUT BUS [35:0] -); - - -ila u_ila ( - .CONTROL (CONTROL1), // INOUT BUS [35:0] - .CLK (clk), // IN - .TRIG0 (TRIG0) // IN BUS [39:0] -); - - -assign TRIG0[2:0] = state ; -assign TRIG0[21:3] = cnt ; -assign TRIG0[22] = dq ; - */ - - - - - - - - - - - - - - - - -endmodule \ No newline at end of file diff --git a/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/sources_1/new/ant_rf/Sisyif_src/frac2_rom.v b/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/sources_1/new/ant_rf/Sisyif_src/frac2_rom.v deleted file mode 100644 index 21cbf38..0000000 --- a/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/sources_1/new/ant_rf/Sisyif_src/frac2_rom.v +++ /dev/null @@ -1,72 +0,0 @@ -`timescale 1ns / 1ps -////////////////////////////////////////////////////////////////////////////////// -// Company: -// Engineer: -// -// Create Date: 15:35:03 01/27/2022 -// Design Name: -// Module Name: mod2_rom -// Project Name: -// Target Devices: -// Tool versions: -// Description: -// -// Dependencies: -// -// Revision: -// Revision 0.01 - File Created -// Additional Comments: -// -////////////////////////////////////////////////////////////////////////////////// -module frac2_rom( -input sysclk, -input [11 : 0] addra, -output reg[13:0] douta -); - - -reg[11:0] addr=0; - -always@(posedge sysclk)begin - addr<=addra%25; -end - -always@(posedge sysclk)begin - case(addr) -0 : douta <= 0; -1 : douta <= 2; -2 : douta <= 4; -3 : douta <= 6; -4 : douta <= 8; -5 : douta <= 2; -6 : douta <= 12; -7 : douta <= 14; -8 : douta <= 16; -9 : douta <= 18; -10 : douta <= 4; -11 : douta <= 22; -12 : douta <= 24; -13 : douta <= 1; -14 : douta <= 3; -15 : douta <= 1; -16 : douta <= 7; -17 : douta <= 9; -18 : douta <= 11; -19 : douta <= 13; -20 : douta <= 3; -21 : douta <= 17; -22 : douta <= 19; -23 : douta <= 21; -24 : douta <= 23; -default:douta <= douta ; -endcase - -end - - - - - - - -endmodule diff --git a/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/sources_1/new/ant_rf/Sisyif_src/fre_caliatt.v b/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/sources_1/new/ant_rf/Sisyif_src/fre_caliatt.v deleted file mode 100644 index fa1a042..0000000 --- a/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/sources_1/new/ant_rf/Sisyif_src/fre_caliatt.v +++ /dev/null @@ -1,210 +0,0 @@ -`timescale 1ns / 1ps -////////////////////////////////////////////////////////////////////////////////// -// Company: -// Engineer: -// -// Create Date: 10:03:33 09/24/2021 -// Design Name: -// Module Name: fre_caliatt -// Project Name: -// Target Devices: -// Tool versions: -// Description: -// -// Dependencies: -// -// Revision: -// Revision 0.01 - File Created -// Additional Comments: -// -////////////////////////////////////////////////////////////////////////////////// -module fre_caliatt( -input i_clk , -input i_rstn , -output ENABLE , -output SC , -output SD , -output END_SYN , -input SDOUT , -input CAL_F , -input signed[7:0] i_temp , -input[15:0] i_fre_mode , -input[15:0] i_cal_fre_code , -input [3:0] cal1_mgc , -input [3:0] cal2_mgc , -input [3:0] cal3_mgc , -input [3:0] cal4_mgc , -input [3:0] i_ceshi_module , -input [40:0] SYNC_OUT , -input SW , -output [3:0] R_CAL1 , -output [3:0] R_CAL2 , -output [3:0] R_CAL3 , -output [3:0] R_CAL4 , -input [4:0] tx_mgc , -input [4:0] tx_cal_mgc , -output [4:0] T_CAL - ); - - -wire[15:0] fre_mode ; -wire[31:0] hop_fre_mode ; -assign fre_mode = i_cal_fre_code/40 ;//20.375Ghz~23.875Ghz -assign hop_fre_mode = i_cal_fre_code+20375 ;//20.375Ghz~23.875Ghz - - -wire [3:0] R_CAL4_r ; -wire [3:0] R_CAL3_r ; -wire [3:0] R_CAL2_r ; -wire [3:0] R_CAL1_r ; -wire [4:0] T_CAL_r ; -wire [31:0] data_in ; -reg [31:0] data_in_r ; -reg R_CAL_F ; -wire[15:0] cal_mgc_r ; -reg [15:0] cal_mgc_rr ; -reg tx_en ; -reg vio_en ; - - - - -always@(posedge i_clk) -begin - cal_mgc_rr <= cal_mgc_r; -end -//------------------vio_debug------------------------// -/* always@(posedge i_clk) -begin - vio_R_CAL_4 <= SYNC_OUT[4:0]; - vio_R_CAL_3 <= SYNC_OUT[9:5]; - vio_R_CAL_2 <= SYNC_OUT[14:10]; - vio_R_CAL_1 <= SYNC_OUT[19:15]; - vio_T_CAL <= SYNC_OUT[24:20]; - vio_en <= SYNC_OUT[25]; -end */ - -//------------------vio_debug------------------------// -assign R_CAL1 = R_CAL1_r + cal1_mgc ;//通é“1 -assign R_CAL2 = R_CAL2_r + cal2_mgc ;//通é“2 -assign R_CAL3 = R_CAL3_r + cal3_mgc ;//通é“3 -assign R_CAL4 = R_CAL4_r + cal4_mgc ;//通é“4 -assign T_CAL = ( i_ceshi_module==4'ha || i_ceshi_module==4'hb) ? (tx_mgc[4:0] + tx_cal_mgc) : (T_CAL_r + tx_cal_mgc) ;//å‘射通é“ï¼Œä½Žè¡°å‡ - -assign cal_mgc_r = {cal1_mgc,cal2_mgc,cal3_mgc,cal4_mgc}; -assign data_in = { 4'h0,3'b0, - T_CAL , //å‘å°„é€šé“ - R_CAL1[0], //接收通é“1_1dB - R_CAL1[1], //接收通é“1_2dB - R_CAL1[2], //接收通é“1_4dB - R_CAL1[3], //接收通é“1_8dB - R_CAL2[0], //接收通é“2_1dB - R_CAL2[1], //接收通é“2_2dB - R_CAL2[2], //接收通é“2_4dB - R_CAL2[3], //接收通é“2_8dB - R_CAL3[0], //接收通é“3_1dB - R_CAL3[1], //接收通é“3_2dB - R_CAL3[2], //接收通é“3_4dB - R_CAL3[3], //接收通é“3_8dB - R_CAL4 , // - 4'b0 }; -reg [31:0] cnt5us=0; - -always@(posedge i_clk)begin - if(cnt5us==2000) - cnt5us<=2000; - else - cnt5us<=cnt5us+1'b1; -end - -always@(posedge i_clk or negedge i_rstn)begin -if(!i_rstn) - R_CAL_F <= 1'b0; -else - R_CAL_F <= CAL_F; -end - -always@(posedge i_clk or negedge i_rstn)begin - if(!i_rstn) - tx_en<=1'b0; - else if(cnt5us==1999) - tx_en<=1'b1; - else if({R_CAL_F,CAL_F}==2'b01 || cal_mgc_rr!=cal_mgc_r) - tx_en<=1'b1; - else - tx_en<=1'b0; -end - - - -R_CAL_1 R_CAL_1 ( - .i_clk(i_clk), - .i_rstn(i_rstn), - .i_temp(i_temp), - .fre_mode(fre_mode), - .R_CAL(R_CAL1_r) - ); - -R_CAL_2 R_CAL_2 ( - .i_clk(i_clk), - .i_rstn(i_rstn), - .i_temp(i_temp), - .fre_mode(fre_mode), - .R_CAL(R_CAL2_r) - ); - -R_CAL_3 R_CAL_3 ( - .i_clk(i_clk), - .i_rstn(i_rstn), - .i_temp(i_temp), - .fre_mode(fre_mode), - .R_CAL(R_CAL3_r) - ); - -R_CAL_4 R_CAL_4 ( - .i_clk(i_clk), - .i_rstn(i_rstn), - .i_temp(i_temp), - .fre_mode(fre_mode), - .R_CAL(R_CAL4_r) - ); - - -T_CAL T_CAL__ ( - .i_clk(i_clk), - .i_rstn(i_rstn), - .SW(SW), - .i_temp(i_temp), - .hop_fre_mode(hop_fre_mode), - .T_CAL_(T_CAL_r) - ); - - -spi_tx SPI_TX ( - .clk (i_clk ) , - .rstn (i_rstn ) , - .tx_en (tx_en ) , - .data_in (data_in ) , - .spi_cs (ENABLE ) , - .spi_sclk (SC ) , - .spi_sdo (SD ) , - .DARY (END_SYN ) - ); - - - - - - - - - - - - - - - - - -endmodule diff --git a/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/sources_1/new/ant_rf/Sisyif_src/mgc_ctrl.v b/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/sources_1/new/ant_rf/Sisyif_src/mgc_ctrl.v deleted file mode 100644 index a7e2d73..0000000 --- a/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/sources_1/new/ant_rf/Sisyif_src/mgc_ctrl.v +++ /dev/null @@ -1,434 +0,0 @@ -`timescale 1ns / 1ps -////////////////////////////////////////////////////////////////////////////////// -// Company: -// Engineer: -// -// Create Date: 19:54:29 09/06/2021 -// Design Name: -// Module Name: mgc_ctrl -// Project Name: -// Target Devices: -// Tool versions: -// Description: -// -// Dependencies: -// -// Revision: -// Revision 0.01 - File Created -// Additional Comments: -// -////////////////////////////////////////////////////////////////////////////////// -module mgc_ctrl( -input i_sys_clk , -input i_rst_n , -input i_TR_SW_F , -input i_TP_EN_F , -input i_CAL_F , -input i_T_MGC_EN_F , -input i_R_MGC_EN_F , - -input [15:0] i_fre_code , -input [7:0] i_tx_mgc , -input [7:0] i_rx1_mgc , -input [7:0] i_rx2_mgc , -input [7:0] i_rx3_mgc , -input [7:0] i_rx4_mgc , -input [3:0] i_ceshi_module, -output [15:0] o_current_fre_code, -output [15:0] o_cal_fre_code, -output [15:0] o_hop_fre_code, -output o_adf4371_hop1, -output o_adf4371_hop2, - -output o_SW, -output o_SW2, -output o_SW3, -output o_SW_C1, - -//·¢ÉäͨµÀMGC¿ØÖÆ£¬¸ßË¥¡£31dB£¬²½½ø1dB¡£³õʼֱ̬ͨ£¨È«ÖÃ1£© -output o_T_MGC_1dB, -output o_T_MGC_2dB, -output o_T_MGC_4dB, -output o_T_MGC_8dB, -output o_T_MGC_16dB, -//½ÓÊÕͨµÀ1MGC¿ØÖÆ£¬¸ßË¥¡£31dB£¬²½½ø1dB¡£³õʼֱ̬ͨ£¨È«ÖÃ1£© -output reg[7:0] o_R_MGC_1, - -//½ÓÊÕͨµÀ2MGC¿ØÖÆ£¬¸ßË¥¡£31dB£¬²½½ø1dB¡£³õʼֱ̬ͨ£¨È«ÖÃ1£© -output reg[7:0] o_R_MGC_2, - -//½ÓÊÕͨµÀ3MGC¿ØÖÆ£¬¸ßË¥¡£31dB£¬²½½ø1dB¡£³õʼֱ̬ͨ£¨È«ÖÃ1£© -output reg[7:0] o_R_MGC_3, -//½ÓÊÕͨµÀ4MGC¿ØÖÆ£¬¸ßË¥¡£31dB£¬²½½ø1dB¡£³õʼֱ̬ͨ£¨È«ÖÃ1£© -output reg[7:0] o_R_MGC_4 - -); - - -reg TR_SW_F; -reg [2:0] TP_EN_r; -reg [2:0] T_MGC_EN_r; -reg [2:0] R_MGC_EN_r; -reg [2:0] R_CAL_F; -reg [15:0] hop_fre_code; -reg [15:0] current_fre_code; -wire [15:0] cal_fre_code; -reg [47:0] fre_code_a_b; -reg hop_en; -reg hop_en_r; -reg hop_en_rr; -reg cfg_en; -reg cfg_en_r; -reg cfg_en_rr; -reg hmc704_1_hop; -reg hmc704_2_hop; -reg [1:0] cnt_cfg; -reg [1:0] cnt_hop; - - -reg sw1; -reg sw2; -reg sw3; -reg SW_C1; - -reg T_MGC_1dB_r ; -reg T_MGC_2dB_r ; -reg T_MGC_4dB_r ; -reg T_MGC_8dB_r ; -reg T_MGC_16dB_r; - -assign o_SW = sw1; -assign o_SW2 = sw2; -assign o_SW3 = sw3; -assign o_SW_C1 = SW_C1; - -assign o_current_fre_code= current_fre_code; -assign o_cal_fre_code = cal_fre_code; -assign o_hop_fre_code = hop_fre_code; -assign o_adf4371_hop1 = hmc704_1_hop; -assign o_adf4371_hop2 = hmc704_2_hop; - -assign o_T_MGC_1dB = T_MGC_1dB_r ; -assign o_T_MGC_2dB = T_MGC_2dB_r ; -assign o_T_MGC_4dB = T_MGC_4dB_r ; -assign o_T_MGC_8dB = T_MGC_8dB_r ; -assign o_T_MGC_16dB = T_MGC_16dB_r ; - - -always@(posedge i_sys_clk or negedge i_rst_n)begin -if(!i_rst_n)begin - TR_SW_F <= 1'b0; - TP_EN_r <= 3'b0; - T_MGC_EN_r <= 3'b0; - R_MGC_EN_r <= 3'b0; - R_CAL_F <= 3'b0; -end -else begin - TR_SW_F <= i_TR_SW_F; - TP_EN_r <= {TP_EN_r[1:0] ,i_TP_EN_F}; - T_MGC_EN_r <= {T_MGC_EN_r[1:0] ,i_T_MGC_EN_F}; - R_MGC_EN_r <= {R_MGC_EN_r[1:0] ,i_R_MGC_EN_F}; - R_CAL_F <= {R_CAL_F[1:0] ,i_CAL_F}; -end -end - -always@(posedge i_sys_clk or negedge i_rst_n)begin -if(!i_rst_n)begin - SW_C1 <= 1'b0; - current_fre_code <= 16'h6d6 ; -end -else begin - current_fre_code <= hop_en ? hop_fre_code : current_fre_code ; - if(TR_SW_F==1'b1)begin - if(current_fre_code<=1500)//20.375Ghz~21.875Ghz - SW_C1 <= 1'b1; - else //21.875Ghz~23.875Ghz - SW_C1 <= 1'b0; - end - else begin - SW_C1 <= SW_C1; - end -end -end - - -assign cal_fre_code = R_CAL_F==3'b001 ? hop_fre_code : cal_fre_code ; - - - - -always@(posedge i_sys_clk or negedge i_rst_n)begin -if(!i_rst_n)begin - fre_code_a_b <= 48'h0000000006d6; -end -else if(cfg_en)begin - fre_code_a_b <= {fre_code_a_b[31:0],i_fre_code}; -end -else begin - fre_code_a_b <= fre_code_a_b; -end -end - -always@(posedge i_sys_clk or negedge i_rst_n)begin -if(!i_rst_n)begin - hop_en <= 1'b0; -end -else if(TP_EN_r==3'b011)begin - hop_en <= 1'b1; -end -else begin - hop_en <= 1'b0; -end -end - -always@(posedge i_sys_clk or negedge i_rst_n)begin -if(!i_rst_n)begin - hop_fre_code <= 16'h6d6; -end -else begin - hop_fre_code <= i_fre_code; -end -end - - -always@(posedge i_sys_clk or negedge i_rst_n)begin -if(!i_rst_n)begin - cfg_en <= 1'b0; -end -else if(hop_fre_code != i_fre_code)begin - cfg_en <= 1'b1; -end -else begin - cfg_en <= 1'b0; -end -end - - -always @ (posedge i_sys_clk or negedge i_rst_n)begin -if(!i_rst_n)begin - hop_en_r <= 1'b0; - hop_en_rr <= 1'b0; -end -else begin - hop_en_r <= hop_en; - hop_en_rr <= hop_en_r; -end -end - -always @ (posedge i_sys_clk or negedge i_rst_n)begin -if(!i_rst_n)begin - cfg_en_r <= 1'b0; - cfg_en_rr <= 1'b0; -end -else begin - cfg_en_r <= cfg_en; - cfg_en_rr <= cfg_en_r; -end -end - -reg [15:0] pre_hop_fre_code; -always @ (posedge i_sys_clk or negedge i_rst_n)begin -if(!i_rst_n)begin - cnt_hop <= 2'b00; -end -else if(cnt_hop == 2'b10)begin - cnt_hop <= 2'b00; -end -else if(~hop_en_r & hop_en && (pre_hop_fre_code!=hop_fre_code ))begin - cnt_hop <= cnt_hop + 1'b1; -end -else begin - cnt_hop <= cnt_hop; -end -end - -always @ (posedge i_sys_clk or negedge i_rst_n)begin -if(!i_rst_n)begin - cnt_cfg <= 2'b00; -end -else if(cnt_cfg == 2'b10)begin - cnt_cfg <= 2'b00; -end -else if(~cfg_en_r&cfg_en)begin - cnt_cfg <= cnt_cfg + 1'b1; -end -else begin - cnt_cfg <= cnt_cfg; -end -end - -always @ (posedge i_sys_clk or negedge i_rst_n)begin -if(!i_rst_n) - pre_hop_fre_code<=16'h6d6; -else if(hop_en_rr) - pre_hop_fre_code<=hop_fre_code; -else - pre_hop_fre_code<=pre_hop_fre_code; -end - -always @ (posedge i_sys_clk or negedge i_rst_n)begin -if(!i_rst_n)begin - sw1 <= 1'b1; - sw2 <= 1'b1; - sw3 <= 1'b0; -end -else if(i_ceshi_module==4'ha)//×Ô¶¯Ð£×¼¿ª¹Øµ½a -begin - sw1 <= 1'b0; - sw2 <= 1'b0; - sw3 <= 1'b1; -end -else if(i_ceshi_module==4'hb)//×Ô¶¯Ð£×¼¿ª¹Øµ½b -begin - sw1 <= 1'b1; - sw2 <= 1'b1; - sw3 <= 1'b0; -end -else if(hop_en_rr && pre_hop_fre_code != hop_fre_code)begin - if(cnt_hop == 2'b01)begin - sw1 <= 1'b0; - sw2 <= 1'b0; - sw3 <= 1'b1; - end - else begin - sw1 <= 1'b1; - sw2 <= 1'b1; - sw3 <= 1'b0; - end -end -else begin - sw1 <= sw1; - sw2 <= sw2; - sw3 <= sw3; -end -end - -always @ (posedge i_sys_clk or negedge i_rst_n)begin -if(!i_rst_n)begin - hmc704_1_hop <= 1'b0; - hmc704_2_hop <= 1'b0; -end -else if(i_ceshi_module==4'ha&&cfg_en_rr)begin - hmc704_1_hop <= 1'b1; - hmc704_2_hop <= 1'b0; -end -else if(i_ceshi_module==4'hb&&cfg_en_rr)begin - hmc704_1_hop <= 1'b0; - hmc704_2_hop <= 1'b1; -end -else if(cfg_en_rr)begin - if(fre_code_a_b[47:32]==fre_code_a_b[15:0])begin - hmc704_1_hop <= 1'b0; - hmc704_2_hop <= 1'b0; - end - else if(cnt_cfg == 2'b01)begin - hmc704_1_hop <= 1'b1; - hmc704_2_hop <= 1'b0; - end - else begin - hmc704_1_hop <= 1'b0; - hmc704_2_hop <= 1'b1; - end -end -else begin - hmc704_1_hop <= 1'b0; - hmc704_2_hop <= 1'b0; -end -end - -/* always @ (posedge i_sys_clk or negedge i_rst_n)begin -if(!i_rst_n)begin - sw1 <= 1'b1; - sw2 <= 1'b1; - sw3 <= 1'b0; -end -end - -always @ (posedge i_sys_clk or negedge i_rst_n)begin -if(!i_rst_n)begin - hmc704_1_hop <= 1'b0; - hmc704_2_hop <= 1'b0; -end -else if(cfg_en_rr)begin - hmc704_1_hop <= 1'b0; - hmc704_2_hop <= 1'b1; -end -else begin - hmc704_1_hop <= 1'b0; - hmc704_2_hop <= 1'b0; -end -end */ - - - - -always@(posedge i_sys_clk or negedge i_rst_n)begin -if(!i_rst_n)begin - T_MGC_1dB_r <= 1'b0; - T_MGC_2dB_r <= 1'b0; - T_MGC_4dB_r <= 1'b0; - T_MGC_8dB_r <= 1'b0; - T_MGC_16dB_r <= 1'b0; -end -else if(i_ceshi_module==4'ha || i_ceshi_module==4'hb )begin - T_MGC_1dB_r <= 1'b0; - T_MGC_2dB_r <= 1'b0; - T_MGC_4dB_r <= 1'b0; - T_MGC_8dB_r <= 1'b0; - T_MGC_16dB_r <= 1'b0; -end -else if(T_MGC_EN_r==3'b011)begin - T_MGC_1dB_r <= i_tx_mgc[0]; - T_MGC_2dB_r <= i_tx_mgc[1]; - T_MGC_4dB_r <= i_tx_mgc[2]; - T_MGC_8dB_r <= i_tx_mgc[3]; - T_MGC_16dB_r <= i_tx_mgc[4]; -end -else begin - T_MGC_1dB_r <= T_MGC_1dB_r ; - T_MGC_2dB_r <= T_MGC_2dB_r ; - T_MGC_4dB_r <= T_MGC_4dB_r ; - T_MGC_8dB_r <= T_MGC_8dB_r ; - T_MGC_16dB_r <= T_MGC_16dB_r ; -end -end - -always@(posedge i_sys_clk or negedge i_rst_n)begin -if(!i_rst_n)begin - o_R_MGC_1 <= 1'b0; -end -else if(R_MGC_EN_r==3'b011)begin - o_R_MGC_1 <= i_rx1_mgc; -end -end - -always@(posedge i_sys_clk or negedge i_rst_n)begin -if(!i_rst_n)begin - o_R_MGC_2 <= 1'b0; -end -else if(R_MGC_EN_r==3'b011)begin - o_R_MGC_2 <= i_rx2_mgc; -end -end - -always@(posedge i_sys_clk or negedge i_rst_n)begin -if(!i_rst_n)begin - o_R_MGC_3 <= 1'b0; -end -else if(R_MGC_EN_r==3'b011)begin - o_R_MGC_3 <= i_rx3_mgc; -end -end - -always@(posedge i_sys_clk or negedge i_rst_n)begin -if(!i_rst_n)begin - o_R_MGC_4 <= 1'b0; -end -else if(R_MGC_EN_r==3'b011)begin - o_R_MGC_4 <= i_rx4_mgc; - -end -end - - -endmodule diff --git a/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/sources_1/new/ant_rf/Sisyif_src/mod2_rom.v b/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/sources_1/new/ant_rf/Sisyif_src/mod2_rom.v deleted file mode 100644 index 399498b..0000000 --- a/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/sources_1/new/ant_rf/Sisyif_src/mod2_rom.v +++ /dev/null @@ -1,71 +0,0 @@ -`timescale 1ns / 1ps -////////////////////////////////////////////////////////////////////////////////// -// Company: -// Engineer: -// -// Create Date: 15:35:03 01/27/2022 -// Design Name: -// Module Name: mod2_rom -// Project Name: -// Target Devices: -// Tool versions: -// Description: -// -// Dependencies: -// -// Revision: -// Revision 0.01 - File Created -// Additional Comments: -// -////////////////////////////////////////////////////////////////////////////////// -module mod2_rom( -input sysclk, -input [11 : 0] addra, - -output reg[13:0] douta -); - -reg[11:0] addr=0; -always@(posedge sysclk)begin - addr<=addra%25; -end - -always@(posedge sysclk)begin - case(addr) -0 : douta <= 1 ; -1 : douta <= 25 ; -2 : douta <= 25 ; -3 : douta <= 25 ; -4 : douta <= 25 ; -5 : douta <= 5 ; -6 : douta <= 25 ; -7 : douta <= 25 ; -8 : douta <= 25 ; -9 : douta <= 25 ; -10 : douta <= 5 ; -11 : douta <= 25 ; -12 : douta <= 25 ; -13 : douta <= 25 ; -14 : douta <= 25 ; -15 : douta <= 5 ; -16 : douta <= 25 ; -17 : douta <= 25 ; -18 : douta <= 25 ; -19 : douta <= 25 ; -20 : douta <= 5 ; -21 : douta <= 25 ; -22 : douta <= 25 ; -23 : douta <= 25 ; -24 : douta <= 25 ; -default:douta <= douta ; -endcase - -end - - - - - - - -endmodule diff --git a/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/sources_1/new/ant_rf/Sisyif_src/spi_master.v b/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/sources_1/new/ant_rf/Sisyif_src/spi_master.v deleted file mode 100644 index 924ae74..0000000 --- a/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/sources_1/new/ant_rf/Sisyif_src/spi_master.v +++ /dev/null @@ -1,150 +0,0 @@ -`timescale 1ns / 1ps -////////////////////////////////////////////////////////////////////////////////// -// Company: -// Engineer: -// -// Create Date: 20:42:39 09/29/2021 -// Design Name: -// Module Name: spi_master -// Project Name: -// Target Devices: -// Tool versions: -// Description: -// -// Dependencies: -// -// Revision: -// Revision 0.01 - File Created -// Additional Comments: -// -////////////////////////////////////////////////////////////////////////////////// -module spi_master #(parameter BIT_NUM = 95 )( - input i_clk , - input debug_clk , - input i_sys_rst_n , - input i_spi_sck , - input i_spi_cs , - output o_spi_sdo , - input i_spi_sdi , - input i_LD_LO3 , - input i_LD1 , - input i_LD2 , - input[3:0] i_cal1_mgc , - input[3:0] i_cal2_mgc , - input[3:0] i_cal3_mgc , - input[3:0] i_cal4_mgc , - input[7:0] i_temp , - input[31:0] i_frame_count - -); - -wire [BIT_NUM:0] data ; -reg [BIT_NUM:0] data_r ; -reg [BIT_NUM:0] data_reg ; -assign data={ 8'hAA , - i_temp , - 7'b0,i_LD_LO3 , - 7'b0,i_LD1 , - 7'b0,i_LD2 , - i_cal1_mgc,i_cal2_mgc , - i_cal3_mgc,i_cal4_mgc , - i_frame_count , - 8'hCC } ; - -wire spi_sck ; -wire spi_cs ; -reg spi_sdo ; -reg [2:0] reg_cs ; -reg [31:0] cnt ; - -assign spi_sck = i_spi_sck; -assign spi_cs = i_spi_cs; -assign o_spi_sdo = spi_sdo; - -always@(negedge spi_sck,negedge i_sys_rst_n)begin - if(!i_sys_rst_n) - reg_cs<=3'b111; - else - reg_cs<={reg_cs[1:0],i_spi_cs}; -end - -always@(negedge spi_sck,negedge i_sys_rst_n)begin - if(!i_sys_rst_n) - data_r<={8'hAA,80'b0,8'hCC}; - else if(reg_cs[2:1]==2'b10) - data_r<={8'hAA,data[87:8],8'hCC}; -end - -always@(negedge spi_sck,negedge i_sys_rst_n)begin - if(!i_sys_rst_n) - spi_sdo <= 1'b0 ; - else if(!spi_cs) - spi_sdo <= data_r[cnt]; - else - spi_sdo <= 1'b0 ; -end - -always@(posedge spi_sck,negedge i_sys_rst_n)begin - if(!i_sys_rst_n) - cnt<=BIT_NUM; - else if(spi_cs==1 | cnt==0) - cnt<=BIT_NUM; - else - cnt<=cnt-1; -end - -//------------debug------------ -always@(posedge spi_sck,negedge i_sys_rst_n)begin - if(!i_sys_rst_n) - data_reg <= 0 ; - else if(!spi_cs) - data_reg <= {data_reg,spi_sdo} ; - else - data_reg <= data_reg ; -end -//------------debug------------ - -/* -wire [40:0] SYNC_OUT ; -wire [35:0] CONTROL0 ; -wire [35:0] CONTROL1 ; -wire [150:0] TRIG0 ; - -vio u_vio ( - .CONTROL (CONTROL0), // INOUT BUS [35:0] - .CLK (i_clk), // IN - .SYNC_OUT (SYNC_OUT) // OUT BUS [33:0] -); - - -icon u_icon ( - .CONTROL0 (CONTROL0), // INOUT BUS [35:0] - .CONTROL1 (CONTROL1) // INOUT BUS [35:0] -); - - -ila u_ila ( - .CONTROL (CONTROL1), // INOUT BUS [35:0] - .CLK (debug_clk), // IN - .TRIG0 (TRIG0) // IN BUS [39:0] -); - - -assign TRIG0[0] = i_LD_LO3; -assign TRIG0[1] = i_LD1 ; -assign TRIG0[2] = i_LD2 ; -assign TRIG0[98:3] = data_r ; -assign TRIG0[101:99] = reg_cs ; -assign TRIG0[132:102] = cnt ; -assign TRIG0[133] = i_spi_sck ; -assign TRIG0[134] = i_spi_cs ; -assign TRIG0[135] = o_spi_sdo ; -assign TRIG0[136] = i_spi_sdi ; - - */ - - - - - -endmodule diff --git a/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/sources_1/new/ant_rf/Sisyif_src/spi_salve.v b/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/sources_1/new/ant_rf/Sisyif_src/spi_salve.v deleted file mode 100644 index 346cd4a..0000000 --- a/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/sources_1/new/ant_rf/Sisyif_src/spi_salve.v +++ /dev/null @@ -1,171 +0,0 @@ - -`timescale 1ns / 1ps -////////////////////////////////////////////////////////////////////////////////// -// Company: -// Engineer: -// -// Create Date: 2020/09/02 10:48:55 -// Design Name: -// Module Name: d -// Project Name: -// Target Devices: -// Tool Versions: -// Description: -// SPI时钟频率50MHz。æ¯ä¸€å¸§æ•°æ®12个字节，共96bitæ•°æ®ã€‚ -// -// Dependencies: -// -// Revision: -// Revision 0.01 - File Created -// Additional Comments: -// -////////////////////////////////////////////////////////////////////////////////// - - -module spi_slave#( - parameter BIT_NUM = 96 -) -( -input i_sys_clk, -input i_sys_rst_n, - -input i_spi_sck, //从机在时钟下é™æ²¿é‡‡æ ·æ•°æ® -input i_spi_cs, //低电平时从机接收数æ®æŒ‡ä»¤ -input i_spi_sdi, -output [31:0] o_frame_count, //帧计数 -output [15:0] o_fre_code , //天线频率 -output [7:0] o_tx_mgc, //å‘å°„MGC -output [3:0] o_model, //模å¼å­— -output [3:0] o_rf_en, //射频使能 -output [3:0] o_cal1_mgc, //接收校准1mgc -output [3:0] o_cal2_mgc, //接收校准2mgc -output [3:0] o_cal3_mgc, //接收校准3mgc -output [3:0] o_cal4_mgc, //接收校准4mgc -output [7:0] o_tx_cal_mgc, //å‘射校准mgc -output [7:0] o_rx1_mgc, //接收1mgc -output [7:0] o_rx2_mgc, //接收2mgc -output [7:0] o_rx3_mgc, //接收3mgc -output [7:0] o_rx4_mgc , //接收4mgc - -output [3:0] o_ceshi_model -); - -reg [BIT_NUM -1:0] receive_data; -reg [3:0] rf_en ; -reg [3:0] model; -reg [31:0] frame_count; -reg [11:0] fre_code; -reg [7:0] tx_mgc; -reg [7:0] rx1_mgc; -reg [7:0] rx2_mgc; -reg [7:0] rx3_mgc; -reg [7:0] rx4_mgc; -reg [3:0] cal1_mgc; -reg [3:0] cal2_mgc; -reg [3:0] cal3_mgc; -reg [3:0] cal4_mgc; -reg [7:0] tx_cal_mgc; -reg [3:0] ceshi_module; - - -assign o_frame_count= frame_count; -assign o_fre_code = {4'b0,fre_code}; -assign o_rf_en = rf_en; -assign o_model = model; -assign o_tx_mgc = tx_mgc; -assign o_cal1_mgc = cal1_mgc; -assign o_cal2_mgc = cal2_mgc; -assign o_cal3_mgc = cal3_mgc; -assign o_cal4_mgc = cal4_mgc; -assign o_tx_cal_mgc = tx_cal_mgc; -assign o_rx1_mgc = rx1_mgc; -assign o_rx2_mgc = rx2_mgc; -assign o_rx3_mgc = rx3_mgc; -assign o_rx4_mgc = rx4_mgc; -assign o_ceshi_model = ceshi_module; - -always @ ( negedge i_spi_sck or negedge i_sys_rst_n)begin -if( !i_sys_rst_n ) - receive_data <= 'b0; -else if(i_spi_cs == 1'b0) - receive_data <= {receive_data,i_spi_sdi}; -else - receive_data <= receive_data; -end - - -reg [2:0] cs_reg; - -always @ ( posedge i_sys_clk or negedge i_sys_rst_n)begin -if( !i_sys_rst_n ) - cs_reg <= 3'b111; -else - cs_reg <= {cs_reg[1:0],i_spi_cs}; -end - - - -always @ ( posedge i_sys_clk or negedge i_sys_rst_n)begin -if(!i_sys_rst_n)begin - tx_cal_mgc<=8'h0; -end -else if(cs_reg[2:1]==2'b01 && (receive_data[95:88] == 8'hbb) && (receive_data[7:0] == 8'hdd))begin - tx_cal_mgc<=receive_data[15:8]; -end -else begin - tx_cal_mgc<=tx_cal_mgc; -end -end - -always @ ( posedge i_sys_clk or negedge i_sys_rst_n)begin -if(!i_sys_rst_n)begin - fre_code <= 12'h6d6; - tx_mgc <= 8'h00; - rf_en <= 4'b1; - model <= 4'b0; - frame_count <= 32'd1; - rx1_mgc <= 4'h0; - rx2_mgc <= 4'h0; - rx3_mgc <= 4'h0; - rx4_mgc <= 4'h0; - cal1_mgc <= 4'h0; - cal2_mgc <= 4'h0; - cal3_mgc <= 4'h0; - cal4_mgc <= 4'h0; - ceshi_module <= 4'h0; -end -else if(cs_reg[2:1]==2'b01 && (receive_data[95:88] == 8'haa) && (receive_data[7:0] == 8'hcc))begin - frame_count <= frame_count+1'b1; - rf_en <= receive_data[87:84]; - model <= receive_data[83:80]; - ceshi_module<= receive_data[79:76]; - fre_code <= receive_data[75:64]; - tx_mgc <= receive_data[63:56]; - cal1_mgc <= receive_data[55:52]; - cal2_mgc <= receive_data[51:48]; - cal3_mgc <= receive_data[47:44]; - cal4_mgc <= receive_data[43:40]; - rx1_mgc <= receive_data[39:32]; - rx2_mgc <= receive_data[31:24]; - rx3_mgc <= receive_data[23:16]; - rx4_mgc <= receive_data[15:8]; -end -else begin - frame_count <= frame_count ; - rf_en <= rf_en ; - model <= model ; - fre_code <= fre_code ; - tx_mgc <= tx_mgc ; - cal1_mgc <= cal1_mgc ; - cal2_mgc <= cal2_mgc ; - cal3_mgc <= cal3_mgc ; - cal4_mgc <= cal4_mgc ; - rx1_mgc <= rx1_mgc ; - rx2_mgc <= rx2_mgc ; - rx3_mgc <= rx3_mgc ; - rx4_mgc <= rx4_mgc ; -end -end - - -endmodule diff --git a/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/sources_1/new/ant_rf/Sisyif_src/spi_tx.v b/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/sources_1/new/ant_rf/Sisyif_src/spi_tx.v deleted file mode 100644 index 988e771..0000000 --- a/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/sources_1/new/ant_rf/Sisyif_src/spi_tx.v +++ /dev/null @@ -1,118 +0,0 @@ -`timescale 1ns / 1ps -////////////////////////////////////////////////////////////////////////////////// -// Company: -// Engineer: -// -// Create Date: 15:23:58 10/12/2020 -// Design Name: spi·¢ËÍÄ£¿é -// Module Name: spi -// Project Name: -// Target Devices: -// Tool versions: -// Description: -// -// Dependencies: -// -// Revision: -// Revision 0.01 - File Created -// Additional Comments: -// -////////////////////////////////////////////////////////////////////////////////// -module spi_tx #(parameter WHITH=32)( -input clk,//ϵͳʱÖÓ -input rstn,//Òì²½¸´Î» -input tx_en,//·¢ËÍʹÄÜ -input [WHITH-1:0] data_in,//´ý·¢ËÍÊý¾Ý -output reg spi_cs, //Ƭѡ -output reg spi_sclk, //ͬ²½Ê±ÖÓ£¬µÈÓÚclk/2 -output reg spi_sdo, //·¢ËÍÊý¾ÝµÄÏß -output reg DARY -); - -//localparam [1:0] polaeity = 2'b10;//negedge Êý¾ÝϽµÑر£³Ö -localparam [1:0] polaeity = 2'b01;//posedge Êý¾ÝÉϽµÑر£³Ö -reg [2:0] state ; //״̬»ú -reg [WHITH-1:0] reg_data;//ÒÆλ¼Ä´æÆ÷ -reg [5:0] cnt;//¼ÆÊýÆ÷£¬±ØÐë´óÓÚÊý¾Ýλ¿í - -wire CPOL ; //ʱÖÓ¿ÕÏÐʱµçƽ -wire CPHA ; //¼«ÐÔ -assign CPOL = polaeity[0] ; -assign CPHA = polaeity[1] ; - -always @(posedge clk,negedge rstn)begin -if(!rstn)begin - state <= 3'd0; - spi_cs <= 1'b1; - spi_sclk <= CPOL; - reg_data <= 1'd0; - cnt <= 5'b0; - spi_sdo <= 1'b0; - DARY <= 1'b1; -end -else begin - case(state) - 3'd0:begin//¿ÕÏÐ̬ - spi_sclk <= CPOL ; - spi_cs <= 1'b1 ; - spi_sdo <= 1'b0 ; - DARY <= 1'b1 ; - cnt <= 5'b0 ; - reg_data <= data_in ; - if(tx_en)//·¢ËÍʹÄÜÌøÏÂÒ»¸ö״̬ - state <= 3'd1 ; - else - state <= state ; - end - 3'd1:begin - spi_cs <= 1'b0 ; - state <= 3'd2 ; - reg_data <= data_in ; - end - 3'd2:begin//Êý¾ÝÒÆλ̬ - spi_cs <= 1'b0 ; - reg_data <= reg_data<<1'b1 ; - spi_sdo <= reg_data[WHITH-1] ; - spi_sclk <= CPHA ; - state <= (cnt >= WHITH-1) ? 3'd4:3'd3; - end - 3'd3:begin//ʱÖÓ·­×ª - cnt <= cnt+1'b1 ; - spi_sclk <= ~CPHA ; - state <= 3'd2 ; - end - 3'd4:begin//½áÊø̬ - state <= 3'd5; - spi_sclk <= ~CPHA; - end - 3'd5:begin//½áÊø̬ - state <= 3'd6; - DARY <= 0; - spi_sdo <= 1'b0 ; - spi_cs <= 1'b1 ; - end - 3'd6:begin//½áÊø̬ - state <= 3'd7; - DARY <= 1; - spi_cs <= 1'b1 ; - end - 3'd7:begin//½áÊø̬ - state <= 3'd8; - DARY <= 0; - end - 3'd8:begin//½áÊø̬ - state <= 3'd0; - DARY <= 1; - end - default :state<=3'd0; - endcase -end -end - - - - - - - -endmodule diff --git a/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/sources_1/new/ant_rf/ant_rf_ctrl.v b/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/sources_1/new/ant_rf/ant_rf_ctrl.v deleted file mode 100644 index 4094f7f..0000000 --- a/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/sources_1/new/ant_rf/ant_rf_ctrl.v +++ /dev/null @@ -1,509 +0,0 @@ -`timescale 1ns / 1ps -////////////////////////////////////////////////////////////////////////////////// -// Company: -// Engineer: -// -// Create Date: 2022/07/13 14:20:24 -// Design Name: -// Module Name: ant_rf_ctrl -// Project Name: -// Target Devices: -// Tool Versions: -// Description: -// -// Dependencies: -// -// Revision: -// Revision 0.01 - File Created -// Additional Comments: -// -////////////////////////////////////////////////////////////////////////////////// - - -module ant_rf_ctrl -( - input clk_48m , - input clk_96m , - input clk_32m , - input clk_19p2m , - input sys_rst , - - output ant_clk , - output ant_en , - output ant_data , - output ant_tr , - output ant_dary , - input ant_dout , - - output rf_standby , - output rf_sw_pll , - output rf_t , - output rf_r , - output rf_sw_bpf , - output rf_sclk1 , - output rf_sdio1 , - output rf_cs1 , - input rf_ld1 , - output rf_sclk2 , - output rf_sdio2 , - output rf_cs2 , - input rf_ld2 , - output rf_sclk3 , - output rf_sdio3 , - output rf_cs3 , - input rf_ld3 , - output rf_tmgc_16 , - output rf_tmgc_8 , - output rf_tmgc_4 , - output rf_tmgc_2 , - output rf_tmgc_1 , - output rf_rmgc_16 , - output rf_rmgc_8 , - output rf_rmgc_4 , - output rf_rmgc_2 , - output rf_rmgc_1 , - output rf_enable , - output rf_sc , - output rf_sd , - output rf_endsyn , - input rf_sdout , - inout rf_dq_wd , - output rf_sw_rx -); - - -(*dont_touch = "true"*) wire vio_switch ; // 键控开关，沿有效 -(*dont_touch = "true"*) wire vio_trdirection ; // 收å‘æ–¹å‘ -(*dont_touch = "true"*) wire [15:0] vio_frequency ; // 收å‘频率 -(*dont_touch = "true"*) wire [ 7:0] vio_emitMGC ; // å‘é€MGC -(*dont_touch = "true"*) wire [ 3:0] vio_ch01MGC ; // 1通é“校准MGC -(*dont_touch = "true"*) wire [ 3:0] vio_ch02MGC ; // 2通é“校准MGC -(*dont_touch = "true"*) wire [ 3:0] vio_ch03MGC ; // 3通é“校准MGC -(*dont_touch = "true"*) wire [ 3:0] vio_ch04MGC ; // 4通é“校准MGC -(*dont_touch = "true"*) wire [ 7:0] vio_recvMGC ; // 接收MGC -(*dont_touch = "true"*) wire [ 7:0] vio_AntMod ; // å¤©çº¿å·¥ä½œæ¨¡å¼ -(*dont_touch = "true"*) wire [15:0] vio_AntOffAxis ; // 天线离轴角 -(*dont_touch = "true"*) wire [15:0] vio_AntYaw ; // 天线å航角 -(*dont_touch = "true"*) wire [15:0] vio_PrecessTime ; // 处ç†æ—¶é—´ï¼Œä»ŽEN拉低到DARY拉低 - -(*dont_touch = "true"*)wire vio_mode_ant ; // 0定频手动，1æ‰«é¢‘æ¨¡å¼ -(*dont_touch = "true"*)wire vio_hop_start ; // 0跳频终止，1é‡æ–°è·³é¢‘ -(*dont_touch = "true"*)wire vio_standby ; // 0待机模å¼ï¼Œ1å·¥ä½œæ¨¡å¼ -(*dont_touch = "true"*)wire [15:0] vio_hoptime ; // å•è·³æ—¶é—´è®¡æ•°å™¨ - -reg Ant_switch_D1 = 0; -reg data_valid = 0; -reg switch_valid = 0; -reg [95:0] RF_CtrlWord = 0; -reg [127:0] Ant_CtrlWord = 0; -reg [15:0] data_valid_countdown = 0; -reg [15:0] rst_countdown = 100; -reg [95:0] RF_CtrlWord_running = 0; -reg [127:0] Ant_CtrlWord_running = 0; -reg rst_n = 0; -reg SPI_SYN_F = 1; -reg SPI_MOSI_F = 1; -reg TP_EN_F = 0; -reg TR_MGC_F = 0; -reg CAL_F = 0; -reg PRF = 0; -wire SPI_MISO_F; -reg Ant_DATA = 0; -reg Ant_EN = 0; -reg Ant_DARY = 0; -reg Ant_TR = 0; - - - -//ç›¸æŽ§é˜µæµ‹è¯•ç¨‹åº -reg [15:0] cnt_freq_change = 16'd0; - -reg Ant_switch ; // 键控开关，沿有效 -reg [15:0] Ant_frequency; // 收å‘频率 -reg [ 7:0] Ant_mode ; // ç›¸æŽ§é˜µæ¨¡å¼ -reg [ 7:0] RF_mode ; // å°„é¢‘æ¨¡å¼ - -always @ (posedge clk_48m) begin - if(sys_rst) begin - Ant_switch <= 1'b0; - cnt_freq_change[15:0] <= 16'd0; - Ant_frequency[15:0] <= 16'd0; - RF_mode[7:0] <= 8'h10; - Ant_mode[7:0] <= 8'h0f; - end - else begin - if(vio_mode_ant) begin - if(vio_hop_start) begin - if(cnt_freq_change[15:0] == (vio_hoptime[15:0] - 16'd1)) begin - Ant_switch <= ~Ant_switch; - if(Ant_frequency[15:0] == 16'd3500) begin - Ant_frequency[15:0] <= 16'd0; - end - else begin - Ant_frequency[15:0] <= Ant_frequency[15:0] + 16'd1; - end - cnt_freq_change[15:0] <= 16'd0; - end - else begin - Ant_switch <= Ant_switch; - Ant_frequency[15:0] <= Ant_frequency[15:0]; - cnt_freq_change[15:0] <= cnt_freq_change[15:0] + 16'd1; - end - end - else begin - Ant_switch <= Ant_switch; - Ant_frequency[15:0] <= 16'd0; - cnt_freq_change[15:0] <= 16'd0; - end - end - else begin - Ant_switch <= vio_switch; - Ant_frequency[15:0] <= vio_frequency[15:0]; - cnt_freq_change[15:0] <= 16'd0; - end - - if(vio_standby) begin - RF_mode[7:0] <= 8'h10; - Ant_mode[7:0] <= 8'h0f; - end - else begin - RF_mode[7:0] <= 8'h00; - Ant_mode[7:0] <= vio_AntMod[7:0]; - end - end - -end - -always @(posedge clk_48m) - begin - Ant_switch_D1 <= Ant_switch; - if(Ant_switch_D1 != Ant_switch) - switch_valid <= 1'b1; - else - switch_valid <= 1'b0; - - if(switch_valid) - begin - RF_CtrlWord[95:88] <= 8'hAA; - RF_CtrlWord[87:80] <= RF_mode[7:0]; - RF_CtrlWord[79:64] <= Ant_frequency[15:0]; - RF_CtrlWord[63:56] <= vio_emitMGC[7:0]; - RF_CtrlWord[55:52] <= vio_ch01MGC[3:0]; - RF_CtrlWord[51:48] <= vio_ch02MGC[3:0]; - RF_CtrlWord[47:44] <= vio_ch03MGC[3:0]; - RF_CtrlWord[43:40] <= vio_ch04MGC[3:0]; - RF_CtrlWord[39:32] <= vio_recvMGC[7:0]; - RF_CtrlWord[31:8] <= 24'h00_0000; - RF_CtrlWord[7:0] <= 8'hCC; - - Ant_CtrlWord[127:120] <= 8'hAA; - Ant_CtrlWord[119:112] <= 8'h00; - Ant_CtrlWord[111:104] <= Ant_mode[7:0]; - Ant_CtrlWord[103: 88] <= vio_AntOffAxis[15:0]; - Ant_CtrlWord[ 87: 72] <= vio_AntYaw[15:0]; - Ant_CtrlWord[ 71: 56] <= Ant_frequency[15:0]; - Ant_CtrlWord[ 55: 8] <= 48'h00_00_00_00_00_00; - Ant_CtrlWord[ 7: 0] <= 8'hCC; - end - else - begin - RF_CtrlWord[95:0] <= RF_CtrlWord[95:0]; - Ant_CtrlWord[127:0] <= Ant_CtrlWord[127:0]; - end - - if(switch_valid) - data_valid_countdown[15:0] <= vio_PrecessTime[15:0]; - else if(data_valid_countdown[15:0] != 16'd0) - data_valid_countdown[15:0] <= data_valid_countdown[15:0] - 16'd1; - - - // RF控制 - if(data_valid_countdown[15:0] == vio_PrecessTime[15:0]) - RF_CtrlWord_running[95:0] <= RF_CtrlWord[95:0]; - else - RF_CtrlWord_running[95:0] <= {RF_CtrlWord_running[94:0],1'b0}; - - if(data_valid_countdown[15:0] >= vio_PrecessTime[15:0]-16'd96 && data_valid_countdown[15:0] < vio_PrecessTime[15:0]) - begin - SPI_SYN_F <= 1'b0; - SPI_MOSI_F <= RF_CtrlWord_running[95]; - end - else - begin - SPI_SYN_F <= 1'b1; - SPI_MOSI_F <= 1'b0; - end - - - if(data_valid_countdown[15:0] <= 16'd128 && data_valid_countdown[15:0] > 16'd80) - CAL_F <= 1'b1; - else - CAL_F <= 1'b0; - - if(data_valid_countdown[15:0] <= 16'd48 && data_valid_countdown[15:0] > 16'd0) - begin - TP_EN_F <= 1'b1; - TR_MGC_F <= 1'b1; - end - else - begin - TP_EN_F <= 1'b0; - TR_MGC_F <= 1'b0; - end - - if(data_valid_countdown[15:0] == 16'd48) - PRF <= vio_trdirection; - else - PRF <= PRF; - - if(sys_rst) - rst_countdown[15:0] <= 16'd100; - else if(rst_countdown[15:0] != 0) - begin - rst_countdown[15:0] <= rst_countdown[15:0] - 16'd1; - rst_n <= 1'b0; - end - else - begin - rst_countdown[15:0] <= rst_countdown[15:0]; - rst_n <= 1'b1; - end - - // 天线控制 - if(data_valid_countdown[15:0] == vio_PrecessTime[15:0]) - Ant_CtrlWord_running[127:0] <= Ant_CtrlWord[127:0]; - else - Ant_CtrlWord_running[127:0] <= {Ant_CtrlWord_running[126:0],1'b0}; - - if(data_valid_countdown[15:0] >= vio_PrecessTime[15:0]-16'd128 && data_valid_countdown[15:0] < vio_PrecessTime[15:0]) - begin - Ant_EN <= 1'b0; - Ant_DATA <= Ant_CtrlWord_running[127]; - end - else - begin - Ant_EN <= 1'b1; - Ant_DATA <= 1'b0; - end - - if(data_valid_countdown[15:0] <= 16'd48 && data_valid_countdown[15:0] > 16'd0) - Ant_DARY <= 1'b0; - else - Ant_DARY <= 1'b1; - - if(data_valid_countdown[15:0] == 16'd48) - Ant_TR <= vio_trdirection; - else - Ant_TR <= Ant_TR; - end - - -//RF recv_data -reg [1:0] state_rfdata; -reg SPI_SYN_F_d1 = 1'b0; -reg [15:0] cnt_rfdata = 16'd0; -reg [95:0] RF_RecvWord = 96'd0; -reg [95:0] RF_RecvWord_last = 96'd0; - -reg [7:0] RF_temperature = 8'd0 ; -reg [7:0] RF_IFlocked = 8'd0 ; -reg [7:0] RF_RFAlocked = 8'd0 ; -reg [7:0] RF_RFBlocked = 8'd0 ; -reg [3:0] RF_ch1mgc = 4'd0 ; -reg [3:0] RF_ch2mgc = 4'd0 ; -reg [3:0] RF_ch3mgc = 4'd0 ; -reg [3:0] RF_ch4mgc = 4'd0 ; -reg [31:0] RF_Framecount = 32'd0 ; - -always @ (posedge clk_48m) begin - if(sys_rst) begin - state_rfdata[1:0] <= 2'd0; - SPI_SYN_F_d1 <= 1'b0; - RF_RecvWord[95:0] <= 96'd0; - cnt_rfdata[15:0] <= 16'd0; - RF_temperature[7:0] <= 8'd0 ; - RF_IFlocked[7:0] <= 8'd0 ; - RF_RFAlocked[7:0] <= 8'd0 ; - RF_RFBlocked[7:0] <= 8'd0 ; - RF_ch1mgc[3:0] <= 4'd0 ; - RF_ch2mgc[3:0] <= 4'd0 ; - RF_ch3mgc[3:0] <= 4'd0 ; - RF_ch4mgc[3:0] <= 4'd0 ; - RF_Framecount[31:0] <= 32'd0; - end - else begin - RF_RecvWord[95:0] <= {RF_RecvWord[94:0],SPI_MISO_F}; - - if (RF_RecvWord[95:88] == 8'hAA && RF_RecvWord[7:0] == 8'hCC) begin//校验帧头帧尾 - RF_temperature[7:0] <= RF_RecvWord[87:80]; - RF_IFlocked[7:0] <= RF_RecvWord[79:72]; - RF_RFAlocked[7:0] <= RF_RecvWord[71:64]; - RF_RFBlocked[7:0] <= RF_RecvWord[63:56]; - RF_ch1mgc[3:0] <= RF_RecvWord[55:52]; - RF_ch2mgc[3:0] <= RF_RecvWord[51:48]; - RF_ch3mgc[3:0] <= RF_RecvWord[47:44]; - RF_ch4mgc[3:0] <= RF_RecvWord[43:40]; - RF_Framecount[31:0] <= RF_RecvWord[39:8]; - RF_RecvWord_last <= RF_RecvWord; - end - else begin // hold otherwise - RF_temperature[7:0] <= RF_temperature[7:0]; - RF_IFlocked[7:0] <= RF_IFlocked[7:0] ; - RF_RFAlocked[7:0] <= RF_RFAlocked[7:0] ; - RF_RFBlocked[7:0] <= RF_RFBlocked[7:0] ; - RF_ch1mgc[3:0] <= RF_ch1mgc[3:0] ; - RF_ch2mgc[3:0] <= RF_ch2mgc[3:0] ; - RF_ch3mgc[3:0] <= RF_ch3mgc[3:0] ; - RF_ch4mgc[3:0] <= RF_ch4mgc[3:0] ; - RF_Framecount[31:0] <= RF_Framecount[31:0]; - RF_RecvWord_last <= RF_RecvWord_last; - end - end -end -// å¤©çº¿çš„è¾“å‡ºæ—¶é’Ÿè½¬æ¢ -reg Ant_dclk_96m = 1; -wire [3:0] fifo_wr_din, fifo_rd_dout; -wire fifo_full, fifo_empty; -reg Ant_EN_96m = 0; -reg Ant_DATA_96m = 0; -reg Ant_DARY_96m = 1; -reg Ant_TR_96m = 0; -assign fifo_wr_din[3] = Ant_EN; -assign fifo_wr_din[2] = Ant_DATA; -assign fifo_wr_din[1] = Ant_DARY; -assign fifo_wr_din[0] = Ant_TR; -reg fifo_rd_en = 0; -reg fifo_rst = 0; -reg [8:0] Ant_clk_countdown = 0; -always @(posedge clk_96m) - begin - fifo_rst <= sys_rst; - - fifo_rd_en <= (fifo_rst == 1'b1)? 1'b0:!fifo_rd_en; - - if(fifo_rd_en) - {Ant_EN_96m,Ant_DATA_96m,Ant_DARY_96m,Ant_TR_96m} <= fifo_rd_dout[3:0]; - else - {Ant_EN_96m,Ant_DATA_96m,Ant_DARY_96m,Ant_TR_96m} <= {Ant_EN_96m,Ant_DATA_96m,Ant_DARY_96m,Ant_TR_96m}; - - if(fifo_rd_en && Ant_EN_96m && !fifo_rd_dout[3]) - Ant_clk_countdown[8:0] <= 9'd276; - else if(Ant_clk_countdown[8:0] != 9'd0) - Ant_clk_countdown[8:0] <= Ant_clk_countdown[8:0] - 9'd1; - else - Ant_clk_countdown[8:0] <= Ant_clk_countdown[8:0]; - end -assign ant_clk = !Ant_clk_countdown[0]; -assign ant_en = Ant_EN_96m; -assign ant_data = Ant_DATA_96m; -assign ant_tr = Ant_TR_96m; -assign ant_dary = Ant_DARY_96m; - -fifo_AntCtrl fifo_AntCtrl -( - .rst (fifo_rst ), // input wire rst - .wr_clk (clk_48m ), // input wire wr_clk - .rd_clk (clk_96m ), // input wire rd_clk - .din (fifo_wr_din[3:0] ), // input wire [3 : 0] din - .wr_en (!fifo_rst ), // input wire wr_en - .rd_en (fifo_rd_en ), // input wire rd_en - .dout (fifo_rd_dout[3:0] ), // output wire [3 : 0] dout - .full (fifo_full ), // output wire full - .empty (fifo_empty ) // output wire empty -); -//Ant recv_data -reg [1:0] state_antdata; -reg Ant_EN_96m_d1 = 1'b0; -reg [15:0] cnt_antdata = 16'd0; -reg [95:0] Ant_RecvWord = 'b0; -reg [95:0] Ant_RecvWord_last = 'b0; - -reg [7:0] Ant_Ant_Volt = 8'd0 ; -reg [7:0] Ant_RF_Volt = 8'd0 ; -reg [7:0] Ant_IF_Volt = 8'd0 ; -reg [7:0] Ant_state = 8'd0 ; -reg [31:0] Ant_Framecount = 32'd0 ; - -always @ (posedge clk_96m) begin - if(sys_rst) begin - state_antdata[1:0] <= 2'd0; - Ant_EN_96m_d1 <= 1'b0; - Ant_RecvWord[95:0] <= 'd0; - cnt_antdata[15:0] <= 16'd0; - Ant_Ant_Volt[7:0] <= 8'd0 ; - Ant_RF_Volt[7:0] <= 8'd0 ; - Ant_IF_Volt[7:0] <= 8'd0 ; - Ant_state[7:0] <= 8'd0 ; - Ant_Framecount[31:0] <= 32'd0; - end - else begin - Ant_RecvWord[95:0] <= {Ant_RecvWord[94:0],ant_dout}; - - if(Ant_RecvWord[95:88] == 8'hAA && Ant_RecvWord[7:0] == 8'hCC) begin//校验帧头帧尾 - Ant_Ant_Volt[7:0] <= Ant_RecvWord[87:80]; - Ant_RF_Volt[7:0] <= Ant_RecvWord[79:72]; - Ant_IF_Volt[7:0] <= Ant_RecvWord[71:64]; - Ant_state[7:0] <= Ant_RecvWord[47:40]; - Ant_Framecount[31:0] <= Ant_RecvWord[39:8] ; - Ant_RecvWord_last <= Ant_RecvWord ; - end - else begin // hold otherwise - Ant_Ant_Volt[7:0] <= Ant_Ant_Volt[7:0] ; - Ant_RF_Volt[7:0] <= Ant_RF_Volt[7:0] ; - Ant_IF_Volt[7:0] <= Ant_IF_Volt[7:0] ; - Ant_state[7:0] <= Ant_state[7:0] ; - Ant_Framecount[31:0] <= Ant_Framecount[31:0] ; - Ant_RecvWord_last <= Ant_RecvWord_last ; - end - end - -end -Sisyif uut( - .clk_40m(clk_32m), - .clk_20m(clk_19p2m), - .SPI_CLK_F(clk_48m), - .rst_n(rst_n), - .SPI_SYN_F(SPI_SYN_F), - .SPI_MOSI_F(SPI_MOSI_F), - .SPI_MISO_F(SPI_MISO_F), - .TP_EN_F(TP_EN_F), - .TR_MGC_F(TR_MGC_F), - .CAL_F(CAL_F), - .PRF(PRF), - .standby(rf_standby), - .SW_PLL(rf_sw_pll), - .T(rf_t), - .R(rf_r), - .SW_BPF(rf_sw_bpf), - .SCLK1(rf_sclk1), - .SDIO1(rf_sdio1), - .CS1(rf_cs1), - .LD1(rf_ld1), - .SCLK2(rf_sclk2), - .SDIO2(rf_sdio2), - .CS2(rf_cs2), - .LD2(rf_ld2), - .SCLK3(rf_sclk3), - .SDIO3(rf_sdio3), - .CS3(rf_cs3), - .LD3(rf_ld3), - .TMGC_16db(rf_tmgc_16), - .TMGC_8db(rf_tmgc_8), - .TMGC_4db(rf_tmgc_4), - .TMGC_2db(rf_tmgc_2), - .TMGC_1db(rf_tmgc_1), - .RMGC_16db(rf_rmgc_16), - .RMGC_8db(rf_rmgc_8), - .RMGC_4db(rf_rmgc_4), - .RMGC_2db(rf_rmgc_2), - .RMGC_1db(rf_rmgc_1), - .ENABLE(rf_enable), - .SC(rf_sc), - .SD(rf_sd), - .END_SYN(rf_endsyn), - .SDOUT(rf_sdout), - .DQ_WD(rf_dq_wd), - .SW_RX(rf_sw_rx) - ); - -endmodule diff --git a/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/sources_1/new/hdwr/ad9361_phase_cal_coarse.v b/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/sources_1/new/hdwr/ad9361_phase_cal_coarse.v deleted file mode 100644 index fcfba60..0000000 --- a/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/sources_1/new/hdwr/ad9361_phase_cal_coarse.v +++ /dev/null @@ -1,443 +0,0 @@ -`timescale 1ns / 1ps -////////////////////////////////////////////////////////////////////////////////// -// Company: -// Engineer: -// _ _ ____ -// | | ___ ___| |__ / ___| __ _ ___ -// _ | |/ _ \/ __| '_ \ | | _ / _` |/ _ \ -// | |_| | (_) \__ \ | | | | |_| | (_| | (_) | -// \___/ \___/|___/_| |_| \____|\__,_|\___/ -// -// Create Date: 2022/09/14 16:45:10 -// Last Modified Data: 2023/02/12 17:10 -// Design Name: -// Module Name: ad9361_phase_cal_coarse -// Project Name: -// Target Devices: -// Tool Versions: -// Description: -// -// Dependencies: -// -// Revision: -// 2022/09/14 16:45:10 - File Created -// 2023/02/12 17:10 - 修改：校准未完æˆæ—¶ï¼Œå°†è¾“入信å·å¯„存输出。 -// Additional Comments: -// -////////////////////////////////////////////////////////////////////////////////// - - -module ad9361_phase_cal_coarse -#( - parameter COUNTER_MOD = 48, - parameter PEAK_POS = 12, - parameter ADC_DATA_WIDTH = 12 -) -( - // clock & reset - input clk , - input rst , - // control interface - input ad9361_1_cal_start , - output ad9361_1_cal_done , - input ad9361_2_cal_start , - output ad9361_2_cal_done , - output ad9361_cal_result , - output ad9361_cal_valid , - input ad9361_recal , - // input data interface - input [ADC_DATA_WIDTH-1:0] rx_ch1_i , - input [ADC_DATA_WIDTH-1:0] rx_ch1_q , - input [ADC_DATA_WIDTH-1:0] rx_ch2_i , - input [ADC_DATA_WIDTH-1:0] rx_ch2_q , - input [ADC_DATA_WIDTH-1:0] rx_ch3_i , - input [ADC_DATA_WIDTH-1:0] rx_ch3_q , - input [ADC_DATA_WIDTH-1:0] rx_ch4_i , - input [ADC_DATA_WIDTH-1:0] rx_ch4_q , - // output data interface - output [ADC_DATA_WIDTH-1:0] rx_cal_ch1_i, - output [ADC_DATA_WIDTH-1:0] rx_cal_ch1_q, - output [ADC_DATA_WIDTH-1:0] rx_cal_ch2_i, - output [ADC_DATA_WIDTH-1:0] rx_cal_ch2_q, - output [ADC_DATA_WIDTH-1:0] rx_cal_ch3_i, - output [ADC_DATA_WIDTH-1:0] rx_cal_ch3_q, - output [ADC_DATA_WIDTH-1:0] rx_cal_ch4_i, - output [ADC_DATA_WIDTH-1:0] rx_cal_ch4_q -); - -localparam STATE_IDLE = 2'd0; -localparam STATE_CAL_1 = 2'd1; -localparam STATE_CAL_2 = 2'd2; -localparam STATE_DONE = 2'd3; - -// buffer input control signals -reg ad9361_1_cal_start_d1 = 'b0; -reg ad9361_1_cal_start_d2 = 'b0; -reg ad9361_2_cal_start_d1 = 'b0; -reg ad9361_2_cal_start_d2 = 'b0; -reg ad9361_recal_d1 = 'b0; -reg ad9361_recal_d2 = 'b0; - -always @(posedge clk) begin - ad9361_1_cal_start_d1 <= ad9361_1_cal_start; - ad9361_1_cal_start_d2 <= ad9361_1_cal_start_d1; - - ad9361_2_cal_start_d1 <= ad9361_2_cal_start; - ad9361_2_cal_start_d2 <= ad9361_2_cal_start_d1; - - ad9361_recal_d1 <= ad9361_recal; - ad9361_recal_d2 <= ad9361_recal_d1; -end - -// center state machine -reg [ 1:0] curr_state = STATE_IDLE; - -always @(posedge clk) begin - if (rst) begin - curr_state <= STATE_IDLE; - end - else begin - case (curr_state) - STATE_IDLE: begin - // move to next state when [ad9361_1_cal_start] asserts - curr_state <= ad9361_1_cal_start_d2 ? STATE_CAL_1 : STATE_IDLE; - end - STATE_CAL_1: begin - // move to next state when 1st cal finishes [ad9361_2_cal_start] asserts - curr_state <= (ad9361_1_cal_done && ad9361_2_cal_start_d2) ? STATE_CAL_2 : STATE_CAL_1; - end - STATE_CAL_2: begin - // move to next state when 2nd cal finishes - curr_state <= ad9361_2_cal_done ? STATE_DONE : STATE_CAL_2; - end - STATE_DONE: begin - // move to ILDA state when it needs to recal - curr_state <= (ad9361_recal_d2) ? STATE_IDLE : STATE_DONE; - end - default: begin - curr_state <= STATE_IDLE; - end - endcase - end -end - -// -reg rx_ch2_i_msb_d1 = 'b0; -reg cnt_start = 'b0; -reg cnt_start_flag = 'b0; -reg [$clog2(COUNTER_MOD)-1:0] cnt = 'b0; -reg [ADC_DATA_WIDTH-1:0] rx_ch2_i_rec = 'b0; -reg rx_ch2_i_rec_flag = 'b0; - -assign ad9361_1_cal_done = rx_ch2_i_rec_flag; - -always @(posedge clk) begin - if (rst) begin - rx_ch2_i_msb_d1 <= 'b0; - end - else if (curr_state == STATE_IDLE) begin - // reset at IDLE state - rx_ch2_i_msb_d1 <= 'b0; - end - else if (curr_state == STATE_CAL_1) begin - rx_ch2_i_msb_d1 <= rx_ch2_i[ADC_DATA_WIDTH-1]; - end - else begin - rx_ch2_i_msb_d1 <= rx_ch2_i_msb_d1; - end -end - -always @(posedge clk) begin - if (rst) begin - cnt_start <= 'b0; - end - else if (curr_state == STATE_IDLE) begin - // reset at IDLE state - cnt_start <= 'b0; - end - else if (curr_state == STATE_CAL_1 && ~cnt_start) begin - // assert when the 1st falling edge of msb of rx_ch2_i is detected - cnt_start <= (rx_ch2_i_msb_d1 & ~rx_ch2_i[ADC_DATA_WIDTH-1]) ? 1'b1 : 1'b0; - end - else begin - cnt_start <= cnt_start; - end -end - -always @(posedge clk) begin - if (rst) begin - cnt <= 'b0; - end - else if (curr_state == STATE_IDLE) begin - // reset at IDLE state - cnt <= 'b0; - end - else if (cnt_start) begin - cnt <= (cnt == COUNTER_MOD - 1) ? 'b0 : cnt + 1'b1; - end - else begin - cnt <= cnt; - end -end - -always @(posedge clk) begin - if (rst) begin - rx_ch2_i_rec <= 'b0; - rx_ch2_i_rec_flag <= 'b0; - end - else if (curr_state == STATE_IDLE) begin - // reset at IDLE state - rx_ch2_i_rec <= 'b0; - rx_ch2_i_rec_flag <= 'b0; - end - else if (curr_state == STATE_CAL_1 && cnt == PEAK_POS && ~rx_ch2_i_rec_flag) begin - rx_ch2_i_rec <= rx_ch2_i; - rx_ch2_i_rec_flag <= 1'b1; - end - else begin - rx_ch2_i_rec <= rx_ch2_i_rec; - rx_ch2_i_rec_flag <= rx_ch2_i_rec_flag; - end -end - -// -reg [ADC_DATA_WIDTH-1:0] rx_ch4_i_rec = 'b0; -reg rx_ch4_i_rec_flag = 'b0; - -assign ad9361_2_cal_done = rx_ch4_i_rec_flag; - -always @(posedge clk) begin - if (rst) begin - rx_ch4_i_rec <= 'b0; - rx_ch4_i_rec_flag <= 'b0; - end - else if (curr_state == STATE_IDLE) begin - // reset at IDLE state - rx_ch4_i_rec <= 'b0; - rx_ch4_i_rec_flag <= 'b0; - end - else if (curr_state == STATE_CAL_2 && cnt == COUNTER_MOD/4 && ~rx_ch4_i_rec_flag) begin - rx_ch4_i_rec <= rx_ch4_i; - rx_ch4_i_rec_flag <= 1'b1; - end - else begin - rx_ch4_i_rec <= rx_ch4_i_rec; - rx_ch4_i_rec_flag <= rx_ch4_i_rec_flag; - end -end - - -reg ad9361_cal_valid_buf = 'b0; -reg ad9361_cal_result_buf = 'b0; -reg [ADC_DATA_WIDTH-1:0] rx_cal_ch1_i_buf = 'b0; -reg [ADC_DATA_WIDTH-1:0] rx_cal_ch2_i_buf = 'b0; -reg [ADC_DATA_WIDTH-1:0] rx_cal_ch3_i_buf = 'b0; -reg [ADC_DATA_WIDTH-1:0] rx_cal_ch4_i_buf = 'b0; -reg [ADC_DATA_WIDTH-1:0] rx_cal_ch1_q_buf = 'b0; -reg [ADC_DATA_WIDTH-1:0] rx_cal_ch2_q_buf = 'b0; -reg [ADC_DATA_WIDTH-1:0] rx_cal_ch3_q_buf = 'b0; -reg [ADC_DATA_WIDTH-1:0] rx_cal_ch4_q_buf = 'b0; - -assign ad9361_cal_valid = ad9361_cal_valid_buf; -assign ad9361_cal_result = ad9361_cal_result_buf; -assign rx_cal_ch1_i = rx_cal_ch1_i_buf; -assign rx_cal_ch2_i = rx_cal_ch2_i_buf; -assign rx_cal_ch3_i = rx_cal_ch3_i_buf; -assign rx_cal_ch4_i = rx_cal_ch4_i_buf; -assign rx_cal_ch1_q = rx_cal_ch1_q_buf; -assign rx_cal_ch2_q = rx_cal_ch2_q_buf; -assign rx_cal_ch3_q = rx_cal_ch3_q_buf; -assign rx_cal_ch4_q = rx_cal_ch4_q_buf; - -always @(posedge clk) begin - if (rst) begin - ad9361_cal_valid_buf <= 'b0; - ad9361_cal_result_buf <= 'b0; - rx_cal_ch1_i_buf <= 'b0; - rx_cal_ch2_i_buf <= 'b0; - rx_cal_ch3_i_buf <= 'b0; - rx_cal_ch4_i_buf <= 'b0; - rx_cal_ch1_q_buf <= 'b0; - rx_cal_ch2_q_buf <= 'b0; - rx_cal_ch3_q_buf <= 'b0; - rx_cal_ch4_q_buf <= 'b0; - end - else if (curr_state == STATE_DONE) begin - ad9361_cal_valid_buf <= 1'b1; - - if (rx_ch2_i_rec[ADC_DATA_WIDTH-1] == rx_ch4_i_rec[ADC_DATA_WIDTH-1]) begin - ad9361_cal_result_buf <= 'b0; - rx_cal_ch1_i_buf <= rx_ch1_i; - rx_cal_ch2_i_buf <= -rx_ch2_i; - rx_cal_ch3_i_buf <= rx_ch3_i; - rx_cal_ch4_i_buf <= -rx_ch4_i; - rx_cal_ch1_q_buf <= rx_ch1_q; - rx_cal_ch2_q_buf <= -rx_ch2_q; - rx_cal_ch3_q_buf <= rx_ch3_q; - rx_cal_ch4_q_buf <= -rx_ch4_q; - end - else begin - ad9361_cal_result_buf <= 'b1; - rx_cal_ch1_i_buf <= rx_ch1_i; - rx_cal_ch2_i_buf <= -rx_ch2_i; - rx_cal_ch3_i_buf <= -rx_ch3_i; - rx_cal_ch4_i_buf <= rx_ch4_i; - rx_cal_ch1_q_buf <= rx_ch1_q; - rx_cal_ch2_q_buf <= -rx_ch2_q; - rx_cal_ch3_q_buf <= -rx_ch3_q; - rx_cal_ch4_q_buf <= rx_ch4_q; - end - end - else begin - ad9361_cal_valid_buf <= 1'b0; - ad9361_cal_result_buf <= ad9361_cal_result_buf; - rx_cal_ch1_i_buf <= rx_ch1_i; - rx_cal_ch2_i_buf <= rx_ch2_i; - rx_cal_ch3_i_buf <= rx_ch3_i; - rx_cal_ch4_i_buf <= rx_ch4_i; - rx_cal_ch1_q_buf <= rx_ch1_q; - rx_cal_ch2_q_buf <= rx_ch2_q; - rx_cal_ch3_q_buf <= rx_ch3_q; - rx_cal_ch4_q_buf <= rx_ch4_q; - end -end - -endmodule - - -////////////////////////////////////////////////////////////////////////////////// -// Company: -// Engineer: -// _ _ ____ -// | | ___ ___| |__ / ___| __ _ ___ -// _ | |/ _ \/ __| '_ \ | | _ / _` |/ _ \ -// | |_| | (_) \__ \ | | | | |_| | (_| | (_) | -// \___/ \___/|___/_| |_| \____|\__,_|\___/ -// -// Create Date: 2022/09/15 11:12:45 -// Last Modified Data: 2022/11/02 -// Design Name: -// Module Name: tb_ad9361_cal_coarse -// Project Name: -// Target Devices: -// Tool Versions: -// Description: testbench for [ad9361_phase_cal_coarse] -// -// Dependencies: -// -// Revision: -// Revision 0.01 - File Created -// Additional Comments: -// -////////////////////////////////////////////////////////////////////////////////// - - -// module tb_ad9361_cal_coarse; - -// reg clk = 'b0; -// reg rst = 1'b1; - -// reg ad9361_1_cal_start = 'b0; -// wire ad9361_1_cal_done ; -// reg ad9361_2_cal_start = 'b0; -// wire ad9361_2_cal_done ; -// wire ad9361_cal_result ; -// wire ad9361_cal_valid; -// reg ad9361_recal = 'b0; - -// // phase difference of 180 degree -// reg [11:0] rx_ch1_i = 12'd2047; -// reg [11:0] rx_ch1_q = 12'd2047; -// reg [11:0] rx_ch2_i = -12'd2047; -// reg [11:0] rx_ch2_q = -12'd2047; -// reg [11:0] rx_ch3_q = -12'd2047; -// reg [11:0] rx_ch3_i = -12'd2047; -// reg [11:0] rx_ch4_i = 12'd2047; -// reg [11:0] rx_ch4_q = 12'd2047; - -// wire [11:0] rx_cal_ch1_i; -// wire [11:0] rx_cal_ch2_i; -// wire [11:0] rx_cal_ch3_i; -// wire [11:0] rx_cal_ch4_i; -// wire [11:0] rx_cal_ch1_q; -// wire [11:0] rx_cal_ch2_q; -// wire [11:0] rx_cal_ch3_q; -// wire [11:0] rx_cal_ch4_q; - -// ad9361_phase_cal #( -// .COUNTER_MOD (48), -// .PEAK_POS (12) -// ) u_ad9361_phase_cal -// ( -// // clock & reset -// .clk (clk ), // input clk -// .rst (rst ), // input rst -// // control interface -// .ad9361_1_cal_start (ad9361_1_cal_start ), // input ad9361_1_cal_start -// .ad9361_1_cal_done (ad9361_1_cal_done ), // output ad9361_1_cal_done -// .ad9361_2_cal_start (ad9361_2_cal_start ), // input ad9361_2_cal_start -// .ad9361_2_cal_done (ad9361_2_cal_done ), // output ad9361_2_cal_done -// .ad9361_cal_result (ad9361_cal_result ), // output ad9361_cal_result -// .ad9361_cal_valid (ad9361_cal_valid ), // output ad9361_cal_valid -// .ad9361_recal (ad9361_recal ), // input ad9361_recal -// // input data interface -// .rx_ch1_i (rx_ch1_i ), // input [11:0] rx_ch1_i -// .rx_ch2_i (rx_ch2_i ), // input [11:0] rx_ch2_i -// .rx_ch3_i (rx_ch3_i ), // input [11:0] rx_ch3_i -// .rx_ch4_i (rx_ch4_i ), // input [11:0] rx_ch4_i -// .rx_ch1_q (rx_ch1_q ), // input [11:0] rx_ch1_q -// .rx_ch2_q (rx_ch2_q ), // input [11:0] rx_ch2_q -// .rx_ch3_q (rx_ch3_q ), // input [11:0] rx_ch3_q -// .rx_ch4_q (rx_ch4_q ), // input [11:0] rx_ch4_q -// // output data interface -// .rx_cal_ch1_i (rx_cal_ch1_i ), // output [11:0] rx_cal_ch1_i -// .rx_cal_ch2_i (rx_cal_ch2_i ), // output [11:0] rx_cal_ch2_i -// .rx_cal_ch3_i (rx_cal_ch3_i ), // output [11:0] rx_cal_ch3_i -// .rx_cal_ch4_i (rx_cal_ch4_i ), // output [11:0] rx_cal_ch4_i -// .rx_cal_ch1_q (rx_cal_ch1_q ), // output [11:0] rx_cal_ch1_q -// .rx_cal_ch2_q (rx_cal_ch2_q ), // output [11:0] rx_cal_ch2_q -// .rx_cal_ch3_q (rx_cal_ch3_q ), // output [11:0] rx_cal_ch3_q -// .rx_cal_ch4_q (rx_cal_ch4_q ) // output [11:0] rx_cal_ch4_q -// ); - -// initial begin -// #102 -// rst = 1'b0; -// #100 -// ad9361_1_cal_start = 1'b1; -// end - -// initial begin -// #10000 -// ad9361_recal = 1'b1; -// #20 -// ad9361_recal = 1'b0; -// end - -// always begin -// #2 clk = ~clk; -// end - -// always begin -// #72 -// rx_ch1_i = ~rx_ch1_i; -// rx_ch2_i = ~rx_ch2_i; -// rx_ch3_i = ~rx_ch3_i; -// rx_ch4_i = ~rx_ch4_i; -// #24 -// rx_ch1_q = ~rx_ch1_q; -// rx_ch2_q = ~rx_ch2_q; -// rx_ch3_q = ~rx_ch3_q; -// rx_ch4_q = ~rx_ch4_q; -// end - -// always @(posedge clk) begin -// if (ad9361_1_cal_done) begin -// ad9361_2_cal_start <= 1'b1; -// end -// else begin -// ad9361_2_cal_start <= 1'b0; -// end -// end - -// endmodule diff --git a/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/sources_1/new/hdwr/clk_dist.v b/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/sources_1/new/hdwr/clk_dist.v deleted file mode 100644 index 8dfb48e..0000000 --- a/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/sources_1/new/hdwr/clk_dist.v +++ /dev/null @@ -1,133 +0,0 @@ -`timescale 1ns / 1ps -////////////////////////////////////////////////////////////////////////////////// -// Company: -// Engineer: -// _ _ ____ -// | | ___ ___| |__ / ___| __ _ ___ -// _ | |/ _ \/ __| '_ \ | | _ / _` |/ _ \ -// | |_| | (_) \__ \ | | | | |_| | (_| | (_) | -// \___/ \___/|___/_| |_| \____|\__,_|\___/ -// -// Create Date: 2022/11/01 11:15:25 -// Design Name: -// Module Name: clk_dist -// Project Name: -// Target Devices: -// Tool Versions: -// Description: Clock distribution module -// -// Dependencies: -// -// Revision: -// Revision 0.01 - File Created -// Additional Comments: -// -////////////////////////////////////////////////////////////////////////////////// - - -module clk_dist -( - // input clocks - input clk_250m_p , // generated by ad9516, 250mhz - input clk_250m_n , - input ad9361_1_rx_data_clk, // ad9361 rx data clock, 83.3333mhz - input ad9361_2_rx_data_clk, // ad9361 rx data clock, 83.3333mhz - - // output clocks & reset - // global reset - output sys_rst , // global reset signal, active high - output ant_rst , // phased-array & rf control reset signal, active high - - // pl signal processing clock - output sys_clk , // 41.6667mhz - output sys_clk_2x , // 83.3333mhz - output sys_clk_3x , // 125mhz - output sys_clk_4x , // 166.6667mhz - output sys_clk_ld , // system main clock locked indicator - - // ad9361-1 clocks - output ad9361_1_clk , // 41.6667mhz - output ad9361_1_clk_2x , // 83.3333mhz - output ad9361_1_clk_3x , // 125mhz - output ad9361_1_clk_4x , // 166.6667mhz - output ad9361_1_clk_ld , // ad9361-1 clock group locked indicator - - // ad9361-2 clocks - output ad9361_2_clk , // 41.6667mhz - output ad9361_2_clk_2x , // 83.3333mhz - output ad9361_2_clk_3x , // 125mhz - output ad9361_2_clk_4x , // 166.6667mhz - output ad9361_2_clk_ld , // ad9361-2 clock group locked indicator - - // phased-array & rf control clocks - output clk_96m , - output clk_48m , - output clk_32m , - output clk_19p2m -); - -assign sys_clk = ad9361_1_clk ; -assign sys_clk_2x = ad9361_1_clk_2x; -assign sys_clk_3x = ad9361_1_clk_3x; -assign sys_clk_4x = ad9361_1_clk_4x; -assign sys_clk_ld = ad9361_1_clk_ld; - -assign sys_rst = ~sys_clk_ld; - -ad9361_clk_gen_cmos_2t2r u_ad9361_1_clk_gen -( - // Clock out ports - .clk_out1 (ad9361_1_clk ), // output clk_out1 - .clk_out2 (ad9361_1_clk_2x ), // output clk_out2 - .clk_out3 (ad9361_1_clk_3x ), // output clk_out3 - .clk_out4 (ad9361_1_clk_4x ), // output clk_out4 - // Status and control signals - .locked (ad9361_1_clk_ld ), // output locked - // Clock in ports - .clk_in1 (ad9361_1_rx_data_clk ) // input clk_in1 -); - -ad9361_clk_gen_cmos_2t2r u_ad9361_2_clk_gen -( - // Clock out ports - .clk_out1 (ad9361_2_clk ), // output clk_out1 - .clk_out2 (ad9361_2_clk_2x ), // output clk_out2 - .clk_out3 (ad9361_2_clk_3x ), // output clk_out3 - .clk_out4 (ad9361_2_clk_4x ), // output clk_out4 - // Status and control signals - .locked (ad9361_2_clk_ld ), // output locked - // Clock in ports - .clk_in1 (ad9361_2_rx_data_clk ) // input clk_in1 -); - -wire ant_clk_stg1_96m; -wire ant_clk_stg1_ld; -wire ant_clk_stg2_ld; - -assign ant_rst = ~ant_clk_stg2_ld; - -ant_clk_gen_stg1 u_ant_clk_gen_stg1 -( - // Clock out ports - .clk_out1 (ant_clk_stg1_96m ), // output clk_out1 - // Status and control signals - .locked (ant_clk_stg1_ld ), // output locked - // Clock in ports - .clk_in1_p (clk_250m_p ), // input clk_in1_p - .clk_in1_n (clk_250m_n ) // input clk_in1_n -); - -ant_clk_gen_stg2 u_ant_clk_gen_stg2 -( - // Clock out ports - .clk_out1 (clk_96m ), // output clk_out1 - .clk_out2 (clk_48m ), // output clk_out2 - .clk_out3 (clk_32m ), // output clk_out3 - .clk_out4 (clk_19p2m ), // output clk_out4 - // Status and control signals - .locked (ant_clk_stg2_ld ), // output locked - // Clock in ports - .clk_in1 (ant_clk_stg1_96m ) // input clk_in1 -); - -endmodule diff --git a/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/sources_1/new/system_top.v b/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/sources_1/new/system_top.v deleted file mode 100644 index 25a6480..0000000 --- a/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/sources_1/new/system_top.v +++ /dev/null @@ -1,784 +0,0 @@ -`timescale 1ns / 1ps -////////////////////////////////////////////////////////////////////////////////// -// Company: -// Engineer: -// _ _ ____ -// | | ___ ___| |__ / ___| __ _ ___ -// _ | |/ _ \/ __| '_ \ | | _ / _` |/ _ \ -// | |_| | (_) \__ \ | | | | |_| | (_| | (_) | -// \___/ \___/|___/_| |_| \____|\__,_|\___/ -// -// Create Date: 2021/12/14 15:54:11 -// Design Name: -// Module Name: system_top -// Project Name: -// Target Devices: -// Tool Versions: -// Description: -// -// Dependencies: -// -// Revision: -// Revision 0.01 - File Created -// Additional Comments: -// -////////////////////////////////////////////////////////////////////////////////// - - -module system_top -( - /*************************************************************************** - * Contents - * 01. Clocks - * 02. HMC7044 Interface - * 03. AD9361-1 Interface - * 04. AD9361-2 Interface - * 05. Phased-Array Control - * 06. RF Synthesizer Control - * 07. Debug IO - * 08. DDR and Fixed-io (Do NOT Modify) - **************************************************************************/ - - // ************************************************************************* - // ******************************** Clocks ********************************* - // ************************************************************************* - // fpga logic clock - input clk_250m_p , // generated by hmc7044, 250mhz - input clk_250m_n , - // ad9361 buffered clock - input ad9361_1_buffer_clk , // derived from ad9361 input clock - input ad9361_2_buffer_clk , // derived from ad9361 input clock - // ************************************************************************* - // *************************** HMC7044 Interface *************************** - // ************************************************************************* - // spi interface - output hmc7044_spi_clk , - output hmc7044_spi_csn , - inout hmc7044_spi_sdio , - // control signals - output hmc7044_reset , // hmc7044 active-high reset signal, set to 0 in normal operation - output hmc7044_sync , // hmc7044 multichip synchronization signal, set to 0 if not used - // gpio - inout [ 3:0] hmc7044_gpio , - // ************************************************************************* - // ************************** AD9361-1 Interface *************************** - // ************************************************************************* - // rx data (rx channels are tied to ground physically) - input ad9361_1_rx_data_clk, // ad9361 rx data clock, 96mhz - input ad9361_1_rx_frame , - input [11:0] ad9361_1_rx_data , - // tx data - output ad9361_1_tx_fb_clk , - output ad9361_1_tx_frame , - output [11:0] ad9361_1_tx_data , - // spi interface - output ad9361_1_spi_clk , - output ad9361_1_spi_csn , - output ad9361_1_spi_mosi , - input ad9361_1_spi_miso , - // control signals - output ad9361_1_reset_b , // ad9361 active-low reset control - output ad9361_1_en_agc , // ad9361 manual agc control - output ad9361_1_enable , // ad9361 enable state machine pin control (spi control is also allowed) - output ad9361_1_txnrx , // ad9361 enable state machine pin control (spi control is also allowed) - input [ 3:0] ad9361_1_ctrl_in , - output [ 7:0] ad9361_1_ctrl_out , - output ad9361_sync , - // ************************************************************************* - // ************************** AD9361-2 Interface *************************** - // ************************************************************************* - // rx data (rx channels are tied to ground physically) - input ad9361_2_rx_data_clk, - input ad9361_2_rx_frame , - input [11:0] ad9361_2_rx_data , - // tx data - output ad9361_2_tx_fb_clk , - output ad9361_2_tx_frame , - output [11:0] ad9361_2_tx_data , - // spi interface - output ad9361_2_spi_clk , - output ad9361_2_spi_csn , - output ad9361_2_spi_mosi , - input ad9361_2_spi_miso , - // control signals - output ad9361_2_reset_b , // ad9361 active-low reset control - output ad9361_2_en_agc , // ad9361 manual agc control - output ad9361_2_enable , // ad9361 enable state machine pin control (spi control is also allowed) - output ad9361_2_txnrx , // ad9361 enable state machine pin control (spi control is also allowed) - input [ 3:0] ad9361_2_ctrl_in , - output [ 7:0] ad9361_2_ctrl_out , - // ************************************************************************* - // ************************* Phased-Array Control ************************** - // ************************************************************************* - output ant_clk , - output ant_en , - output ant_data , - output ant_tr , - output ant_dary , - input ant_dout , - // ************************************************************************* - // ************************ RF Synthesizer Control ************************* - // ************************************************************************* - output rf_standby , - output rf_sw_pll , - output rf_t , - output rf_r , - output rf_sw_bpf , - output rf_sclk1 , - output rf_sdio1 , - output rf_cs1 , - input rf_ld1 , - output rf_sclk2 , - output rf_sdio2 , - output rf_cs2 , - input rf_ld2 , - output rf_sclk3 , - output rf_sdio3 , - output rf_cs3 , - input rf_ld3 , - output rf_tmgc_16 , - output rf_tmgc_8 , - output rf_tmgc_4 , - output rf_tmgc_2 , - output rf_tmgc_1 , - output rf_rmgc_16 , - output rf_rmgc_8 , - output rf_rmgc_4 , - output rf_rmgc_2 , - output rf_rmgc_1 , - output rf_enable , - output rf_sc , - output rf_sd , - output rf_endsyn , - input rf_sdout , - inout rf_dq_wd , - output rf_sw_rx , - // ************************************************************************* - // ******************************* Debug IO ******************************** - // ************************************************************************* - // 3.3v ports - output uart1_txd , - input uart1_rxd , - output uart2_txd , - input uart2_rxd , - output uart3_txd , - input uart3_rxd , - // 1.8v ports - inout debug_io_1 , - inout debug_io_2 , - // 3.3v ports - inout debug_io_3 , - inout debug_io_4 , - inout debug_io_5 , - inout debug_io_6 , - inout debug_io_7 , - // ************************************************************************* - // ******************* DDR and Fixed-io (Do NOT Modify) ******************** - // ************************************************************************* - // ddr - inout [14:0] ddr_addr , - inout [ 2:0] ddr_ba , - inout ddr_cas_n , - inout ddr_ck_n , - inout ddr_ck_p , - inout ddr_cke , - inout ddr_cs_n , - inout [ 3:0] ddr_dm , - inout [31:0] ddr_dq , - inout [ 3:0] ddr_dqs_n , - inout [ 3:0] ddr_dqs_p , - inout ddr_odt , - inout ddr_ras_n , - inout ddr_reset_n , - inout ddr_we_n , - // fixed-io - inout fixed_io_ddr_vrn , - inout fixed_io_ddr_vrp , - inout [53:0] fixed_io_mio , - inout fixed_io_ps_clk , - inout fixed_io_ps_porb , - inout fixed_io_ps_srstb -); - - -//////////////////////////////////////////////////////////////////////////////// -/////////////////////////// System Clock Generation //////////////////////////// -//////////////////////////////////////////////////////////////////////////////// -// global reset -wire sys_rst ; // global reset signal, active high -wire ant_rst ; // phased-array & rf control reset signal, active high - -// pl signal processing clock -wire sys_clk ; // 48MHz 41.6667MHz -wire sys_clk_2x ; // 96MHz 83.3333MHz -wire sys_clk_3x ; // 144MHz 125MHz -wire sys_clk_4x ; // 192MHz 166.6667MHz -wire sys_clk_ld ; // system main clock locked indicator - -// ad9361-1 clocks -wire ad9361_1_clk ; // 48MHz 41.6667MHz -wire ad9361_1_clk_2x ; // 96MHz 83.3333MHz -wire ad9361_1_clk_3x ; // 144MHz 125MHz -wire ad9361_1_clk_4x ; // 192MHz 166.6667MHz -wire ad9361_1_clk_ld ; // ad9361-1 clock group locked indicator - -// ad9361-2 clocks -wire ad9361_2_clk ; // 48MHz 41.6667MHz -wire ad9361_2_clk_2x ; // 96MHz 83.3333MHz -wire ad9361_2_clk_3x ; // 144MHz 125MHz -wire ad9361_2_clk_4x ; // 192MHz 166.6667MHz -wire ad9361_2_clk_ld ; // ad9361-2 clock group locked indicator - -// phased-array & rf control clocks -wire clk_96m ; -wire clk_48m ; -wire clk_32m ; -wire clk_19p2m ; - -clk_dist u_clk_dist -( - // input clocks - .clk_250m_p (clk_250m_p ), // generated by ad9516, 250mhz - .clk_250m_n (clk_250m_n ), - .ad9361_1_rx_data_clk(ad9361_1_rx_data_clk), // ad9361 rx data clock, 83.3333mhz - .ad9361_2_rx_data_clk(ad9361_2_rx_data_clk), // ad9361 rx data clock, 83.3333mhz - - // output clocks & reset - // global reset - .sys_rst (sys_rst ), // global reset signal, active high - .ant_rst (ant_rst ), // phased-array & rf control reset signal, active high - - // pl signal processing clock - .sys_clk (sys_clk ), // 48MHz 41.6667MHz - .sys_clk_2x (sys_clk_2x ), // 96MHz 83.3333MHz - .sys_clk_3x (sys_clk_3x ), // 144MHz 125MHz - .sys_clk_4x (sys_clk_4x ), // 192MHz 166.6667MHz - .sys_clk_ld (sys_clk_ld ), // system main clock locked indicator - - // ad9361-1 clocks - .ad9361_1_clk (ad9361_1_clk ), // 48MHz 41.6667MHz - .ad9361_1_clk_2x (ad9361_1_clk_2x ), // 96MHz 83.3333MHz - .ad9361_1_clk_3x (ad9361_1_clk_3x ), // 144MHz 125MHz - .ad9361_1_clk_4x (ad9361_1_clk_4x ), // 192MHz 166.6667MHz - .ad9361_1_clk_ld (ad9361_1_clk_ld ), // ad9361-1 clock group locked indicator - - // ad9361-2 clocks - .ad9361_2_clk (ad9361_2_clk ), // 48MHz 41.6667MHz - .ad9361_2_clk_2x (ad9361_2_clk_2x ), // 96MHz 83.3333MHz - .ad9361_2_clk_3x (ad9361_2_clk_3x ), // 144MHz 125MHz - .ad9361_2_clk_4x (ad9361_2_clk_4x ), // 192MHz 166.6667MHz - .ad9361_2_clk_ld (ad9361_2_clk_ld ), // ad9361-2 clock group locked indicator - - // phased-array & rf control clocks - .clk_96m (clk_96m ), - .clk_48m (clk_48m ), - .clk_32m (clk_32m ), - .clk_19p2m (clk_19p2m ) -); - - -//////////////////////////////////////////////////////////////////////////////// -//////////////////////////// Block Design Interface //////////////////////////// -//////////////////////////////////////////////////////////////////////////////// -// gpio -wire [47:0] gpio_i; -wire [47:0] gpio_o; -wire [47:0] gpio_t; -wire ad9361_rx_fifo_rst; -wire ad9361_1_cal_start; -wire ad9361_1_cal_done; -wire ad9361_2_cal_start; -wire ad9361_2_cal_done; -wire ad9361_cal_result; -wire ad9361_recal; - -assign gpio_i[47:47] = gpio_o[47:47]; - -// hmc7044 -assign hmc7044_reset = gpio_o[ 0]; // hmc7044 reset -assign hmc7044_sync = gpio_o[ 1]; // hmc7044 multichip synchronization -assign hmc7044_gpio[0] = gpio_t[ 2] ? gpio_i[ 2] : gpio_o[ 2]; -assign hmc7044_gpio[1] = gpio_t[ 3] ? gpio_i[ 3] : gpio_o[ 3]; -assign hmc7044_gpio[2] = gpio_t[ 4] ? gpio_i[ 4] : gpio_o[ 4]; -assign hmc7044_gpio[3] = gpio_t[ 5] ? gpio_i[ 5] : gpio_o[ 5]; -// ad9361-1 -assign ad9361_1_txnrx = gpio_o[ 6]; // ad9361 enable state machine control -assign ad9361_1_enable = gpio_o[ 7]; // ad9361 enable state machine control -assign ad9361_1_en_agc = gpio_o[ 8]; // ad9361 agc control -assign ad9361_1_reset_b = gpio_o[ 9]; // ad9361 reset -assign ad9361_1_ctrl_out = gpio_o[17:10]; -assign gpio_i[21:18] = ad9361_1_ctrl_in; -// ad9361-2 -assign ad9361_2_txnrx = gpio_o[22]; // ad9361 enable state machine control -assign ad9361_2_enable = gpio_o[23]; // ad9361 enable state machine control -assign ad9361_2_en_agc = gpio_o[24]; // ad9361 agc control -assign ad9361_2_reset_b = gpio_o[25]; // ad9361 reset -assign ad9361_2_ctrl_out = gpio_o[33:26]; -assign gpio_i[37:34] = ad9361_2_ctrl_in; -// ad9361 multichip sync -assign ad9361_sync = gpio_o[38]; -assign ad9361_rx_fifo_rst = gpio_o[39]; -assign ad9361_1_cal_start = gpio_o[40]; -assign ad9361_2_cal_start = gpio_o[41]; -assign ad9361_recal = gpio_o[42]; -assign ad9361_tx_switch = gpio_o[43]; -assign gpio_i[44] = ad9361_1_cal_done; -assign gpio_i[45] = ad9361_2_cal_done; -assign gpio_i[46] = ad9361_cal_result; - -// spi interface -wire spi_sclk ; -wire [ 2:0] spi_cs ; -reg spi_sdi ; -wire spi_sdo ; -wire spi_sdo_t ; -wire spi_three_wire; -wire spi_active ; - -// hmc7044 - three-wire spi -assign hmc7044_spi_clk = spi_sclk; -assign hmc7044_spi_csn = spi_cs[0]; -assign hmc7044_spi_sdio = spi_sdo_t ? 1'bz : spi_sdo; -// ad9361-1 - three-wire spi or four-wire spi -assign ad9361_1_spi_clk = spi_sclk; -assign ad9361_1_spi_csn = spi_cs[1]; -assign ad9361_1_spi_mosi = spi_sdo_t ? 1'bz : spi_sdo; -// ad9361-2 - three-wire spi or four-wire spi -assign ad9361_2_spi_clk = spi_sclk; -assign ad9361_2_spi_csn = spi_cs[2]; -assign ad9361_2_spi_mosi = spi_sdo_t ? 1'bz : spi_sdo; -// select sdi signal -always @(*) begin - if (~hmc7044_spi_csn) - spi_sdi = hmc7044_spi_sdio; - else if (~ad9361_1_spi_csn) - spi_sdi = spi_three_wire ? ad9361_1_spi_mosi : ad9361_1_spi_miso; - else if (~ad9361_2_spi_csn) - spi_sdi = spi_three_wire ? ad9361_2_spi_mosi : ad9361_2_spi_miso; - else - spi_sdi = 1'bz; -end - -system_bd_wrapper u_system_bd_wrapper -( - // ddr - .DDR_addr (ddr_addr ), // inout [14:0]DDR_addr - .DDR_ba (ddr_ba ), // inout [2:0]DDR_ba - .DDR_cas_n (ddr_cas_n ), // inout DDR_cas_n - .DDR_ck_n (ddr_ck_n ), // inout DDR_ck_n - .DDR_ck_p (ddr_ck_p ), // inout DDR_ck_p - .DDR_cke (ddr_cke ), // inout DDR_cke - .DDR_cs_n (ddr_cs_n ), // inout DDR_cs_n - .DDR_dm (ddr_dm ), // inout [3:0]DDR_dm - .DDR_dq (ddr_dq ), // inout [31:0]DDR_dq - .DDR_dqs_n (ddr_dqs_n ), // inout [3:0]DDR_dqs_n - .DDR_dqs_p (ddr_dqs_p ), // inout [3:0]DDR_dqs_p - .DDR_odt (ddr_odt ), // inout DDR_odt - .DDR_ras_n (ddr_ras_n ), // inout DDR_ras_n - .DDR_reset_n (ddr_reset_n ), // inout DDR_reset_n - .DDR_we_n (ddr_we_n ), // inout DDR_we_n - - // fixed-io - .FIXED_IO_ddr_vrn (fixed_io_ddr_vrn ), // inout FIXED_IO_ddr_vrn - .FIXED_IO_ddr_vrp (fixed_io_ddr_vrp ), // inout FIXED_IO_ddr_vrp - .FIXED_IO_mio (fixed_io_mio ), // inout [53:0]FIXED_IO_mio - .FIXED_IO_ps_clk (fixed_io_ps_clk ), // inout FIXED_IO_ps_clk - .FIXED_IO_ps_porb (fixed_io_ps_porb ), // inout FIXED_IO_ps_porb - .FIXED_IO_ps_srstb (fixed_io_ps_srstb ), // inout FIXED_IO_ps_srstb - - // gpio, for control signals - .GPIO_I (gpio_i ), // input [47:0]GPIO_I_0 - .GPIO_O (gpio_o ), // output [47:0]GPIO_O_0 - .GPIO_T (gpio_t ), // output [47:0]GPIO_T_0 - - // spi interface - .spi_sclk (spi_sclk ), // output spi_sclk - .spi_cs (spi_cs ), // output [2:0]spi_cs - .spi_sdi (spi_sdi ), // input [0:0]spi_sdi - .spi_sdo (spi_sdo ), // output spi_sdo - .spi_sdo_t (spi_sdo_t ), // output spi_sdo_t - .spi_three_wire (spi_three_wire ), // output spi_three_wire - .spi_active (spi_active ) // output spi_active -); - - -//////////////////////////////////////////////////////////////////////////////// -////////////////////////////////// Tx Signal /////////////////////////////////// -//////////////////////////////////////////////////////////////////////////////// -// baseband signal -wire [11:0] tx_data_i; -wire [11:0] tx_data_q; - -ad9361_tx_map_cmos_dual u_ad9361_tx_map -( - .clk_2x_in (ad9361_1_clk_2x ), // input clk_2x_in - .clk_in_rst (~ad9361_1_clk_ld ), // input clk_in_rst - - .tx_data_clk (sys_clk ), // input tx_data_clk - .tx_data_clk_rst(sys_rst ), // input tx_data_clk_rst - - .tx_ch1_i (tx_data_i ), // input [11:0] tx_ch1_i - .tx_ch1_q (tx_data_q ), // input [11:0] tx_ch1_q - .tx_ch2_i (tx_data_i ), // input [11:0] tx_ch2_i - .tx_ch2_q (tx_data_q ), // input [11:0] tx_ch2_q - .clk_out (ad9361_1_tx_fb_clk ), // output clk_out - .tx_frame (ad9361_1_tx_frame ), // output tx_frame - .tx_data (ad9361_1_tx_data ) // output [11:0] tx_data -); - -assign ad9361_2_tx_fb_clk = ad9361_1_tx_fb_clk; -// assign ad9361_2_tx_frame = ad9361_1_tx_frame ; -// assign ad9361_2_tx_data = ad9361_1_tx_data ; - -// <---------------------------------------------------------------------------> -// <--------------------- insert transmitter logic below ----------------------> -// <---------------------------------------------------------------------------> -wire [ 1:0] waveform_sel; -wire sweep_on ; -wire [31:0] freq_set ; -wire [ 1:0] iq_sel ; -wire [ 3:0] bb_rshift ; - -tx_qpsk u_tx_qpsk -( - .clk (sys_clk ), // input clk - .rst (sys_rst ), // input rst - .tx_data_i (tx_data_i ), // output [11:0] tx_data_i - .tx_data_q (tx_data_q ), // output [11:0] tx_data_q - // debug ports - .waveform_sel (waveform_sel[1:0] ), // input [ 1:0] waveform_sel - .sweep_on (sweep_on ), // input sweep_on - .freq_set (freq_set ), // input [31:0] freq_set - .iq_sel (iq_sel ), // input [ 1:0] iq_sel - .bb_rshift (bb_rshift ) // input [ 3:0] bb_rshift -); - - -//////////////////////////////////////////////////////////////////////////////// -////////////////////////////////// RF control ////////////////////////////////// -//////////////////////////////////////////////////////////////////////////////// - -ant_rf_ctrl u_ant_rf_ctrl -( - .clk_48m (clk_48m ), - .clk_96m (clk_96m ), - .clk_32m (clk_32m ), - .clk_19p2m (clk_19p2m ), - .sys_rst (ant_rst ), - - .ant_clk (ant_clk ), - .ant_en (ant_en ), - .ant_data (ant_data ), - .ant_tr (ant_tr ), - .ant_dary (ant_dary ), - .ant_dout (ant_dout ), - - .rf_standby (rf_standby ), - .rf_sw_pll (rf_sw_pll ), - .rf_t (rf_t ), - .rf_r (rf_r ), - .rf_sw_bpf (rf_sw_bpf ), - .rf_sclk1 (rf_sclk1 ), - .rf_sdio1 (rf_sdio1 ), - .rf_cs1 (rf_cs1 ), - .rf_ld1 (rf_ld1 ), - .rf_sclk2 (rf_sclk2 ), - .rf_sdio2 (rf_sdio2 ), - .rf_cs2 (rf_cs2 ), - .rf_ld2 (rf_ld2 ), - .rf_sclk3 (rf_sclk3 ), - .rf_sdio3 (rf_sdio3 ), - .rf_cs3 (rf_cs3 ), - .rf_ld3 (rf_ld3 ), - .rf_tmgc_16 (rf_tmgc_16 ), - .rf_tmgc_8 (rf_tmgc_8 ), - .rf_tmgc_4 (rf_tmgc_4 ), - .rf_tmgc_2 (rf_tmgc_2 ), - .rf_tmgc_1 (rf_tmgc_1 ), - .rf_rmgc_16 (rf_rmgc_16 ), - .rf_rmgc_8 (rf_rmgc_8 ), - .rf_rmgc_4 (rf_rmgc_4 ), - .rf_rmgc_2 (rf_rmgc_2 ), - .rf_rmgc_1 (rf_rmgc_1 ), - .rf_enable (rf_enable ), - .rf_sc (rf_sc ), - .rf_sd (rf_sd ), - .rf_endsyn (rf_endsyn ), - .rf_sdout (rf_sdout ), - .rf_dq_wd (rf_dq_wd ), - .rf_sw_rx (rf_sw_rx ) -); - - -//////////////////////////////////////////////////////////////////////////////// -////////////////////////////////// Rx Signals ////////////////////////////////// -//////////////////////////////////////////////////////////////////////////////// -wire [11:0] rx_ch1_i, rx_ch1_q; -wire [11:0] rx_ch2_i, rx_ch2_q; -wire [11:0] rx_ch3_i, rx_ch3_q; -wire [11:0] rx_ch4_i, rx_ch4_q; - -wire [11:0] rx_cal_ch1_i, rx_cal_ch1_q; -wire [11:0] rx_cal_ch2_i, rx_cal_ch2_q; -wire [11:0] rx_cal_ch3_i, rx_cal_ch3_q; -wire [11:0] rx_cal_ch4_i, rx_cal_ch4_q; - -ad9361_rx_map_cmos_dual u_ad9361_1_rx_map -( - .clk_2x_in (ad9361_1_clk_2x ), // input clk_2x_in - .clk_in_rst (~ad9361_1_clk_ld ), // input clk_in_rst - - .rx_data_clk (sys_clk ), // input rx_data_clk - .rx_data_clk_rst(sys_rst ), // input rx_data_clk_rst - - .rx_fifo_rst (ad9361_rx_fifo_rst ), // input rx_fifo_rst - - .rx_frame (ad9361_1_rx_frame ), // input rx_frame - .rx_data (ad9361_1_rx_data ), // input [11:0] rx_data - .rx_ch1_i (rx_ch1_i ), // output [11:0] rx_ch1_i - .rx_ch1_q (rx_ch1_q ), // output [11:0] rx_ch1_q - .rx_ch2_i (rx_ch2_i ), // output [11:0] rx_ch2_i - .rx_ch2_q (rx_ch2_q ) // output [11:0] rx_ch2_q -); - -ad9361_rx_map_cmos_dual u_ad9361_2_rx_map -( - .clk_2x_in (ad9361_2_clk_2x ), // input clk_2x_in - .clk_in_rst (~ad9361_2_clk_ld ), // input clk_in_rst - - .rx_data_clk (sys_clk ), // input rx_data_clk - .rx_data_clk_rst(sys_rst ), // input rx_data_clk_rst - - .rx_fifo_rst (ad9361_rx_fifo_rst ), // input rx_fifo_rst - - .rx_frame (ad9361_2_rx_frame ), // input rx_frame - .rx_data (ad9361_2_rx_data ), // input [11:0] rx_data - .rx_ch1_i (rx_ch3_i ), // output [11:0] rx_ch1_i - .rx_ch1_q (rx_ch3_q ), // output [11:0] rx_ch1_q - .rx_ch2_i (rx_ch4_i ), // output [11:0] rx_ch2_i - .rx_ch2_q (rx_ch4_q ) // output [11:0] rx_ch2_q -); - -ad9361_phase_cal_coarse u_ad9361_phase_cal -( - // clock & reset - .clk (sys_clk ), // input clk - .rst (sys_rst ), // input rst - // control interface - .ad9361_1_cal_start (ad9361_1_cal_start ), // input ad9361_1_cal_start - .ad9361_1_cal_done (ad9361_1_cal_done ), // output ad9361_1_cal_done - .ad9361_2_cal_start (ad9361_2_cal_start ), // input ad9361_2_cal_start - .ad9361_2_cal_done (ad9361_2_cal_done ), // output ad9361_2_cal_done - .ad9361_cal_result (ad9361_cal_result ), // output ad9361_cal_result - .ad9361_cal_valid (ad9361_cal_valid ), // output ad9361_cal_valid - .ad9361_recal (ad9361_recal ), // input ad9361_recal - // input data interface - .rx_ch1_i (rx_ch1_i ), // input [ADC_DATA_WIDTH-1:0] rx_ch1_i - .rx_ch1_q (rx_ch1_q ), // input [ADC_DATA_WIDTH-1:0] rx_ch1_q - .rx_ch2_i (rx_ch2_i ), // input [ADC_DATA_WIDTH-1:0] rx_ch2_i - .rx_ch2_q (rx_ch2_q ), // input [ADC_DATA_WIDTH-1:0] rx_ch2_q - .rx_ch3_i (rx_ch3_i ), // input [ADC_DATA_WIDTH-1:0] rx_ch3_i - .rx_ch3_q (rx_ch3_q ), // input [ADC_DATA_WIDTH-1:0] rx_ch3_q - .rx_ch4_i (rx_ch4_i ), // input [ADC_DATA_WIDTH-1:0] rx_ch4_i - .rx_ch4_q (rx_ch4_q ), // input [ADC_DATA_WIDTH-1:0] rx_ch4_q - // output data interface - .rx_cal_ch1_i (rx_cal_ch1_i ), // output [ADC_DATA_WIDTH-1:0] rx_cal_ch1_i - .rx_cal_ch1_q (rx_cal_ch1_q ), // output [ADC_DATA_WIDTH-1:0] rx_cal_ch1_q - .rx_cal_ch2_i (rx_cal_ch2_i ), // output [ADC_DATA_WIDTH-1:0] rx_cal_ch2_i - .rx_cal_ch2_q (rx_cal_ch2_q ), // output [ADC_DATA_WIDTH-1:0] rx_cal_ch2_q - .rx_cal_ch3_i (rx_cal_ch3_i ), // output [ADC_DATA_WIDTH-1:0] rx_cal_ch3_i - .rx_cal_ch3_q (rx_cal_ch3_q ), // output [ADC_DATA_WIDTH-1:0] rx_cal_ch3_q - .rx_cal_ch4_i (rx_cal_ch4_i ), // output [ADC_DATA_WIDTH-1:0] rx_cal_ch4_i - .rx_cal_ch4_q (rx_cal_ch4_q ) // output [ADC_DATA_WIDTH-1:0] rx_cal_ch4_q -); - -// <---------------------------------------------------------------------------> -// <----------------------- insert receiver logic below -----------------------> -// <---------------------------------------------------------------------------> - - -//////////////////////////////////////////////////////////////////////////////// -//////////////////////////////// ILAs and VIOs ///////////////////////////////// -//////////////////////////////////////////////////////////////////////////////// -vio_clk_ld_rd u_vio_clk_ld_rd -( - .clk (sys_clk ), - .probe_in0 (ad9361_1_clk_ld), - .probe_in1 (ad9361_2_clk_ld) -); - -vio_rfcontrl u_vio_rfcontrl -( - .clk (clk_48m ), // input wire clk - .probe_out0 (u_ant_rf_ctrl.vio_switch ), // output wire [0 : 0] probe_out0 - .probe_out1 (u_ant_rf_ctrl.vio_trdirection ), // output wire [0 : 0] probe_out1 - .probe_out2 (u_ant_rf_ctrl.vio_frequency[15:0] ), // output wire [15 : 0] probe_out2 - .probe_out3 (u_ant_rf_ctrl.vio_emitMGC[7:0] ), // output wire [7 : 0] probe_out3 - .probe_out4 (u_ant_rf_ctrl.vio_ch01MGC[3:0] ), // output wire [3 : 0] probe_out4 - .probe_out5 (u_ant_rf_ctrl.vio_ch02MGC[3:0] ), // output wire [3 : 0] probe_out5 - .probe_out6 (u_ant_rf_ctrl.vio_ch03MGC[3:0] ), // output wire [3 : 0] probe_out6 - .probe_out7 (u_ant_rf_ctrl.vio_ch04MGC[3:0] ), // output wire [3 : 0] probe_out7 - .probe_out8 (u_ant_rf_ctrl.vio_recvMGC[7:0] ), // output wire [7 : 0] probe_out8 - .probe_out9 (u_ant_rf_ctrl.vio_AntMod[7:0] ), // output wire [7 : 0] probe_out9 - .probe_out10(u_ant_rf_ctrl.vio_AntOffAxis[15:0] ), // output wire [15 : 0] probe_out10 - .probe_out11(u_ant_rf_ctrl.vio_AntYaw[15:0] ), // output wire [15 : 0] probe_out11 - .probe_out12(u_ant_rf_ctrl.vio_PrecessTime[15:0] ) // output wire [15 : 0] probe_out12 -); - -vio_ant_test u_vio_ant_test -( - .clk (clk_48m ), - .probe_out0 (u_ant_rf_ctrl.vio_mode_ant ), - .probe_out1 (u_ant_rf_ctrl.vio_hop_start ), - .probe_out2 (u_ant_rf_ctrl.vio_standby ), - .probe_out3 (u_ant_rf_ctrl.vio_hoptime[15:0] ) -); - -ila_rfcontrl u_ila_rfcontrl -( - .clk (clk_48m ), // input wire clk - .probe0 (u_ant_rf_ctrl.SPI_MOSI_F ), // input wire [0:0] - .probe1 (u_ant_rf_ctrl.SPI_MISO_F ), // input wire [0:0] - .probe2 (u_ant_rf_ctrl.SPI_SYN_F ), // input wire [0:0] - .probe3 (u_ant_rf_ctrl.TP_EN_F ), // input wire [0:0] - .probe4 (u_ant_rf_ctrl.TR_MGC_F ), // input wire [0:0] - .probe5 (u_ant_rf_ctrl.CAL_F ), // input wire [0:0] - .probe6 (u_ant_rf_ctrl.PRF ), // input wire [0:0] - .probe7 (u_ant_rf_ctrl.rf_standby ), // input wire [0:0] - .probe8 (u_ant_rf_ctrl.rf_sw_pll ), // input wire [0:0] - .probe9 (u_ant_rf_ctrl.rf_t ), // input wire [0:0] - .probe10(u_ant_rf_ctrl.rf_r ), // input wire [0:0] - .probe11(u_ant_rf_ctrl.rf_sw_bpf ), // input wire [0:0] - .probe12(u_ant_rf_ctrl.rf_sclk1 ), // input wire [0:0] - .probe13(u_ant_rf_ctrl.rf_sdio1 ), // input wire [0:0] - .probe14(u_ant_rf_ctrl.rf_cs1 ), // input wire [0:0] - .probe15(u_ant_rf_ctrl.rf_ld1 ), // input wire [0:0] - .probe16(u_ant_rf_ctrl.rf_sclk2 ), // input wire [0:0] - .probe17(u_ant_rf_ctrl.rf_sdio2 ), // input wire [0:0] - .probe18(u_ant_rf_ctrl.rf_cs2 ), // input wire [0:0] - .probe19(u_ant_rf_ctrl.rf_ld2 ), // input wire [0:0] - .probe20(u_ant_rf_ctrl.rf_sclk3 ), // input wire [0:0] - .probe21(u_ant_rf_ctrl.rf_sdio3 ), // input wire [0:0] - .probe22(u_ant_rf_ctrl.rf_cs3 ), // input wire [0:0] - .probe23(u_ant_rf_ctrl.rf_ld3 ), // input wire [0:0] - .probe24(u_ant_rf_ctrl.rf_tmgc_16 ), // input wire [0:0] - .probe25(u_ant_rf_ctrl.rf_tmgc_8 ), // input wire [0:0] - .probe26(u_ant_rf_ctrl.rf_tmgc_4 ), // input wire [0:0] - .probe27(u_ant_rf_ctrl.rf_tmgc_2 ), // input wire [0:0] - .probe28(u_ant_rf_ctrl.rf_tmgc_1 ), // input wire [0:0] - .probe29(u_ant_rf_ctrl.rf_rmgc_16 ), // input wire [0:0] - .probe30(u_ant_rf_ctrl.rf_rmgc_8 ), // input wire [0:0] - .probe31(u_ant_rf_ctrl.rf_rmgc_4 ), // input wire [0:0] - .probe32(u_ant_rf_ctrl.rf_rmgc_2 ), // input wire [0:0] - .probe33(u_ant_rf_ctrl.rf_rmgc_1 ), // input wire [0:0] - .probe34(u_ant_rf_ctrl.rf_enable ), // input wire [0:0] - .probe35(u_ant_rf_ctrl.rf_sc ), // input wire [0:0] - .probe36(u_ant_rf_ctrl.rf_sd ), // input wire [0:0] - .probe37(u_ant_rf_ctrl.rf_endsyn ), // input wire [0:0] - .probe38(u_ant_rf_ctrl.rf_sdout ), // input wire [0:0] - .probe39(u_ant_rf_ctrl.state_rfdata[1:0] ), // input wire [0:0] - .probe40(u_ant_rf_ctrl.RF_temperature[7:0] ), // input wire [0:0] - .probe41(u_ant_rf_ctrl.RF_IFlocked[7:0] ), // input wire [0:0] - .probe42(u_ant_rf_ctrl.RF_RFAlocked[7:0] ), // input wire [0:0] - .probe43(u_ant_rf_ctrl.RF_RFBlocked[7:0] ), // input wire [0:0] - .probe44(u_ant_rf_ctrl.RF_ch1mgc[3:0] ), // input wire [0:0] - .probe45(u_ant_rf_ctrl.RF_ch2mgc[3:0] ), // input wire [0:0] - .probe46(u_ant_rf_ctrl.RF_ch3mgc[3:0] ), // input wire [0:0] - .probe47(u_ant_rf_ctrl.RF_ch4mgc[3:0] ), // input wire [0:0] - .probe48(u_ant_rf_ctrl.RF_Framecount[31:0] ), // input wire [0:0] - .probe49(u_ant_rf_ctrl.RF_RecvWord[95:0] ) // input wire [0:0] -); - -ila_AntCtrl u_ila_AntCtrl -( - .clk (clk_96m ), // input wire clk - .probe0 (u_ant_rf_ctrl.ant_clk ), // input wire [0:0] probe0 - .probe1 (u_ant_rf_ctrl.ant_en ), // input wire [0:0] probe1 - .probe2 (u_ant_rf_ctrl.ant_data ), // input wire [0:0] probe2 - .probe3 (u_ant_rf_ctrl.ant_tr ), // input wire [0:0] probe3 - .probe4 (u_ant_rf_ctrl.ant_dary ), // input wire [0:0] probe4 - .probe5 (u_ant_rf_ctrl.ant_dout ), // input wire [0:0] probe5 - .probe6 (u_ant_rf_ctrl.state_antdata[1:0] ), // input wire [0:0] probe5 - .probe7 (u_ant_rf_ctrl.Ant_Ant_Volt[7:0] ), // input wire [0:0] probe5 - .probe8 (u_ant_rf_ctrl.Ant_RF_Volt[7:0] ), // input wire [0:0] probe5 - .probe9 (u_ant_rf_ctrl.Ant_IF_Volt[7:0] ), // input wire [0:0] probe5 - .probe10(u_ant_rf_ctrl.Ant_state[7:0] ), // input wire [0:0] probe5 - .probe11(u_ant_rf_ctrl.Ant_Framecount[31:0] ), // input wire [0:0] probe5 - .probe12(u_ant_rf_ctrl.Ant_RecvWord[95:0] ) // input wire [0:0] probe5 -); - -vio_rf_rd u_vio_rf_rd ( - .clk (clk_96m ), // input wire clk - .probe_in0 (u_ant_rf_ctrl.RF_temperature[7:0] ), // input wire [7 : 0] probe_in0 - .probe_in1 (u_ant_rf_ctrl.RF_IFlocked[7:0] ), // input wire [7 : 0] probe_in1 - .probe_in2 (u_ant_rf_ctrl.RF_RFAlocked[7:0] ), // input wire [7 : 0] probe_in2 - .probe_in3 (u_ant_rf_ctrl.RF_RFBlocked[7:0] ), // input wire [7 : 0] probe_in3 - .probe_in4 (u_ant_rf_ctrl.RF_ch1mgc[3:0] ), // input wire [3 : 0] probe_in4 - .probe_in5 (u_ant_rf_ctrl.RF_ch2mgc[3:0] ), // input wire [3 : 0] probe_in5 - .probe_in6 (u_ant_rf_ctrl.RF_ch3mgc[3:0] ), // input wire [3 : 0] probe_in6 - .probe_in7 (u_ant_rf_ctrl.RF_ch4mgc[3:0] ), // input wire [3 : 0] probe_in7 - .probe_in8 (u_ant_rf_ctrl.RF_Framecount[31:0] ), // input wire [31 : 0] probe_in8 - .probe_in9 (u_ant_rf_ctrl.RF_RecvWord_last ) // input wire [95 : 0] probe_in9 -); - -vio_ant_rd u_vio_ant_rd ( - .clk (clk_96m ), // input wire clk - .probe_in0 (u_ant_rf_ctrl.Ant_Ant_Volt[7:0] ), // input wire [7 : 0] probe_in0 - .probe_in1 (u_ant_rf_ctrl.Ant_RF_Volt[7:0] ), // input wire [7 : 0] probe_in1 - .probe_in2 (u_ant_rf_ctrl.Ant_IF_Volt[7:0] ), // input wire [7 : 0] probe_in2 - .probe_in3 (u_ant_rf_ctrl.Ant_state[7:0] ), // input wire [7 : 0] probe_in3 - .probe_in4 (u_ant_rf_ctrl.Ant_Framecount[31:0] ), // input wire [31 : 0] probe_in4 - .probe_in5 (u_ant_rf_ctrl.Ant_RecvWord_last ) // input wire [95 : 0] probe_in5 -); - -ila_2x12x131072 u_ila_tx -( - .clk (sys_clk ), // input wire clk - .probe0 (tx_data_i ), // input wire [11:0] probe0 - .probe1 (tx_data_q ) // input wire [11:0] probe1 -); - -ila_8x12x131072 u_ila_rx -( - .clk (sys_clk ), // input wire clk - .probe0 (rx_ch1_i ), // input wire [11:0] probe0 - .probe1 (rx_ch1_q ), // input wire [11:0] probe1 - .probe2 (rx_ch2_i ), // input wire [11:0] probe2 - .probe3 (rx_ch2_q ), // input wire [11:0] probe3 - .probe4 (rx_ch3_i ), // input wire [11:0] probe4 - .probe5 (rx_ch3_q ), // input wire [11:0] probe5 - .probe6 (rx_ch4_i ), // input wire [11:0] probe6 - .probe7 (rx_ch4_q ) // input wire [11:0] probe7 -); - -ila_cal u_ila_cal -( - .clk (sys_clk ), // input wire clk - .probe0 (u_ad9361_phase_cal.ad9361_1_cal_start_d2 ), // input wire [0:0] probe0 - .probe1 (u_ad9361_phase_cal.ad9361_1_cal_done ), // input wire [0:0] probe1 - .probe2 (u_ad9361_phase_cal.ad9361_2_cal_start_d2 ), // input wire [0:0] probe2 - .probe3 (u_ad9361_phase_cal.ad9361_2_cal_done ), // input wire [0:0] probe3 - .probe4 (u_ad9361_phase_cal.ad9361_cal_result ), // input wire [0:0] probe4 - .probe5 (u_ad9361_phase_cal.ad9361_recal_d2 ), // input wire [0:0] probe5 - .probe6 (u_ad9361_phase_cal.curr_state ), // input wire [1:0] probe6 - .probe7 (rx_ch2_i ), // input wire [11:0] probe7 - .probe8 (rx_ch2_q ), // input wire [11:0] probe8 - .probe9 (rx_ch4_i ), // input wire [11:0] probe9 - .probe10(rx_ch4_q ), // input wire [11:0] probe10 - .probe11(rx_cal_ch2_i ), // input wire [11:0] probe11 - .probe12(rx_cal_ch2_q ), // input wire [11:0] probe12 - .probe13(rx_cal_ch4_i ), // input wire [11:0] probe13 - .probe14(rx_cal_ch4_q ) // input wire [11:0] probe14 -); - -vio_manual_ctrl u_vio_manual_ctrl -( - .clk (sys_clk ), // input wire clk - .probe_out0 (waveform_sel ), // output wire [1 : 0] probe_out0 - .probe_out1 (sweep_on ), // output wire [0 : 0] probe_out1 - .probe_out2 (freq_set ), // output wire [31 : 0] probe_out2 - .probe_out3 (iq_sel ), // output wire [1 : 0] probe_out3 - .probe_out4 (bb_rshift ) // output wire [3 : 0] probe_out4 -); - -endmodule diff --git a/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/utils_1/imports/synth_1/system_top.dcp b/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/utils_1/imports/synth_1/system_top.dcp deleted file mode 100755 index 6f350b8..0000000 --- a/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.srcs/utils_1/imports/synth_1/system_top.dcp +++ /dev/null @@ -1,3 +0,0 @@ -version https://git-lfs.github.com/spec/v1 -oid sha256:ef2494810258f3a94f005dc09f4146fe015fa6492c805913820ca070e9a39ee6 -size 982059 diff --git a/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.xpr b/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.xpr deleted file mode 100644 index 48b29e1..0000000 --- a/vivado_pvt/projects/duifei/duifei_cal_coarse/duifei_cal_coarse.xpr +++ /dev/null @@ -1,1270 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 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- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - default_dashboard - - - diff --git a/vivado_pvt/projects/duifei/duifei_cal_coarse/system_top.xsa b/vivado_pvt/projects/duifei/duifei_cal_coarse/system_top.xsa deleted file mode 100644 index a2da1ee..0000000 --- a/vivado_pvt/projects/duifei/duifei_cal_coarse/system_top.xsa +++ /dev/null @@ -1,3 +0,0 @@ -version https://git-lfs.github.com/spec/v1 -oid sha256:2023b48d07f7e7dd794652b40e683170e8c36bfc94175ab71862786d5f151c82 -size 1719370 diff --git a/vivado_pvt/projects/duifei/duifei_cal_coarse/vitis/duifei_cmos_48m/.cproject b/vivado_pvt/projects/duifei/duifei_cal_coarse/vitis/duifei_cmos_48m/.cproject deleted file mode 100644 index 560968a..0000000 --- a/vivado_pvt/projects/duifei/duifei_cal_coarse/vitis/duifei_cmos_48m/.cproject +++ /dev/null @@ -1,336 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/vivado_pvt/projects/duifei/duifei_cal_coarse/vitis/duifei_cmos_48m/.gitignore b/vivado_pvt/projects/duifei/duifei_cal_coarse/vitis/duifei_cmos_48m/.gitignore deleted file mode 100644 index ac01e66..0000000 --- a/vivado_pvt/projects/duifei/duifei_cal_coarse/vitis/duifei_cmos_48m/.gitignore +++ /dev/null @@ -1,2 +0,0 @@ -/Debug/ -/Release/ diff --git a/vivado_pvt/projects/duifei/duifei_cal_coarse/vitis/duifei_cmos_48m/.project b/vivado_pvt/projects/duifei/duifei_cal_coarse/vitis/duifei_cmos_48m/.project deleted file mode 100644 index 3e8ae20..0000000 --- a/vivado_pvt/projects/duifei/duifei_cal_coarse/vitis/duifei_cmos_48m/.project +++ /dev/null @@ -1,27 +0,0 @@ - - - duifei_cmos_48m - Created by Vitis v2023.2 - - duifei_platform - - - - org.eclipse.cdt.managedbuilder.core.genmakebuilder - - - - - org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder - full,incremental, - - - - - - com.xilinx.sdx.sdk.core.SdkProjectNature - org.eclipse.cdt.core.cnature - org.eclipse.cdt.managedbuilder.core.managedBuildNature - org.eclipse.cdt.managedbuilder.core.ScannerConfigNature - - diff --git a/vivado_pvt/projects/duifei/duifei_cal_coarse/vitis/duifei_cmos_48m/_ide/bitstream/system_top.bit b/vivado_pvt/projects/duifei/duifei_cal_coarse/vitis/duifei_cmos_48m/_ide/bitstream/system_top.bit deleted file mode 100644 index 79bcfc5..0000000 --- a/vivado_pvt/projects/duifei/duifei_cal_coarse/vitis/duifei_cmos_48m/_ide/bitstream/system_top.bit +++ /dev/null @@ -1,3 +0,0 @@ -version https://git-lfs.github.com/spec/v1 -oid sha256:087df634810175dc34ca2fcc9ae807b0765bc767a4b067092af9df11dff88809 -size 17416456 diff --git a/vivado_pvt/projects/duifei/duifei_cal_coarse/vitis/duifei_cmos_48m/_ide/hwspec.checksum b/vivado_pvt/projects/duifei/duifei_cal_coarse/vitis/duifei_cmos_48m/_ide/hwspec.checksum deleted file mode 100644 index 5914126..0000000 --- a/vivado_pvt/projects/duifei/duifei_cal_coarse/vitis/duifei_cmos_48m/_ide/hwspec.checksum +++ /dev/null @@ -1 +0,0 @@ -3240750090 \ No newline at end of file diff --git a/vivado_pvt/projects/duifei/duifei_cal_coarse/vitis/duifei_cmos_48m/_ide/psinit/ps7_init.tcl b/vivado_pvt/projects/duifei/duifei_cal_coarse/vitis/duifei_cmos_48m/_ide/psinit/ps7_init.tcl deleted file mode 100644 index 3cb29ee..0000000 --- a/vivado_pvt/projects/duifei/duifei_cal_coarse/vitis/duifei_cmos_48m/_ide/psinit/ps7_init.tcl +++ /dev/null @@ -1,643 +0,0 @@ -proc ps7_pll_init_data_3_0 {} { - mwr -force 0XF8000008 0x0000DF0D - mask_write 0XF8000110 0x003FFFF0 0x000FA220 - mask_write 0XF8000100 0x0007F000 0x00028000 - mask_write 0XF8000100 0x00000010 0x00000010 - mask_write 0XF8000100 0x00000001 0x00000001 - mask_write 0XF8000100 0x00000001 0x00000000 - mask_poll 0XF800010C 0x00000001 - mask_write 0XF8000100 0x00000010 0x00000000 - mask_write 0XF8000120 0x1F003F30 0x1F000200 - mask_write 0XF8000114 0x003FFFF0 0x0012C220 - mask_write 0XF8000104 0x0007F000 0x00020000 - mask_write 0XF8000104 0x00000010 0x00000010 - mask_write 0XF8000104 0x00000001 0x00000001 - mask_write 0XF8000104 0x00000001 0x00000000 - mask_poll 0XF800010C 0x00000002 - mask_write 0XF8000104 0x00000010 0x00000000 - mask_write 0XF8000124 0xFFF00003 0x0C200003 - mask_write 0XF8000118 0x003FFFF0 0x000FA240 - mask_write 0XF8000108 0x0007F000 0x00036000 - mask_write 0XF8000108 0x00000010 0x00000010 - mask_write 0XF8000108 0x00000001 0x00000001 - mask_write 0XF8000108 0x00000001 0x00000000 - mask_poll 0XF800010C 0x00000004 - mask_write 0XF8000108 0x00000010 0x00000000 - mwr -force 0XF8000004 0x0000767B -} -proc ps7_clock_init_data_3_0 {} { - mwr -force 0XF8000008 0x0000DF0D - mask_write 0XF8000128 0x03F03F01 0x00700F01 - mask_write 0XF800014C 0x00003F31 0x00000901 - mask_write 0XF8000168 0x00003F31 0x00000901 - mask_write 0XF8000170 0x03F03F30 0x00300600 - mask_write 0XF80001C4 0x00000001 0x00000001 - mask_write 0XF800012C 0x01FFCCCD 0x01CC000D - mwr -force 0XF8000004 0x0000767B -} -proc ps7_ddr_init_data_3_0 {} { - mask_write 0XF8006000 0x0001FFFF 0x00000084 - mask_write 0XF8006004 0x0007FFFF 0x00001082 - mask_write 0XF8006008 0x03FFFFFF 0x03C0780F - mask_write 0XF800600C 0x03FFFFFF 0x02001001 - mask_write 0XF8006010 0x03FFFFFF 0x00014001 - mask_write 0XF8006014 0x001FFFFF 0x0004285B - mask_write 0XF8006018 0xF7FFFFFF 0x44E458D3 - mask_write 0XF800601C 0xFFFFFFFF 0x7282BCE5 - mask_write 0XF8006020 0x7FDFFFFC 0x270872D0 - mask_write 0XF8006024 0x0FFFFFC3 0x00000000 - mask_write 0XF8006028 0x00003FFF 0x00002007 - mask_write 0XF800602C 0xFFFFFFFF 0x00000008 - mask_write 0XF8006030 0xFFFFFFFF 0x00040B30 - mask_write 0XF8006034 0x13FF3FFF 0x000116D4 - mask_write 0XF8006038 0x00000003 0x00000000 - mask_write 0XF800603C 0x000FFFFF 0x00000666 - mask_write 0XF8006040 0xFFFFFFFF 0xFFFF0000 - mask_write 0XF8006044 0x0FFFFFFF 0x0F555555 - mask_write 0XF8006048 0x0003F03F 0x0003C008 - mask_write 0XF8006050 0xFF0F8FFF 0x77010800 - mask_write 0XF8006058 0x00010000 0x00000000 - mask_write 0XF800605C 0x0000FFFF 0x00005003 - mask_write 0XF8006060 0x000017FF 0x0000003E - mask_write 0XF8006064 0x00021FE0 0x00020000 - mask_write 0XF8006068 0x03FFFFFF 0x00284141 - mask_write 0XF800606C 0x0000FFFF 0x00001610 - mask_write 0XF8006078 0x03FFFFFF 0x00466111 - mask_write 0XF800607C 0x000FFFFF 0x00032222 - mask_write 0XF80060A4 0xFFFFFFFF 0x10200802 - mask_write 0XF80060A8 0x0FFFFFFF 0x0690CB73 - mask_write 0XF80060AC 0x000001FF 0x000001FE - mask_write 0XF80060B0 0x1FFFFFFF 0x1CFFFFFF - mask_write 0XF80060B4 0x00000200 0x00000200 - mask_write 0XF80060B8 0x01FFFFFF 0x00200066 - mask_write 0XF80060C4 0x00000003 0x00000000 - mask_write 0XF80060C8 0x000000FF 0x00000000 - mask_write 0XF80060DC 0x00000001 0x00000000 - mask_write 0XF80060F0 0x0000FFFF 0x00000000 - mask_write 0XF80060F4 0x0000000F 0x00000008 - mask_write 0XF8006114 0x000000FF 0x00000000 - mask_write 0XF8006118 0x7FFFFFCF 0x40000001 - mask_write 0XF800611C 0x7FFFFFCF 0x40000001 - mask_write 0XF8006120 0x7FFFFFCF 0x40000000 - mask_write 0XF8006124 0x7FFFFFCF 0x40000000 - mask_write 0XF800612C 0x000FFFFF 0x00029000 - mask_write 0XF8006130 0x000FFFFF 0x00029000 - mask_write 0XF8006134 0x000FFFFF 0x00029000 - mask_write 0XF8006138 0x000FFFFF 0x00029000 - mask_write 0XF8006140 0x000FFFFF 0x00000035 - mask_write 0XF8006144 0x000FFFFF 0x00000035 - mask_write 0XF8006148 0x000FFFFF 0x00000035 - mask_write 0XF800614C 0x000FFFFF 0x00000035 - mask_write 0XF8006154 0x000FFFFF 0x00000080 - mask_write 0XF8006158 0x000FFFFF 0x00000080 - mask_write 0XF800615C 0x000FFFFF 0x00000080 - mask_write 0XF8006160 0x000FFFFF 0x00000080 - mask_write 0XF8006168 0x001FFFFF 0x000000F9 - mask_write 0XF800616C 0x001FFFFF 0x000000F9 - mask_write 0XF8006170 0x001FFFFF 0x000000F9 - mask_write 0XF8006174 0x001FFFFF 0x000000F9 - mask_write 0XF800617C 0x000FFFFF 0x000000C0 - mask_write 0XF8006180 0x000FFFFF 0x000000C0 - mask_write 0XF8006184 0x000FFFFF 0x000000C0 - mask_write 0XF8006188 0x000FFFFF 0x000000C0 - mask_write 0XF8006190 0x6FFFFEFE 0x00040080 - mask_write 0XF8006194 0x000FFFFF 0x0001FC82 - mask_write 0XF8006204 0xFFFFFFFF 0x00000000 - mask_write 0XF8006208 0x000703FF 0x000003FF - mask_write 0XF800620C 0x000703FF 0x000003FF - mask_write 0XF8006210 0x000703FF 0x000003FF - mask_write 0XF8006214 0x000703FF 0x000003FF - mask_write 0XF8006218 0x000F03FF 0x000003FF - mask_write 0XF800621C 0x000F03FF 0x000003FF - mask_write 0XF8006220 0x000F03FF 0x000003FF - mask_write 0XF8006224 0x000F03FF 0x000003FF - mask_write 0XF80062A8 0x00000FF5 0x00000000 - mask_write 0XF80062AC 0xFFFFFFFF 0x00000000 - mask_write 0XF80062B0 0x003FFFFF 0x00005125 - mask_write 0XF80062B4 0x0003FFFF 0x000012A8 - mask_poll 0XF8000B74 0x00002000 - mask_write 0XF8006000 0x0001FFFF 0x00000085 - mask_poll 0XF8006054 0x00000007 -} -proc ps7_mio_init_data_3_0 {} { - mwr -force 0XF8000008 0x0000DF0D - mask_write 0XF8000B40 0x00000FFF 0x00000600 - mask_write 0XF8000B44 0x00000FFF 0x00000600 - mask_write 0XF8000B48 0x00000FFF 0x00000672 - mask_write 0XF8000B4C 0x00000FFF 0x00000800 - mask_write 0XF8000B50 0x00000FFF 0x00000674 - mask_write 0XF8000B54 0x00000FFF 0x00000800 - mask_write 0XF8000B58 0x00000FFF 0x00000600 - mask_write 0XF8000B5C 0xFFFFFFFF 0x0018C61C - mask_write 0XF8000B60 0xFFFFFFFF 0x00F9861C - mask_write 0XF8000B64 0xFFFFFFFF 0x00F9861C - mask_write 0XF8000B68 0xFFFFFFFF 0x00F9861C - mask_write 0XF8000B6C 0x00007FFF 0x00000220 - mask_write 0XF8000B70 0x00000001 0x00000001 - mask_write 0XF8000B70 0x00000021 0x00000020 - mask_write 0XF8000B70 0x07FEFFFF 0x00000823 - mask_write 0XF8000704 0x00003FFF 0x00001602 - mask_write 0XF8000708 0x00003FFF 0x00000602 - mask_write 0XF800070C 0x00003FFF 0x00000602 - mask_write 0XF8000710 0x00003FFF 0x00000602 - mask_write 0XF8000714 0x00003FFF 0x00000602 - mask_write 0XF8000718 0x00003FFF 0x00000602 - mwr -force 0XF8000004 0x0000767B -} -proc ps7_peripherals_init_data_3_0 {} { - mwr -force 0XF8000008 0x0000DF0D - mask_write 0XF8000B48 0x00000180 0x00000180 - mask_write 0XF8000B4C 0x00000180 0x00000000 - mask_write 0XF8000B50 0x00000180 0x00000180 - mask_write 0XF8000B54 0x00000180 0x00000000 - mwr -force 0XF8000004 0x0000767B - mask_write 0XE000D000 0x00080000 0x00080000 - mask_write 0XF8007000 0x20000000 0x00000000 -} -proc ps7_post_config_3_0 {} { - mwr -force 0XF8000008 0x0000DF0D - mask_write 0XF8000900 0x0000000F 0x0000000F - mask_write 0XF8000240 0xFFFFFFFF 0x00000000 - mwr -force 0XF8000004 0x0000767B -} -proc ps7_debug_3_0 {} { - mwr -force 0XF8898FB0 0xC5ACCE55 - mwr -force 0XF8899FB0 0xC5ACCE55 - mwr -force 0XF8809FB0 0xC5ACCE55 -} -proc ps7_pll_init_data_2_0 {} { - mwr -force 0XF8000008 0x0000DF0D - mask_write 0XF8000110 0x003FFFF0 0x000FA220 - mask_write 0XF8000100 0x0007F000 0x00028000 - mask_write 0XF8000100 0x00000010 0x00000010 - mask_write 0XF8000100 0x00000001 0x00000001 - mask_write 0XF8000100 0x00000001 0x00000000 - mask_poll 0XF800010C 0x00000001 - mask_write 0XF8000100 0x00000010 0x00000000 - mask_write 0XF8000120 0x1F003F30 0x1F000200 - mask_write 0XF8000114 0x003FFFF0 0x0012C220 - mask_write 0XF8000104 0x0007F000 0x00020000 - mask_write 0XF8000104 0x00000010 0x00000010 - mask_write 0XF8000104 0x00000001 0x00000001 - mask_write 0XF8000104 0x00000001 0x00000000 - mask_poll 0XF800010C 0x00000002 - mask_write 0XF8000104 0x00000010 0x00000000 - mask_write 0XF8000124 0xFFF00003 0x0C200003 - mask_write 0XF8000118 0x003FFFF0 0x000FA240 - mask_write 0XF8000108 0x0007F000 0x00036000 - mask_write 0XF8000108 0x00000010 0x00000010 - mask_write 0XF8000108 0x00000001 0x00000001 - mask_write 0XF8000108 0x00000001 0x00000000 - mask_poll 0XF800010C 0x00000004 - mask_write 0XF8000108 0x00000010 0x00000000 - mwr -force 0XF8000004 0x0000767B -} -proc ps7_clock_init_data_2_0 {} { - mwr -force 0XF8000008 0x0000DF0D - mask_write 0XF8000128 0x03F03F01 0x00700F01 - mask_write 0XF800014C 0x00003F31 0x00000901 - mask_write 0XF8000168 0x00003F31 0x00000901 - mask_write 0XF8000170 0x03F03F30 0x00300600 - mask_write 0XF80001C4 0x00000001 0x00000001 - mask_write 0XF800012C 0x01FFCCCD 0x01CC000D - mwr -force 0XF8000004 0x0000767B -} -proc ps7_ddr_init_data_2_0 {} { - mask_write 0XF8006000 0x0001FFFF 0x00000084 - mask_write 0XF8006004 0x1FFFFFFF 0x00081082 - mask_write 0XF8006008 0x03FFFFFF 0x03C0780F - mask_write 0XF800600C 0x03FFFFFF 0x02001001 - mask_write 0XF8006010 0x03FFFFFF 0x00014001 - mask_write 0XF8006014 0x001FFFFF 0x0004285B - mask_write 0XF8006018 0xF7FFFFFF 0x44E458D3 - mask_write 0XF800601C 0xFFFFFFFF 0x7282BCE5 - mask_write 0XF8006020 0xFFFFFFFC 0x272872D0 - mask_write 0XF8006024 0x0FFFFFFF 0x0000003C - mask_write 0XF8006028 0x00003FFF 0x00002007 - mask_write 0XF800602C 0xFFFFFFFF 0x00000008 - mask_write 0XF8006030 0xFFFFFFFF 0x00040B30 - mask_write 0XF8006034 0x13FF3FFF 0x000116D4 - mask_write 0XF8006038 0x00001FC3 0x00000000 - mask_write 0XF800603C 0x000FFFFF 0x00000666 - mask_write 0XF8006040 0xFFFFFFFF 0xFFFF0000 - mask_write 0XF8006044 0x0FFFFFFF 0x0F555555 - mask_write 0XF8006048 0x3FFFFFFF 0x0003C248 - mask_write 0XF8006050 0xFF0F8FFF 0x77010800 - mask_write 0XF8006058 0x0001FFFF 0x00000101 - mask_write 0XF800605C 0x0000FFFF 0x00005003 - mask_write 0XF8006060 0x000017FF 0x0000003E - mask_write 0XF8006064 0x00021FE0 0x00020000 - mask_write 0XF8006068 0x03FFFFFF 0x00284141 - mask_write 0XF800606C 0x0000FFFF 0x00001610 - mask_write 0XF8006078 0x03FFFFFF 0x00466111 - mask_write 0XF800607C 0x000FFFFF 0x00032222 - mask_write 0XF80060A0 0x00FFFFFF 0x00008000 - mask_write 0XF80060A4 0xFFFFFFFF 0x10200802 - mask_write 0XF80060A8 0x0FFFFFFF 0x0690CB73 - mask_write 0XF80060AC 0x000001FF 0x000001FE - mask_write 0XF80060B0 0x1FFFFFFF 0x1CFFFFFF - mask_write 0XF80060B4 0x000007FF 0x00000200 - mask_write 0XF80060B8 0x01FFFFFF 0x00200066 - mask_write 0XF80060C4 0x00000003 0x00000000 - mask_write 0XF80060C8 0x000000FF 0x00000000 - mask_write 0XF80060DC 0x00000001 0x00000000 - mask_write 0XF80060F0 0x0000FFFF 0x00000000 - mask_write 0XF80060F4 0x0000000F 0x00000008 - mask_write 0XF8006114 0x000000FF 0x00000000 - mask_write 0XF8006118 0x7FFFFFFF 0x40000001 - mask_write 0XF800611C 0x7FFFFFFF 0x40000001 - mask_write 0XF8006120 0x7FFFFFFF 0x40000000 - mask_write 0XF8006124 0x7FFFFFFF 0x40000000 - mask_write 0XF800612C 0x000FFFFF 0x00029000 - mask_write 0XF8006130 0x000FFFFF 0x00029000 - mask_write 0XF8006134 0x000FFFFF 0x00029000 - mask_write 0XF8006138 0x000FFFFF 0x00029000 - mask_write 0XF8006140 0x000FFFFF 0x00000035 - mask_write 0XF8006144 0x000FFFFF 0x00000035 - mask_write 0XF8006148 0x000FFFFF 0x00000035 - mask_write 0XF800614C 0x000FFFFF 0x00000035 - mask_write 0XF8006154 0x000FFFFF 0x00000080 - mask_write 0XF8006158 0x000FFFFF 0x00000080 - mask_write 0XF800615C 0x000FFFFF 0x00000080 - mask_write 0XF8006160 0x000FFFFF 0x00000080 - mask_write 0XF8006168 0x001FFFFF 0x000000F9 - mask_write 0XF800616C 0x001FFFFF 0x000000F9 - mask_write 0XF8006170 0x001FFFFF 0x000000F9 - mask_write 0XF8006174 0x001FFFFF 0x000000F9 - mask_write 0XF800617C 0x000FFFFF 0x000000C0 - mask_write 0XF8006180 0x000FFFFF 0x000000C0 - mask_write 0XF8006184 0x000FFFFF 0x000000C0 - mask_write 0XF8006188 0x000FFFFF 0x000000C0 - mask_write 0XF8006190 0xFFFFFFFF 0x10040080 - mask_write 0XF8006194 0x000FFFFF 0x0001FC82 - mask_write 0XF8006204 0xFFFFFFFF 0x00000000 - mask_write 0XF8006208 0x000F03FF 0x000803FF - mask_write 0XF800620C 0x000F03FF 0x000803FF - mask_write 0XF8006210 0x000F03FF 0x000803FF - mask_write 0XF8006214 0x000F03FF 0x000803FF - mask_write 0XF8006218 0x000F03FF 0x000003FF - mask_write 0XF800621C 0x000F03FF 0x000003FF - mask_write 0XF8006220 0x000F03FF 0x000003FF - mask_write 0XF8006224 0x000F03FF 0x000003FF - mask_write 0XF80062A8 0x00000FF7 0x00000000 - mask_write 0XF80062AC 0xFFFFFFFF 0x00000000 - mask_write 0XF80062B0 0x003FFFFF 0x00005125 - mask_write 0XF80062B4 0x0003FFFF 0x000012A8 - mask_poll 0XF8000B74 0x00002000 - mask_write 0XF8006000 0x0001FFFF 0x00000085 - mask_poll 0XF8006054 0x00000007 -} -proc ps7_mio_init_data_2_0 {} { - mwr -force 0XF8000008 0x0000DF0D - mask_write 0XF8000B40 0x00000FFF 0x00000600 - mask_write 0XF8000B44 0x00000FFF 0x00000600 - mask_write 0XF8000B48 0x00000FFF 0x00000672 - mask_write 0XF8000B4C 0x00000FFF 0x00000800 - mask_write 0XF8000B50 0x00000FFF 0x00000674 - mask_write 0XF8000B54 0x00000FFF 0x00000800 - mask_write 0XF8000B58 0x00000FFF 0x00000600 - mask_write 0XF8000B5C 0xFFFFFFFF 0x0018C61C - mask_write 0XF8000B60 0xFFFFFFFF 0x00F9861C - mask_write 0XF8000B64 0xFFFFFFFF 0x00F9861C - mask_write 0XF8000B68 0xFFFFFFFF 0x00F9861C - mask_write 0XF8000B6C 0x00007FFF 0x00000220 - mask_write 0XF8000B70 0x00000021 0x00000021 - mask_write 0XF8000B70 0x00000021 0x00000020 - mask_write 0XF8000B70 0x07FFFFFF 0x00000823 - mask_write 0XF8000704 0x00003FFF 0x00001602 - mask_write 0XF8000708 0x00003FFF 0x00000602 - mask_write 0XF800070C 0x00003FFF 0x00000602 - mask_write 0XF8000710 0x00003FFF 0x00000602 - mask_write 0XF8000714 0x00003FFF 0x00000602 - mask_write 0XF8000718 0x00003FFF 0x00000602 - mwr -force 0XF8000004 0x0000767B -} -proc ps7_peripherals_init_data_2_0 {} { - mwr -force 0XF8000008 0x0000DF0D - mask_write 0XF8000B48 0x00000180 0x00000180 - mask_write 0XF8000B4C 0x00000180 0x00000000 - mask_write 0XF8000B50 0x00000180 0x00000180 - mask_write 0XF8000B54 0x00000180 0x00000000 - mwr -force 0XF8000004 0x0000767B - mask_write 0XE000D000 0x00080000 0x00080000 - mask_write 0XF8007000 0x20000000 0x00000000 -} -proc ps7_post_config_2_0 {} { - mwr -force 0XF8000008 0x0000DF0D - mask_write 0XF8000900 0x0000000F 0x0000000F - mask_write 0XF8000240 0xFFFFFFFF 0x00000000 - mwr -force 0XF8000004 0x0000767B -} -proc ps7_debug_2_0 {} { - mwr -force 0XF8898FB0 0xC5ACCE55 - mwr -force 0XF8899FB0 0xC5ACCE55 - mwr -force 0XF8809FB0 0xC5ACCE55 -} -proc ps7_pll_init_data_1_0 {} { - mwr -force 0XF8000008 0x0000DF0D - mask_write 0XF8000110 0x003FFFF0 0x000FA220 - mask_write 0XF8000100 0x0007F000 0x00028000 - mask_write 0XF8000100 0x00000010 0x00000010 - mask_write 0XF8000100 0x00000001 0x00000001 - mask_write 0XF8000100 0x00000001 0x00000000 - mask_poll 0XF800010C 0x00000001 - mask_write 0XF8000100 0x00000010 0x00000000 - mask_write 0XF8000120 0x1F003F30 0x1F000200 - mask_write 0XF8000114 0x003FFFF0 0x0012C220 - mask_write 0XF8000104 0x0007F000 0x00020000 - mask_write 0XF8000104 0x00000010 0x00000010 - mask_write 0XF8000104 0x00000001 0x00000001 - mask_write 0XF8000104 0x00000001 0x00000000 - mask_poll 0XF800010C 0x00000002 - mask_write 0XF8000104 0x00000010 0x00000000 - mask_write 0XF8000124 0xFFF00003 0x0C200003 - mask_write 0XF8000118 0x003FFFF0 0x000FA240 - mask_write 0XF8000108 0x0007F000 0x00036000 - mask_write 0XF8000108 0x00000010 0x00000010 - mask_write 0XF8000108 0x00000001 0x00000001 - mask_write 0XF8000108 0x00000001 0x00000000 - mask_poll 0XF800010C 0x00000004 - mask_write 0XF8000108 0x00000010 0x00000000 - mwr -force 0XF8000004 0x0000767B -} -proc ps7_clock_init_data_1_0 {} { - mwr -force 0XF8000008 0x0000DF0D - mask_write 0XF8000128 0x03F03F01 0x00700F01 - mask_write 0XF800014C 0x00003F31 0x00000901 - mask_write 0XF8000168 0x00003F31 0x00000901 - mask_write 0XF8000170 0x03F03F30 0x00300600 - mask_write 0XF80001C4 0x00000001 0x00000001 - mask_write 0XF800012C 0x01FFCCCD 0x01CC000D - mwr -force 0XF8000004 0x0000767B -} -proc ps7_ddr_init_data_1_0 {} { - mask_write 0XF8006000 0x0001FFFF 0x00000084 - mask_write 0XF8006004 0x1FFFFFFF 0x00081082 - mask_write 0XF8006008 0x03FFFFFF 0x03C0780F - mask_write 0XF800600C 0x03FFFFFF 0x02001001 - mask_write 0XF8006010 0x03FFFFFF 0x00014001 - mask_write 0XF8006014 0x001FFFFF 0x0004285B - mask_write 0XF8006018 0xF7FFFFFF 0x44E458D3 - mask_write 0XF800601C 0xFFFFFFFF 0x7282BCE5 - mask_write 0XF8006020 0xFFFFFFFC 0x272872D0 - mask_write 0XF8006024 0x0FFFFFFF 0x0000003C - mask_write 0XF8006028 0x00003FFF 0x00002007 - mask_write 0XF800602C 0xFFFFFFFF 0x00000008 - mask_write 0XF8006030 0xFFFFFFFF 0x00040B30 - mask_write 0XF8006034 0x13FF3FFF 0x000116D4 - mask_write 0XF8006038 0x00001FC3 0x00000000 - mask_write 0XF800603C 0x000FFFFF 0x00000666 - mask_write 0XF8006040 0xFFFFFFFF 0xFFFF0000 - mask_write 0XF8006044 0x0FFFFFFF 0x0F555555 - mask_write 0XF8006048 0x3FFFFFFF 0x0003C248 - mask_write 0XF8006050 0xFF0F8FFF 0x77010800 - mask_write 0XF8006058 0x0001FFFF 0x00000101 - mask_write 0XF800605C 0x0000FFFF 0x00005003 - mask_write 0XF8006060 0x000017FF 0x0000003E - mask_write 0XF8006064 0x00021FE0 0x00020000 - mask_write 0XF8006068 0x03FFFFFF 0x00284141 - mask_write 0XF800606C 0x0000FFFF 0x00001610 - mask_write 0XF80060A0 0x00FFFFFF 0x00008000 - mask_write 0XF80060A4 0xFFFFFFFF 0x10200802 - mask_write 0XF80060A8 0x0FFFFFFF 0x0690CB73 - mask_write 0XF80060AC 0x000001FF 0x000001FE - mask_write 0XF80060B0 0x1FFFFFFF 0x1CFFFFFF - mask_write 0XF80060B4 0x000007FF 0x00000200 - mask_write 0XF80060B8 0x01FFFFFF 0x00200066 - mask_write 0XF80060C4 0x00000003 0x00000000 - mask_write 0XF80060C8 0x000000FF 0x00000000 - mask_write 0XF80060DC 0x00000001 0x00000000 - mask_write 0XF80060F0 0x0000FFFF 0x00000000 - mask_write 0XF80060F4 0x0000000F 0x00000008 - mask_write 0XF8006114 0x000000FF 0x00000000 - mask_write 0XF8006118 0x7FFFFFFF 0x40000001 - mask_write 0XF800611C 0x7FFFFFFF 0x40000001 - mask_write 0XF8006120 0x7FFFFFFF 0x40000000 - mask_write 0XF8006124 0x7FFFFFFF 0x40000000 - mask_write 0XF800612C 0x000FFFFF 0x00029000 - mask_write 0XF8006130 0x000FFFFF 0x00029000 - mask_write 0XF8006134 0x000FFFFF 0x00029000 - mask_write 0XF8006138 0x000FFFFF 0x00029000 - mask_write 0XF8006140 0x000FFFFF 0x00000035 - mask_write 0XF8006144 0x000FFFFF 0x00000035 - mask_write 0XF8006148 0x000FFFFF 0x00000035 - mask_write 0XF800614C 0x000FFFFF 0x00000035 - mask_write 0XF8006154 0x000FFFFF 0x00000080 - mask_write 0XF8006158 0x000FFFFF 0x00000080 - mask_write 0XF800615C 0x000FFFFF 0x00000080 - mask_write 0XF8006160 0x000FFFFF 0x00000080 - mask_write 0XF8006168 0x001FFFFF 0x000000F9 - mask_write 0XF800616C 0x001FFFFF 0x000000F9 - mask_write 0XF8006170 0x001FFFFF 0x000000F9 - mask_write 0XF8006174 0x001FFFFF 0x000000F9 - mask_write 0XF800617C 0x000FFFFF 0x000000C0 - mask_write 0XF8006180 0x000FFFFF 0x000000C0 - mask_write 0XF8006184 0x000FFFFF 0x000000C0 - mask_write 0XF8006188 0x000FFFFF 0x000000C0 - mask_write 0XF8006190 0xFFFFFFFF 0x10040080 - mask_write 0XF8006194 0x000FFFFF 0x0001FC82 - mask_write 0XF8006204 0xFFFFFFFF 0x00000000 - mask_write 0XF8006208 0x000F03FF 0x000803FF - mask_write 0XF800620C 0x000F03FF 0x000803FF - mask_write 0XF8006210 0x000F03FF 0x000803FF - mask_write 0XF8006214 0x000F03FF 0x000803FF - mask_write 0XF8006218 0x000F03FF 0x000003FF - mask_write 0XF800621C 0x000F03FF 0x000003FF - mask_write 0XF8006220 0x000F03FF 0x000003FF - mask_write 0XF8006224 0x000F03FF 0x000003FF - mask_write 0XF80062A8 0x00000FF7 0x00000000 - mask_write 0XF80062AC 0xFFFFFFFF 0x00000000 - mask_write 0XF80062B0 0x003FFFFF 0x00005125 - mask_write 0XF80062B4 0x0003FFFF 0x000012A8 - mask_poll 0XF8000B74 0x00002000 - mask_write 0XF8006000 0x0001FFFF 0x00000085 - mask_poll 0XF8006054 0x00000007 -} -proc ps7_mio_init_data_1_0 {} { - mwr -force 0XF8000008 0x0000DF0D - mask_write 0XF8000B40 0x00000FFF 0x00000600 - mask_write 0XF8000B44 0x00000FFF 0x00000600 - mask_write 0XF8000B48 0x00000FFF 0x00000672 - mask_write 0XF8000B4C 0x00000FFF 0x00000800 - mask_write 0XF8000B50 0x00000FFF 0x00000674 - mask_write 0XF8000B54 0x00000FFF 0x00000800 - mask_write 0XF8000B58 0x00000FFF 0x00000600 - mask_write 0XF8000B5C 0xFFFFFFFF 0x0018C61C - mask_write 0XF8000B60 0xFFFFFFFF 0x00F9861C - mask_write 0XF8000B64 0xFFFFFFFF 0x00F9861C - mask_write 0XF8000B68 0xFFFFFFFF 0x00F9861C - mask_write 0XF8000B6C 0x000073FF 0x00000220 - mask_write 0XF8000B70 0x00000021 0x00000021 - mask_write 0XF8000B70 0x00000021 0x00000020 - mask_write 0XF8000B70 0x07FFFFFF 0x00000823 - mask_write 0XF8000704 0x00003FFF 0x00001602 - mask_write 0XF8000708 0x00003FFF 0x00000602 - mask_write 0XF800070C 0x00003FFF 0x00000602 - mask_write 0XF8000710 0x00003FFF 0x00000602 - mask_write 0XF8000714 0x00003FFF 0x00000602 - mask_write 0XF8000718 0x00003FFF 0x00000602 - mwr -force 0XF8000004 0x0000767B -} -proc ps7_peripherals_init_data_1_0 {} { - mwr -force 0XF8000008 0x0000DF0D - mask_write 0XF8000B48 0x00000180 0x00000180 - mask_write 0XF8000B4C 0x00000180 0x00000000 - mask_write 0XF8000B50 0x00000180 0x00000180 - mask_write 0XF8000B54 0x00000180 0x00000000 - mwr -force 0XF8000004 0x0000767B - mask_write 0XE000D000 0x00080000 0x00080000 - mask_write 0XF8007000 0x20000000 0x00000000 -} -proc ps7_post_config_1_0 {} { - mwr -force 0XF8000008 0x0000DF0D - mask_write 0XF8000900 0x0000000F 0x0000000F - mask_write 0XF8000240 0xFFFFFFFF 0x00000000 - mwr -force 0XF8000004 0x0000767B -} -proc ps7_debug_1_0 {} { - mwr -force 0XF8898FB0 0xC5ACCE55 - mwr -force 0XF8899FB0 0xC5ACCE55 - mwr -force 0XF8809FB0 0xC5ACCE55 -} -set PCW_SILICON_VER_1_0 "0x0" -set PCW_SILICON_VER_2_0 "0x1" -set PCW_SILICON_VER_3_0 "0x2" -set APU_FREQ 666666666 - - - -proc mask_poll { addr mask } { - set count 1 - set curval "0x[string range [mrd $addr] end-8 end]" - set maskedval [expr {$curval & $mask}] - while { $maskedval == 0 } { - set curval "0x[string range [mrd $addr] end-8 end]" - set maskedval [expr {$curval & $mask}] - set count [ expr { $count + 1 } ] - if { $count == 100000000 } { - puts "Timeout Reached. Mask poll failed at ADDRESS: $addr MASK: $mask" - break - } - } -} - - - -proc mask_delay { addr val } { - set delay [ get_number_of_cycles_for_delay $val ] - perf_reset_and_start_timer - set curval "0x[string range [mrd $addr] end-8 end]" - set maskedval [expr {$curval < $delay}] - while { $maskedval == 1 } { - set curval "0x[string range [mrd $addr] end-8 end]" - set maskedval [expr {$curval < $delay}] - } - perf_reset_clock -} - -proc ps_version { } { - set si_ver "0x[string range [mrd 0xF8007080] end-8 end]" - set mask_sil_ver "0x[expr {$si_ver >> 28}]" - return $mask_sil_ver; -} - -proc ps7_post_config {} { - set saved_mode [configparams force-mem-accesses] - configparams force-mem-accesses 1 - - variable PCW_SILICON_VER_1_0 - variable PCW_SILICON_VER_2_0 - variable PCW_SILICON_VER_3_0 - set sil_ver [ps_version] - - if { $sil_ver == $PCW_SILICON_VER_1_0} { - ps7_post_config_1_0 - } elseif { $sil_ver == $PCW_SILICON_VER_2_0 } { - ps7_post_config_2_0 - } else { - ps7_post_config_3_0 - } - configparams force-mem-accesses $saved_mode -} - -proc ps7_debug {} { - variable PCW_SILICON_VER_1_0 - variable PCW_SILICON_VER_2_0 - variable PCW_SILICON_VER_3_0 - set sil_ver [ps_version] - - if { $sil_ver == $PCW_SILICON_VER_1_0} { - ps7_debug_1_0 - } elseif { $sil_ver == $PCW_SILICON_VER_2_0 } { - ps7_debug_2_0 - } else { - ps7_debug_3_0 - } -} -proc ps7_init {} { - variable PCW_SILICON_VER_1_0 - variable PCW_SILICON_VER_2_0 - variable PCW_SILICON_VER_3_0 - set sil_ver [ps_version] - if { $sil_ver == $PCW_SILICON_VER_1_0} { - ps7_mio_init_data_1_0 - ps7_pll_init_data_1_0 - ps7_clock_init_data_1_0 - ps7_ddr_init_data_1_0 - ps7_peripherals_init_data_1_0 - #puts "PCW Silicon Version : 1.0" - } elseif { $sil_ver == $PCW_SILICON_VER_2_0 } { - ps7_mio_init_data_2_0 - ps7_pll_init_data_2_0 - ps7_clock_init_data_2_0 - ps7_ddr_init_data_2_0 - ps7_peripherals_init_data_2_0 - #puts "PCW Silicon Version : 2.0" - } else { - ps7_mio_init_data_3_0 - ps7_pll_init_data_3_0 - ps7_clock_init_data_3_0 - ps7_ddr_init_data_3_0 - ps7_peripherals_init_data_3_0 - #puts "PCW Silicon Version : 3.0" - } -} - - -# For delay calculation using global timer - -# start timer - proc perf_start_clock { } { - - #writing SCU_GLOBAL_TIMER_CONTROL register - - mask_write 0xF8F00208 0x00000109 0x00000009 -} - -# stop timer and reset timer count regs - proc perf_reset_clock { } { - perf_disable_clock - mask_write 0xF8F00200 0xFFFFFFFF 0x00000000 - mask_write 0xF8F00204 0xFFFFFFFF 0x00000000 -} - -# Compute mask for given delay in miliseconds -proc get_number_of_cycles_for_delay { delay } { - - # GTC is always clocked at 1/2 of the CPU frequency (CPU_3x2x) - variable APU_FREQ - return [ expr ($delay * $APU_FREQ /(2 * 1000))] -} - - -# stop timer -proc perf_disable_clock {} { - mask_write 0xF8F00208 0xFFFFFFFF 0x00000000 -} - -proc perf_reset_and_start_timer {} { - perf_reset_clock - perf_start_clock -} - - diff --git a/vivado_pvt/projects/duifei/duifei_cal_coarse/vitis/duifei_cmos_48m/duifei_cmos_48m.prj b/vivado_pvt/projects/duifei/duifei_cal_coarse/vitis/duifei_cmos_48m/duifei_cmos_48m.prj deleted file mode 100644 index 11c6220..0000000 --- a/vivado_pvt/projects/duifei/duifei_cal_coarse/vitis/duifei_cmos_48m/duifei_cmos_48m.prj +++ /dev/null @@ -1,11 +0,0 @@ - - - - - - - - - -