From 5a9cb911860d407502c978aef444d88b5cca339a Mon Sep 17 00:00:00 2001
From: Josh Gao <josh_gao@foxmail.com>
Date: Tue, 2 Jul 2024 16:10:06 +0800
Subject: [PATCH] update dj_47dr_ibert vivado project, will not affect vitis
 project

update some paths to current ones
---
 .../dj_47dr_ibert.runs/impl_1/system_top.bit  |  2 +-
 .../sources_1/ip/hop_rom/hop_rom.xci          |  2 +-
 .../utils_1/imports/synth_1/system_top.dcp    |  4 ++--
 .../dj_47dr/dj_47dr_ibert/dj_47dr_ibert.xpr   | 24 +++++++------------
 4 files changed, 13 insertions(+), 19 deletions(-)

diff --git a/projects/dj_47dr/dj_47dr_ibert/dj_47dr_ibert.runs/impl_1/system_top.bit b/projects/dj_47dr/dj_47dr_ibert/dj_47dr_ibert.runs/impl_1/system_top.bit
index 7df2fa47..67c3fcf1 100644
--- a/projects/dj_47dr/dj_47dr_ibert/dj_47dr_ibert.runs/impl_1/system_top.bit
+++ b/projects/dj_47dr/dj_47dr_ibert/dj_47dr_ibert.runs/impl_1/system_top.bit
@@ -1,3 +1,3 @@
 version https://git-lfs.github.com/spec/v1
-oid sha256:0eb0a979c775ebbbdf39be405214a242d5ffcfdf94c621b4e5237833d94a660d
+oid sha256:5a0a126d966d4e1dd23c31cfd4115ec501f93c6e95b0b222409ea3e0bed139d6
 size 34437472
diff --git a/projects/dj_47dr/dj_47dr_ibert/dj_47dr_ibert.srcs/sources_1/ip/hop_rom/hop_rom.xci b/projects/dj_47dr/dj_47dr_ibert/dj_47dr_ibert.srcs/sources_1/ip/hop_rom/hop_rom.xci
index 52aabeea..0e973715 100644
--- a/projects/dj_47dr/dj_47dr_ibert/dj_47dr_ibert.srcs/sources_1/ip/hop_rom/hop_rom.xci
+++ b/projects/dj_47dr/dj_47dr_ibert/dj_47dr_ibert.srcs/sources_1/ip/hop_rom/hop_rom.xci
@@ -51,7 +51,7 @@
         "register_portb_output_of_softecc": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
         "Pipeline_Stages": [ { "value": "0", "resolve_type": "user", "enabled": false, "usage": "all" } ],
         "Load_Init_File": [ { "value": "true", "value_src": "user", "resolve_type": "user", "format": "bool", "usage": "all" } ],
-        "Coe_File": [ { "value": "../../../../../Workspace/vivado/vivado_pub/projects/dj_47dr/dj_47dr_demo/dj_47dr_demo.srcs/sources_1/ip/sweep_freq.coe", "value_src": "user", "resolve_type": "user", "usage": "all" } ],
+        "Coe_File": [ { "value": "../sweep_freq.coe", "value_src": "user", "resolve_type": "user", "usage": "all" } ],
         "Fill_Remaining_Memory_Locations": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
         "Remaining_Memory_Locations": [ { "value": "0", "resolve_type": "user", "enabled": false, "usage": "all" } ],
         "Use_RSTA_Pin": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
diff --git a/projects/dj_47dr/dj_47dr_ibert/dj_47dr_ibert.srcs/utils_1/imports/synth_1/system_top.dcp b/projects/dj_47dr/dj_47dr_ibert/dj_47dr_ibert.srcs/utils_1/imports/synth_1/system_top.dcp
index a39517c3..9ac3a604 100644
--- a/projects/dj_47dr/dj_47dr_ibert/dj_47dr_ibert.srcs/utils_1/imports/synth_1/system_top.dcp
+++ b/projects/dj_47dr/dj_47dr_ibert/dj_47dr_ibert.srcs/utils_1/imports/synth_1/system_top.dcp
@@ -1,3 +1,3 @@
 version https://git-lfs.github.com/spec/v1
-oid sha256:37c94ebc024fe1124feb2c02d8b1fcd8f6770ba499fa0cdb19a300dbc9f47631
-size 244165
+oid sha256:cdfeb154615e3a60d3b037c5d6cd47251362bd0ef174f3872bc2609d40bceaa4
+size 244214
diff --git a/projects/dj_47dr/dj_47dr_ibert/dj_47dr_ibert.xpr b/projects/dj_47dr/dj_47dr_ibert/dj_47dr_ibert.xpr
index 28da4929..0405a5c1 100644
--- a/projects/dj_47dr/dj_47dr_ibert/dj_47dr_ibert.xpr
+++ b/projects/dj_47dr/dj_47dr_ibert/dj_47dr_ibert.xpr
@@ -4,7 +4,7 @@
 <!-- Copyright 1986-2022 Xilinx, Inc. All Rights Reserved.                   -->
 <!-- Copyright 2022-2024 Advanced Micro Devices, Inc. All Rights Reserved.   -->
 
-<Project Product="Vivado" Version="7" Minor="67" Path="/home/josh/dj_47dr_ibert/dj_47dr_ibert.xpr">
+<Project Product="Vivado" Version="7" Minor="67" Path="/home/josh/Workspace/vivado/vivado_pub/projects/dj_47dr/dj_47dr_ibert/dj_47dr_ibert.xpr">
   <DefaultLaunch Dir="$PRUNDIR"/>
   <Configuration>
     <Option Name="Id" Val="fc90dfdc704b4452bb0de3350f605d76"/>
@@ -47,7 +47,7 @@
     <Option Name="ActiveSimSet" Val="sim_1"/>
     <Option Name="DefaultLib" Val="xil_defaultlib"/>
     <Option Name="ProjectType" Val="Default"/>
-    <Option Name="IPRepoPath" Val="$PPRDIR/../Workspace/vivado/vivado_pub/adi_library"/>
+    <Option Name="IPRepoPath" Val="$PPRDIR/../../../adi_library"/>
     <Option Name="IPOutputRepo" Val="$PCACHEDIR/ip"/>
     <Option Name="IPDefaultOutputPath" Val="$PGENDIR/sources_1"/>
     <Option Name="IPCachePermission" Val="read"/>
@@ -166,12 +166,6 @@
           <Attr Name="UsedIn" Val="simulation"/>
         </FileInfo>
       </File>
-      <File Path="$PPRDIR/../Workspace/vivado/vivado_pub/projects/dj_47dr/dj_47dr_demo/dj_47dr_demo.srcs/sources_1/ip/sweep_freq.coe">
-        <FileInfo>
-          <Attr Name="UsedIn" Val="synthesis"/>
-          <Attr Name="UsedIn" Val="simulation"/>
-        </FileInfo>
-      </File>
       <Config>
         <Option Name="DesignMode" Val="RTL"/>
         <Option Name="TopModule" Val="system_top"/>
@@ -242,7 +236,7 @@
     <FileSet Name="cmpy_18x8" Type="BlockSrcs" RelSrcDir="$PSRCDIR/cmpy_18x8" RelGenDir="$PGENDIR/cmpy_18x8">
       <File Path="$PSRCDIR/sources_1/ip/cmpy_18x8/cmpy_18x8.xci">
         <FileInfo>
-          <Attr Name="ImportPath" Val="$PPRDIR/../Workspace/vivado/vivado_pub/projects/dj_47dr/dj_47dr_demo/dj_47dr_demo.srcs/sources_1/ip/cmpy_18x8/cmpy_18x8.xci"/>
+          <Attr Name="ImportPath" Val="$PPRDIR/../dj_47dr_demo/dj_47dr_demo.srcs/sources_1/ip/cmpy_18x8/cmpy_18x8.xci"/>
           <Attr Name="ImportTime" Val="1719371236"/>
           <Attr Name="UsedIn" Val="synthesis"/>
           <Attr Name="UsedIn" Val="implementation"/>
@@ -257,7 +251,7 @@
     <FileSet Name="dds_32b_8b" Type="BlockSrcs" RelSrcDir="$PSRCDIR/dds_32b_8b" RelGenDir="$PGENDIR/dds_32b_8b">
       <File Path="$PSRCDIR/sources_1/ip/dds_32b_8b/dds_32b_8b.xci">
         <FileInfo>
-          <Attr Name="ImportPath" Val="$PPRDIR/../Workspace/vivado/vivado_pub/projects/dj_47dr/dj_47dr_demo/dj_47dr_demo.srcs/sources_1/ip/dds_32b_8b/dds_32b_8b.xci"/>
+          <Attr Name="ImportPath" Val="$PPRDIR/../dj_47dr_demo/dj_47dr_demo.srcs/sources_1/ip/dds_32b_8b/dds_32b_8b.xci"/>
           <Attr Name="ImportTime" Val="1719371236"/>
           <Attr Name="UsedIn" Val="synthesis"/>
           <Attr Name="UsedIn" Val="implementation"/>
@@ -272,7 +266,7 @@
     <FileSet Name="hop_rom" Type="BlockSrcs" RelSrcDir="$PSRCDIR/hop_rom" RelGenDir="$PGENDIR/hop_rom">
       <File Path="$PSRCDIR/sources_1/ip/hop_rom/hop_rom.xci">
         <FileInfo>
-          <Attr Name="ImportPath" Val="$PPRDIR/../Workspace/vivado/vivado_pub/projects/dj_47dr/dj_47dr_demo/dj_47dr_demo.srcs/sources_1/ip/hop_rom/hop_rom.xci"/>
+          <Attr Name="ImportPath" Val="$PPRDIR/../dj_47dr_demo/dj_47dr_demo.srcs/sources_1/ip/hop_rom/hop_rom.xci"/>
           <Attr Name="ImportTime" Val="1719371236"/>
           <Attr Name="UsedIn" Val="synthesis"/>
           <Attr Name="UsedIn" Val="implementation"/>
@@ -287,7 +281,7 @@
     <FileSet Name="hrc_64_12_025" Type="BlockSrcs" RelSrcDir="$PSRCDIR/hrc_64_12_025" RelGenDir="$PGENDIR/hrc_64_12_025">
       <File Path="$PSRCDIR/sources_1/ip/hrc_64_12_025/hrc_64_12_025.xci">
         <FileInfo>
-          <Attr Name="ImportPath" Val="$PPRDIR/../Workspace/vivado/vivado_pub/projects/dj_47dr/dj_47dr_demo/dj_47dr_demo.srcs/sources_1/ip/hrc_64_12_025/hrc_64_12_025.xci"/>
+          <Attr Name="ImportPath" Val="$PPRDIR/../dj_47dr_demo/dj_47dr_demo.srcs/sources_1/ip/hrc_64_12_025/hrc_64_12_025.xci"/>
           <Attr Name="ImportTime" Val="1719371236"/>
           <Attr Name="UsedIn" Val="synthesis"/>
           <Attr Name="UsedIn" Val="implementation"/>
@@ -302,7 +296,7 @@
     <FileSet Name="ila_adc" Type="BlockSrcs" RelSrcDir="$PSRCDIR/ila_adc" RelGenDir="$PGENDIR/ila_adc">
       <File Path="$PSRCDIR/sources_1/ip/ila_adc/ila_adc.xci">
         <FileInfo>
-          <Attr Name="ImportPath" Val="$PPRDIR/../Workspace/vivado/vivado_pub/projects/dj_47dr/dj_47dr_demo/dj_47dr_demo.srcs/sources_1/ip/ila_adc/ila_adc.xci"/>
+          <Attr Name="ImportPath" Val="$PPRDIR/../dj_47dr_demo/dj_47dr_demo.srcs/sources_1/ip/ila_adc/ila_adc.xci"/>
           <Attr Name="ImportTime" Val="1719371236"/>
           <Attr Name="UsedIn" Val="synthesis"/>
           <Attr Name="UsedIn" Val="implementation"/>
@@ -317,7 +311,7 @@
     <FileSet Name="ila_dac" Type="BlockSrcs" RelSrcDir="$PSRCDIR/ila_dac" RelGenDir="$PGENDIR/ila_dac">
       <File Path="$PSRCDIR/sources_1/ip/ila_dac/ila_dac.xci">
         <FileInfo>
-          <Attr Name="ImportPath" Val="$PPRDIR/../Workspace/vivado/vivado_pub/projects/dj_47dr/dj_47dr_demo/dj_47dr_demo.srcs/sources_1/ip/ila_dac/ila_dac.xci"/>
+          <Attr Name="ImportPath" Val="$PPRDIR/../dj_47dr_demo/dj_47dr_demo.srcs/sources_1/ip/ila_dac/ila_dac.xci"/>
           <Attr Name="ImportTime" Val="1719371236"/>
           <Attr Name="UsedIn" Val="synthesis"/>
           <Attr Name="UsedIn" Val="implementation"/>
@@ -332,7 +326,7 @@
     <FileSet Name="vio_manual_ctrl" Type="BlockSrcs" RelSrcDir="$PSRCDIR/vio_manual_ctrl" RelGenDir="$PGENDIR/vio_manual_ctrl">
       <File Path="$PSRCDIR/sources_1/ip/vio_manual_ctrl/vio_manual_ctrl.xci">
         <FileInfo>
-          <Attr Name="ImportPath" Val="$PPRDIR/../Workspace/vivado/vivado_pub/projects/dj_47dr/dj_47dr_demo/dj_47dr_demo.srcs/sources_1/ip/vio_manual_ctrl/vio_manual_ctrl.xci"/>
+          <Attr Name="ImportPath" Val="$PPRDIR/../dj_47dr_demo/dj_47dr_demo.srcs/sources_1/ip/vio_manual_ctrl/vio_manual_ctrl.xci"/>
           <Attr Name="ImportTime" Val="1719371236"/>
           <Attr Name="UsedIn" Val="synthesis"/>
           <Attr Name="UsedIn" Val="implementation"/>