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update zc706_cx9261a_demo

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remove hop axi gpio, add hop control to ps gpio
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josh
2024-10-27 11:15:33 +08:00
parent a8ea62ab3d
commit 8a5c992b1c
16 changed files with 121 additions and 2367 deletions
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projects/cx9261a/zc706_cx9261a_demo/zc706_cx9261a_demo.srcs/sources_1/bd/system_bd/ip/system_bd_auto_pc_0/system_bd_auto_pc_0.xci
+11 -11
View File
@@ -135,7 +135,7 @@
"parameters": {
"DATA_WIDTH": [ { "value": "32", "value_src": "auto_prop", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_ips_inferred": true, "is_static_object": false } ],
"PROTOCOL": [ { "value": "AXI3", "value_src": "user_prop", "value_permission": "bd", "resolve_type": "generated", "usage": "simulation.tlm", "is_ips_inferred": true, "is_static_object": false } ],
"FREQ_HZ": [ { "value": "50000000", "value_src": "user_prop", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_ips_inferred": true, "is_static_object": false } ],
"FREQ_HZ": [ { "value": "5e+07", "value_src": "user_prop", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_ips_inferred": true, "is_static_object": false } ],
"ID_WIDTH": [ { "value": "12", "value_src": "auto_prop", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_ips_inferred": true, "is_static_object": false } ],
"ADDR_WIDTH": [ { "value": "32", "value_src": "auto_prop", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_ips_inferred": true, "is_static_object": false } ],
"AWUSER_WIDTH": [ { "value": "0", "value_src": "constant_prop", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_ips_inferred": true, "is_static_object": false } ],
@@ -213,7 +213,7 @@
"parameters": {
"DATA_WIDTH": [ { "value": "32", "value_src": "user_prop", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_ips_inferred": true, "is_static_object": false } ],
"PROTOCOL": [ { "value": "AXI4LITE", "value_src": "user_prop", "value_permission": "bd", "resolve_type": "generated", "usage": "simulation.tlm", "is_ips_inferred": true, "is_static_object": false } ],
"FREQ_HZ": [ { "value": "50000000", "value_src": "user_prop", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_ips_inferred": true, "is_static_object": false } ],
"FREQ_HZ": [ { "value": "5e+07", "value_src": "user_prop", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_ips_inferred": true, "is_static_object": false } ],
"ID_WIDTH": [ { "value": "0", "value_src": "propagated", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_ips_inferred": true, "is_static_object": false } ],
"ADDR_WIDTH": [ { "value": "32", "value_src": "user_prop", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_ips_inferred": true, "is_static_object": false } ],
"AWUSER_WIDTH": [ { "value": "0", "value_src": "constant", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_ips_inferred": true, "is_static_object": false } ],
@@ -222,15 +222,15 @@
"RUSER_WIDTH": [ { "value": "0", "value_src": "constant", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_ips_inferred": true, "is_static_object": false } ],
"BUSER_WIDTH": [ { "value": "0", "value_src": "constant", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_ips_inferred": true, "is_static_object": false } ],
"READ_WRITE_MODE": [ { "value": "READ_WRITE", "value_src": "user_prop", "value_permission": "bd", "resolve_type": "generated", "usage": "simulation.tlm", "is_ips_inferred": true, "is_static_object": false } ],
"HAS_BURST": [ { "value": "0", "value_src": "ip_propagated", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_ips_inferred": true, "is_static_object": false } ],
"HAS_LOCK": [ { "value": "0", "value_src": "ip_propagated", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_ips_inferred": true, "is_static_object": false } ],
"HAS_PROT": [ { "value": "1", "value_src": "constant_prop", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_ips_inferred": true, "is_static_object": false } ],
"HAS_CACHE": [ { "value": "0", "value_src": "ip_propagated", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_ips_inferred": true, "is_static_object": false } ],
"HAS_QOS": [ { "value": "0", "value_src": "ip_propagated", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_ips_inferred": true, "is_static_object": false } ],
"HAS_BURST": [ { "value": "0", "value_src": "constant_prop", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_ips_inferred": true, "is_static_object": false } ],
"HAS_LOCK": [ { "value": "0", "value_src": "constant_prop", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_ips_inferred": true, "is_static_object": false } ],
"HAS_PROT": [ { "value": "1", "value_src": "auto_prop", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_ips_inferred": true, "is_static_object": false } ],
"HAS_CACHE": [ { "value": "0", "value_src": "constant_prop", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_ips_inferred": true, "is_static_object": false } ],
"HAS_QOS": [ { "value": "0", "value_src": "constant_prop", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_ips_inferred": true, "is_static_object": false } ],
"HAS_REGION": [ { "value": "0", "value_src": "constant_prop", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_ips_inferred": true, "is_static_object": false } ],
"HAS_WSTRB": [ { "value": "1", "value_src": "constant_prop", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_ips_inferred": true, "is_static_object": false } ],
"HAS_BRESP": [ { "value": "1", "value_src": "constant_prop", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_ips_inferred": true, "is_static_object": false } ],
"HAS_RRESP": [ { "value": "1", "value_src": "constant_prop", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_ips_inferred": true, "is_static_object": false } ],
"HAS_WSTRB": [ { "value": "1", "value_src": "auto_prop", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_ips_inferred": true, "is_static_object": false } ],
"HAS_BRESP": [ { "value": "1", "value_src": "auto_prop", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_ips_inferred": true, "is_static_object": false } ],
"HAS_RRESP": [ { "value": "1", "value_src": "auto_prop", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_ips_inferred": true, "is_static_object": false } ],
"SUPPORTS_NARROW_BURST": [ { "value": "0", "value_src": "propagated", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_ips_inferred": true, "is_static_object": false } ],
"NUM_READ_OUTSTANDING": [ { "value": "8", "value_src": "constant", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_ips_inferred": true, "is_static_object": false } ],
"NUM_WRITE_OUTSTANDING": [ { "value": "8", "value_src": "constant", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_ips_inferred": true, "is_static_object": false } ],
@@ -272,7 +272,7 @@
"parameters": {
"ASSOCIATED_BUSIF": [ { "value": "S_AXI:M_AXI", "value_src": "constant", "value_permission": "bd", "usage": "all" } ],
"ASSOCIATED_RESET": [ { "value": "aresetn", "value_src": "constant", "value_permission": "bd", "usage": "all" } ],
"FREQ_HZ": [ { "value": "50000000", "value_src": "user_prop", "value_permission": "bd", "resolve_type": "user", "format": "long", "usage": "all" } ],
"FREQ_HZ": [ { "value": "5e+07", "value_src": "user_prop", "value_permission": "bd", "resolve_type": "user", "format": "long", "usage": "all" } ],
"FREQ_TOLERANCE_HZ": [ { "value": "0", "value_permission": "bd", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ],
"PHASE": [ { "value": "0.000", "value_src": "default_prop", "value_permission": "bd", "resolve_type": "generated", "format": "float", "is_ips_inferred": true, "is_static_object": false } ],
"CLK_DOMAIN": [ { "value": "system_bd_processing_system7_0_0_FCLK_CLK0", "value_src": "default_prop", "value_permission": "bd", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ],
projects/cx9261a/zc706_cx9261a_demo/zc706_cx9261a_demo.srcs/sources_1/bd/system_bd/ip/system_bd_axi_gpio_0_0/system_bd_axi_gpio_0_0.xci
-376
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@@ -1,376 +0,0 @@
{
"schema": "xilinx.com:schema:json_instance:1.0",
"ip_inst": {
"xci_name": "system_bd_axi_gpio_0_0",
"cell_name": "axi_gpio_hop",
"component_reference": "xilinx.com:ip:axi_gpio:2.0",
"ip_revision": "33",
"gen_directory": "../../../../../../zc706_cx9261a_demo.gen/sources_1/bd/system_bd/ip/system_bd_axi_gpio_0_0",
"parameters": {
"component_parameters": {
"C_TRI_DEFAULT": [ { "value": "0xFFFFFFFF", "resolve_type": "user", "format": "bitString", "enabled": false, "usage": "all" } ],
"C_GPIO_WIDTH": [ { "value": "1", "value_src": "user", "resolve_type": "user", "format": "long", "usage": "all" } ],
"C_GPIO2_WIDTH": [ { "value": "32", "resolve_type": "user", "format": "long", "enabled": false, "usage": "all" } ],
"C_IS_DUAL": [ { "value": "0", "resolve_type": "user", "format": "long", "usage": "all" } ],
"C_ALL_INPUTS": [ { "value": "1", "value_src": "user", "resolve_type": "user", "format": "long", "usage": "all" } ],
"C_TRI_DEFAULT_2": [ { "value": "0xFFFFFFFF", "resolve_type": "user", "format": "bitString", "enabled": false, "usage": "all" } ],
"C_DOUT_DEFAULT_2": [ { "value": "0x00000000", "resolve_type": "user", "format": "bitString", "enabled": false, "usage": "all" } ],
"C_DOUT_DEFAULT": [ { "value": "0x00000000", "resolve_type": "user", "format": "bitString", "enabled": false, "usage": "all" } ],
"C_ALL_INPUTS_2": [ { "value": "0", "resolve_type": "user", "format": "long", "enabled": false, "usage": "all" } ],
"C_INTERRUPT_PRESENT": [ { "value": "1", "value_src": "user", "resolve_type": "user", "format": "long", "usage": "all" } ],
"Component_Name": [ { "value": "system_bd_axi_gpio_0_0", "resolve_type": "user", "usage": "all" } ],
"USE_BOARD_FLOW": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"GPIO_BOARD_INTERFACE": [ { "value": "Custom", "resolve_type": "user", "usage": "all" } ],
"GPIO2_BOARD_INTERFACE": [ { "value": "Custom", "resolve_type": "user", "usage": "all" } ],
"C_ALL_OUTPUTS": [ { "value": "0", "resolve_type": "user", "format": "long", "enabled": false, "usage": "all" } ],
"C_ALL_OUTPUTS_2": [ { "value": "0", "resolve_type": "user", "format": "long", "enabled": false, "usage": "all" } ]
},
"model_parameters": {
"C_FAMILY": [ { "value": "zynq", "resolve_type": "generated", "usage": "all" } ],
"C_S_AXI_ADDR_WIDTH": [ { "value": "9", "format": "long", "usage": "all" } ],
"C_S_AXI_DATA_WIDTH": [ { "value": "32", "format": "long", "usage": "all" } ],
"C_GPIO_WIDTH": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_GPIO2_WIDTH": [ { "value": "32", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_ALL_INPUTS": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_ALL_INPUTS_2": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_ALL_OUTPUTS": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_ALL_OUTPUTS_2": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_INTERRUPT_PRESENT": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_DOUT_DEFAULT": [ { "value": "0x00000000", "resolve_type": "generated", "format": "bitString", "usage": "all" } ],
"C_TRI_DEFAULT": [ { "value": "0xFFFFFFFF", "resolve_type": "generated", "format": "bitString", "usage": "all" } ],
"C_IS_DUAL": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_DOUT_DEFAULT_2": [ { "value": "0x00000000", "resolve_type": "generated", "format": "bitString", "usage": "all" } ],
"C_TRI_DEFAULT_2": [ { "value": "0xFFFFFFFF", "resolve_type": "generated", "format": "bitString", "usage": "all" } ]
},
"project_parameters": {
"ARCHITECTURE": [ { "value": "zynq" } ],
"BASE_BOARD_PART": [ { "value": "xilinx.com:zc706:part0:1.4" } ],
"BOARD_CONNECTIONS": [ { "value": "" } ],
"DEVICE": [ { "value": "xc7z045" } ],
"NEXTGEN_VERSAL": [ { "value": "0" } ],
"PACKAGE": [ { "value": "ffg900" } ],
"PREFHDL": [ { "value": "VERILOG" } ],
"SILICON_REVISION": [ { "value": "" } ],
"SIMULATOR_LANGUAGE": [ { "value": "MIXED" } ],
"SPEEDGRADE": [ { "value": "-2" } ],
"STATIC_POWER": [ { "value": "" } ],
"TEMPERATURE_GRADE": [ { "value": "" } ]
},
"runtime_parameters": {
"IPCONTEXT": [ { "value": "IP_Integrator" } ],
"IPREVISION": [ { "value": "33" } ],
"MANAGED": [ { "value": "TRUE" } ],
"OUTPUTDIR": [ { "value": "../../../../../../zc706_cx9261a_demo.gen/sources_1/bd/system_bd/ip/system_bd_axi_gpio_0_0" } ],
"SELECTEDSIMMODEL": [ { "value": "" } ],
"SHAREDDIR": [ { "value": "../../ipshared" } ],
"SWVERSION": [ { "value": "2024.1" } ],
"SYNTHESISFLOW": [ { "value": "OUT_OF_CONTEXT" } ]
}
},
"boundary": {
"ports": {
"s_axi_aclk": [ { "direction": "in", "driver_value": "0" } ],
"s_axi_aresetn": [ { "direction": "in", "driver_value": "1" } ],
"s_axi_awaddr": [ { "direction": "in", "size_left": "8", "size_right": "0", "driver_value": "0" } ],
"s_axi_awvalid": [ { "direction": "in", "driver_value": "0" } ],
"s_axi_awready": [ { "direction": "out" } ],
"s_axi_wdata": [ { "direction": "in", "size_left": "31", "size_right": "0", "driver_value": "0" } ],
"s_axi_wstrb": [ { "direction": "in", "size_left": "3", "size_right": "0", "driver_value": "0" } ],
"s_axi_wvalid": [ { "direction": "in", "driver_value": "0" } ],
"s_axi_wready": [ { "direction": "out" } ],
"s_axi_bresp": [ { "direction": "out", "size_left": "1", "size_right": "0" } ],
"s_axi_bvalid": [ { "direction": "out" } ],
"s_axi_bready": [ { "direction": "in", "driver_value": "0" } ],
"s_axi_araddr": [ { "direction": "in", "size_left": "8", "size_right": "0", "driver_value": "0" } ],
"s_axi_arvalid": [ { "direction": "in", "driver_value": "0" } ],
"s_axi_arready": [ { "direction": "out" } ],
"s_axi_rdata": [ { "direction": "out", "size_left": "31", "size_right": "0" } ],
"s_axi_rresp": [ { "direction": "out", "size_left": "1", "size_right": "0" } ],
"s_axi_rvalid": [ { "direction": "out" } ],
"s_axi_rready": [ { "direction": "in", "driver_value": "0" } ],
"ip2intc_irpt": [ { "direction": "out" } ],
"gpio_io_i": [ { "direction": "in", "size_left": "0", "size_right": "0", "driver_value": "0" } ]
},
"interfaces": {
"S_AXI": {
"vlnv": "xilinx.com:interface:aximm:1.0",
"abstraction_type": "xilinx.com:interface:aximm_rtl:1.0",
"mode": "slave",
"memory_map_ref": "S_AXI",
"parameters": {
"DATA_WIDTH": [ { "value": "32", "value_src": "constant", "value_permission": "bd", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ],
"PROTOCOL": [ { "value": "AXI4LITE", "value_src": "constant", "value_permission": "bd", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ],
"FREQ_HZ": [ { "value": "50000000", "value_src": "user_prop", "value_permission": "bd", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ],
"ID_WIDTH": [ { "value": "0", "value_src": "constant", "value_permission": "bd", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ],
"ADDR_WIDTH": [ { "value": "9", "value_src": "constant", "value_permission": "bd", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ],
"AWUSER_WIDTH": [ { "value": "0", "value_src": "constant", "value_permission": "bd", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ],
"ARUSER_WIDTH": [ { "value": "0", "value_src": "constant", "value_permission": "bd", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ],
"WUSER_WIDTH": [ { "value": "0", "value_src": "constant", "value_permission": "bd", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ],
"RUSER_WIDTH": [ { "value": "0", "value_src": "constant", "value_permission": "bd", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ],
"BUSER_WIDTH": [ { "value": "0", "value_src": "constant", "value_permission": "bd", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ],
"READ_WRITE_MODE": [ { "value": "READ_WRITE", "value_src": "constant", "value_permission": "bd", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ],
"HAS_BURST": [ { "value": "0", "value_src": "constant", "value_permission": "bd", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ],
"HAS_LOCK": [ { "value": "0", "value_src": "constant", "value_permission": "bd", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ],
"HAS_PROT": [ { "value": "0", "value_src": "constant", "value_permission": "bd", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ],
"HAS_CACHE": [ { "value": "0", "value_src": "constant", "value_permission": "bd", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ],
"HAS_QOS": [ { "value": "0", "value_src": "constant", "value_permission": "bd", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ],
"HAS_REGION": [ { "value": "0", "value_src": "constant", "value_permission": "bd", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ],
"HAS_WSTRB": [ { "value": "1", "value_src": "constant", "value_permission": "bd", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ],
"HAS_BRESP": [ { "value": "1", "value_src": "constant", "value_permission": "bd", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ],
"HAS_RRESP": [ { "value": "1", "value_src": "constant", "value_permission": "bd", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ],
"SUPPORTS_NARROW_BURST": [ { "value": "0", "value_src": "ip_propagated", "value_permission": "bd", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ],
"NUM_READ_OUTSTANDING": [ { "value": "2", "value_src": "default_prop", "value_permission": "bd", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ],
"NUM_WRITE_OUTSTANDING": [ { "value": "2", "value_src": "default_prop", "value_permission": "bd", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ],
"MAX_BURST_LENGTH": [ { "value": "1", "value_src": "ip_propagated", "value_permission": "bd", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ],
"PHASE": [ { "value": "0.000", "value_src": "default_prop", "value_permission": "bd", "resolve_type": "generated", "format": "float", "is_ips_inferred": true, "is_static_object": false } ],
"CLK_DOMAIN": [ { "value": "system_bd_processing_system7_0_0_FCLK_CLK0", "value_src": "default_prop", "value_permission": "bd", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ],
"NUM_READ_THREADS": [ { "value": "1", "value_permission": "bd", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ],
"NUM_WRITE_THREADS": [ { "value": "1", "value_permission": "bd", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ],
"RUSER_BITS_PER_BYTE": [ { "value": "0", "value_permission": "bd", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ],
"WUSER_BITS_PER_BYTE": [ { "value": "0", "value_permission": "bd", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ],
"INSERT_VIP": [ { "value": "0", "resolve_type": "user", "format": "long", "usage": "simulation.rtl", "is_ips_inferred": true, "is_static_object": false } ]
},
"port_maps": {
"ARADDR": [ { "physical_name": "s_axi_araddr" } ],
"ARREADY": [ { "physical_name": "s_axi_arready" } ],
"ARVALID": [ { "physical_name": "s_axi_arvalid" } ],
"AWADDR": [ { "physical_name": "s_axi_awaddr" } ],
"AWREADY": [ { "physical_name": "s_axi_awready" } ],
"AWVALID": [ { "physical_name": "s_axi_awvalid" } ],
"BREADY": [ { "physical_name": "s_axi_bready" } ],
"BRESP": [ { "physical_name": "s_axi_bresp" } ],
"BVALID": [ { "physical_name": "s_axi_bvalid" } ],
"RDATA": [ { "physical_name": "s_axi_rdata" } ],
"RREADY": [ { "physical_name": "s_axi_rready" } ],
"RRESP": [ { "physical_name": "s_axi_rresp" } ],
"RVALID": [ { "physical_name": "s_axi_rvalid" } ],
"WDATA": [ { "physical_name": "s_axi_wdata" } ],
"WREADY": [ { "physical_name": "s_axi_wready" } ],
"WSTRB": [ { "physical_name": "s_axi_wstrb" } ],
"WVALID": [ { "physical_name": "s_axi_wvalid" } ]
}
},
"S_AXI_ACLK": {
"vlnv": "xilinx.com:signal:clock:1.0",
"abstraction_type": "xilinx.com:signal:clock_rtl:1.0",
"mode": "slave",
"parameters": {
"ASSOCIATED_BUSIF": [ { "value": "S_AXI", "value_src": "constant", "value_permission": "bd", "usage": "all" } ],
"ASSOCIATED_RESET": [ { "value": "s_axi_aresetn", "value_src": "constant", "value_permission": "bd", "usage": "all" } ],
"FREQ_HZ": [ { "value": "50000000", "value_src": "user_prop", "value_permission": "bd", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ],
"FREQ_TOLERANCE_HZ": [ { "value": "0", "value_permission": "bd", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ],
"PHASE": [ { "value": "0.000", "value_src": "default_prop", "value_permission": "bd", "resolve_type": "generated", "format": "float", "is_ips_inferred": true, "is_static_object": false } ],
"CLK_DOMAIN": [ { "value": "system_bd_processing_system7_0_0_FCLK_CLK0", "value_src": "default_prop", "value_permission": "bd", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ],
"ASSOCIATED_PORT": [ { "value": "", "value_permission": "bd", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ],
"INSERT_VIP": [ { "value": "0", "resolve_type": "user", "format": "long", "usage": "simulation.rtl", "is_ips_inferred": true, "is_static_object": false } ]
},
"port_maps": {
"CLK": [ { "physical_name": "s_axi_aclk" } ]
}
},
"S_AXI_ARESETN": {
"vlnv": "xilinx.com:signal:reset:1.0",
"abstraction_type": "xilinx.com:signal:reset_rtl:1.0",
"mode": "slave",
"parameters": {
"POLARITY": [ { "value": "ACTIVE_LOW", "value_src": "constant", "value_permission": "bd", "usage": "all" } ],
"INSERT_VIP": [ { "value": "0", "resolve_type": "user", "format": "long", "usage": "simulation.rtl", "is_ips_inferred": true, "is_static_object": false } ]
},
"port_maps": {
"RST": [ { "physical_name": "s_axi_aresetn" } ]
}
},
"IP2INTC_IRQ": {
"vlnv": "xilinx.com:signal:interrupt:1.0",
"abstraction_type": "xilinx.com:signal:interrupt_rtl:1.0",
"mode": "master",
"parameters": {
"SENSITIVITY": [ { "value": "LEVEL_HIGH", "value_src": "constant", "value_permission": "bd", "usage": "all" } ],
"PortWidth": [ { "value": "1", "value_src": "default_prop", "value_permission": "bd", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ]
},
"port_maps": {
"INTERRUPT": [ { "physical_name": "ip2intc_irpt" } ]
}
},
"GPIO": {
"vlnv": "xilinx.com:interface:gpio:1.0",
"abstraction_type": "xilinx.com:interface:gpio_rtl:1.0",
"mode": "master",
"parameters": {
"BOARD.ASSOCIATED_PARAM": [ { "value": "GPIO_BOARD_INTERFACE", "value_src": "constant", "value_permission": "bd", "usage": "all" } ]
},
"port_maps": {
"TRI_I": [ { "physical_name": "gpio_io_i" } ]
}
}
},
"memory_maps": {
"S_AXI": {
"display_name": "S_AXI_MEM",
"description": "Memory Map for S_AXI",
"address_blocks": {
"Reg": {
"base_address": "0",
"range": "4096",
"display_name": "Reg",
"description": "Register Block",
"usage": "register",
"access": "read-write",
"registers": {
"GPIO_DATA": {
"address_offset": "0x0",
"size": 1,
"display_name": "Channel_1_GPIO_DATA",
"description": "Channel-1 AXI GPIO Data register",
"is_volatile": true,
"access": "read-write",
"reset_value": "0x0",
"fields": {
"CH1_DATA": {
"bit_offset": 0,
"bit_width": 1,
"display_name": "Channel_1_GPIO_DATA",
"description": "AXI GPIO Data Register.\nFor each I/O bit programmed as input\n R - Reads value on the input pin.\n W - No effect.\nFor each I/O bit programmed as output\n R - Reads value on GPIO_O pins\n W - Writes value to the corresponding AXI GPIO \n data register bit and output pin\n",
"is_volatile": true,
"access": "read-write"
}
}
},
"GPIO_TRI": {
"address_offset": "0x4",
"size": 1,
"display_name": "Channel_1_GPIO_TRI",
"description": "Channel-1 AXI GPIO 3-State Control register",
"is_volatile": true,
"access": "read-write",
"reset_value": "0x0",
"fields": {
"CH1_TRI": {
"bit_offset": 0,
"bit_width": 1,
"display_name": "Channel_1_GPIO_DATA",
"description": "AXI GPIO 3-State Control Register\nEach I/O pin of the AXI GPIO is individually programmable as an input or output For each of the bits 0 - I/O pin configured as output 1 - I/O pin configured as input\n",
"is_volatile": true,
"access": "read-write"
}
}
},
"GPIO2_DATA": {
"address_offset": "0x8",
"size": 32,
"display_name": "Channel_2_GPIO_DATA",
"description": "Channel-2 AXI GPIO Data register",
"is_volatile": true,
"access": "read-write",
"reset_value": "0x0",
"fields": {
"CH2_DATA": {
"bit_offset": 0,
"bit_width": 32,
"display_name": "Channel_2_GPIO_DATA",
"description": "AXI GPIO Data Register.\nFor each I/O bit programmed as input\n R - Reads value on the input pin.\n W - No effect.\nFor each I/O bit programmed as output\n R - Reads value on GPIO_O pins\n W - Writes value to the corresponding AXI GPIO \n data register bit and output pin\n",
"is_volatile": true,
"access": "read-write"
}
}
},
"GPIO2_TRI": {
"address_offset": "0xC",
"size": 32,
"display_name": "Channel_2_GPIO_TRI",
"description": "Channel-2 AXI GPIO 3-State Control register",
"is_volatile": true,
"access": "read-write",
"reset_value": "0x0",
"fields": {
"CH2_TRI": {
"bit_offset": 0,
"bit_width": 32,
"display_name": "Channel_2_GPIO_DATA",
"description": "AXI GPIO 3-State Control Register\nEach I/O pin of the AXI GPIO is individually programmable as an input or output For each of the bits 0 - I/O pin configured as output 1 - I/O pin configured as input\n",
"is_volatile": true,
"access": "read-write"
}
}
},
"GIER": {
"address_offset": "0x11C",
"size": 32,
"display_name": "Global_Interrupt_Enable register",
"description": "Global_Interrupt_Enable register",
"is_volatile": true,
"access": "read-write",
"reset_value": "0x0",
"fields": {
"INT_EN": {
"bit_offset": 31,
"bit_width": 1,
"display_name": "Global_Interrupt_Enable",
"description": "Master enable for the device interrupt output\n 0 - Disabled\n 1 - Enabled\n",
"is_volatile": true,
"access": "read-write"
}
}
},
"IP_IER": {
"address_offset": "0x128",
"size": 32,
"display_name": "IP Interrupt Enable register",
"description": "IP Interrupt Enable register",
"is_volatile": true,
"access": "read-write",
"reset_value": "0x0",
"fields": {
"CH1_INT_EN": {
"bit_offset": 0,
"bit_width": 1,
"display_name": "Channel_1_Interrupt_Enable",
"description": "Enable Channel 1 Interrupt\n 0 - Disabled (masked)\n 1 - Enabled\n",
"is_volatile": true,
"access": "read-write"
},
"CH2_INT_EN": {
"bit_offset": 1,
"bit_width": 1,
"display_name": "Channel_2_Interrupt_Enable",
"description": "Enable Channel 2 Interrupt\n 0 - Disabled (masked)\n 1 - Enabled\n",
"is_volatile": true,
"access": "read-write"
}
}
},
"IP_ISR": {
"address_offset": "0x120",
"size": 32,
"display_name": "IP Interrupt Status register",
"description": "IP Interrupt Status register",
"is_volatile": true,
"access": "read-write",
"reset_value": "0x0",
"fields": {
"CH1_INT_S": {
"bit_offset": 0,
"bit_width": 1,
"display_name": "Channel_1_Interrupt_Status",
"description": "Channel 1 Interrupt Status\n 0 - No Channel 1 input interrupt\n 1 - Channel 1 input interrupt\n",
"is_volatile": true,
"access": "read-write"
},
"CH2_INT_S": {
"bit_offset": 1,
"bit_width": 1,
"display_name": "Channel_2_Interrupt_Status",
"description": "Channel 2 Interrupt Status\n 0 - No Channel 2 input interrupt\n 1 - Channel 2 input interrupt\n",
"is_volatile": true,
"access": "read-write"
}
}
}
}
}
}
}
}
}
}
}
projects/cx9261a/zc706_cx9261a_demo/zc706_cx9261a_demo.srcs/sources_1/bd/system_bd/ip/system_bd_axi_interconnect_0_0/system_bd_axi_interconnect_0_0.xci
+1 -1
View File
@@ -9,7 +9,7 @@
"parameters": {
"component_parameters": {
"NUM_SI": [ { "value": "1", "resolve_type": "user", "format": "long", "usage": "all" } ],
"NUM_MI": [ { "value": "2", "value_src": "user", "resolve_type": "user", "format": "long", "usage": "all" } ],
"NUM_MI": [ { "value": "1", "value_src": "user", "resolve_type": "user", "format": "long", "usage": "all" } ],
"STRATEGY": [ { "value": "0", "resolve_type": "user", "format": "long", "usage": "all" } ],
"ENABLE_ADVANCED_OPTIONS": [ { "value": "0", "resolve_type": "user", "format": "long", "usage": "all" } ],
"ENABLE_PROTOCOL_CHECKERS": [ { "value": "0", "resolve_type": "user", "format": "long", "usage": "all" } ],
projects/cx9261a/zc706_cx9261a_demo/zc706_cx9261a_demo.srcs/sources_1/bd/system_bd/ip/system_bd_axi_spi_engine_0_0/system_bd_axi_spi_engine_0_0.xci
+5 -5
View File
@@ -109,7 +109,7 @@
"parameters": {
"DATA_WIDTH": [ { "value": "32", "value_src": "auto", "value_permission": "bd", "resolve_type": "generated", "format": "long", "is_static_object": false } ],
"PROTOCOL": [ { "value": "AXI4LITE", "value_src": "constant", "value_permission": "bd_and_user", "resolve_type": "generated", "is_static_object": false } ],
"FREQ_HZ": [ { "value": "50000000", "value_src": "user_prop", "value_permission": "bd_and_user", "resolve_type": "generated", "format": "long", "is_static_object": false } ],
"FREQ_HZ": [ { "value": "5e+07", "value_src": "user_prop", "value_permission": "bd_and_user", "resolve_type": "generated", "format": "long", "is_static_object": false } ],
"ID_WIDTH": [ { "value": "0", "value_src": "constant", "value_permission": "bd_and_user", "resolve_type": "generated", "format": "long", "is_static_object": false } ],
"ADDR_WIDTH": [ { "value": "16", "value_src": "auto", "value_permission": "bd", "resolve_type": "generated", "format": "long", "is_static_object": false } ],
"AWUSER_WIDTH": [ { "value": "0", "value_src": "constant", "value_permission": "bd_and_user", "resolve_type": "generated", "format": "long", "is_static_object": false } ],
@@ -133,8 +133,8 @@
"MAX_BURST_LENGTH": [ { "value": "1", "value_src": "auto", "value_permission": "bd_and_user", "resolve_type": "generated", "format": "long", "is_static_object": false } ],
"PHASE": [ { "value": "0.000", "value_permission": "bd_and_user", "resolve_type": "generated", "format": "float", "is_static_object": false } ],
"CLK_DOMAIN": [ { "value": "system_bd_processing_system7_0_0_FCLK_CLK0", "value_src": "default_prop", "value_permission": "bd_and_user", "resolve_type": "generated", "is_static_object": false } ],
"NUM_READ_THREADS": [ { "value": "1", "value_src": "default_prop", "value_permission": "bd_and_user", "resolve_type": "generated", "format": "long", "is_static_object": false } ],
"NUM_WRITE_THREADS": [ { "value": "1", "value_src": "default_prop", "value_permission": "bd_and_user", "resolve_type": "generated", "format": "long", "is_static_object": false } ],
"NUM_READ_THREADS": [ { "value": "4", "value_src": "constant_prop", "value_permission": "bd_and_user", "resolve_type": "generated", "format": "long", "is_static_object": false } ],
"NUM_WRITE_THREADS": [ { "value": "4", "value_src": "constant_prop", "value_permission": "bd_and_user", "resolve_type": "generated", "format": "long", "is_static_object": false } ],
"RUSER_BITS_PER_BYTE": [ { "value": "0", "value_permission": "bd_and_user", "resolve_type": "generated", "format": "long", "is_static_object": false } ],
"WUSER_BITS_PER_BYTE": [ { "value": "0", "value_permission": "bd_and_user", "resolve_type": "generated", "format": "long", "is_static_object": false } ],
"INSERT_VIP": [ { "value": "0", "resolve_type": "user", "format": "long", "usage": "simulation.rtl", "is_static_object": false } ]
@@ -215,7 +215,7 @@
"parameters": {
"ASSOCIATED_BUSIF": [ { "value": "spi_engine_ctrl", "value_src": "constant", "value_permission": "bd_and_user", "usage": "all" } ],
"ASSOCIATED_RESET": [ { "value": "spi_resetn", "value_src": "constant", "value_permission": "bd_and_user", "usage": "all" } ],
"FREQ_HZ": [ { "value": "50000000", "value_src": "user_prop", "value_permission": "bd_and_user", "resolve_type": "generated", "format": "long", "is_static_object": false } ],
"FREQ_HZ": [ { "value": "5e+07", "value_src": "user_prop", "value_permission": "bd_and_user", "resolve_type": "generated", "format": "long", "is_static_object": false } ],
"PHASE": [ { "value": "0.000", "value_permission": "bd_and_user", "resolve_type": "generated", "format": "float", "is_static_object": false } ],
"CLK_DOMAIN": [ { "value": "system_bd_processing_system7_0_0_FCLK_CLK0", "value_src": "default_prop", "value_permission": "bd_and_user", "resolve_type": "generated", "is_static_object": false } ],
"INSERT_VIP": [ { "value": "0", "resolve_type": "user", "format": "long", "usage": "simulation.rtl", "is_static_object": false } ]
@@ -243,7 +243,7 @@
"parameters": {
"ASSOCIATED_BUSIF": [ { "value": "spi_engine_offload_ctrl0:s_axi", "value_src": "constant", "value_permission": "bd_and_user", "usage": "all" } ],
"ASSOCIATED_RESET": [ { "value": "s_axi_aresetn", "value_src": "constant", "value_permission": "bd_and_user", "usage": "all" } ],
"FREQ_HZ": [ { "value": "50000000", "value_src": "user_prop", "value_permission": "bd_and_user", "resolve_type": "generated", "format": "long", "is_static_object": false } ],
"FREQ_HZ": [ { "value": "5e+07", "value_src": "user_prop", "value_permission": "bd_and_user", "resolve_type": "generated", "format": "long", "is_static_object": false } ],
"PHASE": [ { "value": "0.000", "value_permission": "bd_and_user", "resolve_type": "generated", "format": "float", "is_static_object": false } ],
"CLK_DOMAIN": [ { "value": "system_bd_processing_system7_0_0_FCLK_CLK0", "value_src": "default_prop", "value_permission": "bd_and_user", "resolve_type": "generated", "is_static_object": false } ],
"INSERT_VIP": [ { "value": "0", "resolve_type": "user", "format": "long", "usage": "simulation.rtl", "is_static_object": false } ]
projects/cx9261a/zc706_cx9261a_demo/zc706_cx9261a_demo.srcs/sources_1/bd/system_bd/ip/system_bd_processing_system7_0_0/system_bd_processing_system7_0_0.xci
+7 -7
View File
@@ -255,7 +255,7 @@
"PCW_USE_S_AXI_HP1": [ { "value": "0", "resolve_type": "user", "format": "long", "usage": "all" } ],
"PCW_USE_S_AXI_HP2": [ { "value": "0", "resolve_type": "user", "format": "long", "usage": "all" } ],
"PCW_USE_S_AXI_HP3": [ { "value": "0", "resolve_type": "user", "format": "long", "usage": "all" } ],
"PCW_M_AXI_GP0_FREQMHZ": [ { "value": "50", "value_src": "propagated", "value_permission": "bd", "resolve_type": "user", "format": "long", "usage": "all" } ],
"PCW_M_AXI_GP0_FREQMHZ": [ { "value": "50.0", "value_src": "propagated", "value_permission": "bd", "resolve_type": "user", "format": "long", "usage": "all" } ],
"PCW_M_AXI_GP1_FREQMHZ": [ { "value": "10", "value_permission": "bd", "resolve_type": "user", "format": "long", "enabled": false, "usage": "all" } ],
"PCW_S_AXI_GP0_FREQMHZ": [ { "value": "10", "value_permission": "bd", "resolve_type": "user", "format": "long", "enabled": false, "usage": "all" } ],
"PCW_S_AXI_GP1_FREQMHZ": [ { "value": "10", "value_permission": "bd", "resolve_type": "user", "format": "long", "enabled": false, "usage": "all" } ],
@@ -326,7 +326,7 @@
"PCW_S_AXI_HP2_DATA_WIDTH": [ { "value": "64", "resolve_type": "user", "format": "long", "usage": "all" } ],
"PCW_S_AXI_HP3_ID_WIDTH": [ { "value": "6", "resolve_type": "user", "format": "long", "enabled": false, "usage": "all" } ],
"PCW_S_AXI_HP3_DATA_WIDTH": [ { "value": "64", "resolve_type": "user", "format": "long", "usage": "all" } ],
"PCW_NUM_F2P_INTR_INPUTS": [ { "value": "2", "value_src": "propagated", "value_permission": "bd", "resolve_type": "user", "format": "long", "usage": "all" } ],
"PCW_NUM_F2P_INTR_INPUTS": [ { "value": "1", "value_src": "propagated", "value_permission": "bd", "resolve_type": "user", "format": "long", "usage": "all" } ],
"PCW_EN_DDR": [ { "value": "1", "resolve_type": "user", "format": "long", "usage": "all" } ],
"PCW_EN_SMC": [ { "value": "0", "resolve_type": "user", "format": "long", "usage": "all" } ],
"PCW_EN_QSPI": [ { "value": "1", "value_src": "user", "resolve_type": "user", "format": "long", "usage": "all" } ],
@@ -919,7 +919,7 @@
"C_S_AXI_HP3_DATA_WIDTH": [ { "value": "64", "resolve_type": "dependent", "format": "long", "usage": "all" } ],
"C_M_AXI_GP0_THREAD_ID_WIDTH": [ { "value": "12", "resolve_type": "dependent", "format": "long", "usage": "all" } ],
"C_M_AXI_GP1_THREAD_ID_WIDTH": [ { "value": "12", "resolve_type": "dependent", "format": "long", "usage": "all" } ],
"C_NUM_F2P_INTR_INPUTS": [ { "value": "2", "resolve_type": "dependent", "format": "long", "usage": "all" } ],
"C_NUM_F2P_INTR_INPUTS": [ { "value": "1", "resolve_type": "dependent", "format": "long", "usage": "all" } ],
"C_IRQ_F2P_MODE": [ { "value": "DIRECT", "resolve_type": "dependent", "usage": "all" } ],
"C_DQ_WIDTH": [ { "value": "32", "resolve_type": "dependent", "format": "long", "usage": "all" } ],
"C_DQS_WIDTH": [ { "value": "4", "resolve_type": "dependent", "format": "long", "usage": "all" } ],
@@ -1020,7 +1020,7 @@
"M_AXI_GP0_BRESP": [ { "direction": "in", "size_left": "1", "size_right": "0", "driver_value": "0" } ],
"M_AXI_GP0_RRESP": [ { "direction": "in", "size_left": "1", "size_right": "0", "driver_value": "0" } ],
"M_AXI_GP0_RDATA": [ { "direction": "in", "size_left": "31", "size_right": "0", "driver_value": "0" } ],
"IRQ_F2P": [ { "direction": "in", "size_left": "1", "size_right": "0", "driver_value": "0" } ],
"IRQ_F2P": [ { "direction": "in", "size_left": "0", "size_right": "0", "driver_value": "0" } ],
"FCLK_CLK0": [ { "direction": "out" } ],
"FCLK_CLK1": [ { "direction": "out" } ],
"FCLK_RESET0_N": [ { "direction": "out" } ],
@@ -1132,7 +1132,7 @@
"NUM_READ_OUTSTANDING": [ { "value": "8", "value_src": "constant", "value_permission": "bd", "usage": "all" } ],
"DATA_WIDTH": [ { "value": "32", "value_src": "auto", "value_permission": "bd", "resolve_type": "generated", "format": "long", "is_static_object": false } ],
"PROTOCOL": [ { "value": "AXI3", "value_src": "auto", "value_permission": "bd", "resolve_type": "generated", "is_static_object": false } ],
"FREQ_HZ": [ { "value": "50000000", "value_src": "user_prop", "value_permission": "bd", "resolve_type": "generated", "format": "long", "is_static_object": false } ],
"FREQ_HZ": [ { "value": "5e+07", "value_src": "user_prop", "value_permission": "bd", "resolve_type": "generated", "format": "long", "is_static_object": false } ],
"ID_WIDTH": [ { "value": "12", "value_src": "auto", "value_permission": "bd", "resolve_type": "generated", "format": "long", "is_static_object": false } ],
"ADDR_WIDTH": [ { "value": "32", "value_src": "auto", "value_permission": "bd", "resolve_type": "generated", "format": "long", "is_static_object": false } ],
"AWUSER_WIDTH": [ { "value": "0", "value_src": "constant", "value_permission": "bd", "resolve_type": "generated", "format": "long", "is_static_object": false } ],
@@ -1250,7 +1250,7 @@
"mode": "slave",
"parameters": {
"SENSITIVITY": [ { "value": "LEVEL_HIGH:NULL", "value_src": "propagated", "value_permission": "bd", "resolve_type": "generated", "is_static_object": false } ],
"PortWidth": [ { "value": "2", "value_src": "ip_propagated", "value_permission": "bd", "resolve_type": "generated", "format": "long", "is_static_object": false } ]
"PortWidth": [ { "value": "1", "value_src": "ip_propagated", "value_permission": "bd", "resolve_type": "generated", "format": "long", "is_static_object": false } ]
},
"port_maps": {
"INTERRUPT": [ { "physical_name": "IRQ_F2P" } ]
@@ -1262,7 +1262,7 @@
"mode": "slave",
"parameters": {
"ASSOCIATED_BUSIF": [ { "value": "M_AXI_GP0", "value_src": "constant", "value_permission": "bd", "usage": "all" } ],
"FREQ_HZ": [ { "value": "50000000", "value_src": "user_prop", "value_permission": "bd", "resolve_type": "generated", "format": "long", "is_static_object": false } ],
"FREQ_HZ": [ { "value": "5e+07", "value_src": "user_prop", "value_permission": "bd", "resolve_type": "generated", "format": "long", "is_static_object": false } ],
"PHASE": [ { "value": "0.000", "value_permission": "bd", "resolve_type": "generated", "format": "float", "is_static_object": false } ],
"CLK_DOMAIN": [ { "value": "system_bd_processing_system7_0_0_FCLK_CLK0", "value_src": "default_prop", "value_permission": "bd", "resolve_type": "generated", "is_static_object": false } ],
"ASSOCIATED_RESET": [ { "value": "", "value_permission": "bd", "resolve_type": "generated", "is_static_object": false } ],
projects/cx9261a/zc706_cx9261a_demo/zc706_cx9261a_demo.srcs/sources_1/bd/system_bd/ip/system_bd_rst_ps7_50M_0/system_bd_rst_ps7_50M_0.xci
+1 -1
View File
@@ -76,7 +76,7 @@
"mode": "slave",
"parameters": {
"ASSOCIATED_RESET": [ { "value": "mb_reset:bus_struct_reset:interconnect_aresetn:peripheral_aresetn:peripheral_reset", "value_src": "constant", "value_permission": "bd", "usage": "all" } ],
"FREQ_HZ": [ { "value": "50000000", "value_src": "user_prop", "value_permission": "bd", "resolve_type": "user", "format": "long", "usage": "all" } ],
"FREQ_HZ": [ { "value": "5e+07", "value_src": "user_prop", "value_permission": "bd", "resolve_type": "user", "format": "long", "usage": "all" } ],
"FREQ_TOLERANCE_HZ": [ { "value": "0", "value_permission": "bd", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ],
"PHASE": [ { "value": "0.000", "value_src": "default_prop", "value_permission": "bd", "resolve_type": "generated", "format": "float", "is_ips_inferred": true, "is_static_object": false } ],
"CLK_DOMAIN": [ { "value": "system_bd_processing_system7_0_0_FCLK_CLK0", "value_src": "default_prop", "value_permission": "bd", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ],
projects/cx9261a/zc706_cx9261a_demo/zc706_cx9261a_demo.srcs/sources_1/bd/system_bd/ip/system_bd_spi_engine_execution_0_0/system_bd_spi_engine_execution_0_0.xci
+1 -1
View File
@@ -143,7 +143,7 @@
"parameters": {
"ASSOCIATED_BUSIF": [ { "value": "spi", "value_src": "constant", "value_permission": "bd_and_user", "usage": "all" } ],
"ASSOCIATED_RESET": [ { "value": "resetn", "value_src": "constant", "value_permission": "bd_and_user", "usage": "all" } ],
"FREQ_HZ": [ { "value": "50000000", "value_src": "user_prop", "value_permission": "bd_and_user", "resolve_type": "generated", "format": "long", "is_static_object": false } ],
"FREQ_HZ": [ { "value": "5e+07", "value_src": "user_prop", "value_permission": "bd_and_user", "resolve_type": "generated", "format": "long", "is_static_object": false } ],
"PHASE": [ { "value": "0.000", "value_permission": "bd_and_user", "resolve_type": "generated", "format": "float", "is_static_object": false } ],
"CLK_DOMAIN": [ { "value": "system_bd_processing_system7_0_0_FCLK_CLK0", "value_src": "default_prop", "value_permission": "bd_and_user", "resolve_type": "generated", "is_static_object": false } ],
"INSERT_VIP": [ { "value": "0", "resolve_type": "user", "format": "long", "usage": "simulation.rtl", "is_static_object": false } ]
projects/cx9261a/zc706_cx9261a_demo/zc706_cx9261a_demo.srcs/sources_1/bd/system_bd/ip/system_bd_xbar_0/system_bd_xbar_0.xci
-1523
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File diff suppressed because it is too large Load Diff
projects/cx9261a/zc706_cx9261a_demo/zc706_cx9261a_demo.srcs/sources_1/bd/system_bd/ip/system_bd_xlconcat_0_0/system_bd_xlconcat_0_0.xci
+5 -6
View File
@@ -9,7 +9,7 @@
"parameters": {
"component_parameters": {
"Component_Name": [ { "value": "system_bd_xlconcat_0_0", "resolve_type": "user", "usage": "all" } ],
"NUM_PORTS": [ { "value": "2", "value_src": "user", "resolve_type": "user", "format": "long", "usage": "all" } ],
"NUM_PORTS": [ { "value": "1", "value_src": "user", "resolve_type": "user", "format": "long", "usage": "all" } ],
"IN0_WIDTH": [ { "value": "1", "value_src": "propagated", "value_permission": "bd_and_user", "resolve_type": "user", "format": "long", "usage": "all" } ],
"IN1_WIDTH": [ { "value": "1", "value_src": "propagated", "value_permission": "bd_and_user", "resolve_type": "user", "format": "long", "usage": "all" } ],
"IN2_WIDTH": [ { "value": "1", "value_permission": "bd_and_user", "resolve_type": "user", "format": "long", "usage": "all" } ],
@@ -138,7 +138,7 @@
"IN125_WIDTH": [ { "value": "1", "value_permission": "bd_and_user", "resolve_type": "user", "format": "long", "usage": "all" } ],
"IN126_WIDTH": [ { "value": "1", "value_permission": "bd_and_user", "resolve_type": "user", "format": "long", "usage": "all" } ],
"IN127_WIDTH": [ { "value": "1", "value_permission": "bd_and_user", "resolve_type": "user", "format": "long", "usage": "all" } ],
"dout_width": [ { "value": "2", "value_src": "user", "value_permission": "bd", "resolve_type": "user", "format": "long", "usage": "all" } ]
"dout_width": [ { "value": "1", "value_src": "user", "value_permission": "bd", "resolve_type": "user", "format": "long", "usage": "all" } ]
},
"model_parameters": {
"IN0_WIDTH": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ],
@@ -269,8 +269,8 @@
"IN125_WIDTH": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"IN126_WIDTH": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"IN127_WIDTH": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"dout_width": [ { "value": "2", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"NUM_PORTS": [ { "value": "2", "resolve_type": "generated", "format": "long", "usage": "all" } ]
"dout_width": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"NUM_PORTS": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ]
},
"project_parameters": {
"ARCHITECTURE": [ { "value": "zynq" } ],
@@ -300,8 +300,7 @@
"boundary": {
"ports": {
"In0": [ { "direction": "in", "size_left": "0", "size_right": "0", "driver_value": "0" } ],
"In1": [ { "direction": "in", "size_left": "0", "size_right": "0", "driver_value": "0" } ],
"dout": [ { "direction": "out", "size_left": "1", "size_right": "0" } ]
"dout": [ { "direction": "out", "size_left": "0", "size_right": "0" } ]
}
}
}
projects/cx9261a/zc706_cx9261a_demo/zc706_cx9261a_demo.srcs/sources_1/bd/system_bd/system_bd.bd
+25 -272
View File
@@ -1,7 +1,7 @@
{
"design": {
"design_info": {
"boundary_crc": "0x8931701A97E97C15",
"boundary_crc": "0x6563BD50C34E7A74",
"device": "xc7z045ffg900-2",
"gen_directory": "../../../../zc706_cx9261a_demo.gen/sources_1/bd/system_bd",
"name": "system_bd",
@@ -18,15 +18,11 @@
},
"rst_ps7_50M": "",
"axi_interconnect": {
"xbar": "",
"s00_couplers": {
"auto_pc": ""
},
"m00_couplers": {},
"m01_couplers": {}
}
},
"xlconcat_irq": "",
"axi_gpio_hop": ""
"xlconcat_irq": ""
},
"interface_ports": {
"ddr": {
@@ -231,19 +227,6 @@
"right": "0"
}
}
},
"gpio_hop": {
"mode": "Master",
"vlnv_bus_definition": "xilinx.com:interface:gpio:1.0",
"vlnv": "xilinx.com:interface:gpio_rtl:1.0",
"port_maps": {
"TRI_I": {
"physical_name": "gpio_hop_tri_i",
"direction": "I",
"left": "0",
"right": "0"
}
}
}
},
"ports": {
@@ -1446,7 +1429,7 @@
"xci_name": "system_bd_axi_interconnect_0_0",
"parameters": {
"NUM_MI": {
"value": "2"
"value": "1"
}
},
"interface_ports": {
@@ -1459,11 +1442,6 @@
"mode": "Master",
"vlnv_bus_definition": "xilinx.com:interface:aximm:1.0",
"vlnv": "xilinx.com:interface:aximm_rtl:1.0"
},
"M01_AXI": {
"mode": "Master",
"vlnv_bus_definition": "xilinx.com:interface:aximm:1.0",
"vlnv": "xilinx.com:interface:aximm_rtl:1.0"
}
},
"ports": {
@@ -1511,53 +1489,9 @@
"M00_ARESETN": {
"type": "rst",
"direction": "I"
},
"M01_ACLK": {
"type": "clk",
"direction": "I",
"parameters": {
"ASSOCIATED_BUSIF": {
"value": "M01_AXI"
},
"ASSOCIATED_RESET": {
"value": "M01_ARESETN"
}
}
},
"M01_ARESETN": {
"type": "rst",
"direction": "I"
}
},
"components": {
"xbar": {
"vlnv": "xilinx.com:ip:axi_crossbar:2.1",
"ip_revision": "32",
"xci_name": "system_bd_xbar_0",
"xci_path": "ip/system_bd_xbar_0/system_bd_xbar_0.xci",
"inst_hier_path": "axi_interconnect/xbar",
"parameters": {
"NUM_MI": {
"value": "2"
},
"NUM_SI": {
"value": "1"
},
"STRATEGY": {
"value": "0"
}
},
"interface_ports": {
"S00_AXI": {
"vlnv": "xilinx.com:interface:aximm_rtl:1.0",
"mode": "Slave",
"bridges": [
"M00_AXI",
"M01_AXI"
]
}
}
},
"s00_couplers": {
"interface_ports": {
"M_AXI": {
@@ -1659,118 +1593,6 @@
]
}
}
},
"m00_couplers": {
"interface_ports": {
"M_AXI": {
"mode": "Master",
"vlnv_bus_definition": "xilinx.com:interface:aximm:1.0",
"vlnv": "xilinx.com:interface:aximm_rtl:1.0"
},
"S_AXI": {
"mode": "Slave",
"vlnv_bus_definition": "xilinx.com:interface:aximm:1.0",
"vlnv": "xilinx.com:interface:aximm_rtl:1.0"
}
},
"ports": {
"M_ACLK": {
"type": "clk",
"direction": "I",
"parameters": {
"ASSOCIATED_BUSIF": {
"value": "M_AXI"
},
"ASSOCIATED_RESET": {
"value": "M_ARESETN"
}
}
},
"M_ARESETN": {
"type": "rst",
"direction": "I"
},
"S_ACLK": {
"type": "clk",
"direction": "I",
"parameters": {
"ASSOCIATED_BUSIF": {
"value": "S_AXI"
},
"ASSOCIATED_RESET": {
"value": "S_ARESETN"
}
}
},
"S_ARESETN": {
"type": "rst",
"direction": "I"
}
},
"interface_nets": {
"m00_couplers_to_m00_couplers": {
"interface_ports": [
"S_AXI",
"M_AXI"
]
}
}
},
"m01_couplers": {
"interface_ports": {
"M_AXI": {
"mode": "Master",
"vlnv_bus_definition": "xilinx.com:interface:aximm:1.0",
"vlnv": "xilinx.com:interface:aximm_rtl:1.0"
},
"S_AXI": {
"mode": "Slave",
"vlnv_bus_definition": "xilinx.com:interface:aximm:1.0",
"vlnv": "xilinx.com:interface:aximm_rtl:1.0"
}
},
"ports": {
"M_ACLK": {
"type": "clk",
"direction": "I",
"parameters": {
"ASSOCIATED_BUSIF": {
"value": "M_AXI"
},
"ASSOCIATED_RESET": {
"value": "M_ARESETN"
}
}
},
"M_ARESETN": {
"type": "rst",
"direction": "I"
},
"S_ACLK": {
"type": "clk",
"direction": "I",
"parameters": {
"ASSOCIATED_BUSIF": {
"value": "S_AXI"
},
"ASSOCIATED_RESET": {
"value": "S_ARESETN"
}
}
},
"S_ARESETN": {
"type": "rst",
"direction": "I"
}
},
"interface_nets": {
"m01_couplers_to_m01_couplers": {
"interface_ports": [
"S_AXI",
"M_AXI"
]
}
}
}
},
"interface_nets": {
@@ -1780,60 +1602,36 @@
"s00_couplers/S_AXI"
]
},
"m00_couplers_to_axi_interconnect": {
"interface_ports": [
"m00_couplers/M_AXI",
"M00_AXI"
]
},
"m01_couplers_to_axi_interconnect": {
"interface_ports": [
"m01_couplers/M_AXI",
"M01_AXI"
]
},
"s00_couplers_to_xbar": {
"s00_couplers_to_axi_interconnect": {
"interface_ports": [
"s00_couplers/M_AXI",
"xbar/S00_AXI"
]
},
"xbar_to_m00_couplers": {
"interface_ports": [
"xbar/M00_AXI",
"m00_couplers/S_AXI"
]
},
"xbar_to_m01_couplers": {
"interface_ports": [
"xbar/M01_AXI",
"m01_couplers/S_AXI"
"M00_AXI"
]
}
},
"nets": {
"S00_ACLK_1": {
"ports": [
"S00_ACLK",
"s00_couplers/S_ACLK"
]
},
"S00_ARESETN_1": {
"ports": [
"S00_ARESETN",
"s00_couplers/S_ARESETN"
]
},
"axi_interconnect_ACLK_net": {
"ports": [
"ACLK",
"xbar/aclk",
"s00_couplers/S_ACLK",
"s00_couplers/M_ACLK",
"m00_couplers/M_ACLK",
"m01_couplers/M_ACLK",
"m00_couplers/S_ACLK",
"m01_couplers/S_ACLK"
"M00_ACLK",
"s00_couplers/M_ACLK"
]
},
"axi_interconnect_ARESETN_net": {
"ports": [
"ARESETN",
"xbar/aresetn",
"s00_couplers/S_ARESETN",
"s00_couplers/M_ARESETN",
"m00_couplers/M_ARESETN",
"m01_couplers/M_ARESETN",
"m00_couplers/S_ARESETN",
"m01_couplers/S_ARESETN"
"M00_ARESETN",
"s00_couplers/M_ARESETN"
]
}
}
@@ -1846,51 +1644,21 @@
"inst_hier_path": "xlconcat_irq",
"parameters": {
"NUM_PORTS": {
"value": "2"
"value": "1"
},
"dout_width": {
"value": "2"
}
}
},
"axi_gpio_hop": {
"vlnv": "xilinx.com:ip:axi_gpio:2.0",
"ip_revision": "33",
"xci_name": "system_bd_axi_gpio_0_0",
"xci_path": "ip/system_bd_axi_gpio_0_0/system_bd_axi_gpio_0_0.xci",
"inst_hier_path": "axi_gpio_hop",
"parameters": {
"C_ALL_INPUTS": {
"value": "1"
},
"C_GPIO_WIDTH": {
"value": "1"
},
"C_INTERRUPT_PRESENT": {
"value": "1"
}
}
}
},
"interface_nets": {
"axi_gpio_hop_GPIO": {
"interface_ports": [
"gpio_hop",
"axi_gpio_hop/GPIO"
]
},
"axi_interconnect_0_M00_AXI": {
"interface_ports": [
"axi_interconnect/M00_AXI",
"axi_spi_engine/s_axi"
]
},
"axi_interconnect_M01_AXI": {
"interface_ports": [
"axi_interconnect/M01_AXI",
"axi_gpio_hop/S_AXI"
]
},
"axi_spi_engine_spi_0": {
"interface_ports": [
"spi",
@@ -1923,12 +1691,6 @@
"processing_system7/GPIO_I"
]
},
"axi_gpio_hop_ip2intc_irpt": {
"ports": [
"axi_gpio_hop/ip2intc_irpt",
"xlconcat_irq/In1"
]
},
"axi_spi_engine_active_0": {
"ports": [
"axi_spi_engine/active",
@@ -1950,9 +1712,7 @@
"axi_interconnect/ACLK",
"axi_interconnect/S00_ACLK",
"axi_interconnect/M00_ACLK",
"rst_ps7_50M/slowest_sync_clk",
"axi_gpio_hop/s_axi_aclk",
"axi_interconnect/M01_ACLK"
"rst_ps7_50M/slowest_sync_clk"
]
},
"processing_system7_FCLK_CLK1": {
@@ -1985,9 +1745,7 @@
"axi_spi_engine/s_axi_aresetn",
"axi_interconnect/ARESETN",
"axi_interconnect/S00_ARESETN",
"axi_interconnect/M00_ARESETN",
"axi_gpio_hop/s_axi_aresetn",
"axi_interconnect/M01_ARESETN"
"axi_interconnect/M00_ARESETN"
]
},
"xlconcat_irq_dout": {
@@ -2002,11 +1760,6 @@
"address_spaces": {
"Data": {
"segments": {
"SEG_axi_gpio_hop_Reg": {
"address_block": "/axi_gpio_hop/S_AXI/Reg",
"offset": "0x41200000",
"range": "64K"
},
"SEG_axi_spi_engine_axi_lite": {
"address_block": "/axi_spi_engine/axi_spi_engine/s_axi/axi_lite",
"offset": "0x43C00000",
projects/cx9261a/zc706_cx9261a_demo/zc706_cx9261a_demo.srcs/sources_1/bd/system_bd/system_bd.bda
-23
View File
@@ -189,24 +189,6 @@
"TU": "active"
},
"V3": {
"VT": "AC",
"BA": "0x41200000",
"HA": "0x4120FFFF",
"BP": "C_BASEADDR",
"HP": "C_HIGHADDR",
"MA": "Data",
"MX": "/processing_system7",
"MI": "M_AXI_GP0",
"MS": "SEG_axi_gpio_hop_Reg",
"MV": "xilinx.com:ip:processing_system7:5.5",
"SX": "/axi_gpio_hop",
"SI": "S_AXI",
"SS": "Reg",
"SV": "xilinx.com:ip:axi_gpio:2.0",
"TM": "both",
"TU": "register"
},
"V4": {
"VT": "AC",
"BA": "0x43C00000",
"HA": "0x43C0FFFF",
@@ -238,11 +220,6 @@
"src": "V3",
"trg": "V2",
"EH": "2"
},
{
"src": "V4",
"trg": "V2",
"EH": "2"
}
]
}
projects/cx9261a/zc706_cx9261a_demo/zc706_cx9261a_demo.srcs/sources_1/bd/system_bd/ui/bd_c6d0cb12.ui
+25 -30
View File
@@ -1,45 +1,40 @@
{
"ActiveEmotionalView":"Default View",
"Default View_ScaleFactor":"0.969231",
"Default View_TopLeft":"-420,3",
"Default View_ScaleFactor":"0.971598",
"Default View_TopLeft":"-432,3",
"ExpandedHierarchyInLayout":"",
"guistr":"# # String gsaved with Nlview 7.7.1 2023-07-26 3bc4126617 VDI=43 GEI=38 GUI=JA:21.0 TLS
# -string -flagsOSRD
preplace port ddr -pg 1 -lvl 3 -x 900 -y 140 -defaultsOSRD
preplace port fixed_io -pg 1 -lvl 3 -x 900 -y 160 -defaultsOSRD
preplace port spi -pg 1 -lvl 3 -x 900 -y 750 -defaultsOSRD
preplace port gpio_hop -pg 1 -lvl 3 -x 900 -y 580 -defaultsOSRD
preplace port port-id_spi_active -pg 1 -lvl 3 -x 900 -y 770 -defaultsOSRD
preplace port port-id_ps_clk_200M -pg 1 -lvl 3 -x 900 -y 180 -defaultsOSRD
preplace portBus gpio_i -pg 1 -lvl 3 -x 900 -y 80 -defaultsOSRD -right
preplace portBus gpio_o -pg 1 -lvl 3 -x 900 -y 100 -defaultsOSRD
preplace portBus gpio_t -pg 1 -lvl 3 -x 900 -y 120 -defaultsOSRD
preplace port ddr -pg 1 -lvl 3 -x 870 -y 140 -defaultsOSRD
preplace port fixed_io -pg 1 -lvl 3 -x 870 -y 160 -defaultsOSRD
preplace port spi -pg 1 -lvl 3 -x 870 -y 750 -defaultsOSRD
preplace port port-id_spi_active -pg 1 -lvl 3 -x 870 -y 770 -defaultsOSRD
preplace port port-id_ps_clk_200M -pg 1 -lvl 3 -x 870 -y 240 -defaultsOSRD
preplace portBus gpio_i -pg 1 -lvl 3 -x 870 -y 80 -defaultsOSRD -right
preplace portBus gpio_o -pg 1 -lvl 3 -x 870 -y 100 -defaultsOSRD
preplace portBus gpio_t -pg 1 -lvl 3 -x 870 -y 120 -defaultsOSRD
preplace inst processing_system7 -pg 1 -lvl 1 -x 260 -y 190 -defaultsOSRD
preplace inst axi_spi_engine -pg 1 -lvl 1 -x 260 -y 770 -defaultsOSRD
preplace inst rst_ps7_50M -pg 1 -lvl 2 -x 690 -y 290 -defaultsOSRD
preplace inst axi_interconnect -pg 1 -lvl 1 -x 260 -y 560 -defaultsOSRD
preplace inst xlconcat_irq -pg 1 -lvl 2 -x 690 -y 440 -defaultsOSRD -orient R180
preplace inst axi_gpio_hop -pg 1 -lvl 2 -x 690 -y 590 -defaultsOSRD
preplace netloc axi_spi_engine_active_0 1 1 2 N 770 N
preplace netloc processing_system7_FCLK_CLK0 1 0 2 20 380 510
preplace netloc processing_system7_FCLK_RESET0_N 1 1 1 500 270n
preplace netloc rst_ps7_50M_peripheral_aresetn 1 0 3 40 410 490J 190 880
preplace netloc axi_spi_engine_irq 1 1 2 N 790 870
preplace netloc xlconcat_irq_dout 1 0 2 50 390 480
preplace netloc processing_system7_FCLK_CLK1 1 1 2 480J 180 NJ
preplace inst rst_ps7_50M -pg 1 -lvl 2 -x 670 -y 340 -defaultsOSRD
preplace inst axi_interconnect -pg 1 -lvl 1 -x 260 -y 580 -defaultsOSRD
preplace inst xlconcat_irq -pg 1 -lvl 2 -x 670 -y 500 -defaultsOSRD -orient R180
preplace netloc GPIO_I_0_1 1 1 2 N 80 N
preplace netloc axi_spi_engine_active_0 1 1 2 N 770 N
preplace netloc axi_spi_engine_irq 1 1 2 N 790 850
preplace netloc processing_system7_FCLK_CLK0 1 0 2 20 380 490
preplace netloc processing_system7_FCLK_CLK1 1 1 2 480J 240 NJ
preplace netloc processing_system7_FCLK_RESET0_N 1 1 1 N 320
preplace netloc processing_system7_GPIO_O 1 1 2 NJ 100 NJ
preplace netloc processing_system7_GPIO_T 1 1 2 NJ 120 NJ
preplace netloc axi_gpio_hop_ip2intc_irpt 1 2 1 880 430n
preplace netloc processing_system7_M_AXI_GP0 1 0 2 30 400 470
preplace netloc processing_system7_DDR 1 1 2 NJ 140 N
preplace netloc axi_interconnect_0_M00_AXI 1 0 2 50 420 470
preplace netloc rst_ps7_50M_peripheral_aresetn 1 0 3 40 440 NJ 440 850
preplace netloc xlconcat_irq_dout 1 0 2 50 450 490
preplace netloc axi_interconnect_0_M00_AXI 1 0 2 50 460 470
preplace netloc axi_spi_engine_spi_0 1 1 2 N 750 N
preplace netloc processing_system7_DDR 1 1 2 NJ 140 N
preplace netloc processing_system7_FIXED_IO 1 1 2 NJ 160 N
preplace netloc axi_interconnect_M01_AXI 1 1 1 N 570
preplace netloc axi_gpio_hop_GPIO 1 2 1 N 580
levelinfo -pg 1 0 260 690 900
pagesize -pg 1 -db -bbox -sgen 0 0 1070 850
preplace netloc processing_system7_M_AXI_GP0 1 0 2 30 390 470
levelinfo -pg 1 0 260 670 870
pagesize -pg 1 -db -bbox -sgen 0 0 1010 850
"
}
{
projects/cx9261a/zc706_cx9261a_demo/zc706_cx9261a_demo.srcs/sources_1/new/system_top.v
+3 -2
View File
@@ -123,7 +123,9 @@ assign cx9261a_mclk_delay_ctrl1 = gpio_o[13];
assign cx9261a_mclk_delay_ctrl2 = gpio_o[14];
assign hop_en = gpio_o[15];
assign gpio_i[31:16] = gpio_o[31:16];
assign gpio_i[16] = gpio_hop_flag;
assign gpio_i[31:17] = gpio_o[31:17];
// spi interface
wire spi_sclk ;
@@ -174,7 +176,6 @@ system_bd_wrapper system_bd
.gpio_i (gpio_i ), // input [31:0]gpio_i
.gpio_o (gpio_o ), // output [31:0]gpio_o
.gpio_t (gpio_t ), // output [31:0]gpio_t
.gpio_hop_tri_i (gpio_hop_flag ), // input [0:0]gpio_hop_tri_i
// spi interface
.spi_sclk (spi_sclk ), // output spi_sclk