analog.com user util_fir_int 1.0 xilinx_anylanguagesynthesis Synthesis :vivado.xilinx.com:synthesis Verilog util_fir_int xilinx_anylanguagesynthesis_xilinx_com_ip_fir_compiler_7_2__ref_view_fileset xilinx_anylanguagesynthesis_view_fileset viewChecksum 20812f76 xilinx_anylanguagebehavioralsimulation Simulation :vivado.xilinx.com:simulation Verilog util_fir_int xilinx_anylanguagebehavioralsimulation_xilinx_com_ip_fir_compiler_7_2__ref_view_fileset xilinx_anylanguagebehavioralsimulation_view_fileset viewChecksum 20812f76 xilinx_xpgui UI Layout :vivado.xilinx.com:xgui.ui xilinx_xpgui_view_fileset viewChecksum f92e9879 aclk in std_logic xilinx_anylanguagesynthesis xilinx_anylanguagebehavioralsimulation s_axis_data_tvalid in std_logic xilinx_anylanguagesynthesis xilinx_anylanguagebehavioralsimulation 0 s_axis_data_tready out std_logic xilinx_anylanguagesynthesis xilinx_anylanguagebehavioralsimulation s_axis_data_tdata in 31 0 std_logic_vector xilinx_anylanguagesynthesis xilinx_anylanguagebehavioralsimulation 0 channel_0 out 15 0 std_logic_vector xilinx_anylanguagesynthesis xilinx_anylanguagebehavioralsimulation channel_1 out 15 0 std_logic_vector xilinx_anylanguagesynthesis xilinx_anylanguagebehavioralsimulation m_axis_data_tvalid out std_logic xilinx_anylanguagesynthesis xilinx_anylanguagebehavioralsimulation interpolate in std_logic xilinx_anylanguagesynthesis xilinx_anylanguagebehavioralsimulation dac_read in std_logic xilinx_anylanguagesynthesis xilinx_anylanguagebehavioralsimulation xilinx_anylanguagesynthesis_view_fileset coefile_int.coe coe util_fir_int.srcs/sources_1/ip/fir_interp/fir_interp.xci xci CELL_NAME_interpolator util_fir_int.v verilogSource CHECKSUM_cfeb71c7 xilinx_anylanguagesynthesis_xilinx_com_ip_fir_compiler_7_2__ref_view_fileset xilinx_anylanguagebehavioralsimulation_view_fileset coefile_int.coe coe util_fir_int.srcs/sources_1/ip/fir_interp/fir_interp.xci xci CELL_NAME_interpolator util_fir_int.v verilogSource xilinx_anylanguagebehavioralsimulation_xilinx_com_ip_fir_compiler_7_2__ref_view_fileset xilinx_xpgui_view_fileset xgui/util_fir_int_v1_0.tcl tclSource CHECKSUM_f92e9879 XGUI_VERSION_2 util_fir_int_v1_0 Component_Name util_fir_int_v1_0 virtex7 /Analog_Devices util_fir_int_v1_0 level_2 package_project Analog Devices http://www.analog.com 1 2024-01-14T03:55:02Z 2023.2.1