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`ifndef if_gt_rx_v1_0
`define if_gt_rx_v1_0

interface if_gt_rx_v1_0();
  logic rx_p;                                            // 
  logic rx_n;                                            // 
  logic rx_rst;                                          // 
  logic rx_rst_m;                                        // 
  logic rx_pll_rst;                                      // 
  logic rx_gt_rst;                                       // 
  logic rx_gt_rst_m;                                     // 
  logic rx_pll_locked;                                   // 
  logic rx_pll_locked_m;                                 // 
  logic rx_user_ready;                                   // 
  logic rx_user_ready_m;                                 // 
  logic rx_rst_done;                                     // 
  logic rx_rst_done_m;                                   // 
  logic rx_out_clk;                                      // 
  logic rx_clk;                                          // 
  logic rx_sysref;                                       // 
  logic rx_sync;                                         // 
  logic rx_sof;                                          // 
  logic [31:0] rx_data;                                   // 
  logic rx_ip_rst;                                       // 
  logic [3:0] rx_ip_sof;                                 // 
  logic [31:0] rx_ip_data;                                // 
  logic rx_ip_sysref;                                    // 
  logic rx_ip_sync;                                      // 
  logic rx_ip_rst_done;                                  // 

  modport MASTER (
    input rx_rst, rx_pll_rst, rx_gt_rst, rx_pll_locked, rx_user_ready, rx_rst_done, rx_out_clk, rx_sync, rx_sof, rx_data, rx_ip_rst, rx_ip_sysref, rx_ip_rst_done, 
    output rx_p, rx_n, rx_rst_m, rx_gt_rst_m, rx_pll_locked_m, rx_user_ready_m, rx_rst_done_m, rx_clk, rx_sysref, rx_ip_sof, rx_ip_data, rx_ip_sync
    );

  modport SLAVE (
    input rx_p, rx_n, rx_rst_m, rx_gt_rst_m, rx_pll_locked_m, rx_user_ready_m, rx_rst_done_m, rx_clk, rx_sysref, rx_ip_sof, rx_ip_data, rx_ip_sync, 
    output rx_rst, rx_pll_rst, rx_gt_rst, rx_pll_locked, rx_user_ready, rx_rst_done, rx_out_clk, rx_sync, rx_sof, rx_data, rx_ip_rst, rx_ip_sysref, rx_ip_rst_done
    );

  modport MONITOR (
    input rx_p, rx_n, rx_rst, rx_rst_m, rx_pll_rst, rx_gt_rst, rx_gt_rst_m, rx_pll_locked, rx_pll_locked_m, rx_user_ready, rx_user_ready_m, rx_rst_done, rx_rst_done_m, rx_out_clk, rx_clk, rx_sysref, rx_sync, rx_sof, rx_data, rx_ip_rst, rx_ip_sof, rx_ip_data, rx_ip_sysref, rx_ip_sync, rx_ip_rst_done
    );

endinterface // if_gt_rx_v1_0

`endif