3225 lines
144 KiB
XML
3225 lines
144 KiB
XML
<?xml version="1.0" encoding="UTF-8"?>
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<spirit:component xmlns:xilinx="http://www.xilinx.com" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
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<spirit:vendor>analog.com</spirit:vendor>
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<spirit:library>user</spirit:library>
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<spirit:name>axi_adrv9001</spirit:name>
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<spirit:version>1.0</spirit:version>
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<spirit:busInterfaces>
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<spirit:busInterface>
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<spirit:name>s_axi</spirit:name>
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<spirit:busType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="aximm" spirit:version="1.0"/>
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<spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="aximm_rtl" spirit:version="1.0"/>
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<spirit:slave>
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<spirit:memoryMapRef spirit:memoryMapRef="s_axi"/>
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</spirit:slave>
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<spirit:portMaps>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>AWADDR</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>s_axi_awaddr</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>AWPROT</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>s_axi_awprot</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>AWVALID</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>s_axi_awvalid</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>AWREADY</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>s_axi_awready</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>WDATA</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>s_axi_wdata</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>WSTRB</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>s_axi_wstrb</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>WVALID</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>s_axi_wvalid</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>WREADY</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>s_axi_wready</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>BRESP</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>s_axi_bresp</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>BVALID</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>s_axi_bvalid</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>BREADY</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>s_axi_bready</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>ARADDR</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>s_axi_araddr</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>ARPROT</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>s_axi_arprot</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>ARVALID</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>s_axi_arvalid</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>ARREADY</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>s_axi_arready</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>RDATA</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>s_axi_rdata</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>RRESP</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>s_axi_rresp</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>RVALID</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>s_axi_rvalid</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>RREADY</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>s_axi_rready</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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</spirit:portMaps>
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</spirit:busInterface>
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<spirit:busInterface>
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<spirit:name>s_axi_aclk</spirit:name>
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<spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock" spirit:version="1.0"/>
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<spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock_rtl" spirit:version="1.0"/>
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<spirit:slave/>
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<spirit:portMaps>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>CLK</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>s_axi_aclk</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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</spirit:portMaps>
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<spirit:parameters>
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<spirit:parameter>
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<spirit:name>ASSOCIATED_BUSIF</spirit:name>
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<spirit:value spirit:id="BUSIFPARAM_VALUE.S_AXI_ACLK.ASSOCIATED_BUSIF">s_axi</spirit:value>
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</spirit:parameter>
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<spirit:parameter>
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<spirit:name>ASSOCIATED_RESET</spirit:name>
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<spirit:value spirit:id="BUSIFPARAM_VALUE.S_AXI_ACLK.ASSOCIATED_RESET">s_axi_aresetn</spirit:value>
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</spirit:parameter>
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</spirit:parameters>
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</spirit:busInterface>
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<spirit:busInterface>
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<spirit:name>s_axi_aresetn</spirit:name>
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<spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="reset" spirit:version="1.0"/>
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<spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="reset_rtl" spirit:version="1.0"/>
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<spirit:slave/>
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<spirit:portMaps>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>RST</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>s_axi_aresetn</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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</spirit:portMaps>
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<spirit:parameters>
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<spirit:parameter>
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<spirit:name>POLARITY</spirit:name>
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<spirit:value spirit:id="BUSIFPARAM_VALUE.S_AXI_ARESETN.POLARITY" spirit:choiceRef="choice_list_74b5137e">ACTIVE_LOW</spirit:value>
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</spirit:parameter>
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</spirit:parameters>
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</spirit:busInterface>
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<spirit:busInterface>
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<spirit:name>delay_clk</spirit:name>
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<spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock" spirit:version="1.0"/>
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<spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock_rtl" spirit:version="1.0"/>
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<spirit:slave/>
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<spirit:portMaps>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>CLK</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>delay_clk</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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</spirit:portMaps>
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</spirit:busInterface>
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<spirit:busInterface>
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<spirit:name>adc_1_clk</spirit:name>
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<spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock" spirit:version="1.0"/>
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<spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock_rtl" spirit:version="1.0"/>
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<spirit:master/>
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<spirit:portMaps>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>CLK</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>adc_1_clk</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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</spirit:portMaps>
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<spirit:parameters>
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<spirit:parameter>
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<spirit:name>ASSOCIATED_RESET</spirit:name>
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<spirit:value spirit:id="BUSIFPARAM_VALUE.ADC_1_CLK.ASSOCIATED_RESET">adc_1_rst</spirit:value>
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</spirit:parameter>
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</spirit:parameters>
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</spirit:busInterface>
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<spirit:busInterface>
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<spirit:name>adc_2_clk</spirit:name>
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<spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock" spirit:version="1.0"/>
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<spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock_rtl" spirit:version="1.0"/>
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<spirit:master/>
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<spirit:portMaps>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>CLK</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>adc_2_clk</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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</spirit:portMaps>
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<spirit:parameters>
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<spirit:parameter>
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<spirit:name>ASSOCIATED_RESET</spirit:name>
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<spirit:value spirit:id="BUSIFPARAM_VALUE.ADC_2_CLK.ASSOCIATED_RESET">adc_2_rst</spirit:value>
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</spirit:parameter>
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</spirit:parameters>
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</spirit:busInterface>
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<spirit:busInterface>
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<spirit:name>dac_1_clk</spirit:name>
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<spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock" spirit:version="1.0"/>
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<spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock_rtl" spirit:version="1.0"/>
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<spirit:master/>
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<spirit:portMaps>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>CLK</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>dac_1_clk</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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</spirit:portMaps>
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<spirit:parameters>
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<spirit:parameter>
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<spirit:name>ASSOCIATED_RESET</spirit:name>
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<spirit:value spirit:id="BUSIFPARAM_VALUE.DAC_1_CLK.ASSOCIATED_RESET">dac_1_rst</spirit:value>
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</spirit:parameter>
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</spirit:parameters>
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</spirit:busInterface>
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<spirit:busInterface>
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<spirit:name>dac_2_clk</spirit:name>
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<spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock" spirit:version="1.0"/>
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<spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock_rtl" spirit:version="1.0"/>
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<spirit:master/>
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<spirit:portMaps>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>CLK</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>dac_2_clk</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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</spirit:portMaps>
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<spirit:parameters>
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<spirit:parameter>
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<spirit:name>ASSOCIATED_RESET</spirit:name>
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<spirit:value spirit:id="BUSIFPARAM_VALUE.DAC_2_CLK.ASSOCIATED_RESET">dac_2_rst</spirit:value>
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</spirit:parameter>
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</spirit:parameters>
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</spirit:busInterface>
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<spirit:busInterface>
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<spirit:name>adc_1_rst</spirit:name>
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<spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="reset" spirit:version="1.0"/>
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<spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="reset_rtl" spirit:version="1.0"/>
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<spirit:master/>
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<spirit:portMaps>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>RST</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>adc_1_rst</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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</spirit:portMaps>
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<spirit:parameters>
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<spirit:parameter>
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<spirit:name>POLARITY</spirit:name>
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<spirit:value spirit:id="BUSIFPARAM_VALUE.ADC_1_RST.POLARITY"/>
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</spirit:parameter>
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</spirit:parameters>
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</spirit:busInterface>
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<spirit:busInterface>
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<spirit:name>adc_2_rst</spirit:name>
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<spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="reset" spirit:version="1.0"/>
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<spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="reset_rtl" spirit:version="1.0"/>
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<spirit:master/>
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<spirit:portMaps>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>RST</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>adc_2_rst</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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</spirit:portMaps>
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<spirit:parameters>
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<spirit:parameter>
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<spirit:name>POLARITY</spirit:name>
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<spirit:value spirit:id="BUSIFPARAM_VALUE.ADC_2_RST.POLARITY"/>
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</spirit:parameter>
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</spirit:parameters>
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</spirit:busInterface>
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<spirit:busInterface>
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<spirit:name>dac_1_rst</spirit:name>
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<spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="reset" spirit:version="1.0"/>
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<spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="reset_rtl" spirit:version="1.0"/>
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<spirit:master/>
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<spirit:portMaps>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>RST</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>dac_1_rst</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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</spirit:portMaps>
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<spirit:parameters>
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<spirit:parameter>
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<spirit:name>POLARITY</spirit:name>
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<spirit:value spirit:id="BUSIFPARAM_VALUE.DAC_1_RST.POLARITY"/>
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</spirit:parameter>
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</spirit:parameters>
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</spirit:busInterface>
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<spirit:busInterface>
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<spirit:name>dac_2_rst</spirit:name>
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<spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="reset" spirit:version="1.0"/>
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<spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="reset_rtl" spirit:version="1.0"/>
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<spirit:master/>
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<spirit:portMaps>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>RST</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>dac_2_rst</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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</spirit:portMaps>
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<spirit:parameters>
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<spirit:parameter>
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<spirit:name>POLARITY</spirit:name>
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<spirit:value spirit:id="BUSIFPARAM_VALUE.DAC_2_RST.POLARITY"/>
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</spirit:parameter>
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</spirit:parameters>
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</spirit:busInterface>
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</spirit:busInterfaces>
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<spirit:memoryMaps>
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<spirit:memoryMap>
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<spirit:name>s_axi</spirit:name>
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<spirit:addressBlock>
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<spirit:name>axi_lite</spirit:name>
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<spirit:baseAddress spirit:format="long">0</spirit:baseAddress>
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<spirit:range spirit:format="long">65536</spirit:range>
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<spirit:width spirit:format="long">0</spirit:width>
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</spirit:addressBlock>
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</spirit:memoryMap>
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</spirit:memoryMaps>
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<spirit:model>
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<spirit:views>
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<spirit:view>
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<spirit:name>xilinx_anylanguagesynthesis</spirit:name>
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<spirit:displayName>Synthesis</spirit:displayName>
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<spirit:envIdentifier>:vivado.xilinx.com:synthesis</spirit:envIdentifier>
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<spirit:language>Verilog</spirit:language>
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<spirit:modelName>axi_adrv9001</spirit:modelName>
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<spirit:fileSetRef>
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<spirit:localName>xilinx_anylanguagesynthesis_analog_com_user_util_cdc_1_0__ref_view_fileset</spirit:localName>
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</spirit:fileSetRef>
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<spirit:fileSetRef>
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<spirit:localName>xilinx_anylanguagesynthesis_view_fileset</spirit:localName>
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|
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|
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|
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|
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<spirit:direction>in</spirit:direction>
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|
<spirit:wireTypeDef>
|
|
<spirit:typeName>std_logic</spirit:typeName>
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|
<spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
|
|
<spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
|
|
</spirit:wireTypeDef>
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|
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|
|
<spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
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<spirit:port>
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<spirit:name>tdd_sync_cntr</spirit:name>
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<spirit:direction>out</spirit:direction>
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<spirit:wireTypeDef>
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<spirit:typeName>std_logic</spirit:typeName>
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<spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
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|
<spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
|
|
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|
</spirit:wireTypeDefs>
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<spirit:port>
|
|
<spirit:name>gpio_rx1_enable_in</spirit:name>
|
|
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<spirit:direction>in</spirit:direction>
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<spirit:wireTypeDef>
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<spirit:typeName>std_logic</spirit:typeName>
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<spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
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|
<spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
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|
</spirit:wireTypeDef>
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|
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|
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<spirit:port>
|
|
<spirit:name>gpio_rx2_enable_in</spirit:name>
|
|
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<spirit:wireTypeDef>
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|
<spirit:typeName>std_logic</spirit:typeName>
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<spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
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<spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
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<xilinx:enablement>
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<xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.gpio_rx2_enable_in" xilinx:dependency="spirit:decode(id('MODELPARAM_VALUE.DISABLE_RX2_SSI')) == 0">true</xilinx:isEnabled>
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<spirit:typeName>std_logic</spirit:typeName>
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<spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
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<spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
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<spirit:name>gpio_tx2_enable_in</spirit:name>
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<spirit:wireTypeDef>
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<spirit:typeName>std_logic</spirit:typeName>
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<spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
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<spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
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<xilinx:portInfo>
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<xilinx:enablement>
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<xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.gpio_tx2_enable_in" xilinx:dependency="spirit:decode(id('MODELPARAM_VALUE.DISABLE_TX2_SSI')) == 0">true</xilinx:isEnabled>
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</xilinx:enablement>
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<spirit:typeName>std_logic</spirit:typeName>
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<spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
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<spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
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<spirit:name>s_axi_aresetn</spirit:name>
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<spirit:typeName>std_logic</spirit:typeName>
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<spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
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<spirit:name>s_axi_awvalid</spirit:name>
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<spirit:typeName>std_logic</spirit:typeName>
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<spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
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<spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
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<spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
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<spirit:port>
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<spirit:name>s_axi_awaddr</spirit:name>
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<spirit:direction>in</spirit:direction>
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<spirit:left spirit:format="long">15</spirit:left>
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<spirit:wireTypeDef>
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<spirit:typeName>std_logic_vector</spirit:typeName>
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<spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
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<spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
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<spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
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<spirit:port>
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<spirit:name>s_axi_awready</spirit:name>
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<spirit:typeName>std_logic</spirit:typeName>
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<spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
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<spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
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<spirit:port>
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<spirit:name>s_axi_wvalid</spirit:name>
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<spirit:wireTypeDef>
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<spirit:typeName>std_logic</spirit:typeName>
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<spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
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<spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
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<spirit:name>s_axi_wdata</spirit:name>
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<spirit:left spirit:format="long">31</spirit:left>
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<spirit:typeName>std_logic_vector</spirit:typeName>
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<spirit:name>s_axi_wstrb</spirit:name>
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<spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.ID">0</spirit:value>
|
|
</spirit:modelParameter>
|
|
<spirit:modelParameter spirit:dataType="integer">
|
|
<spirit:name>CMOS_LVDS_N</spirit:name>
|
|
<spirit:displayName>Cmos Lvds N</spirit:displayName>
|
|
<spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.CMOS_LVDS_N">0</spirit:value>
|
|
</spirit:modelParameter>
|
|
<spirit:modelParameter spirit:dataType="integer">
|
|
<spirit:name>TDD_DISABLE</spirit:name>
|
|
<spirit:displayName>Tdd Disable</spirit:displayName>
|
|
<spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.TDD_DISABLE">0</spirit:value>
|
|
</spirit:modelParameter>
|
|
<spirit:modelParameter spirit:dataType="integer">
|
|
<spirit:name>DDS_DISABLE</spirit:name>
|
|
<spirit:displayName>Dds Disable</spirit:displayName>
|
|
<spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.DDS_DISABLE">0</spirit:value>
|
|
</spirit:modelParameter>
|
|
<spirit:modelParameter spirit:dataType="integer">
|
|
<spirit:name>INDEPENDENT_1R1T_SUPPORT</spirit:name>
|
|
<spirit:displayName>Independent 1r1t Support</spirit:displayName>
|
|
<spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.INDEPENDENT_1R1T_SUPPORT">1</spirit:value>
|
|
</spirit:modelParameter>
|
|
<spirit:modelParameter spirit:dataType="integer">
|
|
<spirit:name>COMMON_2R2T_SUPPORT</spirit:name>
|
|
<spirit:displayName>Common 2r2t Support</spirit:displayName>
|
|
<spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.COMMON_2R2T_SUPPORT">1</spirit:value>
|
|
</spirit:modelParameter>
|
|
<spirit:modelParameter spirit:dataType="integer">
|
|
<spirit:name>DISABLE_RX2_SSI</spirit:name>
|
|
<spirit:displayName>Disable Rx2 Ssi</spirit:displayName>
|
|
<spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.DISABLE_RX2_SSI">0</spirit:value>
|
|
</spirit:modelParameter>
|
|
<spirit:modelParameter spirit:dataType="integer">
|
|
<spirit:name>DISABLE_TX2_SSI</spirit:name>
|
|
<spirit:displayName>Disable Tx2 Ssi</spirit:displayName>
|
|
<spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.DISABLE_TX2_SSI">0</spirit:value>
|
|
</spirit:modelParameter>
|
|
<spirit:modelParameter spirit:dataType="integer">
|
|
<spirit:name>RX_USE_BUFG</spirit:name>
|
|
<spirit:displayName>Rx Use Bufg</spirit:displayName>
|
|
<spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.RX_USE_BUFG">0</spirit:value>
|
|
</spirit:modelParameter>
|
|
<spirit:modelParameter spirit:dataType="integer">
|
|
<spirit:name>TX_USE_BUFG</spirit:name>
|
|
<spirit:displayName>Tx Use Bufg</spirit:displayName>
|
|
<spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.TX_USE_BUFG">0</spirit:value>
|
|
</spirit:modelParameter>
|
|
<spirit:modelParameter spirit:dataType="integer">
|
|
<spirit:name>IODELAY_CTRL</spirit:name>
|
|
<spirit:displayName>Iodelay Ctrl</spirit:displayName>
|
|
<spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.IODELAY_CTRL">1</spirit:value>
|
|
</spirit:modelParameter>
|
|
<spirit:modelParameter spirit:dataType="integer">
|
|
<spirit:name>IODELAY_ENABLE</spirit:name>
|
|
<spirit:displayName>Iodelay Enable</spirit:displayName>
|
|
<spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.IODELAY_ENABLE">1</spirit:value>
|
|
</spirit:modelParameter>
|
|
<spirit:modelParameter spirit:dataType="string">
|
|
<spirit:name>IO_DELAY_GROUP</spirit:name>
|
|
<spirit:displayName>Io Delay Group</spirit:displayName>
|
|
<spirit:value spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.IO_DELAY_GROUP">dev_if_delay_group</spirit:value>
|
|
</spirit:modelParameter>
|
|
<spirit:modelParameter spirit:dataType="integer">
|
|
<spirit:name>FPGA_TECHNOLOGY</spirit:name>
|
|
<spirit:displayName>Fpga Technology</spirit:displayName>
|
|
<spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.FPGA_TECHNOLOGY">0</spirit:value>
|
|
</spirit:modelParameter>
|
|
<spirit:modelParameter spirit:dataType="integer">
|
|
<spirit:name>FPGA_FAMILY</spirit:name>
|
|
<spirit:displayName>Fpga Family</spirit:displayName>
|
|
<spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.FPGA_FAMILY">0</spirit:value>
|
|
</spirit:modelParameter>
|
|
<spirit:modelParameter spirit:dataType="integer">
|
|
<spirit:name>SPEED_GRADE</spirit:name>
|
|
<spirit:displayName>Speed Grade</spirit:displayName>
|
|
<spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.SPEED_GRADE">0</spirit:value>
|
|
</spirit:modelParameter>
|
|
<spirit:modelParameter spirit:dataType="integer">
|
|
<spirit:name>DEV_PACKAGE</spirit:name>
|
|
<spirit:displayName>Dev Package</spirit:displayName>
|
|
<spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.DEV_PACKAGE">0</spirit:value>
|
|
</spirit:modelParameter>
|
|
<spirit:modelParameter spirit:dataType="integer">
|
|
<spirit:name>EXT_SYNC</spirit:name>
|
|
<spirit:displayName>Ext Sync</spirit:displayName>
|
|
<spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.EXT_SYNC">0</spirit:value>
|
|
</spirit:modelParameter>
|
|
<spirit:modelParameter spirit:dataType="integer">
|
|
<spirit:name>USE_RX_CLK_FOR_TX</spirit:name>
|
|
<spirit:displayName>Use Rx Clk For Tx</spirit:displayName>
|
|
<spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.USE_RX_CLK_FOR_TX">0</spirit:value>
|
|
</spirit:modelParameter>
|
|
</spirit:modelParameters>
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|
</spirit:model>
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|
<spirit:choices>
|
|
<spirit:choice>
|
|
<spirit:name>choice_list_74b5137e</spirit:name>
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|
<spirit:enumeration>ACTIVE_HIGH</spirit:enumeration>
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|
<spirit:enumeration>ACTIVE_LOW</spirit:enumeration>
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|
</spirit:choice>
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|
<spirit:choice>
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|
<spirit:name>choice_pairs_00ecfe9a</spirit:name>
|
|
<spirit:enumeration spirit:text="Unknown">0</spirit:enumeration>
|
|
<spirit:enumeration spirit:text="rf">1</spirit:enumeration>
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|
<spirit:enumeration spirit:text="fl">2</spirit:enumeration>
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|
<spirit:enumeration spirit:text="ff">3</spirit:enumeration>
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|
<spirit:enumeration spirit:text="fb">4</spirit:enumeration>
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|
<spirit:enumeration spirit:text="hc">5</spirit:enumeration>
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|
<spirit:enumeration spirit:text="fh">6</spirit:enumeration>
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|
<spirit:enumeration spirit:text="cs">7</spirit:enumeration>
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|
<spirit:enumeration spirit:text="cp">8</spirit:enumeration>
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|
<spirit:enumeration spirit:text="ft">9</spirit:enumeration>
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|
<spirit:enumeration spirit:text="fg">10</spirit:enumeration>
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|
<spirit:enumeration spirit:text="sb">11</spirit:enumeration>
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|
<spirit:enumeration spirit:text="rb">12</spirit:enumeration>
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|
<spirit:enumeration spirit:text="rs">13</spirit:enumeration>
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|
<spirit:enumeration spirit:text="cl">14</spirit:enumeration>
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|
<spirit:enumeration spirit:text="sf">15</spirit:enumeration>
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|
<spirit:enumeration spirit:text="ba">16</spirit:enumeration>
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|
<spirit:enumeration spirit:text="fa">17</spirit:enumeration>
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|
<spirit:enumeration spirit:text="fs">18</spirit:enumeration>
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|
<spirit:enumeration spirit:text="fi">19</spirit:enumeration>
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|
<spirit:enumeration spirit:text="vs">20</spirit:enumeration>
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|
</spirit:choice>
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|
<spirit:choice>
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<spirit:name>choice_pairs_19f99f31</spirit:name>
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|
<spirit:enumeration spirit:text="Unknown">0</spirit:enumeration>
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|
<spirit:enumeration spirit:text="-1">10</spirit:enumeration>
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|
<spirit:enumeration spirit:text="-1L">11</spirit:enumeration>
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|
<spirit:enumeration spirit:text="-1H">12</spirit:enumeration>
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|
<spirit:enumeration spirit:text="-1HV">13</spirit:enumeration>
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|
<spirit:enumeration spirit:text="-1LV">14</spirit:enumeration>
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|
<spirit:enumeration spirit:text="-2">20</spirit:enumeration>
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|
<spirit:enumeration spirit:text="-2L">21</spirit:enumeration>
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|
<spirit:enumeration spirit:text="-2LV">22</spirit:enumeration>
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|
<spirit:enumeration spirit:text="-2MP">23</spirit:enumeration>
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|
<spirit:enumeration spirit:text="-2LVC">24</spirit:enumeration>
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|
<spirit:enumeration spirit:text="-2LVI">25</spirit:enumeration>
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|
<spirit:enumeration spirit:text="-3">30</spirit:enumeration>
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|
</spirit:choice>
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|
<spirit:choice>
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|
<spirit:name>choice_pairs_28f798a2</spirit:name>
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|
<spirit:enumeration spirit:text="Unknown">0</spirit:enumeration>
|
|
<spirit:enumeration spirit:text="7series">1</spirit:enumeration>
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|
<spirit:enumeration spirit:text="ultrascale">2</spirit:enumeration>
|
|
<spirit:enumeration spirit:text="ultrascale+">3</spirit:enumeration>
|
|
<spirit:enumeration spirit:text="versal">4</spirit:enumeration>
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|
</spirit:choice>
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|
<spirit:choice>
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|
<spirit:name>choice_pairs_fc01a186</spirit:name>
|
|
<spirit:enumeration spirit:text="Unknown">0</spirit:enumeration>
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|
<spirit:enumeration spirit:text="artix">1</spirit:enumeration>
|
|
<spirit:enumeration spirit:text="kintex">2</spirit:enumeration>
|
|
<spirit:enumeration spirit:text="virtex">3</spirit:enumeration>
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|
<spirit:enumeration spirit:text="zynq">4</spirit:enumeration>
|
|
<spirit:enumeration spirit:text="versalprime">5</spirit:enumeration>
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|
<spirit:enumeration spirit:text="versalaicore">6</spirit:enumeration>
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|
</spirit:choice>
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|
</spirit:choices>
|
|
<spirit:fileSets>
|
|
<spirit:fileSet>
|
|
<spirit:name>xilinx_anylanguagesynthesis_view_fileset</spirit:name>
|
|
<spirit:file>
|
|
<spirit:name>../xilinx/common/up_xfer_cntrl_constr.xdc</spirit:name>
|
|
<spirit:userFileType>xdc</spirit:userFileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>../xilinx/common/ad_rst_constr.xdc</spirit:name>
|
|
<spirit:userFileType>xdc</spirit:userFileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>../xilinx/common/up_xfer_status_constr.xdc</spirit:name>
|
|
<spirit:userFileType>xdc</spirit:userFileType>
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|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>../xilinx/common/up_clock_mon_constr.xdc</spirit:name>
|
|
<spirit:userFileType>xdc</spirit:userFileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>axi_adrv9001_constr.xdc</spirit:name>
|
|
<spirit:userFileType>xdc</spirit:userFileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>../common/ad_addsub.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
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|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>../common/ad_datafmt.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
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|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>../common/ad_dds.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
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|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>../common/ad_dds_1.v</spirit:name>
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|
<spirit:fileType>verilogSource</spirit:fileType>
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|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>../common/ad_dds_2.v</spirit:name>
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|
<spirit:fileType>verilogSource</spirit:fileType>
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|
</spirit:file>
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|
<spirit:file>
|
|
<spirit:name>../common/ad_dds_cordic_pipe.v</spirit:name>
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|
<spirit:fileType>verilogSource</spirit:fileType>
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|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>../common/ad_dds_sine.v</spirit:name>
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|
<spirit:fileType>verilogSource</spirit:fileType>
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|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>../common/ad_dds_sine_cordic.v</spirit:name>
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|
<spirit:fileType>verilogSource</spirit:fileType>
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|
</spirit:file>
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|
<spirit:file>
|
|
<spirit:name>../xilinx/common/ad_mul.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>../common/ad_pngen.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>../common/ad_pnmon.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
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|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>../common/ad_rst.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>../xilinx/common/ad_serdes_in.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>../xilinx/common/ad_serdes_out.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
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|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>../common/ad_tdd_control.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>adrv9001_aligner4.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>adrv9001_aligner8.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
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|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>adrv9001_pack.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>adrv9001_rx.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>adrv9001_rx_link.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>adrv9001_tx.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>adrv9001_tx_link.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
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|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>axi_adrv9001_core.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>axi_adrv9001_if.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>axi_adrv9001_rx.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>axi_adrv9001_rx_channel.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>axi_adrv9001_tdd.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>axi_adrv9001_tx.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>axi_adrv9001_tx_channel.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>../common/up_adc_channel.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>../common/up_adc_common.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>../common/up_axi.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
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|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>../common/up_clock_mon.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
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|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>../common/up_dac_channel.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
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|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>../common/up_dac_common.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
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|
</spirit:file>
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|
<spirit:file>
|
|
<spirit:name>../common/up_delay_cntrl.v</spirit:name>
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|
<spirit:fileType>verilogSource</spirit:fileType>
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|
</spirit:file>
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|
<spirit:file>
|
|
<spirit:name>../common/up_tdd_cntrl.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
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|
</spirit:file>
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|
<spirit:file>
|
|
<spirit:name>../common/up_xfer_cntrl.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
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|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>../common/up_xfer_status.v</spirit:name>
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|
<spirit:fileType>verilogSource</spirit:fileType>
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|
</spirit:file>
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|
<spirit:file>
|
|
<spirit:name>axi_adrv9001.v</spirit:name>
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|
<spirit:fileType>verilogSource</spirit:fileType>
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|
<spirit:userFileType>CHECKSUM_3a205996</spirit:userFileType>
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|
</spirit:file>
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|
</spirit:fileSet>
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|
<spirit:fileSet>
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|
<spirit:name>xilinx_anylanguagesynthesis_analog_com_user_util_cdc_1_0__ref_view_fileset</spirit:name>
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|
<spirit:vendorExtensions>
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|
<xilinx:subCoreRef>
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|
<xilinx:componentRef xilinx:vendor="analog.com" xilinx:library="user" xilinx:name="util_cdc" xilinx:version="1.0">
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|
<xilinx:mode xilinx:name="copy_mode"/>
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|
</xilinx:componentRef>
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|
</xilinx:subCoreRef>
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|
</spirit:vendorExtensions>
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|
</spirit:fileSet>
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|
<spirit:fileSet>
|
|
<spirit:name>xilinx_anylanguagebehavioralsimulation_view_fileset</spirit:name>
|
|
<spirit:file>
|
|
<spirit:name>../common/ad_addsub.v</spirit:name>
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|
<spirit:fileType>verilogSource</spirit:fileType>
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|
</spirit:file>
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|
<spirit:file>
|
|
<spirit:name>../common/ad_datafmt.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
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|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>../common/ad_dds.v</spirit:name>
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|
<spirit:fileType>verilogSource</spirit:fileType>
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|
</spirit:file>
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|
<spirit:file>
|
|
<spirit:name>../common/ad_dds_1.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>../common/ad_dds_2.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>../common/ad_dds_cordic_pipe.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>../common/ad_dds_sine.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>../common/ad_dds_sine_cordic.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>../xilinx/common/ad_mul.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>../common/ad_pngen.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>../common/ad_pnmon.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>../common/ad_rst.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>../xilinx/common/ad_serdes_in.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>../xilinx/common/ad_serdes_out.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>../common/ad_tdd_control.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>adrv9001_aligner4.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>adrv9001_aligner8.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>adrv9001_pack.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>adrv9001_rx.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>adrv9001_rx_link.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>adrv9001_tx.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>adrv9001_tx_link.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>axi_adrv9001_core.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>axi_adrv9001_if.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>axi_adrv9001_rx.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>axi_adrv9001_rx_channel.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>axi_adrv9001_tdd.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>axi_adrv9001_tx.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>axi_adrv9001_tx_channel.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>../common/up_adc_channel.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>../common/up_adc_common.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>../common/up_axi.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>../common/up_clock_mon.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>../common/up_dac_channel.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>../common/up_dac_common.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>../common/up_delay_cntrl.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>../common/up_tdd_cntrl.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>../common/up_xfer_cntrl.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>../common/up_xfer_status.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>axi_adrv9001.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
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|
</spirit:file>
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|
</spirit:fileSet>
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|
<spirit:fileSet>
|
|
<spirit:name>xilinx_anylanguagebehavioralsimulation_analog_com_user_util_cdc_1_0__ref_view_fileset</spirit:name>
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|
<spirit:vendorExtensions>
|
|
<xilinx:subCoreRef>
|
|
<xilinx:componentRef xilinx:vendor="analog.com" xilinx:library="user" xilinx:name="util_cdc" xilinx:version="1.0">
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|
<xilinx:mode xilinx:name="copy_mode"/>
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|
</xilinx:componentRef>
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<spirit:fileSet>
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<spirit:name>xilinx_xpgui_view_fileset</spirit:name>
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|
<spirit:file>
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|
<spirit:name>xgui/axi_adrv9001_v1_0.tcl</spirit:name>
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<spirit:fileType>tclSource</spirit:fileType>
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<spirit:userFileType>CHECKSUM_372ea539</spirit:userFileType>
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<spirit:userFileType>XGUI_VERSION_2</spirit:userFileType>
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<spirit:name>xilinx_xpgui_analog_com_user_util_cdc_1_0__ref_view_fileset</spirit:name>
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|
<xilinx:componentRef xilinx:vendor="analog.com" xilinx:library="user" xilinx:name="util_cdc" xilinx:version="1.0"/>
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<spirit:name>xilinx_blockdiagram_view_fileset</spirit:name>
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<spirit:file>
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<spirit:name>bd/bd.tcl</spirit:name>
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<spirit:fileType>tclSource</spirit:fileType>
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<spirit:name>xilinx_blockdiagram_analog_com_user_util_cdc_1_0__ref_view_fileset</spirit:name>
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|
<xilinx:subCoreRef>
|
|
<xilinx:componentRef xilinx:vendor="analog.com" xilinx:library="user" xilinx:name="util_cdc" xilinx:version="1.0"/>
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|
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|
</spirit:vendorExtensions>
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|
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|
<spirit:description>axi_adrv9001_v1_0</spirit:description>
|
|
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|
|
<spirit:parameter>
|
|
<spirit:name>ID</spirit:name>
|
|
<spirit:displayName>Id</spirit:displayName>
|
|
<spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.ID">0</spirit:value>
|
|
</spirit:parameter>
|
|
<spirit:parameter>
|
|
<spirit:name>CMOS_LVDS_N</spirit:name>
|
|
<spirit:displayName>Cmos Lvds N</spirit:displayName>
|
|
<spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.CMOS_LVDS_N">0</spirit:value>
|
|
</spirit:parameter>
|
|
<spirit:parameter>
|
|
<spirit:name>TDD_DISABLE</spirit:name>
|
|
<spirit:displayName>Tdd Disable</spirit:displayName>
|
|
<spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.TDD_DISABLE">0</spirit:value>
|
|
</spirit:parameter>
|
|
<spirit:parameter>
|
|
<spirit:name>DDS_DISABLE</spirit:name>
|
|
<spirit:displayName>Dds Disable</spirit:displayName>
|
|
<spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.DDS_DISABLE">0</spirit:value>
|
|
</spirit:parameter>
|
|
<spirit:parameter>
|
|
<spirit:name>INDEPENDENT_1R1T_SUPPORT</spirit:name>
|
|
<spirit:displayName>Independent 1r1t Support</spirit:displayName>
|
|
<spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.INDEPENDENT_1R1T_SUPPORT">1</spirit:value>
|
|
</spirit:parameter>
|
|
<spirit:parameter>
|
|
<spirit:name>COMMON_2R2T_SUPPORT</spirit:name>
|
|
<spirit:displayName>Common 2r2t Support</spirit:displayName>
|
|
<spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.COMMON_2R2T_SUPPORT">1</spirit:value>
|
|
</spirit:parameter>
|
|
<spirit:parameter>
|
|
<spirit:name>DISABLE_RX2_SSI</spirit:name>
|
|
<spirit:displayName>Disable Rx2 Ssi</spirit:displayName>
|
|
<spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.DISABLE_RX2_SSI">0</spirit:value>
|
|
</spirit:parameter>
|
|
<spirit:parameter>
|
|
<spirit:name>DISABLE_TX2_SSI</spirit:name>
|
|
<spirit:displayName>Disable Tx2 Ssi</spirit:displayName>
|
|
<spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.DISABLE_TX2_SSI">0</spirit:value>
|
|
</spirit:parameter>
|
|
<spirit:parameter>
|
|
<spirit:name>RX_USE_BUFG</spirit:name>
|
|
<spirit:displayName>Rx Use Bufg</spirit:displayName>
|
|
<spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.RX_USE_BUFG">0</spirit:value>
|
|
</spirit:parameter>
|
|
<spirit:parameter>
|
|
<spirit:name>TX_USE_BUFG</spirit:name>
|
|
<spirit:displayName>Tx Use Bufg</spirit:displayName>
|
|
<spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.TX_USE_BUFG">0</spirit:value>
|
|
</spirit:parameter>
|
|
<spirit:parameter>
|
|
<spirit:name>IODELAY_CTRL</spirit:name>
|
|
<spirit:displayName>Iodelay Ctrl</spirit:displayName>
|
|
<spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.IODELAY_CTRL">1</spirit:value>
|
|
</spirit:parameter>
|
|
<spirit:parameter>
|
|
<spirit:name>IODELAY_ENABLE</spirit:name>
|
|
<spirit:displayName>Iodelay Enable</spirit:displayName>
|
|
<spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.IODELAY_ENABLE">1</spirit:value>
|
|
</spirit:parameter>
|
|
<spirit:parameter>
|
|
<spirit:name>IO_DELAY_GROUP</spirit:name>
|
|
<spirit:displayName>Io Delay Group</spirit:displayName>
|
|
<spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.IO_DELAY_GROUP">dev_if_delay_group</spirit:value>
|
|
</spirit:parameter>
|
|
<spirit:parameter>
|
|
<spirit:name>FPGA_TECHNOLOGY</spirit:name>
|
|
<spirit:displayName>Fpga Technology</spirit:displayName>
|
|
<spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.FPGA_TECHNOLOGY" spirit:choiceRef="choice_pairs_28f798a2">0</spirit:value>
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|
</spirit:parameter>
|
|
<spirit:parameter>
|
|
<spirit:name>FPGA_FAMILY</spirit:name>
|
|
<spirit:displayName>Fpga Family</spirit:displayName>
|
|
<spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.FPGA_FAMILY" spirit:choiceRef="choice_pairs_fc01a186">0</spirit:value>
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|
</spirit:parameter>
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|
<spirit:parameter>
|
|
<spirit:name>SPEED_GRADE</spirit:name>
|
|
<spirit:displayName>Speed Grade</spirit:displayName>
|
|
<spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.SPEED_GRADE" spirit:choiceRef="choice_pairs_19f99f31">0</spirit:value>
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|
</spirit:parameter>
|
|
<spirit:parameter>
|
|
<spirit:name>DEV_PACKAGE</spirit:name>
|
|
<spirit:displayName>Dev Package</spirit:displayName>
|
|
<spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.DEV_PACKAGE" spirit:choiceRef="choice_pairs_00ecfe9a">0</spirit:value>
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|
</spirit:parameter>
|
|
<spirit:parameter>
|
|
<spirit:name>EXT_SYNC</spirit:name>
|
|
<spirit:displayName>External sync</spirit:displayName>
|
|
<spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.EXT_SYNC">0</spirit:value>
|
|
</spirit:parameter>
|
|
<spirit:parameter>
|
|
<spirit:name>USE_RX_CLK_FOR_TX</spirit:name>
|
|
<spirit:displayName>Use Rx Clk For Tx</spirit:displayName>
|
|
<spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.USE_RX_CLK_FOR_TX">0</spirit:value>
|
|
</spirit:parameter>
|
|
<spirit:parameter>
|
|
<spirit:name>Component_Name</spirit:name>
|
|
<spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.Component_Name" spirit:order="1">axi_adrv9001_v1_0</spirit:value>
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|
</spirit:parameter>
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|
</spirit:parameters>
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|
<spirit:vendorExtensions>
|
|
<xilinx:coreExtensions>
|
|
<xilinx:supportedFamilies>
|
|
<xilinx:family xilinx:lifeCycle="Production">virtex7</xilinx:family>
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|
<xilinx:family xilinx:lifeCycle="Production">qvirtex7</xilinx:family>
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|
<xilinx:family xilinx:lifeCycle="Production">versal</xilinx:family>
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|
<xilinx:family xilinx:lifeCycle="Production">kintex7</xilinx:family>
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|
<xilinx:family xilinx:lifeCycle="Production">kintex7l</xilinx:family>
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|
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<xilinx:family xilinx:lifeCycle="Production">qkintex7l</xilinx:family>
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<xilinx:family xilinx:lifeCycle="Production">akintex7</xilinx:family>
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<xilinx:family xilinx:lifeCycle="Production">artix7</xilinx:family>
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<xilinx:family xilinx:lifeCycle="Production">artix7l</xilinx:family>
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<xilinx:family xilinx:lifeCycle="Production">qartix7</xilinx:family>
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<xilinx:family xilinx:lifeCycle="Production">qzynq</xilinx:family>
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<xilinx:family xilinx:lifeCycle="Production">azynq</xilinx:family>
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<xilinx:family xilinx:lifeCycle="Production">spartan7</xilinx:family>
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<xilinx:family xilinx:lifeCycle="Production">aspartan7</xilinx:family>
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<xilinx:family xilinx:lifeCycle="Production">virtexuplus58g</xilinx:family>
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<xilinx:family xilinx:lifeCycle="Production">kintexuplus</xilinx:family>
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<xilinx:family xilinx:lifeCycle="Production">artixuplus</xilinx:family>
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<xilinx:family xilinx:lifeCycle="Production">kintexu</xilinx:family>
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|
<xilinx:taxonomy>/Analog_Devices</xilinx:taxonomy>
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</xilinx:taxonomies>
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<xilinx:displayName>axi_adrv9001_v1_0</xilinx:displayName>
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<xilinx:autoFamilySupportLevel>level_2</xilinx:autoFamilySupportLevel>
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<xilinx:definitionSource>package_project</xilinx:definitionSource>
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<xilinx:xpmLibraries>
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|
<xilinx:xpmLibrary>XPM_CDC</xilinx:xpmLibrary>
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|
</xilinx:xpmLibraries>
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|
<xilinx:vendorDisplayName>Analog Devices</xilinx:vendorDisplayName>
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<xilinx:vendorURL>http://www.analog.com</xilinx:vendorURL>
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|
<xilinx:coreRevision>1</xilinx:coreRevision>
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<xilinx:coreCreationDateTime>2024-01-14T03:45:00Z</xilinx:coreCreationDateTime>
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|
</xilinx:coreExtensions>
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<xilinx:packagingInfo>
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<xilinx:xilinxVersion>2023.2.1</xilinx:xilinxVersion>
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<xilinx:checksum xilinx:scope="fileGroups" xilinx:value="c3c5a312"/>
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<xilinx:checksum xilinx:scope="ports" xilinx:value="8e0b1332"/>
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<xilinx:checksum xilinx:scope="hdlParameters" xilinx:value="763f2ed9"/>
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