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8d4c4751fd
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main
| Author | SHA1 | Date | |
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12457af536 | ||
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d4159ec998 | ||
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79f59d15f7 | ||
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a7cf13b37a |
@@ -1,6 +1,7 @@
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# Buid files
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build/
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*.tar.gz
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cx9261a_riscv_bin.c
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# System generated files
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# -- macOS
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@@ -26,6 +26,8 @@ CFLAGS_DEBUG := $(CFLAGS) $(DEBUG_FLAGS)
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CFLAGS_RELEASE := $(CFLAGS) $(RELEASE_FLAGS)
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# Collect source files
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RISCV_BINARY := $(CURDIR)/cx9261A_api/MultiPointsCalib_v1.8.bin
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BIN_SRC := $(CURDIR)/cx9261a_riscv_bin.c
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SRCS := $(CURDIR)/cx9261adriver_c.cpp $(CURDIR)/cx9261A_api/cx9261adriver.cpp
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TEST_SRC := ld_test.c
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PACKAGE_HEADERS := ./cx9261adriver_c.h
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@@ -33,6 +35,9 @@ PACKAGE_HEADERS := ./cx9261adriver_c.h
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# Default target
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all: $(foreach arch, $(ARCHS), $(BUILD_DIR)/$(arch)/lib$(PROJECT_NAME)_dbg.a $(BUILD_DIR)/$(arch)/lib$(PROJECT_NAME).a)
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$(BIN_SRC): $(RISCV_BINARY)
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$(CURDIR)/tools/gen_riscvbin.py $< -o $(CURDIR)
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# Rule to create debug libraries for different architectures
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$(BUILD_DIR)/%/lib$(PROJECT_NAME)_dbg.a: $(SRCS)
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@mkdir -p $(BUILD_DIR)/$*/debug
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@@ -48,21 +53,22 @@ $(BUILD_DIR)/%/lib$(PROJECT_NAME).a: $(SRCS)
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# Clean up
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clean:
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rm -rf $(BUILD_DIR) *.tar.gz
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rm -rf $(CURDIR)/cx9261a_riscv_bin.c
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# Run link tests
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test: all $(foreach arch, $(ARCHS), $(BUILD_DIR)/$(arch)/ld_test $(BUILD_DIR)/$(arch)/ld_test_dbg)
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@echo "Link test success!"
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# Debug link tests
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$(BUILD_DIR)/%/ld_test_dbg: $(SRCS) $(TEST_SRC)
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@$(CC) $(CFLAGS_DEBUG) -mcpu=$* ld_test.c -o $@ -L$(BUILD_DIR)/$* -l$(PROJECT_NAME)_dbg -lstdc++ -lm -specs=nosys.specs
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$(BUILD_DIR)/%/ld_test_dbg: $(SRCS) $(TEST_SRC) $(BIN_SRC)
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@$(CC) $(CFLAGS_DEBUG) -mcpu=$* ld_test.c $(BIN_SRC) -o $@ -L$(BUILD_DIR)/$* -l$(PROJECT_NAME)_dbg -lstdc++ -lm -specs=nosys.specs
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# Release link tests
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$(BUILD_DIR)/%/ld_test: $(SRCS) $(TEST_SRC)
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@$(CC) $(CFLAGS_RELEASE) -mcpu=$* ld_test.c -o $@ -L$(BUILD_DIR)/$* -l$(PROJECT_NAME) -lstdc++ -lm -specs=nosys.specs
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$(BUILD_DIR)/%/ld_test: $(SRCS) $(TEST_SRC) $(BIN_SRC)
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@$(CC) $(CFLAGS_RELEASE) -mcpu=$* ld_test.c $(BIN_SRC) -o $@ -L$(BUILD_DIR)/$* -l$(PROJECT_NAME) -lstdc++ -lm -specs=nosys.specs
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# Package for release - bundle debug and release versions for each architecture separately
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package: all
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package: all $(BIN_SRC)
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@echo "Packaging for release..."
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@$(foreach arch, $(ARCHS), \
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mkdir -p release_$(arch)/lib; \
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@@ -72,6 +78,7 @@ package: all
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cp $(BUILD_DIR)/$(arch)/lib$(PROJECT_NAME).a release_$(arch)/lib/; \
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cp $(PACKAGE_HEADERS) release_$(arch)/include/; \
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cp $(SRCS) release_$(arch)/dbg/cx9261a_c/; \
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cp $(CURDIR)/cx9261a_riscv_bin.c release_$(arch)/; \
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tar -czvf release_$(arch).tar.gz -C release_$(arch) .; \
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rm -rf release_$(arch); \
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)
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@@ -0,0 +1,49 @@
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ver 1.4.0
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API变动:
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1. 增加了多点跳频相关函数,configRxMultiPointsQec,readRxCalibPredis,saveRxCalibPredis需要结合片上处理器程序一起使用
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2. configPll*函数现在接收Clock结构体而不是原来的参考时钟值(double)
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驱动优化:
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1. configPll*函数现在不再使用std::map容器储存寄存器值,改为使用std::vector以增加在高速跳频情况下的响应速度
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2. 枚举变量显式指定大小为std::uint8_t,即unsigned char
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ver 1.3.0
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API变动:
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1. configBBPLL函数现在需要传入CX9261AConfiguration结构体,而不是原来的Clock结构体
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2. 增加txCalib函数,接受CX9261AConfiguration结构体,对Tx通道进行校准,包含原来的txBisectionQecCalib以及txBisectionDcCalib,并且自动进行电源管理配置
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3. configInterface函数现在需要传入Interface结构体,不再需要传入adc速率
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4. 增加IOMode枚举类型,包含CMOS,LVDS顺序模式和LVDS奇偶模式
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5. Interface结构体现在增加一个IOMode类型的变量,指示芯片接口模式
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驱动优化:
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1. configBBPLL函数现在会配置IOMode相关以及adc速率相关寄存器
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2. pll环路参数选择范围小幅度变化
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3. Rx窄带校准使用新的校准方法
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4. waitRxTSTFinished函数现在会在十次qecDelay后返回
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5. configPll函数现在在不同频率下行为一致
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6. configInterface函数现在增加IOMode相关寄存器配置,删除adc速率相关寄存器配置
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7. initialRxChannel函数修改0x706/0x722/0x73E寄存器配置,从0x65改到0x6D
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ver 1.2.0
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1. BUG FIX:配置流程中需要先切换到休眠模式再切换到校准模式
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2. configTxChannelFrequency函数需要在configTxChannel函数之前调用
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ver 1.1.0
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1. BUG FIX:修复了0x6C3寄存器在选择通道来源Off并且使用外本振时值不对的错误。
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2. waitRxTSTFinished函数修改,现在会在校准结束后寄存器0x77E写入0x00,而不是在原来的恢复寄存器部分。
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3. initialTxChannel函数修改,现在initialTxChannel不再需要输入参数,原来需要输入通道本振频率配置的寄存器移到了新的函数configTxChannelFrequency中。
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4. rxTSTCalib函数修改,现在rxTSTCalib不再自动调用waitRxTSTFinished函数。
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5. BUG FIX:修复了rxTSTCalib函数在tx通道配置为外本振时不能正确校准的错误。
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6. beforeQecState函数修改,移除了冗余的寄存器状态保存。
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7. configQecCalib函数修改,删除了在不进行Tx校准时仍然进行寄存器恢复的代码。
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8. configTxChannelFrequency函数添加,用于配置Tx通道本振频率相关寄存器。
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9. 代码格式化。
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10. main.cpp demo调整。
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ver 1.0.1
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1. 添加了configTxChannel函数,内部调用的configTxBandwidth和configTxMixer函数
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2. 校准过程中的pll锁定增加了锁定判断
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3. 添加了配合Demo工程的configFPGA函数以及对应的setPin函数
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Binary file not shown.
@@ -1,10 +1,17 @@
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// ReSharper disable CppCompileTimeConstantCanBeReplacedWithBooleanConstant
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// ReSharper disable CppUseRangeAlgorithm
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// ReSharper disable CppUseStructuredBinding
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// ReSharper disable CppTooWideScopeInitStatement
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#include "cx9261adriver.h"
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#include "cx9261adriver.h"
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#include "utils.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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__attribute__((weak)) uint32_t CX9261A_RiscvBinLen = 0;
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__attribute__((weak)) uint8_t *CX9261A_RiscvBin = nullptr;
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#ifdef __cplusplus
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}
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#endif
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namespace CX9261A {
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void initialChip()
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@@ -672,6 +679,9 @@ void configRISCV(const bool on)
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if (on) {
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writeSpi(0x071, 0x00);
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writeSpi(0x071, 0x29);
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for (size_t i = 0; i < CX9261A_RiscvBinLen; i++) {
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writeSpi(0x070, CX9261A_RiscvBin[i]);
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}
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writeSpi(0x236, 0x0F);
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writeSpi(0x20A, 0x01);
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writeSpi(0x071, 0x26);
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@@ -1047,15 +1057,15 @@ void rxCalib(const CX9261AConfiguration& config, const RxChannel chan)
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{
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LOGGING(toString(chan) + "校准");
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if (config.calib.rxMethod == CalibMethod::TST) {
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if (chan == RxChannel::Rx1 && config.pllSource.rx1Source == LoSource::Off) {
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if (chan == RxChannel::Rx1 && config.pllSource.rx1Source == LoSource::Off && !config.pllSource.rxUseExt) {
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LOGGING(toString(chan) + " OFF")
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return;
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}
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if (chan == RxChannel::Rx2 && config.pllSource.rx2Source == LoSource::Off) {
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if (chan == RxChannel::Rx2 && config.pllSource.rx2Source == LoSource::Off && !config.pllSource.rxUseExt) {
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LOGGING(toString(chan) + " OFF")
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return;
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}
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if (chan == RxChannel::Rx3 && config.pllSource.rx3Source == LoSource::Off) {
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if (chan == RxChannel::Rx3 && config.pllSource.rx3Source == LoSource::Off && !config.pllSource.rxUseExt) {
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LOGGING(toString(chan) + " OFF")
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return;
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}
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@@ -1429,7 +1439,7 @@ void configQecCalib(const CX9261AConfiguration& config)
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configCalibMethod(config.calib);
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// Rx校准只在有任意Rx通道不是Off时发生
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const bool calibRx = config.pllSource.rx1Source != LoSource::Off || config.pllSource.rx2Source != LoSource::Off
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|| config.pllSource.rx3Source != LoSource::Off;
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|| config.pllSource.rx3Source != LoSource::Off || config.pllSource.rxUseExt;
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if (calibRx) {
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rxCalib(config, RxChannel::Rx1);
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rxCalib(config, RxChannel::Rx2);
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@@ -1490,7 +1500,8 @@ void configQecCalib(const CX9261AConfiguration& config)
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}
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}
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// Tx校准只在任意Tx通道不是Off时发生
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const bool calibTx = config.pllSource.tx1Source != LoSource::Off || config.pllSource.tx2Source != LoSource::Off;
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const bool calibTx = config.pllSource.tx1Source != LoSource::Off || config.pllSource.tx2Source != LoSource::Off
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|| config.pllSource.txUseExt;
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if (calibTx) {
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txCalib(config);
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restoreQecState(regsState);
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@@ -1642,7 +1653,7 @@ void configInterface(const Interface& interface)
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if (interface.workMode == WorkMode::FDD)
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writeSpi(0x201, 0x00);
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else if (interface.portMode == PortMode::Single && interface.trMode == TrMode::R2T2)
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writeSpi(0x201, 0x3F);
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writeSpi(0x201, 0x3D);
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else
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writeSpi(0x201, 0x15);
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// 0x202
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@@ -2067,7 +2078,7 @@ void configFPGA(const Interface& interface)
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setPin(40, 1);
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setPin(32, 1);
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setPin(7, interface.ioMode == IOMode::CMOS ? 0 : 1);
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setPin(7, interface.ioMode == IOMode::LVDS_E ? 0 : 1);
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setPin(34, 1);
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setPin(34, 0);
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@@ -5,7 +5,7 @@
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#ifndef CX9261ADRIVER_CX9261ADRIVER_H
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#define CX9261ADRIVER_CX9261ADRIVER_H
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#define VERSION 1.9.0
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#define VERSION 1.10.0
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#include "defs.h"
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@@ -14,6 +14,9 @@ extern "C" {
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#define MAX_NUM_FIR 64
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#define MAX_MULTI_POINTS 64
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extern uint32_t CX9261A_RiscvBinLen;
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extern uint8_t *CX9261A_RiscvBin;
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typedef enum {
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CX9261A_WKM_Rx,
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CX9261A_WKM_Tx,
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Executable
+73
@@ -0,0 +1,73 @@
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#!/usr/bin/env python3
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import argparse
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import os
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import glob
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from datetime import datetime
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def convert_bin_to_c(bin_file, output_dir):
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# Read the bin file
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with open(bin_file, 'rb') as f:
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bin_data = f.read()
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# Get the length of the bin file
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bin_len = len(bin_data)
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# Set the output file path within the specified directory
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output_file = os.path.join(output_dir, 'cx9261a_riscv_bin.c')
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with open(output_file, 'w') as f:
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# Write metadata comments
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f.write(f'// Generated C code array\n')
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f.write(f'// Date: {datetime.now().strftime("%Y-%m-%d %H:%M:%S")}\n')
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f.write(f'// Source file: {os.path.basename(bin_file)}\n\n')
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# Write headers and data length
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f.write('#include <stdint.h>\n')
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f.write('#include "cx9261adriver_c.h"\n\n')
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f.write(f'uint32_t CX9261A_RiscvBinLen = {bin_len};\n')
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f.write(f'uint8_t *CX9261A_RiscvBin = (uint8_t[]){{\n\t')
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# Write data as hex values in the array
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for i, byte in enumerate(bin_data):
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f.write(f'0x{byte:02X}, ')
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# Add a newline every 12 bytes
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if (i + 1) % 12 == 0:
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f.write('\n\t')
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# Add a newline if the last line has fewer than 12 bytes
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if bin_len % 12 != 0:
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f.write('\n')
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# End the array
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f.write('};\n')
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print(f"Generated C file: {output_file}")
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if __name__ == "__main__":
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# Set up command line argument parsing
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parser = argparse.ArgumentParser(description="Convert a CX9261A Riscv bin file to a C code array.")
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parser.add_argument("bin_file", type=str, nargs='?', help="Path to the bin file (optional)")
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parser.add_argument("-o", "--output_dir", type=str, default=".", help="Output directory (default is the current directory)")
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# Parse arguments
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args = parser.parse_args()
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# If no bin file is provided, search for a .bin file in the current directory
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if args.bin_file is None:
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bin_files = glob.glob("*.bin")
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if len(bin_files) == 0:
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print("Error: No .bin file found in the current directory.")
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exit(1)
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elif len(bin_files) > 1:
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print("Error: Multiple .bin files found in the current directory. Specify one as an argument.")
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exit(1)
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else:
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args.bin_file = bin_files[0]
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# Check if output directory exists, create if not
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if not os.path.isdir(args.output_dir):
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os.makedirs(args.output_dir)
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# Perform the conversion
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convert_bin_to_c(args.bin_file, args.output_dir)
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Reference in New Issue
Block a user