Compare commits
10
Commits
| Author | SHA1 | Date | |
|---|---|---|---|
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62cc15c3d4 | ||
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98e6935d9a | ||
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0c6d861620 | ||
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f6c2568a75 | ||
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ef1c41b500 | ||
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9a7b89ca82 | ||
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80035d5208 | ||
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ab7ce2e082 | ||
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f5aca7d5cf | ||
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c3e0c7a66a |
@@ -51,7 +51,7 @@ class Plugin(Plugin_Base):
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||||
{
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"caption": "装订 - 【主】反拦截小功率",
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"icon": "fa5.play-circle",
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"data": "5A 54 E3 DD 88 11 00 00 00 59 06 5A FE"
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"data": "5A 54 E3 DD 77 11 00 00 00 48 06 5A FE"
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},
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{
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"caption": "装订 - 【主】反拦截全功率",
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@@ -61,7 +61,7 @@ class Plugin(Plugin_Base):
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{
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"caption": "装订 - 【主】反拦截静默",
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"icon": "fa5.play-circle",
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"data": "5A 54 E3 DD 00 11 00 00 00 D1 06 5A FE"
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"data": "5A 54 E3 DD 88 11 00 00 00 59 06 5A FE"
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},
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{
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"caption": "遥测 - 【主】反拦截",
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@@ -76,7 +76,7 @@ class Plugin(Plugin_Base):
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{
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"caption": "装订 - 【从】拦截小功率",
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"icon": "fa5.play-circle",
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"data": "5A 54 E3 DD 88 00 00 00 00 48 06 5A FE"
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"data": "5A 54 E3 DD 77 00 00 00 00 37 06 5A FE"
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},
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{
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"caption": "装订 - 【从】拦截大功率",
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@@ -86,7 +86,7 @@ class Plugin(Plugin_Base):
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{
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"caption": "装订 - 【从】拦截静默",
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"icon": "fa5.play-circle",
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"data": "5A 54 E3 DD 00 00 00 00 00 C0 06 5A FE"
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"data": "5A 54 E3 DD 88 00 00 00 00 48 06 5A FE"
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},
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{
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"caption": "遥测 - 【从】拦截",
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@@ -291,7 +291,7 @@ class Plugin(Plugin_Base):
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ret += f"MGC 3~4: {payload[hwOffset+10] & 0x0f:>2d} - {payload[hwOffset+10] >> 4:>2d}\n"
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ret += "--------------------------------\n"
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return ret + '\n' + printFrame(data)
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return ret + '\n' + self.printFrame(data)
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def printFrame(self, data: bytes):
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ret = ''
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@@ -425,7 +425,7 @@ class Plugin(Plugin_Base):
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ret += f"MGC 3~4: {payload[hwOffset+10] & 0x0f:>2d} - {payload[hwOffset+10] >> 4:>2d}\n"
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ret += "--------------------------------\n"
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return ret + '\n' + printFrame(data)
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return ret + '\n' + self.printFrame(data)
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def onSent(self, ok, msg, length, path):
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if ok:
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@@ -437,4 +437,4 @@ class Plugin(Plugin_Base):
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data = item["data"]
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dateBytes = self.parseSendData(data, encoding = self.configGlobal["encoding"], isHexStr = True)
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if dateBytes:
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self.send(dateBytes, callback=self.onSent)
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self.send(dateBytes, callback=self.onSent)
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+70
-124
@@ -66,37 +66,6 @@
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// -- -- Signal processor Bram voltage
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#define WD_SP_FPGA_TEMP 0x08
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// -- -- Signal processor antenna voltage status
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#define WD_ANT_VOLT 0x09
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// -- -- Signal processor antenna RF temperature
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#define WD_ANT_RF_TEMP 0x0A
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// -- -- Signal processor antenna PLL lock status
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#define WD_ANT_RF_PLL 0x0B
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// -- -- Signal processor antenna MGC
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#define WD_ANT_MGC_0 0x0C
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#define WD_ANT_MGC_1 0x0D
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// -- -- Reserved
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#define WD_ANT_RESERVE 0x0E
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// Data Send Test Command
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#define CMD_DATA_TEST_A 0xE2
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// -- Request
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#define DATA_TEST_REQ_A_LEN 68
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// -- -- 68 byte payload
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// -- Response
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#define DATA_TEST_RSP_A_LEN 68
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// -- -- 68 byte payload
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// Data Send Test Command
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#define CMD_DATA_TEST_B 0xF2
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// -- Request
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#define DATA_TEST_REQ_B_LEN 170
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// -- -- 170 byte payload
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// -- Response
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#define DATA_TEST_RSP_B_LEN 170
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// -- -- 170 byte payload
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// Config load
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#define CMD_CONFIG 0xE3
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// -- Request
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@@ -111,50 +80,13 @@
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// -- Response
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// -- -- none response
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// System info update
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#define CMD_SYS_INFO 0x33
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#define SYS_INFO_OFFSET 2
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// -- Request
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// -- -- 54 byte system info
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// -- Response
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// -- -- none response
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// Data Send Test Command
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#define CMD_FLJ_SEND 0xE4
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#define FLJ_DATA_OFFSET 2
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// -- Request
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// -- -- 78 byte payload
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// -- Response
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// -- -- none response
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// Data Send Test Command
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#define CMD_LJ_SEND 0xF4
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#define LJ_DATA_OFFSET 2
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// -- Request
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// -- -- 156 byte payload
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// -- Response
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// -- -- none response
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// FLJ Poll
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#define CMD_FLJ_POLL 0xE5
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// -- Request
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#define WD_FLJ_POLL 0x02
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#define FLJ_POLL_CODE 0x77
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// -- Response
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#define FLJ_POLL_RESP_LEN 170
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// -- -- received 170 byte payload
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// LJ Poll
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#define CMD_LJ_POLL 0xF5
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// -- Request
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#define WD_LJ_POLL 0x02
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#define LJ_POLL_CODE 0x77
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// -- Response
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#define LJ_POLL_RESP_LEN 68
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// -- -- received 68 byte payload
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// Remote Test
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#define RM_TEST_RESP_LEN 158
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// -- Request
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// Remote Test FLJ
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#define CMD_FLJ_RM_TEST 0xE6
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// Remote Test LJ
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#define CMD_LJ_RM_TEST 0xF6
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#define WD_RM_TEST 0x02
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#define RM_TEST_CODE 0x99
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// -- Response
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@@ -169,40 +101,6 @@
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#define WD_HARDWARE_ST 0x91
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#define WD_HARDWARE_ST_LEN 13
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// Remote Test FLJ
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#define CMD_FLJ_RM_TEST 0xE6
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// -- Request
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#define WD_FLJ_RM_TEST 0x02
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#define FLJ_RM_TEST_CODE 0x99
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// -- Response
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#define WD_FLJ_TIME_STAMP 0x02
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#define WD_FLJ_TIME_STAMP_LEN 8
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#define WD_FLJ_SYSBUS_LOG 0x0A
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#define WD_FLJ_SYSBUS_LOG_LEN 14
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#define WD_FLJ_LINK_LOG 0x18
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#define WD_FLJ_LINK_LOG_LEN 64
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#define WD_FLJ_PHY_LOG 0x58
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#define WD_FLJ_PHY_LOG_LEN 57
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#define WD_FLJ_HARDWARE_ST 0x91
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#define WD_FLJ_HARDWARE_ST_LEN 13
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// Remote Test LJ
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#define CMD_LJ_RM_TEST 0xF6
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// -- Request
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#define WD_LJ_RM_TEST 0x02
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#define LJ_RM_TEST_CODE 0x99
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// -- Response
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#define WD_LJ_TIME_STAMP 0x02
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#define WD_LJ_TIME_STAMP_LEN 8
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#define WD_LJ_SYSBUS_LOG 0x0A
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#define WD_LJ_SYSBUS_LOG_LEN 14
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#define WD_LJ_LINK_LOG 0x18
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#define WD_LJ_LINK_LOG_LEN 64
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#define WD_LJ_PHY_LOG 0x58
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#define WD_LJ_PHY_LOG_LEN 57
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#define WD_LJ_HARDWARE_ST 0x91
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#define WD_LJ_HARDWARE_ST_LEN 13
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// My Production Type
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#define MY_PRD_ID PRD_DL_K
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@@ -245,6 +143,52 @@ inline bool Mpc_IsRxBusy(MPC *instPtr)
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return (!instPtr->isRxDone);
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}
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/**
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* @brief Generate System Bus SelfTest response.
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*/
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static int32_t Mpc_GenSelfTestRsp(MPC *instPtr)
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{
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ASSERT(instPtr != NULL);
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MPC_HW_FRAME *mpcRsp;
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uint8_t *msg;
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if (instPtr->isEnable == false)
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{
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DBG_ERROR("System is not enabled!\n");
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return EIGNORE;
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}
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mpcRsp = malloc(sizeof(MPC_HW_FRAME));
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if (mpcRsp == NULL) {
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DBG_ERROR("Failed to allocate memory for LJ REMOTE TEST Response!\n");
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return ENOMEM;
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}
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mpcRsp->len = ST_RSP_LEN;
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msg = mpcRsp->data + FRAME_PAYLOAD_POFFSET;
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HWSTATE *hwStatsPtr = &(instPtr->hwState);
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msg[WD_CMD] = CMD_SELF_TEST;
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msg[WD_PRD] = MY_PRD_ID;
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SysMonitor_GetHardwareStatus(hwStatsPtr);
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if (linkInstPtr->isEnable == false)
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{
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msg[WD_ST_RET] = (hwStatsPtr->isSpOk) ? ST_RET_OK : ST_RET_ERROR;
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}
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else
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{
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msg[WD_ST_RET] = (hwStatsPtr->isSpOk && hwStatsPtr->isAntOk) ? ST_RET_OK : ST_RET_ERROR;
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}
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// apply status and omit 2 bytes of overhead.
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memcpy(msg + WD_SP_FPGA_VOLT, &(hwStatsPtr->spFpgaVolt), ST_RET_INFO_LEN);
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if (CircQueuePush(instPtr->txQueue, (void *)mpcRsp) == false)
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{
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free(mpcRsp);
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DBG_ERROR("SystemBus::TX Queue overflowed!\n");
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return EQUEUE;
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}
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return SUCCESS;
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}
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/**
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* @brief Apply system configuration
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*/
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@@ -253,7 +197,6 @@ static int32_t Mpc_SystemConfig(MPC *instPtr, uint8_t *msg)
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PHY_INST *phyRef = linkInstPtr->config.phyInstPtr;
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TMC_INST *tmcRef = linkInstPtr->config.tmcInstPtr;
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bool reconfig = false;
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bool start = false;
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if (msg[WD_MODE_CMD] == MODE_CMD_HEAD)
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{
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@@ -290,19 +233,19 @@ static int32_t Mpc_SystemConfig(MPC *instPtr, uint8_t *msg)
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{
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// high power config
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Phy_AntConfigMode(phyRef, PHY_ANT_MODE_POWER_FULL);
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start = true;
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instPtr->isEnable = true;
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}
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else if(msg[WD_EN_CMD] == EN_CMD_ON_LOW_POWER)
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{
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// low power config
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Phy_AntConfigMode(phyRef, PHY_ANT_MODE_POWER_LOW);
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start = true;
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instPtr->isEnable = true;
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}
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else if(msg[WD_EN_CMD] == EN_CMD_SILENT)
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{
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// silence config
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// TODO: better approach?
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start = false;
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instPtr->isEnable = false;
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Linklayer_Halt(linkInstPtr);
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Phy_AntConfigMode(phyRef, PHY_ANT_MODE_STANDBY);
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TIME_WORD pullTime = {0, 0};
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@@ -317,7 +260,7 @@ static int32_t Mpc_SystemConfig(MPC *instPtr, uint8_t *msg)
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{
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Linklayer_Reconfig(linkInstPtr, &linkConfig);
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}
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if (start == true)
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if (instPtr->isEnable == true)
|
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{
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Linklayer_Start(linkInstPtr);
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}
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@@ -426,21 +369,20 @@ mpc_init_error:
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******************************************************************************/
|
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int32_t Mpc_PendRemoteTest(MPC *instPtr)
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{
|
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MPC_HW_FRAME *sysbusRsp;
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MPC_HW_FRAME *mpcRsp;
|
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uint8_t *msg;
|
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if (instPtr->isEnable == false)
|
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{
|
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DBG_ERROR("System is not enabled!\n");
|
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return EIGNORE;
|
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}
|
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sysbusRsp = malloc(sizeof(MPC_HW_FRAME));
|
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if (sysbusRsp == NULL) {
|
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mpcRsp = malloc(sizeof(MPC_HW_FRAME));
|
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if (mpcRsp == NULL) {
|
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DBG_ERROR("Failed to allocate memory for LJ REMOTE TEST Response!\n");
|
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return ENOMEM;
|
||||
}
|
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sysbusRsp = malloc(sizeof(MPC_HW_FRAME));
|
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msg = sysbusRsp->data + FRAME_PAYLOAD_POFFSET;
|
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sysbusRsp->len = RM_TEST_RESP_LEN;
|
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msg = mpcRsp->data + FRAME_PAYLOAD_POFFSET;
|
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mpcRsp->len = RM_TEST_RESP_LEN;
|
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if (L2_GetNodeType(linkInstPtr) == L2_NODE_HEAD)
|
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{
|
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// head node config
|
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@@ -465,8 +407,8 @@ int32_t Mpc_PendRemoteTest(MPC *instPtr)
|
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memcpy(msg + WD_PHY_LOG, &(instPtr->phyLog), WD_PHY_LOG_LEN);
|
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memcpy(msg + WD_HARDWARE_ST, &(instPtr->hwState.spFpgaVolt), WD_HARDWARE_ST_LEN);
|
||||
|
||||
if (CircQueuePush(instPtr->txQueue, (void *)sysbusRsp) == false){
|
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free(sysbusRsp);
|
||||
if (CircQueuePush(instPtr->txQueue, (void *)mpcRsp) == false){
|
||||
free(mpcRsp);
|
||||
DBG_WARNING("SystemBus::TX Queue overflowed!\n");
|
||||
return EQUEUE;
|
||||
}
|
||||
@@ -507,6 +449,10 @@ int32_t Mpc_HandleCmd(MPC *instPtr)
|
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case CMD_CONFIG:
|
||||
{
|
||||
Status = Mpc_SystemConfig(instPtr, reqMsg);
|
||||
if (Status == SUCCESS)
|
||||
{
|
||||
Status = Mpc_GenSelfTestRsp(instPtr);
|
||||
}
|
||||
break;
|
||||
}
|
||||
default:
|
||||
@@ -533,15 +479,15 @@ int32_t Mpc_MakeResp(MPC *instPtr)
|
||||
{
|
||||
ASSERT(instPtr != NULL);
|
||||
int32_t Status;
|
||||
MPC_HW_FRAME *sysbusRsp;
|
||||
if (CircQueuePop(instPtr->txQueue, (void **)(&sysbusRsp)) == false)
|
||||
MPC_HW_FRAME *mpcRsp;
|
||||
if (CircQueuePop(instPtr->txQueue, (void **)(&mpcRsp)) == false)
|
||||
{
|
||||
DBG_WARNING("SystemBus::Nothing to be sent.\n");
|
||||
return EIGNORE;
|
||||
}
|
||||
instPtr->isTxDone = false; // A transmission procedure is started.
|
||||
Status = MpcHw_Send(instPtr->mpchwDesc, sysbusRsp);
|
||||
free(sysbusRsp);
|
||||
Status = MpcHw_Send(instPtr->mpchwDesc, mpcRsp);
|
||||
free(mpcRsp);
|
||||
return Status;
|
||||
}
|
||||
|
||||
|
||||
@@ -54,7 +54,6 @@
|
||||
// Physical Layer Configs
|
||||
#define PHY_DEVICE_ID 0
|
||||
#define PHY_BASEADDR XPAR_PHYC_BASEADDR
|
||||
#define PHY_BEAM_SET_PRESET
|
||||
#define PHY_BEAM_FORMING_ENABLE
|
||||
// -- Antenna Bram Configs
|
||||
#define PHY_ANTCONFIG_BRAM_DEVICE_ID XPAR_PHY_DATA_INTERFACE_ANT_INFO_BRAM_CTRL_DEVICE_ID
|
||||
|
||||
@@ -32,6 +32,7 @@
|
||||
/************************** Constant Definitions *****************************/
|
||||
#define NET_START_TIME_INFTY UINT32_MAX
|
||||
#define LINK_BROCK_THRESHOLD (3 * 200) // 3 secods
|
||||
|
||||
/************************** Variable Definitions *****************************/
|
||||
/***************** Macros (Inline Functions) Definitions *********************/
|
||||
/**************************** Type Definitions *******************************/
|
||||
@@ -989,7 +990,8 @@ int32_t Linklayer_EventHandler(L2_INST *instPtr, const L2_EVENT *l2Event)
|
||||
}
|
||||
else
|
||||
{
|
||||
DBG_WARNING("Unsupported routine state [%" PRId8 "], Continue withe previous routine table.\n", instPtr->nextState);
|
||||
DBG_WARNING("Unsupported routine state [%" PRId8 "], "
|
||||
"Continue with previous routine table.\n", instPtr->nextState);
|
||||
}
|
||||
break;
|
||||
}
|
||||
@@ -1237,17 +1239,16 @@ int32_t Linklayer_Proc(L2_INST *instPtr)
|
||||
|
||||
// Update link layer state.
|
||||
instPtr->mainState = instPtr->nextState;
|
||||
|
||||
instPtr->linkLog.tuNum = instPtr->frameNum.curr;
|
||||
instPtr->linkLog.slotNum = (uint8_t)instPtr->slotNum.curr;
|
||||
instPtr->linkLog.nodeType = (instPtr->config.myType == L2_NODE_HEAD) ? 0xAA : 0xCC;
|
||||
instPtr->linkLog.cxnStatus = (instPtr->cxn2Net) ? 0x11 : 0x00;
|
||||
instPtr->linkLog.linkStage = (instPtr->mainState == L2_INIT_STATE) ? 0x11 : 0x22;
|
||||
instPtr->linkLog.recxnCnt = instPtr->log.reconnectCnt;
|
||||
instPtr->linkLog.beamNo = instPtr->log.scanBeamNo;
|
||||
instPtr->linkLog.beamNo = instPtr->scanFSM->beamNo;
|
||||
instPtr->linkLog.beamWidth = instPtr->log.lastBeamWidth;
|
||||
instPtr->linkLog.beamAz = antSubnrrwPattern[instPtr->log.scanBeamNo].oaxis;
|
||||
instPtr->linkLog.beamEl = antSubnrrwPattern[instPtr->log.scanBeamNo].raxis;
|
||||
instPtr->linkLog.beamAz = instPtr->config.phyInstPtr->antNrrwPattern[instPtr->scanFSM->beamNo].oaxis;
|
||||
instPtr->linkLog.beamEl = instPtr->config.phyInstPtr->antNrrwPattern[instPtr->scanFSM->beamNo].raxis;
|
||||
instPtr->linkLog.advTxCnt = (uint16_t)instPtr->log.advTxCnt;
|
||||
instPtr->linkLog.advRecvCnt = (uint16_t)instPtr->log.advRecvCnt;
|
||||
instPtr->linkLog.advCorrectCnt = (uint16_t)instPtr->log.advCorrectCnt;
|
||||
|
||||
@@ -66,7 +66,6 @@ typedef struct
|
||||
uint32_t svcCorrectCnt;
|
||||
|
||||
int64_t timeDev;
|
||||
uint8_t scanBeamNo;
|
||||
uint8_t lastBeamWidth;
|
||||
uint32_t reconnectCnt;
|
||||
} L2_LOG;
|
||||
@@ -132,6 +131,7 @@ bool L2_CrcCheck(uint8_t *dataBuff, uint32_t dataLen, L2_CRC_TYPE crcType);
|
||||
|
||||
// Scanning
|
||||
int32_t L2_Scan_Init(L2_SCAN_FSM **scanFSMPtr);
|
||||
void L2_Scan_RefreashScanTable(L2_INST *instPtr);
|
||||
void L2_Scan_Reset(L2_SCAN_FSM *scanFSMPtr);
|
||||
void L2_Scan_Destroy(L2_SCAN_FSM *scanFSMPtr);
|
||||
int32_t L2_Scan_Proc(L2_INST *instPtr);
|
||||
|
||||
@@ -195,10 +195,11 @@ typedef struct
|
||||
bool isAdvRecvd; // bm received.
|
||||
bool isAckPending; // 2way acq done.
|
||||
uint8_t scanCnt;
|
||||
uint8_t beamNo;
|
||||
uint8_t advTimeout;
|
||||
uint8_t cfmTimeout;
|
||||
SCAN_STAGE scanStage; // only for member node
|
||||
uint8_t beamNo;
|
||||
uint8_t tableNo;
|
||||
} L2_SCAN_FSM;
|
||||
|
||||
|
||||
|
||||
@@ -79,6 +79,10 @@
|
||||
#define L2_MSG_CFM_SRC_SPEEDY_LEN 4
|
||||
#define L2_MSG_CFM_SRC_SPEEDZ 28
|
||||
#define L2_MSG_CFM_SRC_SPEEDZ_LEN 4
|
||||
#define L2_MSG_CFM_PAYLOAD_ID 32
|
||||
#define L2_MSG_CFM_PAYLOAD_ID_LEN 4
|
||||
#define L2_MSG_CFM_PAYLOAD 36
|
||||
#define L2_MSG_CFM_PAYLOAD_LEN 230
|
||||
#define L2_MSG_CFM_CRC 266
|
||||
#define L2_MSG_CFM_CRC_LEN 2
|
||||
|
||||
|
||||
@@ -28,13 +28,95 @@
|
||||
#define ADV_LISTEN_TIMEOUT 40
|
||||
#define CFM_LISTEN_TIMEOUT 25
|
||||
#define ADV_FRAME_SLOTS 4
|
||||
#define CFM_FRAME_SLOTS 4
|
||||
#define CFM_FRAME_SLOTS 5
|
||||
/***************** Macros (In-line Functions) Definitions *********************/
|
||||
|
||||
/**************************** Type Definitions *******************************/
|
||||
|
||||
/************************** Variable Definitions *****************************/
|
||||
// Pair by regex
|
||||
// Regex: ((\{\.oaxis = [0-9]+[ ,]+\.raxis = [0-9]+[ ]*\}, ){2})
|
||||
PHY_ANT_ANGLE antNrrwPattern_0[L1_NUM_ANT_NRRW_PATTERN] =
|
||||
{
|
||||
{.oaxis = 0 , .raxis = 0 },
|
||||
{.oaxis = 139, .raxis = 2225},
|
||||
{.oaxis = 152, .raxis = 850 },
|
||||
{.oaxis = 138, .raxis = 3155},
|
||||
{.oaxis = 159, .raxis = 1680},
|
||||
{.oaxis = 168, .raxis = 285 },
|
||||
{.oaxis = 195, .raxis = 2630},
|
||||
{.oaxis = 211, .raxis = 1204},
|
||||
{.oaxis = 225, .raxis = 3429},
|
||||
{.oaxis = 249, .raxis = 2022},
|
||||
{.oaxis = 272, .raxis = 629 },
|
||||
{.oaxis = 265, .raxis = 2934},
|
||||
{.oaxis = 277, .raxis = 1499},
|
||||
{.oaxis = 289, .raxis = 124 },
|
||||
{.oaxis = 300, .raxis = 2349},
|
||||
{.oaxis = 311, .raxis = 959 },
|
||||
{.oaxis = 321, .raxis = 3199},
|
||||
{.oaxis = 331, .raxis = 1824},
|
||||
{.oaxis = 341, .raxis = 389 },
|
||||
{.oaxis = 351, .raxis = 2674},
|
||||
{.oaxis = 360, .raxis = 1268},
|
||||
{.oaxis = 364, .raxis = 3483},
|
||||
{.oaxis = 378, .raxis = 2118},
|
||||
{.oaxis = 387, .raxis = 733 },
|
||||
{.oaxis = 416, .raxis = 3028},
|
||||
{.oaxis = 404, .raxis = 1623},
|
||||
{.oaxis = 433, .raxis = 248 },
|
||||
{.oaxis = 421, .raxis = 2473},
|
||||
{.oaxis = 429, .raxis = 1098},
|
||||
{.oaxis = 437, .raxis = 3303},
|
||||
{.oaxis = 445, .raxis = 1948},
|
||||
{.oaxis = 443, .raxis = 543 },
|
||||
{.oaxis = 450, .raxis = 2828},
|
||||
{.oaxis = 448, .raxis = 1422},
|
||||
{.oaxis = 455, .raxis = 47 },
|
||||
{.oaxis = 453, .raxis = 2272},
|
||||
{.oaxis = 450, .raxis = 897 }
|
||||
};
|
||||
|
||||
PHY_ANT_ANGLE antNrrwPattern_1[L1_NUM_ANT_NRRW_PATTERN] =
|
||||
{
|
||||
{.oaxis = 0 , .raxis = 0 },
|
||||
{.oaxis = 139, .raxis = 1155},
|
||||
{.oaxis = 152, .raxis = 3380},
|
||||
{.oaxis = 138, .raxis = 2085},
|
||||
{.oaxis = 159, .raxis = 610 },
|
||||
{.oaxis = 168, .raxis = 2815},
|
||||
{.oaxis = 195, .raxis = 1560},
|
||||
{.oaxis = 211, .raxis = 134 },
|
||||
{.oaxis = 225, .raxis = 2359},
|
||||
{.oaxis = 249, .raxis = 952 },
|
||||
{.oaxis = 272, .raxis = 3159},
|
||||
{.oaxis = 265, .raxis = 1864},
|
||||
{.oaxis = 277, .raxis = 429 },
|
||||
{.oaxis = 289, .raxis = 2654},
|
||||
{.oaxis = 300, .raxis = 1279},
|
||||
{.oaxis = 311, .raxis = 3489},
|
||||
{.oaxis = 321, .raxis = 2129},
|
||||
{.oaxis = 331, .raxis = 754 },
|
||||
{.oaxis = 341, .raxis = 2919},
|
||||
{.oaxis = 351, .raxis = 1604},
|
||||
{.oaxis = 360, .raxis = 198 },
|
||||
{.oaxis = 364, .raxis = 2413},
|
||||
{.oaxis = 378, .raxis = 1048},
|
||||
{.oaxis = 387, .raxis = 3263},
|
||||
{.oaxis = 416, .raxis = 1958},
|
||||
{.oaxis = 404, .raxis = 553 },
|
||||
{.oaxis = 433, .raxis = 2778},
|
||||
{.oaxis = 421, .raxis = 1403},
|
||||
{.oaxis = 429, .raxis = 28 },
|
||||
{.oaxis = 437, .raxis = 2233},
|
||||
{.oaxis = 445, .raxis = 878 },
|
||||
{.oaxis = 443, .raxis = 3073},
|
||||
{.oaxis = 450, .raxis = 1758},
|
||||
{.oaxis = 448, .raxis = 352 },
|
||||
{.oaxis = 455, .raxis = 2577},
|
||||
{.oaxis = 453, .raxis = 1202},
|
||||
{.oaxis = 450, .raxis = 3427},
|
||||
};
|
||||
/************************** Function Prototypes ******************************/
|
||||
static void LockStateUpdate(L2_SCAN_FSM *scanFsmPtr, bool state);
|
||||
static void AdvRecvStateUpdate(L2_SCAN_FSM *scanFsmPtr, bool state);
|
||||
@@ -112,9 +194,23 @@ static void StageUpdate(L2_SCAN_FSM *scanFsmPtr, SCAN_STAGE newStage)
|
||||
static int32_t Scan_InitScanHandler(L2_INST *instPtr)
|
||||
{
|
||||
ASSERT(instPtr != NULL);
|
||||
PHY_INST *phyRef = instPtr->config.phyInstPtr;
|
||||
L2_SCAN_FSM *scanFsmPtr = instPtr->scanFSM;
|
||||
DBG_INFO("** Net-Setup - InitScan Procedure (Attempts: %" PRIu8 ")**\n", scanFsmPtr->scanCnt);
|
||||
|
||||
if(scanFsmPtr->scanCnt == 0)
|
||||
{
|
||||
// Update scan beam table
|
||||
L2_Scan_RefreashScanTable(instPtr);
|
||||
}
|
||||
else if(Phy_IsFrameDetected(phyRef))
|
||||
{
|
||||
// last scan beam number
|
||||
instPtr->scanFSM->beamNo = Phy_LastScanBeamNo(instPtr->config.phyInstPtr);
|
||||
// Update scan beam table
|
||||
L2_Scan_RefreashScanTable(instPtr);
|
||||
}
|
||||
|
||||
if (scanFsmPtr->isLocked == true)
|
||||
{
|
||||
StageUpdate(scanFsmPtr, L2_SCAN_ADV_STAGE);
|
||||
@@ -149,6 +245,9 @@ static int32_t Scan_AdvHandler(L2_INST *instPtr)
|
||||
// if received a valid bm frame.
|
||||
if (scanFsmPtr->isAdvRecvd == true)
|
||||
{
|
||||
// last scan beam number
|
||||
instPtr->scanFSM->beamNo = Phy_LastScanBeamNo(instPtr->config.phyInstPtr);
|
||||
|
||||
scanFsmPtr->advTimeout = 0; /* reset listen counter. */
|
||||
DBG_INFO("Received Adv frame, skipping 10ms for turn around...\n");
|
||||
// TODO: check functionality.
|
||||
@@ -201,9 +300,12 @@ static int32_t Scan_CfmHandler(L2_INST *instPtr)
|
||||
{
|
||||
// using pull mode to receive confirm frame
|
||||
// since first time sync procedure is accomplished in ADV stage.
|
||||
Phy_SetBeamWidth(instPtr->config.phyInstPtr, PHY_ANT_BEAM_16);
|
||||
Phy_SetBeamNo(instPtr->config.phyInstPtr, scanFsmPtr->beamNo, PHY_ANT_BEAM_16);
|
||||
Phy_SetMode(instPtr->config.phyInstPtr, PHY_MODE_PULL);
|
||||
L2_SetupNextSlot(instPtr, L2_TOR_RX, L2_CFM_FRAME);
|
||||
scanFsmPtr->cfmTimeout++; // increase counter.
|
||||
instPtr->log.lastBeamWidth = PHY_ANT_BEAM_16;
|
||||
}
|
||||
return SUCCESS;
|
||||
}
|
||||
@@ -278,6 +380,23 @@ static int32_t ScanMsg_Packing(L2_INST *instPtr, L2_FRAME_TYPE type, uint8_t dst
|
||||
L2_FrameInsertChunk(buff, L2_MSG_CFM_SRC_SPEEDY, L2_MSG_CFM_SRC_SPEEDY_LEN, &(instPtr->sysInfo.vY));
|
||||
L2_FrameInsertChunk(buff, L2_MSG_CFM_SRC_SPEEDZ, L2_MSG_CFM_SRC_SPEEDZ_LEN, &(instPtr->sysInfo.vZ));
|
||||
|
||||
// Packing extra payload
|
||||
uint32_t dataId;
|
||||
if(L2_GetNodeType(instPtr) == L2_NODE_HEAD)
|
||||
{
|
||||
SysMonitor_GetSendPayload(buff + L2_MSG_CFM_PAYLOAD, &dataId, PAYLOAD_LEN_FLJ_TX);
|
||||
}
|
||||
else
|
||||
{
|
||||
SysMonitor_GetSendPayload(buff + L2_MSG_CFM_PAYLOAD, &dataId, PAYLOAD_LEN_LJ_TX);
|
||||
}
|
||||
|
||||
L2_FrameInsertChunk(buff, L2_MSG_CFM_PAYLOAD_ID, L2_MSG_CFM_PAYLOAD_ID_LEN, &dataId);
|
||||
if (dataId == DATA_ID_NONE)
|
||||
{
|
||||
memset(buff + L2_MSG_CFM_PAYLOAD, 0xAA, L2_MSG_CFM_PAYLOAD_LEN);
|
||||
}
|
||||
|
||||
// Append CRC
|
||||
Status = L2_CrcAppend(buff, L2_CMF_PACK_LEN - L2_MSG_CFM_CRC_LEN, L2_MSG_CFM_CRC, L2_CRC16_1021);
|
||||
if (Status != SUCCESS)
|
||||
@@ -315,6 +434,8 @@ int32_t L2_Scan_Init(L2_SCAN_FSM **scanFSMPtr)
|
||||
return ENOMEM;
|
||||
}
|
||||
L2_Scan_Reset(*scanFSMPtr);
|
||||
(*scanFSMPtr)->beamNo = 0;
|
||||
(*scanFSMPtr)->tableNo = 0;
|
||||
return SUCCESS;
|
||||
}
|
||||
|
||||
@@ -334,7 +455,6 @@ void L2_Scan_Reset(L2_SCAN_FSM *scanFSMPtr)
|
||||
scanFSMPtr->isAdvRecvd = false;
|
||||
scanFSMPtr->isAckPending = false;
|
||||
scanFSMPtr->scanCnt = 0;
|
||||
scanFSMPtr->beamNo = 0;
|
||||
scanFSMPtr->advTimeout = 0;
|
||||
scanFSMPtr->cfmTimeout = 0;
|
||||
scanFSMPtr->scanStage = L2_SCAN_NONE_STAGE;
|
||||
@@ -354,10 +474,37 @@ void L2_Scan_Destroy(L2_SCAN_FSM *scanFSMPtr)
|
||||
free(scanFSMPtr);
|
||||
}
|
||||
|
||||
/*****************************************************************************/
|
||||
/**
|
||||
* @brief Refresh scan beam table.
|
||||
*
|
||||
* @param instPtr a pointer to linklayer layer instance
|
||||
*
|
||||
* @return NONE
|
||||
*
|
||||
******************************************************************************/
|
||||
void L2_Scan_RefreashScanTable(L2_INST *instPtr)
|
||||
{
|
||||
ASSERT(instPtr != NULL);
|
||||
L2_SCAN_FSM *scanFsmPtr = instPtr->scanFSM;
|
||||
PHY_INST *phyRef = instPtr->config.phyInstPtr;
|
||||
if (scanFsmPtr->tableNo == 0)
|
||||
{
|
||||
Phy_SetBeamTable(phyRef, antNrrwPattern_0, scanFsmPtr->beamNo);
|
||||
scanFsmPtr->tableNo = 1;
|
||||
}
|
||||
else
|
||||
{
|
||||
Phy_SetBeamTable(phyRef, antNrrwPattern_1, scanFsmPtr->beamNo);
|
||||
scanFsmPtr->tableNo = 0;
|
||||
}
|
||||
}
|
||||
|
||||
/*****************************************************************************/
|
||||
/**
|
||||
* @brief Scan net packet handler.
|
||||
*
|
||||
* @param instPtr a pointer to linklayer layer instance
|
||||
* @param msg A pointer to frame data buffer.
|
||||
*
|
||||
* @return
|
||||
@@ -407,9 +554,6 @@ int32_t L2_Scan_PktHandler(L2_INST *instPtr, uint8_t *msg)
|
||||
node->nodeInfo.pos.z = (double) nodePos;
|
||||
node->nodeInfo.beamNo = Phy_LastScanBeamNo(instPtr->config.phyInstPtr);
|
||||
|
||||
// log last scan beam number
|
||||
instPtr->log.scanBeamNo = node->nodeInfo.beamNo;
|
||||
|
||||
// Reset node ttl
|
||||
node->ttlCnt = 0;
|
||||
|
||||
@@ -525,6 +669,23 @@ int32_t L2_Scan_PktHandler(L2_INST *instPtr, uint8_t *msg)
|
||||
// Time sync.
|
||||
L2_TimeAdjust(instPtr, &(instPtr->log.timeDev));
|
||||
}
|
||||
|
||||
// Get data payload
|
||||
uint32_t dataId;
|
||||
L2_FrameGetChunk(msg, L2_MSG_CFM_PAYLOAD_ID, L2_MSG_CFM_PAYLOAD_ID_LEN, &dataId);
|
||||
|
||||
if(dataId != DATA_ID_NONE)
|
||||
{
|
||||
if(L2_GetNodeType(instPtr) == L2_NODE_HEAD)
|
||||
{
|
||||
SysMonitor_UpdateRecvPayload(msg+L2_MSG_CFM_PAYLOAD, PAYLOAD_LEN_FLJ_RX);
|
||||
}
|
||||
else
|
||||
{
|
||||
SysMonitor_UpdateRecvPayload(msg+L2_MSG_CFM_PAYLOAD, PAYLOAD_LEN_LJ_RX);
|
||||
}
|
||||
}
|
||||
|
||||
Status = SUCCESS;
|
||||
break;
|
||||
}
|
||||
@@ -621,11 +782,11 @@ int32_t L2_Scan_Routine(L2_INST *instPtr, const L2_RTNE_TABLE_ENTRY *rtneEntry)
|
||||
}
|
||||
|
||||
// Setup antenna beam
|
||||
Phy_SetBeamWidth(instPtr->config.phyInstPtr, PHY_ANT_BEAM_25);
|
||||
instPtr->log.lastBeamWidth = PHY_ANT_BEAM_25;
|
||||
Phy_SetBeamWidth(instPtr->config.phyInstPtr, PHY_ANT_BEAM_16);
|
||||
instPtr->log.lastBeamWidth = PHY_ANT_BEAM_16;
|
||||
if (commNode != NULL)
|
||||
{
|
||||
Phy_SetBeamNo(instPtr->config.phyInstPtr, commNode->nodeInfo.beamNo);
|
||||
Phy_SetBeamNo(instPtr->config.phyInstPtr, commNode->nodeInfo.beamNo, PHY_ANT_BEAM_16);
|
||||
}
|
||||
}
|
||||
else
|
||||
|
||||
@@ -387,9 +387,9 @@ int32_t L2_Service_Routine(L2_INST *instPtr, const L2_RTNE_TABLE_ENTRY *rtneEntr
|
||||
// Setup antenna beam
|
||||
if (L2_GetNodeType(instPtr) != L2_NODE_HEAD && commNode != NULL)
|
||||
{
|
||||
Phy_SetBeamWidth(phyRef, PHY_ANT_BEAM_25);
|
||||
Phy_SetBeamNo(phyRef, commNode->nodeInfo.beamNo);
|
||||
instPtr->log.lastBeamWidth = PHY_ANT_BEAM_25;
|
||||
Phy_SetBeamWidth(phyRef, PHY_ANT_BEAM_16);
|
||||
Phy_SetBeamNo(phyRef, commNode->nodeInfo.beamNo, PHY_ANT_BEAM_16);
|
||||
instPtr->log.lastBeamWidth = PHY_ANT_BEAM_16;
|
||||
}
|
||||
else
|
||||
{
|
||||
|
||||
@@ -87,10 +87,16 @@ uint16_t hopPattern_10KBPS_10MS[L1_FRAME_10KBPS_10MS_HOPS] =
|
||||
1500
|
||||
};
|
||||
|
||||
//uint16_t hopPattern_10KBPS_20MS[L1_FRAME_10KBPS_20MS_HOPS] =
|
||||
//{
|
||||
// 1500, 1600, 1700, 1800, 1900, 1400, 1300, 1200,
|
||||
// 1100, 1000, 900
|
||||
//};
|
||||
|
||||
uint16_t hopPattern_10KBPS_20MS[L1_FRAME_10KBPS_20MS_HOPS] =
|
||||
{
|
||||
1500, 1600, 1700, 1800, 1900, 1400, 1300, 1200,
|
||||
1100, 1000, 900
|
||||
1500, 1500, 1500, 1500, 1500, 1500, 1500, 1500,
|
||||
1500, 1500, 1500
|
||||
};
|
||||
|
||||
uint16_t hopPattern_40KBPS_10MS[L1_FRAME_40KBPS_10MS_HOPS] =
|
||||
@@ -99,11 +105,18 @@ uint16_t hopPattern_40KBPS_10MS[L1_FRAME_40KBPS_10MS_HOPS] =
|
||||
1500
|
||||
};
|
||||
|
||||
//uint16_t hopPattern_40KBPS_20MS[L1_FRAME_40KBPS_20MS_HOPS] =
|
||||
//{
|
||||
// 1600, 1650, 1700, 1750, 1800, 1850, 1900, 1550,
|
||||
// 1500, 1450, 1400, 1350, 1300, 1250, 1200, 1150,
|
||||
// 1100, 1050, 1000
|
||||
//};
|
||||
|
||||
uint16_t hopPattern_40KBPS_20MS[L1_FRAME_40KBPS_20MS_HOPS] =
|
||||
{
|
||||
1600, 1650, 1700, 1750, 1800, 1850, 1900, 1550,
|
||||
1500, 1450, 1400, 1350, 1300, 1250, 1200, 1150,
|
||||
1100, 1050, 1000
|
||||
1700, 1800, 1900, 2000, 1700, 1700, 1700, 1700,
|
||||
1700, 1700, 1700, 1700, 1700, 1700, 1700, 1700,
|
||||
1700, 1700, 1700
|
||||
};
|
||||
|
||||
uint16_t hopPattern_200KBPS_5MS[L1_FRAME_200KBPS_5MS_HOPS] =
|
||||
@@ -120,76 +133,6 @@ uint16_t hopPattern_1M2BPS_5MS[L1_FRAME_1M2BPS_5MS_HOPS] =
|
||||
900, 1000, 500, 500
|
||||
};
|
||||
|
||||
// Pair by regex
|
||||
// Regex: ((\{\.oaxis = [0-9]+[ ,]+\.raxis = [0-9]+[ ]*\}, ){2})
|
||||
#ifdef PHY_BEAM_SET_PRESET
|
||||
PHY_ANT_ANGLE antSubnrrwPattern[L1_NUM_ANT_SUBNRRW_PATTERN] =
|
||||
{
|
||||
{.oaxis = 0 , .raxis = 0 }, {.oaxis = 10, .raxis = 85 },
|
||||
{.oaxis = 14, .raxis = 307}, {.oaxis = 17, .raxis = 170},
|
||||
{.oaxis = 19, .raxis = 32 }, {.oaxis = 21, .raxis = 255},
|
||||
{.oaxis = 24, .raxis = 117}, {.oaxis = 25, .raxis = 340},
|
||||
{.oaxis = 27, .raxis = 202}, {.oaxis = 29, .raxis = 65 },
|
||||
{.oaxis = 31, .raxis = 287}, {.oaxis = 32, .raxis = 150},
|
||||
{.oaxis = 34, .raxis = 12 }, {.oaxis = 35, .raxis = 235},
|
||||
{.oaxis = 36, .raxis = 97 }, {.oaxis = 38, .raxis = 320},
|
||||
{.oaxis = 39, .raxis = 182}, {.oaxis = 40, .raxis = 45 },
|
||||
{.oaxis = 41, .raxis = 267}, {.oaxis = 43, .raxis = 130},
|
||||
{.oaxis = 44, .raxis = 352}, {.oaxis = 45, .raxis = 215},
|
||||
{.oaxis = 46, .raxis = 77 }, {.oaxis = 47, .raxis = 300},
|
||||
{.oaxis = 48, .raxis = 162}, {.oaxis = 49, .raxis = 25 },
|
||||
{.oaxis = 50, .raxis = 247}, {.oaxis = 51, .raxis = 110},
|
||||
{.oaxis = 52, .raxis = 332}, {.oaxis = 53, .raxis = 195},
|
||||
{.oaxis = 54, .raxis = 57 }, {.oaxis = 55, .raxis = 280},
|
||||
{.oaxis = 56, .raxis = 142}, {.oaxis = 57, .raxis = 5 },
|
||||
{.oaxis = 58, .raxis = 227}, {.oaxis = 59, .raxis = 90 },
|
||||
{.oaxis = 60, .raxis = 312}
|
||||
};
|
||||
PHY_ANT_ANGLE antNrrwPattern[L1_NUM_ANT_NRRW_PATTERN] =
|
||||
{
|
||||
{.oaxis = 0 , .raxis = 0 }, {.oaxis = 7 , .raxis = 85 },
|
||||
{.oaxis = 10, .raxis = 307}, {.oaxis = 13, .raxis = 170},
|
||||
{.oaxis = 15, .raxis = 32 }, {.oaxis = 17, .raxis = 255},
|
||||
{.oaxis = 18, .raxis = 117}, {.oaxis = 20, .raxis = 340},
|
||||
{.oaxis = 21, .raxis = 202}, {.oaxis = 22, .raxis = 65 },
|
||||
{.oaxis = 24, .raxis = 287}, {.oaxis = 25, .raxis = 150},
|
||||
{.oaxis = 26, .raxis = 12 }, {.oaxis = 27, .raxis = 235},
|
||||
{.oaxis = 28, .raxis = 97 }, {.oaxis = 29, .raxis = 320},
|
||||
{.oaxis = 30, .raxis = 182}, {.oaxis = 31, .raxis = 45 },
|
||||
{.oaxis = 32, .raxis = 267}, {.oaxis = 33, .raxis = 130},
|
||||
{.oaxis = 34, .raxis = 352}, {.oaxis = 34, .raxis = 215},
|
||||
{.oaxis = 35, .raxis = 77 }, {.oaxis = 36, .raxis = 300},
|
||||
{.oaxis = 37, .raxis = 162}, {.oaxis = 38, .raxis = 25 },
|
||||
{.oaxis = 38, .raxis = 247}, {.oaxis = 39, .raxis = 110},
|
||||
{.oaxis = 40, .raxis = 332}, {.oaxis = 41, .raxis = 195},
|
||||
{.oaxis = 41, .raxis = 57 }, {.oaxis = 42, .raxis = 280},
|
||||
{.oaxis = 43, .raxis = 142}, {.oaxis = 44, .raxis = 5 },
|
||||
{.oaxis = 44, .raxis = 227}, {.oaxis = 45, .raxis = 90 },
|
||||
{.oaxis = 46, .raxis = 312}, {.oaxis = 46, .raxis = 175},
|
||||
{.oaxis = 47, .raxis = 37 }, {.oaxis = 48, .raxis = 260},
|
||||
{.oaxis = 48, .raxis = 122}, {.oaxis = 49, .raxis = 345},
|
||||
{.oaxis = 49, .raxis = 207}, {.oaxis = 50, .raxis = 70 },
|
||||
{.oaxis = 51, .raxis = 292}, {.oaxis = 51, .raxis = 155},
|
||||
{.oaxis = 52, .raxis = 17 }, {.oaxis = 53, .raxis = 240},
|
||||
{.oaxis = 53, .raxis = 102}, {.oaxis = 54, .raxis = 325},
|
||||
{.oaxis = 54, .raxis = 187}, {.oaxis = 55, .raxis = 50 },
|
||||
{.oaxis = 55, .raxis = 272}, {.oaxis = 56, .raxis = 135},
|
||||
{.oaxis = 57, .raxis = 357}, {.oaxis = 57, .raxis = 220},
|
||||
{.oaxis = 58, .raxis = 82 }, {.oaxis = 58, .raxis = 305},
|
||||
{.oaxis = 59, .raxis = 167}, {.oaxis = 59, .raxis = 30 },
|
||||
{.oaxis = 60, .raxis = 252}
|
||||
};
|
||||
#else
|
||||
PHY_ANT_ANGLE antSubnrrwPattern[L1_NUM_ANT_SUBNRRW_PATTERN] =
|
||||
{
|
||||
0
|
||||
};
|
||||
PHY_ANT_ANGLE antNrrwPattern[L1_NUM_ANT_NRRW_PATTERN] =
|
||||
{
|
||||
0
|
||||
};
|
||||
#endif
|
||||
|
||||
/*****************************************************************************/
|
||||
/**
|
||||
* @brief Initialize antenna configurations (load preset values)
|
||||
@@ -283,6 +226,29 @@ void Phy_AntConfigMode(PHY_INST *instPtr, PHY_ANT_MODE mode)
|
||||
instPtr->antConfig.antMode = config;
|
||||
}
|
||||
|
||||
/*****************************************************************************/
|
||||
/**
|
||||
* @brief Update antenna beam width setting
|
||||
*
|
||||
* @param instPtr pointer to physical layer instance
|
||||
* @param table new beam table
|
||||
* @param offset table offset
|
||||
*
|
||||
* @return None
|
||||
*
|
||||
******************************************************************************/
|
||||
void Phy_SetBeamTable(PHY_INST *instPtr, PHY_ANT_ANGLE *table, uint32_t offset)
|
||||
{
|
||||
ASSERT(instPtr != NULL);
|
||||
ASSERT(table != NULL);
|
||||
for (int i = 0; i < L1_NUM_ANT_NRRW_PATTERN; i++)
|
||||
{
|
||||
instPtr->antNrrwPattern[i] = table[(i+offset) % L1_NUM_ANT_NRRW_PATTERN];
|
||||
}
|
||||
memcpy((uint32_t*)instPtr->antInfoAddr, instPtr->antNrrwPattern,
|
||||
L1_NUM_ANT_NRRW_PATTERN*sizeof(PHY_ANT_ANGLE));
|
||||
}
|
||||
|
||||
/*****************************************************************************/
|
||||
/**
|
||||
* @brief Update antenna point direction using predefined beam table
|
||||
@@ -294,10 +260,11 @@ void Phy_AntConfigMode(PHY_INST *instPtr, PHY_ANT_MODE mode)
|
||||
* FAILURE beamNo exceeds the table size
|
||||
*
|
||||
******************************************************************************/
|
||||
int32_t Phy_SetBeamNo(PHY_INST *instPtr, int32_t beamNo)
|
||||
int32_t Phy_SetBeamNo(PHY_INST *instPtr, int32_t beamNo, PHY_ANT_BEAM_WIDTH beamWidth)
|
||||
{
|
||||
ASSERT(instPtr != NULL);
|
||||
if (instPtr->beamWd.next == PHY_ANT_BEAM_8)
|
||||
|
||||
if (beamWidth == PHY_ANT_BEAM_16)
|
||||
{
|
||||
if (beamNo >= L1_NUM_ANT_NRRW_PATTERN)
|
||||
{
|
||||
@@ -306,26 +273,10 @@ int32_t Phy_SetBeamNo(PHY_INST *instPtr, int32_t beamNo)
|
||||
else
|
||||
{
|
||||
instPtr->beamNo.next = beamNo;
|
||||
instPtr->antConfig.oaxis[0] = (uint8_t)(antNrrwPattern[beamNo].oaxis >> 8);
|
||||
instPtr->antConfig.oaxis[1] = (uint8_t)(antNrrwPattern[beamNo].oaxis);
|
||||
instPtr->antConfig.raxis[0] = (uint8_t)(antNrrwPattern[beamNo].raxis >> 8);
|
||||
instPtr->antConfig.raxis[1] = (uint8_t)(antNrrwPattern[beamNo].raxis);
|
||||
return SUCCESS;
|
||||
}
|
||||
}
|
||||
else if (instPtr->beamWd.next == PHY_ANT_BEAM_25)
|
||||
{
|
||||
if (beamNo >= L1_NUM_ANT_SUBNRRW_PATTERN)
|
||||
{
|
||||
return FAILURE;
|
||||
}
|
||||
else
|
||||
{
|
||||
instPtr->beamNo.next = beamNo;
|
||||
instPtr->antConfig.oaxis[0] = (uint8_t)(antSubnrrwPattern[beamNo].oaxis >> 8);
|
||||
instPtr->antConfig.oaxis[1] = (uint8_t)(antSubnrrwPattern[beamNo].oaxis);
|
||||
instPtr->antConfig.raxis[0] = (uint8_t)(antSubnrrwPattern[beamNo].raxis >> 8);
|
||||
instPtr->antConfig.raxis[1] = (uint8_t)(antSubnrrwPattern[beamNo].raxis);
|
||||
instPtr->antConfig.oaxis[0] = (uint8_t)(instPtr->antNrrwPattern[beamNo].oaxis >> 8);
|
||||
instPtr->antConfig.oaxis[1] = (uint8_t)(instPtr->antNrrwPattern[beamNo].oaxis);
|
||||
instPtr->antConfig.raxis[0] = (uint8_t)(instPtr->antNrrwPattern[beamNo].raxis >> 8);
|
||||
instPtr->antConfig.raxis[1] = (uint8_t)(instPtr->antNrrwPattern[beamNo].raxis);
|
||||
return SUCCESS;
|
||||
}
|
||||
}
|
||||
@@ -369,7 +320,7 @@ int32_t Phy_SetBeamWidth(PHY_INST *instPtr, PHY_ANT_BEAM_WIDTH beamWidth)
|
||||
case PHY_ANT_BEAM_25:
|
||||
beamConfig |= ANT_BEAM_SUBNARROR_0;
|
||||
break;
|
||||
case PHY_ANT_BEAM_8:
|
||||
case PHY_ANT_BEAM_16:
|
||||
beamConfig |= ANT_BEAM_NARROR;
|
||||
break;
|
||||
default:
|
||||
|
||||
@@ -34,7 +34,6 @@
|
||||
#include "xadcps.h"
|
||||
#endif
|
||||
|
||||
|
||||
/************************** Constant Definitions *****************************/
|
||||
#define L1_FRAME_LEN_MAX (8192 / 8) // byte
|
||||
#define L1_FRAME_2KBPS_20MS_LEN 0 // byte
|
||||
@@ -185,24 +184,25 @@ inline L1_FRAME_TYPE Phy_GetLastRecvFrameType(PHY_INST *instPtr)
|
||||
return L1_NONE_FRAME;
|
||||
}
|
||||
int32_t frame_type = (PhyRead(instPtr, COASE_FREQEST) & COASE_TYPE_MASK);
|
||||
switch (frame_type) {
|
||||
case COASE_TYPE_2KBPS_20MS:
|
||||
switch (frame_type)
|
||||
{
|
||||
case COASE_TYPE_2KBPS_20MS:
|
||||
return L1_2KBPS_20MS_FRAME;
|
||||
case COASE_TYPE_2KBPS_100MS:
|
||||
case COASE_TYPE_2KBPS_100MS:
|
||||
return L1_2KBPS_100MS_FRAME;
|
||||
case COASE_TYPE_10KBPS_10MS:
|
||||
case COASE_TYPE_10KBPS_10MS:
|
||||
return L1_10KBPS_10MS_FRAME;
|
||||
case COASE_TYPE_10KBPS_20MS:
|
||||
case COASE_TYPE_10KBPS_20MS:
|
||||
return L1_10KBPS_20MS_FRAME;
|
||||
case COASE_TYPE_40KBPS_20MS:
|
||||
case COASE_TYPE_40KBPS_20MS:
|
||||
return L1_40KBPS_20MS_FRAME;
|
||||
case COASE_TYPE_40KBPS_10MS:
|
||||
case COASE_TYPE_40KBPS_10MS:
|
||||
return L1_40KBPS_10MS_FRAME;
|
||||
case COASE_TYPE_200KBPS_5MS:
|
||||
case COASE_TYPE_200KBPS_5MS:
|
||||
return L1_200KBPS_5MS_FRAME;
|
||||
case COASE_TYPE_1M2BPS_5MS:
|
||||
case COASE_TYPE_1M2BPS_5MS:
|
||||
return L1_1M2BPS_5MS_FRAME;
|
||||
default:
|
||||
default:
|
||||
return L1_NONE_FRAME;
|
||||
}
|
||||
}
|
||||
@@ -362,6 +362,7 @@ int32_t Phy_InstInit(PHY_INST **instPtr, PHY_CONFIG *phyConfig)
|
||||
{
|
||||
return ENOMEM;
|
||||
}
|
||||
memset(*instPtr, 0x00, sizeof(PHY_INST));
|
||||
|
||||
memcpy(&((*instPtr)->phyCofig), phyConfig, sizeof(PHY_CONFIG));
|
||||
(*instPtr)->isPhyEn = false;
|
||||
@@ -470,28 +471,30 @@ int32_t Phy_InstInit(PHY_INST **instPtr, PHY_CONFIG *phyConfig)
|
||||
goto init_error;
|
||||
}
|
||||
Status = XBram_CfgInitialize(&antInfoBram, bramConfigPtr,
|
||||
bramConfigPtr->CtrlBaseAddress);
|
||||
bramConfigPtr->CtrlBaseAddress);
|
||||
if (Status != SUCCESS)
|
||||
{
|
||||
goto init_error;
|
||||
}
|
||||
/*
|
||||
* Execute the BRAM driver selftest.
|
||||
*/
|
||||
Status = XBram_SelfTest(&antConfigBram, 0);
|
||||
* Execute the BRAM driver self test.
|
||||
*/
|
||||
Status = XBram_SelfTest(&antInfoBram, 0);
|
||||
if (Status != SUCCESS)
|
||||
{
|
||||
goto init_error;
|
||||
}
|
||||
|
||||
memcpy((void*)antConfigBram.Config.MemBaseAddress,
|
||||
antSubnrrwPattern, sizeof(antSubnrrwPattern));
|
||||
(*instPtr)->antInfoAddr = antInfoBram.Config.MemBaseAddress;
|
||||
uint32_t phyMainCtrl = PhyRead(*instPtr, PHY_MAIN_CTRL);
|
||||
phyMainCtrl &= ~PHY_MAIN_CTRL_NSCAN_MASK;
|
||||
phyMainCtrl |= PHY_MAIN_CTRL_NSCAN_MASK &
|
||||
(L1_NUM_ANT_SUBNRRW_PATTERN << PHY_MAIN_CTRL_NSCAN_SHIFT);
|
||||
(L1_NUM_ANT_NRRW_PATTERN << PHY_MAIN_CTRL_NSCAN_SHIFT);
|
||||
PhyWrite(*instPtr, PHY_MAIN_CTRL, phyMainCtrl);
|
||||
}
|
||||
else
|
||||
{
|
||||
(*instPtr)->antInfoAddr = NULL;
|
||||
}
|
||||
|
||||
/* Initialize the XAdc driver. */
|
||||
XAdcPs_Config *xadcConfigPtr;
|
||||
@@ -687,52 +690,52 @@ int32_t Phy_SetupNextSlot(PHY_INST *instPtr, PHY_TOR_TYPE txrxMode,
|
||||
}
|
||||
else
|
||||
{
|
||||
switch (frameType)
|
||||
{
|
||||
case L1_2KBPS_20MS_FRAME:
|
||||
phyModeCtrl |= PHY_MODE_CTRL_FRAME_2KBPS_20MS;
|
||||
hopNum = L1_FRAME_2KBPS_20MS_HOPS;
|
||||
hopPattern = hopPattern_2KBPS_20MS;
|
||||
break;
|
||||
case L1_2KBPS_100MS_FRAME:
|
||||
phyModeCtrl |= PHY_MODE_CTRL_FRAME_2KBPS_100MS;
|
||||
hopNum = L1_FRAME_2KBPS_100MS_HOPS;
|
||||
hopPattern = hopPattern_2KBPS_100MS;
|
||||
break;
|
||||
case L1_10KBPS_10MS_FRAME:
|
||||
phyModeCtrl |= PHY_MODE_CTRL_FRAME_10KBPS_10MS;
|
||||
hopNum = L1_FRAME_10KBPS_20MS_HOPS;
|
||||
hopPattern = hopPattern_10KBPS_20MS;
|
||||
break;
|
||||
case L1_10KBPS_20MS_FRAME:
|
||||
phyModeCtrl |= PHY_MODE_CTRL_FRAME_10KBPS_20MS;
|
||||
hopNum = L1_FRAME_10KBPS_20MS_HOPS;
|
||||
hopPattern = hopPattern_10KBPS_20MS;
|
||||
break;
|
||||
case L1_40KBPS_20MS_FRAME:
|
||||
phyModeCtrl |= PHY_MODE_CTRL_FRAME_40KBPS_20MS;
|
||||
hopNum = L1_FRAME_40KBPS_20MS_HOPS;
|
||||
hopPattern = hopPattern_40KBPS_20MS;
|
||||
break;
|
||||
case L1_40KBPS_10MS_FRAME:
|
||||
phyModeCtrl |= PHY_MODE_CTRL_FRAME_40KBPS_10MS;
|
||||
hopNum = L1_FRAME_40KBPS_10MS_HOPS;
|
||||
hopPattern = hopPattern_40KBPS_10MS;
|
||||
break;
|
||||
case L1_200KBPS_5MS_FRAME:
|
||||
phyModeCtrl |= PHY_MODE_CTRL_FRAME_200KBPS_5MS;
|
||||
hopNum = L1_FRAME_200KBPS_5MS_HOPS;
|
||||
hopPattern = hopPattern_200KBPS_5MS;
|
||||
break;
|
||||
case L1_1M2BPS_5MS_FRAME:
|
||||
phyModeCtrl |= PHY_MODE_CTRL_FRAME_1M2BPS_5MS;
|
||||
hopNum = L1_FRAME_1M2BPS_5MS_HOPS;
|
||||
hopPattern = hopPattern_1M2BPS_5MS;
|
||||
break;
|
||||
default:
|
||||
return EPARAM;
|
||||
break;
|
||||
}
|
||||
switch (frameType)
|
||||
{
|
||||
case L1_2KBPS_20MS_FRAME:
|
||||
phyModeCtrl |= PHY_MODE_CTRL_FRAME_2KBPS_20MS;
|
||||
hopNum = L1_FRAME_2KBPS_20MS_HOPS;
|
||||
hopPattern = hopPattern_2KBPS_20MS;
|
||||
break;
|
||||
case L1_2KBPS_100MS_FRAME:
|
||||
phyModeCtrl |= PHY_MODE_CTRL_FRAME_2KBPS_100MS;
|
||||
hopNum = L1_FRAME_2KBPS_100MS_HOPS;
|
||||
hopPattern = hopPattern_2KBPS_100MS;
|
||||
break;
|
||||
case L1_10KBPS_10MS_FRAME:
|
||||
phyModeCtrl |= PHY_MODE_CTRL_FRAME_10KBPS_10MS;
|
||||
hopNum = L1_FRAME_10KBPS_20MS_HOPS;
|
||||
hopPattern = hopPattern_10KBPS_20MS;
|
||||
break;
|
||||
case L1_10KBPS_20MS_FRAME:
|
||||
phyModeCtrl |= PHY_MODE_CTRL_FRAME_10KBPS_20MS;
|
||||
hopNum = L1_FRAME_10KBPS_20MS_HOPS;
|
||||
hopPattern = hopPattern_10KBPS_20MS;
|
||||
break;
|
||||
case L1_40KBPS_20MS_FRAME:
|
||||
phyModeCtrl |= PHY_MODE_CTRL_FRAME_40KBPS_20MS;
|
||||
hopNum = L1_FRAME_40KBPS_20MS_HOPS;
|
||||
hopPattern = hopPattern_40KBPS_20MS;
|
||||
break;
|
||||
case L1_40KBPS_10MS_FRAME:
|
||||
phyModeCtrl |= PHY_MODE_CTRL_FRAME_40KBPS_10MS;
|
||||
hopNum = L1_FRAME_40KBPS_10MS_HOPS;
|
||||
hopPattern = hopPattern_40KBPS_10MS;
|
||||
break;
|
||||
case L1_200KBPS_5MS_FRAME:
|
||||
phyModeCtrl |= PHY_MODE_CTRL_FRAME_200KBPS_5MS;
|
||||
hopNum = L1_FRAME_200KBPS_5MS_HOPS;
|
||||
hopPattern = hopPattern_200KBPS_5MS;
|
||||
break;
|
||||
case L1_1M2BPS_5MS_FRAME:
|
||||
phyModeCtrl |= PHY_MODE_CTRL_FRAME_1M2BPS_5MS;
|
||||
hopNum = L1_FRAME_1M2BPS_5MS_HOPS;
|
||||
hopPattern = hopPattern_1M2BPS_5MS;
|
||||
break;
|
||||
default:
|
||||
return EPARAM;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
// Set frame configs
|
||||
@@ -746,12 +749,10 @@ int32_t Phy_SetupNextSlot(PHY_INST *instPtr, PHY_TOR_TYPE txrxMode,
|
||||
instPtr->antConfig.antFreq[1] = (uint8_t)hopPattern[i];
|
||||
instPtr->antConfig.rfFreq[0] = (uint8_t)(hopPattern[i] >> 8);
|
||||
instPtr->antConfig.rfFreq[1] = (uint8_t)hopPattern[i];
|
||||
memcpy((uint8_t *)(antConfigAddr + i *ANT_COINFO_LEN),
|
||||
memcpy((uint8_t *)(antConfigAddr + i * ANT_COINFO_LEN),
|
||||
dataSrcPtr, sizeof(PHY_ANT_CONFIG));
|
||||
}
|
||||
uint32_t antCtrl = (instPtr->antConfigOffset & ANT_CONFIG_OFFSET_MASK)
|
||||
| ((hopNum << ANT_CONFIG_NUM_SHIFT) & ANT_CONFIG_NUM_MASK)
|
||||
| ((ANT_COINFO_LEN << ANT_CONFIG_LEN_SHIFT) & ANT_CONFIG_LEN_MASK);
|
||||
uint32_t antCtrl = (instPtr->antConfigOffset & ANT_CONFIG_OFFSET_MASK) | ((hopNum << ANT_CONFIG_NUM_SHIFT) & ANT_CONFIG_NUM_MASK) | ((ANT_COINFO_LEN << ANT_CONFIG_LEN_SHIFT) & ANT_CONFIG_LEN_MASK);
|
||||
|
||||
/*
|
||||
memcpy((uint8_t*)antConfigDataAddr, hopPattern, hopNum*sizeof(uint16_t));
|
||||
@@ -891,7 +892,6 @@ double Phy_GetFreqEst(PHY_INST *instPtr)
|
||||
L1_FRAME_TYPE frameType;
|
||||
double coarse, fine;
|
||||
|
||||
|
||||
frameType = Phy_GetLastRecvFrameType(instPtr);
|
||||
if (frameType > L1_1M2BPS_5MS_FRAME || frameType <= L1_NONE_FRAME)
|
||||
{
|
||||
@@ -909,7 +909,7 @@ double Phy_GetFreqEst(PHY_INST *instPtr)
|
||||
coarse = (double)(8 - acqFreqIdx) * (250e3 / 4);
|
||||
coarse += (double)syncFreqIdx * 12e6 / 64 / 128;
|
||||
|
||||
fine = 48e6/2048*((double)estAbs)/8192.0;
|
||||
fine = 48e6 / 2048 * ((double)estAbs) / 8192.0;
|
||||
}
|
||||
else
|
||||
{
|
||||
@@ -917,11 +917,10 @@ double Phy_GetFreqEst(PHY_INST *instPtr)
|
||||
coarse = (double)(80 - acqFreqIdx) * (31.25e3 / 4);
|
||||
coarse += (double)syncFreqIdx * 1.5e6 / 64 / 128;
|
||||
|
||||
fine = 12e6/2048*((double)estAbs)/8192.0;
|
||||
fine = 12e6 / 2048 * ((double)estAbs) / 8192.0;
|
||||
}
|
||||
|
||||
fine = ((fineReg & FINE_FREQEST_SIGN_MASK) == FINE_FREQEST_SIGN_NEG) ?
|
||||
-fine : fine;
|
||||
fine = ((fineReg & FINE_FREQEST_SIGN_MASK) == FINE_FREQEST_SIGN_NEG) ? -fine : fine;
|
||||
|
||||
return (coarse + fine);
|
||||
}
|
||||
@@ -993,15 +992,14 @@ double Phy_GetFineFreqEst(PHY_INST *instPtr)
|
||||
if (frameType >= L1_200KBPS_5MS_FRAME)
|
||||
{
|
||||
// 12M Rc
|
||||
freqEst = 48e6/2048*((double)estAbs)/8192.0;
|
||||
freqEst = 48e6 / 2048 * ((double)estAbs) / 8192.0;
|
||||
}
|
||||
else
|
||||
{
|
||||
// 1.5M Rc
|
||||
freqEst = 12e6/2048*((double)estAbs)/8192.0;
|
||||
freqEst = 12e6 / 2048 * ((double)estAbs) / 8192.0;
|
||||
}
|
||||
freqEst = ((regValue & FINE_FREQEST_SIGN_MASK) == FINE_FREQEST_SIGN_NEG) ?
|
||||
-freqEst : freqEst;
|
||||
freqEst = ((regValue & FINE_FREQEST_SIGN_MASK) == FINE_FREQEST_SIGN_NEG) ? -freqEst : freqEst;
|
||||
return freqEst;
|
||||
}
|
||||
|
||||
@@ -1132,7 +1130,6 @@ void Phy_GetLastReceivedSlotStartTimeStamp(PHY_INST *instPtr, TIME_WORD *slotSta
|
||||
memcpy(slotStart, &(instPtr->recvSlotTime), sizeof(TIME_WORD));
|
||||
}
|
||||
|
||||
|
||||
/*****************************************************************************/
|
||||
/**
|
||||
* @brief Copy ans store the received data, if received data valid.
|
||||
@@ -1272,11 +1269,11 @@ void Phy_RefreshHwSate(PHY_INST *instPtr)
|
||||
rawData = XAdcPs_GetAdcData(&(instPtr->hwXadc), XADCPS_CH_TEMP);
|
||||
evalData = XAdcPs_RawToTemperature(rawData);
|
||||
instPtr->hwSate.spFpgaTemp = (evalData > TEMPERATURE_MAX)
|
||||
? INT8_MAX
|
||||
: ((evalData < TEMPERATURE_MIN) ? INT8_MIN : (int8_t) round(evalData/TEMPERATURE_LSB));
|
||||
? INT8_MAX
|
||||
: ((evalData < TEMPERATURE_MIN) ? INT8_MIN : (int8_t)round(evalData / TEMPERATURE_LSB));
|
||||
instPtr->hwSate.isSpOk = (instPtr->hwSate.spFpgaVolt == (VOLT_PS_OK | VOLT_PSAUX_OK | VOLT_DDR_OK | VOLT_PL_OK | VOLT_PLAUX_OK | VOLT_BRAM_OK))
|
||||
&& (instPtr->hwSate.spClkState == (CLK_SP_PLL0_LOCK | CLK_SP_PLL1_LOCK))
|
||||
&& (instPtr->hwSate.spAdLockState == (CLK_AD0_BBPLL_LOCK | CLK_AD0_RFPLL_LOCK | CLK_AD1_BBPLL_LOCK | CLK_AD1_RFPLL_LOCK));
|
||||
&& (instPtr->hwSate.spClkState == (CLK_SP_PLL0_LOCK | CLK_SP_PLL1_LOCK))
|
||||
&& (instPtr->hwSate.spAdLockState == (CLK_AD0_BBPLL_LOCK | CLK_AD0_RFPLL_LOCK | CLK_AD1_BBPLL_LOCK | CLK_AD1_RFPLL_LOCK));
|
||||
#else
|
||||
instPtr->hwSate.isSpOk = true;
|
||||
#endif
|
||||
@@ -1318,7 +1315,7 @@ void Phy_RefreshHwSate(PHY_INST *instPtr)
|
||||
|
||||
// Determin if antenna is ok.
|
||||
instPtr->hwSate.isAntOk = (instPtr->hwSate.antVolt == (VOLT_ANT_PROC_OK | VOLT_ANT_RF_OK | VOLT_ANT_NIL_OK | ANT_STATE_OK))
|
||||
&& (instPtr->hwSate.antPll == (CLK_ANT_BBPLL_LOCK | CLK_ANT_RFPLL0_LOCK | CLK_ANT_RFPLL1_LOCK));
|
||||
&& (instPtr->hwSate.antPll == (CLK_ANT_BBPLL_LOCK | CLK_ANT_RFPLL0_LOCK | CLK_ANT_RFPLL1_LOCK));
|
||||
|
||||
memset(instPtr->hwSate.reserve, 0x00, sizeof(instPtr->hwSate.reserve));
|
||||
|
||||
|
||||
@@ -35,8 +35,7 @@
|
||||
#include "../../system_monitor.h"
|
||||
#include "../../time_ctrl/time_ctrl.h"
|
||||
/************************** Constant Definitions *****************************/
|
||||
#define L1_NUM_ANT_SUBNRRW_PATTERN 37
|
||||
#define L1_NUM_ANT_NRRW_PATTERN 61
|
||||
#define L1_NUM_ANT_NRRW_PATTERN 37
|
||||
#define L1_INIT_BEAM_NO 0
|
||||
#define L1_INIT_ANT_WD PHY_ANT_BEAM_120
|
||||
#define L1_INIT_ANT_NO 0
|
||||
@@ -149,7 +148,7 @@ typedef enum
|
||||
PHY_ANT_BEAM_120 = 1,
|
||||
PHY_ANT_BEAM_60 = 2,
|
||||
PHY_ANT_BEAM_25 = 3,
|
||||
PHY_ANT_BEAM_8 = 4
|
||||
PHY_ANT_BEAM_16 = 4
|
||||
} PHY_ANT_BEAM_WIDTH;
|
||||
|
||||
typedef enum
|
||||
@@ -205,6 +204,7 @@ typedef struct
|
||||
uintptr_t recvDataAddr;
|
||||
uintptr_t sendDataAddr;
|
||||
uintptr_t antConfigAddr;
|
||||
uintptr_t antInfoAddr;
|
||||
bool isPhyEn; // if physical layer running
|
||||
bool isAcq; // if last reception acquisition success
|
||||
bool isFrameSync; // if last reception frame sync success
|
||||
@@ -224,6 +224,7 @@ typedef struct
|
||||
#ifndef EMULATION
|
||||
XAdcPs hwXadc;
|
||||
#endif
|
||||
PHY_ANT_ANGLE antNrrwPattern[L1_NUM_ANT_NRRW_PATTERN];
|
||||
HWSTATE hwSate;
|
||||
PHYLOG phyLog;
|
||||
} PHY_INST;
|
||||
@@ -240,9 +241,6 @@ extern uint16_t hopPattern_40KBPS_20MS[L1_FRAME_40KBPS_20MS_HOPS];
|
||||
extern uint16_t hopPattern_200KBPS_5MS[L1_FRAME_200KBPS_5MS_HOPS];
|
||||
extern uint16_t hopPattern_1M2BPS_5MS[L1_FRAME_1M2BPS_5MS_HOPS];
|
||||
|
||||
extern PHY_ANT_ANGLE antSubnrrwPattern[L1_NUM_ANT_SUBNRRW_PATTERN];
|
||||
extern PHY_ANT_ANGLE antNrrwPattern[L1_NUM_ANT_NRRW_PATTERN];
|
||||
|
||||
/************************** Function Prototypes ******************************/
|
||||
int32_t Phy_InstInit(PHY_INST **instPtr, PHY_CONFIG *phyConfig);
|
||||
void Phy_Destroy(PHY_INST *instPtr);
|
||||
@@ -272,8 +270,9 @@ uint32_t Phy_GetTimeComp(L1_FRAME_TYPE frameType);
|
||||
|
||||
void Phy_AntConfigInit(PHY_ANT_CONFIG *antConfig);
|
||||
void Phy_AntConfigMode(PHY_INST *instPtr, PHY_ANT_MODE mode);
|
||||
void Phy_SetBeamTable(PHY_INST *instPtr, PHY_ANT_ANGLE *table, uint32_t offset);
|
||||
int32_t Phy_SetBeamWidth(PHY_INST *instPtr, PHY_ANT_BEAM_WIDTH beamWidth);
|
||||
int32_t Phy_SetBeamNo(PHY_INST *instPtr, int32_t beamNo);
|
||||
int32_t Phy_SetBeamNo(PHY_INST *instPtr, int32_t beamNo, PHY_ANT_BEAM_WIDTH beamWidth);
|
||||
int32_t Phy_SetBeamAngle(PHY_INST *phyInstPtr, double offAx, double rndAx);
|
||||
int32_t Phy_SetTimeWord(PHY_INST *instPtr, const TIME_WORD *tmWord, PHY_TIME_WORD_TYPE tmType);
|
||||
|
||||
@@ -285,4 +284,4 @@ void Phy_GetFrameSyncTimeStamp(PHY_INST *instPtr, TIME_WORD *frameSyncT);
|
||||
void Phy_GetLastReceivedFrameSyncTimeStamp(PHY_INST *instPtr, TIME_WORD *frameSyncT);
|
||||
void Phy_GetSlotStartTimeStamp(PHY_INST *instPtr, TIME_WORD *slotStart);
|
||||
void Phy_GetLastReceivedSlotStartTimeStamp(PHY_INST *instPtr, TIME_WORD *slotStart);
|
||||
#endif /* PHY_CTRL_H_ */
|
||||
#endif // PHY_CTRL_H_
|
||||
@@ -237,8 +237,7 @@ inline bool SystemBus_IsRxBusy(SYSBUS *instPtr)
|
||||
static int32_t SystemBus_GenSelfTestRsp(SYSBUS *instPtr)
|
||||
{
|
||||
ASSERT(instPtr != NULL);
|
||||
SYSBUS_UART_FRAME *sysbusRsp;
|
||||
sysbusRsp = malloc(sizeof(SYSBUS_UART_FRAME));
|
||||
SYSBUS_UART_FRAME *sysbusRsp = malloc(sizeof(SYSBUS_UART_FRAME));
|
||||
if (sysbusRsp == NULL) {
|
||||
DBG_ERROR("Failed to allocate memory for SELF TEST Response!\n");
|
||||
return ENOMEM;
|
||||
@@ -728,10 +727,9 @@ int32_t SystemBus_TxIntrHandler(SYSBUS *instPtr)
|
||||
int32_t SystemBus_RxIntrHandler(SYSBUS *instPtr)
|
||||
{
|
||||
ASSERT(instPtr != NULL);
|
||||
int32_t Status;
|
||||
SYSBUS_UART_FRAME *sysbusReq;
|
||||
instPtr->isRxDone = true; // whether reception successes or not, receiving procedure ended.
|
||||
sysbusReq = malloc(sizeof(SYSBUS_UART_FRAME));
|
||||
int32_t Status;
|
||||
SYSBUS_UART_FRAME *sysbusReq = malloc(sizeof(SYSBUS_UART_FRAME));
|
||||
if (sysbusReq == NULL)
|
||||
{
|
||||
return ENOMEM;
|
||||
|
||||
Reference in New Issue
Block a user