This website requires JavaScript.
Explore
Help
Register
Sign In
ZoroGH
/
MM7020
Watch
1
Star
0
Fork
0
Code
Issues
2
Pull Requests
Actions
Packages
Projects
Releases
3
Wiki
Activity
12
Commits
2
Branches
6
Tags
145e8c09302936d6df9e4c517ae8e6b30a885b9f
T
Code
Clone
HTTPS
Tea CLI
Open with VS Code
Open with VSCodium
Open with Intellij IDEA
Download ZIP
Download TAR.GZ
Download BUNDLE
ZoroGH
145e8c0930
fix(top): reverse iq in recv
2024-08-02 20:51:37 +08:00
bd
Init repo
2024-07-19 14:09:20 +08:00
coe
fix(system): adjust cp len, frame sync pos, IQ map
2024-07-25 23:32:28 +08:00
contraint
fix(top): reverse iq in recv
2024-08-02 20:51:37 +08:00
hdl
fix(top): reverse iq in recv
2024-08-02 20:51:37 +08:00
sim
fix(top): reverse iq in recv
2024-08-02 20:51:37 +08:00
.gitignore
refactor(recviver): simulation pass for ila data
2024-07-24 21:32:28 +08:00
.tags
fix(top): reverse iq in recv
2024-08-02 20:51:37 +08:00
create_sys.tcl
Init repo
2024-07-19 14:09:20 +08:00
util.tcl
fix(top): reverse iq in recv
2024-08-02 20:51:37 +08:00
S
Description
MM7020 project
1.1
MiB
Releases
3
第3方测试版本
Latest
2024-10-18 19:57:09 +08:00
Languages
Verilog
93.2%
Tcl
6.8%