ZoroGH/MM7020
1
0
Fork 0
Code Issues 2 Pull Requests Actions Packages Projects Releases 3 Wiki Activity
2 Commits 2 Branches 6 Tags
e33875ef8f6cd0c86bf1e8391b75ebaa7055fd81
T
Clone
Open with VS Code Open with VSCodium Open with Intellij IDEA
Download ZIP Download TAR.GZ Download BUNDLE
ZoroGH e33875ef8f Add the recv hdl file
2024-07-19 21:31:49 +08:00
bd
Init repo
2024-07-19 14:09:20 +08:00
coe
Init repo
2024-07-19 14:09:20 +08:00
contraint
Init repo
2024-07-19 14:09:20 +08:00
hdl
Add the recv hdl file
2024-07-19 21:31:49 +08:00
sim
Init repo
2024-07-19 14:09:20 +08:00
.gitignore
Init repo
2024-07-19 14:09:20 +08:00
create_sys.tcl
Init repo
2024-07-19 14:09:20 +08:00
S
Description
MM7020 project
1.1 MiB
Releases 3
第3方测试版本
Latest
2024-10-18 19:57:09 +08:00
Languages
Verilog 93.2%
Tcl 6.8%